How to enable hardware control of NSS pin in SPI driver?

[dalewheat]

I’m writing a driver for an array of MAX7219 LED drivers for a digital clock for the CH32V307VC chip. It’s interface is very close to SPI but because of how the chips are daisy-chained together, the NSS pin (called chip select or CS on the MAX7219) is only used to latch in whatever data has already been shifted in; not to actually select the chip. I’m wanting to play with different combinations of hardware or software control of the NSS line to see what worked best, but couldn’t figure out how to enable hardware control of the NSS pin.

I’m using SPI3 with remap option 1. I was able to correctly specify the remap option after looking at the examples. I can get SPI-like data to emit from the SCK and MOSI pins, but really wanted the SPI peripheral to do the work on the NSS pin, if that turns out to be appropriate in this case.

My understanding from the device data sheet is that the SSM bit in the CTLR1 register needs to be set to a ‘0’ to allow the hardware to control the NSS pin. Additionally, the SSOE bit in the CTLR2 register must be set to a ‘1’ to enable the NSS output. Both of these bits are set for the software-controlled option in the new_inner() method in src/spi.rs (line 175 and following). I’m not enough of a Rust guru at all to understand if I’ve missed some other, more obvious way of making this setting.

Any clarification or additional insight into how to do this properly would be greatly appreciated. I’m using nightly Rust:

nightly-aarch64-apple-darwin updated - rustc 1.90.0-nightly (bfc046a4b 2025-07-12) (from rustc 1.90.0-nightly (a2d45f73c 2025-07-07))

Thanks!