[MERGE #5193 @sigatrev] fix unhandled opcode in arm64

Merge pull request #5193 from sigatrev:arm64

Author: sigatrev

lib/Backend/Lower.cpp

@@ -3023,15 +3023,16 @@ Lowerer::LowerRange(IR::Instr *instrStart, IR::Instr *instrEnd, bool defaultDoFa
             instr->Remove();
             break;
 
+#endif //ENABLE_WASM
         case Js::OpCode::SpeculatedLoadFence:
         {
             AssertOrFailFast(instr->m_kind == IR::InstrKindByteCodeUses);
-            IR::ByteCodeUsesInstr* bcuInstr = static_cast<IR::ByteCodeUsesInstr*>(instr);
-            // Most of the time we're not going to be able to remove any masking in a loop, and
-            // this instruction can be removed.
 #ifdef _M_ARM
             AssertOrFailFastMsg(false, "We shouldn't perform this hoisting on ARM");
 #else
+            IR::ByteCodeUsesInstr* bcuInstr = static_cast<IR::ByteCodeUsesInstr*>(instr);
+            // Most of the time we're not going to be able to remove any masking in a loop, and
+            // this instruction can be removed.
             if (bcuInstr->GetByteCodeUpwardExposedUsed() != nullptr && !bcuInstr->GetByteCodeUpwardExposedUsed()->IsEmpty())
             {
                 // The generated code is:
@@ -3060,8 +3061,6 @@ Lowerer::LowerRange(IR::Instr *instrStart, IR::Instr *instrEnd, bool defaultDoFa
             break;
         }
 
-#endif //ENABLE_WASM
-
         default:
 #ifdef ENABLE_WASM_SIMD
             if (IsSimd128Opcode(instr->m_opcode))