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ancientmodernfelicitiapicostove
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criu: add riscv64 support to parasite and restorer
Co-authored-by: Yixue Zhao <[email protected]> Co-authored-by: stove <[email protected]> Signed-off-by: Haorong Lu <[email protected]>
1 parent 1a42f63 commit 35b3077

19 files changed

+751
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‎criu/arch/riscv64/Makefile‎

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builtin-name := crtools.built-in.o
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ldflags-y += -r
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obj-y += cpu.o
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obj-y += crtools.o
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obj-y += sigframe.o
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obj-y += vdso-lookup.o

‎criu/arch/riscv64/cpu.c‎

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#undef LOG_PREFIX
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#define LOG_PREFIX "cpu: "
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#include <errno.h>
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#include "cpu.h"
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int cpu_init(void)
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{
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return 0;
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}
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int cpu_dump_cpuinfo(void)
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{
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return 0;
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}
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int cpu_validate_cpuinfo(void)
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{
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return 0;
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}
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int cpu_dump_cpuinfo_single(void)
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{
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return -ENOTSUP;
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}
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int cpu_validate_image_cpuinfo_single(void)
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{
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return -ENOTSUP;
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}
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int cpuinfo_dump(void)
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{
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return -ENOTSUP;
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}
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int cpuinfo_check(void)
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{
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return -ENOTSUP;
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}

‎criu/arch/riscv64/crtools.c‎

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#include <string.h>
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#include <unistd.h>
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#include <linux/elf.h>
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#include "types.h"
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#include <compel/asm/processor-flags.h>
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#include <compel/asm/infect-types.h>
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#include "asm/restorer.h"
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#include "common/compiler.h"
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#include <compel/ptrace.h>
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#include "asm/dump.h"
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#include "protobuf.h"
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#include "images/core.pb-c.h"
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#include "images/creds.pb-c.h"
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#include "parasite-syscall.h"
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#include "log.h"
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#include "util.h"
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#include "cpu.h"
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#include "restorer.h"
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#include "compel/infect.h"
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#define assign_reg(dst, src, e) dst->e = (__typeof__(dst->e))(src)->e
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int save_task_regs(void *x, user_regs_struct_t *regs, user_fpregs_struct_t *fpsimd)
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{
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int i;
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CoreEntry *core = x;
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// Save riscv64 gprs
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assign_reg(core->ti_riscv64->gpregs, regs, pc);
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assign_reg(core->ti_riscv64->gpregs, regs, ra);
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assign_reg(core->ti_riscv64->gpregs, regs, sp);
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assign_reg(core->ti_riscv64->gpregs, regs, gp);
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assign_reg(core->ti_riscv64->gpregs, regs, tp);
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assign_reg(core->ti_riscv64->gpregs, regs, t0);
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assign_reg(core->ti_riscv64->gpregs, regs, t1);
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assign_reg(core->ti_riscv64->gpregs, regs, t2);
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assign_reg(core->ti_riscv64->gpregs, regs, s0);
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assign_reg(core->ti_riscv64->gpregs, regs, s1);
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assign_reg(core->ti_riscv64->gpregs, regs, a0);
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assign_reg(core->ti_riscv64->gpregs, regs, a1);
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assign_reg(core->ti_riscv64->gpregs, regs, a2);
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assign_reg(core->ti_riscv64->gpregs, regs, a3);
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assign_reg(core->ti_riscv64->gpregs, regs, a4);
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assign_reg(core->ti_riscv64->gpregs, regs, a5);
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assign_reg(core->ti_riscv64->gpregs, regs, a6);
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assign_reg(core->ti_riscv64->gpregs, regs, a7);
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assign_reg(core->ti_riscv64->gpregs, regs, s2);
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assign_reg(core->ti_riscv64->gpregs, regs, s3);
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assign_reg(core->ti_riscv64->gpregs, regs, s4);
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assign_reg(core->ti_riscv64->gpregs, regs, s5);
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assign_reg(core->ti_riscv64->gpregs, regs, s6);
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assign_reg(core->ti_riscv64->gpregs, regs, s7);
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assign_reg(core->ti_riscv64->gpregs, regs, s8);
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assign_reg(core->ti_riscv64->gpregs, regs, s9);
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assign_reg(core->ti_riscv64->gpregs, regs, s10);
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assign_reg(core->ti_riscv64->gpregs, regs, s11);
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assign_reg(core->ti_riscv64->gpregs, regs, t3);
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assign_reg(core->ti_riscv64->gpregs, regs, t4);
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assign_reg(core->ti_riscv64->gpregs, regs, t5);
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assign_reg(core->ti_riscv64->gpregs, regs, t6);
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// Save riscv64 fprs
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for (i = 0; i < 32; ++i)
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assign_reg(core->ti_riscv64->fpsimd, fpsimd, f[i]);
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assign_reg(core->ti_riscv64->fpsimd, fpsimd, fcsr);
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return 0;
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}
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int arch_alloc_thread_info(CoreEntry *core)
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{
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ThreadInfoRiscv64 *ti_riscv64;
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UserRiscv64RegsEntry *gpregs;
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UserRiscv64DExtEntry *fpsimd;
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ti_riscv64 = xmalloc(sizeof(*ti_riscv64));
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if (!ti_riscv64)
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goto err;
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thread_info_riscv64__init(ti_riscv64);
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core->ti_riscv64 = ti_riscv64;
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gpregs = xmalloc(sizeof(*gpregs));
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if (!gpregs)
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goto err;
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user_riscv64_regs_entry__init(gpregs);
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ti_riscv64->gpregs = gpregs;
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fpsimd = xmalloc(sizeof(*fpsimd));
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if (!fpsimd)
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goto err;
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user_riscv64_d_ext_entry__init(fpsimd);
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ti_riscv64->fpsimd = fpsimd;
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fpsimd->f = xmalloc(32 * sizeof(fpsimd->f[0]));
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fpsimd->n_f = 32;
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if (!fpsimd->f)
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goto err;
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return 0;
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err:
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return -1;
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}
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void arch_free_thread_info(CoreEntry *core)
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{
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if (core->ti_riscv64) {
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if (core->ti_riscv64->fpsimd) {
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xfree(core->ti_riscv64->fpsimd->f);
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xfree(core->ti_riscv64->fpsimd);
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}
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xfree(core->ti_riscv64->gpregs);
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xfree(core->ti_riscv64);
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core->ti_riscv64 = NULL;
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}
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}
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int restore_fpu(struct rt_sigframe *sigframe, CoreEntry *core)
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{
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int i;
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UserRiscv64DExtEntry *fpsimd = core->ti_riscv64->fpsimd;
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if (fpsimd->n_f != 32)
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return 1;
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for (i = 0; i < 32; ++i)
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sigframe->uc.uc_mcontext.__fpregs.__d.__f[i] = fpsimd->f[i];
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sigframe->uc.uc_mcontext.__fpregs.__d.__fcsr = fpsimd->fcsr;
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return 0;
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}
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int restore_gpregs(struct rt_sigframe *f, UserRiscv64RegsEntry *r)
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{
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f->uc.uc_mcontext.__gregs[0] = r->pc;
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f->uc.uc_mcontext.__gregs[1] = r->ra;
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f->uc.uc_mcontext.__gregs[2] = r->sp;
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f->uc.uc_mcontext.__gregs[3] = r->gp;
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f->uc.uc_mcontext.__gregs[4] = r->tp;
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f->uc.uc_mcontext.__gregs[5] = r->t0;
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f->uc.uc_mcontext.__gregs[6] = r->t1;
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f->uc.uc_mcontext.__gregs[7] = r->t2;
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f->uc.uc_mcontext.__gregs[8] = r->s0;
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f->uc.uc_mcontext.__gregs[9] = r->s1;
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f->uc.uc_mcontext.__gregs[10] = r->a0;
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f->uc.uc_mcontext.__gregs[11] = r->a1;
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f->uc.uc_mcontext.__gregs[12] = r->a2;
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f->uc.uc_mcontext.__gregs[13] = r->a3;
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f->uc.uc_mcontext.__gregs[14] = r->a4;
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f->uc.uc_mcontext.__gregs[15] = r->a5;
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f->uc.uc_mcontext.__gregs[16] = r->a6;
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f->uc.uc_mcontext.__gregs[17] = r->a7;
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f->uc.uc_mcontext.__gregs[18] = r->s2;
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f->uc.uc_mcontext.__gregs[19] = r->s3;
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f->uc.uc_mcontext.__gregs[20] = r->s4;
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f->uc.uc_mcontext.__gregs[21] = r->s5;
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f->uc.uc_mcontext.__gregs[22] = r->s6;
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f->uc.uc_mcontext.__gregs[23] = r->s7;
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f->uc.uc_mcontext.__gregs[24] = r->s8;
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f->uc.uc_mcontext.__gregs[25] = r->s9;
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f->uc.uc_mcontext.__gregs[26] = r->s10;
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f->uc.uc_mcontext.__gregs[27] = r->s11;
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f->uc.uc_mcontext.__gregs[28] = r->t3;
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f->uc.uc_mcontext.__gregs[29] = r->t4;
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f->uc.uc_mcontext.__gregs[30] = r->t5;
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f->uc.uc_mcontext.__gregs[31] = r->t6;
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return 0;
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}

‎criu/arch/riscv64/include/asm/dump.h‎

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#ifndef __CR_ASM_DUMP_H__
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#define __CR_ASM_DUMP_H__
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extern int save_task_regs(void *, user_regs_struct_t *, user_fpregs_struct_t *);
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extern int arch_alloc_thread_info(CoreEntry *core);
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extern void arch_free_thread_info(CoreEntry *core);
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static inline void core_put_tls(CoreEntry *core, tls_t tls)
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{
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core->ti_riscv64->tls = tls;
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}
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#define get_task_futex_robust_list_compat(pid, info) -1
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#endif

‎criu/arch/riscv64/include/asm/int.h‎

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#ifndef __CR_ASM_INT_H__
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#define __CR_ASM_INT_H__
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#include "asm-generic/int.h"
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#endif /* __CR_ASM_INT_H__ */

‎criu/arch/riscv64/include/asm/kerndat.h‎

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#ifndef __CR_ASM_KERNDAT_H__
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#define __CR_ASM_KERNDAT_H__
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#define kdat_compatible_cr() 0
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#define kdat_can_map_vdso() 0
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#endif /* __CR_ASM_KERNDAT_H__ */

‎criu/arch/riscv64/include/asm/parasite-syscall.h‎

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#ifndef __CR_ASM_PARASITE_SYSCALL_H__
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#define __CR_ASM_PARASITE_SYSCALL_H__
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struct parasite_ctl;
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#endif

‎criu/arch/riscv64/include/asm/parasite.h‎

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#ifndef __ASM_PARASITE_H__
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#define __ASM_PARASITE_H__
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/*
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* This function is used to retrieve the value of the thread pointer (tp)
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* in RISC-V architecture, which is typically used for thread-local storage (TLS).
7+
* The value is then stored in the provided tls_t pointer.
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*/
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static inline void arch_get_tls(tls_t *ptls)
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{
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tls_t tls;
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asm("mv %0, tp" : "=r"(tls));
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*ptls = tls;
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}
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#endif

‎criu/arch/riscv64/include/asm/restore.h‎

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#ifndef __CR_ASM_RESTORE_H__
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#define __CR_ASM_RESTORE_H__
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#include "asm/restorer.h"
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#include "images/core.pb-c.h"
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/* clang-format off */
9+
#define JUMP_TO_RESTORER_BLOB(new_sp, restore_task_exec_start, \
10+
task_args) \
11+
asm volatile( \
12+
"and sp, %0, ~15 \n" \
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"mv a0, %2 \n" \
14+
"jr %1 \n" \
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: \
16+
: "r"(new_sp), \
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"r"(restore_task_exec_start), \
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"r"(task_args) \
19+
: "a0", "memory")
20+
/* clang-format on */
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static inline void core_get_tls(CoreEntry *pcore, tls_t *ptls)
23+
{
24+
*ptls = pcore->ti_riscv64->tls;
25+
}
26+
27+
int restore_fpu(struct rt_sigframe *sigframe, CoreEntry *core);
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#endif

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