[NFC][AArch64]Precommit test for D135102

- Run auto updater for 'trunc-to-tbl.ll' and 'build-pair-isel.ll'
- Add the motivating test of D135102 to 'bitfield-insert.ll'

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D137296

Author: mingmingl-llvm

llvm/test/CodeGen/AArch64/bitfield-insert.ll

@@ -601,3 +601,41 @@ define i64 @test_and_extended_shift_with_imm(i64 %0) {
   %3 = and i64 %2, 32640  ; #0x7f80
   ret i64 %3
 }
+
+; orr with left-shifted operand is better than bfi, since it improves data
+; dependency, and orr has a smaller latency and higher throughput than bfm on
+; some AArch64 processors (for the rest, orr is at least as good as bfm)
+;
+; ubfx x8, x0, #8, #7
+; and x9, x0, #0x7f
+; orr x0, x9, x8, lsl #7
+define i64 @test_orr_not_bfxil_i64(i64 %0) {
+; CHECK-LABEL: test_orr_not_bfxil_i64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    lsr x8, x0, #1
+; CHECK-NEXT:    and x8, x8, #0x3f80
+; CHECK-NEXT:    bfxil x8, x0, #0, #7
+; CHECK-NEXT:    mov x0, x8
+; CHECK-NEXT:    ret
+  %2 = and i64 %0, 127
+  %3 = lshr i64 %0, 1
+  %4 = and i64 %3, 16256  ; 0x3f80
+  %5 = or i64 %4, %2
+  ret i64 %5
+}
+
+; The 32-bit test for `test_orr_not_bfxil_i64`.
+define i32 @test_orr_not_bfxil_i32(i32 %0) {
+; CHECK-LABEL: test_orr_not_bfxil_i32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    lsr w8, w0, #1
+; CHECK-NEXT:    and w8, w8, #0x3f80
+; CHECK-NEXT:    bfxil w8, w0, #0, #7
+; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    ret
+  %2 = and i32 %0, 127
+  %3 = lshr i32 %0, 1
+  %4 = and i32 %3, 16256  ; 0x3f80
+  %5 = or i32 %4, %2
+  ret i32 %5
+}

llvm/test/CodeGen/AArch64/build-pair-isel.ll

@@ -1,10 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=aarch64 -o - -O0 %s | FileCheck %s
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 target triple = "arm64-apple-ios5.0.0"
 
 ; This test checks we don't fail isel due to unhandled build_pair nodes.
-; CHECK: bfi
 define void @compare_and_swap128() {
+; CHECK-LABEL: compare_and_swap128:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    //APP
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    //NO_APP
+; CHECK-NEXT:    // implicit-def: $x9
+; CHECK-NEXT:    mov w9, w10
+; CHECK-NEXT:    mov w8, w8
+; CHECK-NEXT:    // kill: def $x8 killed $w8
+; CHECK-NEXT:    bfi x8, x9, #32, #32
+; CHECK-NEXT:    // implicit-def: $x9
+; CHECK-NEXT:    str x8, [x9]
+; CHECK-NEXT:    ret
   %1 = call i128 asm sideeffect "nop", "=r,~{memory}"()
   store i128 %1, i128* undef, align 16
   ret void