diff --git a/include/Surelog/DesignCompile/CompileHelper.h b/include/Surelog/DesignCompile/CompileHelper.h index 31d4cc5407..73a351a4fb 100644 --- a/include/Surelog/DesignCompile/CompileHelper.h +++ b/include/Surelog/DesignCompile/CompileHelper.h @@ -154,7 +154,8 @@ class CompileHelper final { ValuedComponentI* instance); UHDM::any* compileTfCall(DesignComponent* component, const FileContent* fC, - NodeId Tf_call_stmt, CompileDesign* compileDesign); + NodeId Tf_call_stmt, CompileDesign* compileDesign, + UHDM::any* pexpr); UHDM::VectorOfany* compileTfCallArguments( DesignComponent* component, const FileContent* fC, NodeId Arg_list_node, diff --git a/src/DesignCompile/CompileExpression.cpp b/src/DesignCompile/CompileExpression.cpp index b935bd5610..0b56015f5f 100644 --- a/src/DesignCompile/CompileExpression.cpp +++ b/src/DesignCompile/CompileExpression.cpp @@ -1101,6 +1101,7 @@ UHDM::any *CompileHelper::compileSelectExpression( VectorOfexpr *exprs = s.MakeExprVec(); var_select->Exprs(exprs); var_select->VpiName(name); + var_select->VpiParent(pexpr); result = var_select; } NodeId lastBitExp; @@ -1132,27 +1133,26 @@ UHDM::any *CompileHelper::compileSelectExpression( if (result) { UHDM::var_select *var_select = (UHDM::var_select *)result; + var_select->VpiParent(pexpr); VectorOfexpr *exprs = var_select->Exprs(); exprs->push_back(sel); - if (sel->VpiParent() == nullptr) sel->VpiParent(var_select); + sel->VpiParent(var_select); } else if (fC->Child(Bit_select) && fC->Sibling(Bit_select)) { UHDM::var_select *var_select = s.MakeVar_select(); VectorOfexpr *exprs = s.MakeExprVec(); var_select->Exprs(exprs); var_select->VpiName(name); + var_select->VpiParent(pexpr); + sel->VpiParent(var_select); exprs->push_back(sel); result = var_select; - if (sel->VpiParent() == nullptr) sel->VpiParent(var_select); } else { bit_select *bit_select = s.MakeBit_select(); bit_select->VpiName(name); bit_select->VpiIndex(sel); + bit_select->VpiParent(pexpr); + sel->VpiParent(bit_select); result = bit_select; - if (sel->VpiParent() == nullptr) sel->VpiParent(bit_select); - ref_obj *ref = s.MakeRef_obj(); - bit_select->VpiParent(ref); - ref->VpiName(name); - ref->VpiParent(pexpr); } lastBitExp = bitexp; if (advanceBitSelect) Bit_select = bitexp; @@ -1176,6 +1176,7 @@ UHDM::any *CompileHelper::compileSelectExpression( VectorOfexpr *exprs = s.MakeExprVec(); var_select->Exprs(exprs); var_select->VpiName(name); + var_select->VpiParent(pexpr); exprs->push_back(sel); sel->VpiParent(var_select); } else { @@ -1218,52 +1219,18 @@ UHDM::any *CompileHelper::compileSelectExpression( compileExpression(component, fC, Bit_select, compileDesign, reduce, pexpr, instance, muteErrors); if (sel) { + hname.append(".") + .append(sel->VpiName()) + .append(decompileHelper(sel)); if (sel->UhdmType() == uhdmhier_path) { hier_path *p = (hier_path *)sel; for (auto el : *p->Path_elems()) { + el->VpiParent(path); elems->push_back(el); - std::string n(el->VpiName()); - if (el->UhdmType() == uhdmbit_select) { - bit_select *bs = (bit_select *)el; - const expr *index = bs->VpiIndex(); - std::string_view ind = index->VpiDecompile(); - if (ind.empty()) ind = index->VpiName(); - n.append("[").append(ind).append("]"); - hname += "." + n; - ref_obj *r = nullptr; - if ((bs->VpiParent() != nullptr) && - (bs->VpiParent()->UhdmType() == uhdmref_obj)) { - r = (ref_obj *)bs->VpiParent(); - } else { - r = s.MakeRef_obj(); - bs->VpiParent(r); - } - r->VpiName(hname); - r->VpiParent(path); - } else { - hname += "." + n; - el->VpiParent(path); - } } break; } else { - hname.append(".") - .append(sel->VpiName()) - .append(decompileHelper(sel)); - if (sel->UhdmType() == uhdmbit_select) { - ref_obj *r = nullptr; - if ((sel->VpiParent() != nullptr) && - (sel->VpiParent()->UhdmType() == uhdmref_obj)) { - r = (ref_obj *)sel->VpiParent(); - } else { - r = s.MakeRef_obj(); - sel->VpiParent(r); - } - r->VpiName(hname); - r->VpiParent(path); - } else { - sel->VpiParent(path); - } + sel->VpiParent(path); elems->push_back(sel); } } @@ -1972,7 +1939,7 @@ UHDM::any *CompileHelper::compileExpression( operation->VpiParent(pexpr); operation->Attributes(attributes); if (opL) { - setParentNoOverride(opL, operation); + opL->VpiParent(operation); operands->push_back(opL); } if (vopType == 0) { @@ -2043,7 +2010,7 @@ UHDM::any *CompileHelper::compileExpression( compileExpression(component, fC, rval, compileDesign, reduce, operation, instance, muteErrors); if (opR) { - setParentNoOverride(opR, operation); + opR->VpiParent(operation); operands->push_back(opR); } if (opType == VObjectType::slQmark || @@ -3706,54 +3673,43 @@ UHDM::any *CompileHelper::compilePartSelectRange( UHDM::any *result = nullptr; NodeId Constant_expression = fC->Child(Constant_range); if (fC->Type(Constant_range) == VObjectType::slConstant_range) { - UHDM::expr *lexp = - (expr *)compileExpression(component, fC, Constant_expression, - compileDesign, Reduce::No, pexpr, instance); + UHDM::part_select *part_select = s.MakePart_select(); + UHDM::expr *lexp = (expr *)compileExpression( + component, fC, Constant_expression, compileDesign, Reduce::No, + part_select, instance); UHDM::expr *rexp = (expr *)compileExpression( component, fC, fC->Sibling(Constant_expression), compileDesign, - Reduce::No, pexpr, instance); - UHDM::part_select *part_select = s.MakePart_select(); + Reduce::No, part_select, instance); part_select->Left_range(lexp); part_select->Right_range(rexp); - if (name == "CREATE_UNNAMED_PARENT") { - UHDM::ref_obj *ref = s.MakeRef_obj(); - part_select->VpiParent(ref); - } else if (!name.empty()) { - UHDM::ref_obj *ref = s.MakeRef_obj(); - ref->VpiName(name); - ref->VpiDefName(name); - ref->VpiParent(pexpr); - part_select->VpiParent(ref); + if (!name.empty() && (name != "CREATE_UNNAMED_PARENT")) { + part_select->VpiName(name); + part_select->VpiDefName(name); } + part_select->VpiParent(pexpr); part_select->VpiConstantSelect(true); result = part_select; } else { // constant_indexed_range + UHDM::indexed_part_select *part_select = s.MakeIndexed_part_select(); UHDM::expr *lexp = (expr *)compileExpression( - component, fC, Constant_expression, compileDesign, reduce, pexpr, + component, fC, Constant_expression, compileDesign, reduce, part_select, instance, muteErrors); NodeId op = fC->Sibling(Constant_expression); UHDM::expr *rexp = (expr *)compileExpression(component, fC, fC->Sibling(op), compileDesign, - reduce, pexpr, instance, muteErrors); - - UHDM::indexed_part_select *part_select = s.MakeIndexed_part_select(); + reduce, part_select, instance, muteErrors); part_select->Base_expr(lexp); part_select->Width_expr(rexp); if (fC->Type(op) == VObjectType::slIncPartSelectOp) part_select->VpiIndexedPartSelectType(vpiPosIndexed); else part_select->VpiIndexedPartSelectType(vpiNegIndexed); - if (name == "CREATE_UNNAMED_PARENT") { - UHDM::ref_obj *ref = s.MakeRef_obj(); - part_select->VpiParent(ref); - } else if (!name.empty()) { - UHDM::ref_obj *ref = s.MakeRef_obj(); - ref->VpiName(name); - ref->VpiDefName(name); - ref->VpiParent(pexpr); - part_select->VpiParent(ref); + if (!name.empty() && (name != "CREATE_UNNAMED_PARENT")) { + part_select->VpiName(name); + part_select->VpiDefName(name); } + part_select->VpiParent(pexpr); part_select->VpiConstantSelect(true); result = part_select; @@ -4219,6 +4175,7 @@ UHDM::any *CompileHelper::compileBits( } else if (sizeMode) { UHDM::sys_func_call *sys = s.MakeSys_func_call(); sys->VpiName("$size"); + sys->VpiParent(pexpr); VectorOfany *arguments = compileTfCallArguments(component, fC, List_of_arguments, compileDesign, reduce, sys, instance, muteErrors); @@ -4227,6 +4184,7 @@ UHDM::any *CompileHelper::compileBits( } else { UHDM::sys_func_call *sys = s.MakeSys_func_call(); sys->VpiName("$bits"); + sys->VpiParent(pexpr); VectorOfany *arguments = compileTfCallArguments(component, fC, List_of_arguments, compileDesign, reduce, sys, instance, muteErrors); @@ -4465,6 +4423,7 @@ UHDM::any *CompileHelper::compileClog2( } else { UHDM::sys_func_call *sys = s.MakeSys_func_call(); sys->VpiName("$clog2"); + sys->VpiParent(pexpr); VectorOfany *arguments = compileTfCallArguments(component, fC, List_of_arguments, compileDesign, reduce, sys, instance, muteErrors); @@ -4529,14 +4488,15 @@ UHDM::any *CompileHelper::compileComplexFuncCall( } else if (fC->Type(nameId) == VObjectType::slConstant_expression) { NodeId Constant_expresion = fC->Child(nameId); if (Constant_expresion) { - name += "["; + bit_select *sel = s.MakeBit_select(); expr *select = (expr *)compileExpression( - component, fC, Constant_expresion, compileDesign, reduce, pexpr, + component, fC, Constant_expresion, compileDesign, reduce, sel, instance, muteErrors); - name += select->VpiDecompile(); - name += "]"; - bit_select *sel = s.MakeBit_select(); + std::string bsname = decompileHelper(select); + name += bsname; + sel->VpiName(bsname); sel->VpiIndex(select); + sel->VpiParent(path); elems->push_back(sel); } } else { @@ -4545,6 +4505,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( nameId = fC->Sibling(nameId); } path->VpiName(name); + path->VpiParent(pexpr); result = path; } else if (fC->Type(name) == VObjectType::slDollar_keyword) { NodeId Dollar_keyword = name; @@ -4571,6 +4532,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( NodeId List_of_arguments = fC->Sibling(nameId); UHDM::sys_func_call *sys = s.MakeSys_func_call(); sys->VpiName(StrCat("$", name)); + sys->VpiParent(pexpr); VectorOfany *arguments = compileTfCallArguments( component, fC, List_of_arguments, compileDesign, reduce, sys, instance, muteErrors); @@ -4750,7 +4712,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( ref->VpiName(StrCat(packagename, "::", functionname)); ref->VpiFullName(StrCat(packagename, "::", functionname)); ref->Actual_group(param); - ref->VpiParent(pexpr); + ref->VpiParent(path); fC->populateCoreMembers(name, name, ref); elems->push_back(ref); while (List_of_arguments) { @@ -4758,7 +4720,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( VObjectType::slStringConst)) { ref_obj *ref = s.MakeRef_obj(); ref->VpiName(fC->SymName(List_of_arguments)); - ref->VpiParent(pexpr); + ref->VpiParent(path); fC->populateCoreMembers(List_of_arguments, List_of_arguments, ref); elems->push_back(ref); @@ -4819,11 +4781,6 @@ UHDM::any *CompileHelper::compileComplexFuncCall( instance, muteErrors); if (result && (result->UhdmType() == UHDM::uhdmpart_select)) { fC->populateCoreMembers(name, dotedName, result); - if ((result->VpiParent() != nullptr) && - (result->VpiParent()->UhdmType() == UHDM::uhdmref_obj)) { - ref_obj *const parent = (ref_obj *)result->VpiParent(); - fC->populateCoreMembers(name, name, parent); - } } return result; } else if ((!selectName) && @@ -4840,6 +4797,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( instance); if (index) { bit_select *select = s.MakeBit_select(); + index->VpiParent(select); select->VpiIndex(index); the_name += "[" + decompileHelper(index) + "]"; select->VpiFullName(the_name); @@ -4927,82 +4885,72 @@ UHDM::any *CompileHelper::compileComplexFuncCall( } if ((fC->Type(BitSelect) == VObjectType::slBit_select) && fC->Child(BitSelect)) { - expr *select = (expr *)compileSelectExpression( - component, fC, BitSelect, tmpName, compileDesign, reduce, - pexpr, instance, muteErrors); - if (select && (select->UhdmType() == UHDM::uhdmpart_select)) { - fC->populateCoreMembers(name, dotedName, result); - if ((select->VpiParent() != nullptr) && - (select->VpiParent()->UhdmType() == UHDM::uhdmref_obj)) { - ref_obj *const parent = (ref_obj *)select->VpiParent(); - fC->populateCoreMembers(name, name, parent); + if (expr *select = (expr *)compileSelectExpression( + component, fC, BitSelect, tmpName, compileDesign, reduce, + pexpr, instance, muteErrors)) { + if (select->UhdmType() == UHDM::uhdmpart_select) { + fC->populateCoreMembers(name, dotedName, result); + if ((select->VpiParent() != nullptr) && + (select->VpiParent()->UhdmType() == UHDM::uhdmref_obj)) { + ref_obj *const parent = (ref_obj *)select->VpiParent(); + fC->populateCoreMembers(name, name, parent); + } + } else if (select->UhdmType() == UHDM::uhdmvar_select) { + fC->populateCoreMembers(name, dotedName, select); } - } else if (select && - (select->UhdmType() == UHDM::uhdmvar_select)) { - fC->populateCoreMembers(name, dotedName, select); - } - if (select) { elems->push_back(select); the_name += decompileHelper(select); + tmpName.clear(); } - tmpName.clear(); break; } else if (fC->Type(BitSelect) == VObjectType::slPart_select_range) { - expr *select = (expr *)compilePartSelectRange( - component, fC, Expression, "CREATE_UNNAMED_PARENT", - compileDesign, reduce, nullptr, instance, muteErrors); - // Fix start/end to include the name - select->VpiColumnNo(fC->Column(name)); - ref_obj *parent = (ref_obj *)select->VpiParent(); - if (parent) parent->VpiName(tmpName); - if (tmpName.empty()) { - select->VpiParent(nullptr); + if (expr *select = (expr *)compilePartSelectRange( + component, fC, Expression, "CREATE_UNNAMED_PARENT", + compileDesign, reduce, nullptr, instance, muteErrors)) { + the_name += decompileHelper(select); + // Fix start/end to include the name + select->VpiColumnNo(fC->Column(name)); + if (ref_obj *ro = any_cast(select)) { + ro->VpiName(tmpName); + ro->VpiFullName(the_name); + } + elems->push_back(select); } - elems->push_back(select); - the_name += decompileHelper(select); } else if (Expression && (fC->Type(Expression) == VObjectType::slPart_select_range) && fC->Child(Expression)) { - expr *select = (expr *)compilePartSelectRange( - component, fC, fC->Child(Expression), "CREATE_UNNAMED_PARENT", - compileDesign, reduce, nullptr, instance, muteErrors); - // Fix start/end to include the name - select->VpiColumnNo(fC->Column(name)); - ref_obj *parent = (ref_obj *)select->VpiParent(); - if (parent) parent->VpiDefName(tmpName); - elems->push_back(select); - the_name += decompileHelper(select); + if (expr *select = (expr *)compilePartSelectRange( + component, fC, fC->Child(Expression), + "CREATE_UNNAMED_PARENT", compileDesign, reduce, nullptr, + instance, muteErrors)) { + the_name += decompileHelper(select); + // Fix start/end to include the name + select->VpiColumnNo(fC->Column(name)); + if (ref_obj *ro = any_cast(select)) { + ro->VpiName(tmpName); + ro->VpiFullName(the_name); + } + elems->push_back(select); + } } else if (Expression) { - expr *index = (expr *)compileExpression( - component, fC, Expression, compileDesign, reduce, pexpr, - instance, muteErrors); - if (index) { + if (expr *index = (expr *)compileExpression( + component, fC, Expression, compileDesign, reduce, pexpr, + instance, muteErrors)) { + the_name += "[" + decompileHelper(index) + "]"; bit_select *select = s.MakeBit_select(); - std::string indexName = "[" + decompileHelper(index) + "]"; - elems->push_back(select); + select->VpiName(tmpName); + select->VpiFullName(the_name); select->VpiIndex(index); - if (tmpName.empty()) { - select->VpiName(indexName); - select->VpiFullName(indexName); - } else { - select->VpiName(tmpName); - select->VpiFullName(tmpName); - ref_obj *ref = s.MakeRef_obj(); - select->VpiParent(ref); - ref->VpiName(tmpName + indexName); - ref->VpiParent(path); - ref->VpiName(tmpName + indexName); - } + select->VpiParent(path); fC->populateCoreMembers(name, name, select); - the_name += indexName; + elems->push_back(select); } } else { ref_obj *ref = s.MakeRef_obj(); elems->push_back(ref); ref->VpiName(tmpName); - ref->VpiFullName(tmpName); ref->VpiParent(path); fC->populateCoreMembers(name, name, ref); } @@ -5101,7 +5049,7 @@ UHDM::any *CompileHelper::compileComplexFuncCall( ref_obj *ref = s.MakeRef_obj(); elems->push_back(ref); ref->VpiName(tmpName); - ref->VpiFullName(tmpName); + ref->VpiFullName(the_name); ref->VpiParent(path); tmpName.clear(); } @@ -5189,7 +5137,8 @@ UHDM::any *CompileHelper::compileComplexFuncCall( result = ref; } } else if (fC->Type(dotedName) == VObjectType::slList_of_arguments) { - result = compileTfCall(component, fC, fC->Parent(name), compileDesign); + result = + compileTfCall(component, fC, fC->Parent(name), compileDesign, pexpr); } else if (fC->Type(name) == VObjectType::slStringConst) { const std::string_view n = fC->SymName(name); ref_obj *ref = s.MakeRef_obj(); diff --git a/src/DesignCompile/CompileHelper.cpp b/src/DesignCompile/CompileHelper.cpp index 6909da9f71..ca036e81e4 100644 --- a/src/DesignCompile/CompileHelper.cpp +++ b/src/DesignCompile/CompileHelper.cpp @@ -2292,19 +2292,21 @@ n<> u<17> t p<18> c<16> l<4> compileDesign, Reduce::No, nullptr, instance); NodeId Constant_select = fC->Sibling(Ps_or_hierarchical_identifier); if ((fC->Type(Constant_select) == VObjectType::slConstant_select) && - (Ps_or_hierarchical_identifier != Hierarchical_identifier)) { - UHDM::any* sel = compileSelectExpression( - component, fC, fC->Child(Constant_select), "", compileDesign, - Reduce::No, nullptr, instance, false); - if ((lhs_exp->UhdmType() == uhdmhier_path) && sel) { + (Ps_or_hierarchical_identifier != Hierarchical_identifier) && + (lhs_exp->UhdmType() == uhdmhier_path)) { + if (UHDM::any* sel = compileSelectExpression( + component, fC, fC->Child(Constant_select), "", compileDesign, + Reduce::No, lhs_exp, instance, false)) { hier_path* path = (hier_path*)lhs_exp; any* last = path->Path_elems()->back(); if (last->UhdmType() == uhdmref_obj && sel->UhdmType() == uhdmbit_select) { + ref_obj* last_ro = (ref_obj*)last; + bit_select* sel_bs = (bit_select*)sel; path->Path_elems()->pop_back(); - ((bit_select*)sel)->VpiName(last->VpiName()); - ((bit_select*)sel)->VpiFullName(last->VpiName()); - sel->VpiParent(last); + sel_bs->VpiName(last->VpiName()); + sel_bs->VpiFullName( + StrCat(last_ro->VpiFullName(), decompileHelper(sel))); } path->Path_elems()->push_back(sel); std::string path_name(path->VpiName()); @@ -3758,7 +3760,8 @@ UHDM::constant* CompileHelper::adjustSize(const UHDM::typespec* ts, UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, const FileContent* fC, NodeId Tf_call_stmt, - CompileDesign* compileDesign) { + CompileDesign* compileDesign, + any* pexpr) { UHDM::Serializer& s = compileDesign->getSerializer(); NodeId dollar_or_string = fC->Child(Tf_call_stmt); @@ -3778,7 +3781,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, name.assign("$").append(fC->SymName(tfNameNode)); } else if (leaf_type == VObjectType::slImplicit_class_handle) { return compileComplexFuncCall(component, fC, fC->Child(Tf_call_stmt), - compileDesign, Reduce::No, nullptr, nullptr, + compileDesign, Reduce::No, pexpr, nullptr, false); } else if (leaf_type == VObjectType::slDollar_root_keyword) { NodeId Dollar_root_keyword = dollar_or_string; @@ -3786,6 +3789,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, name.assign("$root.").append(fC->SymName(nameId)); nameId = fC->Sibling(nameId); tfNameNode = nameId; + func_call* fcall = s.MakeFunc_call(); while (nameId) { if (fC->Type(nameId) == VObjectType::slStringConst) { name.append(".").append(fC->SymName(nameId)); @@ -3794,8 +3798,9 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, NodeId Constant_expresion = fC->Child(nameId); if (Constant_expresion) { name += "["; - expr* select = (expr*)compileExpression( - component, fC, Constant_expresion, compileDesign, Reduce::No); + expr* select = + (expr*)compileExpression(component, fC, Constant_expresion, + compileDesign, Reduce::No, fcall); name += select->VpiDecompile(); name += "]"; tfNameNode = nameId; @@ -3805,8 +3810,8 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, } nameId = fC->Sibling(nameId); } - func_call* fcall = s.MakeFunc_call(); fcall->VpiName(name); + fcall->VpiParent(pexpr); call = fcall; } else if (leaf_type == VObjectType::slSystem_task_names) { tfNameNode = dollar_or_string; @@ -3819,7 +3824,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, fC->Type(handle) == VObjectType::slThis_dot_super) { return (tf_call*)compileComplexFuncCall( component, fC, fC->Child(Tf_call_stmt), compileDesign, Reduce::No, - nullptr, nullptr, false); + pexpr, nullptr, false); } else if (fC->Type(handle) == VObjectType::slDollar_root_keyword) { name = "$root."; tfNameNode = fC->Sibling(dollar_or_string); @@ -3829,7 +3834,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, } else if (leaf_type == VObjectType::slClass_scope) { return (tf_call*)compileComplexFuncCall( component, fC, fC->Child(Tf_call_stmt), compileDesign, Reduce::No, - nullptr, nullptr, false); + pexpr, nullptr, false); } else { // User call, AST is: // n<> u<27> t p<28> c<17> l<3> @@ -3848,6 +3853,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, const std::string_view mname = fC->SymName(tfNameNode); fC->populateCoreMembers(tfNameNode, tfNameNode, fcall); fcall->VpiName(mname); + fcall->VpiParent(pexpr); ref_obj* prefix = s.MakeRef_obj(); prefix->VpiName(name); prefix->VpiParent(fcall); @@ -3868,6 +3874,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component, tcall->Task(any_cast(tf)); call = tcall; } + call->VpiParent(pexpr); } if (call == nullptr) { LetStmt* stmt = component->getLetStmt(name); @@ -4078,6 +4085,7 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( } else { Variable_lvalue = fC->Child(Operator_assignment); } + assignment* assign = s.MakeAssignment(); UHDM::expr* lhs_rf = nullptr; UHDM::any* rhs_rf = nullptr; NodeId Delay_or_event_control; @@ -4088,8 +4096,8 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( Delay_or_event_control = fC->Sibling(Variable_lvalue); NodeId Expression = fC->Sibling(Delay_or_event_control); lhs_rf = any_cast(compileExpression(component, fC, Variable_lvalue, - compileDesign, Reduce::No, pstmt, - instance)); + compileDesign, Reduce::No, + assign, instance)); AssignOp_Assign = InvalidNodeId; if (fC->Type(Delay_or_event_control) == VObjectType::slDynamic_array_new) { method_func_call* fcall = s.MakeMethod_func_call(); @@ -4107,7 +4115,7 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( rhs_rf = fcall; } else { rhs_rf = compileExpression(component, fC, Expression, compileDesign, - Reduce::No, pstmt, instance); + Reduce::No, assign, instance); } } else if (fC->Type(Variable_lvalue) == VObjectType::slVariable_lvalue) { AssignOp_Assign = fC->Sibling(Variable_lvalue); @@ -4123,7 +4131,7 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( lhs_rf = any_cast( compileExpression(component, fC, Hierarchical_identifier, compileDesign, - Reduce::No, pstmt, instance)); + Reduce::No, assign, instance)); NodeId Expression; if (fC->Type(AssignOp_Assign) == VObjectType::slExpression) { Expression = AssignOp_Assign; @@ -4137,7 +4145,7 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( Expression = fC->Sibling(AssignOp_Assign); } rhs_rf = compileExpression(component, fC, Expression, compileDesign, - Reduce::No, pstmt, instance); + Reduce::No, assign, instance); } else if (fC->Type(Operator_assignment) == VObjectType::slHierarchical_identifier) { // = new ... @@ -4147,9 +4155,10 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( NodeId List_of_arguments = fC->Child(Class_new); lhs_rf = any_cast( compileExpression(component, fC, Hierarchical_identifier, compileDesign, - Reduce::No, pstmt, instance)); + Reduce::No, assign, instance)); method_func_call* fcall = s.MakeMethod_func_call(); fcall->VpiName("new"); + fcall->VpiParent(assign); fC->populateCoreMembers(Hierarchical_identifier, Hierarchical_identifier, fcall); if (List_of_arguments) { @@ -4162,7 +4171,6 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( rhs_rf = fcall; } - assignment* assign = s.MakeAssignment(); UHDM::delay_control* delay_control = nullptr; if (Delay_or_event_control && (fC->Type(Delay_or_event_control) != VObjectType::slSelect)) { @@ -4183,8 +4191,6 @@ UHDM::assignment* CompileHelper::compileBlockingAssignment( if (blocking) assign->VpiBlocking(true); assign->Lhs(lhs_rf); assign->Rhs(rhs_rf); - setParentNoOverride(lhs_rf, assign); - setParentNoOverride(rhs_rf, assign); return assign; } diff --git a/src/DesignCompile/CompileStmt.cpp b/src/DesignCompile/CompileStmt.cpp index 1d8c6a9091..c511506c96 100644 --- a/src/DesignCompile/CompileStmt.cpp +++ b/src/DesignCompile/CompileStmt.cpp @@ -238,11 +238,12 @@ VectorOfany* CompileHelper::compileStmt(DesignComponent* component, } case VObjectType::slSubroutine_call_statement: { NodeId Subroutine_call = fC->Child(the_stmt); - stmt = compileTfCall(component, fC, Subroutine_call, compileDesign); + stmt = + compileTfCall(component, fC, Subroutine_call, compileDesign, pstmt); break; } case VObjectType::slSystem_task: { - stmt = compileTfCall(component, fC, the_stmt, compileDesign); + stmt = compileTfCall(component, fC, the_stmt, compileDesign, pstmt); break; } case VObjectType::slConditional_statement: { diff --git a/tests/AlwaysNoElab/AlwaysNoElab.log b/tests/AlwaysNoElab/AlwaysNoElab.log index 04b367c798..7acb79a56b 100644 --- a/tests/AlwaysNoElab/AlwaysNoElab.log +++ b/tests/AlwaysNoElab/AlwaysNoElab.log @@ -1063,23 +1063,20 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_operation: , line:9:22, endln:9:47 - |vpiParent: - \_assignment: , line:9:5, endln:9:47 |vpiTypespec: \_int_typespec: , line:5:14, endln:5:26 |vpiOpType:67 |vpiOperand: - \_ref_obj: (work@dut.device), line:9:40, endln:9:46 + \_ref_obj: (device), line:9:40, endln:9:46 |vpiParent: \_operation: , line:9:22, endln:9:47 |vpiName:device - |vpiFullName:work@dut.device |vpiActual: \_int_var: (work@dut.device), line:7:7, endln:7:17 |vpiLhs: \_ref_obj: (work@dut.device_sel_req), line:9:5, endln:9:19 |vpiParent: - \_begin: (work@dut), line:8:15, endln:10:6 + \_assignment: , line:9:5, endln:9:47 |vpiName:device_sel_req |vpiFullName:work@dut.device_sel_req |vpiActual: diff --git a/tests/ArianeElab/ArianeElab.log b/tests/ArianeElab/ArianeElab.log index 9e964f1094..923dffd7f6 100644 --- a/tests/ArianeElab/ArianeElab.log +++ b/tests/ArianeElab/ArianeElab.log @@ -20270,7 +20270,7 @@ part_select 116 port 42 range 1818 ref_module 6 -ref_obj 1953 +ref_obj 1734 ref_var 1 return_stmt 212 string_typespec 932 @@ -20334,7 +20334,7 @@ part_select 442 port 84 range 1818 ref_module 6 -ref_obj 4676 +ref_obj 3939 ref_var 1 return_stmt 684 string_typespec 932 @@ -24244,7 +24244,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (VLEN), line:28:45, endln:28:49 |vpiParent: - \_operation: , line:28:29, endln:28:56 + \_operation: , line:28:45, endln:28:52 |vpiName:VLEN |vpiActual: \_parameter: (riscv::VLEN), line:19:16, endln:19:20 @@ -25516,7 +25516,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:299:60, endln:299:64 |vpiParent: - \_operation: , line:299:54, endln:299:67 + \_operation: , line:299:60, endln:299:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -25565,7 +25565,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:300:60, endln:300:64 |vpiParent: - \_operation: , line:300:54, endln:300:67 + \_operation: , line:300:60, endln:300:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -25614,7 +25614,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:301:60, endln:301:64 |vpiParent: - \_operation: , line:301:54, endln:301:67 + \_operation: , line:301:60, endln:301:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -25663,7 +25663,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:302:60, endln:302:64 |vpiParent: - \_operation: , line:302:54, endln:302:67 + \_operation: , line:302:60, endln:302:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -25712,7 +25712,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:303:60, endln:303:64 |vpiParent: - \_operation: , line:303:54, endln:303:67 + \_operation: , line:303:60, endln:303:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -25761,7 +25761,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:304:60, endln:304:64 |vpiParent: - \_operation: , line:304:54, endln:304:67 + \_operation: , line:304:60, endln:304:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -30209,12 +30209,12 @@ design: (work@top) |vpiOperand: \_operation: , line:254:16, endln:254:23 |vpiParent: - \_struct_typespec: (riscv::pte_t), line:252:13, endln:252:19 + \_operation: , line:254:16, endln:254:25 |vpiOpType:11 |vpiOperand: \_ref_obj: (riscv::riscv::pte_t::PLEN), line:254:16, endln:254:20 |vpiParent: - \_struct_typespec: (riscv::pte_t), line:252:13, endln:252:19 + \_operation: , line:254:16, endln:254:23 |vpiName:PLEN |vpiFullName:riscv::riscv::pte_t::PLEN |vpiActual: @@ -30451,7 +30451,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::ModeW), line:83:16, endln:83:21 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:83:16, endln:83:23 |vpiName:ModeW |vpiFullName:riscv::riscv::satp_t::ModeW |vpiActual: @@ -30500,7 +30500,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::ASIDW), line:84:16, endln:84:21 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:84:16, endln:84:23 |vpiName:ASIDW |vpiFullName:riscv::riscv::satp_t::ASIDW |vpiActual: @@ -30549,7 +30549,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::PPNW), line:85:16, endln:85:20 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:85:16, endln:85:22 |vpiName:PPNW |vpiFullName:riscv::riscv::satp_t::PPNW |vpiActual: @@ -31251,15 +31251,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:17, endln:563:24 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:21, endln:563:23 |vpiParent: @@ -31268,19 +31264,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:26, endln:563:35 + \_part_select: imm (riscv::jal::imm), line:563:26, endln:563:35 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:26, endln:563:29 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:30, endln:563:32 @@ -31297,15 +31289,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:37, endln:563:44 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:41, endln:563:43 |vpiParent: @@ -31314,19 +31302,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:46, endln:563:56 + \_part_select: imm (riscv::jal::imm), line:563:46, endln:563:56 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:46, endln:563:49 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:50, endln:563:52 @@ -31484,16 +31468,14 @@ design: (work@top) \_return_stmt: , line:568:9, endln:568:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:568:17, endln:568:29 + \_part_select: offset (riscv::jalr::offset), line:568:17, endln:568:29 |vpiParent: - \_ref_obj: offset (riscv::jalr::offset), line:568:17, endln:568:23 - |vpiParent: - \_operation: , line:568:16, endln:568:52 - |vpiName:offset - |vpiFullName:riscv::jalr::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:566:87, endln:566:93 + \_operation: , line:568:16, endln:568:52 + |vpiName:offset + |vpiFullName:riscv::jalr::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:566:87, endln:566:93 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:568:24, endln:568:26 @@ -31667,16 +31649,14 @@ design: (work@top) \_return_stmt: , line:573:9, endln:573:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:573:17, endln:573:26 + \_part_select: imm (riscv::andi::imm), line:573:17, endln:573:26 |vpiParent: - \_ref_obj: imm (riscv::andi::imm), line:573:17, endln:573:20 - |vpiParent: - \_operation: , line:573:16, endln:573:49 - |vpiName:imm - |vpiFullName:riscv::andi::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:571:87, endln:571:90 + \_operation: , line:573:16, endln:573:49 + |vpiName:imm + |vpiFullName:riscv::andi::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:571:87, endln:571:90 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:573:21, endln:573:23 @@ -31858,16 +31838,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:578:23, endln:578:33 + \_part_select: shamt (riscv::slli::shamt), line:578:23, endln:578:33 |vpiParent: - \_ref_obj: shamt (riscv::slli::shamt), line:578:23, endln:578:28 - |vpiParent: - \_operation: , line:578:16, endln:578:56 - |vpiName:shamt - |vpiFullName:riscv::slli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:576:86, endln:576:91 + \_operation: , line:578:16, endln:578:56 + |vpiName:shamt + |vpiFullName:riscv::slli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:576:86, endln:576:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:578:29, endln:578:30 @@ -32049,16 +32027,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:583:23, endln:583:33 + \_part_select: shamt (riscv::srli::shamt), line:583:23, endln:583:33 |vpiParent: - \_ref_obj: shamt (riscv::srli::shamt), line:583:23, endln:583:28 - |vpiParent: - \_operation: , line:583:16, endln:583:56 - |vpiName:shamt - |vpiFullName:riscv::srli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:581:86, endln:581:91 + \_operation: , line:583:16, endln:583:56 + |vpiName:shamt + |vpiFullName:riscv::srli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:581:86, endln:581:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:583:29, endln:583:30 @@ -32260,16 +32236,14 @@ design: (work@top) \_return_stmt: , line:588:9, endln:588:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:588:17, endln:588:29 + \_part_select: offset (riscv::load::offset), line:588:17, endln:588:29 |vpiParent: - \_ref_obj: offset (riscv::load::offset), line:588:17, endln:588:23 - |vpiParent: - \_operation: , line:588:16, endln:588:55 - |vpiName:offset - |vpiFullName:riscv::load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:586:108, endln:586:114 + \_operation: , line:588:16, endln:588:55 + |vpiName:offset + |vpiFullName:riscv::load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:586:108, endln:586:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:588:24, endln:588:26 @@ -32417,15 +32391,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:17, endln:593:24 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:21, endln:593:23 |vpiParent: @@ -32434,19 +32404,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:26, endln:593:35 + \_part_select: imm (riscv::auipc::imm), line:593:26, endln:593:35 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:26, endln:593:29 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:30, endln:593:32 @@ -32463,15 +32429,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:37, endln:593:44 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:41, endln:593:43 |vpiParent: @@ -32480,19 +32442,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:46, endln:593:56 + \_part_select: imm (riscv::auipc::imm), line:593:46, endln:593:56 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:46, endln:593:49 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:50, endln:593:52 @@ -32678,16 +32636,14 @@ design: (work@top) \_return_stmt: , line:598:9, endln:598:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:598:17, endln:598:29 + \_part_select: offset (riscv::store::offset), line:598:17, endln:598:29 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:17, endln:598:23 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:24, endln:598:26 @@ -32726,16 +32682,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:596:56, endln:596:60 |vpiOperand: - \_part_select: , line:598:48, endln:598:59 + \_part_select: offset (riscv::store::offset), line:598:48, endln:598:59 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:48, endln:598:54 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:55, endln:598:56 @@ -32913,16 +32867,14 @@ design: (work@top) \_return_stmt: , line:603:9, endln:603:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:603:17, endln:603:29 + \_part_select: offset (riscv::float_load::offset), line:603:17, endln:603:29 |vpiParent: - \_ref_obj: offset (riscv::float_load::offset), line:603:17, endln:603:23 - |vpiParent: - \_operation: , line:603:16, endln:603:62 - |vpiName:offset - |vpiFullName:riscv::float_load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:601:114, endln:601:120 + \_operation: , line:603:16, endln:603:62 + |vpiName:offset + |vpiFullName:riscv::float_load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:601:114, endln:601:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:603:24, endln:603:26 @@ -33124,16 +33076,14 @@ design: (work@top) \_return_stmt: , line:608:9, endln:608:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:608:17, endln:608:29 + \_part_select: offset (riscv::float_store::offset), line:608:17, endln:608:29 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:17, endln:608:23 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:24, endln:608:26 @@ -33172,16 +33122,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:606:62, endln:606:66 |vpiOperand: - \_part_select: , line:608:48, endln:608:59 + \_part_select: offset (riscv::float_store::offset), line:608:48, endln:608:59 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:48, endln:608:54 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:55, endln:608:56 @@ -33837,16 +33785,14 @@ design: (work@top) \_if_else: , line:642:9, endln:646:12 |vpiOpType:15 |vpiOperand: - \_part_select: , line:642:13, endln:642:23 + \_part_select: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:23 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:18 - |vpiParent: - \_operation: , line:642:13, endln:642:32 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_operation: , line:642:13, endln:642:32 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:642:19, endln:642:20 @@ -33892,16 +33838,14 @@ design: (work@top) |STRING:(0x%h) |vpiConstType:6 |vpiArgument: - \_part_select: , line:643:44, endln:643:55 + \_part_select: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:55 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:49 - |vpiParent: - \_sys_func_call: ($sformatf), line:643:24, endln:643:56 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_sys_func_call: ($sformatf), line:643:24, endln:643:56 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:643:50, endln:643:52 @@ -34341,7 +34285,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:690:14, endln:690:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:690:14, endln:690:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -34410,7 +34354,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:691:14, endln:691:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:691:14, endln:691:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -34495,7 +34439,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:693:14, endln:693:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:693:14, endln:693:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -34564,7 +34508,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:694:14, endln:694:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:694:14, endln:694:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -34649,7 +34593,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:696:14, endln:696:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:696:14, endln:696:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -34718,7 +34662,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:697:14, endln:697:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:697:14, endln:697:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -36375,7 +36319,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVF), line:840:26, endln:840:29 |vpiParent: - \_operation: , line:839:26, endln:844:27 + \_operation: , line:840:26, endln:844:27 |vpiName:RVF |vpiActual: \_parameter: (ariane_pkg::RVF), line:813:20, endln:813:23 @@ -36395,7 +36339,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16), line:841:26, endln:841:30 |vpiParent: - \_operation: , line:840:26, endln:844:27 + \_operation: , line:841:26, endln:844:27 |vpiName:XF16 |vpiActual: \_parameter: (ariane_pkg::XF16), line:819:20, endln:819:24 @@ -36415,7 +36359,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16ALT), line:842:26, endln:842:33 |vpiParent: - \_operation: , line:841:26, endln:844:27 + \_operation: , line:842:26, endln:844:27 |vpiName:XF16ALT |vpiActual: \_parameter: (ariane_pkg::XF16ALT), line:820:20, endln:820:27 @@ -36435,7 +36379,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF8), line:843:26, endln:843:29 |vpiParent: - \_operation: , line:842:26, endln:844:27 + \_operation: , line:843:26, endln:844:27 |vpiName:XF8 |vpiActual: \_parameter: (ariane_pkg::XF8), line:821:20, endln:821:23 @@ -36538,7 +36482,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:848:51, endln:848:55 |vpiParent: - \_operation: , line:848:33, endln:848:58 + \_operation: , line:848:51, endln:848:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -36586,7 +36530,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:849:51, endln:849:55 |vpiParent: - \_operation: , line:849:33, endln:849:58 + \_operation: , line:849:51, endln:849:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -36634,7 +36578,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:850:51, endln:850:55 |vpiParent: - \_operation: , line:850:33, endln:850:58 + \_operation: , line:850:51, endln:850:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -36682,7 +36626,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:851:51, endln:851:55 |vpiParent: - \_operation: , line:851:33, endln:851:57 + \_operation: , line:851:51, endln:851:57 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -36850,7 +36794,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVD), line:859:41, endln:859:44 |vpiParent: - \_operation: , line:857:41, endln:859:51 + \_operation: , line:859:41, endln:859:50 |vpiName:RVD |vpiActual: \_parameter: (ariane_pkg::RVD), line:814:20, endln:814:23 @@ -36870,7 +36814,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVF), line:860:41, endln:860:44 |vpiParent: - \_operation: , line:857:41, endln:860:51 + \_operation: , line:860:41, endln:860:50 |vpiName:RVF |vpiActual: \_parameter: (ariane_pkg::RVF), line:813:20, endln:813:23 @@ -36995,7 +36939,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (NSX), line:866:41, endln:866:44 |vpiParent: - \_operation: , line:857:41, endln:866:51 + \_operation: , line:866:41, endln:866:50 |vpiName:NSX |vpiActual: \_parameter: (ariane_pkg::NSX), line:846:20, endln:846:23 @@ -37015,17 +36959,17 @@ design: (work@top) |vpiOperand: \_operation: , line:867:42, endln:867:67 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:41, endln:867:85 |vpiOpType:32 |vpiOperand: \_operation: , line:867:42, endln:867:59 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:42, endln:867:67 |vpiOpType:14 |vpiOperand: \_ref_obj: (riscv::XLEN), line:867:42, endln:867:49 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:42, endln:867:59 |vpiName:riscv::XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -37061,7 +37005,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::XLEN), line:867:72, endln:867:79 |vpiParent: - \_operation: , line:867:41, endln:867:85 + \_operation: , line:867:72, endln:867:85 |vpiName:riscv::XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -37607,7 +37551,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (CONFIG_L1I_SIZE), line:1071:57, endln:1071:72 |vpiParent: - \_sys_func_call: ($clog2), line:1071:50, endln:1071:92 + \_operation: , line:1071:57, endln:1071:91 |vpiName:CONFIG_L1I_SIZE |vpiActual: \_parameter: (ariane_pkg::CONFIG_L1I_SIZE), line:1069:27, endln:1069:42 @@ -37711,7 +37655,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (CONFIG_L1D_SIZE), line:1077:57, endln:1077:72 |vpiParent: - \_sys_func_call: ($clog2), line:1077:50, endln:1077:92 + \_operation: , line:1077:57, endln:1077:91 |vpiName:CONFIG_L1D_SIZE |vpiActual: \_parameter: (ariane_pkg::CONFIG_L1D_SIZE), line:1075:27, endln:1075:42 @@ -38182,7 +38126,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bht_update_t::riscv::VLEN), line:990:16, endln:990:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bht_update_t), line:988:13, endln:988:19 + \_operation: , line:990:16, endln:990:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bht_update_t::riscv::VLEN |vpiActual: @@ -38271,7 +38215,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN), line:957:16, endln:957:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bp_resolve_t), line:955:13, endln:955:19 + \_operation: , line:957:16, endln:957:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN |vpiActual: @@ -38320,7 +38264,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN), line:958:16, endln:958:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bp_resolve_t), line:955:13, endln:955:19 + \_operation: , line:958:16, endln:958:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN |vpiActual: @@ -38490,7 +38434,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::branchpredict_sbe_t::riscv::VLEN), line:969:16, endln:969:23 |vpiParent: - \_struct_typespec: (ariane_pkg::branchpredict_sbe_t), line:967:13, endln:967:19 + \_operation: , line:969:16, endln:969:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::branchpredict_sbe_t::riscv::VLEN |vpiActual: @@ -38563,7 +38507,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_prediction_t::riscv::VLEN), line:980:16, endln:980:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_prediction_t), line:978:13, endln:978:19 + \_operation: , line:980:16, endln:980:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_prediction_t::riscv::VLEN |vpiActual: @@ -38636,7 +38580,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN), line:974:16, endln:974:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_update_t), line:972:13, endln:972:19 + \_operation: , line:974:16, endln:974:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN |vpiActual: @@ -38685,7 +38629,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN), line:975:16, endln:975:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_update_t), line:972:13, endln:972:19 + \_operation: , line:975:16, endln:975:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN |vpiActual: @@ -38744,7 +38688,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_INDEX_WIDTH), line:1353:16, endln:1353:34 |vpiParent: - \_struct_typespec: (ariane_pkg::dcache_req_i_t), line:1352:13, endln:1352:19 + \_operation: , line:1353:16, endln:1353:36 |vpiName:DCACHE_INDEX_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_INDEX_WIDTH |vpiActual: @@ -38793,7 +38737,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_TAG_WIDTH), line:1354:16, endln:1354:32 |vpiParent: - \_struct_typespec: (ariane_pkg::dcache_req_i_t), line:1352:13, endln:1352:19 + \_operation: , line:1354:16, endln:1354:34 |vpiName:DCACHE_TAG_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_TAG_WIDTH |vpiActual: @@ -39146,7 +39090,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::fetch_entry_t::riscv::VLEN), line:1230:16, endln:1230:23 |vpiParent: - \_struct_typespec: (ariane_pkg::fetch_entry_t), line:1229:13, endln:1229:19 + \_operation: , line:1230:16, endln:1230:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::fetch_entry_t::riscv::VLEN |vpiActual: @@ -40210,7 +40154,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::fu_data_t::TRANS_ID_BITS), line:1129:16, endln:1129:29 |vpiParent: - \_struct_typespec: (ariane_pkg::fu_data_t), line:1123:13, endln:1123:19 + \_operation: , line:1129:16, endln:1129:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::fu_data_t::TRANS_ID_BITS |vpiActual: @@ -40287,7 +40231,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_areq_i_t::riscv::PLEN), line:1307:16, endln:1307:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_areq_i_t), line:1305:13, endln:1305:19 + \_operation: , line:1307:16, endln:1307:29 |vpiName:riscv::PLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_areq_i_t::riscv::PLEN |vpiActual: @@ -40372,7 +40316,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_areq_o_t::riscv::VLEN), line:1313:16, endln:1313:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_areq_o_t), line:1311:13, endln:1311:19 + \_operation: , line:1313:16, endln:1313:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_areq_o_t::riscv::VLEN |vpiActual: @@ -40493,7 +40437,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_i_t::riscv::VLEN), line:1322:16, endln:1322:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_i_t), line:1317:13, endln:1317:19 + \_operation: , line:1322:16, endln:1322:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_i_t::riscv::VLEN |vpiActual: @@ -40582,7 +40526,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_o_t::FETCH_WIDTH), line:1328:16, endln:1328:27 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_o_t), line:1325:13, endln:1325:19 + \_operation: , line:1328:16, endln:1328:29 |vpiName:FETCH_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_o_t::FETCH_WIDTH |vpiActual: @@ -40631,7 +40575,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_o_t::riscv::VLEN), line:1329:16, endln:1329:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_o_t), line:1325:13, endln:1325:19 + \_operation: , line:1329:16, endln:1329:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_o_t::riscv::VLEN |vpiActual: @@ -40792,7 +40736,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::lsu_ctrl_t::riscv::VLEN), line:1216:16, endln:1216:23 |vpiParent: - \_struct_typespec: (ariane_pkg::lsu_ctrl_t), line:1214:13, endln:1214:19 + \_operation: , line:1216:16, endln:1216:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::lsu_ctrl_t::riscv::VLEN |vpiActual: @@ -40953,7 +40897,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::lsu_ctrl_t::TRANS_ID_BITS), line:1222:16, endln:1222:29 |vpiParent: - \_struct_typespec: (ariane_pkg::lsu_ctrl_t), line:1214:13, endln:1214:19 + \_operation: , line:1222:16, endln:1222:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::lsu_ctrl_t::TRANS_ID_BITS |vpiActual: @@ -41026,7 +40970,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ras_t::riscv::VLEN), line:985:16, endln:985:23 |vpiParent: - \_struct_typespec: (ariane_pkg::ras_t), line:983:13, endln:983:19 + \_operation: , line:985:16, endln:985:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::ras_t::riscv::VLEN |vpiActual: @@ -41083,7 +41027,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::riscv::VLEN), line:1240:16, endln:1240:23 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1240:16, endln:1240:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::riscv::VLEN |vpiActual: @@ -41132,7 +41076,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::TRANS_ID_BITS), line:1241:16, endln:1241:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1241:16, endln:1241:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::TRANS_ID_BITS |vpiActual: @@ -41205,7 +41149,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1245:16, endln:1245:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1245:16, endln:1245:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -41254,7 +41198,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1246:16, endln:1246:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1246:16, endln:1246:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -41303,7 +41247,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1247:16, endln:1247:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1247:16, endln:1247:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -41560,7 +41504,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::tlb_update_t::ASID_WIDTH), line:1287:16, endln:1287:26 |vpiParent: - \_struct_typespec: (ariane_pkg::tlb_update_t), line:1282:13, endln:1282:19 + \_operation: , line:1287:16, endln:1287:28 |vpiName:ASID_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::tlb_update_t::ASID_WIDTH |vpiActual: @@ -41884,10 +41828,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -41937,10 +41882,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -41957,10 +41903,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -42002,10 +41949,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -42022,10 +41970,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -42050,10 +41999,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -42086,10 +42036,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -42122,10 +42073,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -42158,10 +42110,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -42364,7 +42317,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules), line:751:13, endln:751:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_operation: , line:751:13, endln:751:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules |vpiActual: @@ -42532,10 +42485,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -42566,23 +42520,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k), line:754:57, endln:754:58 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -42598,23 +42548,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k), line:754:85, endln:754:86 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -42631,25 +42577,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass::k), line:754:14, endln:754:15 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -42695,7 +42635,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrMaxRules), line:761:13, endln:761:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_operation: , line:761:13, endln:761:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_execute_regions::NrMaxRules |vpiActual: @@ -42863,10 +42803,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -42897,23 +42838,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k), line:764:57, endln:764:58 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -42929,23 +42866,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k), line:764:85, endln:764:86 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -42962,25 +42895,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass::k), line:764:14, endln:764:15 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -43026,7 +42953,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrMaxRules), line:770:23, endln:770:33 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_operation: , line:770:23, endln:770:35 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrMaxRules |vpiActual: @@ -43196,10 +43123,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -43230,23 +43158,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k), line:773:56, endln:773:57 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -43262,23 +43186,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k), line:773:83, endln:773:84 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -43295,25 +43215,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass::k), line:773:14, endln:773:15 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -44522,15 +44436,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiParent: @@ -44539,19 +44449,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -44669,15 +44575,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiParent: @@ -44686,19 +44588,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -44715,15 +44613,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiParent: @@ -44732,19 +44626,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -44870,15 +44760,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiParent: @@ -44887,19 +44773,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -45017,15 +44899,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiParent: @@ -45034,20 +44912,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiParent: @@ -45056,20 +44928,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiParent: @@ -45078,19 +44944,15 @@ design: (work@top) |vpiSize:64 |UINT:7 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 @@ -45105,16 +44967,14 @@ design: (work@top) |UINT:25 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -45304,15 +45164,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiParent: @@ -45321,8 +45177,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiParent: @@ -45332,16 +45186,14 @@ design: (work@top) |BIN:1 |vpiConstType:3 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -45436,21 +45288,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1401:55, endln:1401:62 @@ -45475,21 +45325,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1401:30, endln:1401:37 @@ -45537,21 +45385,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:55, endln:1402:62 @@ -45576,21 +45422,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:79, endln:1402:86 @@ -45611,7 +45455,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:93, endln:1402:100 @@ -45630,21 +45474,19 @@ design: (work@top) |UINT:8 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1402:30, endln:1402:37 @@ -45692,21 +45534,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:55, endln:1403:62 @@ -45731,21 +45571,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:79, endln:1403:86 @@ -45766,7 +45604,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:93, endln:1403:100 @@ -45785,21 +45623,19 @@ design: (work@top) |UINT:16 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1403:30, endln:1403:37 @@ -45847,21 +45683,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:55, endln:1404:62 @@ -45886,21 +45720,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:79, endln:1404:86 @@ -45921,7 +45753,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:93, endln:1404:100 @@ -45940,21 +45772,19 @@ design: (work@top) |UINT:24 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1404:30, endln:1404:37 @@ -46002,16 +45832,14 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 @@ -46026,16 +45854,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -46081,16 +45907,14 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 @@ -46105,16 +45929,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -46160,16 +45982,14 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 @@ -46184,16 +46004,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -46239,16 +46057,14 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 @@ -46263,16 +46079,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -46299,21 +46113,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1410:25, endln:1410:32 @@ -46497,16 +46309,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -46663,16 +46473,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -46877,16 +46685,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -50810,29 +50616,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:25, endln:1765:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:1765:25, endln:1765:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1765:30, endln:1765:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:1765:30, endln:1765:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -50841,29 +50645,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:54, endln:1765:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:1765:54, endln:1765:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1765:59, endln:1765:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:1765:59, endln:1765:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiOperand: @@ -51050,25 +50852,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiParent: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1772:7, endln:1773:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 + \_if_stmt: , line:1772:7, endln:1773:66 |vpiName:cfg |vpiFullName:fpnew_pkg::max_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg::i), line:1772:15, endln:1772:16 + \_ref_obj: (fpnew_pkg::max_fp_width::i), line:1772:15, endln:1772:16 |vpiParent: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiName:i - |vpiFullName:fpnew_pkg::max_fp_width::cfg::i + |vpiFullName:fpnew_pkg::max_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::max_fp_width::i), line:1771:23, endln:1771:24 - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiStmt: \_assignment: , line:1773:9, endln:1773:65 |vpiParent: @@ -51320,25 +51116,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiParent: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1781:7, endln:1782:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::min_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 + \_if_stmt: , line:1781:7, endln:1782:66 |vpiName:cfg |vpiFullName:fpnew_pkg::min_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg::i), line:1781:15, endln:1781:16 + \_ref_obj: (fpnew_pkg::min_fp_width::i), line:1781:15, endln:1781:16 |vpiParent: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiName:i - |vpiFullName:fpnew_pkg::min_fp_width::cfg::i + |vpiFullName:fpnew_pkg::min_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::min_fp_width::i), line:1780:23, endln:1780:24 - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiStmt: \_assignment: , line:1782:9, endln:1782:65 |vpiParent: @@ -51441,29 +51231,27 @@ design: (work@top) \_return_stmt: , line:1788:5, endln:1788:11 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiParent: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt), line:1788:25, endln:1788:28 + \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt), line:1788:25, endln:1788:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1787:56, endln:1787:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1788:30, endln:1788:38 + \_ref_obj: (fpnew_pkg::exp_bits::exp_bits), line:1788:30, endln:1788:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::exp_bits::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiInstance: @@ -51500,29 +51288,27 @@ design: (work@top) \_return_stmt: , line:1793:5, endln:1793:11 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiParent: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt), line:1793:25, endln:1793:28 + \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt), line:1793:25, endln:1793:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1792:56, endln:1792:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1793:30, endln:1793:38 + \_ref_obj: (fpnew_pkg::man_bits::man_bits), line:1793:30, endln:1793:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:man_bits + |vpiFullName:fpnew_pkg::man_bits::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiInstance: @@ -51586,29 +51372,27 @@ design: (work@top) \_operation: , line:1798:26, endln:1798:54 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiParent: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt), line:1798:39, endln:1798:42 + \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt), line:1798:39, endln:1798:42 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiName:fmt - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1797:52, endln:1797:55 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1798:44, endln:1798:52 + \_ref_obj: (fpnew_pkg::bias::exp_bits), line:1798:44, endln:1798:52 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::bias::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -51801,25 +51585,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiParent: - \_ref_obj: (fpnew_pkg::super_format::cfg) - |vpiParent: - \_if_stmt: , line:1805:7, endln:1808:10 - |vpiName:cfg - |vpiFullName:fpnew_pkg::super_format::cfg - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 + \_if_stmt: , line:1805:7, endln:1808:10 |vpiName:cfg |vpiFullName:fpnew_pkg::super_format::cfg + |vpiActual: + \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiIndex: - \_ref_obj: (fpnew_pkg::super_format::cfg::fmt), line:1805:15, endln:1805:18 + \_ref_obj: (fpnew_pkg::super_format::fmt), line:1805:15, endln:1805:18 |vpiParent: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiName:fmt - |vpiFullName:fpnew_pkg::super_format::cfg::fmt + |vpiFullName:fpnew_pkg::super_format::fmt |vpiActual: \_int_var: (fpnew_pkg::super_format::fmt), line:1804:23, endln:1804:26 - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiStmt: \_begin: (fpnew_pkg::super_format), line:1805:21, endln:1808:10 |vpiParent: @@ -51852,10 +51630,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (exp_bits), line:1806:46, endln:1806:54 + \_ref_obj: (fpnew_pkg::super_format::exp_bits), line:1806:46, endln:1806:54 |vpiParent: \_hier_path: (res.exp_bits), line:1806:42, endln:1806:54 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::super_format::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiArgument: @@ -51930,10 +51709,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (man_bits), line:1807:46, endln:1807:54 + \_ref_obj: (fpnew_pkg::super_format::man_bits), line:1807:46, endln:1807:54 |vpiParent: \_hier_path: (res.man_bits), line:1807:42, endln:1807:54 |vpiName:man_bits + |vpiFullName:fpnew_pkg::super_format::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiArgument: @@ -52176,25 +51956,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiParent: - \_ref_obj: (fpnew_pkg::max_int_width::cfg) - |vpiParent: - \_if_stmt: , line:1819:7, endln:1819:73 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_int_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 + \_if_stmt: , line:1819:7, endln:1819:73 |vpiName:cfg |vpiFullName:fpnew_pkg::max_int_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_int_width::cfg::ifmt), line:1819:15, endln:1819:19 + \_ref_obj: (fpnew_pkg::max_int_width::ifmt), line:1819:15, endln:1819:19 |vpiParent: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::max_int_width::cfg::ifmt + |vpiFullName:fpnew_pkg::max_int_width::ifmt |vpiActual: \_int_var: (fpnew_pkg::max_int_width::ifmt), line:1818:14, endln:1818:18 - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiStmt: \_assignment: , line:1819:22, endln:1819:72 |vpiParent: @@ -53134,25 +52908,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg) - |vpiParent: - \_operation: , line:1866:18, endln:1866:76 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 + \_operation: , line:1866:18, endln:1866:76 |vpiName:cfg |vpiFullName:fpnew_pkg::get_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg::fmt), line:1866:22, endln:1866:25 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:22, endln:1866:25 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiOperand: \_operation: , line:1866:30, endln:1866:75 |vpiParent: @@ -53204,25 +52972,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::res) - |vpiParent: - \_assignment: , line:1866:7, endln:1866:76 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 + \_assignment: , line:1866:7, endln:1866:76 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::res::fmt), line:1866:11, endln:1866:14 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:11, endln:1866:14 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiStmt: \_return_stmt: , line:1867:5, endln:1867:11 |vpiParent: @@ -53772,69 +53534,51 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 + \_operation: , line:1884:24, endln:1884:51 |vpiName:icfg |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg::ifmt), line:1884:29, endln:1884:33 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:29, endln:1884:33 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 + \_operation: , line:1884:24, endln:1884:51 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts::fmt), line:1884:47, endln:1884:50 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::fmt), line:1884:47, endln:1884:50 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::fmt), line:1881:25, endln:1881:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1884:11, endln:1884:51 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 + \_assignment: , line:1884:11, endln:1884:51 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res::ifmt), line:1884:15, endln:1884:19 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:15, endln:1884:19 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiStmt: \_return_stmt: , line:1885:5, endln:1885:11 |vpiParent: @@ -54101,25 +53845,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg) - |vpiParent: - \_operation: , line:1895:18, endln:1896:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 + \_operation: , line:1895:18, endln:1896:66 |vpiName:cfg |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg::fmt), line:1895:22, endln:1895:25 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:22, endln:1895:25 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiOperand: \_operation: , line:1895:31, endln:1896:65 |vpiParent: @@ -54181,25 +53919,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS) - |vpiParent: - \_operation: , line:1896:31, endln:1896:64 - |vpiName:CPK_FORMATS - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 + \_operation: , line:1896:31, endln:1896:64 |vpiName:CPK_FORMATS |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS + |vpiActual: + \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt), line:1896:43, endln:1896:46 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1896:43, endln:1896:46 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiOperand: \_operation: , line:1896:52, endln:1896:63 |vpiParent: @@ -54224,25 +53956,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res) - |vpiParent: - \_assignment: , line:1895:7, endln:1896:66 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 + \_assignment: , line:1895:7, endln:1896:66 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res::fmt), line:1895:11, endln:1895:14 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:11, endln:1895:14 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiStmt: \_return_stmt: , line:1897:5, endln:1897:11 |vpiParent: @@ -54744,47 +54470,35 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 + \_operation: , line:1913:22, endln:1913:49 |vpiName:icfg |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt), line:1913:27, endln:1913:31 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:27, endln:1913:31 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 + \_operation: , line:1913:22, endln:1913:49 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt), line:1913:45, endln:1913:48 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1913:45, endln:1913:48 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1911:25, endln:1911:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiOperand: \_operation: , line:1914:23, endln:1914:84 |vpiParent: @@ -54837,25 +54551,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1913:9, endln:1914:85 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 + \_assignment: , line:1913:9, endln:1914:85 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res::ifmt), line:1913:13, endln:1913:17 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:13, endln:1913:17 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiStmt: \_return_stmt: , line:1915:5, endln:1915:11 |vpiParent: @@ -55016,25 +54724,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1921:11, endln:1921:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 + \_operation: , line:1921:11, endln:1921:39 |vpiName:cfg |vpiFullName:fpnew_pkg::any_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg::i), line:1921:15, endln:1921:16 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:15, endln:1921:16 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiOperand: \_operation: , line:1921:21, endln:1921:39 |vpiParent: @@ -55043,25 +54745,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types) - |vpiParent: - \_operation: , line:1921:21, endln:1921:39 - |vpiName:types - |vpiFullName:fpnew_pkg::any_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 + \_operation: , line:1921:21, endln:1921:39 |vpiName:types |vpiFullName:fpnew_pkg::any_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1919:63, endln:1919:68 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types::i), line:1921:27, endln:1921:28 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:27, endln:1921:28 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::types::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 |vpiOperand: \_ref_obj: (fpnew_pkg::any_enabled_multi::MERGED), line:1921:33, endln:1921:39 |vpiParent: @@ -55255,25 +54951,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1931:11, endln:1931:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 + \_operation: , line:1931:11, endln:1931:39 |vpiName:cfg |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg::i), line:1931:15, endln:1931:16 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:15, endln:1931:16 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiOperand: \_operation: , line:1931:21, endln:1931:39 |vpiParent: @@ -55282,25 +54972,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1931:21, endln:1931:39 - |vpiName:types - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 + \_operation: , line:1931:21, endln:1931:39 |vpiName:types |vpiFullName:fpnew_pkg::is_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1928:68, endln:1928:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types::i), line:1931:27, endln:1931:28 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:27, endln:1931:28 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 |vpiOperand: \_ref_obj: (fpnew_pkg::is_first_enabled_multi::MERGED), line:1931:33, endln:1931:39 |vpiParent: @@ -55499,25 +55183,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1939:11, endln:1939:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 + \_operation: , line:1939:11, endln:1939:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg::i), line:1939:15, endln:1939:16 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:15, endln:1939:16 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiOperand: \_operation: , line:1939:21, endln:1939:39 |vpiParent: @@ -55526,25 +55204,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1939:21, endln:1939:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 + \_operation: , line:1939:21, endln:1939:39 |vpiName:types |vpiFullName:fpnew_pkg::get_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1937:75, endln:1937:80 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types::i), line:1939:27, endln:1939:28 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:27, endln:1939:28 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 |vpiOperand: \_ref_obj: (fpnew_pkg::get_first_enabled_multi::MERGED), line:1939:33, endln:1939:39 |vpiParent: @@ -55843,25 +55515,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg) - |vpiParent: - \_operation: , line:1950:11, endln:1950:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 + \_operation: , line:1950:11, endln:1950:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg::i), line:1950:15, endln:1950:16 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:15, endln:1950:16 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiOperand: \_operation: , line:1950:21, endln:1950:39 |vpiParent: @@ -55870,25 +55536,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types) - |vpiParent: - \_operation: , line:1950:21, endln:1950:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_num_regs_multi::types - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 + \_operation: , line:1950:21, endln:1950:39 |vpiName:types |vpiFullName:fpnew_pkg::get_num_regs_multi::types + |vpiActual: + \_io_decl: (types), line:1946:71, endln:1946:76 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types::i), line:1950:27, endln:1950:28 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:27, endln:1950:28 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::types::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 |vpiOperand: \_ref_obj: (fpnew_pkg::get_num_regs_multi::MERGED), line:1950:33, endln:1950:39 |vpiParent: @@ -55918,25 +55578,19 @@ design: (work@top) |vpiArgument: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs) - |vpiParent: - \_func_call: (maximum), line:1950:47, endln:1950:68 - |vpiName:regs - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 + \_func_call: (maximum), line:1950:47, endln:1950:68 |vpiName:regs |vpiFullName:fpnew_pkg::get_num_regs_multi::regs + |vpiActual: + \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs::i), line:1950:65, endln:1950:66 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:65, endln:1950:66 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiName:maximum |vpiFunction: \_function: (fpnew_pkg::maximum), line:1756:3, endln:1758:14 @@ -65661,15 +65315,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:17, endln:563:24 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:21, endln:563:23 |vpiParent: @@ -65678,19 +65328,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:26, endln:563:35 + \_part_select: imm (riscv::jal::imm), line:563:26, endln:563:35 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:26, endln:563:29 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:30, endln:563:32 @@ -65707,15 +65353,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:37, endln:563:44 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:41, endln:563:43 |vpiParent: @@ -65724,19 +65366,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:46, endln:563:56 + \_part_select: imm (riscv::jal::imm), line:563:46, endln:563:56 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:46, endln:563:49 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:50, endln:563:52 @@ -65894,16 +65532,14 @@ design: (work@top) \_return_stmt: , line:568:9, endln:568:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:568:17, endln:568:29 + \_part_select: offset (riscv::jalr::offset), line:568:17, endln:568:29 |vpiParent: - \_ref_obj: offset (riscv::jalr::offset), line:568:17, endln:568:23 - |vpiParent: - \_operation: , line:568:16, endln:568:52 - |vpiName:offset - |vpiFullName:riscv::jalr::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:566:87, endln:566:93 + \_operation: , line:568:16, endln:568:52 + |vpiName:offset + |vpiFullName:riscv::jalr::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:566:87, endln:566:93 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:568:24, endln:568:26 @@ -66077,16 +65713,14 @@ design: (work@top) \_return_stmt: , line:573:9, endln:573:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:573:17, endln:573:26 + \_part_select: imm (riscv::andi::imm), line:573:17, endln:573:26 |vpiParent: - \_ref_obj: imm (riscv::andi::imm), line:573:17, endln:573:20 - |vpiParent: - \_operation: , line:573:16, endln:573:49 - |vpiName:imm - |vpiFullName:riscv::andi::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:571:87, endln:571:90 + \_operation: , line:573:16, endln:573:49 + |vpiName:imm + |vpiFullName:riscv::andi::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:571:87, endln:571:90 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:573:21, endln:573:23 @@ -66268,16 +65902,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:578:23, endln:578:33 + \_part_select: shamt (riscv::slli::shamt), line:578:23, endln:578:33 |vpiParent: - \_ref_obj: shamt (riscv::slli::shamt), line:578:23, endln:578:28 - |vpiParent: - \_operation: , line:578:16, endln:578:56 - |vpiName:shamt - |vpiFullName:riscv::slli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:576:86, endln:576:91 + \_operation: , line:578:16, endln:578:56 + |vpiName:shamt + |vpiFullName:riscv::slli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:576:86, endln:576:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:578:29, endln:578:30 @@ -66459,16 +66091,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:583:23, endln:583:33 + \_part_select: shamt (riscv::srli::shamt), line:583:23, endln:583:33 |vpiParent: - \_ref_obj: shamt (riscv::srli::shamt), line:583:23, endln:583:28 - |vpiParent: - \_operation: , line:583:16, endln:583:56 - |vpiName:shamt - |vpiFullName:riscv::srli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:581:86, endln:581:91 + \_operation: , line:583:16, endln:583:56 + |vpiName:shamt + |vpiFullName:riscv::srli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:581:86, endln:581:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:583:29, endln:583:30 @@ -66670,16 +66300,14 @@ design: (work@top) \_return_stmt: , line:588:9, endln:588:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:588:17, endln:588:29 + \_part_select: offset (riscv::load::offset), line:588:17, endln:588:29 |vpiParent: - \_ref_obj: offset (riscv::load::offset), line:588:17, endln:588:23 - |vpiParent: - \_operation: , line:588:16, endln:588:55 - |vpiName:offset - |vpiFullName:riscv::load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:586:108, endln:586:114 + \_operation: , line:588:16, endln:588:55 + |vpiName:offset + |vpiFullName:riscv::load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:586:108, endln:586:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:588:24, endln:588:26 @@ -66827,15 +66455,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:17, endln:593:24 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:21, endln:593:23 |vpiParent: @@ -66844,19 +66468,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:26, endln:593:35 + \_part_select: imm (riscv::auipc::imm), line:593:26, endln:593:35 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:26, endln:593:29 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:30, endln:593:32 @@ -66873,15 +66493,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:37, endln:593:44 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:41, endln:593:43 |vpiParent: @@ -66890,19 +66506,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:46, endln:593:56 + \_part_select: imm (riscv::auipc::imm), line:593:46, endln:593:56 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:46, endln:593:49 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:50, endln:593:52 @@ -67088,16 +66700,14 @@ design: (work@top) \_return_stmt: , line:598:9, endln:598:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:598:17, endln:598:29 + \_part_select: offset (riscv::store::offset), line:598:17, endln:598:29 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:17, endln:598:23 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:24, endln:598:26 @@ -67136,16 +66746,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:596:56, endln:596:60 |vpiOperand: - \_part_select: , line:598:48, endln:598:59 + \_part_select: offset (riscv::store::offset), line:598:48, endln:598:59 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:48, endln:598:54 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:55, endln:598:56 @@ -67323,16 +66931,14 @@ design: (work@top) \_return_stmt: , line:603:9, endln:603:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:603:17, endln:603:29 + \_part_select: offset (riscv::float_load::offset), line:603:17, endln:603:29 |vpiParent: - \_ref_obj: offset (riscv::float_load::offset), line:603:17, endln:603:23 - |vpiParent: - \_operation: , line:603:16, endln:603:62 - |vpiName:offset - |vpiFullName:riscv::float_load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:601:114, endln:601:120 + \_operation: , line:603:16, endln:603:62 + |vpiName:offset + |vpiFullName:riscv::float_load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:601:114, endln:601:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:603:24, endln:603:26 @@ -67534,16 +67140,14 @@ design: (work@top) \_return_stmt: , line:608:9, endln:608:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:608:17, endln:608:29 + \_part_select: offset (riscv::float_store::offset), line:608:17, endln:608:29 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:17, endln:608:23 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:24, endln:608:26 @@ -67582,16 +67186,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:606:62, endln:606:66 |vpiOperand: - \_part_select: , line:608:48, endln:608:59 + \_part_select: offset (riscv::float_store::offset), line:608:48, endln:608:59 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:48, endln:608:54 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:55, endln:608:56 @@ -68247,16 +67849,14 @@ design: (work@top) \_if_else: , line:642:9, endln:646:12 |vpiOpType:15 |vpiOperand: - \_part_select: , line:642:13, endln:642:23 + \_part_select: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:23 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:18 - |vpiParent: - \_operation: , line:642:13, endln:642:32 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_operation: , line:642:13, endln:642:32 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:642:19, endln:642:20 @@ -68302,16 +67902,14 @@ design: (work@top) |STRING:(0x%h) |vpiConstType:6 |vpiArgument: - \_part_select: , line:643:44, endln:643:55 + \_part_select: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:55 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:49 - |vpiParent: - \_sys_func_call: ($sformatf), line:643:24, endln:643:56 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_sys_func_call: ($sformatf), line:643:24, endln:643:56 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:643:50, endln:643:52 @@ -74783,10 +74381,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -74836,10 +74435,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -74856,10 +74456,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -74901,10 +74502,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -74921,10 +74523,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -74949,10 +74552,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -74985,10 +74589,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -75021,10 +74626,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -75057,10 +74663,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -75263,7 +74870,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules), line:751:13, endln:751:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_operation: , line:751:13, endln:751:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules |vpiActual: @@ -75431,10 +75038,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -75465,23 +75073,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k), line:754:57, endln:754:58 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -75497,23 +75101,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k), line:754:85, endln:754:86 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -75530,25 +75130,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass::k), line:754:14, endln:754:15 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -75594,7 +75188,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrMaxRules), line:761:13, endln:761:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_operation: , line:761:13, endln:761:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_execute_regions::NrMaxRules |vpiActual: @@ -75762,10 +75356,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -75796,23 +75391,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k), line:764:57, endln:764:58 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -75828,23 +75419,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k), line:764:85, endln:764:86 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -75861,25 +75448,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass::k), line:764:14, endln:764:15 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -75925,7 +75506,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrMaxRules), line:770:23, endln:770:33 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_operation: , line:770:23, endln:770:35 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrMaxRules |vpiActual: @@ -76095,10 +75676,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -76129,23 +75711,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k), line:773:56, endln:773:57 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -76161,23 +75739,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k), line:773:83, endln:773:84 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -76194,25 +75768,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass::k), line:773:14, endln:773:15 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -77421,15 +76989,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiParent: @@ -77438,19 +77002,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -77573,15 +77133,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiParent: @@ -77590,19 +77146,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -77619,15 +77171,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiParent: @@ -77636,19 +77184,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -77779,15 +77323,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiParent: @@ -77796,19 +77336,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -77931,15 +77467,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiParent: @@ -77948,20 +77480,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiParent: @@ -77970,20 +77496,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiParent: @@ -77992,19 +77512,15 @@ design: (work@top) |vpiSize:64 |UINT:7 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 @@ -78019,16 +77535,14 @@ design: (work@top) |UINT:25 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -78218,15 +77732,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiParent: @@ -78235,8 +77745,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiParent: @@ -78246,16 +77754,14 @@ design: (work@top) |BIN:1 |vpiConstType:3 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -78350,21 +77856,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -78393,21 +77897,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -78459,21 +77961,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -78502,21 +78002,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -78541,7 +78039,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 @@ -78564,21 +78062,19 @@ design: (work@top) |UINT:8 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -78630,21 +78126,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -78673,21 +78167,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -78712,7 +78204,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 @@ -78735,21 +78227,19 @@ design: (work@top) |UINT:16 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -78801,21 +78291,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -78844,21 +78332,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -78883,7 +78369,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 @@ -78906,21 +78392,19 @@ design: (work@top) |UINT:24 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -78972,16 +78456,14 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 @@ -78996,16 +78478,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -79051,16 +78531,14 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 @@ -79075,16 +78553,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -79130,16 +78606,14 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 @@ -79154,16 +78628,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -79209,16 +78681,14 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 @@ -79233,16 +78703,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -79269,21 +78737,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -79471,16 +78937,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -79637,16 +79101,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -79851,16 +79313,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -82962,29 +82422,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:25, endln:1765:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:1765:25, endln:1765:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1765:30, endln:1765:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:1765:30, endln:1765:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -82993,29 +82451,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:54, endln:1765:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:1765:54, endln:1765:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1765:59, endln:1765:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:1765:59, endln:1765:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiOperand: @@ -83189,25 +82645,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiParent: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1772:7, endln:1773:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 + \_if_stmt: , line:1772:7, endln:1773:66 |vpiName:cfg |vpiFullName:fpnew_pkg::max_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg::i), line:1772:15, endln:1772:16 + \_ref_obj: (fpnew_pkg::max_fp_width::i), line:1772:15, endln:1772:16 |vpiParent: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiName:i - |vpiFullName:fpnew_pkg::max_fp_width::cfg::i + |vpiFullName:fpnew_pkg::max_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::max_fp_width::i), line:1771:23, endln:1771:24 - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiStmt: \_assignment: , line:1773:9, endln:1773:65 |vpiParent: @@ -83446,25 +82896,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiParent: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1781:7, endln:1782:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::min_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 + \_if_stmt: , line:1781:7, endln:1782:66 |vpiName:cfg |vpiFullName:fpnew_pkg::min_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg::i), line:1781:15, endln:1781:16 + \_ref_obj: (fpnew_pkg::min_fp_width::i), line:1781:15, endln:1781:16 |vpiParent: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiName:i - |vpiFullName:fpnew_pkg::min_fp_width::cfg::i + |vpiFullName:fpnew_pkg::min_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::min_fp_width::i), line:1780:23, endln:1780:24 - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiStmt: \_assignment: , line:1782:9, endln:1782:65 |vpiParent: @@ -83567,29 +83011,27 @@ design: (work@top) \_return_stmt: , line:1788:5, endln:1788:11 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiParent: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt), line:1788:25, endln:1788:28 + \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt), line:1788:25, endln:1788:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1787:56, endln:1787:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1788:30, endln:1788:38 + \_ref_obj: (fpnew_pkg::exp_bits::exp_bits), line:1788:30, endln:1788:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::exp_bits::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiInstance: @@ -83626,29 +83068,27 @@ design: (work@top) \_return_stmt: , line:1793:5, endln:1793:11 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiParent: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt), line:1793:25, endln:1793:28 + \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt), line:1793:25, endln:1793:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1792:56, endln:1792:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1793:30, endln:1793:38 + \_ref_obj: (fpnew_pkg::man_bits::man_bits), line:1793:30, endln:1793:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:man_bits + |vpiFullName:fpnew_pkg::man_bits::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiInstance: @@ -83712,29 +83152,27 @@ design: (work@top) \_operation: , line:1798:26, endln:1798:54 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiParent: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt), line:1798:39, endln:1798:42 + \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt), line:1798:39, endln:1798:42 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiName:fmt - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1797:52, endln:1797:55 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1798:44, endln:1798:52 + \_ref_obj: (fpnew_pkg::bias::exp_bits), line:1798:44, endln:1798:52 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::bias::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -83914,25 +83352,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiParent: - \_ref_obj: (fpnew_pkg::super_format::cfg) - |vpiParent: - \_if_stmt: , line:1805:7, endln:1808:10 - |vpiName:cfg - |vpiFullName:fpnew_pkg::super_format::cfg - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 + \_if_stmt: , line:1805:7, endln:1808:10 |vpiName:cfg |vpiFullName:fpnew_pkg::super_format::cfg + |vpiActual: + \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiIndex: - \_ref_obj: (fpnew_pkg::super_format::cfg::fmt), line:1805:15, endln:1805:18 + \_ref_obj: (fpnew_pkg::super_format::fmt), line:1805:15, endln:1805:18 |vpiParent: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiName:fmt - |vpiFullName:fpnew_pkg::super_format::cfg::fmt + |vpiFullName:fpnew_pkg::super_format::fmt |vpiActual: \_int_var: (fpnew_pkg::super_format::fmt), line:1804:23, endln:1804:26 - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiStmt: \_begin: (fpnew_pkg::super_format), line:1805:21, endln:1808:10 |vpiParent: @@ -83965,10 +83397,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (exp_bits), line:1806:46, endln:1806:54 + \_ref_obj: (fpnew_pkg::super_format::exp_bits), line:1806:46, endln:1806:54 |vpiParent: \_hier_path: (res.exp_bits), line:1806:42, endln:1806:54 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::super_format::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiArgument: @@ -84043,10 +83476,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (man_bits), line:1807:46, endln:1807:54 + \_ref_obj: (fpnew_pkg::super_format::man_bits), line:1807:46, endln:1807:54 |vpiParent: \_hier_path: (res.man_bits), line:1807:42, endln:1807:54 |vpiName:man_bits + |vpiFullName:fpnew_pkg::super_format::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiArgument: @@ -84276,25 +83710,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiParent: - \_ref_obj: (fpnew_pkg::max_int_width::cfg) - |vpiParent: - \_if_stmt: , line:1819:7, endln:1819:73 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_int_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 + \_if_stmt: , line:1819:7, endln:1819:73 |vpiName:cfg |vpiFullName:fpnew_pkg::max_int_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_int_width::cfg::ifmt), line:1819:15, endln:1819:19 + \_ref_obj: (fpnew_pkg::max_int_width::ifmt), line:1819:15, endln:1819:19 |vpiParent: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::max_int_width::cfg::ifmt + |vpiFullName:fpnew_pkg::max_int_width::ifmt |vpiActual: \_int_var: (fpnew_pkg::max_int_width::ifmt), line:1818:14, endln:1818:18 - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiStmt: \_assignment: , line:1819:22, endln:1819:72 |vpiParent: @@ -85182,25 +84610,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg) - |vpiParent: - \_operation: , line:1866:18, endln:1866:76 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 + \_operation: , line:1866:18, endln:1866:76 |vpiName:cfg |vpiFullName:fpnew_pkg::get_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg::fmt), line:1866:22, endln:1866:25 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:22, endln:1866:25 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiOperand: \_operation: , line:1866:30, endln:1866:75 |vpiParent: @@ -85252,25 +84674,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::res) - |vpiParent: - \_assignment: , line:1866:7, endln:1866:76 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 + \_assignment: , line:1866:7, endln:1866:76 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::res::fmt), line:1866:11, endln:1866:14 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:11, endln:1866:14 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiStmt: \_return_stmt: , line:1867:5, endln:1867:11 |vpiParent: @@ -85755,69 +85171,51 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 + \_operation: , line:1884:24, endln:1884:51 |vpiName:icfg |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg::ifmt), line:1884:29, endln:1884:33 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:29, endln:1884:33 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 + \_operation: , line:1884:24, endln:1884:51 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts::fmt), line:1884:47, endln:1884:50 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::fmt), line:1884:47, endln:1884:50 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::fmt), line:1881:25, endln:1881:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1884:11, endln:1884:51 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 + \_assignment: , line:1884:11, endln:1884:51 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res::ifmt), line:1884:15, endln:1884:19 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:15, endln:1884:19 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiStmt: \_return_stmt: , line:1885:5, endln:1885:11 |vpiParent: @@ -86045,25 +85443,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg) - |vpiParent: - \_operation: , line:1895:18, endln:1896:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 + \_operation: , line:1895:18, endln:1896:66 |vpiName:cfg |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg::fmt), line:1895:22, endln:1895:25 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:22, endln:1895:25 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiOperand: \_operation: , line:1895:31, endln:1896:65 |vpiParent: @@ -86125,25 +85517,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS) - |vpiParent: - \_operation: , line:1896:31, endln:1896:64 - |vpiName:CPK_FORMATS - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 + \_operation: , line:1896:31, endln:1896:64 |vpiName:CPK_FORMATS |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS + |vpiActual: + \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt), line:1896:43, endln:1896:46 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1896:43, endln:1896:46 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiOperand: \_operation: , line:1896:52, endln:1896:63 |vpiParent: @@ -86168,25 +85554,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res) - |vpiParent: - \_assignment: , line:1895:7, endln:1896:66 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 + \_assignment: , line:1895:7, endln:1896:66 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res::fmt), line:1895:11, endln:1895:14 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:11, endln:1895:14 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiStmt: \_return_stmt: , line:1897:5, endln:1897:11 |vpiParent: @@ -86623,47 +86003,35 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 + \_operation: , line:1913:22, endln:1913:49 |vpiName:icfg |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt), line:1913:27, endln:1913:31 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:27, endln:1913:31 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 + \_operation: , line:1913:22, endln:1913:49 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt), line:1913:45, endln:1913:48 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1913:45, endln:1913:48 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1911:25, endln:1911:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiOperand: \_operation: , line:1914:23, endln:1914:84 |vpiParent: @@ -86716,25 +86084,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1913:9, endln:1914:85 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 + \_assignment: , line:1913:9, endln:1914:85 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res::ifmt), line:1913:13, endln:1913:17 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:13, endln:1913:17 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiStmt: \_return_stmt: , line:1915:5, endln:1915:11 |vpiParent: @@ -86882,25 +86244,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1921:11, endln:1921:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 + \_operation: , line:1921:11, endln:1921:39 |vpiName:cfg |vpiFullName:fpnew_pkg::any_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg::i), line:1921:15, endln:1921:16 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:15, endln:1921:16 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiOperand: \_operation: , line:1921:21, endln:1921:39 |vpiParent: @@ -86909,25 +86265,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types) - |vpiParent: - \_operation: , line:1921:21, endln:1921:39 - |vpiName:types - |vpiFullName:fpnew_pkg::any_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 + \_operation: , line:1921:21, endln:1921:39 |vpiName:types |vpiFullName:fpnew_pkg::any_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1919:63, endln:1919:68 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types::i), line:1921:27, endln:1921:28 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:27, endln:1921:28 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::types::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 |vpiOperand: \_ref_obj: (fpnew_pkg::any_enabled_multi::MERGED), line:1921:33, endln:1921:39 |vpiParent: @@ -87108,25 +86458,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1931:11, endln:1931:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 + \_operation: , line:1931:11, endln:1931:39 |vpiName:cfg |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg::i), line:1931:15, endln:1931:16 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:15, endln:1931:16 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiOperand: \_operation: , line:1931:21, endln:1931:39 |vpiParent: @@ -87135,25 +86479,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1931:21, endln:1931:39 - |vpiName:types - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 + \_operation: , line:1931:21, endln:1931:39 |vpiName:types |vpiFullName:fpnew_pkg::is_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1928:68, endln:1928:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types::i), line:1931:27, endln:1931:28 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:27, endln:1931:28 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 |vpiOperand: \_ref_obj: (fpnew_pkg::is_first_enabled_multi::MERGED), line:1931:33, endln:1931:39 |vpiParent: @@ -87339,25 +86677,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1939:11, endln:1939:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 + \_operation: , line:1939:11, endln:1939:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg::i), line:1939:15, endln:1939:16 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:15, endln:1939:16 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiOperand: \_operation: , line:1939:21, endln:1939:39 |vpiParent: @@ -87366,25 +86698,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1939:21, endln:1939:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 + \_operation: , line:1939:21, endln:1939:39 |vpiName:types |vpiFullName:fpnew_pkg::get_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1937:75, endln:1937:80 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types::i), line:1939:27, endln:1939:28 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:27, endln:1939:28 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 |vpiOperand: \_ref_obj: (fpnew_pkg::get_first_enabled_multi::MERGED), line:1939:33, endln:1939:39 |vpiParent: @@ -87657,25 +86983,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg) - |vpiParent: - \_operation: , line:1950:11, endln:1950:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 + \_operation: , line:1950:11, endln:1950:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg::i), line:1950:15, endln:1950:16 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:15, endln:1950:16 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiOperand: \_operation: , line:1950:21, endln:1950:39 |vpiParent: @@ -87684,25 +87004,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types) - |vpiParent: - \_operation: , line:1950:21, endln:1950:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_num_regs_multi::types - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 + \_operation: , line:1950:21, endln:1950:39 |vpiName:types |vpiFullName:fpnew_pkg::get_num_regs_multi::types + |vpiActual: + \_io_decl: (types), line:1946:71, endln:1946:76 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types::i), line:1950:27, endln:1950:28 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:27, endln:1950:28 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::types::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 |vpiOperand: \_ref_obj: (fpnew_pkg::get_num_regs_multi::MERGED), line:1950:33, endln:1950:39 |vpiParent: @@ -87732,25 +87046,19 @@ design: (work@top) |vpiArgument: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs) - |vpiParent: - \_func_call: (maximum), line:1950:47, endln:1950:68 - |vpiName:regs - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 + \_func_call: (maximum), line:1950:47, endln:1950:68 |vpiName:regs |vpiFullName:fpnew_pkg::get_num_regs_multi::regs + |vpiActual: + \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs::i), line:1950:65, endln:1950:66 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:65, endln:1950:66 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiName:maximum |vpiFunction: \_function: (fpnew_pkg::maximum), line:1756:3, endln:1758:14 @@ -92887,7 +92195,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:734:16, endln:734:32 |vpiName:Cfg.RASDepth |vpiActual: \_ref_obj: (Cfg), line:734:16, endln:734:19 @@ -92897,10 +92205,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiOperand: \_constant: , line:734:31, endln:734:32 |vpiStmt: @@ -92915,7 +92224,7 @@ design: (work@top) |vpiOperand: \_operation: , line:735:16, endln:735:41 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:735:16, endln:735:60 |vpiOpType:43 |vpiOperand: \_constant: , line:735:16, endln:735:17 @@ -92936,10 +92245,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiName:$clog2 |vpiOperand: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 @@ -92954,10 +92264,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiStmt: \_immediate_assert: , line:736:9, endln:736:62 |vpiParent: @@ -92970,7 +92281,7 @@ design: (work@top) |vpiOperand: \_operation: , line:736:16, endln:736:41 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:736:16, endln:736:60 |vpiOpType:43 |vpiOperand: \_constant: , line:736:16, endln:736:17 @@ -92991,10 +92302,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiName:$clog2 |vpiOperand: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 @@ -93009,10 +92321,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiStmt: \_immediate_assert: , line:737:9, endln:737:56 |vpiParent: @@ -93025,7 +92338,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:737:16, endln:737:54 |vpiName:Cfg.NrNonIdempotentRules |vpiActual: \_ref_obj: (Cfg), line:737:16, endln:737:19 @@ -93035,10 +92348,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:737:44, endln:737:54 |vpiParent: @@ -93059,7 +92373,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:738:16, endln:738:54 |vpiName:Cfg.NrExecuteRegionRules |vpiActual: \_ref_obj: (Cfg), line:738:16, endln:738:19 @@ -93069,10 +92383,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:738:44, endln:738:54 |vpiParent: @@ -93093,7 +92408,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:739:16, endln:739:54 |vpiName:Cfg.NrCachedRegionRules |vpiActual: \_ref_obj: (Cfg), line:739:16, endln:739:19 @@ -93103,10 +92418,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:739:44, endln:739:54 |vpiParent: @@ -93127,7 +92443,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:740:16, endln:740:38 |vpiName:Cfg.NrPMPEntries |vpiActual: \_ref_obj: (Cfg), line:740:16, endln:740:19 @@ -93137,10 +92453,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiOperand: \_constant: , line:740:36, endln:740:38 |vpiInstance: @@ -93185,12 +92502,12 @@ design: (work@top) |vpiOperand: \_operation: , line:747:15, endln:747:30 |vpiParent: - \_function: (ariane_pkg::range_check), line:745:5, endln:748:30 + \_operation: , line:747:14, endln:747:57 |vpiOpType:19 |vpiOperand: \_ref_obj: (ariane_pkg::range_check::address), line:747:15, endln:747:22 |vpiParent: - \_function: (ariane_pkg::range_check), line:745:5, endln:748:30 + \_operation: , line:747:15, endln:747:30 |vpiName:address |vpiFullName:ariane_pkg::range_check::address |vpiActual: @@ -93211,7 +92528,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::range_check::address), line:747:36, endln:747:43 |vpiParent: - \_operation: , line:747:14, endln:747:57 + \_operation: , line:747:36, endln:747:56 |vpiName:address |vpiFullName:ariane_pkg::range_check::address |vpiActual: @@ -93224,7 +92541,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::range_check::base), line:747:47, endln:747:51 |vpiParent: - \_operation: , line:747:36, endln:747:56 + \_operation: , line:747:47, endln:747:55 |vpiName:base |vpiFullName:ariane_pkg::range_check::base |vpiActual: @@ -93284,8 +92601,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:752:14, endln:752:16 - |vpiParent: - \_assignment: , line:752:7, endln:752:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -93293,7 +92608,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:752:7, endln:752:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_assignment: , line:752:7, endln:752:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass |vpiActual: @@ -93356,10 +92671,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiStmt: \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 |vpiParent: @@ -93390,17 +92706,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + \_func_call: (range_check), line:754:19, endln:754:97 |vpiName:NonIdempotentAddrBase |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:57, endln:754:58 |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -93420,17 +92732,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + \_func_call: (range_check), line:754:19, endln:754:97 |vpiName:NonIdempotentLength |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:85, endln:754:86 |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -93449,17 +92757,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -93528,8 +92834,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:762:14, endln:762:16 - |vpiParent: - \_assignment: , line:762:7, endln:762:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -93537,7 +92841,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass), line:762:7, endln:762:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_assignment: , line:762:7, endln:762:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass |vpiActual: @@ -93600,10 +92904,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 |vpiParent: @@ -93634,17 +92939,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + \_func_call: (range_check), line:764:19, endln:764:97 |vpiName:ExecuteRegionAddrBase |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:57, endln:764:58 |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 + \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -93664,17 +92965,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + \_func_call: (range_check), line:764:19, endln:764:97 |vpiName:ExecuteRegionLength |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:85, endln:764:86 |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 + \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -93693,17 +92990,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 + \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -93773,8 +93068,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:771:14, endln:771:16 - |vpiParent: - \_assignment: , line:771:7, endln:771:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -93782,7 +93075,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass), line:771:7, endln:771:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_assignment: , line:771:7, endln:771:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass |vpiActual: @@ -93845,10 +93138,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 |vpiParent: @@ -93879,17 +93173,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + \_func_call: (range_check), line:773:19, endln:773:95 |vpiName:CachedRegionAddrBase |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:56, endln:773:57 |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -93909,17 +93199,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + \_func_call: (range_check), line:773:19, endln:773:95 |vpiName:CachedRegionLength |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:83, endln:773:84 |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -93938,17 +93224,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -94843,24 +94127,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand + \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand + \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -94908,24 +94190,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -94934,24 +94214,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -95001,24 +94279,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i + \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -95066,62 +94342,56 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -95195,23 +94465,24 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (addr), line:1398:64, endln:1398:68 - |vpiName:addr - |vpiDefName:addr + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -95267,22 +94538,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1401:49, endln:1401:72 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -95291,19 +94562,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -95326,22 +94597,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1402:49, endln:1402:108 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -95350,19 +94621,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -95371,26 +94642,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -95413,22 +94684,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1403:49, endln:1403:109 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -95437,19 +94708,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -95458,26 +94729,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -95500,22 +94771,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1404:49, endln:1404:109 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -95524,19 +94795,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -95545,26 +94816,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -95587,31 +94858,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1405:32, endln:1405:57 |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 + \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1405:21, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1405:21, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -95620,7 +94891,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1405:21, endln:1405:29 |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 + \_assignment: , line:1405:21, endln:1405:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -95640,31 +94911,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1406:32, endln:1406:57 |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 + \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1406:21, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1406:21, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -95673,7 +94944,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1406:21, endln:1406:29 |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 + \_assignment: , line:1406:21, endln:1406:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -95693,31 +94964,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1407:32, endln:1407:57 |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 + \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1407:21, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1407:21, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -95726,7 +94997,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1407:21, endln:1407:29 |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 + \_assignment: , line:1407:21, endln:1407:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -95746,31 +95017,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1408:32, endln:1408:56 |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 + \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1408:21, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1408:21, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -95779,7 +95050,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1408:21, endln:1408:29 |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 + \_assignment: , line:1408:21, endln:1408:56 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -95789,19 +95060,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_begin: (ariane_pkg::data_align) + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -95885,14 +95156,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -95975,14 +95246,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -96089,14 +95360,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -102349,7 +101620,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FP_WIDTH), line:1974:35, endln:1974:43 |vpiParent: - \_operation: , line:1974:9, endln:1974:52 + \_operation: , line:1974:35, endln:1974:51 |vpiName:FP_WIDTH |vpiOperand: \_ref_obj: (WIDTH), line:1974:46, endln:1974:51 @@ -102375,17 +101646,13 @@ design: (work@top) |vpiLhs: \_bit_select: (is_boxed), line:1981:14, endln:1981:27 |vpiParent: - \_ref_obj: (is_boxed) - |vpiParent: - \_cont_assign: , line:1981:14, endln:1981:32 - |vpiName:is_boxed + \_cont_assign: , line:1981:14, endln:1981:32 |vpiName:is_boxed |vpiIndex: - \_ref_obj: (is_boxed.fmt), line:1981:23, endln:1981:26 + \_ref_obj: (fmt), line:1981:23, endln:1981:26 |vpiParent: \_bit_select: (is_boxed), line:1981:14, endln:1981:27 |vpiName:fmt - |vpiFullName:is_boxed.fmt |uhdmallModules: \_module_inst: work@fpu_wrap (work@fpu_wrap), file:${SURELOG_DIR}/tests/ArianeElab/dut.sv, line:1990:1, endln:2023:10 |vpiParent: @@ -107326,7 +106593,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:1998:23, endln:1998:28 |vpiParent: - \_operation: , line:1993:53, endln:1999:6 + \_operation: , line:1998:23, endln:1998:35 |vpiName:XFVEC |vpiOperand: \_ref_obj: (XF8), line:1998:32, endln:1998:35 @@ -107341,7 +106608,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:1998:37, endln:1998:42 |vpiParent: - \_operation: , line:1993:53, endln:1999:6 + \_operation: , line:1998:37, endln:1998:63 |vpiName:XFVEC |vpiOperand: \_operation: , line:1998:47, endln:1998:62 @@ -107351,7 +106618,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16), line:1998:47, endln:1998:51 |vpiParent: - \_operation: , line:1998:37, endln:1998:63 + \_operation: , line:1998:47, endln:1998:62 |vpiName:XF16 |vpiOperand: \_ref_obj: (XF16ALT), line:1998:55, endln:1998:62 @@ -111530,10 +110797,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -111571,10 +110839,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -111591,10 +110860,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -111630,10 +110900,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -111650,10 +110921,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -111678,10 +110950,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -111691,7 +110964,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -111714,10 +110987,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -111727,7 +111001,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -111750,10 +111024,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -111763,7 +111038,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -111786,10 +111061,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -112023,10 +111299,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -112057,23 +111334,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -112089,23 +111362,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -112122,25 +111391,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -112287,10 +111550,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -112321,23 +111585,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -112353,23 +111613,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -112386,25 +111642,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -112553,10 +111803,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -112587,23 +111838,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -112619,23 +111866,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -112652,25 +111895,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -112856,7 +112093,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -113058,7 +112295,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -113271,7 +112508,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -113416,7 +112653,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -113731,30 +112968,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -113804,30 +113033,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -113836,30 +113057,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -113911,30 +113124,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -113984,78 +113189,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -114145,32 +113328,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -114241,21 +113416,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -114264,21 +113437,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -114304,21 +113475,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -114327,21 +113496,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -114350,28 +113517,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -114397,21 +113562,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -114420,21 +113583,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -114443,28 +113604,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -114490,21 +113649,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -114513,21 +113670,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -114536,28 +113691,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -114583,32 +113736,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -114640,32 +113789,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -114697,32 +113842,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -114754,32 +113895,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -114798,21 +113935,19 @@ design: (work@top) |vpiParent: \_begin: (work@top.i_ariane.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -114900,16 +114035,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -114992,16 +114125,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -115108,16 +114239,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -119621,10 +118750,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -119662,10 +118792,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -119682,10 +118813,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -119721,10 +118853,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -119741,10 +118874,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -119769,10 +118903,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -119782,7 +118917,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -119805,10 +118940,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -119818,7 +118954,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -119841,10 +118977,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -119854,7 +118991,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -119877,10 +119014,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -120114,10 +119252,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -120148,23 +119287,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -120180,23 +119315,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -120213,25 +119344,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -120378,10 +119503,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -120412,23 +119538,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -120444,23 +119566,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -120477,25 +119595,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -120644,10 +119756,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -120678,23 +119791,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -120710,23 +119819,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -120743,25 +119848,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -120947,7 +120046,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -121149,7 +120248,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -121362,7 +120461,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -121507,7 +120606,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -121822,30 +120921,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -121895,30 +120986,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -121927,30 +121010,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -122002,30 +121077,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -122075,78 +121142,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -122236,32 +121281,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -122332,21 +121369,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -122355,21 +121390,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -122395,21 +121428,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -122418,21 +121449,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -122441,28 +121470,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -122488,21 +121515,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -122511,21 +121536,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -122534,28 +121557,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -122581,21 +121602,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -122604,21 +121623,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -122627,28 +121644,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -122674,32 +121689,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -122731,32 +121742,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -122788,32 +121795,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -122845,32 +121848,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -122889,21 +121888,19 @@ design: (work@top) |vpiParent: \_begin: (work@top.i_ariane.ex_stage_i.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -122991,16 +121988,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -123083,16 +122078,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -123199,16 +122192,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -127294,10 +126285,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -127335,10 +126327,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -127355,10 +126348,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -127394,10 +126388,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -127414,10 +126409,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -127442,10 +126438,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -127455,7 +126452,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -127478,10 +126475,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -127491,7 +126489,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -127514,10 +126512,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -127527,7 +126526,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -127550,10 +126549,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -127728,7 +126728,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions), line:753:7, endln:753:10 |vpiParent: @@ -127760,7 +126760,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiCondition: \_operation: , line:753:32, endln:753:60 |vpiParent: @@ -127773,7 +126773,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiOperand: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiParent: @@ -127787,10 +126787,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -127821,25 +126822,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiParent: @@ -127853,25 +126850,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.address), line:754:89, endln:754:96 |vpiParent: @@ -127886,25 +126879,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -127921,7 +126908,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab/dut.sv, line:2035:13, endln:2050:15 |vpiTaskFunc: @@ -127992,7 +126979,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions), line:763:7, endln:763:10 |vpiParent: @@ -128024,7 +127011,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiCondition: \_operation: , line:763:32, endln:763:60 |vpiParent: @@ -128037,7 +127024,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiOperand: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiParent: @@ -128051,10 +127038,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -128085,25 +127073,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiParent: @@ -128117,25 +127101,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.address), line:764:89, endln:764:96 |vpiParent: @@ -128150,25 +127130,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -128185,7 +127159,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab/dut.sv, line:2035:13, endln:2050:15 |vpiTaskFunc: @@ -128258,7 +127232,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions), line:772:7, endln:772:10 |vpiParent: @@ -128290,7 +127264,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiCondition: \_operation: , line:772:32, endln:772:59 |vpiParent: @@ -128303,7 +127277,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiOperand: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiParent: @@ -128317,10 +127291,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -128351,25 +127326,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiParent: @@ -128383,25 +127354,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.address), line:773:87, endln:773:94 |vpiParent: @@ -128416,25 +127383,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -128451,7 +127412,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab/dut.sv, line:2035:13, endln:2050:15 |vpiTaskFunc: @@ -128620,7 +127581,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -128822,7 +127783,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -129035,7 +127996,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -129180,7 +128141,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -129495,30 +128456,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -129568,30 +128521,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -129600,30 +128545,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -129675,30 +128612,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -129748,78 +128677,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -129909,32 +128816,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -129986,7 +128885,7 @@ design: (work@top) |vpiName:addr_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr_tmp), line:1398:21, endln:1398:29 + \_logic_var: (ariane_pkg::data_align::addr_tmp), line:1398:21, endln:1398:29 |vpiCaseItem: \_case_item: , line:1401:13, endln:1401:73 |vpiParent: @@ -130005,21 +128904,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -130028,21 +128925,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -130068,21 +128963,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -130091,21 +128984,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -130114,28 +129005,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -130161,21 +129050,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -130184,21 +129071,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -130207,28 +129092,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -130254,21 +129137,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -130277,21 +129158,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -130300,28 +129179,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -130347,32 +129224,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -130385,7 +129258,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1406:13, endln:1406:58 |vpiParent: @@ -130404,32 +129277,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -130442,7 +129311,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1407:13, endln:1407:58 |vpiParent: @@ -130461,32 +129330,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -130499,7 +129364,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1408:13, endln:1408:57 |vpiParent: @@ -130518,32 +129383,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -130556,27 +129417,25 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiStmt: \_return_stmt: , line:1410:9, endln:1410:15 |vpiParent: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -130664,16 +129523,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -130756,16 +129613,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -130872,16 +129727,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -135079,7 +133932,7 @@ design: (work@top) |vpiOperand: \_constant: , line:1996:22, endln:1996:26 |vpiParent: - \_operation: , line:2015:25, endln:2015:37 + \_operation: , line:1974:9, endln:1974:52 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -136292,18 +135145,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -136324,7 +135176,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[0].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -136428,18 +135280,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -136460,7 +135311,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[1].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -136564,18 +135415,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -136596,7 +135446,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[0].check.operands[2].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -136714,19 +135564,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed), line:1981:14, endln:1981:27 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed) - |vpiParent: - \_cont_assign: , line:1981:14, endln:1981:32 - |vpiName:is_boxed - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed + \_cont_assign: , line:1981:14, endln:1981:32 |vpiName:is_boxed |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed.fmt), line:1981:23, endln:1981:26 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.fmt), line:1981:23, endln:1981:26 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed), line:1981:14, endln:1981:27 |vpiName:fmt - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.is_boxed.fmt + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].no_check.fmt |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[1].fmt), line:1971:0 |vpiGenScopeArray: @@ -136850,18 +135696,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -136882,7 +135727,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[0].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -136986,18 +135831,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137018,7 +135862,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[1].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137122,18 +135966,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137154,7 +135997,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[2].check.operands[2].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137318,18 +136161,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137350,7 +136192,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[0].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137454,18 +136296,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137486,7 +136327,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[1].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137590,18 +136431,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137622,7 +136462,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[3].check.operands[2].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137786,18 +136626,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137818,7 +136657,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[0].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -137922,18 +136761,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -137954,7 +136792,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[1].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -138058,18 +136896,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].op), line:1975:0 |vpiIndex: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i) - |vpiParent: - \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i), line:1977:38, endln:1977:70 - |vpiName:operands_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i + \_var_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i), line:1977:38, endln:1977:70 + |vpiName:operands_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i + |vpiDefName:operands_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1977:53, endln:1977:60 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i.WIDTH), line:1977:53, endln:1977:58 @@ -138090,7 +136927,7 @@ design: (work@top) |vpiRightRange: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i.FP_WIDTH), line:1977:61, endln:1977:69 |vpiParent: - \_part_select: , line:1977:53, endln:1977:69 + \_part_select: operands_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i), line:1977:53, endln:1977:69 |vpiName:FP_WIDTH |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_nanbox_check[4].check.operands[2].operands_i.operands_i.FP_WIDTH |vpiActual: @@ -138141,4 +136978,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/ArianeElab/dut.sv | ${SURELOG_DIR}/build/regression/ArianeElab/roundtrip/dut_000.sv | 387 | 2074 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ArianeElab/dut.sv | ${SURELOG_DIR}/build/regression/ArianeElab/roundtrip/dut_000.sv | 406 | 2074 | \ No newline at end of file diff --git a/tests/ArianeElab2/ArianeElab2.log b/tests/ArianeElab2/ArianeElab2.log index f56f1cee5b..d3359999fb 100644 --- a/tests/ArianeElab2/ArianeElab2.log +++ b/tests/ArianeElab2/ArianeElab2.log @@ -20893,7 +20893,7 @@ part_select 92 port 42 range 92750 ref_module 12 -ref_obj 2257 +ref_obj 1775 ref_var 2 return_stmt 212 string_typespec 29592 @@ -20955,7 +20955,7 @@ part_select 334 port 84 range 92750 ref_module 12 -ref_obj 6402 +ref_obj 4209 ref_var 2 return_stmt 684 string_typespec 29592 @@ -24864,7 +24864,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (VLEN), line:28:45, endln:28:49 |vpiParent: - \_operation: , line:28:29, endln:28:56 + \_operation: , line:28:45, endln:28:52 |vpiName:VLEN |vpiActual: \_parameter: (riscv::VLEN), line:19:16, endln:19:20 @@ -26136,7 +26136,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:299:60, endln:299:64 |vpiParent: - \_operation: , line:299:54, endln:299:67 + \_operation: , line:299:60, endln:299:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -26185,7 +26185,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:300:60, endln:300:64 |vpiParent: - \_operation: , line:300:54, endln:300:67 + \_operation: , line:300:60, endln:300:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -26234,7 +26234,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:301:60, endln:301:64 |vpiParent: - \_operation: , line:301:54, endln:301:67 + \_operation: , line:301:60, endln:301:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -26283,7 +26283,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:302:60, endln:302:64 |vpiParent: - \_operation: , line:302:54, endln:302:67 + \_operation: , line:302:60, endln:302:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -26332,7 +26332,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:303:60, endln:303:64 |vpiParent: - \_operation: , line:303:54, endln:303:67 + \_operation: , line:303:60, endln:303:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -26381,7 +26381,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XLEN), line:304:60, endln:304:64 |vpiParent: - \_operation: , line:304:54, endln:304:67 + \_operation: , line:304:60, endln:304:66 |vpiName:XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -30829,12 +30829,12 @@ design: (work@top) |vpiOperand: \_operation: , line:254:16, endln:254:23 |vpiParent: - \_struct_typespec: (riscv::pte_t), line:252:13, endln:252:19 + \_operation: , line:254:16, endln:254:25 |vpiOpType:11 |vpiOperand: \_ref_obj: (riscv::riscv::pte_t::PLEN), line:254:16, endln:254:20 |vpiParent: - \_struct_typespec: (riscv::pte_t), line:252:13, endln:252:19 + \_operation: , line:254:16, endln:254:23 |vpiName:PLEN |vpiFullName:riscv::riscv::pte_t::PLEN |vpiActual: @@ -31071,7 +31071,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::ModeW), line:83:16, endln:83:21 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:83:16, endln:83:23 |vpiName:ModeW |vpiFullName:riscv::riscv::satp_t::ModeW |vpiActual: @@ -31120,7 +31120,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::ASIDW), line:84:16, endln:84:21 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:84:16, endln:84:23 |vpiName:ASIDW |vpiFullName:riscv::riscv::satp_t::ASIDW |vpiActual: @@ -31169,7 +31169,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::riscv::satp_t::PPNW), line:85:16, endln:85:20 |vpiParent: - \_struct_typespec: (riscv::satp_t), line:82:13, endln:82:19 + \_operation: , line:85:16, endln:85:22 |vpiName:PPNW |vpiFullName:riscv::riscv::satp_t::PPNW |vpiActual: @@ -31871,15 +31871,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:17, endln:563:24 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:21, endln:563:23 |vpiParent: @@ -31888,19 +31884,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:26, endln:563:35 + \_part_select: imm (riscv::jal::imm), line:563:26, endln:563:35 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:26, endln:563:29 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:30, endln:563:32 @@ -31917,15 +31909,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:37, endln:563:44 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:41, endln:563:43 |vpiParent: @@ -31934,19 +31922,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:46, endln:563:56 + \_part_select: imm (riscv::jal::imm), line:563:46, endln:563:56 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:46, endln:563:49 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:50, endln:563:52 @@ -32104,16 +32088,14 @@ design: (work@top) \_return_stmt: , line:568:9, endln:568:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:568:17, endln:568:29 + \_part_select: offset (riscv::jalr::offset), line:568:17, endln:568:29 |vpiParent: - \_ref_obj: offset (riscv::jalr::offset), line:568:17, endln:568:23 - |vpiParent: - \_operation: , line:568:16, endln:568:52 - |vpiName:offset - |vpiFullName:riscv::jalr::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:566:87, endln:566:93 + \_operation: , line:568:16, endln:568:52 + |vpiName:offset + |vpiFullName:riscv::jalr::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:566:87, endln:566:93 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:568:24, endln:568:26 @@ -32287,16 +32269,14 @@ design: (work@top) \_return_stmt: , line:573:9, endln:573:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:573:17, endln:573:26 + \_part_select: imm (riscv::andi::imm), line:573:17, endln:573:26 |vpiParent: - \_ref_obj: imm (riscv::andi::imm), line:573:17, endln:573:20 - |vpiParent: - \_operation: , line:573:16, endln:573:49 - |vpiName:imm - |vpiFullName:riscv::andi::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:571:87, endln:571:90 + \_operation: , line:573:16, endln:573:49 + |vpiName:imm + |vpiFullName:riscv::andi::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:571:87, endln:571:90 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:573:21, endln:573:23 @@ -32478,16 +32458,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:578:23, endln:578:33 + \_part_select: shamt (riscv::slli::shamt), line:578:23, endln:578:33 |vpiParent: - \_ref_obj: shamt (riscv::slli::shamt), line:578:23, endln:578:28 - |vpiParent: - \_operation: , line:578:16, endln:578:56 - |vpiName:shamt - |vpiFullName:riscv::slli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:576:86, endln:576:91 + \_operation: , line:578:16, endln:578:56 + |vpiName:shamt + |vpiFullName:riscv::slli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:576:86, endln:576:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:578:29, endln:578:30 @@ -32669,16 +32647,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:583:23, endln:583:33 + \_part_select: shamt (riscv::srli::shamt), line:583:23, endln:583:33 |vpiParent: - \_ref_obj: shamt (riscv::srli::shamt), line:583:23, endln:583:28 - |vpiParent: - \_operation: , line:583:16, endln:583:56 - |vpiName:shamt - |vpiFullName:riscv::srli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:581:86, endln:581:91 + \_operation: , line:583:16, endln:583:56 + |vpiName:shamt + |vpiFullName:riscv::srli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:581:86, endln:581:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:583:29, endln:583:30 @@ -32880,16 +32856,14 @@ design: (work@top) \_return_stmt: , line:588:9, endln:588:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:588:17, endln:588:29 + \_part_select: offset (riscv::load::offset), line:588:17, endln:588:29 |vpiParent: - \_ref_obj: offset (riscv::load::offset), line:588:17, endln:588:23 - |vpiParent: - \_operation: , line:588:16, endln:588:55 - |vpiName:offset - |vpiFullName:riscv::load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:586:108, endln:586:114 + \_operation: , line:588:16, endln:588:55 + |vpiName:offset + |vpiFullName:riscv::load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:586:108, endln:586:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:588:24, endln:588:26 @@ -33037,15 +33011,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:17, endln:593:24 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:21, endln:593:23 |vpiParent: @@ -33054,19 +33024,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:26, endln:593:35 + \_part_select: imm (riscv::auipc::imm), line:593:26, endln:593:35 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:26, endln:593:29 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:30, endln:593:32 @@ -33083,15 +33049,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:37, endln:593:44 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:41, endln:593:43 |vpiParent: @@ -33100,19 +33062,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:46, endln:593:56 + \_part_select: imm (riscv::auipc::imm), line:593:46, endln:593:56 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:46, endln:593:49 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:50, endln:593:52 @@ -33298,16 +33256,14 @@ design: (work@top) \_return_stmt: , line:598:9, endln:598:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:598:17, endln:598:29 + \_part_select: offset (riscv::store::offset), line:598:17, endln:598:29 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:17, endln:598:23 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:24, endln:598:26 @@ -33346,16 +33302,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:596:56, endln:596:60 |vpiOperand: - \_part_select: , line:598:48, endln:598:59 + \_part_select: offset (riscv::store::offset), line:598:48, endln:598:59 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:48, endln:598:54 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:55, endln:598:56 @@ -33533,16 +33487,14 @@ design: (work@top) \_return_stmt: , line:603:9, endln:603:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:603:17, endln:603:29 + \_part_select: offset (riscv::float_load::offset), line:603:17, endln:603:29 |vpiParent: - \_ref_obj: offset (riscv::float_load::offset), line:603:17, endln:603:23 - |vpiParent: - \_operation: , line:603:16, endln:603:62 - |vpiName:offset - |vpiFullName:riscv::float_load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:601:114, endln:601:120 + \_operation: , line:603:16, endln:603:62 + |vpiName:offset + |vpiFullName:riscv::float_load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:601:114, endln:601:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:603:24, endln:603:26 @@ -33744,16 +33696,14 @@ design: (work@top) \_return_stmt: , line:608:9, endln:608:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:608:17, endln:608:29 + \_part_select: offset (riscv::float_store::offset), line:608:17, endln:608:29 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:17, endln:608:23 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:24, endln:608:26 @@ -33792,16 +33742,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:606:62, endln:606:66 |vpiOperand: - \_part_select: , line:608:48, endln:608:59 + \_part_select: offset (riscv::float_store::offset), line:608:48, endln:608:59 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:48, endln:608:54 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:55, endln:608:56 @@ -34457,16 +34405,14 @@ design: (work@top) \_if_else: , line:642:9, endln:646:12 |vpiOpType:15 |vpiOperand: - \_part_select: , line:642:13, endln:642:23 + \_part_select: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:23 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:18 - |vpiParent: - \_operation: , line:642:13, endln:642:32 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_operation: , line:642:13, endln:642:32 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:642:19, endln:642:20 @@ -34512,16 +34458,14 @@ design: (work@top) |STRING:(0x%h) |vpiConstType:6 |vpiArgument: - \_part_select: , line:643:44, endln:643:55 + \_part_select: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:55 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:49 - |vpiParent: - \_sys_func_call: ($sformatf), line:643:24, endln:643:56 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_sys_func_call: ($sformatf), line:643:24, endln:643:56 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:643:50, endln:643:52 @@ -34961,7 +34905,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:690:14, endln:690:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:690:14, endln:690:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -35030,7 +34974,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:691:14, endln:691:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:691:14, endln:691:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -35115,7 +35059,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:693:14, endln:693:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:693:14, endln:693:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -35184,7 +35128,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:694:14, endln:694:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:694:14, endln:694:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -35269,7 +35213,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:696:14, endln:696:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:696:14, endln:696:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -35338,7 +35282,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules), line:697:14, endln:697:24 |vpiParent: - \_struct_typespec: (ariane_pkg::ariane_cfg_t), line:684:13, endln:684:19 + \_operation: , line:697:14, endln:697:26 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::ariane_pkg::ariane_cfg_t::NrMaxRules |vpiActual: @@ -36995,7 +36939,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVF), line:840:26, endln:840:29 |vpiParent: - \_operation: , line:839:26, endln:844:27 + \_operation: , line:840:26, endln:844:27 |vpiName:RVF |vpiActual: \_parameter: (ariane_pkg::RVF), line:813:20, endln:813:23 @@ -37015,7 +36959,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16), line:841:26, endln:841:30 |vpiParent: - \_operation: , line:840:26, endln:844:27 + \_operation: , line:841:26, endln:844:27 |vpiName:XF16 |vpiActual: \_parameter: (ariane_pkg::XF16), line:819:20, endln:819:24 @@ -37035,7 +36979,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16ALT), line:842:26, endln:842:33 |vpiParent: - \_operation: , line:841:26, endln:844:27 + \_operation: , line:842:26, endln:844:27 |vpiName:XF16ALT |vpiActual: \_parameter: (ariane_pkg::XF16ALT), line:820:20, endln:820:27 @@ -37055,7 +36999,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF8), line:843:26, endln:843:29 |vpiParent: - \_operation: , line:842:26, endln:844:27 + \_operation: , line:843:26, endln:844:27 |vpiName:XF8 |vpiActual: \_parameter: (ariane_pkg::XF8), line:821:20, endln:821:23 @@ -37158,7 +37102,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:848:51, endln:848:55 |vpiParent: - \_operation: , line:848:33, endln:848:58 + \_operation: , line:848:51, endln:848:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -37206,7 +37150,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:849:51, endln:849:55 |vpiParent: - \_operation: , line:849:33, endln:849:58 + \_operation: , line:849:51, endln:849:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -37254,7 +37198,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:850:51, endln:850:55 |vpiParent: - \_operation: , line:850:33, endln:850:58 + \_operation: , line:850:51, endln:850:58 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -37302,7 +37246,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FLEN), line:851:51, endln:851:55 |vpiParent: - \_operation: , line:851:33, endln:851:57 + \_operation: , line:851:51, endln:851:57 |vpiName:FLEN |vpiActual: \_parameter: (ariane_pkg::FLEN), line:839:16, endln:839:20 @@ -37470,7 +37414,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVD), line:859:41, endln:859:44 |vpiParent: - \_operation: , line:857:41, endln:859:51 + \_operation: , line:859:41, endln:859:50 |vpiName:RVD |vpiActual: \_parameter: (ariane_pkg::RVD), line:814:20, endln:814:23 @@ -37490,7 +37434,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (RVF), line:860:41, endln:860:44 |vpiParent: - \_operation: , line:857:41, endln:860:51 + \_operation: , line:860:41, endln:860:50 |vpiName:RVF |vpiActual: \_parameter: (ariane_pkg::RVF), line:813:20, endln:813:23 @@ -37615,7 +37559,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (NSX), line:866:41, endln:866:44 |vpiParent: - \_operation: , line:857:41, endln:866:51 + \_operation: , line:866:41, endln:866:50 |vpiName:NSX |vpiActual: \_parameter: (ariane_pkg::NSX), line:846:20, endln:846:23 @@ -37635,17 +37579,17 @@ design: (work@top) |vpiOperand: \_operation: , line:867:42, endln:867:67 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:41, endln:867:85 |vpiOpType:32 |vpiOperand: \_operation: , line:867:42, endln:867:59 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:42, endln:867:67 |vpiOpType:14 |vpiOperand: \_ref_obj: (riscv::XLEN), line:867:42, endln:867:49 |vpiParent: - \_operation: , line:857:41, endln:867:86 + \_operation: , line:867:42, endln:867:59 |vpiName:riscv::XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -37681,7 +37625,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (riscv::XLEN), line:867:72, endln:867:79 |vpiParent: - \_operation: , line:867:41, endln:867:85 + \_operation: , line:867:72, endln:867:85 |vpiName:riscv::XLEN |vpiActual: \_parameter: (riscv::XLEN), line:15:16, endln:15:20 @@ -38227,7 +38171,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (CONFIG_L1I_SIZE), line:1071:57, endln:1071:72 |vpiParent: - \_sys_func_call: ($clog2), line:1071:50, endln:1071:92 + \_operation: , line:1071:57, endln:1071:91 |vpiName:CONFIG_L1I_SIZE |vpiActual: \_parameter: (ariane_pkg::CONFIG_L1I_SIZE), line:1069:27, endln:1069:42 @@ -38331,7 +38275,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (CONFIG_L1D_SIZE), line:1077:57, endln:1077:72 |vpiParent: - \_sys_func_call: ($clog2), line:1077:50, endln:1077:92 + \_operation: , line:1077:57, endln:1077:91 |vpiName:CONFIG_L1D_SIZE |vpiActual: \_parameter: (ariane_pkg::CONFIG_L1D_SIZE), line:1075:27, endln:1075:42 @@ -38802,7 +38746,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bht_update_t::riscv::VLEN), line:990:16, endln:990:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bht_update_t), line:988:13, endln:988:19 + \_operation: , line:990:16, endln:990:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bht_update_t::riscv::VLEN |vpiActual: @@ -38891,7 +38835,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN), line:957:16, endln:957:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bp_resolve_t), line:955:13, endln:955:19 + \_operation: , line:957:16, endln:957:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN |vpiActual: @@ -38940,7 +38884,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN), line:958:16, endln:958:23 |vpiParent: - \_struct_typespec: (ariane_pkg::bp_resolve_t), line:955:13, endln:955:19 + \_operation: , line:958:16, endln:958:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::bp_resolve_t::riscv::VLEN |vpiActual: @@ -39110,7 +39054,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::branchpredict_sbe_t::riscv::VLEN), line:969:16, endln:969:23 |vpiParent: - \_struct_typespec: (ariane_pkg::branchpredict_sbe_t), line:967:13, endln:967:19 + \_operation: , line:969:16, endln:969:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::branchpredict_sbe_t::riscv::VLEN |vpiActual: @@ -39183,7 +39127,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_prediction_t::riscv::VLEN), line:980:16, endln:980:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_prediction_t), line:978:13, endln:978:19 + \_operation: , line:980:16, endln:980:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_prediction_t::riscv::VLEN |vpiActual: @@ -39256,7 +39200,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN), line:974:16, endln:974:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_update_t), line:972:13, endln:972:19 + \_operation: , line:974:16, endln:974:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN |vpiActual: @@ -39305,7 +39249,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN), line:975:16, endln:975:23 |vpiParent: - \_struct_typespec: (ariane_pkg::btb_update_t), line:972:13, endln:972:19 + \_operation: , line:975:16, endln:975:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::btb_update_t::riscv::VLEN |vpiActual: @@ -39364,7 +39308,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_INDEX_WIDTH), line:1353:16, endln:1353:34 |vpiParent: - \_struct_typespec: (ariane_pkg::dcache_req_i_t), line:1352:13, endln:1352:19 + \_operation: , line:1353:16, endln:1353:36 |vpiName:DCACHE_INDEX_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_INDEX_WIDTH |vpiActual: @@ -39413,7 +39357,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_TAG_WIDTH), line:1354:16, endln:1354:32 |vpiParent: - \_struct_typespec: (ariane_pkg::dcache_req_i_t), line:1352:13, endln:1352:19 + \_operation: , line:1354:16, endln:1354:34 |vpiName:DCACHE_TAG_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::dcache_req_i_t::DCACHE_TAG_WIDTH |vpiActual: @@ -39766,7 +39710,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::fetch_entry_t::riscv::VLEN), line:1230:16, endln:1230:23 |vpiParent: - \_struct_typespec: (ariane_pkg::fetch_entry_t), line:1229:13, endln:1229:19 + \_operation: , line:1230:16, endln:1230:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::fetch_entry_t::riscv::VLEN |vpiActual: @@ -40830,7 +40774,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::fu_data_t::TRANS_ID_BITS), line:1129:16, endln:1129:29 |vpiParent: - \_struct_typespec: (ariane_pkg::fu_data_t), line:1123:13, endln:1123:19 + \_operation: , line:1129:16, endln:1129:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::fu_data_t::TRANS_ID_BITS |vpiActual: @@ -40907,7 +40851,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_areq_i_t::riscv::PLEN), line:1307:16, endln:1307:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_areq_i_t), line:1305:13, endln:1305:19 + \_operation: , line:1307:16, endln:1307:29 |vpiName:riscv::PLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_areq_i_t::riscv::PLEN |vpiActual: @@ -40992,7 +40936,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_areq_o_t::riscv::VLEN), line:1313:16, endln:1313:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_areq_o_t), line:1311:13, endln:1311:19 + \_operation: , line:1313:16, endln:1313:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_areq_o_t::riscv::VLEN |vpiActual: @@ -41113,7 +41057,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_i_t::riscv::VLEN), line:1322:16, endln:1322:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_i_t), line:1317:13, endln:1317:19 + \_operation: , line:1322:16, endln:1322:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_i_t::riscv::VLEN |vpiActual: @@ -41202,7 +41146,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_o_t::FETCH_WIDTH), line:1328:16, endln:1328:27 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_o_t), line:1325:13, endln:1325:19 + \_operation: , line:1328:16, endln:1328:29 |vpiName:FETCH_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_o_t::FETCH_WIDTH |vpiActual: @@ -41251,7 +41195,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::icache_dreq_o_t::riscv::VLEN), line:1329:16, endln:1329:23 |vpiParent: - \_struct_typespec: (ariane_pkg::icache_dreq_o_t), line:1325:13, endln:1325:19 + \_operation: , line:1329:16, endln:1329:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::icache_dreq_o_t::riscv::VLEN |vpiActual: @@ -41412,7 +41356,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::lsu_ctrl_t::riscv::VLEN), line:1216:16, endln:1216:23 |vpiParent: - \_struct_typespec: (ariane_pkg::lsu_ctrl_t), line:1214:13, endln:1214:19 + \_operation: , line:1216:16, endln:1216:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::lsu_ctrl_t::riscv::VLEN |vpiActual: @@ -41573,7 +41517,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::lsu_ctrl_t::TRANS_ID_BITS), line:1222:16, endln:1222:29 |vpiParent: - \_struct_typespec: (ariane_pkg::lsu_ctrl_t), line:1214:13, endln:1214:19 + \_operation: , line:1222:16, endln:1222:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::lsu_ctrl_t::TRANS_ID_BITS |vpiActual: @@ -41646,7 +41590,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::ras_t::riscv::VLEN), line:985:16, endln:985:23 |vpiParent: - \_struct_typespec: (ariane_pkg::ras_t), line:983:13, endln:983:19 + \_operation: , line:985:16, endln:985:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::ras_t::riscv::VLEN |vpiActual: @@ -41703,7 +41647,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::riscv::VLEN), line:1240:16, endln:1240:23 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1240:16, endln:1240:29 |vpiName:riscv::VLEN |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::riscv::VLEN |vpiActual: @@ -41752,7 +41696,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::TRANS_ID_BITS), line:1241:16, endln:1241:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1241:16, endln:1241:31 |vpiName:TRANS_ID_BITS |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::TRANS_ID_BITS |vpiActual: @@ -41825,7 +41769,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1245:16, endln:1245:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1245:16, endln:1245:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -41874,7 +41818,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1246:16, endln:1246:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1246:16, endln:1246:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -41923,7 +41867,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE), line:1247:16, endln:1247:29 |vpiParent: - \_struct_typespec: (ariane_pkg::scoreboard_entry_t), line:1239:13, endln:1239:19 + \_operation: , line:1247:16, endln:1247:31 |vpiName:REG_ADDR_SIZE |vpiFullName:ariane_pkg::ariane_pkg::scoreboard_entry_t::REG_ADDR_SIZE |vpiActual: @@ -42180,7 +42124,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::ariane_pkg::tlb_update_t::ASID_WIDTH), line:1287:16, endln:1287:26 |vpiParent: - \_struct_typespec: (ariane_pkg::tlb_update_t), line:1282:13, endln:1282:19 + \_operation: , line:1287:16, endln:1287:28 |vpiName:ASID_WIDTH |vpiFullName:ariane_pkg::ariane_pkg::tlb_update_t::ASID_WIDTH |vpiActual: @@ -42504,10 +42448,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -42557,10 +42502,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -42577,10 +42523,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -42622,10 +42569,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -42642,10 +42590,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -42670,10 +42619,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -42706,10 +42656,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -42742,10 +42693,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -42778,10 +42730,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -42984,7 +42937,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules), line:751:13, endln:751:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_operation: , line:751:13, endln:751:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules |vpiActual: @@ -43152,10 +43105,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -43186,23 +43140,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k), line:754:57, endln:754:58 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -43218,23 +43168,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k), line:754:85, endln:754:86 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -43251,25 +43197,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass::k), line:754:14, endln:754:15 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -43315,7 +43255,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrMaxRules), line:761:13, endln:761:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_operation: , line:761:13, endln:761:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_execute_regions::NrMaxRules |vpiActual: @@ -43483,10 +43423,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -43517,23 +43458,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k), line:764:57, endln:764:58 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -43549,23 +43486,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k), line:764:85, endln:764:86 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -43582,25 +43515,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass::k), line:764:14, endln:764:15 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -43646,7 +43573,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrMaxRules), line:770:23, endln:770:33 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_operation: , line:770:23, endln:770:35 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrMaxRules |vpiActual: @@ -43816,10 +43743,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -43850,23 +43778,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k), line:773:56, endln:773:57 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -43882,23 +43806,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k), line:773:83, endln:773:84 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -43915,25 +43835,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass::k), line:773:14, endln:773:15 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -45142,15 +45056,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiParent: @@ -45159,19 +45069,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -45289,15 +45195,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiParent: @@ -45306,19 +45208,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -45335,15 +45233,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiParent: @@ -45352,19 +45246,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -45490,15 +45380,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiParent: @@ -45507,19 +45393,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -45637,15 +45519,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiParent: @@ -45654,20 +45532,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiParent: @@ -45676,20 +45548,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiParent: @@ -45698,19 +45564,15 @@ design: (work@top) |vpiSize:64 |UINT:7 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 @@ -45725,16 +45587,14 @@ design: (work@top) |UINT:25 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -45924,15 +45784,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiParent: @@ -45941,8 +45797,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiParent: @@ -45952,16 +45806,14 @@ design: (work@top) |BIN:1 |vpiConstType:3 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -46056,21 +45908,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1401:55, endln:1401:62 @@ -46095,21 +45945,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1401:30, endln:1401:37 @@ -46157,21 +46005,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:55, endln:1402:62 @@ -46196,21 +46042,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:79, endln:1402:86 @@ -46231,7 +46075,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1402:93, endln:1402:100 @@ -46250,21 +46094,19 @@ design: (work@top) |UINT:8 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1402:30, endln:1402:37 @@ -46312,21 +46154,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:55, endln:1403:62 @@ -46351,21 +46191,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:79, endln:1403:86 @@ -46386,7 +46224,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1403:93, endln:1403:100 @@ -46405,21 +46243,19 @@ design: (work@top) |UINT:16 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1403:30, endln:1403:37 @@ -46467,21 +46303,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:55, endln:1404:62 @@ -46506,21 +46340,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:79, endln:1404:86 @@ -46541,7 +46373,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data::riscv::XLEN), line:1404:93, endln:1404:100 @@ -46560,21 +46392,19 @@ design: (work@top) |UINT:24 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1404:30, endln:1404:37 @@ -46622,16 +46452,14 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 @@ -46646,16 +46474,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -46701,16 +46527,14 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 @@ -46725,16 +46549,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -46780,16 +46602,14 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 @@ -46804,16 +46624,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -46859,16 +46677,14 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 @@ -46883,16 +46699,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -46919,21 +46733,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_ref_obj: (ariane_pkg::data_align::data_tmp::riscv::XLEN), line:1410:25, endln:1410:32 @@ -47117,16 +46929,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -47283,16 +47093,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -47497,16 +47305,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -51430,29 +51236,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:25, endln:1765:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:1765:25, endln:1765:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1765:30, endln:1765:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:1765:30, endln:1765:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -51461,29 +51265,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:54, endln:1765:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:1765:54, endln:1765:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1765:59, endln:1765:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:1765:59, endln:1765:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiOperand: @@ -51670,25 +51472,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiParent: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1772:7, endln:1773:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 + \_if_stmt: , line:1772:7, endln:1773:66 |vpiName:cfg |vpiFullName:fpnew_pkg::max_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg::i), line:1772:15, endln:1772:16 + \_ref_obj: (fpnew_pkg::max_fp_width::i), line:1772:15, endln:1772:16 |vpiParent: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiName:i - |vpiFullName:fpnew_pkg::max_fp_width::cfg::i + |vpiFullName:fpnew_pkg::max_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::max_fp_width::i), line:1771:23, endln:1771:24 - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiStmt: \_assignment: , line:1773:9, endln:1773:65 |vpiParent: @@ -51940,25 +51736,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiParent: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1781:7, endln:1782:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::min_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 + \_if_stmt: , line:1781:7, endln:1782:66 |vpiName:cfg |vpiFullName:fpnew_pkg::min_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg::i), line:1781:15, endln:1781:16 + \_ref_obj: (fpnew_pkg::min_fp_width::i), line:1781:15, endln:1781:16 |vpiParent: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiName:i - |vpiFullName:fpnew_pkg::min_fp_width::cfg::i + |vpiFullName:fpnew_pkg::min_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::min_fp_width::i), line:1780:23, endln:1780:24 - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiStmt: \_assignment: , line:1782:9, endln:1782:65 |vpiParent: @@ -52061,29 +51851,27 @@ design: (work@top) \_return_stmt: , line:1788:5, endln:1788:11 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiParent: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt), line:1788:25, endln:1788:28 + \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt), line:1788:25, endln:1788:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1787:56, endln:1787:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1788:30, endln:1788:38 + \_ref_obj: (fpnew_pkg::exp_bits::exp_bits), line:1788:30, endln:1788:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::exp_bits::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiInstance: @@ -52120,29 +51908,27 @@ design: (work@top) \_return_stmt: , line:1793:5, endln:1793:11 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiParent: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt), line:1793:25, endln:1793:28 + \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt), line:1793:25, endln:1793:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1792:56, endln:1792:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1793:30, endln:1793:38 + \_ref_obj: (fpnew_pkg::man_bits::man_bits), line:1793:30, endln:1793:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:man_bits + |vpiFullName:fpnew_pkg::man_bits::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiInstance: @@ -52206,29 +51992,27 @@ design: (work@top) \_operation: , line:1798:26, endln:1798:54 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiParent: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt), line:1798:39, endln:1798:42 + \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt), line:1798:39, endln:1798:42 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiName:fmt - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1797:52, endln:1797:55 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1798:44, endln:1798:52 + \_ref_obj: (fpnew_pkg::bias::exp_bits), line:1798:44, endln:1798:52 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::bias::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -52421,25 +52205,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiParent: - \_ref_obj: (fpnew_pkg::super_format::cfg) - |vpiParent: - \_if_stmt: , line:1805:7, endln:1808:10 - |vpiName:cfg - |vpiFullName:fpnew_pkg::super_format::cfg - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 + \_if_stmt: , line:1805:7, endln:1808:10 |vpiName:cfg |vpiFullName:fpnew_pkg::super_format::cfg + |vpiActual: + \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiIndex: - \_ref_obj: (fpnew_pkg::super_format::cfg::fmt), line:1805:15, endln:1805:18 + \_ref_obj: (fpnew_pkg::super_format::fmt), line:1805:15, endln:1805:18 |vpiParent: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiName:fmt - |vpiFullName:fpnew_pkg::super_format::cfg::fmt + |vpiFullName:fpnew_pkg::super_format::fmt |vpiActual: \_int_var: (fpnew_pkg::super_format::fmt), line:1804:23, endln:1804:26 - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiStmt: \_begin: (fpnew_pkg::super_format), line:1805:21, endln:1808:10 |vpiParent: @@ -52472,10 +52250,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (exp_bits), line:1806:46, endln:1806:54 + \_ref_obj: (fpnew_pkg::super_format::exp_bits), line:1806:46, endln:1806:54 |vpiParent: \_hier_path: (res.exp_bits), line:1806:42, endln:1806:54 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::super_format::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiArgument: @@ -52550,10 +52329,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (man_bits), line:1807:46, endln:1807:54 + \_ref_obj: (fpnew_pkg::super_format::man_bits), line:1807:46, endln:1807:54 |vpiParent: \_hier_path: (res.man_bits), line:1807:42, endln:1807:54 |vpiName:man_bits + |vpiFullName:fpnew_pkg::super_format::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiArgument: @@ -52796,25 +52576,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiParent: - \_ref_obj: (fpnew_pkg::max_int_width::cfg) - |vpiParent: - \_if_stmt: , line:1819:7, endln:1819:73 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_int_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 + \_if_stmt: , line:1819:7, endln:1819:73 |vpiName:cfg |vpiFullName:fpnew_pkg::max_int_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_int_width::cfg::ifmt), line:1819:15, endln:1819:19 + \_ref_obj: (fpnew_pkg::max_int_width::ifmt), line:1819:15, endln:1819:19 |vpiParent: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::max_int_width::cfg::ifmt + |vpiFullName:fpnew_pkg::max_int_width::ifmt |vpiActual: \_int_var: (fpnew_pkg::max_int_width::ifmt), line:1818:14, endln:1818:18 - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiStmt: \_assignment: , line:1819:22, endln:1819:72 |vpiParent: @@ -53754,25 +53528,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg) - |vpiParent: - \_operation: , line:1866:18, endln:1866:76 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 + \_operation: , line:1866:18, endln:1866:76 |vpiName:cfg |vpiFullName:fpnew_pkg::get_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg::fmt), line:1866:22, endln:1866:25 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:22, endln:1866:25 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiOperand: \_operation: , line:1866:30, endln:1866:75 |vpiParent: @@ -53824,25 +53592,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::res) - |vpiParent: - \_assignment: , line:1866:7, endln:1866:76 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 + \_assignment: , line:1866:7, endln:1866:76 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::res::fmt), line:1866:11, endln:1866:14 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:11, endln:1866:14 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiStmt: \_return_stmt: , line:1867:5, endln:1867:11 |vpiParent: @@ -54392,69 +54154,51 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 + \_operation: , line:1884:24, endln:1884:51 |vpiName:icfg |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg::ifmt), line:1884:29, endln:1884:33 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:29, endln:1884:33 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 + \_operation: , line:1884:24, endln:1884:51 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts::fmt), line:1884:47, endln:1884:50 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::fmt), line:1884:47, endln:1884:50 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::fmt), line:1881:25, endln:1881:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1884:11, endln:1884:51 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 + \_assignment: , line:1884:11, endln:1884:51 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res::ifmt), line:1884:15, endln:1884:19 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:15, endln:1884:19 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiStmt: \_return_stmt: , line:1885:5, endln:1885:11 |vpiParent: @@ -54721,25 +54465,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg) - |vpiParent: - \_operation: , line:1895:18, endln:1896:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 + \_operation: , line:1895:18, endln:1896:66 |vpiName:cfg |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg::fmt), line:1895:22, endln:1895:25 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:22, endln:1895:25 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiOperand: \_operation: , line:1895:31, endln:1896:65 |vpiParent: @@ -54801,25 +54539,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS) - |vpiParent: - \_operation: , line:1896:31, endln:1896:64 - |vpiName:CPK_FORMATS - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 + \_operation: , line:1896:31, endln:1896:64 |vpiName:CPK_FORMATS |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS + |vpiActual: + \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt), line:1896:43, endln:1896:46 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1896:43, endln:1896:46 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiOperand: \_operation: , line:1896:52, endln:1896:63 |vpiParent: @@ -54844,25 +54576,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res) - |vpiParent: - \_assignment: , line:1895:7, endln:1896:66 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 + \_assignment: , line:1895:7, endln:1896:66 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res::fmt), line:1895:11, endln:1895:14 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:11, endln:1895:14 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiStmt: \_return_stmt: , line:1897:5, endln:1897:11 |vpiParent: @@ -55364,47 +55090,35 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 + \_operation: , line:1913:22, endln:1913:49 |vpiName:icfg |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt), line:1913:27, endln:1913:31 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:27, endln:1913:31 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 + \_operation: , line:1913:22, endln:1913:49 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt), line:1913:45, endln:1913:48 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1913:45, endln:1913:48 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1911:25, endln:1911:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiOperand: \_operation: , line:1914:23, endln:1914:84 |vpiParent: @@ -55457,25 +55171,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1913:9, endln:1914:85 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 + \_assignment: , line:1913:9, endln:1914:85 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res::ifmt), line:1913:13, endln:1913:17 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:13, endln:1913:17 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiStmt: \_return_stmt: , line:1915:5, endln:1915:11 |vpiParent: @@ -55636,25 +55344,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1921:11, endln:1921:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 + \_operation: , line:1921:11, endln:1921:39 |vpiName:cfg |vpiFullName:fpnew_pkg::any_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg::i), line:1921:15, endln:1921:16 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:15, endln:1921:16 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiOperand: \_operation: , line:1921:21, endln:1921:39 |vpiParent: @@ -55663,25 +55365,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types) - |vpiParent: - \_operation: , line:1921:21, endln:1921:39 - |vpiName:types - |vpiFullName:fpnew_pkg::any_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 + \_operation: , line:1921:21, endln:1921:39 |vpiName:types |vpiFullName:fpnew_pkg::any_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1919:63, endln:1919:68 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types::i), line:1921:27, endln:1921:28 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:27, endln:1921:28 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::types::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 |vpiOperand: \_ref_obj: (fpnew_pkg::any_enabled_multi::MERGED), line:1921:33, endln:1921:39 |vpiParent: @@ -55875,25 +55571,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1931:11, endln:1931:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 + \_operation: , line:1931:11, endln:1931:39 |vpiName:cfg |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg::i), line:1931:15, endln:1931:16 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:15, endln:1931:16 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiOperand: \_operation: , line:1931:21, endln:1931:39 |vpiParent: @@ -55902,25 +55592,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1931:21, endln:1931:39 - |vpiName:types - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 + \_operation: , line:1931:21, endln:1931:39 |vpiName:types |vpiFullName:fpnew_pkg::is_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1928:68, endln:1928:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types::i), line:1931:27, endln:1931:28 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:27, endln:1931:28 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 |vpiOperand: \_ref_obj: (fpnew_pkg::is_first_enabled_multi::MERGED), line:1931:33, endln:1931:39 |vpiParent: @@ -56119,25 +55803,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1939:11, endln:1939:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 + \_operation: , line:1939:11, endln:1939:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg::i), line:1939:15, endln:1939:16 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:15, endln:1939:16 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiOperand: \_operation: , line:1939:21, endln:1939:39 |vpiParent: @@ -56146,25 +55824,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1939:21, endln:1939:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 + \_operation: , line:1939:21, endln:1939:39 |vpiName:types |vpiFullName:fpnew_pkg::get_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1937:75, endln:1937:80 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types::i), line:1939:27, endln:1939:28 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:27, endln:1939:28 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 |vpiOperand: \_ref_obj: (fpnew_pkg::get_first_enabled_multi::MERGED), line:1939:33, endln:1939:39 |vpiParent: @@ -56463,25 +56135,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg) - |vpiParent: - \_operation: , line:1950:11, endln:1950:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 + \_operation: , line:1950:11, endln:1950:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg::i), line:1950:15, endln:1950:16 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:15, endln:1950:16 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiOperand: \_operation: , line:1950:21, endln:1950:39 |vpiParent: @@ -56490,25 +56156,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types) - |vpiParent: - \_operation: , line:1950:21, endln:1950:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_num_regs_multi::types - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 + \_operation: , line:1950:21, endln:1950:39 |vpiName:types |vpiFullName:fpnew_pkg::get_num_regs_multi::types + |vpiActual: + \_io_decl: (types), line:1946:71, endln:1946:76 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types::i), line:1950:27, endln:1950:28 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:27, endln:1950:28 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::types::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 |vpiOperand: \_ref_obj: (fpnew_pkg::get_num_regs_multi::MERGED), line:1950:33, endln:1950:39 |vpiParent: @@ -56538,25 +56198,19 @@ design: (work@top) |vpiArgument: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs) - |vpiParent: - \_func_call: (maximum), line:1950:47, endln:1950:68 - |vpiName:regs - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 + \_func_call: (maximum), line:1950:47, endln:1950:68 |vpiName:regs |vpiFullName:fpnew_pkg::get_num_regs_multi::regs + |vpiActual: + \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs::i), line:1950:65, endln:1950:66 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:65, endln:1950:66 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiName:maximum |vpiFunction: \_function: (fpnew_pkg::maximum), line:1756:3, endln:1758:14 @@ -66281,15 +65935,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:17, endln:563:24 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:21, endln:563:23 |vpiParent: @@ -66298,19 +65948,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:26, endln:563:35 + \_part_select: imm (riscv::jal::imm), line:563:26, endln:563:35 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:26, endln:563:29 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:30, endln:563:32 @@ -66327,15 +65973,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::jal::imm), line:563:37, endln:563:44 |vpiParent: - \_ref_obj: (riscv::jal::imm) - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 |vpiName:imm |vpiFullName:riscv::jal::imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiIndex: \_constant: , line:563:41, endln:563:43 |vpiParent: @@ -66344,19 +65986,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 |vpiOperand: - \_part_select: , line:563:46, endln:563:56 + \_part_select: imm (riscv::jal::imm), line:563:46, endln:563:56 |vpiParent: - \_ref_obj: imm (riscv::jal::imm), line:563:46, endln:563:49 - |vpiParent: - \_operation: , line:563:16, endln:563:68 - |vpiName:imm - |vpiFullName:riscv::jal::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:561:70, endln:561:73 + \_operation: , line:563:16, endln:563:68 + |vpiName:imm + |vpiFullName:riscv::jal::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:561:70, endln:561:73 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:563:50, endln:563:52 @@ -66514,16 +66152,14 @@ design: (work@top) \_return_stmt: , line:568:9, endln:568:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:568:17, endln:568:29 + \_part_select: offset (riscv::jalr::offset), line:568:17, endln:568:29 |vpiParent: - \_ref_obj: offset (riscv::jalr::offset), line:568:17, endln:568:23 - |vpiParent: - \_operation: , line:568:16, endln:568:52 - |vpiName:offset - |vpiFullName:riscv::jalr::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:566:87, endln:566:93 + \_operation: , line:568:16, endln:568:52 + |vpiName:offset + |vpiFullName:riscv::jalr::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:566:87, endln:566:93 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:568:24, endln:568:26 @@ -66697,16 +66333,14 @@ design: (work@top) \_return_stmt: , line:573:9, endln:573:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:573:17, endln:573:26 + \_part_select: imm (riscv::andi::imm), line:573:17, endln:573:26 |vpiParent: - \_ref_obj: imm (riscv::andi::imm), line:573:17, endln:573:20 - |vpiParent: - \_operation: , line:573:16, endln:573:49 - |vpiName:imm - |vpiFullName:riscv::andi::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:571:87, endln:571:90 + \_operation: , line:573:16, endln:573:49 + |vpiName:imm + |vpiFullName:riscv::andi::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:571:87, endln:571:90 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:573:21, endln:573:23 @@ -66888,16 +66522,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:578:23, endln:578:33 + \_part_select: shamt (riscv::slli::shamt), line:578:23, endln:578:33 |vpiParent: - \_ref_obj: shamt (riscv::slli::shamt), line:578:23, endln:578:28 - |vpiParent: - \_operation: , line:578:16, endln:578:56 - |vpiName:shamt - |vpiFullName:riscv::slli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:576:86, endln:576:91 + \_operation: , line:578:16, endln:578:56 + |vpiName:shamt + |vpiFullName:riscv::slli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:576:86, endln:576:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:578:29, endln:578:30 @@ -67079,16 +66711,14 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:583:23, endln:583:33 + \_part_select: shamt (riscv::srli::shamt), line:583:23, endln:583:33 |vpiParent: - \_ref_obj: shamt (riscv::srli::shamt), line:583:23, endln:583:28 - |vpiParent: - \_operation: , line:583:16, endln:583:56 - |vpiName:shamt - |vpiFullName:riscv::srli::shamt - |vpiDefName:shamt - |vpiActual: - \_io_decl: (shamt), line:581:86, endln:581:91 + \_operation: , line:583:16, endln:583:56 + |vpiName:shamt + |vpiFullName:riscv::srli::shamt + |vpiDefName:shamt + |vpiActual: + \_io_decl: (shamt), line:581:86, endln:581:91 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:583:29, endln:583:30 @@ -67290,16 +66920,14 @@ design: (work@top) \_return_stmt: , line:588:9, endln:588:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:588:17, endln:588:29 + \_part_select: offset (riscv::load::offset), line:588:17, endln:588:29 |vpiParent: - \_ref_obj: offset (riscv::load::offset), line:588:17, endln:588:23 - |vpiParent: - \_operation: , line:588:16, endln:588:55 - |vpiName:offset - |vpiFullName:riscv::load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:586:108, endln:586:114 + \_operation: , line:588:16, endln:588:55 + |vpiName:offset + |vpiFullName:riscv::load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:586:108, endln:586:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:588:24, endln:588:26 @@ -67447,15 +67075,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:17, endln:593:24 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:21, endln:593:23 |vpiParent: @@ -67464,19 +67088,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:26, endln:593:35 + \_part_select: imm (riscv::auipc::imm), line:593:26, endln:593:35 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:26, endln:593:29 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:30, endln:593:32 @@ -67493,15 +67113,11 @@ design: (work@top) |vpiOperand: \_bit_select: (riscv::auipc::imm), line:593:37, endln:593:44 |vpiParent: - \_ref_obj: (riscv::auipc::imm) - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 |vpiName:imm |vpiFullName:riscv::auipc::imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiIndex: \_constant: , line:593:41, endln:593:43 |vpiParent: @@ -67510,19 +67126,15 @@ design: (work@top) |vpiSize:64 |UINT:11 |vpiConstType:9 - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 |vpiOperand: - \_part_select: , line:593:46, endln:593:56 + \_part_select: imm (riscv::auipc::imm), line:593:46, endln:593:56 |vpiParent: - \_ref_obj: imm (riscv::auipc::imm), line:593:46, endln:593:49 - |vpiParent: - \_operation: , line:593:16, endln:593:68 - |vpiName:imm - |vpiFullName:riscv::auipc::imm - |vpiDefName:imm - |vpiActual: - \_io_decl: (imm), line:591:72, endln:591:75 + \_operation: , line:593:16, endln:593:68 + |vpiName:imm + |vpiFullName:riscv::auipc::imm + |vpiDefName:imm + |vpiActual: + \_io_decl: (imm), line:591:72, endln:591:75 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:593:50, endln:593:52 @@ -67708,16 +67320,14 @@ design: (work@top) \_return_stmt: , line:598:9, endln:598:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:598:17, endln:598:29 + \_part_select: offset (riscv::store::offset), line:598:17, endln:598:29 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:17, endln:598:23 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:24, endln:598:26 @@ -67756,16 +67366,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:596:56, endln:596:60 |vpiOperand: - \_part_select: , line:598:48, endln:598:59 + \_part_select: offset (riscv::store::offset), line:598:48, endln:598:59 |vpiParent: - \_ref_obj: offset (riscv::store::offset), line:598:48, endln:598:54 - |vpiParent: - \_operation: , line:598:16, endln:598:67 - |vpiName:offset - |vpiFullName:riscv::store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:596:108, endln:596:114 + \_operation: , line:598:16, endln:598:67 + |vpiName:offset + |vpiFullName:riscv::store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:596:108, endln:596:114 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:598:55, endln:598:56 @@ -67943,16 +67551,14 @@ design: (work@top) \_return_stmt: , line:603:9, endln:603:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:603:17, endln:603:29 + \_part_select: offset (riscv::float_load::offset), line:603:17, endln:603:29 |vpiParent: - \_ref_obj: offset (riscv::float_load::offset), line:603:17, endln:603:23 - |vpiParent: - \_operation: , line:603:16, endln:603:62 - |vpiName:offset - |vpiFullName:riscv::float_load::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:601:114, endln:601:120 + \_operation: , line:603:16, endln:603:62 + |vpiName:offset + |vpiFullName:riscv::float_load::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:601:114, endln:601:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:603:24, endln:603:26 @@ -68154,16 +67760,14 @@ design: (work@top) \_return_stmt: , line:608:9, endln:608:15 |vpiOpType:33 |vpiOperand: - \_part_select: , line:608:17, endln:608:29 + \_part_select: offset (riscv::float_store::offset), line:608:17, endln:608:29 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:17, endln:608:23 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:24, endln:608:26 @@ -68202,16 +67806,14 @@ design: (work@top) |vpiActual: \_io_decl: (size), line:606:62, endln:606:66 |vpiOperand: - \_part_select: , line:608:48, endln:608:59 + \_part_select: offset (riscv::float_store::offset), line:608:48, endln:608:59 |vpiParent: - \_ref_obj: offset (riscv::float_store::offset), line:608:48, endln:608:54 - |vpiParent: - \_operation: , line:608:16, endln:608:74 - |vpiName:offset - |vpiFullName:riscv::float_store::offset - |vpiDefName:offset - |vpiActual: - \_io_decl: (offset), line:606:114, endln:606:120 + \_operation: , line:608:16, endln:608:74 + |vpiName:offset + |vpiFullName:riscv::float_store::offset + |vpiDefName:offset + |vpiActual: + \_io_decl: (offset), line:606:114, endln:606:120 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:608:55, endln:608:56 @@ -68867,16 +68469,14 @@ design: (work@top) \_if_else: , line:642:9, endln:646:12 |vpiOpType:15 |vpiOperand: - \_part_select: , line:642:13, endln:642:23 + \_part_select: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:23 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:642:13, endln:642:18 - |vpiParent: - \_operation: , line:642:13, endln:642:32 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_operation: , line:642:13, endln:642:32 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:642:19, endln:642:20 @@ -68922,16 +68522,14 @@ design: (work@top) |STRING:(0x%h) |vpiConstType:6 |vpiArgument: - \_part_select: , line:643:44, endln:643:55 + \_part_select: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:55 |vpiParent: - \_ref_obj: instr (riscv::spikeCommitLog::instr), line:643:44, endln:643:49 - |vpiParent: - \_sys_func_call: ($sformatf), line:643:24, endln:643:56 - |vpiName:instr - |vpiFullName:riscv::spikeCommitLog::instr - |vpiDefName:instr - |vpiActual: - \_io_decl: (instr), line:636:87, endln:636:92 + \_sys_func_call: ($sformatf), line:643:24, endln:643:56 + |vpiName:instr + |vpiFullName:riscv::spikeCommitLog::instr + |vpiDefName:instr + |vpiActual: + \_io_decl: (instr), line:636:87, endln:636:92 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:643:50, endln:643:52 @@ -75403,10 +75001,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -75456,10 +75055,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -75476,10 +75076,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -75521,10 +75122,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -75541,10 +75143,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -75569,10 +75172,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -75605,10 +75209,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -75641,10 +75246,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -75677,10 +75283,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -75883,7 +75490,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules), line:751:13, endln:751:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_operation: , line:751:13, endln:751:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrMaxRules |vpiActual: @@ -76051,10 +75658,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -76085,23 +75693,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k), line:754:57, endln:754:58 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::NonIdempotentAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -76117,23 +75721,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k), line:754:85, endln:754:86 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::NonIdempotentLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::Cfg.NonIdempotentLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -76150,25 +75750,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass::k), line:754:14, endln:754:15 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -76214,7 +75808,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrMaxRules), line:761:13, endln:761:23 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_operation: , line:761:13, endln:761:25 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_execute_regions::NrMaxRules |vpiActual: @@ -76382,10 +75976,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -76416,23 +76011,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k), line:764:57, endln:764:58 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -76448,23 +76039,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k), line:764:85, endln:764:86 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) + \_bit_select: (ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::ExecuteRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::Cfg.ExecuteRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -76481,25 +76068,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass::k), line:764:14, endln:764:15 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -76545,7 +76126,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrMaxRules), line:770:23, endln:770:33 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_operation: , line:770:23, endln:770:35 |vpiName:NrMaxRules |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrMaxRules |vpiActual: @@ -76715,10 +76296,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -76749,23 +76331,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k), line:773:56, endln:773:57 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::CachedRegionAddrBase) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionAddrBase[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -76781,23 +76359,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k), line:773:83, endln:773:84 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::CachedRegionLength) |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::Cfg.CachedRegionLength[k]::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -76814,25 +76388,19 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass::k), line:773:14, endln:773:15 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass::k + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -78041,15 +77609,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiParent: @@ -78058,19 +77622,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -78193,15 +77753,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiParent: @@ -78210,19 +77766,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -78239,15 +77791,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiParent: @@ -78256,19 +77804,15 @@ design: (work@top) |vpiSize:64 |UINT:20 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -78399,15 +77943,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiParent: @@ -78416,19 +77956,15 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -78551,15 +78087,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiParent: @@ -78568,20 +78100,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiParent: @@ -78590,20 +78116,14 @@ design: (work@top) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiParent: @@ -78612,19 +78132,15 @@ design: (work@top) |vpiSize:64 |UINT:7 |vpiConstType:9 - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 @@ -78639,16 +78155,14 @@ design: (work@top) |UINT:25 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -78838,15 +78352,11 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiParent: @@ -78855,8 +78365,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiParent: @@ -78866,16 +78374,14 @@ design: (work@top) |BIN:1 |vpiConstType:3 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -78970,21 +78476,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -79013,21 +78517,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -79079,21 +78581,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -79122,21 +78622,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -79161,7 +78659,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 @@ -79184,21 +78682,19 @@ design: (work@top) |UINT:8 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -79250,21 +78746,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -79293,21 +78787,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -79332,7 +78824,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 @@ -79355,21 +78847,19 @@ design: (work@top) |UINT:16 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -79421,21 +78911,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -79464,21 +78952,19 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -79503,7 +78989,7 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 @@ -79526,21 +79012,19 @@ design: (work@top) |UINT:24 |vpiConstType:9 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -79592,16 +79076,14 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 @@ -79616,16 +79098,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -79671,16 +79151,14 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 @@ -79695,16 +79173,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -79750,16 +79226,14 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 @@ -79774,16 +79248,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -79829,16 +79301,14 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 @@ -79853,16 +79323,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -79889,21 +79357,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -80091,16 +79557,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -80257,16 +79721,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -80471,16 +79933,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -83582,29 +83042,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:25, endln:1765:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:1765:25, endln:1765:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:12, endln:1765:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:12, endln:1765:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1765:30, endln:1765:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:1765:30, endln:1765:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1765:12, endln:1765:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -83613,29 +83071,27 @@ design: (work@top) \_operation: , line:1765:12, endln:1765:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:1765:54, endln:1765:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:1765:54, endln:1765:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1765:41, endln:1765:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:1765:41, endln:1765:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1764:56, endln:1764:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1765:59, endln:1765:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:1765:59, endln:1765:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1765:41, endln:1765:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiOperand: @@ -83809,25 +83265,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiParent: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1772:7, endln:1773:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 + \_if_stmt: , line:1772:7, endln:1773:66 |vpiName:cfg |vpiFullName:fpnew_pkg::max_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_fp_width::cfg::i), line:1772:15, endln:1772:16 + \_ref_obj: (fpnew_pkg::max_fp_width::i), line:1772:15, endln:1772:16 |vpiParent: \_bit_select: (fpnew_pkg::max_fp_width::cfg), line:1772:11, endln:1772:17 |vpiName:i - |vpiFullName:fpnew_pkg::max_fp_width::cfg::i + |vpiFullName:fpnew_pkg::max_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::max_fp_width::i), line:1771:23, endln:1771:24 - |vpiActual: - \_io_decl: (cfg), line:1769:60, endln:1769:63 |vpiStmt: \_assignment: , line:1773:9, endln:1773:65 |vpiParent: @@ -84066,25 +83516,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiParent: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg) - |vpiParent: - \_if_stmt: , line:1781:7, endln:1782:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::min_fp_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 + \_if_stmt: , line:1781:7, endln:1782:66 |vpiName:cfg |vpiFullName:fpnew_pkg::min_fp_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiIndex: - \_ref_obj: (fpnew_pkg::min_fp_width::cfg::i), line:1781:15, endln:1781:16 + \_ref_obj: (fpnew_pkg::min_fp_width::i), line:1781:15, endln:1781:16 |vpiParent: \_bit_select: (fpnew_pkg::min_fp_width::cfg), line:1781:11, endln:1781:17 |vpiName:i - |vpiFullName:fpnew_pkg::min_fp_width::cfg::i + |vpiFullName:fpnew_pkg::min_fp_width::i |vpiActual: \_int_var: (fpnew_pkg::min_fp_width::i), line:1780:23, endln:1780:24 - |vpiActual: - \_io_decl: (cfg), line:1778:60, endln:1778:63 |vpiStmt: \_assignment: , line:1782:9, endln:1782:65 |vpiParent: @@ -84187,29 +83631,27 @@ design: (work@top) \_return_stmt: , line:1788:5, endln:1788:11 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiParent: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt), line:1788:25, endln:1788:28 + \_ref_obj: (fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt), line:1788:25, endln:1788:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1788:12, endln:1788:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1788:12, endln:1788:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::exp_bits::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1787:56, endln:1787:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1788:30, endln:1788:38 + \_ref_obj: (fpnew_pkg::exp_bits::exp_bits), line:1788:30, endln:1788:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1788:12, endln:1788:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::exp_bits::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiInstance: @@ -84246,29 +83688,27 @@ design: (work@top) \_return_stmt: , line:1793:5, endln:1793:11 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiParent: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt), line:1793:25, endln:1793:28 + \_ref_obj: (fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt), line:1793:25, endln:1793:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1793:12, endln:1793:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:1793:12, endln:1793:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::man_bits::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:1792:56, endln:1792:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (man_bits), line:1793:30, endln:1793:38 + \_ref_obj: (fpnew_pkg::man_bits::man_bits), line:1793:30, endln:1793:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:1793:12, endln:1793:38 |vpiName:man_bits + |vpiFullName:fpnew_pkg::man_bits::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiInstance: @@ -84332,29 +83772,27 @@ design: (work@top) \_operation: , line:1798:26, endln:1798:54 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiParent: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt), line:1798:39, endln:1798:42 + \_ref_obj: (fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt), line:1798:39, endln:1798:42 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:1798:26, endln:1798:38 + \_bit_select: (FP_ENCODINGS[fmt]), line:1798:26, endln:1798:38 |vpiName:fmt - |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::bias::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:1797:52, endln:1797:55 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:1519:49, endln:1519:61 |vpiActual: - \_ref_obj: (exp_bits), line:1798:44, endln:1798:52 + \_ref_obj: (fpnew_pkg::bias::exp_bits), line:1798:44, endln:1798:52 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:1798:26, endln:1798:52 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::bias::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiOperand: @@ -84534,25 +83972,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiParent: - \_ref_obj: (fpnew_pkg::super_format::cfg) - |vpiParent: - \_if_stmt: , line:1805:7, endln:1808:10 - |vpiName:cfg - |vpiFullName:fpnew_pkg::super_format::cfg - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 + \_if_stmt: , line:1805:7, endln:1808:10 |vpiName:cfg |vpiFullName:fpnew_pkg::super_format::cfg + |vpiActual: + \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiIndex: - \_ref_obj: (fpnew_pkg::super_format::cfg::fmt), line:1805:15, endln:1805:18 + \_ref_obj: (fpnew_pkg::super_format::fmt), line:1805:15, endln:1805:18 |vpiParent: \_bit_select: (fpnew_pkg::super_format::cfg), line:1805:11, endln:1805:19 |vpiName:fmt - |vpiFullName:fpnew_pkg::super_format::cfg::fmt + |vpiFullName:fpnew_pkg::super_format::fmt |vpiActual: \_int_var: (fpnew_pkg::super_format::fmt), line:1804:23, endln:1804:26 - |vpiActual: - \_io_decl: (cfg), line:1801:61, endln:1801:64 |vpiStmt: \_begin: (fpnew_pkg::super_format), line:1805:21, endln:1808:10 |vpiParent: @@ -84585,10 +84017,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (exp_bits), line:1806:46, endln:1806:54 + \_ref_obj: (fpnew_pkg::super_format::exp_bits), line:1806:46, endln:1806:54 |vpiParent: \_hier_path: (res.exp_bits), line:1806:42, endln:1806:54 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::super_format::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:1501:18, endln:1501:26 |vpiArgument: @@ -84663,10 +84096,11 @@ design: (work@top) |vpiActual: \_struct_var: (fpnew_pkg::super_format::res), line:1802:29, endln:1802:32 |vpiActual: - \_ref_obj: (man_bits), line:1807:46, endln:1807:54 + \_ref_obj: (fpnew_pkg::super_format::man_bits), line:1807:46, endln:1807:54 |vpiParent: \_hier_path: (res.man_bits), line:1807:42, endln:1807:54 |vpiName:man_bits + |vpiFullName:fpnew_pkg::super_format::man_bits |vpiActual: \_typespec_member: (man_bits), line:1502:18, endln:1502:26 |vpiArgument: @@ -84896,25 +84330,19 @@ design: (work@top) |vpiCondition: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiParent: - \_ref_obj: (fpnew_pkg::max_int_width::cfg) - |vpiParent: - \_if_stmt: , line:1819:7, endln:1819:73 - |vpiName:cfg - |vpiFullName:fpnew_pkg::max_int_width::cfg - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 + \_if_stmt: , line:1819:7, endln:1819:73 |vpiName:cfg |vpiFullName:fpnew_pkg::max_int_width::cfg + |vpiActual: + \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiIndex: - \_ref_obj: (fpnew_pkg::max_int_width::cfg::ifmt), line:1819:15, endln:1819:19 + \_ref_obj: (fpnew_pkg::max_int_width::ifmt), line:1819:15, endln:1819:19 |vpiParent: \_bit_select: (fpnew_pkg::max_int_width::cfg), line:1819:11, endln:1819:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::max_int_width::cfg::ifmt + |vpiFullName:fpnew_pkg::max_int_width::ifmt |vpiActual: \_int_var: (fpnew_pkg::max_int_width::ifmt), line:1818:14, endln:1818:18 - |vpiActual: - \_io_decl: (cfg), line:1816:62, endln:1816:65 |vpiStmt: \_assignment: , line:1819:22, endln:1819:72 |vpiParent: @@ -85818,25 +85246,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg) - |vpiParent: - \_operation: , line:1866:18, endln:1866:76 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 + \_operation: , line:1866:18, endln:1866:76 |vpiName:cfg |vpiFullName:fpnew_pkg::get_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::cfg::fmt), line:1866:22, endln:1866:25 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:22, endln:1866:25 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::cfg), line:1866:18, endln:1866:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_io_decl: (cfg), line:1861:63, endln:1861:66 |vpiOperand: \_operation: , line:1866:30, endln:1866:75 |vpiParent: @@ -85888,25 +85310,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_formats::res) - |vpiParent: - \_assignment: , line:1866:7, endln:1866:76 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 + \_assignment: , line:1866:7, endln:1866:76 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_formats::res::fmt), line:1866:11, endln:1866:14 + \_ref_obj: (fpnew_pkg::get_lane_formats::fmt), line:1866:11, endln:1866:14 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_formats::res), line:1866:7, endln:1866:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_formats::fmt), line:1864:23, endln:1864:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_formats::res), line:1863:27, endln:1863:30 |vpiStmt: \_return_stmt: , line:1867:5, endln:1867:11 |vpiParent: @@ -86391,69 +85807,51 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 + \_operation: , line:1884:24, endln:1884:51 |vpiName:icfg |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::icfg::ifmt), line:1884:29, endln:1884:33 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:29, endln:1884:33 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::icfg), line:1884:24, endln:1884:34 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_io_decl: (icfg), line:1873:69, endln:1873:73 |vpiOperand: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1884:24, endln:1884:51 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 + \_operation: , line:1884:24, endln:1884:51 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::lanefmts::fmt), line:1884:47, endln:1884:50 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::fmt), line:1884:47, endln:1884:50 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1884:38, endln:1884:51 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::fmt), line:1881:25, endln:1881:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::lanefmts), line:1876:27, endln:1876:35 |vpiLhs: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiParent: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1884:11, endln:1884:51 - |vpiName:res - |vpiFullName:fpnew_pkg::get_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 + \_assignment: , line:1884:11, endln:1884:51 |vpiName:res |vpiFullName:fpnew_pkg::get_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_lane_int_formats::res::ifmt), line:1884:15, endln:1884:19 + \_ref_obj: (fpnew_pkg::get_lane_int_formats::ifmt), line:1884:15, endln:1884:19 |vpiParent: \_bit_select: (fpnew_pkg::get_lane_int_formats::res), line:1884:11, endln:1884:20 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_lane_int_formats::ifmt), line:1880:23, endln:1880:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_lane_int_formats::res), line:1875:28, endln:1875:31 |vpiStmt: \_return_stmt: , line:1885:5, endln:1885:11 |vpiParent: @@ -86681,25 +86079,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg) - |vpiParent: - \_operation: , line:1895:18, endln:1896:66 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 + \_operation: , line:1895:18, endln:1896:66 |vpiName:cfg |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg + |vpiActual: + \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::cfg::fmt), line:1895:22, endln:1895:25 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:22, endln:1895:25 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::cfg), line:1895:18, endln:1895:26 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::cfg::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_io_decl: (cfg), line:1890:68, endln:1890:71 |vpiOperand: \_operation: , line:1895:31, endln:1896:65 |vpiParent: @@ -86761,25 +86153,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS) - |vpiParent: - \_operation: , line:1896:31, endln:1896:64 - |vpiName:CPK_FORMATS - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 + \_operation: , line:1896:31, endln:1896:64 |vpiName:CPK_FORMATS |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS + |vpiActual: + \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt), line:1896:43, endln:1896:46 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1896:43, endln:1896:46 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::CPK_FORMATS), line:1896:31, endln:1896:47 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::CPK_FORMATS::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_parameter: (fpnew_pkg::CPK_FORMATS), line:1531:26, endln:1531:37 |vpiOperand: \_operation: , line:1896:52, endln:1896:63 |vpiParent: @@ -86804,25 +86190,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res) - |vpiParent: - \_assignment: , line:1895:7, endln:1896:66 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 + \_assignment: , line:1895:7, endln:1896:66 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_formats::res::fmt), line:1895:11, endln:1895:14 + \_ref_obj: (fpnew_pkg::get_conv_lane_formats::fmt), line:1895:11, endln:1895:14 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_formats::res), line:1895:7, endln:1895:15 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_formats::res::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_formats::fmt), line:1893:23, endln:1893:26 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_formats::res), line:1892:27, endln:1892:30 |vpiStmt: \_return_stmt: , line:1897:5, endln:1897:11 |vpiParent: @@ -87259,47 +86639,35 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:icfg - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 + \_operation: , line:1913:22, endln:1913:49 |vpiName:icfg |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg + |vpiActual: + \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt), line:1913:27, endln:1913:31 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:27, endln:1913:31 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::icfg), line:1913:22, endln:1913:32 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::icfg::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_io_decl: (icfg), line:1903:74, endln:1903:78 |vpiOperand: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts) - |vpiParent: - \_operation: , line:1913:22, endln:1913:49 - |vpiName:lanefmts - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 + \_operation: , line:1913:22, endln:1913:49 |vpiName:lanefmts |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt), line:1913:45, endln:1913:48 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1913:45, endln:1913:48 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1913:36, endln:1913:49 |vpiName:fmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::lanefmts::fmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::fmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::fmt), line:1911:25, endln:1911:28 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::lanefmts), line:1906:27, endln:1906:35 |vpiOperand: \_operation: , line:1914:23, endln:1914:84 |vpiParent: @@ -87352,25 +86720,19 @@ design: (work@top) |vpiLhs: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiParent: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res) - |vpiParent: - \_assignment: , line:1913:9, endln:1914:85 - |vpiName:res - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 + \_assignment: , line:1913:9, endln:1914:85 |vpiName:res |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res + |vpiActual: + \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::res::ifmt), line:1913:13, endln:1913:17 + \_ref_obj: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1913:13, endln:1913:17 |vpiParent: \_bit_select: (fpnew_pkg::get_conv_lane_int_formats::res), line:1913:9, endln:1913:18 |vpiName:ifmt - |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::res::ifmt + |vpiFullName:fpnew_pkg::get_conv_lane_int_formats::ifmt |vpiActual: \_int_var: (fpnew_pkg::get_conv_lane_int_formats::ifmt), line:1910:23, endln:1910:27 - |vpiActual: - \_logic_var: (fpnew_pkg::get_conv_lane_int_formats::res), line:1905:28, endln:1905:31 |vpiStmt: \_return_stmt: , line:1915:5, endln:1915:11 |vpiParent: @@ -87518,25 +86880,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1921:11, endln:1921:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 + \_operation: , line:1921:11, endln:1921:39 |vpiName:cfg |vpiFullName:fpnew_pkg::any_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::cfg::i), line:1921:15, endln:1921:16 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:15, endln:1921:16 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::cfg), line:1921:11, endln:1921:17 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (cfg), line:1919:82, endln:1919:85 |vpiOperand: \_operation: , line:1921:21, endln:1921:39 |vpiParent: @@ -87545,25 +86901,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiParent: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types) - |vpiParent: - \_operation: , line:1921:21, endln:1921:39 - |vpiName:types - |vpiFullName:fpnew_pkg::any_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 + \_operation: , line:1921:21, endln:1921:39 |vpiName:types |vpiFullName:fpnew_pkg::any_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1919:63, endln:1919:68 |vpiIndex: - \_ref_obj: (fpnew_pkg::any_enabled_multi::types::i), line:1921:27, endln:1921:28 + \_ref_obj: (fpnew_pkg::any_enabled_multi::i), line:1921:27, endln:1921:28 |vpiParent: \_bit_select: (fpnew_pkg::any_enabled_multi::types), line:1921:21, endln:1921:29 |vpiName:i - |vpiFullName:fpnew_pkg::any_enabled_multi::types::i + |vpiFullName:fpnew_pkg::any_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::any_enabled_multi::i), line:1920:23, endln:1920:24 - |vpiActual: - \_io_decl: (types), line:1919:63, endln:1919:68 |vpiOperand: \_ref_obj: (fpnew_pkg::any_enabled_multi::MERGED), line:1921:33, endln:1921:39 |vpiParent: @@ -87744,25 +87094,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1931:11, endln:1931:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 + \_operation: , line:1931:11, endln:1931:39 |vpiName:cfg |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::cfg::i), line:1931:15, endln:1931:16 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:15, endln:1931:16 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::cfg), line:1931:11, endln:1931:17 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (cfg), line:1929:63, endln:1929:66 |vpiOperand: \_operation: , line:1931:21, endln:1931:39 |vpiParent: @@ -87771,25 +87115,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiParent: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1931:21, endln:1931:39 - |vpiName:types - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 + \_operation: , line:1931:21, endln:1931:39 |vpiName:types |vpiFullName:fpnew_pkg::is_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1928:68, endln:1928:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::is_first_enabled_multi::types::i), line:1931:27, endln:1931:28 + \_ref_obj: (fpnew_pkg::is_first_enabled_multi::i), line:1931:27, endln:1931:28 |vpiParent: \_bit_select: (fpnew_pkg::is_first_enabled_multi::types), line:1931:21, endln:1931:29 |vpiName:i - |vpiFullName:fpnew_pkg::is_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::is_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::is_first_enabled_multi::i), line:1930:23, endln:1930:24 - |vpiActual: - \_io_decl: (types), line:1928:68, endln:1928:73 |vpiOperand: \_ref_obj: (fpnew_pkg::is_first_enabled_multi::MERGED), line:1931:33, endln:1931:39 |vpiParent: @@ -87975,25 +87313,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg) - |vpiParent: - \_operation: , line:1939:11, endln:1939:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 + \_operation: , line:1939:11, endln:1939:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::cfg::i), line:1939:15, endln:1939:16 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:15, endln:1939:16 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::cfg), line:1939:11, endln:1939:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::cfg::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (cfg), line:1937:94, endln:1937:97 |vpiOperand: \_operation: , line:1939:21, endln:1939:39 |vpiParent: @@ -88002,25 +87334,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types) - |vpiParent: - \_operation: , line:1939:21, endln:1939:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 + \_operation: , line:1939:21, endln:1939:39 |vpiName:types |vpiFullName:fpnew_pkg::get_first_enabled_multi::types + |vpiActual: + \_io_decl: (types), line:1937:75, endln:1937:80 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_first_enabled_multi::types::i), line:1939:27, endln:1939:28 + \_ref_obj: (fpnew_pkg::get_first_enabled_multi::i), line:1939:27, endln:1939:28 |vpiParent: \_bit_select: (fpnew_pkg::get_first_enabled_multi::types), line:1939:21, endln:1939:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_first_enabled_multi::types::i + |vpiFullName:fpnew_pkg::get_first_enabled_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_first_enabled_multi::i), line:1938:23, endln:1938:24 - |vpiActual: - \_io_decl: (types), line:1937:75, endln:1937:80 |vpiOperand: \_ref_obj: (fpnew_pkg::get_first_enabled_multi::MERGED), line:1939:33, endln:1939:39 |vpiParent: @@ -88293,25 +87619,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg) - |vpiParent: - \_operation: , line:1950:11, endln:1950:39 - |vpiName:cfg - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 + \_operation: , line:1950:11, endln:1950:39 |vpiName:cfg |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg + |vpiActual: + \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::cfg::i), line:1950:15, endln:1950:16 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:15, endln:1950:16 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::cfg), line:1950:11, endln:1950:17 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::cfg::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (cfg), line:1947:66, endln:1947:69 |vpiOperand: \_operation: , line:1950:21, endln:1950:39 |vpiParent: @@ -88320,25 +87640,19 @@ design: (work@top) |vpiOperand: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types) - |vpiParent: - \_operation: , line:1950:21, endln:1950:39 - |vpiName:types - |vpiFullName:fpnew_pkg::get_num_regs_multi::types - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 + \_operation: , line:1950:21, endln:1950:39 |vpiName:types |vpiFullName:fpnew_pkg::get_num_regs_multi::types + |vpiActual: + \_io_decl: (types), line:1946:71, endln:1946:76 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::types::i), line:1950:27, endln:1950:28 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:27, endln:1950:28 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::types), line:1950:21, endln:1950:29 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::types::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (types), line:1946:71, endln:1946:76 |vpiOperand: \_ref_obj: (fpnew_pkg::get_num_regs_multi::MERGED), line:1950:33, endln:1950:39 |vpiParent: @@ -88368,25 +87682,19 @@ design: (work@top) |vpiArgument: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiParent: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs) - |vpiParent: - \_func_call: (maximum), line:1950:47, endln:1950:68 - |vpiName:regs - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 + \_func_call: (maximum), line:1950:47, endln:1950:68 |vpiName:regs |vpiFullName:fpnew_pkg::get_num_regs_multi::regs + |vpiActual: + \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiIndex: - \_ref_obj: (fpnew_pkg::get_num_regs_multi::regs::i), line:1950:65, endln:1950:66 + \_ref_obj: (fpnew_pkg::get_num_regs_multi::i), line:1950:65, endln:1950:66 |vpiParent: \_bit_select: (fpnew_pkg::get_num_regs_multi::regs), line:1950:60, endln:1950:67 |vpiName:i - |vpiFullName:fpnew_pkg::get_num_regs_multi::regs::i + |vpiFullName:fpnew_pkg::get_num_regs_multi::i |vpiActual: \_int_var: (fpnew_pkg::get_num_regs_multi::i), line:1949:23, endln:1949:24 - |vpiActual: - \_io_decl: (regs), line:1945:69, endln:1945:73 |vpiName:maximum |vpiFunction: \_function: (fpnew_pkg::maximum), line:1756:3, endln:1758:14 @@ -93523,7 +92831,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:734:16, endln:734:32 |vpiName:Cfg.RASDepth |vpiActual: \_ref_obj: (Cfg), line:734:16, endln:734:19 @@ -93533,10 +92841,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (ariane_pkg::check_cfg::RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:ariane_pkg::check_cfg::RASDepth |vpiOperand: \_constant: , line:734:31, endln:734:32 |vpiStmt: @@ -93551,7 +92860,7 @@ design: (work@top) |vpiOperand: \_operation: , line:735:16, endln:735:41 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:735:16, endln:735:60 |vpiOpType:43 |vpiOperand: \_constant: , line:735:16, endln:735:17 @@ -93572,10 +92881,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiName:$clog2 |vpiOperand: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 @@ -93590,10 +92900,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (ariane_pkg::check_cfg::BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:ariane_pkg::check_cfg::BTBEntries |vpiStmt: \_immediate_assert: , line:736:9, endln:736:62 |vpiParent: @@ -93606,7 +92917,7 @@ design: (work@top) |vpiOperand: \_operation: , line:736:16, endln:736:41 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:736:16, endln:736:60 |vpiOpType:43 |vpiOperand: \_constant: , line:736:16, endln:736:17 @@ -93627,10 +92938,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiName:$clog2 |vpiOperand: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 @@ -93645,10 +92957,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (ariane_pkg::check_cfg::BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:ariane_pkg::check_cfg::BHTEntries |vpiStmt: \_immediate_assert: , line:737:9, endln:737:56 |vpiParent: @@ -93661,7 +92974,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:737:16, endln:737:54 |vpiName:Cfg.NrNonIdempotentRules |vpiActual: \_ref_obj: (Cfg), line:737:16, endln:737:19 @@ -93671,10 +92984,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (ariane_pkg::check_cfg::NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::check_cfg::NrNonIdempotentRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:737:44, endln:737:54 |vpiParent: @@ -93695,7 +93009,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:738:16, endln:738:54 |vpiName:Cfg.NrExecuteRegionRules |vpiActual: \_ref_obj: (Cfg), line:738:16, endln:738:19 @@ -93705,10 +93019,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (ariane_pkg::check_cfg::NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrExecuteRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:738:44, endln:738:54 |vpiParent: @@ -93729,7 +93044,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:739:16, endln:739:54 |vpiName:Cfg.NrCachedRegionRules |vpiActual: \_ref_obj: (Cfg), line:739:16, endln:739:19 @@ -93739,10 +93054,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (ariane_pkg::check_cfg::NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::check_cfg::NrCachedRegionRules |vpiOperand: \_ref_obj: (ariane_pkg::check_cfg::NrMaxRules), line:739:44, endln:739:54 |vpiParent: @@ -93763,7 +93079,7 @@ design: (work@top) |vpiOperand: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiParent: - \_begin: (ariane_pkg::check_cfg) + \_operation: , line:740:16, endln:740:38 |vpiName:Cfg.NrPMPEntries |vpiActual: \_ref_obj: (Cfg), line:740:16, endln:740:19 @@ -93773,10 +93089,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (ariane_pkg::check_cfg::NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:ariane_pkg::check_cfg::NrPMPEntries |vpiOperand: \_constant: , line:740:36, endln:740:38 |vpiInstance: @@ -93821,12 +93138,12 @@ design: (work@top) |vpiOperand: \_operation: , line:747:15, endln:747:30 |vpiParent: - \_function: (ariane_pkg::range_check), line:745:5, endln:748:30 + \_operation: , line:747:14, endln:747:57 |vpiOpType:19 |vpiOperand: \_ref_obj: (ariane_pkg::range_check::address), line:747:15, endln:747:22 |vpiParent: - \_function: (ariane_pkg::range_check), line:745:5, endln:748:30 + \_operation: , line:747:15, endln:747:30 |vpiName:address |vpiFullName:ariane_pkg::range_check::address |vpiActual: @@ -93847,7 +93164,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::range_check::address), line:747:36, endln:747:43 |vpiParent: - \_operation: , line:747:14, endln:747:57 + \_operation: , line:747:36, endln:747:56 |vpiName:address |vpiFullName:ariane_pkg::range_check::address |vpiActual: @@ -93860,7 +93177,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ariane_pkg::range_check::base), line:747:47, endln:747:51 |vpiParent: - \_operation: , line:747:36, endln:747:56 + \_operation: , line:747:47, endln:747:55 |vpiName:base |vpiFullName:ariane_pkg::range_check::base |vpiActual: @@ -93920,8 +93237,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:752:14, endln:752:16 - |vpiParent: - \_assignment: , line:752:7, endln:752:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -93929,7 +93244,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:752:7, endln:752:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions) + \_assignment: , line:752:7, endln:752:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass |vpiActual: @@ -93992,10 +93307,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NrNonIdempotentRules |vpiStmt: \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 |vpiParent: @@ -94026,17 +93342,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) - |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 - |vpiName:NonIdempotentAddrBase - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase + \_func_call: (range_check), line:754:19, endln:754:97 |vpiName:NonIdempotentAddrBase |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:57, endln:754:58 |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -94056,17 +93368,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) - |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 - |vpiName:NonIdempotentLength - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength + \_func_call: (range_check), line:754:19, endln:754:97 |vpiName:NonIdempotentLength |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:85, endln:754:86 |vpiParent: - \_func_call: (range_check), line:754:19, endln:754:97 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::NonIdempotentLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -94085,17 +93393,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_nonidempotent_regions::k), line:754:14, endln:754:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_nonidempotent_regions), line:753:67, endln:755:10 + \_bit_select: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:754:9, endln:754:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_nonidempotent_regions::k |vpiActual: @@ -94164,8 +93470,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:762:14, endln:762:16 - |vpiParent: - \_assignment: , line:762:7, endln:762:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -94173,7 +93477,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass), line:762:7, endln:762:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions) + \_assignment: , line:762:7, endln:762:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass |vpiActual: @@ -94236,10 +93540,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:ariane_pkg::is_inside_execute_regions::NrExecuteRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 |vpiParent: @@ -94270,17 +93575,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) - |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase + \_func_call: (range_check), line:764:19, endln:764:97 |vpiName:ExecuteRegionAddrBase |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:57, endln:764:58 |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 + \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -94300,17 +93601,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) - |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 - |vpiName:ExecuteRegionLength - |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength + \_func_call: (range_check), line:764:19, endln:764:97 |vpiName:ExecuteRegionLength |vpiFullName:ariane_pkg::is_inside_execute_regions::ExecuteRegionLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:85, endln:764:86 |vpiParent: - \_func_call: (range_check), line:764:19, endln:764:97 + \_bit_select: (ariane_pkg::is_inside_execute_regions::ExecuteRegionLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -94329,17 +93626,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_execute_regions::pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_execute_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_execute_regions::k), line:764:14, endln:764:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_execute_regions), line:763:67, endln:765:10 + \_bit_select: (ariane_pkg::is_inside_execute_regions::pass), line:764:9, endln:764:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_execute_regions::k |vpiActual: @@ -94409,8 +93704,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:771:14, endln:771:16 - |vpiParent: - \_assignment: , line:771:7, endln:771:16 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -94418,7 +93711,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass), line:771:7, endln:771:11 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions) + \_assignment: , line:771:7, endln:771:16 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass |vpiActual: @@ -94481,10 +93774,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:ariane_pkg::is_inside_cacheable_regions::NrCachedRegionRules |vpiStmt: \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 |vpiParent: @@ -94515,17 +93809,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) - |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 - |vpiName:CachedRegionAddrBase - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase + \_func_call: (range_check), line:773:19, endln:773:95 |vpiName:CachedRegionAddrBase |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:56, endln:773:57 |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionAddrBase) |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -94545,17 +93835,13 @@ design: (work@top) |vpiActual: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) - |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 - |vpiName:CachedRegionLength - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength + \_func_call: (range_check), line:773:19, endln:773:95 |vpiName:CachedRegionLength |vpiFullName:ariane_pkg::is_inside_cacheable_regions::CachedRegionLength |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:83, endln:773:84 |vpiParent: - \_func_call: (range_check), line:773:19, endln:773:95 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::CachedRegionLength) |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -94574,17 +93860,15 @@ design: (work@top) |vpiLhs: \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:ariane_pkg::is_inside_cacheable_regions::pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: \_ref_obj: (ariane_pkg::is_inside_cacheable_regions::k), line:773:14, endln:773:15 |vpiParent: - \_begin: (ariane_pkg::is_inside_cacheable_regions), line:772:66, endln:774:10 + \_bit_select: (ariane_pkg::is_inside_cacheable_regions::pass), line:773:9, endln:773:16 |vpiName:k |vpiFullName:ariane_pkg::is_inside_cacheable_regions::k |vpiActual: @@ -95479,24 +94763,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sext32::operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (ariane_pkg::sext32::operand) - |vpiParent: - \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand + \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 |vpiName:operand |vpiFullName:ariane_pkg::sext32::operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiIndex: \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (ariane_pkg::sext32::operand), line:1374:48, endln:1374:55 - |vpiParent: - \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 - |vpiName:operand - |vpiFullName:ariane_pkg::sext32::operand - |vpiDefName:operand + \_function: (ariane_pkg::sext32), line:1373:5, endln:1375:16 + |vpiName:operand + |vpiFullName:ariane_pkg::sext32::operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -95544,24 +94826,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -95570,24 +94850,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::uj_imm::instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (ariane_pkg::uj_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiIndex: \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::uj_imm::instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::uj_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::uj_imm), line:1380:5, endln:1382:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::uj_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -95637,24 +94915,22 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::i_imm::instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (ariane_pkg::i_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i + \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiIndex: \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::i_imm::instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::i_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::i_imm), line:1384:5, endln:1386:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::i_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -95702,62 +94978,56 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (ariane_pkg::sb_imm::instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (ariane_pkg::sb_imm::instruction_i) - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 |vpiName:instruction_i |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiIndex: \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (ariane_pkg::sb_imm::instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 - |vpiName:instruction_i - |vpiFullName:ariane_pkg::sb_imm::instruction_i - |vpiDefName:instruction_i + \_function: (ariane_pkg::sb_imm), line:1388:5, endln:1390:16 + |vpiName:instruction_i + |vpiFullName:ariane_pkg::sb_imm::instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -95831,23 +95101,24 @@ design: (work@top) |vpiOperand: \_bit_select: (ariane_pkg::data_align::addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (ariane_pkg::data_align::addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:ariane_pkg::data_align::addr + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:ariane_pkg::data_align::addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiIndex: \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (ariane_pkg::data_align::addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (addr), line:1398:64, endln:1398:68 - |vpiName:addr - |vpiDefName:addr + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:ariane_pkg::data_align::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -95903,22 +95174,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1401:49, endln:1401:72 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:54 - |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_part_select: data (ariane_pkg::data_align::data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -95927,19 +95198,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_case_item: , line:1401:13, endln:1401:73 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -95962,22 +95233,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1402:49, endln:1402:108 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:54 - |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -95986,19 +95257,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:78 - |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -96007,26 +95278,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data (ariane_pkg::data_align::data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_case_item: , line:1402:13, endln:1402:109 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -96049,22 +95320,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1403:49, endln:1403:109 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:54 - |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -96073,19 +95344,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:78 - |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -96094,26 +95365,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data (ariane_pkg::data_align::data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_case_item: , line:1403:13, endln:1403:110 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -96136,22 +95407,22 @@ design: (work@top) |vpiRhs: \_operation: , line:1404:49, endln:1404:109 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:54 - |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -96160,19 +95431,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:78 - |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -96181,26 +95452,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data (ariane_pkg::data_align::data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_case_item: , line:1404:13, endln:1404:110 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -96223,31 +95494,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1405:32, endln:1405:57 |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 + \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:33, endln:1405:37 - |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1405:21, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1405:45, endln:1405:49 - |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1405:21, endln:1405:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -96256,7 +95527,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1405:21, endln:1405:29 |vpiParent: - \_case_item: , line:1405:13, endln:1405:58 + \_assignment: , line:1405:21, endln:1405:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -96276,31 +95547,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1406:32, endln:1406:57 |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 + \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:33, endln:1406:37 - |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1406:21, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1406:45, endln:1406:49 - |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1406:21, endln:1406:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -96309,7 +95580,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1406:21, endln:1406:29 |vpiParent: - \_case_item: , line:1406:13, endln:1406:58 + \_assignment: , line:1406:21, endln:1406:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -96329,31 +95600,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1407:32, endln:1407:57 |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 + \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:33, endln:1407:37 - |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1407:21, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1407:45, endln:1407:49 - |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1407:21, endln:1407:57 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -96362,7 +95633,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1407:21, endln:1407:29 |vpiParent: - \_case_item: , line:1407:13, endln:1407:58 + \_assignment: , line:1407:21, endln:1407:57 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -96382,31 +95653,31 @@ design: (work@top) |vpiRhs: \_operation: , line:1408:32, endln:1408:56 |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 + \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:33, endln:1408:37 - |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1408:21, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (ariane_pkg::data_align::data), line:1408:45, endln:1408:49 - |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 - |vpiName:data - |vpiFullName:ariane_pkg::data_align::data - |vpiDefName:data + \_assignment: , line:1408:21, endln:1408:56 + |vpiName:data + |vpiFullName:ariane_pkg::data_align::data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -96415,7 +95686,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (ariane_pkg::data_align::data_tmp), line:1408:21, endln:1408:29 |vpiParent: - \_case_item: , line:1408:13, endln:1408:57 + \_assignment: , line:1408:21, endln:1408:56 |vpiName:data_tmp |vpiFullName:ariane_pkg::data_align::data_tmp |vpiActual: @@ -96425,19 +95696,19 @@ design: (work@top) |vpiParent: \_begin: (ariane_pkg::data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:ariane_pkg::data_align::data_tmp - |vpiDefName:data_tmp + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:ariane_pkg::data_align::data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_begin: (ariane_pkg::data_align) + \_part_select: data_tmp (ariane_pkg::data_align::data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -96521,14 +95792,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1419:20, endln:1427:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -96611,14 +95882,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1428:20, endln:1438:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -96725,14 +95996,14 @@ design: (work@top) \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (ariane_pkg::be_gen::addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:ariane_pkg::be_gen::addr - |vpiDefName:addr + \_begin: (ariane_pkg::be_gen), line:1439:20, endln:1450:16 + |vpiName:addr + |vpiFullName:ariane_pkg::be_gen::addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -102894,16 +102165,12 @@ design: (work@top) \_param_assign: , line:1979:16, endln:1979:40 |vpiRhs: \_bit_select: (FpFmtMask), line:1979:26, endln:1979:40 - |vpiParent: - \_ref_obj: (FpFmtMask) - |vpiName:FpFmtMask |vpiName:FpFmtMask |vpiIndex: - \_ref_obj: (FpFmtMask.fmt), line:1979:36, endln:1979:39 + \_ref_obj: (fmt), line:1979:36, endln:1979:39 |vpiParent: \_bit_select: (FpFmtMask), line:1979:26, endln:1979:40 |vpiName:fmt - |vpiFullName:FpFmtMask.fmt |vpiLhs: \_parameter: (DEBUGME), line:1979:16, endln:1979:40 |vpiLocalParam:1 @@ -102912,16 +102179,12 @@ design: (work@top) \_param_assign: , line:1980:16, endln:1980:44 |vpiRhs: \_bit_select: (FmtUnitTypes), line:1980:27, endln:1980:44 - |vpiParent: - \_ref_obj: (FmtUnitTypes) - |vpiName:FmtUnitTypes |vpiName:FmtUnitTypes |vpiIndex: - \_ref_obj: (FmtUnitTypes.fmt), line:1980:40, endln:1980:43 + \_ref_obj: (fmt), line:1980:40, endln:1980:43 |vpiParent: \_bit_select: (FmtUnitTypes), line:1980:27, endln:1980:44 |vpiName:fmt - |vpiFullName:FmtUnitTypes.fmt |vpiLhs: \_parameter: (DEBUGME2), line:1980:16, endln:1980:44 |vpiLocalParam:1 @@ -102934,17 +102197,13 @@ design: (work@top) |vpiOperand: \_bit_select: (FpFmtMask), line:1981:28, endln:1981:42 |vpiParent: - \_ref_obj: (FpFmtMask) - |vpiParent: - \_operation: , line:1981:28, endln:1981:88 - |vpiName:FpFmtMask + \_operation: , line:1981:28, endln:1981:88 |vpiName:FpFmtMask |vpiIndex: - \_ref_obj: (FpFmtMask.fmt), line:1981:38, endln:1981:41 + \_ref_obj: (fmt), line:1981:38, endln:1981:41 |vpiParent: \_bit_select: (FpFmtMask), line:1981:28, endln:1981:42 |vpiName:fmt - |vpiFullName:FpFmtMask.fmt |vpiOperand: \_operation: , line:1981:47, endln:1981:87 |vpiParent: @@ -102953,15 +102212,12 @@ design: (work@top) |vpiOperand: \_bit_select: (FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiIndex: \_ref_obj: (fmt), line:1981:60, endln:1981:63 |vpiParent: - \_operation: , line:1981:28, endln:1981:88 + \_bit_select: (FmtUnitTypes), line:1981:47, endln:1981:64 |vpiName:fmt |vpiOperand: \_constant: , line:1981:68, endln:1981:79 @@ -102983,17 +102239,13 @@ design: (work@top) |vpiOperand: \_bit_select: (FpFmtMask), line:1983:9, endln:1983:23 |vpiParent: - \_ref_obj: (FpFmtMask) - |vpiParent: - \_operation: , line:1983:9, endln:1983:69 - |vpiName:FpFmtMask + \_operation: , line:1983:9, endln:1983:69 |vpiName:FpFmtMask |vpiIndex: - \_ref_obj: (FpFmtMask.fmt), line:1983:19, endln:1983:22 + \_ref_obj: (fmt), line:1983:19, endln:1983:22 |vpiParent: \_bit_select: (FpFmtMask), line:1983:9, endln:1983:23 |vpiName:fmt - |vpiFullName:FpFmtMask.fmt |vpiOperand: \_operation: , line:1983:28, endln:1983:68 |vpiParent: @@ -103002,15 +102254,12 @@ design: (work@top) |vpiOperand: \_bit_select: (FmtUnitTypes), line:1983:28, endln:1983:45 |vpiParent: - \_ref_obj: (FmtUnitTypes) - |vpiParent: - \_operation: , line:1983:28, endln:1983:68 - |vpiName:FmtUnitTypes + \_operation: , line:1983:28, endln:1983:68 |vpiName:FmtUnitTypes |vpiIndex: \_ref_obj: (fmt), line:1983:41, endln:1983:44 |vpiParent: - \_operation: , line:1983:9, endln:1983:69 + \_bit_select: (FmtUnitTypes), line:1983:28, endln:1983:45 |vpiName:fmt |vpiOperand: \_constant: , line:1983:49, endln:1983:60 @@ -103052,7 +102301,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (dst_fmt_i), line:1987:39, endln:1987:48 |vpiParent: - \_operation: , line:1987:25, endln:1987:56 + \_operation: , line:1987:39, endln:1987:55 |vpiName:dst_fmt_i |vpiOperand: \_ref_obj: (fmt), line:1987:52, endln:1987:55 @@ -103556,18 +102805,15 @@ design: (work@top) \_hier_path: (Implementation.UnitTypes[opgrp]), line:2021:29, endln:2021:60 |vpiName:Implementation |vpiActual: - \_bit_select: (Implementation.UnitTypes[opgrp]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[opgrp].UnitTypes), line:2021:44, endln:2021:53 |vpiParent: - \_ref_obj: (Implementation.UnitTypes[opgrp]) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[opgrp]), line:2021:29, endln:2021:60 - |vpiName:Implementation.UnitTypes[opgrp] + \_hier_path: (Implementation.UnitTypes[opgrp]), line:2021:29, endln:2021:60 |vpiName:UnitTypes - |vpiFullName:Implementation.UnitTypes[opgrp] + |vpiFullName:Implementation.UnitTypes[opgrp].UnitTypes |vpiIndex: \_ref_obj: (Implementation.UnitTypes[opgrp].opgrp), line:2021:54, endln:2021:59 |vpiParent: - \_bit_select: (Implementation.UnitTypes[opgrp]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[opgrp].UnitTypes), line:2021:44, endln:2021:53 |vpiName:opgrp |vpiFullName:Implementation.UnitTypes[opgrp].opgrp |vpiLhs: @@ -108518,7 +107764,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:2050:23, endln:2050:28 |vpiParent: - \_operation: , line:2045:53, endln:2051:6 + \_operation: , line:2050:23, endln:2050:35 |vpiName:XFVEC |vpiOperand: \_ref_obj: (XF8), line:2050:32, endln:2050:35 @@ -108533,7 +107779,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:2050:37, endln:2050:42 |vpiParent: - \_operation: , line:2045:53, endln:2051:6 + \_operation: , line:2050:37, endln:2050:63 |vpiName:XFVEC |vpiOperand: \_operation: , line:2050:47, endln:2050:62 @@ -108543,7 +107789,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16), line:2050:47, endln:2050:51 |vpiParent: - \_operation: , line:2050:37, endln:2050:63 + \_operation: , line:2050:47, endln:2050:62 |vpiName:XF16 |vpiOperand: \_ref_obj: (XF16ALT), line:2050:55, endln:2050:62 @@ -108767,18 +108013,15 @@ design: (work@top) \_hier_path: (FPU_IMPLEMENTATION.UnitTypes[1]), line:2066:28, endln:2066:59 |vpiName:FPU_IMPLEMENTATION |vpiActual: - \_bit_select: (FPU_IMPLEMENTATION.UnitTypes[1]), line:2066:47, endln:2066:56 + \_bit_select: (FPU_IMPLEMENTATION.UnitTypes[1].UnitTypes), line:2066:47, endln:2066:56 |vpiParent: - \_ref_obj: (FPU_IMPLEMENTATION.UnitTypes[1]) - |vpiParent: - \_hier_path: (FPU_IMPLEMENTATION.UnitTypes[1]), line:2066:28, endln:2066:59 - |vpiName:FPU_IMPLEMENTATION.UnitTypes[1] + \_hier_path: (FPU_IMPLEMENTATION.UnitTypes[1]), line:2066:28, endln:2066:59 |vpiName:UnitTypes - |vpiFullName:FPU_IMPLEMENTATION.UnitTypes[1] + |vpiFullName:FPU_IMPLEMENTATION.UnitTypes[1].UnitTypes |vpiIndex: \_constant: , line:2066:57, endln:2066:58 |vpiParent: - \_bit_select: (FPU_IMPLEMENTATION.UnitTypes[1]), line:2066:47, endln:2066:56 + \_bit_select: (FPU_IMPLEMENTATION.UnitTypes[1].UnitTypes), line:2066:47, endln:2066:56 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -112753,10 +111996,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -112794,10 +112038,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -112814,10 +112059,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -112853,10 +112099,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -112873,10 +112120,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -112901,10 +112149,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -112914,7 +112163,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -112937,10 +112186,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -112950,7 +112200,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -112973,10 +112223,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -112986,7 +112237,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -113009,10 +112260,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -113246,10 +112498,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -113280,23 +112533,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -113312,23 +112561,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -113345,25 +112590,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_nonidempotent_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -113510,10 +112749,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -113544,23 +112784,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -113576,23 +112812,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -113609,25 +112841,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_execute_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -113776,10 +113002,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -113810,23 +113037,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -113842,23 +113065,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -113875,25 +113094,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.is_inside_cacheable_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -114079,7 +113292,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -114281,7 +113494,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -114494,7 +113707,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -114639,7 +113852,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -114954,30 +114167,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -115027,30 +114232,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -115059,30 +114256,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -115134,30 +114323,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -115207,78 +114388,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -115368,32 +114527,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -115464,21 +114615,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -115487,21 +114636,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -115527,21 +114674,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -115550,21 +114695,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -115573,28 +114716,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -115620,21 +114761,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -115643,21 +114782,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -115666,28 +114803,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -115713,21 +114848,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -115736,21 +114869,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -115759,28 +114890,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -115806,32 +114935,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -115863,32 +114988,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -115920,32 +115041,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -115977,32 +115094,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -116021,21 +115134,19 @@ design: (work@top) |vpiParent: \_begin: (work@top.i_ariane.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -116123,16 +115234,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -116215,16 +115324,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -116331,16 +115438,14 @@ design: (work@top) \_begin: (work@top.i_ariane.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -120844,10 +119949,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -120885,10 +119991,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -120905,10 +120012,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -120944,10 +120052,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -120964,10 +120073,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -120992,10 +120102,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -121005,7 +120116,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -121028,10 +120139,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -121041,7 +120153,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -121064,10 +120176,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -121077,7 +120190,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -121100,10 +120213,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.ex_stage_i.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -121337,10 +120451,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -121371,23 +120486,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -121403,23 +120514,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: @@ -121436,25 +120543,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_nonidempotent_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -121601,10 +120702,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -121635,23 +120737,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -121667,23 +120765,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: @@ -121700,25 +120794,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_execute_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -121867,10 +120955,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -121901,23 +120990,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -121933,23 +121018,19 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: @@ -121966,25 +121047,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.is_inside_cacheable_regions.k |vpiActual: \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -122170,7 +121245,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -122372,7 +121447,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -122585,7 +121660,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -122730,7 +121805,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -123045,30 +122120,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.ex_stage_i.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.ex_stage_i.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -123118,30 +122185,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -123150,30 +122209,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -123225,30 +122276,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -123298,78 +122341,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -123459,32 +122480,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -123555,21 +122568,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -123578,21 +122589,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -123618,21 +122627,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -123641,21 +122648,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -123664,28 +122669,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -123711,21 +122714,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -123734,21 +122735,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -123757,28 +122756,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -123804,21 +122801,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -123827,21 +122822,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -123850,28 +122843,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -123897,32 +122888,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -123954,32 +122941,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -124011,32 +122994,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -124068,32 +123047,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -124112,21 +123087,19 @@ design: (work@top) |vpiParent: \_begin: (work@top.i_ariane.ex_stage_i.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -124214,16 +123187,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -124306,16 +123277,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -124422,16 +123391,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -128517,10 +127484,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (RASDepth), line:734:20, endln:734:28 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.RASDepth), line:734:20, endln:734:28 |vpiParent: \_hier_path: (Cfg.RASDepth), line:734:16, endln:734:28 |vpiName:RASDepth + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.RASDepth |vpiActual: \_typespec_member: (RASDepth), line:685:41, endln:685:49 |vpiOperand: @@ -128558,10 +127526,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:30, endln:735:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries), line:735:30, endln:735:40 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:26, endln:735:40 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiName:$clog2 @@ -128578,10 +127547,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BTBEntries), line:735:50, endln:735:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries), line:735:50, endln:735:60 |vpiParent: \_hier_path: (Cfg.BTBEntries), line:735:46, endln:735:60 |vpiName:BTBEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BTBEntries |vpiActual: \_typespec_member: (BTBEntries), line:686:41, endln:686:51 |vpiStmt: @@ -128617,10 +127587,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:30, endln:736:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries), line:736:30, endln:736:40 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:26, endln:736:40 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiName:$clog2 @@ -128637,10 +127608,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (BHTEntries), line:736:50, endln:736:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries), line:736:50, endln:736:60 |vpiParent: \_hier_path: (Cfg.BHTEntries), line:736:46, endln:736:60 |vpiName:BHTEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.BHTEntries |vpiActual: \_typespec_member: (BHTEntries), line:687:41, endln:687:51 |vpiStmt: @@ -128665,10 +127637,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:737:20, endln:737:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrNonIdempotentRules), line:737:20, endln:737:40 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:737:16, endln:737:40 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiOperand: @@ -128678,7 +127651,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:738:9, endln:738:56 |vpiParent: @@ -128701,10 +127674,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:738:20, endln:738:40 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrExecuteRegionRules), line:738:20, endln:738:40 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:738:16, endln:738:40 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiOperand: @@ -128714,7 +127688,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:739:9, endln:739:56 |vpiParent: @@ -128737,10 +127711,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:739:20, endln:739:39 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrCachedRegionRules), line:739:20, endln:739:39 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:739:16, endln:739:39 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiOperand: @@ -128750,7 +127725,7 @@ design: (work@top) |vpiName:NrMaxRules |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrMaxRules |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.NrMaxRules), line:682:16, endln:682:26 + \_parameter: (ariane_pkg::NrMaxRules), line:682:16, endln:682:26 |vpiStmt: \_immediate_assert: , line:740:9, endln:740:40 |vpiParent: @@ -128773,10 +127748,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:731:53, endln:731:56 |vpiActual: - \_ref_obj: (NrPMPEntries), line:740:20, endln:740:32 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrPMPEntries), line:740:20, endln:740:32 |vpiParent: \_hier_path: (Cfg.NrPMPEntries), line:740:16, endln:740:32 |vpiName:NrPMPEntries + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.check_cfg.NrPMPEntries |vpiActual: \_typespec_member: (NrPMPEntries), line:703:41, endln:703:53 |vpiOperand: @@ -128951,7 +127927,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions), line:753:7, endln:753:10 |vpiParent: @@ -128983,7 +127959,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiCondition: \_operation: , line:753:32, endln:753:60 |vpiParent: @@ -128996,7 +127972,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiOperand: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiParent: @@ -129010,10 +127986,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_ref_obj: (NrNonIdempotentRules), line:753:40, endln:753:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NrNonIdempotentRules), line:753:40, endln:753:60 |vpiParent: \_hier_path: (Cfg.NrNonIdempotentRules), line:753:36, endln:753:60 |vpiName:NrNonIdempotentRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NrNonIdempotentRules |vpiActual: \_typespec_member: (NrNonIdempotentRules), line:689:41, endln:689:61 |vpiStmt: @@ -129044,25 +128021,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 - |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase - |vpiActual: - \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 + \_hier_path: (Cfg.NonIdempotentAddrBase[k]), line:754:31, endln:754:59 |vpiName:NonIdempotentAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase + |vpiActual: + \_typespec_member: (NonIdempotentAddrBase), line:690:41, endln:690:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k), line:754:57, endln:754:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k), line:754:57, endln:754:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].NonIdempotentAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiParent: @@ -129076,25 +128049,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:750:76, endln:750:79 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) - |vpiParent: - \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 - |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength - |vpiActual: - \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 + \_hier_path: (Cfg.NonIdempotentLength[k]), line:754:61, endln:754:87 |vpiName:NonIdempotentLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength + |vpiActual: + \_typespec_member: (NonIdempotentLength), line:691:41, endln:691:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength.k), line:754:85, endln:754:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k), line:754:85, endln:754:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].NonIdempotentLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.NonIdempotentLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.Cfg.NonIdempotentLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.address), line:754:89, endln:754:96 |vpiParent: @@ -129109,25 +128078,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass) - |vpiParent: - \_assignment: , line:754:9, endln:754:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_assignment: , line:754:9, endln:754:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass.k), line:754:14, endln:754:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:754:14, endln:754:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:754:9, endln:754:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.k), line:753:25, endln:753:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_int_var: (ariane_pkg::is_inside_nonidempotent_regions::k), line:753:25, endln:753:26 |vpiStmt: \_return_stmt: , line:756:7, endln:756:13 |vpiParent: @@ -129144,7 +128107,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_nonidempotent_regions.pass), line:751:29, endln:751:33 + \_logic_var: (ariane_pkg::is_inside_nonidempotent_regions::pass), line:751:29, endln:751:33 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab2/dut.sv, line:2091:13, endln:2106:15 |vpiTaskFunc: @@ -129215,7 +128178,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions), line:763:7, endln:763:10 |vpiParent: @@ -129247,7 +128210,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiCondition: \_operation: , line:763:32, endln:763:60 |vpiParent: @@ -129260,7 +128223,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiOperand: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiParent: @@ -129274,10 +128237,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_ref_obj: (NrExecuteRegionRules), line:763:40, endln:763:60 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.NrExecuteRegionRules), line:763:40, endln:763:60 |vpiParent: \_hier_path: (Cfg.NrExecuteRegionRules), line:763:36, endln:763:60 |vpiName:NrExecuteRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.NrExecuteRegionRules |vpiActual: \_typespec_member: (NrExecuteRegionRules), line:692:41, endln:692:61 |vpiStmt: @@ -129308,25 +128272,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 - |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase - |vpiActual: - \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 + \_hier_path: (Cfg.ExecuteRegionAddrBase[k]), line:764:31, endln:764:59 |vpiName:ExecuteRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase + |vpiActual: + \_typespec_member: (ExecuteRegionAddrBase), line:693:41, endln:693:62 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase.k), line:764:57, endln:764:58 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k), line:764:57, endln:764:58 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].ExecuteRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiParent: @@ -129340,25 +128300,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:759:70, endln:759:73 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) - |vpiParent: - \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 - |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength - |vpiActual: - \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 + \_hier_path: (Cfg.ExecuteRegionLength[k]), line:764:61, endln:764:87 |vpiName:ExecuteRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength + |vpiActual: + \_typespec_member: (ExecuteRegionLength), line:694:41, endln:694:60 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength.k), line:764:85, endln:764:86 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k), line:764:85, endln:764:86 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].ExecuteRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.ExecuteRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.Cfg.ExecuteRegionLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.address), line:764:89, endln:764:96 |vpiParent: @@ -129373,25 +128329,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass) - |vpiParent: - \_assignment: , line:764:9, endln:764:97 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_assignment: , line:764:9, endln:764:97 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass.k), line:764:14, endln:764:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:764:14, endln:764:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:764:9, endln:764:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.k), line:763:25, endln:763:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_int_var: (ariane_pkg::is_inside_execute_regions::k), line:763:25, endln:763:26 |vpiStmt: \_return_stmt: , line:766:7, endln:766:13 |vpiParent: @@ -129408,7 +128358,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_execute_regions.pass), line:761:29, endln:761:33 + \_logic_var: (ariane_pkg::is_inside_execute_regions::pass), line:761:29, endln:761:33 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab2/dut.sv, line:2091:13, endln:2106:15 |vpiTaskFunc: @@ -129481,7 +128431,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiStmt: \_for_stmt: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions), line:772:7, endln:772:10 |vpiParent: @@ -129513,7 +128463,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiCondition: \_operation: , line:772:32, endln:772:59 |vpiParent: @@ -129526,7 +128476,7 @@ design: (work@top) |vpiName:k |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiOperand: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiParent: @@ -129540,10 +128490,11 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_ref_obj: (NrCachedRegionRules), line:772:40, endln:772:59 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.NrCachedRegionRules), line:772:40, endln:772:59 |vpiParent: \_hier_path: (Cfg.NrCachedRegionRules), line:772:36, endln:772:59 |vpiName:NrCachedRegionRules + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.NrCachedRegionRules |vpiActual: \_typespec_member: (NrCachedRegionRules), line:695:41, endln:695:60 |vpiStmt: @@ -129574,25 +128525,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) - |vpiParent: - \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 - |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase - |vpiActual: - \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 + \_hier_path: (Cfg.CachedRegionAddrBase[k]), line:773:31, endln:773:58 |vpiName:CachedRegionAddrBase - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase + |vpiActual: + \_typespec_member: (CachedRegionAddrBase), line:696:41, endln:696:61 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase.k), line:773:56, endln:773:57 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k), line:773:56, endln:773:57 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].CachedRegionAddrBase) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionAddrBase.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionAddrBase[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiParent: @@ -129606,25 +128553,21 @@ design: (work@top) |vpiActual: \_io_decl: (Cfg), line:769:72, endln:769:75 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) - |vpiParent: - \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 - |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength - |vpiActual: - \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 + \_hier_path: (Cfg.CachedRegionLength[k]), line:773:60, endln:773:85 |vpiName:CachedRegionLength - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength + |vpiActual: + \_typespec_member: (CachedRegionLength), line:697:41, endln:697:59 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength.k), line:773:83, endln:773:84 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k), line:773:83, endln:773:84 |vpiParent: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].CachedRegionLength) |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.CachedRegionLength.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.Cfg.CachedRegionLength[k].k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiArgument: \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.address), line:773:87, endln:773:94 |vpiParent: @@ -129639,25 +128582,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass) - |vpiParent: - \_assignment: , line:773:9, endln:773:95 - |vpiName:pass - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_assignment: , line:773:9, endln:773:95 |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass + |vpiActual: + \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 |vpiIndex: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass.k), line:773:14, endln:773:15 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:773:14, endln:773:15 |vpiParent: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:773:9, endln:773:16 |vpiName:k - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass.k + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k |vpiActual: - \_int_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.k), line:772:25, endln:772:26 - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_int_var: (ariane_pkg::is_inside_cacheable_regions::k), line:772:25, endln:772:26 |vpiStmt: \_return_stmt: , line:775:7, endln:775:13 |vpiParent: @@ -129674,7 +128611,7 @@ design: (work@top) |vpiName:pass |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_inside_cacheable_regions.pass), line:770:39, endln:770:43 + \_logic_var: (ariane_pkg::is_inside_cacheable_regions::pass), line:770:39, endln:770:43 |vpiInstance: \_module_inst: work@fpu_wrap (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i), file:${SURELOG_DIR}/tests/ArianeElab2/dut.sv, line:2091:13, endln:2106:15 |vpiTaskFunc: @@ -129843,7 +128780,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs1_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs1_fpr), line:1143:25, endln:1155:12 |vpiParent: @@ -130045,7 +128982,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs2_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rs2_fpr), line:1160:25, endln:1171:12 |vpiParent: @@ -130258,7 +129195,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_imm_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_imm_fpr), line:1177:25, endln:1184:12 |vpiParent: @@ -130403,7 +129340,7 @@ design: (work@top) |vpiName:FP_PRESENT |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rd_fpr.FP_PRESENT |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.FP_PRESENT), line:836:20, endln:836:30 + \_parameter: (ariane_pkg::FP_PRESENT), line:836:20, endln:836:30 |vpiStmt: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.is_rd_fpr), line:1189:25, endln:1201:12 |vpiParent: @@ -130718,30 +129655,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:33, endln:1374:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand) - |vpiParent: - \_operation: , line:1374:32, endln:1374:45 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:32, endln:1374:45 |vpiName:operand |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiIndex: - \_constant: , line:1374:41, endln:1374:43 |vpiActual: \_io_decl: (operand), line:1373:59, endln:1373:66 + |vpiIndex: + \_constant: , line:1374:41, endln:1374:43 |vpiOperand: - \_part_select: , line:1374:48, endln:1374:61 + \_part_select: operand (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:48, endln:1374:61 |vpiParent: - \_ref_obj: operand (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand), line:1374:48, endln:1374:55 - |vpiParent: - \_operation: , line:1374:16, endln:1374:62 - |vpiName:operand - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand - |vpiDefName:operand - |vpiActual: - \_io_decl: (operand), line:1373:59, endln:1373:66 + \_operation: , line:1374:16, endln:1374:62 + |vpiName:operand + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sext32.operand + |vpiDefName:operand + |vpiActual: + \_io_decl: (operand), line:1373:59, endln:1373:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1374:56, endln:1374:58 @@ -130791,30 +129720,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:38, endln:1381:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:37, endln:1381:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:37, endln:1381:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:52, endln:1381:54 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:52, endln:1381:54 |vpiOperand: - \_part_select: , line:1381:59, endln:1381:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:59, endln:1381:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:59, endln:1381:72 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:73, endln:1381:75 @@ -130823,30 +129744,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:81, endln:1381:98 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i) - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiIndex: - \_constant: , line:1381:95, endln:1381:97 |vpiActual: \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + |vpiIndex: + \_constant: , line:1381:95, endln:1381:97 |vpiOperand: - \_part_select: , line:1381:100, endln:1381:120 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:100, endln:1381:120 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i), line:1381:100, endln:1381:113 - |vpiParent: - \_operation: , line:1381:16, endln:1381:128 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1380:69, endln:1380:82 + \_operation: , line:1381:16, endln:1381:128 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.uj_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1380:69, endln:1380:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1381:114, endln:1381:116 @@ -130898,30 +129811,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:38, endln:1385:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i) - |vpiParent: - \_operation: , line:1385:37, endln:1385:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:37, endln:1385:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiIndex: - \_constant: , line:1385:52, endln:1385:54 |vpiActual: \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + |vpiIndex: + \_constant: , line:1385:52, endln:1385:54 |vpiOperand: - \_part_select: , line:1385:59, endln:1385:79 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:59, endln:1385:79 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i), line:1385:59, endln:1385:72 - |vpiParent: - \_operation: , line:1385:16, endln:1385:81 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1384:68, endln:1384:81 + \_operation: , line:1385:16, endln:1385:81 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.i_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1384:68, endln:1384:81 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1385:73, endln:1385:75 @@ -130971,78 +129876,56 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:38, endln:1389:55 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:37, endln:1389:56 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:37, endln:1389:56 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:52, endln:1389:54 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:52, endln:1389:54 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:59, endln:1389:76 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:73, endln:1389:75 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:73, endln:1389:75 |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:78, endln:1389:94 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i) - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 |vpiName:instruction_i |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiIndex: - \_constant: , line:1389:92, endln:1389:93 |vpiActual: \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + |vpiIndex: + \_constant: , line:1389:92, endln:1389:93 |vpiOperand: - \_part_select: , line:1389:96, endln:1389:116 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:96, endln:1389:116 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:96, endln:1389:109 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:110, endln:1389:112 |vpiRightRange: \_constant: , line:1389:113, endln:1389:115 |vpiOperand: - \_part_select: , line:1389:118, endln:1389:137 + \_part_select: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:118, endln:1389:137 |vpiParent: - \_ref_obj: instruction_i (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i), line:1389:118, endln:1389:131 - |vpiParent: - \_operation: , line:1389:16, endln:1389:145 - |vpiName:instruction_i - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i - |vpiDefName:instruction_i - |vpiActual: - \_io_decl: (instruction_i), line:1388:69, endln:1388:82 + \_operation: , line:1389:16, endln:1389:145 + |vpiName:instruction_i + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.sb_imm.instruction_i + |vpiDefName:instruction_i + |vpiActual: + \_io_decl: (instruction_i), line:1388:69, endln:1388:82 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1389:132, endln:1389:134 @@ -131132,32 +130015,24 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:34, endln:1398:41 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr) - |vpiParent: - \_operation: , line:1398:34, endln:1398:61 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:34, endln:1398:61 |vpiName:addr |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiIndex: - \_constant: , line:1398:39, endln:1398:40 |vpiActual: \_io_decl: (addr), line:1396:62, endln:1396:66 + |vpiIndex: + \_constant: , line:1398:39, endln:1398:40 |vpiOperand: \_constant: , line:1398:45, endln:1398:61 |vpiOperand: - \_part_select: , line:1398:64, endln:1398:73 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:64, endln:1398:73 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr), line:1398:64, endln:1398:68 - |vpiParent: - \_operation: , line:1398:32, endln:1398:74 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1396:62, endln:1396:66 + \_operation: , line:1398:32, endln:1398:74 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1396:62, endln:1396:66 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1398:69, endln:1398:70 @@ -131209,7 +130084,7 @@ design: (work@top) |vpiName:addr_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.addr_tmp), line:1398:21, endln:1398:29 + \_logic_var: (ariane_pkg::data_align::addr_tmp), line:1398:21, endln:1398:29 |vpiCaseItem: \_case_item: , line:1401:13, endln:1401:73 |vpiParent: @@ -131228,21 +130103,19 @@ design: (work@top) \_assignment: , line:1401:21, endln:1401:72 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:54 - |vpiParent: - \_operation: , line:1401:49, endln:1401:72 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1401:49, endln:1401:72 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:55, endln:1401:68 |vpiParent: - \_part_select: , line:1401:50, endln:1401:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1401:50, endln:1401:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:55, endln:1401:62 @@ -131251,21 +130124,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1401:69, endln:1401:70 |vpiLhs: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1401:21, endln:1401:72 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1401:21, endln:1401:72 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1401:30, endln:1401:43 |vpiParent: - \_part_select: , line:1401:21, endln:1401:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1401:21, endln:1401:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1401:30, endln:1401:37 @@ -131291,21 +130162,19 @@ design: (work@top) \_assignment: , line:1402:21, endln:1402:108 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:71 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:54 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:55, endln:1402:68 |vpiParent: - \_part_select: , line:1402:50, endln:1402:71 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:50, endln:1402:71 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:55, endln:1402:62 @@ -131314,21 +130183,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1402:69, endln:1402:70 |vpiOperand: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:78 - |vpiParent: - \_operation: , line:1402:49, endln:1402:108 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1402:49, endln:1402:108 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:79, endln:1402:92 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:79, endln:1402:86 @@ -131337,28 +130204,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1402:93, endln:1402:106 |vpiParent: - \_part_select: , line:1402:74, endln:1402:107 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1402:74, endln:1402:107 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:93, endln:1402:100 |vpiOperand: \_constant: , line:1402:105, endln:1402:106 |vpiLhs: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1402:21, endln:1402:108 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1402:21, endln:1402:108 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1402:30, endln:1402:43 |vpiParent: - \_part_select: , line:1402:21, endln:1402:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1402:21, endln:1402:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1402:30, endln:1402:37 @@ -131384,21 +130249,19 @@ design: (work@top) \_assignment: , line:1403:21, endln:1403:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:54 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:55, endln:1403:69 |vpiParent: - \_part_select: , line:1403:50, endln:1403:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:50, endln:1403:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:55, endln:1403:62 @@ -131407,21 +130270,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1403:70, endln:1403:71 |vpiOperand: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:78 - |vpiParent: - \_operation: , line:1403:49, endln:1403:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1403:49, endln:1403:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:79, endln:1403:92 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:79, endln:1403:86 @@ -131430,28 +130291,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1403:93, endln:1403:107 |vpiParent: - \_part_select: , line:1403:74, endln:1403:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1403:74, endln:1403:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:93, endln:1403:100 |vpiOperand: \_constant: , line:1403:105, endln:1403:107 |vpiLhs: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1403:21, endln:1403:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1403:21, endln:1403:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1403:30, endln:1403:43 |vpiParent: - \_part_select: , line:1403:21, endln:1403:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1403:21, endln:1403:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1403:30, endln:1403:37 @@ -131477,21 +130336,19 @@ design: (work@top) \_assignment: , line:1404:21, endln:1404:109 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:72 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:54 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:55, endln:1404:69 |vpiParent: - \_part_select: , line:1404:50, endln:1404:72 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:50, endln:1404:72 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:55, endln:1404:62 @@ -131500,21 +130357,19 @@ design: (work@top) |vpiRightRange: \_constant: , line:1404:70, endln:1404:71 |vpiOperand: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:78 - |vpiParent: - \_operation: , line:1404:49, endln:1404:109 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1404:49, endln:1404:109 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:79, endln:1404:92 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:79, endln:1404:86 @@ -131523,28 +130378,26 @@ design: (work@top) |vpiRightRange: \_operation: , line:1404:93, endln:1404:107 |vpiParent: - \_part_select: , line:1404:74, endln:1404:108 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1404:74, endln:1404:108 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:93, endln:1404:100 |vpiOperand: \_constant: , line:1404:105, endln:1404:107 |vpiLhs: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp) - |vpiParent: - \_assignment: , line:1404:21, endln:1404:109 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_assignment: , line:1404:21, endln:1404:109 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1404:30, endln:1404:43 |vpiParent: - \_part_select: , line:1404:21, endln:1404:46 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1404:21, endln:1404:46 |vpiOpType:11 |vpiOperand: \_constant: , line:1404:30, endln:1404:37 @@ -131570,32 +130423,28 @@ design: (work@top) \_assignment: , line:1405:21, endln:1405:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1405:33, endln:1405:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:33, endln:1405:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:33, endln:1405:37 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:38, endln:1405:40 |vpiRightRange: \_constant: , line:1405:41, endln:1405:42 |vpiOperand: - \_part_select: , line:1405:45, endln:1405:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:45, endln:1405:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1405:45, endln:1405:49 - |vpiParent: - \_operation: , line:1405:32, endln:1405:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1405:32, endln:1405:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1405:50, endln:1405:52 @@ -131608,7 +130457,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1406:13, endln:1406:58 |vpiParent: @@ -131627,32 +130476,28 @@ design: (work@top) \_assignment: , line:1406:21, endln:1406:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1406:33, endln:1406:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:33, endln:1406:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:33, endln:1406:37 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:38, endln:1406:40 |vpiRightRange: \_constant: , line:1406:41, endln:1406:42 |vpiOperand: - \_part_select: , line:1406:45, endln:1406:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:45, endln:1406:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1406:45, endln:1406:49 - |vpiParent: - \_operation: , line:1406:32, endln:1406:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1406:32, endln:1406:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1406:50, endln:1406:52 @@ -131665,7 +130510,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1407:13, endln:1407:58 |vpiParent: @@ -131684,32 +130529,28 @@ design: (work@top) \_assignment: , line:1407:21, endln:1407:57 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1407:33, endln:1407:43 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:33, endln:1407:43 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:33, endln:1407:37 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:38, endln:1407:40 |vpiRightRange: \_constant: , line:1407:41, endln:1407:42 |vpiOperand: - \_part_select: , line:1407:45, endln:1407:56 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:45, endln:1407:56 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1407:45, endln:1407:49 - |vpiParent: - \_operation: , line:1407:32, endln:1407:57 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1407:32, endln:1407:57 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1407:50, endln:1407:52 @@ -131722,7 +130563,7 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiCaseItem: \_case_item: , line:1408:13, endln:1408:57 |vpiParent: @@ -131741,32 +130582,28 @@ design: (work@top) \_assignment: , line:1408:21, endln:1408:56 |vpiOpType:33 |vpiOperand: - \_part_select: , line:1408:33, endln:1408:42 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:33, endln:1408:42 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:33, endln:1408:37 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:38, endln:1408:39 |vpiRightRange: \_constant: , line:1408:40, endln:1408:41 |vpiOperand: - \_part_select: , line:1408:45, endln:1408:55 + \_part_select: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:45, endln:1408:55 |vpiParent: - \_ref_obj: data (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data), line:1408:45, endln:1408:49 - |vpiParent: - \_operation: , line:1408:32, endln:1408:56 - |vpiName:data - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data - |vpiDefName:data - |vpiActual: - \_io_decl: (data), line:1396:81, endln:1396:85 + \_operation: , line:1408:32, endln:1408:56 + |vpiName:data + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data + |vpiDefName:data + |vpiActual: + \_io_decl: (data), line:1396:81, endln:1396:85 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1408:50, endln:1408:52 @@ -131779,27 +130616,25 @@ design: (work@top) |vpiName:data_tmp |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiStmt: \_return_stmt: , line:1410:9, endln:1410:15 |vpiParent: \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align) |vpiCondition: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiParent: - \_ref_obj: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:24 - |vpiParent: - \_return_stmt: , line:1410:9, endln:1410:15 - |vpiName:data_tmp - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp - |vpiDefName:data_tmp - |vpiActual: - \_logic_var: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1399:22, endln:1399:30 + \_return_stmt: , line:1410:9, endln:1410:15 + |vpiName:data_tmp + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp + |vpiDefName:data_tmp + |vpiActual: + \_logic_var: (ariane_pkg::data_align::data_tmp), line:1399:22, endln:1399:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:1410:25, endln:1410:38 |vpiParent: - \_part_select: , line:1410:16, endln:1410:41 + \_part_select: data_tmp (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.data_align.data_tmp), line:1410:16, endln:1410:41 |vpiOpType:11 |vpiOperand: \_constant: , line:1410:25, endln:1410:32 @@ -131887,16 +130722,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1419:20, endln:1427:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1420:23, endln:1420:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1420:23, endln:1420:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1420:23, endln:1420:27 - |vpiParent: - \_case_stmt: , line:1420:17, endln:1426:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1420:17, endln:1426:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1420:28, endln:1420:29 @@ -131979,16 +130812,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1428:20, endln:1438:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1429:23, endln:1429:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1429:23, endln:1429:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1429:23, endln:1429:27 - |vpiParent: - \_case_stmt: , line:1429:17, endln:1437:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1429:17, endln:1437:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1429:28, endln:1429:29 @@ -132095,16 +130926,14 @@ design: (work@top) \_begin: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen), line:1439:20, endln:1450:16 |vpiCaseType:1 |vpiCondition: - \_part_select: , line:1440:23, endln:1440:32 + \_part_select: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1440:23, endln:1440:32 |vpiParent: - \_ref_obj: addr (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr), line:1440:23, endln:1440:27 - |vpiParent: - \_case_stmt: , line:1440:17, endln:1449:24 - |vpiName:addr - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr - |vpiDefName:addr - |vpiActual: - \_io_decl: (addr), line:1414:55, endln:1414:59 + \_case_stmt: , line:1440:17, endln:1449:24 + |vpiName:addr + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.be_gen.addr + |vpiDefName:addr + |vpiActual: + \_io_decl: (addr), line:1414:55, endln:1414:59 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:1440:28, endln:1440:29 @@ -137530,21 +136359,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0]), line:2021:44, endln:2021:53 + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0].UnitTypes), line:2021:44, endln:2021:53 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0]) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2021:29, endln:2021:60 - |vpiName:Implementation.UnitTypes[0] - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0] - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2021:29, endln:2021:60 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0] + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2021:54, endln:2021:59 |vpiParent: - \_bit_select: (Implementation.UnitTypes[0]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[0].UnitTypes), line:2021:44, endln:2021:53 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -138181,10 +137006,11 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Features), line:2008:45, endln:2008:53 |vpiActual: - \_ref_obj: (IntFmtMask), line:2028:33, endln:2028:43 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.IntFmtMask), line:2028:33, endln:2028:43 |vpiParent: \_hier_path: (Features.IntFmtMask), line:2028:24, endln:2028:43 |vpiName:IntFmtMask + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.IntFmtMask |vpiActual: \_typespec_member: (IntFmtMask), line:1667:18, endln:1667:28 |vpiExpr: @@ -138295,17 +137121,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.PipeRegs) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.Implementation.PipeRegs[0].PipeRegs) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.PipeRegs) - |vpiParent: - \_hier_path: (Implementation.PipeRegs[0]), line:2029:24, endln:2029:54 - |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.PipeRegs - |vpiActual: - \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 + \_hier_path: (Implementation.PipeRegs[0]), line:2029:24, endln:2029:54 |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.PipeRegs + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.Implementation.PipeRegs[0].PipeRegs + |vpiActual: + \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 |vpiIndex: \_constant: , line:2029:48, endln:2029:53 |vpiParent: @@ -138340,17 +137162,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiParent: @@ -138525,17 +137343,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -138589,17 +137403,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -138648,15 +137458,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -138665,8 +137471,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -138694,15 +137498,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -138711,8 +137511,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -138831,17 +137629,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -138895,17 +137689,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -138954,15 +137744,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -138971,8 +137757,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -139000,15 +137784,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -139017,8 +137797,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -139137,17 +137915,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139201,17 +137975,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139260,15 +138030,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -139277,8 +138043,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -139306,15 +138070,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -139323,8 +138083,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -139443,17 +138201,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139507,17 +138261,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139566,15 +138316,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -139583,8 +138329,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -139612,15 +138356,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -139629,8 +138369,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -139749,17 +138487,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139813,17 +138547,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[0].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[0]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[0].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -139872,15 +138602,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -139889,8 +138615,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -139918,15 +138642,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -139935,8 +138655,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[0].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -140018,21 +138736,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1]), line:2021:44, endln:2021:53 + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1].UnitTypes), line:2021:44, endln:2021:53 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1]) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2021:29, endln:2021:60 - |vpiName:Implementation.UnitTypes[1] - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1] - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2021:29, endln:2021:60 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1] + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2021:54, endln:2021:59 |vpiParent: - \_bit_select: (Implementation.UnitTypes[1]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[1].UnitTypes), line:2021:44, endln:2021:53 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -140642,10 +139356,11 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Features), line:2008:45, endln:2008:53 |vpiActual: - \_ref_obj: (IntFmtMask), line:2028:33, endln:2028:43 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.IntFmtMask), line:2028:33, endln:2028:43 |vpiParent: \_hier_path: (Features.IntFmtMask), line:2028:24, endln:2028:43 |vpiName:IntFmtMask + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.IntFmtMask |vpiActual: \_typespec_member: (IntFmtMask), line:1667:18, endln:1667:28 |vpiExpr: @@ -140674,17 +139389,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.PipeRegs) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.Implementation.PipeRegs[1].PipeRegs) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.PipeRegs) - |vpiParent: - \_hier_path: (Implementation.PipeRegs[1]), line:2029:24, endln:2029:54 - |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.PipeRegs - |vpiActual: - \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 + \_hier_path: (Implementation.PipeRegs[1]), line:2029:24, endln:2029:54 |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.PipeRegs + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.Implementation.PipeRegs[1].PipeRegs + |vpiActual: + \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 |vpiIndex: \_constant: , line:2029:48, endln:2029:53 |vpiParent: @@ -140719,17 +139430,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiParent: @@ -140900,17 +139607,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -140964,17 +139667,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141023,15 +139722,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -141040,8 +139735,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -141069,15 +139762,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -141086,8 +139775,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -141206,17 +139893,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141270,17 +139953,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141329,15 +140008,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -141346,8 +140021,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -141375,15 +140048,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -141392,8 +140061,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -141512,17 +140179,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141576,17 +140239,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141635,15 +140294,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -141652,8 +140307,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -141681,15 +140334,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -141698,8 +140347,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -141818,17 +140465,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141882,17 +140525,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -141941,15 +140580,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -141958,8 +140593,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -141987,15 +140620,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -142004,8 +140633,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -142124,17 +140751,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -142188,17 +140811,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[1].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[1]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[1].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -142247,15 +140866,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -142264,8 +140879,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -142293,15 +140906,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -142310,8 +140919,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[1].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -142393,21 +141000,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2]), line:2021:44, endln:2021:53 + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2].UnitTypes), line:2021:44, endln:2021:53 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2]) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2021:29, endln:2021:60 - |vpiName:Implementation.UnitTypes[2] - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2] - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2021:29, endln:2021:60 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2] + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2021:54, endln:2021:59 |vpiParent: - \_bit_select: (Implementation.UnitTypes[2]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[2].UnitTypes), line:2021:44, endln:2021:53 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -143017,10 +141620,11 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Features), line:2008:45, endln:2008:53 |vpiActual: - \_ref_obj: (IntFmtMask), line:2028:33, endln:2028:43 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.IntFmtMask), line:2028:33, endln:2028:43 |vpiParent: \_hier_path: (Features.IntFmtMask), line:2028:24, endln:2028:43 |vpiName:IntFmtMask + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.IntFmtMask |vpiActual: \_typespec_member: (IntFmtMask), line:1667:18, endln:1667:28 |vpiExpr: @@ -143049,17 +141653,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.PipeRegs) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.Implementation.PipeRegs[2].PipeRegs) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.PipeRegs) - |vpiParent: - \_hier_path: (Implementation.PipeRegs[2]), line:2029:24, endln:2029:54 - |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.PipeRegs - |vpiActual: - \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 + \_hier_path: (Implementation.PipeRegs[2]), line:2029:24, endln:2029:54 |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.PipeRegs + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.Implementation.PipeRegs[2].PipeRegs + |vpiActual: + \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 |vpiIndex: \_constant: , line:2029:48, endln:2029:53 |vpiParent: @@ -143094,17 +141694,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiParent: @@ -143275,17 +141871,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -143339,17 +141931,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -143398,15 +141986,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -143415,8 +141999,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -143444,15 +142026,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -143461,8 +142039,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -143581,17 +142157,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -143645,17 +142217,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -143704,15 +142272,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -143721,8 +142285,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -143750,15 +142312,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -143767,8 +142325,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -143887,17 +142443,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -143951,17 +142503,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -144010,15 +142558,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -144027,8 +142571,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -144056,15 +142598,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -144073,8 +142611,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -144193,17 +142729,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -144257,17 +142789,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -144316,15 +142844,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -144333,8 +142857,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -144362,15 +142884,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -144379,8 +142897,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -144499,17 +143015,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -144563,17 +143075,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[2].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[2]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[2].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -144622,15 +143130,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -144639,8 +143143,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -144668,15 +143170,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -144685,8 +143183,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[2].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -144768,21 +143264,17 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3]), line:2021:44, endln:2021:53 + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3].UnitTypes), line:2021:44, endln:2021:53 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3]) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2021:29, endln:2021:60 - |vpiName:Implementation.UnitTypes[3] - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3] - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2021:29, endln:2021:60 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3] + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2021:54, endln:2021:59 |vpiParent: - \_bit_select: (Implementation.UnitTypes[3]), line:2021:44, endln:2021:53 + \_bit_select: (Implementation.UnitTypes[3].UnitTypes), line:2021:44, endln:2021:53 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -145392,10 +143884,11 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Features), line:2008:45, endln:2008:53 |vpiActual: - \_ref_obj: (IntFmtMask), line:2028:33, endln:2028:43 + \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.IntFmtMask), line:2028:33, endln:2028:43 |vpiParent: \_hier_path: (Features.IntFmtMask), line:2028:24, endln:2028:43 |vpiName:IntFmtMask + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.IntFmtMask |vpiActual: \_typespec_member: (IntFmtMask), line:1667:18, endln:1667:28 |vpiExpr: @@ -145424,17 +143917,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.PipeRegs) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.Implementation.PipeRegs[3].PipeRegs) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.PipeRegs) - |vpiParent: - \_hier_path: (Implementation.PipeRegs[3]), line:2029:24, endln:2029:54 - |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.PipeRegs - |vpiActual: - \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 + \_hier_path: (Implementation.PipeRegs[3]), line:2029:24, endln:2029:54 |vpiName:PipeRegs - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.PipeRegs + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.Implementation.PipeRegs[3].PipeRegs + |vpiActual: + \_typespec_member: (PipeRegs), line:1721:28, endln:1721:36 |vpiIndex: \_constant: , line:2029:48, endln:2029:53 |vpiParent: @@ -145469,17 +143958,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiParent: @@ -145650,17 +144135,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -145714,17 +144195,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -145773,15 +144250,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -145790,8 +144263,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -145819,15 +144290,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[0].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -145836,8 +144303,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -145956,17 +144421,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146020,17 +144481,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146079,15 +144536,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -146096,8 +144549,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -146125,15 +144576,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[1].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -146142,8 +144589,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -146262,17 +144707,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146326,17 +144767,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146385,15 +144822,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -146402,8 +144835,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -146431,15 +144862,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[2].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -146448,8 +144875,6 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -146568,17 +144993,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146632,17 +145053,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146691,15 +145108,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -146708,8 +145121,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -146737,15 +145148,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[3].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -146754,8 +145161,6 @@ design: (work@top) |vpiSize:64 |UINT:3 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -146874,17 +145279,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146938,17 +145339,13 @@ design: (work@top) |vpiActual: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.Implementation), line:2009:45, endln:2009:59 |vpiActual: - \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes) + \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[3].UnitTypes) |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes) - |vpiParent: - \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 - |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes - |vpiActual: - \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 + \_hier_path: (Implementation.UnitTypes[3]), line:2030:24, endln:2030:55 |vpiName:UnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].UnitTypes + |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].Implementation.UnitTypes[3].UnitTypes + |vpiActual: + \_typespec_member: (UnitTypes), line:1722:28, endln:1722:37 |vpiIndex: \_constant: , line:2030:49, endln:2030:54 |vpiExpr: @@ -146997,15 +145394,11 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1980:27, endln:1980:44 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_param_assign: , line:1980:16, endln:1980:44 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_param_assign: , line:1980:16, endln:1980:44 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1980:40, endln:1980:43 |vpiParent: @@ -147014,8 +145407,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiLhs: \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].DEBUGME2), line:1980:16, endln:1980:24 |vpiParamAssign: @@ -147043,15 +145434,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes), line:1981:47, endln:1981:64 |vpiParent: - \_ref_obj: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes) - |vpiParent: - \_operation: , line:1981:47, endln:1981:87 - |vpiName:FmtUnitTypes - |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 + \_operation: , line:1981:47, endln:1981:87 |vpiName:FmtUnitTypes |vpiFullName:work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.gen_parallel_slices[4].FmtUnitTypes + |vpiActual: + \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiIndex: \_constant: , line:1981:60, endln:1981:63 |vpiParent: @@ -147060,8 +145447,6 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_parameter: (work@top.i_ariane.ex_stage_i.fpu_gen.fpu_i.fpu_gen.i_fpnew_bulk.gen_operation_groups[3].i_opgroup_block.FmtUnitTypes), line:1966:41, endln:1966:53 |vpiOperand: \_constant: , line:1981:68, endln:1981:79 |vpiParent: @@ -147080,4 +145465,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/ArianeElab2/dut.sv | ${SURELOG_DIR}/build/regression/ArianeElab2/roundtrip/dut_000.sv | 426 | 2130 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ArianeElab2/dut.sv | ${SURELOG_DIR}/build/regression/ArianeElab2/roundtrip/dut_000.sv | 445 | 2130 | \ No newline at end of file diff --git a/tests/ArrayExprFuncArg/ArrayExprFunArg.log b/tests/ArrayExprFuncArg/ArrayExprFunArg.log index 8179cf2382..460f90188c 100644 --- a/tests/ArrayExprFuncArg/ArrayExprFunArg.log +++ b/tests/ArrayExprFuncArg/ArrayExprFunArg.log @@ -605,7 +605,7 @@ param_assign 32 parameter 33 range 12 ref_module 1 -ref_obj 38 +ref_obj 30 sys_task_call 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -636,7 +636,7 @@ param_assign 32 parameter 33 range 13 ref_module 1 -ref_obj 56 +ref_obj 44 sys_task_call 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ArrayExprFunArg/slpp_all/surelog.uhdm ... @@ -1012,17 +1012,13 @@ design: (work@main) |vpiRhs: \_bit_select: (work@top.ASSIGN_VADDR.V), line:12:20, endln:12:24 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:12:2, endln:12:24 - |vpiName:V - |vpiFullName:work@top.ASSIGN_VADDR.V + \_assignment: , line:12:2, endln:12:24 |vpiName:V |vpiFullName:work@top.ASSIGN_VADDR.V |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:12:22, endln:12:23 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:11:34, endln:13:11 + \_bit_select: (work@top.ASSIGN_VADDR.V), line:12:20, endln:12:24 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -1030,17 +1026,15 @@ design: (work@main) |vpiLhs: \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:12:2, endln:12:17 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:12:2, endln:12:24 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + \_assignment: , line:12:2, endln:12:24 |vpiName:ASSIGN_VADDR |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:10:17, endln:10:35 |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:12:15, endln:12:16 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:11:34, endln:13:11 + \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:12:2, endln:12:17 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -1106,8 +1100,6 @@ design: (work@main) |vpiBlocking:1 |vpiRhs: \_constant: , line:26:21, endln:26:22 - |vpiParent: - \_assignment: , line:26:5, endln:26:22 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1115,7 +1107,7 @@ design: (work@main) |vpiLhs: \_ref_obj: (work@top.MAX_VADDR_CNT.MAX_VADDR_CNT), line:26:5, endln:26:18 |vpiParent: - \_begin: (work@top.MAX_VADDR_CNT) + \_assignment: , line:26:5, endln:26:22 |vpiName:MAX_VADDR_CNT |vpiFullName:work@top.MAX_VADDR_CNT.MAX_VADDR_CNT |vpiActual: @@ -1198,17 +1190,15 @@ design: (work@main) |vpiOperand: \_bit_select: (work@top.MAX_VADDR_CNT.SRC), line:28:13, endln:28:19 |vpiParent: - \_ref_obj: (work@top.MAX_VADDR_CNT.SRC) - |vpiParent: - \_operation: , line:28:13, endln:28:35 - |vpiName:SRC - |vpiFullName:work@top.MAX_VADDR_CNT.SRC + \_operation: , line:28:13, endln:28:35 |vpiName:SRC |vpiFullName:work@top.MAX_VADDR_CNT.SRC + |vpiActual: + \_io_decl: (SRC), line:25:57, endln:25:60 |vpiIndex: \_ref_obj: (work@top.MAX_VADDR_CNT.i), line:28:17, endln:28:18 |vpiParent: - \_begin: (work@top.MAX_VADDR_CNT), line:27:36, endln:31:8 + \_bit_select: (work@top.MAX_VADDR_CNT.SRC), line:28:13, endln:28:19 |vpiName:i |vpiFullName:work@top.MAX_VADDR_CNT.i |vpiActual: @@ -1235,17 +1225,15 @@ design: (work@main) |vpiRhs: \_bit_select: (work@top.MAX_VADDR_CNT.SRC), line:29:29, endln:29:35 |vpiParent: - \_ref_obj: (work@top.MAX_VADDR_CNT.SRC) - |vpiParent: - \_assignment: , line:29:13, endln:29:35 - |vpiName:SRC - |vpiFullName:work@top.MAX_VADDR_CNT.SRC + \_assignment: , line:29:13, endln:29:35 |vpiName:SRC |vpiFullName:work@top.MAX_VADDR_CNT.SRC + |vpiActual: + \_io_decl: (SRC), line:25:57, endln:25:60 |vpiIndex: \_ref_obj: (work@top.MAX_VADDR_CNT.i), line:29:33, endln:29:34 |vpiParent: - \_begin: (work@top.MAX_VADDR_CNT), line:28:37, endln:30:12 + \_bit_select: (work@top.MAX_VADDR_CNT.SRC), line:29:29, endln:29:35 |vpiName:i |vpiFullName:work@top.MAX_VADDR_CNT.i |vpiActual: @@ -1253,7 +1241,7 @@ design: (work@main) |vpiLhs: \_ref_obj: (work@top.MAX_VADDR_CNT.MAX_VADDR_CNT), line:29:13, endln:29:26 |vpiParent: - \_begin: (work@top.MAX_VADDR_CNT), line:28:37, endln:30:12 + \_assignment: , line:29:13, endln:29:35 |vpiName:MAX_VADDR_CNT |vpiFullName:work@top.MAX_VADDR_CNT.MAX_VADDR_CNT |vpiActual: @@ -1270,10 +1258,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:17:5, endln:17:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:17:5, endln:17:18 - |vpiName:VADDR + \_operation: , line:17:5, endln:17:18 |vpiName:VADDR |vpiIndex: \_constant: , line:17:11, endln:17:12 @@ -1303,10 +1288,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:20:5, endln:20:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:20:5, endln:20:18 - |vpiName:VADDR + \_operation: , line:20:5, endln:20:18 |vpiName:VADDR |vpiIndex: \_constant: , line:20:11, endln:20:12 @@ -1787,47 +1769,35 @@ design: (work@main) |vpiRhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:12:20, endln:12:24 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:12:2, endln:12:24 - |vpiName:V - |vpiFullName:work@main.top1.ASSIGN_VADDR.V - |vpiActual: - \_parameter: (work@main.top1.V), line:7:26, endln:7:27 + \_assignment: , line:12:2, endln:12:24 |vpiName:V |vpiFullName:work@main.top1.ASSIGN_VADDR.V + |vpiActual: + \_parameter: (work@main.top1.V), line:7:26, endln:7:27 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V.i), line:12:22, endln:12:23 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:12:22, endln:12:23 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:12:20, endln:12:24 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.V.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:11:13, endln:11:14 - |vpiActual: - \_parameter: (work@main.top1.V), line:7:26, endln:7:27 |vpiLhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:12:2, endln:12:17 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:12:2, endln:12:24 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR - |vpiActual: - \_array_var: , line:10:17, endln:10:35 + \_assignment: , line:12:2, endln:12:24 |vpiName:ASSIGN_VADDR |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:10:17, endln:10:35 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i), line:12:15, endln:12:16 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:12:15, endln:12:16 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:12:2, endln:12:17 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:11:13, endln:11:14 - |vpiActual: - \_array_var: , line:10:17, endln:10:35 |vpiInstance: \_module_inst: work@top (work@main.top1), file:${SURELOG_DIR}/tests/ArrayExprFuncArg/dut.sv, line:47:1, endln:47:16 |vpiTaskFunc: @@ -1896,7 +1866,7 @@ design: (work@main) |vpiName:MAX_VADDR_CNT |vpiFullName:work@main.top1.MAX_VADDR_CNT.MAX_VADDR_CNT |vpiActual: - \_int_var: , line:25:17, endln:25:29 + \_int_var: (MAX_VADDR_CNT), line:25:17, endln:25:29 |vpiStmt: \_for_stmt: (work@main.top1.MAX_VADDR_CNT), line:27:5, endln:27:8 |vpiParent: @@ -1968,25 +1938,19 @@ design: (work@main) |vpiOperand: \_bit_select: (work@main.top1.MAX_VADDR_CNT.SRC), line:28:13, endln:28:19 |vpiParent: - \_ref_obj: (work@main.top1.MAX_VADDR_CNT.SRC) - |vpiParent: - \_operation: , line:28:13, endln:28:35 - |vpiName:SRC - |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC - |vpiActual: - \_io_decl: (SRC), line:25:57, endln:25:60 + \_operation: , line:28:13, endln:28:35 |vpiName:SRC |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC + |vpiActual: + \_io_decl: (SRC), line:25:57, endln:25:60 |vpiIndex: - \_ref_obj: (work@main.top1.MAX_VADDR_CNT.SRC.i), line:28:17, endln:28:18 + \_ref_obj: (work@main.top1.MAX_VADDR_CNT.i), line:28:17, endln:28:18 |vpiParent: \_bit_select: (work@main.top1.MAX_VADDR_CNT.SRC), line:28:13, endln:28:19 |vpiName:i - |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC.i + |vpiFullName:work@main.top1.MAX_VADDR_CNT.i |vpiActual: \_int_var: (work@top.MAX_VADDR_CNT.i), line:27:14, endln:27:15 - |vpiActual: - \_io_decl: (SRC), line:25:57, endln:25:60 |vpiOperand: \_ref_obj: (work@main.top1.MAX_VADDR_CNT.MAX_VADDR_CNT), line:28:22, endln:28:35 |vpiParent: @@ -1994,7 +1958,7 @@ design: (work@main) |vpiName:MAX_VADDR_CNT |vpiFullName:work@main.top1.MAX_VADDR_CNT.MAX_VADDR_CNT |vpiActual: - \_int_var: , line:25:17, endln:25:29 + \_int_var: (MAX_VADDR_CNT), line:25:17, endln:25:29 |vpiStmt: \_begin: (work@main.top1.MAX_VADDR_CNT), line:28:37, endln:30:12 |vpiParent: @@ -2009,25 +1973,19 @@ design: (work@main) |vpiRhs: \_bit_select: (work@main.top1.MAX_VADDR_CNT.SRC), line:29:29, endln:29:35 |vpiParent: - \_ref_obj: (work@main.top1.MAX_VADDR_CNT.SRC) - |vpiParent: - \_assignment: , line:29:13, endln:29:35 - |vpiName:SRC - |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC - |vpiActual: - \_io_decl: (SRC), line:25:57, endln:25:60 + \_assignment: , line:29:13, endln:29:35 |vpiName:SRC |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC + |vpiActual: + \_io_decl: (SRC), line:25:57, endln:25:60 |vpiIndex: - \_ref_obj: (work@main.top1.MAX_VADDR_CNT.SRC.i), line:29:33, endln:29:34 + \_ref_obj: (work@main.top1.MAX_VADDR_CNT.i), line:29:33, endln:29:34 |vpiParent: \_bit_select: (work@main.top1.MAX_VADDR_CNT.SRC), line:29:29, endln:29:35 |vpiName:i - |vpiFullName:work@main.top1.MAX_VADDR_CNT.SRC.i + |vpiFullName:work@main.top1.MAX_VADDR_CNT.i |vpiActual: \_int_var: (work@top.MAX_VADDR_CNT.i), line:27:14, endln:27:15 - |vpiActual: - \_io_decl: (SRC), line:25:57, endln:25:60 |vpiLhs: \_ref_obj: (work@main.top1.MAX_VADDR_CNT.MAX_VADDR_CNT), line:29:13, endln:29:26 |vpiParent: @@ -2035,7 +1993,7 @@ design: (work@main) |vpiName:MAX_VADDR_CNT |vpiFullName:work@main.top1.MAX_VADDR_CNT.MAX_VADDR_CNT |vpiActual: - \_int_var: , line:25:17, endln:25:29 + \_int_var: (MAX_VADDR_CNT), line:25:17, endln:25:29 |vpiInstance: \_module_inst: work@top (work@main.top1), file:${SURELOG_DIR}/tests/ArrayExprFuncArg/dut.sv, line:47:1, endln:47:16 |vpiInstance: diff --git a/tests/ArrayMethodIterator/ArrayMethodIterator.log b/tests/ArrayMethodIterator/ArrayMethodIterator.log index 939027653c..7e06519c76 100644 --- a/tests/ArrayMethodIterator/ArrayMethodIterator.log +++ b/tests/ArrayMethodIterator/ArrayMethodIterator.log @@ -448,10 +448,11 @@ design: (work@top) \_assignment: , line:19:3, endln:19:90 |vpiName:callbacks_to_append |vpiActual: - \_ref_obj: (callbacks_to_append), line:19:32, endln:19:51 + \_ref_obj: (pkg::uvm_callbacks::get_all::callbacks_to_append), line:19:32, endln:19:51 |vpiParent: \_hier_path: (callbacks_to_append), line:19:32, endln:19:90 |vpiName:callbacks_to_append + |vpiFullName:pkg::uvm_callbacks::get_all::callbacks_to_append |vpiActual: \_array_var: (pkg::uvm_callbacks::get_all::callbacks_to_append), line:15:6, endln:15:25 |vpiActual: @@ -480,10 +481,11 @@ design: (work@top) |vpiActual: \_class_var: (cb_), line:15:6, endln:15:25 |vpiActual: - \_ref_obj: (get_inst_id), line:19:77, endln:19:88 + \_ref_obj: (pkg::uvm_callbacks::get_all::callbacks_to_append::get_inst_id), line:19:77, endln:19:88 |vpiParent: \_hier_path: (cb_.get_inst_id), line:19:73, endln:19:88 |vpiName:get_inst_id + |vpiFullName:pkg::uvm_callbacks::get_all::callbacks_to_append::get_inst_id |vpiActual: \_int_var: (pkg::uvm_callback::get_inst_id), line:7:8, endln:7:19 |vpiLhs: diff --git a/tests/ArrayVarName/ArrayVarName.log b/tests/ArrayVarName/ArrayVarName.log index 8d62076c23..1afd7b9723 100644 --- a/tests/ArrayVarName/ArrayVarName.log +++ b/tests/ArrayVarName/ArrayVarName.log @@ -134,7 +134,7 @@ param_assign 2 parameter 2 port 2 range 1 -ref_obj 6 +ref_obj 5 return_stmt 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -159,7 +159,7 @@ param_assign 2 parameter 2 port 3 range 1 -ref_obj 9 +ref_obj 7 return_stmt 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ArrayVarName/slpp_all/surelog.uhdm ... @@ -274,13 +274,11 @@ design: (work@top) |vpiCondition: \_bit_select: (work@top.get_a1.a), line:6:14, endln:6:18 |vpiParent: - \_ref_obj: (work@top.get_a1.a) - |vpiParent: - \_return_stmt: , line:6:7, endln:6:13 - |vpiName:a - |vpiFullName:work@top.get_a1.a + \_return_stmt: , line:6:7, endln:6:13 |vpiName:a |vpiFullName:work@top.get_a1.a + |vpiActual: + \_array_var: (work@top.get_a1.a), line:5:11, endln:5:12 |vpiIndex: \_constant: , line:6:16, endln:6:17 |vpiParent: @@ -431,19 +429,13 @@ design: (work@top) |vpiCondition: \_bit_select: (work@top.get_a1.a), line:6:14, endln:6:18 |vpiParent: - \_ref_obj: (work@top.get_a1.a) - |vpiParent: - \_return_stmt: , line:6:7, endln:6:13 - |vpiName:a - |vpiFullName:work@top.get_a1.a - |vpiActual: - \_array_var: (work@top.get_a1.a), line:5:11, endln:5:12 + \_return_stmt: , line:6:7, endln:6:13 |vpiName:a |vpiFullName:work@top.get_a1.a - |vpiIndex: - \_constant: , line:6:16, endln:6:17 |vpiActual: \_array_var: (work@top.get_a1.a), line:5:11, endln:5:12 + |vpiIndex: + \_constant: , line:6:16, endln:6:17 |vpiInstance: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ArrayVarName/dut.sv, line:1:1, endln:8:10 |vpiTopModule:1 diff --git a/tests/AssignPlus/AssignPlus.log b/tests/AssignPlus/AssignPlus.log index 416b858bad..bcdf29ea1d 100644 --- a/tests/AssignPlus/AssignPlus.log +++ b/tests/AssignPlus/AssignPlus.log @@ -224,7 +224,7 @@ named_begin 1 operation 55 param_assign 2 parameter 7 -ref_obj 87 +ref_obj 51 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -247,7 +247,7 @@ named_begin 1 operation 95 param_assign 2 parameter 7 -ref_obj 157 +ref_obj 91 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -366,10 +366,7 @@ design: (work@top) |vpiOperand: \_bit_select: (bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiIndex: \_constant: , line:7:54, endln:7:55 @@ -392,17 +389,13 @@ design: (work@top) |vpiLhs: \_bit_select: (w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiIndex: - \_ref_obj: (w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:w_data_li.i |vpiStmt: \_cont_assign: , line:8:14, endln:8:95 |vpiRhs: @@ -418,10 +411,7 @@ design: (work@top) |vpiOperand: \_bit_select: (bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiIndex: \_constant: , line:8:54, endln:8:55 @@ -439,21 +429,19 @@ design: (work@top) |vpiOperand: \_bit_select: (val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiIndex: \_operation: , line:8:65, endln:8:68 |vpiParent: - \_operation: , line:8:31, endln:8:95 + \_bit_select: (val_i), line:8:59, endln:8:69 |vpiOpType:24 |vpiOperand: - \_ref_obj: (i), line:8:65, endln:8:66 + \_ref_obj: (val_i.i), line:8:65, endln:8:66 |vpiParent: - \_operation: , line:8:31, endln:8:95 + \_operation: , line:8:65, endln:8:68 |vpiName:i + |vpiFullName:val_i.i |vpiOperand: \_constant: , line:8:67, endln:8:68 |vpiParent: @@ -470,7 +458,7 @@ design: (work@top) |vpiOperand: \_operation: , line:8:73, endln:8:83 |vpiParent: - \_operation: , line:8:59, endln:8:95 + \_operation: , line:8:73, endln:8:94 |vpiOpType:4 |vpiOperand: \_ref_obj: (correct_i), line:8:74, endln:8:83 @@ -480,23 +468,17 @@ design: (work@top) |vpiOperand: \_bit_select: (val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiIndex: \_ref_obj: (i), line:8:92, endln:8:93 |vpiParent: - \_operation: , line:8:73, endln:8:94 + \_bit_select: (val_i), line:8:86, endln:8:94 |vpiName:i |vpiLhs: \_bit_select: (w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiIndex: \_operation: , line:8:24, endln:8:27 @@ -591,11 +573,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[0].bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (work@top.wval[0].bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[0].bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiFullName:work@top.wval[0].bht_init_lp |vpiIndex: @@ -620,19 +598,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.wval[0].w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (work@top.wval[0].w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li - |vpiFullName:work@top.wval[0].w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiFullName:work@top.wval[0].w_data_li |vpiIndex: - \_ref_obj: (work@top.wval[0].w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (work@top.wval[0].i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (work@top.wval[0].w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:work@top.wval[0].w_data_li.i + |vpiFullName:work@top.wval[0].i |vpiActual: \_parameter: (work@top.wval[0].i), line:5:0 |vpiContAssign: @@ -653,11 +627,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[0].bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (work@top.wval[0].bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[0].bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiFullName:work@top.wval[0].bht_init_lp |vpiIndex: @@ -676,11 +646,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[0].val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (work@top.wval[0].val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i - |vpiFullName:work@top.wval[0].val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiFullName:work@top.wval[0].val_i |vpiIndex: @@ -723,29 +689,21 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[0].val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (work@top.wval[0].val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i - |vpiFullName:work@top.wval[0].val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiFullName:work@top.wval[0].val_i |vpiIndex: - \_ref_obj: (work@top.wval[0].val_i.i), line:8:92, endln:8:93 + \_ref_obj: (work@top.wval[0].i), line:8:92, endln:8:93 |vpiParent: \_bit_select: (work@top.wval[0].val_i), line:8:86, endln:8:94 |vpiName:i - |vpiFullName:work@top.wval[0].val_i.i + |vpiFullName:work@top.wval[0].i |vpiActual: \_parameter: (work@top.wval[0].i), line:5:0 |vpiLhs: \_bit_select: (work@top.wval[0].w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (work@top.wval[0].w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li - |vpiFullName:work@top.wval[0].w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiFullName:work@top.wval[0].w_data_li |vpiIndex: @@ -808,11 +766,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[2].bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (work@top.wval[2].bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[2].bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiFullName:work@top.wval[2].bht_init_lp |vpiIndex: @@ -837,19 +791,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.wval[2].w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (work@top.wval[2].w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li - |vpiFullName:work@top.wval[2].w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiFullName:work@top.wval[2].w_data_li |vpiIndex: - \_ref_obj: (work@top.wval[2].w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (work@top.wval[2].i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (work@top.wval[2].w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:work@top.wval[2].w_data_li.i + |vpiFullName:work@top.wval[2].i |vpiActual: \_parameter: (work@top.wval[2].i), line:5:0 |vpiContAssign: @@ -870,11 +820,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[2].bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (work@top.wval[2].bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[2].bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiFullName:work@top.wval[2].bht_init_lp |vpiIndex: @@ -893,11 +839,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[2].val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (work@top.wval[2].val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i - |vpiFullName:work@top.wval[2].val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiFullName:work@top.wval[2].val_i |vpiIndex: @@ -940,29 +882,21 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[2].val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (work@top.wval[2].val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i - |vpiFullName:work@top.wval[2].val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiFullName:work@top.wval[2].val_i |vpiIndex: - \_ref_obj: (work@top.wval[2].val_i.i), line:8:92, endln:8:93 + \_ref_obj: (work@top.wval[2].i), line:8:92, endln:8:93 |vpiParent: \_bit_select: (work@top.wval[2].val_i), line:8:86, endln:8:94 |vpiName:i - |vpiFullName:work@top.wval[2].val_i.i + |vpiFullName:work@top.wval[2].i |vpiActual: \_parameter: (work@top.wval[2].i), line:5:0 |vpiLhs: \_bit_select: (work@top.wval[2].w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (work@top.wval[2].w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li - |vpiFullName:work@top.wval[2].w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiFullName:work@top.wval[2].w_data_li |vpiIndex: @@ -1025,11 +959,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[4].bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (work@top.wval[4].bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[4].bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiFullName:work@top.wval[4].bht_init_lp |vpiIndex: @@ -1054,19 +984,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.wval[4].w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (work@top.wval[4].w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li - |vpiFullName:work@top.wval[4].w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiFullName:work@top.wval[4].w_data_li |vpiIndex: - \_ref_obj: (work@top.wval[4].w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (work@top.wval[4].i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (work@top.wval[4].w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:work@top.wval[4].w_data_li.i + |vpiFullName:work@top.wval[4].i |vpiActual: \_parameter: (work@top.wval[4].i), line:5:0 |vpiContAssign: @@ -1087,11 +1013,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[4].bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (work@top.wval[4].bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[4].bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiFullName:work@top.wval[4].bht_init_lp |vpiIndex: @@ -1110,11 +1032,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[4].val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (work@top.wval[4].val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i - |vpiFullName:work@top.wval[4].val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiFullName:work@top.wval[4].val_i |vpiIndex: @@ -1157,29 +1075,21 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[4].val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (work@top.wval[4].val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i - |vpiFullName:work@top.wval[4].val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiFullName:work@top.wval[4].val_i |vpiIndex: - \_ref_obj: (work@top.wval[4].val_i.i), line:8:92, endln:8:93 + \_ref_obj: (work@top.wval[4].i), line:8:92, endln:8:93 |vpiParent: \_bit_select: (work@top.wval[4].val_i), line:8:86, endln:8:94 |vpiName:i - |vpiFullName:work@top.wval[4].val_i.i + |vpiFullName:work@top.wval[4].i |vpiActual: \_parameter: (work@top.wval[4].i), line:5:0 |vpiLhs: \_bit_select: (work@top.wval[4].w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (work@top.wval[4].w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li - |vpiFullName:work@top.wval[4].w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiFullName:work@top.wval[4].w_data_li |vpiIndex: @@ -1242,11 +1152,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[6].bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (work@top.wval[6].bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[6].bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiFullName:work@top.wval[6].bht_init_lp |vpiIndex: @@ -1271,19 +1177,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.wval[6].w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (work@top.wval[6].w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li - |vpiFullName:work@top.wval[6].w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiFullName:work@top.wval[6].w_data_li |vpiIndex: - \_ref_obj: (work@top.wval[6].w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (work@top.wval[6].i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (work@top.wval[6].w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:work@top.wval[6].w_data_li.i + |vpiFullName:work@top.wval[6].i |vpiActual: \_parameter: (work@top.wval[6].i), line:5:0 |vpiContAssign: @@ -1304,11 +1206,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[6].bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (work@top.wval[6].bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[6].bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiFullName:work@top.wval[6].bht_init_lp |vpiIndex: @@ -1327,11 +1225,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[6].val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (work@top.wval[6].val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i - |vpiFullName:work@top.wval[6].val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiFullName:work@top.wval[6].val_i |vpiIndex: @@ -1374,29 +1268,21 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[6].val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (work@top.wval[6].val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i - |vpiFullName:work@top.wval[6].val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiFullName:work@top.wval[6].val_i |vpiIndex: - \_ref_obj: (work@top.wval[6].val_i.i), line:8:92, endln:8:93 + \_ref_obj: (work@top.wval[6].i), line:8:92, endln:8:93 |vpiParent: \_bit_select: (work@top.wval[6].val_i), line:8:86, endln:8:94 |vpiName:i - |vpiFullName:work@top.wval[6].val_i.i + |vpiFullName:work@top.wval[6].i |vpiActual: \_parameter: (work@top.wval[6].i), line:5:0 |vpiLhs: \_bit_select: (work@top.wval[6].w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (work@top.wval[6].w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li - |vpiFullName:work@top.wval[6].w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiFullName:work@top.wval[6].w_data_li |vpiIndex: @@ -1459,11 +1345,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[8].bht_init_lp), line:7:42, endln:7:56 |vpiParent: - \_ref_obj: (work@top.wval[8].bht_init_lp) - |vpiParent: - \_operation: , line:7:31, endln:7:69 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[8].bht_init_lp + \_operation: , line:7:31, endln:7:69 |vpiName:bht_init_lp |vpiFullName:work@top.wval[8].bht_init_lp |vpiIndex: @@ -1488,19 +1370,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.wval[8].w_data_li), line:7:14, endln:7:26 |vpiParent: - \_ref_obj: (work@top.wval[8].w_data_li) - |vpiParent: - \_cont_assign: , line:7:14, endln:7:69 - |vpiName:w_data_li - |vpiFullName:work@top.wval[8].w_data_li + \_cont_assign: , line:7:14, endln:7:69 |vpiName:w_data_li |vpiFullName:work@top.wval[8].w_data_li |vpiIndex: - \_ref_obj: (work@top.wval[8].w_data_li.i), line:7:24, endln:7:25 + \_ref_obj: (work@top.wval[8].i), line:7:24, endln:7:25 |vpiParent: \_bit_select: (work@top.wval[8].w_data_li), line:7:14, endln:7:26 |vpiName:i - |vpiFullName:work@top.wval[8].w_data_li.i + |vpiFullName:work@top.wval[8].i |vpiActual: \_parameter: (work@top.wval[8].i), line:5:0 |vpiContAssign: @@ -1521,11 +1399,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[8].bht_init_lp), line:8:42, endln:8:56 |vpiParent: - \_ref_obj: (work@top.wval[8].bht_init_lp) - |vpiParent: - \_operation: , line:8:31, endln:8:95 - |vpiName:bht_init_lp - |vpiFullName:work@top.wval[8].bht_init_lp + \_operation: , line:8:31, endln:8:95 |vpiName:bht_init_lp |vpiFullName:work@top.wval[8].bht_init_lp |vpiIndex: @@ -1544,11 +1418,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[8].val_i), line:8:59, endln:8:69 |vpiParent: - \_ref_obj: (work@top.wval[8].val_i) - |vpiParent: - \_operation: , line:8:59, endln:8:95 - |vpiName:val_i - |vpiFullName:work@top.wval[8].val_i + \_operation: , line:8:59, endln:8:95 |vpiName:val_i |vpiFullName:work@top.wval[8].val_i |vpiIndex: @@ -1591,29 +1461,21 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.wval[8].val_i), line:8:86, endln:8:94 |vpiParent: - \_ref_obj: (work@top.wval[8].val_i) - |vpiParent: - \_operation: , line:8:73, endln:8:94 - |vpiName:val_i - |vpiFullName:work@top.wval[8].val_i + \_operation: , line:8:73, endln:8:94 |vpiName:val_i |vpiFullName:work@top.wval[8].val_i |vpiIndex: - \_ref_obj: (work@top.wval[8].val_i.i), line:8:92, endln:8:93 + \_ref_obj: (work@top.wval[8].i), line:8:92, endln:8:93 |vpiParent: \_bit_select: (work@top.wval[8].val_i), line:8:86, endln:8:94 |vpiName:i - |vpiFullName:work@top.wval[8].val_i.i + |vpiFullName:work@top.wval[8].i |vpiActual: \_parameter: (work@top.wval[8].i), line:5:0 |vpiLhs: \_bit_select: (work@top.wval[8].w_data_li), line:8:14, endln:8:28 |vpiParent: - \_ref_obj: (work@top.wval[8].w_data_li) - |vpiParent: - \_cont_assign: , line:8:14, endln:8:95 - |vpiName:w_data_li - |vpiFullName:work@top.wval[8].w_data_li + \_cont_assign: , line:8:14, endln:8:95 |vpiName:w_data_li |vpiFullName:work@top.wval[8].w_data_li |vpiIndex: diff --git a/tests/AssignSubs/AssignSubs.log b/tests/AssignSubs/AssignSubs.log index 8aec4a426a..ef8b6126f2 100644 --- a/tests/AssignSubs/AssignSubs.log +++ b/tests/AssignSubs/AssignSubs.log @@ -219,7 +219,7 @@ package 3 parameter 1 port 2 range 5 -ref_obj 12 +ref_obj 10 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -252,7 +252,7 @@ package 3 parameter 1 port 3 range 5 -ref_obj 17 +ref_obj 14 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -470,25 +470,22 @@ design: (work@dut) |vpiRhs: \_operation: , line:16:11, endln:16:23 |vpiParent: - \_begin: , line:15:24, endln:17:6 + \_assignment: , line:16:4, endln:16:23 |vpiOpType:33 |vpiOperand: \_ref_obj: (PRIV_LVL_M), line:16:12, endln:16:22 |vpiParent: - \_begin: , line:15:24, endln:17:6 + \_assignment: , line:16:4, endln:16:23 |vpiName:PRIV_LVL_M |vpiLhs: \_bit_select: (c), line:16:4, endln:16:8 |vpiParent: - \_ref_obj: (c) - |vpiParent: - \_assignment: , line:16:4, endln:16:23 - |vpiName:c + \_assignment: , line:16:4, endln:16:23 |vpiName:c |vpiIndex: \_ref_obj: (i), line:16:6, endln:16:7 |vpiParent: - \_begin: , line:15:24, endln:17:6 + \_bit_select: (c), line:16:4, endln:16:8 |vpiName:i |vpiAlwaysType:1 |uhdmtopModules: @@ -681,25 +678,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.genblk1[0].c), line:16:4, endln:16:8 |vpiParent: - \_ref_obj: (work@dut.genblk1[0].c) - |vpiParent: - \_assignment: , line:16:4, endln:16:23 - |vpiName:c - |vpiFullName:work@dut.genblk1[0].c - |vpiActual: - \_array_var: (work@dut.c), line:12:14, endln:12:19 + \_assignment: , line:16:4, endln:16:23 |vpiName:c |vpiFullName:work@dut.genblk1[0].c + |vpiActual: + \_array_var: (work@dut.c), line:12:14, endln:12:19 |vpiIndex: - \_ref_obj: (work@dut.genblk1[0].c.i), line:16:6, endln:16:7 + \_ref_obj: (work@dut.genblk1[0].i), line:16:6, endln:16:7 |vpiParent: \_bit_select: (work@dut.genblk1[0].c), line:16:4, endln:16:8 |vpiName:i - |vpiFullName:work@dut.genblk1[0].c.i + |vpiFullName:work@dut.genblk1[0].i |vpiActual: \_parameter: (work@dut.genblk1[0].i), line:14:0 - |vpiActual: - \_array_var: (work@dut.c), line:12:14, endln:12:19 |vpiAlwaysType:1 =================== [ FATAL] : 0 diff --git a/tests/Assignments/Assignments.log b/tests/Assignments/Assignments.log index 5b9d229716..3bfd0767f6 100644 --- a/tests/Assignments/Assignments.log +++ b/tests/Assignments/Assignments.log @@ -634,7 +634,7 @@ package 2 part_select 3 port 4 range 1 -ref_obj 30 +ref_obj 25 task 9 === UHDM Object Stats End === [ERR:UH0718] ${SURELOG_DIR}/tests/Assignments/dut.sv:17:5: Illegal lhs of type wire "a". @@ -678,7 +678,7 @@ package 2 part_select 6 port 6 range 2 -ref_obj 58 +ref_obj 48 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/Assignments/slpp_all/surelog.uhdm ... @@ -1181,8 +1181,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_method_func_call: (new), line:6:18, endln:6:57 - |vpiParent: - \_assignment: , line:6:5, endln:6:57 |vpiArgument: \_operation: , line:6:22, endln:6:43 |vpiParent: @@ -1191,7 +1189,7 @@ design: (work@dut) |vpiOperand: \_hier_path: (cover_info.size), line:6:22, endln:6:39 |vpiParent: - \_method_func_call: (new), line:6:18, endln:6:57 + \_operation: , line:6:22, endln:6:43 |vpiName:cover_info.size |vpiActual: \_ref_obj: (cover_info), line:6:22, endln:6:32 @@ -1199,7 +1197,7 @@ design: (work@dut) \_hier_path: (cover_info.size), line:6:22, endln:6:39 |vpiName:cover_info |vpiActual: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.cover_info), line:6:46, endln:6:56 + \_ref_obj: (cover_info), line:6:46, endln:6:56 |vpiActual: \_method_func_call: (size), line:6:33, endln:6:37 |vpiName:size @@ -1212,18 +1210,17 @@ design: (work@dut) |UINT:1 |vpiConstType:9 |vpiArgument: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.cover_info), line:6:46, endln:6:56 + \_ref_obj: (cover_info), line:6:46, endln:6:56 |vpiParent: \_method_func_call: (new), line:6:18, endln:6:57 |vpiName:cover_info - |vpiFullName:work@dut.uvm_packer::get_packed_bits.cover_info |vpiActual: \_logic_net: (cover_info) |vpiName:new |vpiLhs: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.cover_info), line:6:5, endln:6:15 |vpiParent: - \_begin: (work@dut.uvm_packer::get_packed_bits) + \_assignment: , line:6:5, endln:6:57 |vpiName:cover_info |vpiFullName:work@dut.uvm_packer::get_packed_bits.cover_info |vpiActual: @@ -1236,21 +1233,18 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_method_func_call: (new), line:7:21, endln:7:37 - |vpiParent: - \_assignment: , line:7:5, endln:7:37 |vpiArgument: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_pack_iter), line:7:25, endln:7:36 + \_ref_obj: (m_pack_iter), line:7:25, endln:7:36 |vpiParent: \_method_func_call: (new), line:7:21, endln:7:37 |vpiName:m_pack_iter - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_pack_iter |vpiActual: \_logic_net: (m_pack_iter) |vpiName:new |vpiLhs: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.stream), line:7:5, endln:7:11 |vpiParent: - \_begin: (work@dut.uvm_packer::get_packed_bits) + \_assignment: , line:7:5, endln:7:37 |vpiName:stream |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream |vpiActual: @@ -1264,20 +1258,18 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_pack_iter), line:8:21, endln:8:32 |vpiParent: - \_begin: (work@dut.uvm_packer::get_packed_bits) + \_assignment: , line:8:5, endln:8:32 |vpiName:m_pack_iter |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_pack_iter |vpiActual: \_logic_net: (m_pack_iter) |vpiLhs: - \_part_select: , line:8:5, endln:8:17 + \_part_select: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits), line:8:5, endln:8:17 |vpiParent: - \_ref_obj: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:8:5, endln:8:32 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits - |vpiDefName:m_bits + \_assignment: , line:8:5, endln:8:32 + |vpiName:m_bits + |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:8:12, endln:8:14 @@ -1300,20 +1292,18 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_unpack_iter), line:9:21, endln:9:34 |vpiParent: - \_begin: (work@dut.uvm_packer::get_packed_bits) + \_assignment: , line:9:5, endln:9:34 |vpiName:m_unpack_iter |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_unpack_iter |vpiActual: \_logic_net: (m_unpack_iter) |vpiLhs: - \_part_select: , line:9:5, endln:9:18 + \_part_select: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits), line:9:5, endln:9:18 |vpiParent: - \_ref_obj: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:9:5, endln:9:34 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits - |vpiDefName:m_bits + \_assignment: , line:9:5, endln:9:34 + |vpiName:m_bits + |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:12, endln:9:14 @@ -1397,17 +1387,13 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.uvm_packer::get_packed_bits.m_bits), line:11:19, endln:11:28 |vpiParent: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:11:7, endln:11:28 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + \_assignment: , line:11:7, endln:11:28 |vpiName:m_bits |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits |vpiIndex: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.i), line:11:26, endln:11:27 |vpiParent: - \_for_stmt: (work@dut.uvm_packer::get_packed_bits), line:10:5, endln:10:8 + \_bit_select: (work@dut.uvm_packer::get_packed_bits.m_bits), line:11:19, endln:11:28 |vpiName:i |vpiFullName:work@dut.uvm_packer::get_packed_bits.i |vpiActual: @@ -1415,17 +1401,15 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.uvm_packer::get_packed_bits.stream), line:11:7, endln:11:16 |vpiParent: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.stream) - |vpiParent: - \_assignment: , line:11:7, endln:11:28 - |vpiName:stream - |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream + \_assignment: , line:11:7, endln:11:28 |vpiName:stream |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream + |vpiActual: + \_io_decl: (stream), line:5:62, endln:5:68 |vpiIndex: \_ref_obj: (work@dut.uvm_packer::get_packed_bits.i), line:11:14, endln:11:15 |vpiParent: - \_for_stmt: (work@dut.uvm_packer::get_packed_bits), line:10:5, endln:10:8 + \_bit_select: (work@dut.uvm_packer::get_packed_bits.stream), line:11:7, endln:11:16 |vpiName:i |vpiFullName:work@dut.uvm_packer::get_packed_bits.i |vpiActual: @@ -1503,20 +1487,18 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.m_pack_iter), line:15:21, endln:15:32 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:15:5, endln:15:32 |vpiName:m_pack_iter |vpiFullName:work@dut.m_pack_iter |vpiActual: \_logic_net: (m_pack_iter) |vpiLhs: - \_part_select: , line:15:5, endln:15:17 + \_part_select: m_bits (work@dut.m_bits), line:15:5, endln:15:17 |vpiParent: - \_ref_obj: m_bits (work@dut.m_bits) - |vpiParent: - \_assignment: , line:15:5, endln:15:32 - |vpiName:m_bits - |vpiFullName:work@dut.m_bits - |vpiDefName:m_bits + \_assignment: , line:15:5, endln:15:32 + |vpiName:m_bits + |vpiFullName:work@dut.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:15:12, endln:15:14 @@ -1538,8 +1520,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:10, endln:16:11 - |vpiParent: - \_assignment: , line:16:5, endln:16:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1547,7 +1527,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.o), line:16:5, endln:16:6 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:16:5, endln:16:11 |vpiName:o |vpiFullName:work@dut.o |vpiActual: @@ -1560,7 +1540,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.idle), line:17:13, endln:17:17 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:17:5, endln:17:17 |vpiName:idle |vpiFullName:work@dut.idle |vpiActual: @@ -1568,7 +1548,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.a), line:17:5, endln:17:6 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:17:5, endln:17:17 |vpiName:a |vpiFullName:work@dut.a |vpiActual: @@ -1586,7 +1566,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.next_nba), line:18:12, endln:18:20 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:18:5, endln:18:20 |vpiName:next_nba |vpiFullName:work@dut.next_nba |vpiActual: @@ -1594,7 +1574,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.nba), line:18:5, endln:18:8 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:18:5, endln:18:20 |vpiName:nba |vpiFullName:work@dut.nba |vpiActual: @@ -1608,7 +1588,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.toto), line:19:13, endln:19:17 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:19:5, endln:19:17 |vpiName:toto |vpiFullName:work@dut.toto |vpiActual: @@ -1616,7 +1596,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.bb), line:19:5, endln:19:7 |vpiParent: - \_begin: (work@dut), line:14:25, endln:20:6 + \_assignment: , line:19:5, endln:19:17 |vpiName:bb |vpiFullName:work@dut.bb |vpiActual: @@ -1686,7 +1666,7 @@ design: (work@dut) \_hier_path: (cover_info.size), line:6:22, endln:6:39 |vpiName:cover_info |vpiActual: - \_logic_net: (cover_info) + \_ref_obj: (cover_info), line:6:46, endln:6:56 |vpiActual: \_method_func_call: (size), line:6:33, endln:6:37 |vpiParent: @@ -1753,14 +1733,12 @@ design: (work@dut) |vpiActual: \_logic_net: (m_pack_iter) |vpiLhs: - \_part_select: , line:8:5, endln:8:17 + \_part_select: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits), line:8:5, endln:8:17 |vpiParent: - \_ref_obj: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:8:5, endln:8:32 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits - |vpiDefName:m_bits + \_assignment: , line:8:5, endln:8:32 + |vpiName:m_bits + |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:8:12, endln:8:14 @@ -1781,14 +1759,12 @@ design: (work@dut) |vpiActual: \_logic_net: (m_unpack_iter) |vpiLhs: - \_part_select: , line:9:5, endln:9:18 + \_part_select: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits), line:9:5, endln:9:18 |vpiParent: - \_ref_obj: m_bits (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:9:5, endln:9:34 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits - |vpiDefName:m_bits + \_assignment: , line:9:5, endln:9:34 + |vpiName:m_bits + |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:12, endln:9:14 @@ -1857,43 +1833,33 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.uvm_packer::get_packed_bits.m_bits), line:11:19, endln:11:28 |vpiParent: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_bits) - |vpiParent: - \_assignment: , line:11:7, endln:11:28 - |vpiName:m_bits - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits + \_assignment: , line:11:7, endln:11:28 |vpiName:m_bits |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits |vpiIndex: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.m_bits.i), line:11:26, endln:11:27 + \_ref_obj: (work@dut.uvm_packer::get_packed_bits.i), line:11:26, endln:11:27 |vpiParent: \_bit_select: (work@dut.uvm_packer::get_packed_bits.m_bits), line:11:19, endln:11:28 |vpiName:i - |vpiFullName:work@dut.uvm_packer::get_packed_bits.m_bits.i + |vpiFullName:work@dut.uvm_packer::get_packed_bits.i |vpiActual: \_int_var: (work@dut.uvm_packer::get_packed_bits.i), line:10:14, endln:10:15 |vpiLhs: \_bit_select: (work@dut.uvm_packer::get_packed_bits.stream), line:11:7, endln:11:16 |vpiParent: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.stream) - |vpiParent: - \_assignment: , line:11:7, endln:11:28 - |vpiName:stream - |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream - |vpiActual: - \_io_decl: (stream), line:5:62, endln:5:68 + \_assignment: , line:11:7, endln:11:28 |vpiName:stream |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream + |vpiActual: + \_io_decl: (stream), line:5:62, endln:5:68 |vpiIndex: - \_ref_obj: (work@dut.uvm_packer::get_packed_bits.stream.i), line:11:14, endln:11:15 + \_ref_obj: (work@dut.uvm_packer::get_packed_bits.i), line:11:14, endln:11:15 |vpiParent: \_bit_select: (work@dut.uvm_packer::get_packed_bits.stream), line:11:7, endln:11:16 |vpiName:i - |vpiFullName:work@dut.uvm_packer::get_packed_bits.stream.i + |vpiFullName:work@dut.uvm_packer::get_packed_bits.i |vpiActual: \_int_var: (work@dut.uvm_packer::get_packed_bits.i), line:10:14, endln:10:15 - |vpiActual: - \_io_decl: (stream), line:5:62, endln:5:68 |vpiInstance: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/Assignments/dut.sv, line:1:1, endln:22:10 |vpiNet: @@ -2026,14 +1992,12 @@ design: (work@dut) |vpiActual: \_logic_net: (m_pack_iter) |vpiLhs: - \_part_select: , line:15:5, endln:15:17 + \_part_select: m_bits (work@dut.m_bits), line:15:5, endln:15:17 |vpiParent: - \_ref_obj: m_bits (work@dut.m_bits) - |vpiParent: - \_assignment: , line:15:5, endln:15:32 - |vpiName:m_bits - |vpiFullName:work@dut.m_bits - |vpiDefName:m_bits + \_assignment: , line:15:5, endln:15:32 + |vpiName:m_bits + |vpiFullName:work@dut.m_bits + |vpiDefName:m_bits |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:15:12, endln:15:14 @@ -2138,4 +2102,4 @@ design: (work@dut) [ NOTE] : 6 -[roundtrip]: ${SURELOG_DIR}/tests/Assignments/dut.sv | ${SURELOG_DIR}/build/regression/Assignments/roundtrip/dut_000.sv | 5 | 22 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/Assignments/dut.sv | ${SURELOG_DIR}/build/regression/Assignments/roundtrip/dut_000.sv | 8 | 22 | \ No newline at end of file diff --git a/tests/AssociativeArray/AssociativeArray.log b/tests/AssociativeArray/AssociativeArray.log index f832208bc1..e9dbd6c1d0 100644 --- a/tests/AssociativeArray/AssociativeArray.log +++ b/tests/AssociativeArray/AssociativeArray.log @@ -116,7 +116,6 @@ int_var 2 logic_net 2 module_inst 3 range 2 -ref_obj 4 string_typespec 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -133,7 +132,6 @@ int_var 2 logic_net 2 module_inst 3 range 2 -ref_obj 6 string_typespec 1 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/AssociativeArray/slpp_all/surelog.uhdm ... @@ -181,11 +179,7 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.a), line:3:11, endln:3:15 |vpiParent: - \_ref_obj: (work@top.a) - |vpiParent: - \_cont_assign: , line:3:11, endln:3:19 - |vpiName:a - |vpiFullName:work@top.a + \_cont_assign: , line:3:11, endln:3:19 |vpiName:a |vpiFullName:work@top.a |vpiIndex: @@ -211,11 +205,7 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.b), line:6:11, endln:6:20 |vpiParent: - \_ref_obj: (work@top.b) - |vpiParent: - \_cont_assign: , line:6:11, endln:6:24 - |vpiName:b - |vpiFullName:work@top.b + \_cont_assign: , line:6:11, endln:6:24 |vpiName:b |vpiFullName:work@top.b |vpiIndex: @@ -286,15 +276,11 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.a), line:3:11, endln:3:15 |vpiParent: - \_ref_obj: (work@top.a) - |vpiParent: - \_cont_assign: , line:3:11, endln:3:19 - |vpiName:a - |vpiFullName:work@top.a - |vpiActual: - \_array_var: (work@top.a), line:2:8, endln:2:15 + \_cont_assign: , line:3:11, endln:3:19 |vpiName:a |vpiFullName:work@top.a + |vpiActual: + \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiIndex: \_constant: , line:3:13, endln:3:14 |vpiParent: @@ -303,8 +289,6 @@ design: (work@top) |vpiSize:64 |UINT:5 |vpiConstType:9 - |vpiActual: - \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiContAssign: \_cont_assign: , line:6:11, endln:6:24 |vpiParent: @@ -314,15 +298,11 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.b), line:6:11, endln:6:20 |vpiParent: - \_ref_obj: (work@top.b) - |vpiParent: - \_cont_assign: , line:6:11, endln:6:24 - |vpiName:b - |vpiFullName:work@top.b - |vpiActual: - \_array_var: (work@top.b), line:5:8, endln:5:18 + \_cont_assign: , line:6:11, endln:6:24 |vpiName:b |vpiFullName:work@top.b + |vpiActual: + \_array_var: (work@top.b), line:5:8, endln:5:18 |vpiIndex: \_constant: , line:6:13, endln:6:19 |vpiParent: @@ -331,8 +311,6 @@ design: (work@top) |vpiSize:32 |STRING:HERE |vpiConstType:6 - |vpiActual: - \_array_var: (work@top.b), line:5:8, endln:5:18 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/AssumeProp/AssumeProp.log b/tests/AssumeProp/AssumeProp.log index f6ce35736c..9d2af9d825 100644 --- a/tests/AssumeProp/AssumeProp.log +++ b/tests/AssumeProp/AssumeProp.log @@ -322,10 +322,11 @@ design: (work@dut) \_hier_path: (slv_req_i.aw_valid), line:4:51, endln:4:69 |vpiName:slv_req_i |vpiActual: - \_ref_obj: (aw_valid), line:4:61, endln:4:69 + \_ref_obj: (work@dut.aw_select.aw_valid), line:4:61, endln:4:69 |vpiParent: \_hier_path: (slv_req_i.aw_valid), line:4:51, endln:4:69 |vpiName:aw_valid + |vpiFullName:work@dut.aw_select.aw_valid |vpiOperand: \_operation: , line:5:51, endln:5:79 |vpiParent: diff --git a/tests/Attributes/Attributes.log b/tests/Attributes/Attributes.log index 406a4d01a6..f6f6bd0c55 100644 --- a/tests/Attributes/Attributes.log +++ b/tests/Attributes/Attributes.log @@ -1777,8 +1777,6 @@ design: (work@foo) |vpiOpType:82 |vpiRhs: \_constant: , line:8:21, endln:8:25 - |vpiParent: - \_assignment: , line:8:14, endln:8:25 |vpiDecompile:1'd0 |vpiSize:1 |DEC:0 @@ -1786,7 +1784,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@bar.out), line:8:14, endln:8:17 |vpiParent: - \_if_else: , line:8:5, endln:9:26 + \_assignment: , line:8:14, endln:8:25 |vpiName:out |vpiFullName:work@bar.out |vpiActual: @@ -1799,7 +1797,7 @@ design: (work@foo) |vpiRhs: \_operation: , line:9:21, endln:9:25 |vpiParent: - \_if_else: , line:8:5, endln:9:26 + \_assignment: , line:9:14, endln:9:25 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@bar.inp), line:9:22, endln:9:25 @@ -1812,7 +1810,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@bar.out), line:9:14, endln:9:17 |vpiParent: - \_if_else: , line:8:5, endln:9:26 + \_assignment: , line:9:14, endln:9:25 |vpiName:out |vpiFullName:work@bar.out |vpiActual: @@ -1950,8 +1948,6 @@ design: (work@foo) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:13, endln:31:14 - |vpiParent: - \_assignment: , line:31:9, endln:31:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1959,7 +1955,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.b), line:31:9, endln:31:10 |vpiParent: - \_case_item: , line:30:7, endln:31:15 + \_assignment: , line:31:9, endln:31:14 |vpiName:b |vpiFullName:work@foo.b |vpiActual: @@ -1992,8 +1988,6 @@ design: (work@foo) |vpiBlocking:1 |vpiRhs: \_constant: , line:33:13, endln:33:14 - |vpiParent: - \_assignment: , line:33:9, endln:33:14 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -2001,7 +1995,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.b), line:33:9, endln:33:10 |vpiParent: - \_case_item: , line:32:7, endln:33:15 + \_assignment: , line:33:9, endln:33:14 |vpiName:b |vpiFullName:work@foo.b |vpiActual: @@ -2018,8 +2012,6 @@ design: (work@foo) |vpiBlocking:1 |vpiRhs: \_constant: , line:35:13, endln:35:14 - |vpiParent: - \_assignment: , line:35:9, endln:35:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2027,7 +2019,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.b), line:35:9, endln:35:10 |vpiParent: - \_case_item: , line:34:7, endln:35:15 + \_assignment: , line:35:9, endln:35:14 |vpiName:b |vpiFullName:work@foo.b |vpiActual: diff --git a/tests/BadLabel/BadLabel.log b/tests/BadLabel/BadLabel.log index 3143e91dfb..e7f67990a8 100644 --- a/tests/BadLabel/BadLabel.log +++ b/tests/BadLabel/BadLabel.log @@ -507,8 +507,6 @@ design: (work@test) |vpiBlocking:1 |vpiRhs: \_constant: , line:64:8, endln:64:9 - |vpiParent: - \_assignment: , line:64:4, endln:64:9 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -516,7 +514,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@block_tb.name1.a), line:64:4, endln:64:5 |vpiParent: - \_named_fork: (work@block_tb.name1), line:63:17, endln:65:14 + \_assignment: , line:64:4, endln:64:9 |vpiName:a |vpiFullName:work@block_tb.name1.a |vpiActual: diff --git a/tests/BindStmt/BindStmt.log b/tests/BindStmt/BindStmt.log index a36972e26b..7be844f4ab 100644 --- a/tests/BindStmt/BindStmt.log +++ b/tests/BindStmt/BindStmt.log @@ -1634,7 +1634,7 @@ design: (work@testbench) |vpiName:b |vpiFullName:work@testbench.tt.u1.lce_tracer1.b |vpiActual: - \_logic_net: (work@testbench.tt.u1.b), line:1:71, endln:1:72 + \_logic_net: (b) |vpiLhs: \_ref_obj: (work@testbench.tt.u1.lce_tracer1.a), line:9:10, endln:9:11 |vpiParent: @@ -1642,7 +1642,7 @@ design: (work@testbench) |vpiName:a |vpiFullName:work@testbench.tt.u1.lce_tracer1.a |vpiActual: - \_logic_net: (work@testbench.tt.u1.a), line:1:55, endln:1:56 + \_logic_net: (a) |vpiModule: \_module_inst: work@bp_me_nonsynth_lce_tracer2 (work@testbench.tt.lce_tracer2), file:${SURELOG_DIR}/tests/BindStmt/dut.sv, line:40:13, endln:42:31 |vpiParent: @@ -1807,7 +1807,7 @@ design: (work@testbench) |vpiName:b |vpiFullName:work@testbench.tt.u1.lce_tracer2.b |vpiActual: - \_logic_net: (work@testbench.tt.u1.lce_tracer2.b), line:13:91, endln:13:92 + \_logic_net: (work@testbench.u1.lce_tracer2.b), line:13:91, endln:13:92 |vpiLhs: \_ref_obj: (work@testbench.tt.u1.lce_tracer2.a), line:14:10, endln:14:11 |vpiParent: @@ -1815,7 +1815,7 @@ design: (work@testbench) |vpiName:a |vpiFullName:work@testbench.tt.u1.lce_tracer2.a |vpiActual: - \_logic_net: (work@testbench.tt.u1.lce_tracer2.a), line:13:75, endln:13:76 + \_logic_net: (work@testbench.u1.lce_tracer2.a), line:13:75, endln:13:76 |vpiContAssign: \_cont_assign: , line:2:8, endln:2:12 |vpiParent: diff --git a/tests/BindStmt2/BindStmt2.log b/tests/BindStmt2/BindStmt2.log index 179c4289a2..bbc9460217 100644 --- a/tests/BindStmt2/BindStmt2.log +++ b/tests/BindStmt2/BindStmt2.log @@ -2410,10 +2410,11 @@ design: (work@rv_dm) |vpiActual: \_logic_var: (work@rv_dm.dmi_req), line:28:18, endln:28:25 |vpiActual: - \_ref_obj: (addr), line:62:30, endln:62:34 + \_ref_obj: (work@rv_dm.u_dmidpi.dmi_req_addr.addr), line:62:30, endln:62:34 |vpiParent: \_hier_path: (dmi_req.addr), line:62:22, endln:62:34 |vpiName:addr + |vpiFullName:work@rv_dm.u_dmidpi.dmi_req_addr.addr |vpiLowConn: \_ref_obj: (u_dmidpi.dmi_req_addr), line:62:6, endln:62:18 |vpiParent: @@ -2465,10 +2466,11 @@ design: (work@rv_dm) |vpiActual: \_logic_var: (work@rv_dm.dmi_req), line:28:18, endln:28:25 |vpiActual: - \_ref_obj: (op), line:63:30, endln:63:32 + \_ref_obj: (work@rv_dm.u_dmidpi.dmi_req_op.op), line:63:30, endln:63:32 |vpiParent: \_hier_path: (dmi_req.op), line:63:22, endln:63:32 |vpiName:op + |vpiFullName:work@rv_dm.u_dmidpi.dmi_req_op.op |vpiLowConn: \_ref_obj: (u_dmidpi.dmi_req_op), line:63:6, endln:63:16 |vpiParent: @@ -2520,10 +2522,11 @@ design: (work@rv_dm) |vpiActual: \_logic_var: (work@rv_dm.dmi_req), line:28:18, endln:28:25 |vpiActual: - \_ref_obj: (data), line:64:30, endln:64:34 + \_ref_obj: (work@rv_dm.u_dmidpi.dmi_req_data.data), line:64:30, endln:64:34 |vpiParent: \_hier_path: (dmi_req.data), line:64:22, endln:64:34 |vpiName:data + |vpiFullName:work@rv_dm.u_dmidpi.dmi_req_data.data |vpiLowConn: \_ref_obj: (u_dmidpi.dmi_req_data), line:64:6, endln:64:18 |vpiParent: @@ -2611,10 +2614,11 @@ design: (work@rv_dm) |vpiActual: \_logic_var: (work@rv_dm.dmi_rsp), line:29:18, endln:29:25 |vpiActual: - \_ref_obj: (data), line:67:30, endln:67:34 + \_ref_obj: (work@rv_dm.u_dmidpi.dmi_rsp_data.data), line:67:30, endln:67:34 |vpiParent: \_hier_path: (dmi_rsp.data), line:67:22, endln:67:34 |vpiName:data + |vpiFullName:work@rv_dm.u_dmidpi.dmi_rsp_data.data |vpiLowConn: \_ref_obj: (u_dmidpi.dmi_rsp_data), line:67:6, endln:67:18 |vpiParent: @@ -2666,10 +2670,11 @@ design: (work@rv_dm) |vpiActual: \_logic_var: (work@rv_dm.dmi_rsp), line:29:18, endln:29:25 |vpiActual: - \_ref_obj: (resp), line:68:30, endln:68:34 + \_ref_obj: (work@rv_dm.u_dmidpi.dmi_rsp_resp.resp), line:68:30, endln:68:34 |vpiParent: \_hier_path: (dmi_rsp.resp), line:68:22, endln:68:34 |vpiName:resp + |vpiFullName:work@rv_dm.u_dmidpi.dmi_rsp_resp.resp |vpiLowConn: \_ref_obj: (u_dmidpi.dmi_rsp_resp), line:68:6, endln:68:18 |vpiParent: diff --git a/tests/BindVarsAndEnum/BindVarsAndEnum.log b/tests/BindVarsAndEnum/BindVarsAndEnum.log index 9111986659..1eee249c62 100644 --- a/tests/BindVarsAndEnum/BindVarsAndEnum.log +++ b/tests/BindVarsAndEnum/BindVarsAndEnum.log @@ -1107,7 +1107,7 @@ design: (work@conditional_Fsm) |vpiRhs: \_operation: , line:11:24, endln:11:30 |vpiParent: - \_delay_control: , line:11:10, endln:11:15 + \_assignment: , line:11:16, endln:11:30 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@conditional_Fsm.clock), line:11:25, endln:11:30 @@ -1120,7 +1120,7 @@ design: (work@conditional_Fsm) |vpiLhs: \_ref_obj: (work@conditional_Fsm.clock), line:11:16, endln:11:21 |vpiParent: - \_delay_control: , line:11:10, endln:11:15 + \_assignment: , line:11:16, endln:11:30 |vpiName:clock |vpiFullName:work@conditional_Fsm.clock |vpiActual: @@ -1177,7 +1177,7 @@ design: (work@conditional_Fsm) |vpiRhs: \_ref_obj: (work@conditional_Fsm.RESET), line:15:17, endln:15:22 |vpiParent: - \_begin: (work@conditional_Fsm), line:14:14, endln:16:6 + \_assignment: , line:15:3, endln:15:22 |vpiName:RESET |vpiFullName:work@conditional_Fsm.RESET |vpiActual: @@ -1185,7 +1185,7 @@ design: (work@conditional_Fsm) |vpiLhs: \_ref_obj: (work@conditional_Fsm.curr_state), line:15:3, endln:15:13 |vpiParent: - \_begin: (work@conditional_Fsm), line:14:14, endln:16:6 + \_assignment: , line:15:3, endln:15:22 |vpiName:curr_state |vpiFullName:work@conditional_Fsm.curr_state |vpiActual: diff --git a/tests/Bindings/Bindings.log b/tests/Bindings/Bindings.log index a08dc29815..3824ef2c83 100644 --- a/tests/Bindings/Bindings.log +++ b/tests/Bindings/Bindings.log @@ -1387,7 +1387,7 @@ parameter 35 port 4 range 22 ref_module 2 -ref_obj 70 +ref_obj 67 string_typespec 3 sys_func_call 3 task 9 @@ -1437,7 +1437,7 @@ parameter 35 port 6 range 22 ref_module 2 -ref_obj 100 +ref_obj 95 string_typespec 3 sys_func_call 3 task 18 @@ -2279,21 +2279,18 @@ design: (work@dut1) |vpiOpType:82 |vpiRhs: \_operation: , line:75:21, endln:75:46 - |vpiParent: - \_assignment: , line:75:11, endln:75:46 |vpiTypespec: \_int_typespec: (width_p), line:75:22, endln:75:29 |vpiOpType:67 |vpiOperand: - \_ref_obj: (work@bsg_dff_reset.reset_val_p), line:75:34, endln:75:45 + \_ref_obj: (reset_val_p), line:75:34, endln:75:45 |vpiParent: \_operation: , line:75:21, endln:75:46 |vpiName:reset_val_p - |vpiFullName:work@bsg_dff_reset.reset_val_p |vpiLhs: \_ref_obj: (work@bsg_dff_reset.data_r), line:75:11, endln:75:17 |vpiParent: - \_if_else: , line:74:9, endln:77:28 + \_assignment: , line:75:11, endln:75:46 |vpiName:data_r |vpiFullName:work@bsg_dff_reset.data_r |vpiActual: @@ -2306,7 +2303,7 @@ design: (work@dut1) |vpiRhs: \_ref_obj: (work@bsg_dff_reset.data_i), line:77:21, endln:77:27 |vpiParent: - \_if_else: , line:74:9, endln:77:28 + \_assignment: , line:77:11, endln:77:27 |vpiName:data_i |vpiFullName:work@bsg_dff_reset.data_i |vpiActual: @@ -2314,7 +2311,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (work@bsg_dff_reset.data_r), line:77:11, endln:77:17 |vpiParent: - \_if_else: , line:74:9, endln:77:28 + \_assignment: , line:77:11, endln:77:27 |vpiName:data_r |vpiFullName:work@bsg_dff_reset.data_r |vpiActual: @@ -2443,23 +2440,20 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_operation: , line:28:22, endln:28:47 - |vpiParent: - \_assignment: , line:28:5, endln:28:47 |vpiTypespec: \_int_typespec: , line:24:14, endln:24:26 |vpiOpType:67 |vpiOperand: - \_ref_obj: (work@dut1.device), line:28:40, endln:28:46 + \_ref_obj: (device), line:28:40, endln:28:46 |vpiParent: \_operation: , line:28:22, endln:28:47 |vpiName:device - |vpiFullName:work@dut1.device |vpiActual: \_int_var: (work@dut1.device), line:26:7, endln:26:17 |vpiLhs: \_ref_obj: (work@dut1.device_sel_req), line:28:5, endln:28:19 |vpiParent: - \_begin: (work@dut1), line:27:15, endln:29:6 + \_assignment: , line:28:5, endln:28:47 |vpiName:device_sel_req |vpiFullName:work@dut1.device_sel_req |vpiActual: @@ -2734,7 +2728,7 @@ design: (work@dut1) |vpiOperand: \_operation: , line:60:50, endln:60:69 |vpiParent: - \_operation: , line:60:28, endln:60:79 + \_operation: , line:60:50, endln:60:78 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@dut3.LfsrDw), line:60:51, endln:60:57 @@ -2750,11 +2744,7 @@ design: (work@dut1) |vpiOperand: \_bit_select: (work@dut3.lfsr_q), line:60:58, endln:60:67 |vpiParent: - \_ref_obj: (work@dut3.lfsr_q) - |vpiParent: - \_operation: , line:60:28, endln:60:79 - |vpiName:lfsr_q - |vpiFullName:work@dut3.lfsr_q + \_operation: , line:60:28, endln:60:79 |vpiName:lfsr_q |vpiFullName:work@dut3.lfsr_q |vpiIndex: @@ -2781,7 +2771,7 @@ design: (work@dut1) |vpiOperand: \_ref_obj: (work@dut3.lfsr_q), line:60:83, endln:60:89 |vpiParent: - \_operation: , line:60:28, endln:60:95 + \_operation: , line:60:83, endln:60:94 |vpiName:lfsr_q |vpiFullName:work@dut3.lfsr_q |vpiActual: @@ -3144,8 +3134,6 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_constant: , line:102:35, endln:102:39 - |vpiParent: - \_assignment: , line:102:19, endln:102:39 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -3153,7 +3141,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (sel_one_hot_n), line:102:19, endln:102:32 |vpiParent: - \_begin: , line:102:13, endln:102:73 + \_assignment: , line:102:19, endln:102:39 |vpiName:sel_one_hot_n |vpiStmt: \_assignment: , line:102:41, endln:102:68 @@ -3163,8 +3151,6 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_operation: , line:102:49, endln:102:68 - |vpiParent: - \_assignment: , line:102:41, endln:102:68 |vpiTypespec: \_unsupported_typespec: (lg_inputs_p), line:102:50, endln:102:61 |vpiName:lg_inputs_p @@ -3180,7 +3166,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (tag_o), line:102:41, endln:102:46 |vpiParent: - \_begin: , line:102:13, endln:102:73 + \_assignment: , line:102:41, endln:102:68 |vpiName:tag_o |vpiCaseItem: \_case_item: , line:103:5, endln:103:72 @@ -3206,8 +3192,6 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_constant: , line:103:34, endln:103:38 - |vpiParent: - \_assignment: , line:103:19, endln:103:38 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -3215,7 +3199,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (sel_one_hot_n), line:103:19, endln:103:32 |vpiParent: - \_begin: , line:103:13, endln:103:72 + \_assignment: , line:103:19, endln:103:38 |vpiName:sel_one_hot_n |vpiStmt: \_assignment: , line:103:40, endln:103:67 @@ -3225,8 +3209,6 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_operation: , line:103:48, endln:103:67 - |vpiParent: - \_assignment: , line:103:40, endln:103:67 |vpiTypespec: \_unsupported_typespec: (lg_inputs_p), line:103:49, endln:103:60 |vpiName:lg_inputs_p @@ -3242,7 +3224,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (tag_o), line:103:40, endln:103:45 |vpiParent: - \_begin: , line:103:13, endln:103:72 + \_assignment: , line:103:40, endln:103:67 |vpiName:tag_o |vpiCaseItem: \_case_item: , line:104:7, endln:104:80 @@ -3261,7 +3243,7 @@ design: (work@dut1) |vpiRhs: \_operation: , line:104:37, endln:104:46 |vpiParent: - \_begin: , line:104:16, endln:104:80 + \_assignment: , line:104:22, endln:104:46 |vpiOpType:34 |vpiOperand: \_constant: , line:104:38, endln:104:39 @@ -3274,7 +3256,7 @@ design: (work@dut1) |vpiOperand: \_operation: , line:104:39, endln:104:45 |vpiParent: - \_begin: , line:104:16, endln:104:80 + \_assignment: , line:104:22, endln:104:46 |vpiOpType:33 |vpiOperand: \_constant: , line:104:40, endln:104:44 @@ -3285,7 +3267,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (sel_one_hot_n), line:104:22, endln:104:35 |vpiParent: - \_begin: , line:104:16, endln:104:80 + \_assignment: , line:104:22, endln:104:46 |vpiName:sel_one_hot_n |vpiStmt: \_assignment: , line:104:48, endln:104:75 @@ -3295,8 +3277,6 @@ design: (work@dut1) |vpiBlocking:1 |vpiRhs: \_operation: , line:104:56, endln:104:75 - |vpiParent: - \_assignment: , line:104:48, endln:104:75 |vpiTypespec: \_unsupported_typespec: (lg_inputs_p), line:104:57, endln:104:68 |vpiName:lg_inputs_p @@ -3312,7 +3292,7 @@ design: (work@dut1) |vpiLhs: \_ref_obj: (tag_o), line:104:48, endln:104:53 |vpiParent: - \_begin: , line:104:16, endln:104:80 + \_assignment: , line:104:48, endln:104:75 |vpiName:tag_o |vpiAlwaysType:2 |uhdmtopModules: @@ -4164,18 +4144,12 @@ design: (work@dut1) |vpiOperand: \_bit_select: (lfsr_q), line:60:58, endln:60:67 |vpiParent: - \_ref_obj: (work@dut3.lfsr_q) - |vpiParent: - \_operation: , line:60:57, endln:60:68 - |vpiName:lfsr_q - |vpiFullName:work@dut3.lfsr_q - |vpiActual: - \_logic_net: (lfsr_q) + \_operation: , line:60:57, endln:60:68 |vpiName:lfsr_q - |vpiIndex: - \_constant: , line:60:65, endln:60:66 |vpiActual: \_logic_net: (lfsr_q) + |vpiIndex: + \_constant: , line:60:65, endln:60:66 |vpiOperand: \_ref_obj: (work@dut3.coeffs), line:60:72, endln:60:78 |vpiParent: @@ -4544,19 +4518,15 @@ design: (work@dut1) |vpiOperand: \_bit_select: (work@dut5.t), line:96:51, endln:96:55 |vpiParent: - \_ref_obj: (work@dut5.t) - |vpiParent: - \_operation: , line:96:44, endln:96:56 - |vpiName:t - |vpiFullName:work@dut5.t + \_operation: , line:96:44, endln:96:56 |vpiName:t |vpiFullName:work@dut5.t |vpiIndex: - \_ref_obj: (work@dut5.t.j), line:96:53, endln:96:54 + \_ref_obj: (work@dut5.j), line:96:53, endln:96:54 |vpiParent: \_bit_select: (work@dut5.t), line:96:51, endln:96:55 |vpiName:j - |vpiFullName:work@dut5.t.j + |vpiFullName:work@dut5.j |vpiActual: \_logic_net: (j) |vpiOperand: diff --git a/tests/BitComplex/BitComplex.log b/tests/BitComplex/BitComplex.log index ce18bc12ff..695291d6cb 100644 --- a/tests/BitComplex/BitComplex.log +++ b/tests/BitComplex/BitComplex.log @@ -219,7 +219,7 @@ param_assign 10 parameter 10 port 2 range 4 -ref_obj 12 +ref_obj 9 struct_net 1 struct_typespec 2 typespec_member 2 @@ -243,7 +243,7 @@ param_assign 10 parameter 10 port 3 range 4 -ref_obj 14 +ref_obj 11 struct_net 1 struct_typespec 2 typespec_member 2 @@ -355,7 +355,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (keymgr_pkg::keymgr_pkg::hw_key_req_t::Shares), line:6:14, endln:6:20 |vpiParent: - \_struct_typespec: (keymgr_pkg::hw_key_req_t), line:5:12, endln:5:18 + \_operation: , line:6:14, endln:6:22 |vpiName:Shares |vpiFullName:keymgr_pkg::keymgr_pkg::hw_key_req_t::Shares |vpiActual: @@ -388,7 +388,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (keymgr_pkg::keymgr_pkg::hw_key_req_t::KeyWidth), line:6:26, endln:6:34 |vpiParent: - \_struct_typespec: (keymgr_pkg::hw_key_req_t), line:5:12, endln:5:18 + \_operation: , line:6:26, endln:6:36 |vpiName:KeyWidth |vpiFullName:keymgr_pkg::keymgr_pkg::hw_key_req_t::KeyWidth |vpiActual: diff --git a/tests/BitPartSelect/BitPartSelect.log b/tests/BitPartSelect/BitPartSelect.log index 7515ac218e..75bbb3f276 100644 --- a/tests/BitPartSelect/BitPartSelect.log +++ b/tests/BitPartSelect/BitPartSelect.log @@ -254,7 +254,7 @@ param_assign 6 parameter 6 part_select 1 range 8 -ref_obj 4 +ref_obj 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -273,7 +273,7 @@ param_assign 6 parameter 6 part_select 2 range 8 -ref_obj 8 +ref_obj 4 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/BitPartSelect/slpp_all/surelog.uhdm ... @@ -397,28 +397,28 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.storage), line:9:27, endln:9:60 |vpiParent: - \_ref_obj: (work@top.storage) - |vpiParent: - \_cont_assign: , line:9:11, endln:9:60 - |vpiName:storage - |vpiFullName:work@top.storage + \_cont_assign: , line:9:11, endln:9:60 |vpiName:storage |vpiFullName:work@top.storage |vpiIndex: - \_part_select: , line:9:35, endln:9:59 + \_part_select: fifo_rptr (work@top.storage.fifo_rptr), line:9:35, endln:9:59 |vpiParent: - \_ref_obj: fifo_rptr (fifo_rptr), line:9:35, endln:9:44 - |vpiName:fifo_rptr - |vpiDefName:fifo_rptr + \_bit_select: (work@top.storage), line:9:27, endln:9:60 + |vpiName:fifo_rptr + |vpiFullName:work@top.storage.fifo_rptr + |vpiDefName:fifo_rptr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:9:45, endln:9:56 + |vpiParent: + \_part_select: fifo_rptr (work@top.storage.fifo_rptr), line:9:35, endln:9:59 |vpiOpType:11 |vpiOperand: - \_ref_obj: (PTR_WIDTH), line:9:45, endln:9:54 + \_ref_obj: (work@top.storage.fifo_rptr.PTR_WIDTH), line:9:45, endln:9:54 |vpiParent: \_operation: , line:9:45, endln:9:56 |vpiName:PTR_WIDTH + |vpiFullName:work@top.storage.fifo_rptr.PTR_WIDTH |vpiOperand: \_constant: , line:9:55, endln:9:56 |vpiParent: @@ -701,31 +701,25 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.storage), line:9:27, endln:9:60 |vpiParent: - \_ref_obj: (work@top.storage) - |vpiParent: - \_cont_assign: , line:9:11, endln:9:60 - |vpiName:storage - |vpiFullName:work@top.storage - |vpiActual: - \_logic_var: (work@top.storage), line:5:33, endln:5:40 + \_cont_assign: , line:9:11, endln:9:60 |vpiName:storage |vpiFullName:work@top.storage + |vpiActual: + \_logic_var: (work@top.storage), line:5:33, endln:5:40 |vpiIndex: - \_part_select: , line:9:35, endln:9:59 + \_part_select: fifo_rptr (work@top.storage.fifo_rptr), line:9:35, endln:9:59 |vpiParent: - \_ref_obj: fifo_rptr (work@top.storage.fifo_rptr), line:9:35, endln:9:44 - |vpiParent: - \_bit_select: (work@top.storage), line:9:27, endln:9:60 - |vpiName:fifo_rptr - |vpiFullName:work@top.storage.fifo_rptr - |vpiDefName:fifo_rptr - |vpiActual: - \_logic_var: (work@top.fifo_rptr), line:7:25, endln:7:34 + \_bit_select: (work@top.storage), line:9:27, endln:9:60 + |vpiName:fifo_rptr + |vpiFullName:work@top.storage.fifo_rptr + |vpiDefName:fifo_rptr + |vpiActual: + \_logic_var: (work@top.fifo_rptr), line:7:25, endln:7:34 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:9:45, endln:9:56 |vpiParent: - \_part_select: , line:9:35, endln:9:59 + \_part_select: fifo_rptr (work@top.storage.fifo_rptr), line:9:35, endln:9:59 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.storage.fifo_rptr.PTR_WIDTH), line:9:45, endln:9:54 @@ -739,8 +733,6 @@ design: (work@top) \_constant: , line:9:55, endln:9:56 |vpiRightRange: \_constant: , line:9:57, endln:9:58 - |vpiActual: - \_logic_var: (work@top.storage), line:5:33, endln:5:40 |vpiLhs: \_ref_obj: (work@top.storage_rdata), line:9:11, endln:9:24 |vpiParent: @@ -757,4 +749,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/BitPartSelect/dut.sv | ${SURELOG_DIR}/build/regression/BitPartSelect/roundtrip/dut_000.sv | 3 | 10 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/BitPartSelect/dut.sv | ${SURELOG_DIR}/build/regression/BitPartSelect/roundtrip/dut_000.sv | 4 | 10 | \ No newline at end of file diff --git a/tests/BitSelect/BitSelect.log b/tests/BitSelect/BitSelect.log index ccc3552fb0..4e8a7e2b61 100644 --- a/tests/BitSelect/BitSelect.log +++ b/tests/BitSelect/BitSelect.log @@ -225,7 +225,7 @@ param_assign 10 parameter 13 range 6 ref_module 4 -ref_obj 11 +ref_obj 6 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -250,7 +250,7 @@ param_assign 13 parameter 13 range 6 ref_module 4 -ref_obj 11 +ref_obj 6 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -404,9 +404,6 @@ design: (work@dut) \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/BitSelect/dut.sv, line:6:1, endln:15:10 |vpiRhs: \_bit_select: (AlertAsyncOn), line:9:18, endln:9:33 - |vpiParent: - \_ref_obj: (AlertAsyncOn) - |vpiName:AlertAsyncOn |vpiName:AlertAsyncOn |vpiIndex: \_constant: , line:9:31, endln:9:32 diff --git a/tests/BitSelectExpr/BitSelectExpr.log b/tests/BitSelectExpr/BitSelectExpr.log index aba248b25e..14d51a1991 100644 --- a/tests/BitSelectExpr/BitSelectExpr.log +++ b/tests/BitSelectExpr/BitSelectExpr.log @@ -126,7 +126,7 @@ packed_array_typespec 1 packed_array_var 1 port 2 range 2 -ref_obj 6 +ref_obj 4 struct_typespec 1 struct_var 1 typespec_member 1 @@ -148,7 +148,7 @@ packed_array_typespec 1 packed_array_var 1 port 3 range 2 -ref_obj 9 +ref_obj 6 struct_typespec 1 struct_var 1 typespec_member 1 @@ -237,14 +237,11 @@ design: (work@top) \_cont_assign: , line:9:11, endln:9:40 |vpiName:sram_otp_key_o[2 - 2].nonce |vpiActual: - \_bit_select: (sram_otp_key_o), line:9:11, endln:9:25 + \_bit_select: (sram_otp_key_o[2 - 2]), line:9:11, endln:9:25 |vpiParent: - \_ref_obj: (work@top.sram_otp_key_o[2 - 2]) - |vpiParent: - \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 - |vpiName:sram_otp_key_o[2 - 2] - |vpiFullName:work@top.sram_otp_key_o[2 - 2] + \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 |vpiName:sram_otp_key_o + |vpiFullName:sram_otp_key_o[2 - 2] |vpiIndex: \_operation: , line:9:26, endln:9:29 |vpiOpType:11 @@ -265,10 +262,11 @@ design: (work@top) |UINT:2 |vpiConstType:9 |vpiActual: - \_ref_obj: (nonce) + \_ref_obj: (sram_otp_key_o[2 - 2].nonce) |vpiParent: \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 |vpiName:nonce + |vpiFullName:sram_otp_key_o[2 - 2].nonce |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BitSelectExpr/dut.sv, line:1:1, endln:12:10 |vpiName:work@top @@ -351,18 +349,17 @@ design: (work@top) \_cont_assign: , line:9:11, endln:9:40 |vpiName:sram_otp_key_o[2 - 2].nonce |vpiActual: - \_bit_select: (sram_otp_key_o), line:9:11, endln:9:25 + \_bit_select: (sram_otp_key_o[2 - 2]), line:9:11, endln:9:25 |vpiParent: - \_ref_obj: (work@top.sram_otp_key_o[2 - 2]) - |vpiParent: - \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 - |vpiName:sram_otp_key_o[2 - 2] - |vpiFullName:work@top.sram_otp_key_o[2 - 2] + \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 |vpiName:sram_otp_key_o + |vpiFullName:sram_otp_key_o[2 - 2] + |vpiActual: + \_packed_array_var: (work@top.sram_otp_key_o), line:7:29, endln:7:43 |vpiIndex: \_operation: , line:9:26, endln:9:29 |vpiParent: - \_bit_select: (sram_otp_key_o), line:9:11, endln:9:25 + \_bit_select: (sram_otp_key_o[2 - 2]), line:9:11, endln:9:25 |vpiOpType:11 |vpiOperand: \_constant: , line:9:26, endln:9:27 @@ -380,13 +377,12 @@ design: (work@top) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_packed_array_var: (work@top.sram_otp_key_o), line:7:29, endln:7:43 |vpiActual: - \_ref_obj: (nonce) + \_ref_obj: (sram_otp_key_o[2 - 2].nonce) |vpiParent: \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:9:11, endln:9:25 |vpiName:nonce + |vpiFullName:sram_otp_key_o[2 - 2].nonce |vpiActual: \_typespec_member: (nonce), line:4:14, endln:4:19 =================== diff --git a/tests/BitSelectSelect/BitSelectSelect.log b/tests/BitSelectSelect/BitSelectSelect.log index d6e431143d..bee4adc037 100644 --- a/tests/BitSelectSelect/BitSelectSelect.log +++ b/tests/BitSelectSelect/BitSelectSelect.log @@ -144,7 +144,7 @@ packed_array_typespec 1 packed_array_var 1 port 2 range 5 -ref_obj 6 +ref_obj 4 struct_typespec 1 struct_var 1 typespec_member 1 @@ -166,7 +166,7 @@ packed_array_typespec 1 packed_array_var 1 port 3 range 5 -ref_obj 10 +ref_obj 6 struct_typespec 1 struct_var 1 typespec_member 1 @@ -274,14 +274,11 @@ design: (work@top) \_cont_assign: , line:8:11, endln:8:29 |vpiName:a[0][0].min_v |vpiActual: - \_bit_select: (a), line:8:11, endln:8:12 + \_bit_select: (a[0]), line:8:11, endln:8:12 |vpiParent: - \_ref_obj: (work@top.a[0]) - |vpiParent: - \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 - |vpiName:a[0] - |vpiFullName:work@top.a[0] + \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 |vpiName:a + |vpiFullName:a[0] |vpiIndex: \_constant: , line:8:13, endln:8:14 |vpiDecompile:0 @@ -289,8 +286,10 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiActual: - \_bit_select: ([0]), line:8:13, endln:8:14 - |vpiName:[0] + \_bit_select: (a[0][0]), line:8:13, endln:8:14 + |vpiParent: + \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 + |vpiFullName:a[0][0] |vpiIndex: \_constant: , line:8:16, endln:8:17 |vpiDecompile:0 @@ -298,10 +297,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (min_v) + \_ref_obj: (a[0][0].min_v) |vpiParent: \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 |vpiName:min_v + |vpiFullName:a[0][0].min_v |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BitSelectSelect/dut.sv, line:2:1, endln:9:10 |vpiName:work@top @@ -406,46 +406,40 @@ design: (work@top) \_cont_assign: , line:8:11, endln:8:29 |vpiName:a[0][0].min_v |vpiActual: - \_bit_select: (a), line:8:11, endln:8:12 + \_bit_select: (a[0]), line:8:11, endln:8:12 |vpiParent: - \_ref_obj: (work@top.a[0]) - |vpiParent: - \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 - |vpiName:a[0] - |vpiFullName:work@top.a[0] + \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 |vpiName:a + |vpiFullName:a[0] + |vpiActual: + \_packed_array_var: (work@top.a), line:7:28, endln:7:29 |vpiIndex: \_constant: , line:8:13, endln:8:14 |vpiParent: - \_bit_select: (a), line:8:11, endln:8:12 + \_bit_select: (a[0]), line:8:11, endln:8:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_packed_array_var: (work@top.a), line:7:28, endln:7:29 |vpiActual: - \_bit_select: ([0]), line:8:13, endln:8:14 + \_bit_select: (a[0][0]), line:8:13, endln:8:14 |vpiParent: - \_ref_obj: (work@top.a[0][0].min_v) - |vpiParent: - \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 - |vpiName:a[0][0].min_v - |vpiFullName:work@top.a[0][0].min_v - |vpiName:[0] + \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 + |vpiFullName:a[0][0] |vpiIndex: \_constant: , line:8:16, endln:8:17 |vpiParent: - \_bit_select: ([0]), line:8:13, endln:8:14 + \_bit_select: (a[0][0]), line:8:13, endln:8:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (min_v) + \_ref_obj: (a[0][0].min_v) |vpiParent: \_hier_path: (a[0][0].min_v), line:8:11, endln:8:12 |vpiName:min_v + |vpiFullName:a[0][0].min_v |vpiActual: \_typespec_member: (min_v), line:4:19, endln:4:24 =================== diff --git a/tests/BitsArray/BitsArray.log b/tests/BitsArray/BitsArray.log index 998d3b4546..50d43d2e62 100644 --- a/tests/BitsArray/BitsArray.log +++ b/tests/BitsArray/BitsArray.log @@ -254,7 +254,7 @@ parameter 4 port 3 range 13 ref_module 1 -ref_obj 9 +ref_obj 3 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -277,7 +277,7 @@ parameter 4 port 4 range 13 ref_module 1 -ref_obj 12 +ref_obj 4 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/BitsArray/slpp_all/surelog.uhdm ... @@ -407,8 +407,7 @@ design: (work@top) |vpiOperand: \_bit_select: (key_init_we), line:18:15, endln:18:29 |vpiParent: - \_ref_obj: (key_init_we) - |vpiName:key_init_we + \_operation: , line:18:14, endln:18:46 |vpiName:key_init_we |vpiIndex: \_constant: , line:18:27, endln:18:28 @@ -421,8 +420,7 @@ design: (work@top) |vpiOperand: \_bit_select: (key_init_we), line:18:31, endln:18:45 |vpiParent: - \_ref_obj: (key_init_we) - |vpiName:key_init_we + \_operation: , line:18:14, endln:18:46 |vpiName:key_init_we |vpiIndex: \_constant: , line:18:43, endln:18:44 @@ -653,15 +651,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.u_reg_status_key_init.we_i.key_init_we), line:18:15, endln:18:29 |vpiParent: - \_ref_obj: (work@top.u_reg_status_key_init.we_i.key_init_we) - |vpiParent: - \_operation: , line:18:14, endln:18:46 - |vpiName:key_init_we - |vpiFullName:work@top.u_reg_status_key_init.we_i.key_init_we - |vpiActual: - \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 + \_operation: , line:18:14, endln:18:46 |vpiName:key_init_we |vpiFullName:work@top.u_reg_status_key_init.we_i.key_init_we + |vpiActual: + \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 |vpiIndex: \_constant: , line:18:27, endln:18:28 |vpiParent: @@ -670,20 +664,14 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 |vpiOperand: \_bit_select: (work@top.u_reg_status_key_init.we_i.key_init_we), line:18:31, endln:18:45 |vpiParent: - \_ref_obj: (work@top.u_reg_status_key_init.we_i.key_init_we) - |vpiParent: - \_operation: , line:18:14, endln:18:46 - |vpiName:key_init_we - |vpiFullName:work@top.u_reg_status_key_init.we_i.key_init_we - |vpiActual: - \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 + \_operation: , line:18:14, endln:18:46 |vpiName:key_init_we |vpiFullName:work@top.u_reg_status_key_init.we_i.key_init_we + |vpiActual: + \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 |vpiIndex: \_constant: , line:18:43, endln:18:44 |vpiParent: @@ -692,8 +680,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_array_var: (work@top.key_init_we), line:13:16, endln:13:31 |vpiLowConn: \_ref_obj: (work@top.u_reg_status_key_init.we_i), line:18:8, endln:18:12 |vpiParent: diff --git a/tests/BitsOp/BitsOp.log b/tests/BitsOp/BitsOp.log index b58532b0c6..996ce2d936 100644 --- a/tests/BitsOp/BitsOp.log +++ b/tests/BitsOp/BitsOp.log @@ -75,7 +75,7 @@ parameter 96 part_select 1 port 2 range 43 -ref_obj 65 +ref_obj 64 struct_net 2 struct_typespec 9 sys_func_call 22 @@ -112,7 +112,7 @@ parameter 96 part_select 2 port 3 range 43 -ref_obj 73 +ref_obj 71 struct_net 2 struct_typespec 9 sys_func_call 22 @@ -716,7 +716,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_SZW), line:36:13, endln:36:22 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:32:11, endln:32:17 + \_operation: , line:36:13, endln:36:30 |vpiName:top_pkg::TL_SZW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_SZW |vpiActual: @@ -765,7 +765,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AIW), line:37:13, endln:37:22 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:32:11, endln:32:17 + \_operation: , line:37:13, endln:37:30 |vpiName:top_pkg::TL_AIW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AIW |vpiActual: @@ -814,7 +814,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AW), line:38:14, endln:38:23 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:32:11, endln:32:17 + \_operation: , line:38:14, endln:38:30 |vpiName:top_pkg::TL_AW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AW |vpiActual: @@ -863,7 +863,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DBW), line:39:13, endln:39:22 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:32:11, endln:32:17 + \_operation: , line:39:13, endln:39:30 |vpiName:top_pkg::TL_DBW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DBW |vpiActual: @@ -912,7 +912,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DW), line:40:14, endln:40:23 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:32:11, endln:32:17 + \_operation: , line:40:14, endln:40:30 |vpiName:top_pkg::TL_DW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DW |vpiActual: @@ -2422,30 +2422,28 @@ design: (work@dut) |vpiRhs: \_operation: , line:121:16, endln:121:48 |vpiParent: - \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 + \_assignment: , line:121:9, endln:121:48 |vpiOpType:33 |vpiOperand: \_ref_obj: (work@dmi_jtag.p_shift.dmi_tdi), line:121:17, endln:121:24 |vpiParent: - \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 + \_assignment: , line:121:9, endln:121:48 |vpiName:dmi_tdi |vpiFullName:work@dmi_jtag.p_shift.dmi_tdi |vpiActual: \_logic_net: (dmi_tdi) |vpiOperand: - \_part_select: , line:121:26, endln:121:47 + \_part_select: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:47 |vpiParent: - \_ref_obj: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:30 - |vpiParent: - \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 - |vpiName:dr_q - |vpiFullName:work@dmi_jtag.p_shift.dr_q - |vpiDefName:dr_q + \_assignment: , line:121:9, endln:121:48 + |vpiName:dr_q + |vpiFullName:work@dmi_jtag.p_shift.dr_q + |vpiDefName:dr_q |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:121:31, endln:121:44 |vpiParent: - \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 + \_part_select: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:47 |vpiOpType:11 |vpiOperand: \_constant: , line:121:31, endln:121:42 @@ -2472,7 +2470,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dmi_jtag.p_shift.dr_d), line:121:9, endln:121:13 |vpiParent: - \_begin: (work@dmi_jtag.p_shift), line:120:23, endln:122:10 + \_assignment: , line:121:9, endln:121:48 |vpiName:dr_d |vpiFullName:work@dmi_jtag.p_shift.dr_d |vpiActual: @@ -2639,7 +2637,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (DataWidth), line:81:40, endln:81:49 |vpiParent: - \_sys_func_call: ($clog2), line:81:33, endln:81:52 + \_operation: , line:81:40, endln:81:51 |vpiName:DataWidth |vpiOperand: \_constant: , line:81:50, endln:81:51 @@ -3321,21 +3319,19 @@ design: (work@dut) |vpiActual: \_logic_net: (dmi_tdi) |vpiOperand: - \_part_select: , line:121:26, endln:121:47 + \_part_select: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:47 |vpiParent: - \_ref_obj: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:30 - |vpiParent: - \_operation: , line:121:16, endln:121:48 - |vpiName:dr_q - |vpiFullName:work@dmi_jtag.p_shift.dr_q - |vpiDefName:dr_q - |vpiActual: - \_logic_var: (work@dmi_jtag.dr_q), line:112:34, endln:112:38 + \_operation: , line:121:16, endln:121:48 + |vpiName:dr_q + |vpiFullName:work@dmi_jtag.p_shift.dr_q + |vpiDefName:dr_q + |vpiActual: + \_logic_var: (work@dmi_jtag.dr_q), line:112:34, endln:112:38 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:121:31, endln:121:44 |vpiParent: - \_part_select: , line:121:26, endln:121:47 + \_part_select: dr_q (work@dmi_jtag.p_shift.dr_q), line:121:26, endln:121:47 |vpiOpType:11 |vpiOperand: \_constant: , line:121:31, endln:121:42 diff --git a/tests/BitsStructMember/BitsStructMember.log b/tests/BitsStructMember/BitsStructMember.log index 4f53cb6f5a..5843323a6e 100644 --- a/tests/BitsStructMember/BitsStructMember.log +++ b/tests/BitsStructMember/BitsStructMember.log @@ -48,7 +48,7 @@ param_assign 4 parameter 4 port 4 range 8 -ref_obj 21 +ref_obj 19 struct_net 1 struct_typespec 2 typespec_member 8 @@ -79,7 +79,7 @@ param_assign 4 parameter 4 port 6 range 8 -ref_obj 32 +ref_obj 28 struct_net 1 struct_typespec 2 typespec_member 8 @@ -178,7 +178,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (keymgr_pkg::keymgr_pkg::kmac_data_req_t::KmacDataIfWidth), line:7:12, endln:7:27 |vpiParent: - \_struct_typespec: (keymgr_pkg::kmac_data_req_t), line:5:11, endln:5:17 + \_operation: , line:7:12, endln:7:29 |vpiName:KmacDataIfWidth |vpiFullName:keymgr_pkg::keymgr_pkg::kmac_data_req_t::KmacDataIfWidth |vpiActual: @@ -227,12 +227,12 @@ design: (work@top) |vpiOperand: \_operation: , line:8:12, endln:8:29 |vpiParent: - \_struct_typespec: (keymgr_pkg::kmac_data_req_t), line:5:11, endln:5:17 + \_operation: , line:8:12, endln:8:31 |vpiOpType:12 |vpiOperand: \_ref_obj: (keymgr_pkg::keymgr_pkg::kmac_data_req_t::KmacDataIfWidth), line:8:12, endln:8:27 |vpiParent: - \_struct_typespec: (keymgr_pkg::kmac_data_req_t), line:5:11, endln:5:17 + \_operation: , line:8:12, endln:8:29 |vpiName:KmacDataIfWidth |vpiFullName:keymgr_pkg::keymgr_pkg::kmac_data_req_t::KmacDataIfWidth |vpiActual: @@ -621,7 +621,7 @@ design: (work@top) |vpiRhs: \_operation: , line:23:33, endln:23:59 |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 + \_assignment: , line:23:11, endln:23:59 |vpiOpType:34 |vpiOperand: \_constant: , line:23:34, endln:23:35 @@ -634,12 +634,12 @@ design: (work@top) |vpiOperand: \_operation: , line:23:35, endln:23:58 |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 + \_assignment: , line:23:11, endln:23:59 |vpiOpType:33 |vpiOperand: \_hier_path: (keymgr_data_i.strb[i]), line:23:36, endln:23:57 |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 + \_assignment: , line:23:11, endln:23:59 |vpiName:keymgr_data_i.strb[i] |vpiActual: \_ref_obj: (keymgr_data_i), line:23:36, endln:23:49 @@ -649,36 +649,30 @@ design: (work@top) |vpiActual: \_bit_select: (work@top.strb) |vpiParent: - \_ref_obj: (work@top.strb) - |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 - |vpiName:strb - |vpiFullName:work@top.strb + \_assignment: , line:23:11, endln:23:59 |vpiName:strb |vpiFullName:work@top.strb |vpiIndex: \_ref_obj: (work@top.i), line:23:55, endln:23:56 |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 + \_bit_select: (work@top.strb) |vpiName:i |vpiFullName:work@top.i |vpiActual: \_int_var: (work@top.i), line:22:18, endln:22:19 |vpiLhs: - \_indexed_part_select: , line:23:11, endln:23:30 + \_indexed_part_select: kmac_mask_o (work@top.kmac_mask_o), line:23:11, endln:23:30 |vpiParent: - \_ref_obj: kmac_mask_o (work@top.kmac_mask_o) - |vpiParent: - \_assignment: , line:23:11, endln:23:59 - |vpiName:kmac_mask_o - |vpiFullName:work@top.kmac_mask_o - |vpiDefName:kmac_mask_o + \_assignment: , line:23:11, endln:23:59 + |vpiName:kmac_mask_o + |vpiFullName:work@top.kmac_mask_o + |vpiDefName:kmac_mask_o |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:23:23, endln:23:26 |vpiParent: - \_begin: (work@top), line:22:63, endln:24:12 + \_indexed_part_select: kmac_mask_o (work@top.kmac_mask_o), line:23:11, endln:23:30 |vpiOpType:25 |vpiOperand: \_constant: , line:23:23, endln:23:24 @@ -689,11 +683,11 @@ design: (work@top) |UINT:8 |vpiConstType:9 |vpiOperand: - \_ref_obj: (work@top.i), line:23:25, endln:23:26 + \_ref_obj: (work@top.kmac_mask_o.i), line:23:25, endln:23:26 |vpiParent: \_operation: , line:23:23, endln:23:26 |vpiName:i - |vpiFullName:work@top.i + |vpiFullName:work@top.kmac_mask_o.i |vpiActual: \_int_var: (work@top.i), line:22:18, endln:22:19 |vpiWidthExpr: @@ -815,7 +809,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.kmac_mask_o.MsgWidth), line:17:16, endln:17:24 |vpiParent: - \_port: (kmac_mask_o), line:17:30, endln:17:41 + \_operation: , line:17:16, endln:17:26 |vpiName:MsgWidth |vpiFullName:work@top.kmac_mask_o.MsgWidth |vpiActual: @@ -962,44 +956,36 @@ design: (work@top) |vpiActual: \_struct_net: (work@top.keymgr_data_i), line:16:48, endln:16:61 |vpiActual: - \_bit_select: (work@top.strb) + \_bit_select: (work@top.keymgr_data_i.strb[i].strb) |vpiParent: - \_ref_obj: (work@top.strb) - |vpiParent: - \_hier_path: (keymgr_data_i.strb[i]), line:23:36, endln:23:57 - |vpiName:strb - |vpiFullName:work@top.strb - |vpiActual: - \_typespec_member: (strb), line:8:35, endln:8:39 + \_hier_path: (keymgr_data_i.strb[i]), line:23:36, endln:23:57 |vpiName:strb - |vpiFullName:work@top.strb + |vpiFullName:work@top.keymgr_data_i.strb[i].strb + |vpiActual: + \_typespec_member: (strb), line:8:35, endln:8:39 |vpiIndex: - \_ref_obj: (work@top.strb.i), line:23:55, endln:23:56 + \_ref_obj: (work@top.keymgr_data_i.strb[i].i), line:23:55, endln:23:56 |vpiParent: - \_bit_select: (work@top.strb) + \_bit_select: (work@top.keymgr_data_i.strb[i].strb) |vpiName:i - |vpiFullName:work@top.strb.i + |vpiFullName:work@top.keymgr_data_i.strb[i].i |vpiActual: \_int_var: (work@top.i), line:22:18, endln:22:19 - |vpiActual: - \_typespec_member: (strb), line:8:35, endln:8:39 |vpiLhs: - \_indexed_part_select: , line:23:11, endln:23:30 + \_indexed_part_select: kmac_mask_o (work@top.kmac_mask_o), line:23:11, endln:23:30 |vpiParent: - \_ref_obj: kmac_mask_o (work@top.kmac_mask_o) - |vpiParent: - \_assignment: , line:23:11, endln:23:59 - |vpiName:kmac_mask_o - |vpiFullName:work@top.kmac_mask_o - |vpiDefName:kmac_mask_o - |vpiActual: - \_logic_net: (work@top.kmac_mask_o), line:17:30, endln:17:41 + \_assignment: , line:23:11, endln:23:59 + |vpiName:kmac_mask_o + |vpiFullName:work@top.kmac_mask_o + |vpiDefName:kmac_mask_o + |vpiActual: + \_logic_net: (work@top.kmac_mask_o), line:17:30, endln:17:41 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:23:23, endln:23:26 |vpiParent: - \_indexed_part_select: , line:23:11, endln:23:30 + \_indexed_part_select: kmac_mask_o (work@top.kmac_mask_o), line:23:11, endln:23:30 |vpiOpType:25 |vpiOperand: \_constant: , line:23:23, endln:23:24 diff --git a/tests/BlackBePipeInt/BlackBePipeInt.log b/tests/BlackBePipeInt/BlackBePipeInt.log index cf3ba4f144..a08199030e 100644 --- a/tests/BlackBePipeInt/BlackBePipeInt.log +++ b/tests/BlackBePipeInt/BlackBePipeInt.log @@ -57,7 +57,7 @@ param_assign 2180 parameter 3053 port 12 range 602 -ref_obj 57046 +ref_obj 56875 string_typespec 55611 struct_net 1 struct_typespec 1389 @@ -98,7 +98,7 @@ param_assign 2180 parameter 3053 port 18 range 602 -ref_obj 57168 +ref_obj 56989 string_typespec 55611 struct_net 1 struct_typespec 1389 diff --git a/tests/BlackBox/BlackBox.log b/tests/BlackBox/BlackBox.log index d219d5c36a..b2619110f0 100644 --- a/tests/BlackBox/BlackBox.log +++ b/tests/BlackBox/BlackBox.log @@ -176,7 +176,7 @@ module_inst 8 operation 2 parameter 1 ref_module 2 -ref_obj 5 +ref_obj 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -197,7 +197,7 @@ module_inst 9 operation 2 parameter 1 ref_module 2 -ref_obj 10 +ref_obj 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/BlackBox/slpp_all/surelog.uhdm ... @@ -256,14 +256,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:nyuzi |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiDecompile:0 @@ -276,10 +273,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 |vpiParent: @@ -376,16 +374,13 @@ design: (work@top) |vpiActual: \_module_inst: work@nyuzi (work@top.nyuzi), file:${SURELOG_DIR}/tests/BlackBox/dut.sv, line:29:1, endln:29:16 |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] - |vpiActual: - \_gen_scope: (work@top.nyuzi.core_gen[0]) + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] + |vpiActual: + \_gen_scope: (work@top.nyuzi.core_gen[0]) |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiActual: @@ -396,10 +391,11 @@ design: (work@top) |vpiActual: \_module_inst: work@core (work@top.nyuzi.core_gen[0].core), file:${SURELOG_DIR}/tests/BlackBox/dut.sv, line:18:13, endln:18:26 |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiActual: \_int_var: (work@top.nyuzi.core_gen[0].core.wb_writeback_en), line:7:5, endln:7:20 |vpiLhs: diff --git a/tests/BlackBox/BlackBoxInst.log b/tests/BlackBox/BlackBoxInst.log index 93623fcdd0..33a6607304 100644 --- a/tests/BlackBox/BlackBoxInst.log +++ b/tests/BlackBox/BlackBoxInst.log @@ -175,7 +175,7 @@ logic_net 2 module_inst 7 operation 2 ref_module 1 -ref_obj 5 +ref_obj 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -193,7 +193,7 @@ logic_net 2 module_inst 7 operation 2 ref_module 1 -ref_obj 10 +ref_obj 8 === UHDM Object Stats End === [ERR:UH0725] ${SURELOG_DIR}/tests/BlackBox/dut.sv:31:16: Unresolved hierarchical reference "nyuzi.core_gen[0].core.wb_writeback_en". @@ -254,14 +254,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:nyuzi |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiDecompile:0 @@ -274,10 +271,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 |vpiParent: @@ -343,16 +341,13 @@ design: (work@top) |vpiActual: \_module_inst: work@nyuzi (work@top.nyuzi), file:${SURELOG_DIR}/tests/BlackBox/dut.sv, line:29:1, endln:29:16 |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] - |vpiActual: - \_gen_scope: (work@top.nyuzi.core_gen[0]) + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] + |vpiActual: + \_gen_scope: (work@top.nyuzi.core_gen[0]) |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiActual: @@ -361,10 +356,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 |vpiParent: diff --git a/tests/BlackBox/BlackBoxSubMod.log b/tests/BlackBox/BlackBoxSubMod.log index f4eb6ba1b8..ba307eb9ec 100644 --- a/tests/BlackBox/BlackBoxSubMod.log +++ b/tests/BlackBox/BlackBoxSubMod.log @@ -168,7 +168,7 @@ hier_path 1 logic_net 2 module_inst 6 ref_module 1 -ref_obj 5 +ref_obj 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -181,7 +181,7 @@ hier_path 2 logic_net 2 module_inst 6 ref_module 1 -ref_obj 10 +ref_obj 8 === UHDM Object Stats End === [ERR:UH0725] ${SURELOG_DIR}/tests/BlackBox/dut.sv:31:16: Unresolved hierarchical reference "nyuzi.core_gen[0].core.wb_writeback_en". @@ -236,14 +236,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:nyuzi |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiDecompile:0 @@ -256,10 +253,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 |vpiParent: @@ -314,14 +312,11 @@ design: (work@top) |vpiActual: \_module_inst: work@nyuzi (work@top.nyuzi), file:${SURELOG_DIR}/tests/BlackBox/dut.sv, line:29:1, endln:29:16 |vpiActual: - \_bit_select: (core_gen), line:31:22, endln:31:30 + \_bit_select: (nyuzi.core_gen[0]), line:31:22, endln:31:30 |vpiParent: - \_ref_obj: (work@top.core_gen[0]) - |vpiParent: - \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 - |vpiName:core_gen[0] - |vpiFullName:work@top.core_gen[0] + \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core_gen + |vpiFullName:nyuzi.core_gen[0] |vpiIndex: \_constant: , line:31:31, endln:31:32 |vpiActual: @@ -330,10 +325,11 @@ design: (work@top) \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:core |vpiActual: - \_ref_obj: (wb_writeback_en), line:31:39, endln:31:54 + \_ref_obj: (work@top.wb_writeback_en), line:31:39, endln:31:54 |vpiParent: \_hier_path: (nyuzi.core_gen[0].core.wb_writeback_en), line:31:16, endln:31:54 |vpiName:wb_writeback_en + |vpiFullName:work@top.wb_writeback_en |vpiLhs: \_ref_obj: (work@top.o), line:31:12, endln:31:13 |vpiParent: diff --git a/tests/BlackConst/BlackConst.log b/tests/BlackConst/BlackConst.log index 045414d1aa..08b41696d5 100644 --- a/tests/BlackConst/BlackConst.log +++ b/tests/BlackConst/BlackConst.log @@ -1413,7 +1413,7 @@ param_assign 16 parameter 16 range 36 ref_module 2 -ref_obj 34 +ref_obj 30 struct_typespec 7 sys_func_call 8 typespec_member 25 @@ -1442,7 +1442,7 @@ param_assign 16 parameter 16 range 36 ref_module 2 -ref_obj 38 +ref_obj 32 struct_typespec 7 sys_func_call 9 typespec_member 25 @@ -1712,7 +1712,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (dword_width_gp), line:13:41, endln:13:55 |vpiParent: - \_operation: , line:13:5, endln:13:72 + \_operation: , line:13:41, endln:13:65 |vpiName:dword_width_gp |vpiOperand: \_constant: , line:13:56, endln:13:65 @@ -1772,17 +1772,17 @@ design: (work@top) |vpiOperand: \_operation: , line:76:14, endln:76:50 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:76:12, endln:76:53 |vpiOpType:32 |vpiOperand: \_operation: , line:76:15, endln:76:26 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:76:14, endln:76:50 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.sets_p), line:76:16, endln:76:22 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:76:15, endln:76:26 |vpiName:sets_p |vpiFullName:work@top.bp_icache_data_mem_pkt_s.sets_p |vpiActual: @@ -1858,17 +1858,17 @@ design: (work@top) |vpiOperand: \_operation: , line:77:14, endln:77:52 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:77:12, endln:77:55 |vpiOpType:32 |vpiOperand: \_operation: , line:77:15, endln:77:27 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:77:14, endln:77:52 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.assoc_p), line:77:16, endln:77:23 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:77:15, endln:77:27 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_data_mem_pkt_s.assoc_p |vpiActual: @@ -1944,7 +1944,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.fill_width_p), line:78:12, endln:78:24 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:78:12, endln:78:26 |vpiName:fill_width_p |vpiFullName:work@top.bp_icache_data_mem_pkt_s.fill_width_p |vpiActual: @@ -1991,12 +1991,12 @@ design: (work@top) |vpiOperand: \_operation: , line:79:13, endln:79:39 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:79:12, endln:79:42 |vpiOpType:12 |vpiOperand: \_ref_obj: (work@top.bp_icache_data_mem_pkt_s.block_width_p), line:79:13, endln:79:26 |vpiParent: - \_struct_typespec: (bp_icache_data_mem_pkt_s), line:74:11, endln:74:17 + \_operation: , line:79:13, endln:79:39 |vpiName:block_width_p |vpiFullName:work@top.bp_icache_data_mem_pkt_s.block_width_p |vpiActual: @@ -2114,17 +2114,17 @@ design: (work@top) |vpiOperand: \_operation: , line:35:14, endln:35:52 |vpiParent: - \_struct_typespec: (bp_icache_req_metadata_s), line:33:11, endln:33:17 + \_operation: , line:35:12, endln:35:55 |vpiOpType:32 |vpiOperand: \_operation: , line:35:15, endln:35:27 |vpiParent: - \_struct_typespec: (bp_icache_req_metadata_s), line:33:11, endln:33:17 + \_operation: , line:35:14, endln:35:52 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_req_metadata_s.assoc_p), line:35:16, endln:35:23 |vpiParent: - \_struct_typespec: (bp_icache_req_metadata_s), line:33:11, endln:33:17 + \_operation: , line:35:15, endln:35:27 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_req_metadata_s.assoc_p |vpiActual: @@ -2236,7 +2236,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_req_s.dword_width_gp), line:22:12, endln:22:26 |vpiParent: - \_struct_typespec: (bp_icache_req_s), line:19:11, endln:19:17 + \_operation: , line:22:12, endln:22:28 |vpiName:dword_width_gp |vpiFullName:work@top.bp_icache_req_s.dword_width_gp |vpiActual: @@ -2298,7 +2298,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_req_s.paddr_width_p), line:24:12, endln:24:25 |vpiParent: - \_struct_typespec: (bp_icache_req_s), line:19:11, endln:19:17 + \_operation: , line:24:12, endln:24:27 |vpiName:paddr_width_p |vpiFullName:work@top.bp_icache_req_s.paddr_width_p |vpiActual: @@ -2383,12 +2383,12 @@ design: (work@top) |vpiOperand: \_operation: , line:123:14, endln:123:27 |vpiParent: - \_struct_typespec: (bp_icache_stat_info_s), line:121:11, endln:121:17 + \_operation: , line:123:12, endln:123:51 |vpiOpType:20 |vpiOperand: \_ref_obj: (work@top.bp_icache_stat_info_s.assoc_p), line:123:15, endln:123:22 |vpiParent: - \_struct_typespec: (bp_icache_stat_info_s), line:121:11, endln:121:17 + \_operation: , line:123:14, endln:123:27 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_stat_info_s.assoc_p |vpiActual: @@ -2417,7 +2417,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_stat_info_s.assoc_p), line:123:38, endln:123:45 |vpiParent: - \_operation: , line:123:12, endln:123:51 + \_operation: , line:123:37, endln:123:50 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_stat_info_s.assoc_p |vpiActual: @@ -2464,7 +2464,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_stat_info_s.assoc_p), line:124:12, endln:124:19 |vpiParent: - \_struct_typespec: (bp_icache_stat_info_s), line:121:11, endln:121:17 + \_operation: , line:124:12, endln:124:21 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_stat_info_s.assoc_p |vpiActual: @@ -2519,17 +2519,17 @@ design: (work@top) |vpiOperand: \_operation: , line:112:14, endln:112:50 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:112:12, endln:112:53 |vpiOpType:32 |vpiOperand: \_operation: , line:112:15, endln:112:26 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:112:14, endln:112:50 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.sets_p), line:112:16, endln:112:22 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:112:15, endln:112:26 |vpiName:sets_p |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.sets_p |vpiActual: @@ -2605,17 +2605,17 @@ design: (work@top) |vpiOperand: \_operation: , line:113:14, endln:113:52 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:113:12, endln:113:55 |vpiOpType:32 |vpiOperand: \_operation: , line:113:15, endln:113:27 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:113:14, endln:113:52 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_stat_mem_pkt_s.assoc_p), line:113:16, endln:113:23 |vpiParent: - \_struct_typespec: (bp_icache_stat_mem_pkt_s), line:110:11, endln:110:17 + \_operation: , line:113:15, endln:113:27 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_stat_mem_pkt_s.assoc_p |vpiActual: @@ -2761,7 +2761,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_tag_info_s.ctag_width_p), line:103:12, endln:103:24 |vpiParent: - \_struct_typespec: (bp_icache_tag_info_s), line:101:11, endln:101:17 + \_operation: , line:103:12, endln:103:26 |vpiName:ctag_width_p |vpiFullName:work@top.bp_icache_tag_info_s.ctag_width_p |vpiActual: @@ -2816,17 +2816,17 @@ design: (work@top) |vpiOperand: \_operation: , line:90:14, endln:90:50 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:90:12, endln:90:53 |vpiOpType:32 |vpiOperand: \_operation: , line:90:15, endln:90:26 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:90:14, endln:90:50 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.sets_p), line:90:16, endln:90:22 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:90:15, endln:90:26 |vpiName:sets_p |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.sets_p |vpiActual: @@ -2902,17 +2902,17 @@ design: (work@top) |vpiOperand: \_operation: , line:91:13, endln:91:51 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:91:11, endln:91:54 |vpiOpType:32 |vpiOperand: \_operation: , line:91:14, endln:91:26 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:91:13, endln:91:51 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.assoc_p), line:91:15, endln:91:22 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:91:14, endln:91:26 |vpiName:assoc_p |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.assoc_p |vpiActual: @@ -3003,7 +3003,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.bp_icache_tag_mem_pkt_s.ctag_width_p), line:93:12, endln:93:24 |vpiParent: - \_struct_typespec: (bp_icache_tag_mem_pkt_s), line:88:11, endln:88:17 + \_operation: , line:93:12, endln:93:26 |vpiName:ctag_width_p |vpiFullName:work@top.bp_icache_tag_mem_pkt_s.ctag_width_p |vpiActual: @@ -3610,15 +3610,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.pc), line:10:76, endln:10:91 |vpiParent: - \_ref_obj: (work@top.pc) - |vpiParent: - \_operation: , line:10:75, endln:10:92 - |vpiName:pc - |vpiFullName:work@top.pc - |vpiActual: - \_logic_net: (work@top.pc), line:144:15, endln:144:17 + \_operation: , line:10:75, endln:10:92 |vpiName:pc |vpiFullName:work@top.pc + |vpiActual: + \_logic_net: (work@top.pc), line:144:15, endln:144:17 |vpiIndex: \_operation: , line:10:79, endln:10:90 |vpiParent: @@ -3640,19 +3636,15 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@top.pc), line:144:15, endln:144:17 |vpiOperand: - \_indexed_part_select: , line:10:98, endln:10:166 + \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166 |vpiParent: - \_ref_obj: pc (work@top.pc) - |vpiParent: - \_operation: , line:10:4, endln:10:168 - |vpiName:pc - |vpiFullName:work@top.pc - |vpiDefName:pc - |vpiActual: - \_logic_net: (work@top.pc), line:144:15, endln:144:17 + \_operation: , line:10:4, endln:10:168 + |vpiName:pc + |vpiFullName:work@top.pc + |vpiDefName:pc + |vpiActual: + \_logic_net: (work@top.pc), line:144:15, endln:144:17 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -3664,7 +3656,7 @@ design: (work@top) |vpiWidthExpr: \_operation: , line:10:102, endln:10:165 |vpiParent: - \_indexed_part_select: , line:10:98, endln:10:166 + \_indexed_part_select: pc (work@top.pc), line:10:98, endln:10:166 |vpiOpType:32 |vpiOperand: \_constant: , line:10:102, endln:10:165 diff --git a/tests/BlackParrotComplex/BlackParrotComplex.log b/tests/BlackParrotComplex/BlackParrotComplex.log index 6039f6e510..781b4062fc 100644 --- a/tests/BlackParrotComplex/BlackParrotComplex.log +++ b/tests/BlackParrotComplex/BlackParrotComplex.log @@ -3204,7 +3204,7 @@ param_assign 22 parameter 23 range 27 ref_module 3 -ref_obj 85 +ref_obj 81 sys_func_call 2 task 9 var_select 132 @@ -3238,7 +3238,7 @@ param_assign 22 parameter 23 range 27 ref_module 3 -ref_obj 86 +ref_obj 82 sys_func_call 3 task 18 var_select 132 @@ -3781,9 +3781,6 @@ design: (work@top) \_module_inst: work@bottom (work@bottom), file:${SURELOG_DIR}/tests/BlackParrotComplex/dut.sv, line:79:1, endln:88:10 |vpiRhs: \_bit_select: (A3), line:82:17, endln:82:22 - |vpiParent: - \_ref_obj: (A3) - |vpiName:A3 |vpiName:A3 |vpiIndex: \_constant: , line:82:20, endln:82:21 @@ -3903,9 +3900,6 @@ design: (work@top) \_module_inst: work@middle (work@middle), file:${SURELOG_DIR}/tests/BlackParrotComplex/dut.sv, line:67:1, endln:76:10 |vpiRhs: \_bit_select: (A3), line:70:17, endln:70:22 - |vpiParent: - \_ref_obj: (A3) - |vpiName:A3 |vpiName:A3 |vpiIndex: \_constant: , line:70:20, endln:70:21 @@ -4496,10 +4490,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:64, endln:45:65 + \_ref_obj: (routing_matrix_p.i), line:45:64, endln:45:65 |vpiParent: - \_sys_func_call: ($bits), line:45:38, endln:45:67 + \_var_select: (routing_matrix_p), line:45:44, endln:45:66 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiName:$bits |vpiOperand: \_constant: , line:45:70, endln:45:72 @@ -4533,322 +4528,322 @@ design: (work@top) |vpiOperand: \_operation: , line:45:92, endln:51:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:51:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:51:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:51:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:51:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:51:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:51:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:448 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:408 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:448 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:368 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:408 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:328 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:368 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:288 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:328 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:248 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:288 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:50:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:50:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:448 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:408 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:448 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:368 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:408 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:328 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:368 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:288 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:328 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:248 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:288 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:49:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:49:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:448 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:408 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:448 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:368 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:408 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:328 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:368 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:288 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:328 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:248 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:288 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:48:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:48:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:448 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:408 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:448 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:368 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:408 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:328 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:368 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:288 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:328 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:248 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:288 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:47:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:47:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:448 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:408 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:448 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:368 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:408 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:328 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:368 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:288 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:328 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:248 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:288 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:208 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:248 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:168 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:208 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:46:128 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:168 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:488 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:46:128 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:449 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:488 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:409 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:449 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:370 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:409 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:330 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:370 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:290 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:330 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:250 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:290 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:210 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:250 |vpiOpType:24 |vpiOperand: \_operation: , line:45:92, endln:45:170 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:210 |vpiOpType:24 |vpiOperand: \_operation: , line:45:93, endln:45:129 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:92, endln:45:170 |vpiOpType:28 |vpiOperand: \_operation: , line:45:94, endln:45:123 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_operation: , line:45:93, endln:45:129 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:95, endln:45:117 @@ -4864,10 +4859,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:115, endln:45:116 + \_ref_obj: (routing_matrix_p.i), line:45:115, endln:45:116 |vpiParent: - \_operation: , line:45:36, endln:51:249 + \_var_select: (routing_matrix_p), line:45:95, endln:45:117 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:121, endln:45:122 |vpiParent: @@ -4892,7 +4888,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:134, endln:45:163 |vpiParent: - \_operation: , line:45:92, endln:45:170 + \_operation: , line:45:133, endln:45:169 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:135, endln:45:157 @@ -4908,10 +4904,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:155, endln:45:156 + \_ref_obj: (routing_matrix_p.i), line:45:155, endln:45:156 |vpiParent: - \_operation: , line:45:92, endln:45:170 + \_var_select: (routing_matrix_p), line:45:135, endln:45:157 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:161, endln:45:162 |vpiParent: @@ -4936,7 +4933,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:174, endln:45:203 |vpiParent: - \_operation: , line:45:92, endln:45:210 + \_operation: , line:45:173, endln:45:209 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:175, endln:45:197 @@ -4952,10 +4949,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:195, endln:45:196 + \_ref_obj: (routing_matrix_p.i), line:45:195, endln:45:196 |vpiParent: - \_operation: , line:45:92, endln:45:210 + \_var_select: (routing_matrix_p), line:45:175, endln:45:197 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:201, endln:45:202 |vpiParent: @@ -4980,7 +4978,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:214, endln:45:243 |vpiParent: - \_operation: , line:45:92, endln:45:250 + \_operation: , line:45:213, endln:45:249 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:215, endln:45:237 @@ -4996,10 +4994,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:235, endln:45:236 + \_ref_obj: (routing_matrix_p.i), line:45:235, endln:45:236 |vpiParent: - \_operation: , line:45:92, endln:45:250 + \_var_select: (routing_matrix_p), line:45:215, endln:45:237 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:241, endln:45:242 |vpiParent: @@ -5024,7 +5023,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:254, endln:45:283 |vpiParent: - \_operation: , line:45:92, endln:45:290 + \_operation: , line:45:253, endln:45:289 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:255, endln:45:277 @@ -5040,10 +5039,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:275, endln:45:276 + \_ref_obj: (routing_matrix_p.i), line:45:275, endln:45:276 |vpiParent: - \_operation: , line:45:92, endln:45:290 + \_var_select: (routing_matrix_p), line:45:255, endln:45:277 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:281, endln:45:282 |vpiParent: @@ -5068,7 +5068,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:294, endln:45:323 |vpiParent: - \_operation: , line:45:92, endln:45:330 + \_operation: , line:45:293, endln:45:329 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:295, endln:45:317 @@ -5084,10 +5084,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:315, endln:45:316 + \_ref_obj: (routing_matrix_p.i), line:45:315, endln:45:316 |vpiParent: - \_operation: , line:45:92, endln:45:330 + \_var_select: (routing_matrix_p), line:45:295, endln:45:317 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:321, endln:45:322 |vpiParent: @@ -5112,7 +5113,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:334, endln:45:363 |vpiParent: - \_operation: , line:45:92, endln:45:370 + \_operation: , line:45:333, endln:45:369 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:335, endln:45:357 @@ -5128,10 +5129,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:355, endln:45:356 + \_ref_obj: (routing_matrix_p.i), line:45:355, endln:45:356 |vpiParent: - \_operation: , line:45:92, endln:45:370 + \_var_select: (routing_matrix_p), line:45:335, endln:45:357 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:361, endln:45:362 |vpiParent: @@ -5156,7 +5158,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:373, endln:45:402 |vpiParent: - \_operation: , line:45:92, endln:45:409 + \_operation: , line:45:372, endln:45:408 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:374, endln:45:396 @@ -5172,10 +5174,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:394, endln:45:395 + \_ref_obj: (routing_matrix_p.i), line:45:394, endln:45:395 |vpiParent: - \_operation: , line:45:92, endln:45:409 + \_var_select: (routing_matrix_p), line:45:374, endln:45:396 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:400, endln:45:401 |vpiParent: @@ -5200,7 +5203,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:413, endln:45:442 |vpiParent: - \_operation: , line:45:92, endln:45:449 + \_operation: , line:45:412, endln:45:448 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:414, endln:45:436 @@ -5216,10 +5219,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:434, endln:45:435 + \_ref_obj: (routing_matrix_p.i), line:45:434, endln:45:435 |vpiParent: - \_operation: , line:45:92, endln:45:449 + \_var_select: (routing_matrix_p), line:45:414, endln:45:436 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:440, endln:45:441 |vpiParent: @@ -5244,7 +5248,7 @@ design: (work@top) |vpiOperand: \_operation: , line:45:452, endln:45:481 |vpiParent: - \_operation: , line:45:92, endln:45:488 + \_operation: , line:45:451, endln:45:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:45:453, endln:45:475 @@ -5260,10 +5264,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:45:473, endln:45:474 + \_ref_obj: (routing_matrix_p.i), line:45:473, endln:45:474 |vpiParent: - \_operation: , line:45:92, endln:45:488 + \_var_select: (routing_matrix_p), line:45:453, endln:45:475 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:45:479, endln:45:480 |vpiParent: @@ -5288,7 +5293,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:91, endln:46:121 |vpiParent: - \_operation: , line:45:92, endln:46:128 + \_operation: , line:46:90, endln:46:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:92, endln:46:114 @@ -5304,10 +5309,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:112, endln:46:113 + \_ref_obj: (routing_matrix_p.i), line:46:112, endln:46:113 |vpiParent: - \_operation: , line:45:92, endln:46:128 + \_var_select: (routing_matrix_p), line:46:92, endln:46:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:118, endln:46:120 |vpiParent: @@ -5332,7 +5338,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:131, endln:46:161 |vpiParent: - \_operation: , line:45:92, endln:46:168 + \_operation: , line:46:130, endln:46:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:132, endln:46:154 @@ -5348,10 +5354,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:152, endln:46:153 + \_ref_obj: (routing_matrix_p.i), line:46:152, endln:46:153 |vpiParent: - \_operation: , line:45:92, endln:46:168 + \_var_select: (routing_matrix_p), line:46:132, endln:46:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:158, endln:46:160 |vpiParent: @@ -5376,7 +5383,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:171, endln:46:201 |vpiParent: - \_operation: , line:45:92, endln:46:208 + \_operation: , line:46:170, endln:46:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:172, endln:46:194 @@ -5392,10 +5399,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:192, endln:46:193 + \_ref_obj: (routing_matrix_p.i), line:46:192, endln:46:193 |vpiParent: - \_operation: , line:45:92, endln:46:208 + \_var_select: (routing_matrix_p), line:46:172, endln:46:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:198, endln:46:200 |vpiParent: @@ -5420,7 +5428,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:211, endln:46:241 |vpiParent: - \_operation: , line:45:92, endln:46:248 + \_operation: , line:46:210, endln:46:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:212, endln:46:234 @@ -5436,10 +5444,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:232, endln:46:233 + \_ref_obj: (routing_matrix_p.i), line:46:232, endln:46:233 |vpiParent: - \_operation: , line:45:92, endln:46:248 + \_var_select: (routing_matrix_p), line:46:212, endln:46:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:238, endln:46:240 |vpiParent: @@ -5464,7 +5473,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:251, endln:46:281 |vpiParent: - \_operation: , line:45:92, endln:46:288 + \_operation: , line:46:250, endln:46:287 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:252, endln:46:274 @@ -5480,10 +5489,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:272, endln:46:273 + \_ref_obj: (routing_matrix_p.i), line:46:272, endln:46:273 |vpiParent: - \_operation: , line:45:92, endln:46:288 + \_var_select: (routing_matrix_p), line:46:252, endln:46:274 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:278, endln:46:280 |vpiParent: @@ -5508,7 +5518,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:291, endln:46:321 |vpiParent: - \_operation: , line:45:92, endln:46:328 + \_operation: , line:46:290, endln:46:327 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:292, endln:46:314 @@ -5524,10 +5534,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:312, endln:46:313 + \_ref_obj: (routing_matrix_p.i), line:46:312, endln:46:313 |vpiParent: - \_operation: , line:45:92, endln:46:328 + \_var_select: (routing_matrix_p), line:46:292, endln:46:314 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:318, endln:46:320 |vpiParent: @@ -5552,7 +5563,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:331, endln:46:361 |vpiParent: - \_operation: , line:45:92, endln:46:368 + \_operation: , line:46:330, endln:46:367 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:332, endln:46:354 @@ -5568,10 +5579,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:352, endln:46:353 + \_ref_obj: (routing_matrix_p.i), line:46:352, endln:46:353 |vpiParent: - \_operation: , line:45:92, endln:46:368 + \_var_select: (routing_matrix_p), line:46:332, endln:46:354 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:358, endln:46:360 |vpiParent: @@ -5596,7 +5608,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:371, endln:46:401 |vpiParent: - \_operation: , line:45:92, endln:46:408 + \_operation: , line:46:370, endln:46:407 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:372, endln:46:394 @@ -5612,10 +5624,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:392, endln:46:393 + \_ref_obj: (routing_matrix_p.i), line:46:392, endln:46:393 |vpiParent: - \_operation: , line:45:92, endln:46:408 + \_var_select: (routing_matrix_p), line:46:372, endln:46:394 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:398, endln:46:400 |vpiParent: @@ -5640,7 +5653,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:411, endln:46:441 |vpiParent: - \_operation: , line:45:92, endln:46:448 + \_operation: , line:46:410, endln:46:447 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:412, endln:46:434 @@ -5656,10 +5669,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:432, endln:46:433 + \_ref_obj: (routing_matrix_p.i), line:46:432, endln:46:433 |vpiParent: - \_operation: , line:45:92, endln:46:448 + \_var_select: (routing_matrix_p), line:46:412, endln:46:434 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:438, endln:46:440 |vpiParent: @@ -5684,7 +5698,7 @@ design: (work@top) |vpiOperand: \_operation: , line:46:451, endln:46:481 |vpiParent: - \_operation: , line:45:92, endln:46:488 + \_operation: , line:46:450, endln:46:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:46:452, endln:46:474 @@ -5700,10 +5714,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:46:472, endln:46:473 + \_ref_obj: (routing_matrix_p.i), line:46:472, endln:46:473 |vpiParent: - \_operation: , line:45:92, endln:46:488 + \_var_select: (routing_matrix_p), line:46:452, endln:46:474 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:46:478, endln:46:480 |vpiParent: @@ -5728,7 +5743,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:91, endln:47:121 |vpiParent: - \_operation: , line:45:92, endln:47:128 + \_operation: , line:47:90, endln:47:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:92, endln:47:114 @@ -5744,10 +5759,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:112, endln:47:113 + \_ref_obj: (routing_matrix_p.i), line:47:112, endln:47:113 |vpiParent: - \_operation: , line:45:92, endln:47:128 + \_var_select: (routing_matrix_p), line:47:92, endln:47:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:118, endln:47:120 |vpiParent: @@ -5772,7 +5788,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:131, endln:47:161 |vpiParent: - \_operation: , line:45:92, endln:47:168 + \_operation: , line:47:130, endln:47:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:132, endln:47:154 @@ -5788,10 +5804,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:152, endln:47:153 + \_ref_obj: (routing_matrix_p.i), line:47:152, endln:47:153 |vpiParent: - \_operation: , line:45:92, endln:47:168 + \_var_select: (routing_matrix_p), line:47:132, endln:47:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:158, endln:47:160 |vpiParent: @@ -5816,7 +5833,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:171, endln:47:201 |vpiParent: - \_operation: , line:45:92, endln:47:208 + \_operation: , line:47:170, endln:47:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:172, endln:47:194 @@ -5832,10 +5849,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:192, endln:47:193 + \_ref_obj: (routing_matrix_p.i), line:47:192, endln:47:193 |vpiParent: - \_operation: , line:45:92, endln:47:208 + \_var_select: (routing_matrix_p), line:47:172, endln:47:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:198, endln:47:200 |vpiParent: @@ -5860,7 +5878,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:211, endln:47:241 |vpiParent: - \_operation: , line:45:92, endln:47:248 + \_operation: , line:47:210, endln:47:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:212, endln:47:234 @@ -5876,10 +5894,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:232, endln:47:233 + \_ref_obj: (routing_matrix_p.i), line:47:232, endln:47:233 |vpiParent: - \_operation: , line:45:92, endln:47:248 + \_var_select: (routing_matrix_p), line:47:212, endln:47:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:238, endln:47:240 |vpiParent: @@ -5904,7 +5923,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:251, endln:47:281 |vpiParent: - \_operation: , line:45:92, endln:47:288 + \_operation: , line:47:250, endln:47:287 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:252, endln:47:274 @@ -5920,10 +5939,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:272, endln:47:273 + \_ref_obj: (routing_matrix_p.i), line:47:272, endln:47:273 |vpiParent: - \_operation: , line:45:92, endln:47:288 + \_var_select: (routing_matrix_p), line:47:252, endln:47:274 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:278, endln:47:280 |vpiParent: @@ -5948,7 +5968,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:291, endln:47:321 |vpiParent: - \_operation: , line:45:92, endln:47:328 + \_operation: , line:47:290, endln:47:327 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:292, endln:47:314 @@ -5964,10 +5984,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:312, endln:47:313 + \_ref_obj: (routing_matrix_p.i), line:47:312, endln:47:313 |vpiParent: - \_operation: , line:45:92, endln:47:328 + \_var_select: (routing_matrix_p), line:47:292, endln:47:314 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:318, endln:47:320 |vpiParent: @@ -5992,7 +6013,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:331, endln:47:361 |vpiParent: - \_operation: , line:45:92, endln:47:368 + \_operation: , line:47:330, endln:47:367 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:332, endln:47:354 @@ -6008,10 +6029,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:352, endln:47:353 + \_ref_obj: (routing_matrix_p.i), line:47:352, endln:47:353 |vpiParent: - \_operation: , line:45:92, endln:47:368 + \_var_select: (routing_matrix_p), line:47:332, endln:47:354 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:358, endln:47:360 |vpiParent: @@ -6036,7 +6058,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:371, endln:47:401 |vpiParent: - \_operation: , line:45:92, endln:47:408 + \_operation: , line:47:370, endln:47:407 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:372, endln:47:394 @@ -6052,10 +6074,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:392, endln:47:393 + \_ref_obj: (routing_matrix_p.i), line:47:392, endln:47:393 |vpiParent: - \_operation: , line:45:92, endln:47:408 + \_var_select: (routing_matrix_p), line:47:372, endln:47:394 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:398, endln:47:400 |vpiParent: @@ -6080,7 +6103,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:411, endln:47:441 |vpiParent: - \_operation: , line:45:92, endln:47:448 + \_operation: , line:47:410, endln:47:447 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:412, endln:47:434 @@ -6096,10 +6119,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:432, endln:47:433 + \_ref_obj: (routing_matrix_p.i), line:47:432, endln:47:433 |vpiParent: - \_operation: , line:45:92, endln:47:448 + \_var_select: (routing_matrix_p), line:47:412, endln:47:434 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:438, endln:47:440 |vpiParent: @@ -6124,7 +6148,7 @@ design: (work@top) |vpiOperand: \_operation: , line:47:451, endln:47:481 |vpiParent: - \_operation: , line:45:92, endln:47:488 + \_operation: , line:47:450, endln:47:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:47:452, endln:47:474 @@ -6140,10 +6164,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:47:472, endln:47:473 + \_ref_obj: (routing_matrix_p.i), line:47:472, endln:47:473 |vpiParent: - \_operation: , line:45:92, endln:47:488 + \_var_select: (routing_matrix_p), line:47:452, endln:47:474 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:47:478, endln:47:480 |vpiParent: @@ -6168,7 +6193,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:91, endln:48:121 |vpiParent: - \_operation: , line:45:92, endln:48:128 + \_operation: , line:48:90, endln:48:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:92, endln:48:114 @@ -6184,10 +6209,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:112, endln:48:113 + \_ref_obj: (routing_matrix_p.i), line:48:112, endln:48:113 |vpiParent: - \_operation: , line:45:92, endln:48:128 + \_var_select: (routing_matrix_p), line:48:92, endln:48:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:118, endln:48:120 |vpiParent: @@ -6212,7 +6238,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:131, endln:48:161 |vpiParent: - \_operation: , line:45:92, endln:48:168 + \_operation: , line:48:130, endln:48:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:132, endln:48:154 @@ -6228,10 +6254,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:152, endln:48:153 + \_ref_obj: (routing_matrix_p.i), line:48:152, endln:48:153 |vpiParent: - \_operation: , line:45:92, endln:48:168 + \_var_select: (routing_matrix_p), line:48:132, endln:48:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:158, endln:48:160 |vpiParent: @@ -6256,7 +6283,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:171, endln:48:201 |vpiParent: - \_operation: , line:45:92, endln:48:208 + \_operation: , line:48:170, endln:48:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:172, endln:48:194 @@ -6272,10 +6299,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:192, endln:48:193 + \_ref_obj: (routing_matrix_p.i), line:48:192, endln:48:193 |vpiParent: - \_operation: , line:45:92, endln:48:208 + \_var_select: (routing_matrix_p), line:48:172, endln:48:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:198, endln:48:200 |vpiParent: @@ -6300,7 +6328,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:211, endln:48:241 |vpiParent: - \_operation: , line:45:92, endln:48:248 + \_operation: , line:48:210, endln:48:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:212, endln:48:234 @@ -6316,10 +6344,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:232, endln:48:233 + \_ref_obj: (routing_matrix_p.i), line:48:232, endln:48:233 |vpiParent: - \_operation: , line:45:92, endln:48:248 + \_var_select: (routing_matrix_p), line:48:212, endln:48:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:238, endln:48:240 |vpiParent: @@ -6344,7 +6373,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:251, endln:48:281 |vpiParent: - \_operation: , line:45:92, endln:48:288 + \_operation: , line:48:250, endln:48:287 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:252, endln:48:274 @@ -6360,10 +6389,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:272, endln:48:273 + \_ref_obj: (routing_matrix_p.i), line:48:272, endln:48:273 |vpiParent: - \_operation: , line:45:92, endln:48:288 + \_var_select: (routing_matrix_p), line:48:252, endln:48:274 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:278, endln:48:280 |vpiParent: @@ -6388,7 +6418,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:291, endln:48:321 |vpiParent: - \_operation: , line:45:92, endln:48:328 + \_operation: , line:48:290, endln:48:327 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:292, endln:48:314 @@ -6404,10 +6434,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:312, endln:48:313 + \_ref_obj: (routing_matrix_p.i), line:48:312, endln:48:313 |vpiParent: - \_operation: , line:45:92, endln:48:328 + \_var_select: (routing_matrix_p), line:48:292, endln:48:314 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:318, endln:48:320 |vpiParent: @@ -6432,7 +6463,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:331, endln:48:361 |vpiParent: - \_operation: , line:45:92, endln:48:368 + \_operation: , line:48:330, endln:48:367 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:332, endln:48:354 @@ -6448,10 +6479,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:352, endln:48:353 + \_ref_obj: (routing_matrix_p.i), line:48:352, endln:48:353 |vpiParent: - \_operation: , line:45:92, endln:48:368 + \_var_select: (routing_matrix_p), line:48:332, endln:48:354 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:358, endln:48:360 |vpiParent: @@ -6476,7 +6508,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:371, endln:48:401 |vpiParent: - \_operation: , line:45:92, endln:48:408 + \_operation: , line:48:370, endln:48:407 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:372, endln:48:394 @@ -6492,10 +6524,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:392, endln:48:393 + \_ref_obj: (routing_matrix_p.i), line:48:392, endln:48:393 |vpiParent: - \_operation: , line:45:92, endln:48:408 + \_var_select: (routing_matrix_p), line:48:372, endln:48:394 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:398, endln:48:400 |vpiParent: @@ -6520,7 +6553,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:411, endln:48:441 |vpiParent: - \_operation: , line:45:92, endln:48:448 + \_operation: , line:48:410, endln:48:447 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:412, endln:48:434 @@ -6536,10 +6569,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:432, endln:48:433 + \_ref_obj: (routing_matrix_p.i), line:48:432, endln:48:433 |vpiParent: - \_operation: , line:45:92, endln:48:448 + \_var_select: (routing_matrix_p), line:48:412, endln:48:434 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:438, endln:48:440 |vpiParent: @@ -6564,7 +6598,7 @@ design: (work@top) |vpiOperand: \_operation: , line:48:451, endln:48:481 |vpiParent: - \_operation: , line:45:92, endln:48:488 + \_operation: , line:48:450, endln:48:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:48:452, endln:48:474 @@ -6580,10 +6614,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:48:472, endln:48:473 + \_ref_obj: (routing_matrix_p.i), line:48:472, endln:48:473 |vpiParent: - \_operation: , line:45:92, endln:48:488 + \_var_select: (routing_matrix_p), line:48:452, endln:48:474 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:48:478, endln:48:480 |vpiParent: @@ -6608,7 +6643,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:91, endln:49:121 |vpiParent: - \_operation: , line:45:92, endln:49:128 + \_operation: , line:49:90, endln:49:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:92, endln:49:114 @@ -6624,10 +6659,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:112, endln:49:113 + \_ref_obj: (routing_matrix_p.i), line:49:112, endln:49:113 |vpiParent: - \_operation: , line:45:92, endln:49:128 + \_var_select: (routing_matrix_p), line:49:92, endln:49:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:118, endln:49:120 |vpiParent: @@ -6652,7 +6688,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:131, endln:49:161 |vpiParent: - \_operation: , line:45:92, endln:49:168 + \_operation: , line:49:130, endln:49:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:132, endln:49:154 @@ -6668,10 +6704,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:152, endln:49:153 + \_ref_obj: (routing_matrix_p.i), line:49:152, endln:49:153 |vpiParent: - \_operation: , line:45:92, endln:49:168 + \_var_select: (routing_matrix_p), line:49:132, endln:49:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:158, endln:49:160 |vpiParent: @@ -6696,7 +6733,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:171, endln:49:201 |vpiParent: - \_operation: , line:45:92, endln:49:208 + \_operation: , line:49:170, endln:49:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:172, endln:49:194 @@ -6712,10 +6749,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:192, endln:49:193 + \_ref_obj: (routing_matrix_p.i), line:49:192, endln:49:193 |vpiParent: - \_operation: , line:45:92, endln:49:208 + \_var_select: (routing_matrix_p), line:49:172, endln:49:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:198, endln:49:200 |vpiParent: @@ -6740,7 +6778,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:211, endln:49:241 |vpiParent: - \_operation: , line:45:92, endln:49:248 + \_operation: , line:49:210, endln:49:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:212, endln:49:234 @@ -6756,10 +6794,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:232, endln:49:233 + \_ref_obj: (routing_matrix_p.i), line:49:232, endln:49:233 |vpiParent: - \_operation: , line:45:92, endln:49:248 + \_var_select: (routing_matrix_p), line:49:212, endln:49:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:238, endln:49:240 |vpiParent: @@ -6784,7 +6823,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:251, endln:49:281 |vpiParent: - \_operation: , line:45:92, endln:49:288 + \_operation: , line:49:250, endln:49:287 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:252, endln:49:274 @@ -6800,10 +6839,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:272, endln:49:273 + \_ref_obj: (routing_matrix_p.i), line:49:272, endln:49:273 |vpiParent: - \_operation: , line:45:92, endln:49:288 + \_var_select: (routing_matrix_p), line:49:252, endln:49:274 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:278, endln:49:280 |vpiParent: @@ -6828,7 +6868,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:291, endln:49:321 |vpiParent: - \_operation: , line:45:92, endln:49:328 + \_operation: , line:49:290, endln:49:327 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:292, endln:49:314 @@ -6844,10 +6884,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:312, endln:49:313 + \_ref_obj: (routing_matrix_p.i), line:49:312, endln:49:313 |vpiParent: - \_operation: , line:45:92, endln:49:328 + \_var_select: (routing_matrix_p), line:49:292, endln:49:314 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:318, endln:49:320 |vpiParent: @@ -6872,7 +6913,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:331, endln:49:361 |vpiParent: - \_operation: , line:45:92, endln:49:368 + \_operation: , line:49:330, endln:49:367 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:332, endln:49:354 @@ -6888,10 +6929,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:352, endln:49:353 + \_ref_obj: (routing_matrix_p.i), line:49:352, endln:49:353 |vpiParent: - \_operation: , line:45:92, endln:49:368 + \_var_select: (routing_matrix_p), line:49:332, endln:49:354 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:358, endln:49:360 |vpiParent: @@ -6916,7 +6958,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:371, endln:49:401 |vpiParent: - \_operation: , line:45:92, endln:49:408 + \_operation: , line:49:370, endln:49:407 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:372, endln:49:394 @@ -6932,10 +6974,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:392, endln:49:393 + \_ref_obj: (routing_matrix_p.i), line:49:392, endln:49:393 |vpiParent: - \_operation: , line:45:92, endln:49:408 + \_var_select: (routing_matrix_p), line:49:372, endln:49:394 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:398, endln:49:400 |vpiParent: @@ -6960,7 +7003,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:411, endln:49:441 |vpiParent: - \_operation: , line:45:92, endln:49:448 + \_operation: , line:49:410, endln:49:447 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:412, endln:49:434 @@ -6976,10 +7019,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:432, endln:49:433 + \_ref_obj: (routing_matrix_p.i), line:49:432, endln:49:433 |vpiParent: - \_operation: , line:45:92, endln:49:448 + \_var_select: (routing_matrix_p), line:49:412, endln:49:434 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:438, endln:49:440 |vpiParent: @@ -7004,7 +7048,7 @@ design: (work@top) |vpiOperand: \_operation: , line:49:451, endln:49:481 |vpiParent: - \_operation: , line:45:92, endln:49:488 + \_operation: , line:49:450, endln:49:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:49:452, endln:49:474 @@ -7020,10 +7064,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:49:472, endln:49:473 + \_ref_obj: (routing_matrix_p.i), line:49:472, endln:49:473 |vpiParent: - \_operation: , line:45:92, endln:49:488 + \_var_select: (routing_matrix_p), line:49:452, endln:49:474 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:49:478, endln:49:480 |vpiParent: @@ -7048,7 +7093,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:91, endln:50:121 |vpiParent: - \_operation: , line:45:92, endln:50:128 + \_operation: , line:50:90, endln:50:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:92, endln:50:114 @@ -7064,10 +7109,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:112, endln:50:113 + \_ref_obj: (routing_matrix_p.i), line:50:112, endln:50:113 |vpiParent: - \_operation: , line:45:92, endln:50:128 + \_var_select: (routing_matrix_p), line:50:92, endln:50:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:118, endln:50:120 |vpiParent: @@ -7092,7 +7138,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:131, endln:50:161 |vpiParent: - \_operation: , line:45:92, endln:50:168 + \_operation: , line:50:130, endln:50:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:132, endln:50:154 @@ -7108,10 +7154,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:152, endln:50:153 + \_ref_obj: (routing_matrix_p.i), line:50:152, endln:50:153 |vpiParent: - \_operation: , line:45:92, endln:50:168 + \_var_select: (routing_matrix_p), line:50:132, endln:50:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:158, endln:50:160 |vpiParent: @@ -7136,7 +7183,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:171, endln:50:201 |vpiParent: - \_operation: , line:45:92, endln:50:208 + \_operation: , line:50:170, endln:50:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:172, endln:50:194 @@ -7152,10 +7199,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:192, endln:50:193 + \_ref_obj: (routing_matrix_p.i), line:50:192, endln:50:193 |vpiParent: - \_operation: , line:45:92, endln:50:208 + \_var_select: (routing_matrix_p), line:50:172, endln:50:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:198, endln:50:200 |vpiParent: @@ -7180,7 +7228,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:211, endln:50:241 |vpiParent: - \_operation: , line:45:92, endln:50:248 + \_operation: , line:50:210, endln:50:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:212, endln:50:234 @@ -7196,10 +7244,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:232, endln:50:233 + \_ref_obj: (routing_matrix_p.i), line:50:232, endln:50:233 |vpiParent: - \_operation: , line:45:92, endln:50:248 + \_var_select: (routing_matrix_p), line:50:212, endln:50:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:238, endln:50:240 |vpiParent: @@ -7224,7 +7273,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:251, endln:50:281 |vpiParent: - \_operation: , line:45:92, endln:50:288 + \_operation: , line:50:250, endln:50:287 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:252, endln:50:274 @@ -7240,10 +7289,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:272, endln:50:273 + \_ref_obj: (routing_matrix_p.i), line:50:272, endln:50:273 |vpiParent: - \_operation: , line:45:92, endln:50:288 + \_var_select: (routing_matrix_p), line:50:252, endln:50:274 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:278, endln:50:280 |vpiParent: @@ -7268,7 +7318,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:291, endln:50:321 |vpiParent: - \_operation: , line:45:92, endln:50:328 + \_operation: , line:50:290, endln:50:327 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:292, endln:50:314 @@ -7284,10 +7334,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:312, endln:50:313 + \_ref_obj: (routing_matrix_p.i), line:50:312, endln:50:313 |vpiParent: - \_operation: , line:45:92, endln:50:328 + \_var_select: (routing_matrix_p), line:50:292, endln:50:314 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:318, endln:50:320 |vpiParent: @@ -7312,7 +7363,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:331, endln:50:361 |vpiParent: - \_operation: , line:45:92, endln:50:368 + \_operation: , line:50:330, endln:50:367 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:332, endln:50:354 @@ -7328,10 +7379,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:352, endln:50:353 + \_ref_obj: (routing_matrix_p.i), line:50:352, endln:50:353 |vpiParent: - \_operation: , line:45:92, endln:50:368 + \_var_select: (routing_matrix_p), line:50:332, endln:50:354 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:358, endln:50:360 |vpiParent: @@ -7356,7 +7408,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:371, endln:50:401 |vpiParent: - \_operation: , line:45:92, endln:50:408 + \_operation: , line:50:370, endln:50:407 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:372, endln:50:394 @@ -7372,10 +7424,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:392, endln:50:393 + \_ref_obj: (routing_matrix_p.i), line:50:392, endln:50:393 |vpiParent: - \_operation: , line:45:92, endln:50:408 + \_var_select: (routing_matrix_p), line:50:372, endln:50:394 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:398, endln:50:400 |vpiParent: @@ -7400,7 +7453,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:411, endln:50:441 |vpiParent: - \_operation: , line:45:92, endln:50:448 + \_operation: , line:50:410, endln:50:447 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:412, endln:50:434 @@ -7416,10 +7469,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:432, endln:50:433 + \_ref_obj: (routing_matrix_p.i), line:50:432, endln:50:433 |vpiParent: - \_operation: , line:45:92, endln:50:448 + \_var_select: (routing_matrix_p), line:50:412, endln:50:434 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:438, endln:50:440 |vpiParent: @@ -7444,7 +7498,7 @@ design: (work@top) |vpiOperand: \_operation: , line:50:451, endln:50:481 |vpiParent: - \_operation: , line:45:92, endln:50:488 + \_operation: , line:50:450, endln:50:487 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:50:452, endln:50:474 @@ -7460,10 +7514,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:50:472, endln:50:473 + \_ref_obj: (routing_matrix_p.i), line:50:472, endln:50:473 |vpiParent: - \_operation: , line:45:92, endln:50:488 + \_var_select: (routing_matrix_p), line:50:452, endln:50:474 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:50:478, endln:50:480 |vpiParent: @@ -7488,7 +7543,7 @@ design: (work@top) |vpiOperand: \_operation: , line:51:91, endln:51:121 |vpiParent: - \_operation: , line:45:92, endln:51:128 + \_operation: , line:51:90, endln:51:127 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:51:92, endln:51:114 @@ -7504,10 +7559,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:51:112, endln:51:113 + \_ref_obj: (routing_matrix_p.i), line:51:112, endln:51:113 |vpiParent: - \_operation: , line:45:92, endln:51:128 + \_var_select: (routing_matrix_p), line:51:92, endln:51:114 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:51:118, endln:51:120 |vpiParent: @@ -7532,7 +7588,7 @@ design: (work@top) |vpiOperand: \_operation: , line:51:131, endln:51:161 |vpiParent: - \_operation: , line:45:92, endln:51:168 + \_operation: , line:51:130, endln:51:167 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:51:132, endln:51:154 @@ -7548,10 +7604,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:51:152, endln:51:153 + \_ref_obj: (routing_matrix_p.i), line:51:152, endln:51:153 |vpiParent: - \_operation: , line:45:92, endln:51:168 + \_var_select: (routing_matrix_p), line:51:132, endln:51:154 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:51:158, endln:51:160 |vpiParent: @@ -7576,7 +7633,7 @@ design: (work@top) |vpiOperand: \_operation: , line:51:171, endln:51:201 |vpiParent: - \_operation: , line:45:92, endln:51:208 + \_operation: , line:51:170, endln:51:207 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:51:172, endln:51:194 @@ -7592,10 +7649,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:51:192, endln:51:193 + \_ref_obj: (routing_matrix_p.i), line:51:192, endln:51:193 |vpiParent: - \_operation: , line:45:92, endln:51:208 + \_var_select: (routing_matrix_p), line:51:172, endln:51:194 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:51:198, endln:51:200 |vpiParent: @@ -7620,7 +7678,7 @@ design: (work@top) |vpiOperand: \_operation: , line:51:211, endln:51:241 |vpiParent: - \_operation: , line:45:92, endln:51:248 + \_operation: , line:51:210, endln:51:247 |vpiOpType:23 |vpiOperand: \_var_select: (routing_matrix_p), line:51:212, endln:51:234 @@ -7636,10 +7694,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:51:232, endln:51:233 + \_ref_obj: (routing_matrix_p.i), line:51:232, endln:51:233 |vpiParent: - \_operation: , line:45:92, endln:51:248 + \_var_select: (routing_matrix_p), line:51:212, endln:51:234 |vpiName:i + |vpiFullName:routing_matrix_p.i |vpiOperand: \_constant: , line:51:238, endln:51:240 |vpiParent: @@ -8049,7 +8108,7 @@ design: (work@top) |vpiOperand: \_constant: , line:23:34, endln:23:42 |vpiParent: - \_operation: , line:18:32, endln:24:34 + \_operation: , line:51:211, endln:51:241 |vpiDecompile:5'b11111 |vpiSize:5 |BIN:11111 diff --git a/tests/BlackParrotConf/BlackParrotConf.log b/tests/BlackParrotConf/BlackParrotConf.log index 0c93d8e92f..b26b25498b 100644 --- a/tests/BlackParrotConf/BlackParrotConf.log +++ b/tests/BlackParrotConf/BlackParrotConf.log @@ -20487,7 +20487,7 @@ param_assign 1017 parameter 1293 port 23 range 661 -ref_obj 9889 +ref_obj 7802 string_typespec 3221 struct_typespec 234 sys_func_call 82 @@ -20531,7 +20531,7 @@ param_assign 1017 parameter 1293 port 27 range 661 -ref_obj 9893 +ref_obj 7806 string_typespec 3221 struct_typespec 234 sys_func_call 82 @@ -23762,7 +23762,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_imm12_width_gp), line:1991:12, endln:1991:31 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1991:12, endln:1991:33 |vpiName:rv64_imm12_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_imm12_width_gp |vpiActual: @@ -23811,7 +23811,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp), line:1992:12, endln:1992:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1992:12, endln:1992:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp |vpiActual: @@ -23860,7 +23860,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_funct3_width_gp), line:1993:12, endln:1993:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1993:12, endln:1993:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_funct3_width_gp |vpiActual: @@ -23909,7 +23909,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp), line:1994:12, endln:1994:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1994:12, endln:1994:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp |vpiActual: @@ -23966,7 +23966,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct7_width_gp), line:1982:12, endln:1982:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1982:12, endln:1982:34 |vpiName:rv64_funct7_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct7_width_gp |vpiActual: @@ -24015,7 +24015,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1983:12, endln:1983:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1983:12, endln:1983:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24064,7 +24064,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1984:12, endln:1984:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1984:12, endln:1984:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24113,7 +24113,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct3_width_gp), line:1985:12, endln:1985:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1985:12, endln:1985:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct3_width_gp |vpiActual: @@ -24162,7 +24162,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1986:12, endln:1986:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1986:12, endln:1986:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24268,7 +24268,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm11to5_width_gp), line:1999:12, endln:1999:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:1999:12, endln:1999:36 |vpiName:rv64_imm11to5_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm11to5_width_gp |vpiActual: @@ -24317,7 +24317,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp), line:2000:12, endln:2000:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2000:12, endln:2000:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24366,7 +24366,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp), line:2001:12, endln:2001:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2001:12, endln:2001:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24415,7 +24415,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_funct3_width_gp), line:2002:12, endln:2002:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2002:12, endln:2002:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_funct3_width_gp |vpiActual: @@ -24464,7 +24464,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm4to0_width_gp), line:2003:12, endln:2003:33 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2003:12, endln:2003:35 |vpiName:rv64_imm4to0_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm4to0_width_gp |vpiActual: @@ -24531,7 +24531,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_imm20_width_gp), line:2008:12, endln:2008:31 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_utype_s), line:2006:11, endln:2006:17 + \_operation: , line:2008:12, endln:2008:33 |vpiName:rv64_imm20_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_imm20_width_gp |vpiActual: @@ -24580,7 +24580,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_reg_addr_width_gp), line:2009:12, endln:2009:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_utype_s), line:2006:11, endln:2006:17 + \_operation: , line:2009:12, endln:2009:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_reg_addr_width_gp |vpiActual: @@ -24639,7 +24639,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_s::rv64_opcode_width_gp), line:2021:12, endln:2021:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_s), line:2012:11, endln:2012:17 + \_operation: , line:2021:12, endln:2021:34 |vpiName:rv64_opcode_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_s::rv64_opcode_width_gp |vpiActual: @@ -36634,12 +36634,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:3171:12, endln:3171:56 |vpiParent: - \_struct_typespec: (bp_be_pkg::bp_sv39_pte_s), line:3169:11, endln:3169:17 + \_operation: , line:3171:12, endln:3171:58 |vpiOpType:11 |vpiOperand: \_operation: , line:3171:12, endln:3171:35 |vpiParent: - \_struct_typespec: (bp_be_pkg::bp_sv39_pte_s), line:3169:11, endln:3169:17 + \_operation: , line:3171:12, endln:3171:56 |vpiOpType:11 |vpiOperand: \_constant: , line:3171:12, endln:3171:32 @@ -42802,27 +42802,27 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5351:3, endln:5353:7 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_bitype_s), line:5348:9, endln:5348:15 + \_operation: , line:5350:10, endln:5354:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5351:3, endln:5353:5 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_bitype_s), line:5348:9, endln:5348:15 + \_operation: , line:5351:3, endln:5353:7 |vpiOpType:11 |vpiOperand: \_operation: , line:5351:3, endln:5352:3 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_bitype_s), line:5348:9, endln:5348:15 + \_operation: , line:5351:3, endln:5353:5 |vpiOpType:11 |vpiOperand: \_operation: , line:5351:4, endln:5351:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_bitype_s), line:5348:9, endln:5348:15 + \_operation: , line:5351:3, endln:5352:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5351:4, endln:5351:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_bitype_s), line:5348:9, endln:5348:15 + \_operation: , line:5351:4, endln:5351:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5351:4, endln:5351:6 @@ -43612,27 +43612,27 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5331:3, endln:5333:11 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_btype_s), line:5328:9, endln:5328:15 + \_operation: , line:5330:10, endln:5334:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5331:3, endln:5333:9 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_btype_s), line:5328:9, endln:5328:15 + \_operation: , line:5331:3, endln:5333:11 |vpiOpType:11 |vpiOperand: \_operation: , line:5331:3, endln:5332:3 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_btype_s), line:5328:9, endln:5328:15 + \_operation: , line:5331:3, endln:5333:9 |vpiOpType:11 |vpiOperand: \_operation: , line:5331:4, endln:5331:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_btype_s), line:5328:9, endln:5328:15 + \_operation: , line:5331:3, endln:5332:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5331:4, endln:5331:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_btype_s), line:5328:9, endln:5328:15 + \_operation: , line:5331:4, endln:5331:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5331:4, endln:5331:6 @@ -46426,27 +46426,27 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5401:3, endln:5403:7 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dptype_s), line:5399:9, endln:5399:15 + \_operation: , line:5400:10, endln:5404:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5401:3, endln:5403:5 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dptype_s), line:5399:9, endln:5399:15 + \_operation: , line:5401:3, endln:5403:7 |vpiOpType:11 |vpiOperand: \_operation: , line:5401:3, endln:5402:35 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dptype_s), line:5399:9, endln:5399:15 + \_operation: , line:5401:3, endln:5403:5 |vpiOpType:11 |vpiOperand: \_operation: , line:5401:4, endln:5401:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dptype_s), line:5399:9, endln:5399:15 + \_operation: , line:5401:3, endln:5402:35 |vpiOpType:11 |vpiOperand: \_operation: , line:5401:4, endln:5401:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dptype_s), line:5399:9, endln:5399:15 + \_operation: , line:5401:4, endln:5401:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5401:4, endln:5401:6 @@ -46588,32 +46588,32 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5421:3, endln:5424:9 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5420:10, endln:5425:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5421:3, endln:5423:73 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5421:3, endln:5424:9 |vpiOpType:11 |vpiOperand: \_operation: , line:5421:3, endln:5423:36 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5421:3, endln:5423:73 |vpiOpType:11 |vpiOperand: \_operation: , line:5421:3, endln:5422:35 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5421:3, endln:5423:36 |vpiOpType:11 |vpiOperand: \_operation: , line:5421:4, endln:5421:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5421:3, endln:5422:35 |vpiOpType:11 |vpiOperand: \_operation: , line:5421:4, endln:5421:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_drtype_s), line:5419:9, endln:5419:15 + \_operation: , line:5421:4, endln:5421:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5421:4, endln:5421:6 @@ -46868,42 +46868,42 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5445:3, endln:5448:67 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5444:10, endln:5449:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:3, endln:5448:65 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5448:67 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:3, endln:5448:42 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5448:65 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:3, endln:5447:69 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5448:42 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:3, endln:5447:36 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5447:69 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:3, endln:5446:35 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5447:36 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:4, endln:5445:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:3, endln:5446:35 |vpiOpType:11 |vpiOperand: \_operation: , line:5445:4, endln:5445:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_dwtype_s), line:5443:9, endln:5443:15 + \_operation: , line:5445:4, endln:5445:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5445:4, endln:5445:6 @@ -47275,27 +47275,27 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5280:3, endln:5282:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_itype_s), line:5277:9, endln:5277:15 + \_operation: , line:5279:10, endln:5283:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5280:3, endln:5282:5 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_itype_s), line:5277:9, endln:5277:15 + \_operation: , line:5280:3, endln:5282:8 |vpiOpType:11 |vpiOperand: \_operation: , line:5280:3, endln:5281:3 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_itype_s), line:5277:9, endln:5277:15 + \_operation: , line:5280:3, endln:5282:5 |vpiOpType:11 |vpiOperand: \_operation: , line:5280:4, endln:5280:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_itype_s), line:5277:9, endln:5277:15 + \_operation: , line:5280:3, endln:5281:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5280:4, endln:5280:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_itype_s), line:5277:9, endln:5277:15 + \_operation: , line:5280:4, endln:5280:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5280:4, endln:5280:6 @@ -47742,32 +47742,32 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5469:3, endln:5471:9 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5468:10, endln:5472:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5469:3, endln:5471:7 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5469:3, endln:5471:9 |vpiOpType:11 |vpiOperand: \_operation: , line:5469:3, endln:5471:5 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5469:3, endln:5471:7 |vpiOpType:11 |vpiOperand: \_operation: , line:5469:3, endln:5470:32 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5469:3, endln:5471:5 |vpiOpType:11 |vpiOperand: \_operation: , line:5469:4, endln:5469:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5469:3, endln:5470:32 |vpiOpType:11 |vpiOperand: \_operation: , line:5469:4, endln:5469:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_popq_s), line:5466:9, endln:5466:15 + \_operation: , line:5469:4, endln:5469:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5469:4, endln:5469:6 @@ -48183,22 +48183,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5260:3, endln:5262:9 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_rtype_s), line:5258:9, endln:5258:15 + \_operation: , line:5259:10, endln:5263:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5260:3, endln:5261:3 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_rtype_s), line:5258:9, endln:5258:15 + \_operation: , line:5260:3, endln:5262:9 |vpiOpType:11 |vpiOperand: \_operation: , line:5260:4, endln:5260:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_rtype_s), line:5258:9, endln:5258:15 + \_operation: , line:5260:3, endln:5261:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5260:4, endln:5260:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_rtype_s), line:5258:9, endln:5258:15 + \_operation: , line:5260:4, endln:5260:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5260:4, endln:5260:6 @@ -48483,32 +48483,32 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5381:3, endln:5383:62 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5380:10, endln:5384:3 |vpiOpType:11 |vpiOperand: \_operation: , line:5381:3, endln:5383:60 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5381:3, endln:5383:62 |vpiOpType:11 |vpiOperand: \_operation: , line:5381:3, endln:5383:37 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5381:3, endln:5383:60 |vpiOpType:11 |vpiOperand: \_operation: , line:5381:3, endln:5382:30 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5381:3, endln:5383:37 |vpiOpType:11 |vpiOperand: \_operation: , line:5381:4, endln:5381:10 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5381:3, endln:5382:30 |vpiOpType:11 |vpiOperand: \_operation: , line:5381:4, endln:5381:8 |vpiParent: - \_struct_typespec: (bp_me_pkg::bp_cce_inst_stype_s), line:5379:9, endln:5379:15 + \_operation: , line:5381:4, endln:5381:10 |vpiOpType:11 |vpiOperand: \_constant: , line:5381:4, endln:5381:6 @@ -82927,16 +82927,12 @@ design: (work@testbench) \_module_inst: work@bp_me_nonsynth_lce_tracer (work@bp_me_nonsynth_lce_tracer), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:5676:1, endln:6084:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:5682:48, endln:5682:72 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp |vpiIndex: - \_ref_obj: (all_cfgs_gp.bp_params_p), line:5682:60, endln:5682:71 + \_ref_obj: (bp_params_p), line:5682:60, endln:5682:71 |vpiParent: \_bit_select: (all_cfgs_gp), line:5682:48, endln:5682:72 |vpiName:bp_params_p - |vpiFullName:all_cfgs_gp.bp_params_p |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.proc_param_lp), line:5682:32, endln:5682:45 |vpiParamAssign: @@ -83334,7 +83330,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (cc_x_dim_p), line:5709:79, endln:5709:89 |vpiParent: - \_sys_func_call: ($clog2), line:5709:71, endln:5709:102 + \_operation: , line:5709:79, endln:5709:100 |vpiName:cc_x_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5709:90, endln:5709:100 @@ -83400,12 +83396,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5710:56, endln:5710:68 |vpiParent: - \_operation: , line:5710:38, endln:5710:71 + \_operation: , line:5710:56, endln:5710:70 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5710:56, endln:5710:66 |vpiParent: - \_operation: , line:5710:38, endln:5710:71 + \_operation: , line:5710:56, endln:5710:68 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:5710:67, endln:5710:68 @@ -83451,17 +83447,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5710:92, endln:5710:106 |vpiParent: - \_sys_func_call: ($clog2), line:5710:83, endln:5710:126 + \_operation: , line:5710:91, endln:5710:124 |vpiOpType:24 |vpiOperand: \_operation: , line:5710:92, endln:5710:104 |vpiParent: - \_sys_func_call: ($clog2), line:5710:83, endln:5710:126 + \_operation: , line:5710:92, endln:5710:106 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_x_dim_p), line:5710:92, endln:5710:102 |vpiParent: - \_sys_func_call: ($clog2), line:5710:83, endln:5710:126 + \_operation: , line:5710:92, endln:5710:104 |vpiName:cc_x_dim_p |vpiOperand: \_constant: , line:5710:103, endln:5710:104 @@ -83487,12 +83483,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5710:109, endln:5710:121 |vpiParent: - \_operation: , line:5710:91, endln:5710:124 + \_operation: , line:5710:109, endln:5710:123 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5710:109, endln:5710:119 |vpiParent: - \_operation: , line:5710:91, endln:5710:124 + \_operation: , line:5710:109, endln:5710:121 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:5710:120, endln:5710:121 @@ -83569,12 +83565,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5711:56, endln:5711:68 |vpiParent: - \_operation: , line:5711:38, endln:5711:71 + \_operation: , line:5711:56, endln:5711:70 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5711:56, endln:5711:66 |vpiParent: - \_operation: , line:5711:38, endln:5711:71 + \_operation: , line:5711:56, endln:5711:68 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:5711:67, endln:5711:68 @@ -83620,17 +83616,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5711:92, endln:5711:106 |vpiParent: - \_sys_func_call: ($clog2), line:5711:83, endln:5711:126 + \_operation: , line:5711:91, endln:5711:124 |vpiOpType:24 |vpiOperand: \_operation: , line:5711:92, endln:5711:104 |vpiParent: - \_sys_func_call: ($clog2), line:5711:83, endln:5711:126 + \_operation: , line:5711:92, endln:5711:106 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_x_dim_p), line:5711:92, endln:5711:102 |vpiParent: - \_sys_func_call: ($clog2), line:5711:83, endln:5711:126 + \_operation: , line:5711:92, endln:5711:104 |vpiName:cc_x_dim_p |vpiOperand: \_constant: , line:5711:103, endln:5711:104 @@ -83656,12 +83652,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5711:109, endln:5711:121 |vpiParent: - \_operation: , line:5711:91, endln:5711:124 + \_operation: , line:5711:109, endln:5711:123 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5711:109, endln:5711:119 |vpiParent: - \_operation: , line:5711:91, endln:5711:124 + \_operation: , line:5711:109, endln:5711:121 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:5711:120, endln:5711:121 @@ -84277,12 +84273,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5749:56, endln:5749:89 |vpiParent: - \_operation: , line:5748:47, endln:5749:130 + \_operation: , line:5749:55, endln:5749:128 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_assoc_p), line:5749:57, endln:5749:71 |vpiParent: - \_operation: , line:5748:47, endln:5749:130 + \_operation: , line:5749:56, endln:5749:89 |vpiName:icache_assoc_p |vpiOperand: \_ref_obj: (acache_assoc_p), line:5749:74, endln:5749:88 @@ -84312,12 +84308,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5750:56, endln:5750:89 |vpiParent: - \_operation: , line:5748:46, endln:5750:130 + \_operation: , line:5750:55, endln:5750:128 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_assoc_p), line:5750:57, endln:5750:71 |vpiParent: - \_operation: , line:5748:46, endln:5750:130 + \_operation: , line:5750:56, endln:5750:89 |vpiName:icache_assoc_p |vpiOperand: \_ref_obj: (acache_assoc_p), line:5750:74, endln:5750:88 @@ -84406,12 +84402,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5754:56, endln:5754:87 |vpiParent: - \_operation: , line:5753:47, endln:5754:126 + \_operation: , line:5754:55, endln:5754:124 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_sets_p), line:5754:57, endln:5754:70 |vpiParent: - \_operation: , line:5753:47, endln:5754:126 + \_operation: , line:5754:56, endln:5754:87 |vpiName:icache_sets_p |vpiOperand: \_ref_obj: (acache_sets_p), line:5754:73, endln:5754:86 @@ -84441,12 +84437,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5755:56, endln:5755:87 |vpiParent: - \_operation: , line:5753:46, endln:5755:126 + \_operation: , line:5755:55, endln:5755:124 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_sets_p), line:5755:57, endln:5755:70 |vpiParent: - \_operation: , line:5753:46, endln:5755:126 + \_operation: , line:5755:56, endln:5755:87 |vpiName:icache_sets_p |vpiOperand: \_ref_obj: (acache_sets_p), line:5755:73, endln:5755:86 @@ -84535,12 +84531,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5760:56, endln:5761:77 |vpiParent: - \_operation: , line:5759:48, endln:5763:2 + \_operation: , line:5760:55, endln:5762:77 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_block_width_p), line:5760:57, endln:5760:77 |vpiParent: - \_operation: , line:5759:48, endln:5763:2 + \_operation: , line:5760:56, endln:5761:77 |vpiName:icache_block_width_p |vpiOperand: \_ref_obj: (acache_block_width_p), line:5761:56, endln:5761:76 @@ -84570,12 +84566,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5764:56, endln:5765:77 |vpiParent: - \_operation: , line:5759:47, endln:5767:2 + \_operation: , line:5764:55, endln:5766:77 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_block_width_p), line:5764:57, endln:5764:77 |vpiParent: - \_operation: , line:5759:47, endln:5767:2 + \_operation: , line:5764:56, endln:5765:77 |vpiName:icache_block_width_p |vpiOperand: \_ref_obj: (acache_block_width_p), line:5765:56, endln:5765:76 @@ -84989,17 +84985,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5790:99, endln:5790:131 |vpiParent: - \_sys_func_call: ($clog2), line:5790:91, endln:5790:135 + \_operation: , line:5790:99, endln:5790:133 |vpiOpType:24 |vpiOperand: \_operation: , line:5790:99, endln:5790:120 |vpiParent: - \_sys_func_call: ($clog2), line:5790:91, endln:5790:135 + \_operation: , line:5790:99, endln:5790:131 |vpiOpType:24 |vpiOperand: \_ref_obj: (ic_y_dim_p), line:5790:99, endln:5790:109 |vpiParent: - \_sys_func_call: ($clog2), line:5790:91, endln:5790:135 + \_operation: , line:5790:99, endln:5790:120 |vpiName:ic_y_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5790:110, endln:5790:120 @@ -85100,17 +85096,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5791:101, endln:5791:135 |vpiParent: - \_sys_func_call: ($clog2), line:5791:93, endln:5791:139 + \_operation: , line:5791:101, endln:5791:137 |vpiOpType:24 |vpiOperand: \_operation: , line:5791:101, endln:5791:123 |vpiParent: - \_sys_func_call: ($clog2), line:5791:93, endln:5791:139 + \_operation: , line:5791:101, endln:5791:135 |vpiOpType:24 |vpiOperand: \_ref_obj: (sac_x_dim_p), line:5791:101, endln:5791:112 |vpiParent: - \_sys_func_call: ($clog2), line:5791:93, endln:5791:139 + \_operation: , line:5791:101, endln:5791:123 |vpiName:sac_x_dim_p |vpiOperand: \_ref_obj: (cc_x_dim_p), line:5791:113, endln:5791:123 @@ -85221,7 +85217,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:5796:11, endln:5796:33 |vpiParent: - \_operation: , line:5796:9, endln:5796:84 + \_operation: , line:5796:11, endln:5796:56 |vpiName:coh_noc_x_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:5796:34, endln:5796:56 @@ -85252,7 +85248,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:5797:11, endln:5797:33 |vpiParent: - \_operation: , line:5797:9, endln:5797:84 + \_operation: , line:5797:11, endln:5797:56 |vpiName:coh_noc_y_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:5797:34, endln:5797:56 @@ -85278,16 +85274,12 @@ design: (work@testbench) \_module_inst: work@bp_me_nonsynth_lce_tracer (work@bp_me_nonsynth_lce_tracer), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:5676:1, endln:6084:10 |vpiRhs: \_bit_select: (coh_noc_cord_markers_pos_p), line:5798:41, endln:5798:83 - |vpiParent: - \_ref_obj: (coh_noc_cord_markers_pos_p) - |vpiName:coh_noc_cord_markers_pos_p |vpiName:coh_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (coh_noc_cord_markers_pos_p.coh_noc_dims_p), line:5798:68, endln:5798:82 + \_ref_obj: (coh_noc_dims_p), line:5798:68, endln:5798:82 |vpiParent: \_bit_select: (coh_noc_cord_markers_pos_p), line:5798:41, endln:5798:83 |vpiName:coh_noc_dims_p - |vpiFullName:coh_noc_cord_markers_pos_p.coh_noc_dims_p |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.coh_noc_cord_width_p), line:5798:16, endln:5798:36 |vpiParamAssign: @@ -85463,17 +85455,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5805:102, endln:5805:134 |vpiParent: - \_sys_func_call: ($clog2), line:5805:94, endln:5805:138 + \_operation: , line:5805:102, endln:5805:136 |vpiOpType:24 |vpiOperand: \_operation: , line:5805:102, endln:5805:123 |vpiParent: - \_sys_func_call: ($clog2), line:5805:94, endln:5805:138 + \_operation: , line:5805:102, endln:5805:134 |vpiOpType:24 |vpiOperand: \_ref_obj: (ic_y_dim_p), line:5805:102, endln:5805:112 |vpiParent: - \_sys_func_call: ($clog2), line:5805:94, endln:5805:138 + \_operation: , line:5805:102, endln:5805:123 |vpiName:ic_y_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:5805:113, endln:5805:123 @@ -85612,7 +85604,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (mem_noc_x_cord_width_p), line:5812:11, endln:5812:33 |vpiParent: - \_operation: , line:5812:9, endln:5812:84 + \_operation: , line:5812:11, endln:5812:56 |vpiName:mem_noc_x_cord_width_p |vpiOperand: \_ref_obj: (mem_noc_y_cord_width_p), line:5812:34, endln:5812:56 @@ -85643,7 +85635,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (mem_noc_y_cord_width_p), line:5813:11, endln:5813:33 |vpiParent: - \_operation: , line:5813:9, endln:5813:84 + \_operation: , line:5813:11, endln:5813:56 |vpiName:mem_noc_y_cord_width_p |vpiOperand: \_ref_obj: (mem_noc_x_cord_width_p), line:5813:34, endln:5813:56 @@ -85669,16 +85661,12 @@ design: (work@testbench) \_module_inst: work@bp_me_nonsynth_lce_tracer (work@bp_me_nonsynth_lce_tracer), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:5676:1, endln:6084:10 |vpiRhs: \_bit_select: (mem_noc_cord_markers_pos_p), line:5814:44, endln:5814:86 - |vpiParent: - \_ref_obj: (mem_noc_cord_markers_pos_p) - |vpiName:mem_noc_cord_markers_pos_p |vpiName:mem_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (mem_noc_cord_markers_pos_p.mem_noc_dims_p), line:5814:71, endln:5814:85 + \_ref_obj: (mem_noc_dims_p), line:5814:71, endln:5814:85 |vpiParent: \_bit_select: (mem_noc_cord_markers_pos_p), line:5814:44, endln:5814:86 |vpiName:mem_noc_dims_p - |vpiFullName:mem_noc_cord_markers_pos_p.mem_noc_dims_p |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.mem_noc_cord_width_p), line:5814:16, endln:5814:36 |vpiParamAssign: @@ -85920,7 +85908,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (io_noc_x_cord_width_p), line:5829:11, endln:5829:32 |vpiParent: - \_operation: , line:5829:9, endln:5829:81 + \_operation: , line:5829:11, endln:5829:54 |vpiName:io_noc_x_cord_width_p |vpiOperand: \_ref_obj: (io_noc_y_cord_width_p), line:5829:33, endln:5829:54 @@ -85951,7 +85939,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (io_noc_y_cord_width_p), line:5830:11, endln:5830:32 |vpiParent: - \_operation: , line:5830:9, endln:5830:81 + \_operation: , line:5830:11, endln:5830:54 |vpiName:io_noc_y_cord_width_p |vpiOperand: \_ref_obj: (io_noc_x_cord_width_p), line:5830:33, endln:5830:54 @@ -85977,16 +85965,12 @@ design: (work@testbench) \_module_inst: work@bp_me_nonsynth_lce_tracer (work@bp_me_nonsynth_lce_tracer), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:5676:1, endln:6084:10 |vpiRhs: \_bit_select: (io_noc_cord_markers_pos_p), line:5831:43, endln:5831:83 - |vpiParent: - \_ref_obj: (io_noc_cord_markers_pos_p) - |vpiName:io_noc_cord_markers_pos_p |vpiName:io_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (io_noc_cord_markers_pos_p.io_noc_dims_p), line:5831:69, endln:5831:82 + \_ref_obj: (io_noc_dims_p), line:5831:69, endln:5831:82 |vpiParent: \_bit_select: (io_noc_cord_markers_pos_p), line:5831:43, endln:5831:83 |vpiName:io_noc_dims_p - |vpiFullName:io_noc_cord_markers_pos_p.io_noc_dims_p |vpiLhs: \_parameter: (work@bp_me_nonsynth_lce_tracer.io_noc_cord_width_p), line:5831:16, endln:5831:35 |vpiParamAssign: @@ -86472,12 +86456,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5866:70, endln:5866:86 |vpiParent: - \_operation: , line:5866:4, endln:5866:116 + \_operation: , line:5866:69, endln:5866:115 |vpiOpType:14 |vpiOperand: \_ref_obj: (lce_assoc_p), line:5866:71, endln:5866:82 |vpiParent: - \_operation: , line:5866:4, endln:5866:116 + \_operation: , line:5866:70, endln:5866:86 |vpiName:lce_assoc_p |vpiOperand: \_constant: , line:5866:85, endln:5866:86 @@ -86568,12 +86552,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5869:44, endln:5869:60 |vpiParent: - \_operation: , line:5869:39, endln:5869:90 + \_operation: , line:5869:43, endln:5869:89 |vpiOpType:14 |vpiOperand: \_ref_obj: (lce_assoc_p), line:5869:45, endln:5869:56 |vpiParent: - \_operation: , line:5869:39, endln:5869:90 + \_operation: , line:5869:44, endln:5869:60 |vpiName:lce_assoc_p |vpiOperand: \_constant: , line:5869:59, endln:5869:60 @@ -86996,7 +86980,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_header_s.lce_cmd_payload_width_lp), line:5984:12, endln:5984:36 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_msg_header_s), line:5982:11, endln:5982:17 + \_operation: , line:5984:12, endln:5984:38 |vpiName:lce_cmd_payload_width_lp |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_header_s.lce_cmd_payload_width_lp |vpiOperand: @@ -87056,7 +87040,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_header_s.paddr_width_p), line:5986:12, endln:5986:25 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_msg_header_s), line:5982:11, endln:5982:17 + \_operation: , line:5986:12, endln:5986:27 |vpiName:paddr_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_header_s.paddr_width_p |vpiOperand: @@ -87124,7 +87108,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_s.cce_block_width_p), line:5992:12, endln:5992:29 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_msg_s), line:5990:11, endln:5990:17 + \_operation: , line:5992:12, endln:5992:31 |vpiName:cce_block_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_msg_s.cce_block_width_p |vpiOperand: @@ -87201,17 +87185,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5952:14, endln:5952:60 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5952:12, endln:5952:63 |vpiOpType:32 |vpiOperand: \_operation: , line:5952:15, endln:5952:31 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5952:14, endln:5952:60 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_assoc_p), line:5952:16, endln:5952:27 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5952:15, endln:5952:31 |vpiName:lce_assoc_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_assoc_p |vpiOperand: @@ -87283,7 +87267,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_id_width_p), line:5953:12, endln:5953:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5953:12, endln:5953:28 |vpiName:lce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_id_width_p |vpiOperand: @@ -87340,17 +87324,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5955:14, endln:5955:60 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5955:12, endln:5955:63 |vpiOpType:32 |vpiOperand: \_operation: , line:5955:15, endln:5955:31 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5955:14, endln:5955:60 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_assoc_p), line:5955:16, endln:5955:27 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5955:15, endln:5955:31 |vpiName:lce_assoc_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_assoc_p |vpiOperand: @@ -87422,7 +87406,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.cce_id_width_p), line:5956:12, endln:5956:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5956:12, endln:5956:28 |vpiName:cce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.cce_id_width_p |vpiOperand: @@ -87467,7 +87451,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_id_width_p), line:5957:12, endln:5957:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_cmd_payload_s), line:5949:11, endln:5949:17 + \_operation: , line:5957:12, endln:5957:28 |vpiName:lce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_cmd_payload_s.lce_id_width_p |vpiOperand: @@ -87520,7 +87504,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_header_s.lce_req_payload_width_lp), line:5969:12, endln:5969:36 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_msg_header_s), line:5967:11, endln:5967:17 + \_operation: , line:5969:12, endln:5969:38 |vpiName:lce_req_payload_width_lp |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_header_s.lce_req_payload_width_lp |vpiOperand: @@ -87580,7 +87564,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_header_s.paddr_width_p), line:5971:12, endln:5971:25 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_msg_header_s), line:5967:11, endln:5967:17 + \_operation: , line:5971:12, endln:5971:27 |vpiName:paddr_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_header_s.paddr_width_p |vpiOperand: @@ -87648,7 +87632,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_s.cce_block_width_p), line:5977:12, endln:5977:29 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_msg_s), line:5975:11, endln:5975:17 + \_operation: , line:5977:12, endln:5977:31 |vpiName:cce_block_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_msg_s.cce_block_width_p |vpiOperand: @@ -87713,17 +87697,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:5943:14, endln:5943:60 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_payload_s), line:5941:11, endln:5941:17 + \_operation: , line:5943:12, endln:5943:63 |vpiOpType:32 |vpiOperand: \_operation: , line:5943:15, endln:5943:31 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_payload_s), line:5941:11, endln:5941:17 + \_operation: , line:5943:14, endln:5943:60 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.lce_assoc_p), line:5943:16, endln:5943:27 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_payload_s), line:5941:11, endln:5941:17 + \_operation: , line:5943:15, endln:5943:31 |vpiName:lce_assoc_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.lce_assoc_p |vpiOperand: @@ -87810,7 +87794,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.lce_id_width_p), line:5945:12, endln:5945:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_payload_s), line:5941:11, endln:5941:17 + \_operation: , line:5945:12, endln:5945:28 |vpiName:lce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.lce_id_width_p |vpiOperand: @@ -87855,7 +87839,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.cce_id_width_p), line:5946:12, endln:5946:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_req_payload_s), line:5941:11, endln:5941:17 + \_operation: , line:5946:12, endln:5946:28 |vpiName:cce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_req_payload_s.cce_id_width_p |vpiOperand: @@ -87908,7 +87892,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_header_s.lce_resp_payload_width_lp), line:5999:12, endln:5999:37 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_resp_msg_header_s), line:5997:11, endln:5997:17 + \_operation: , line:5999:12, endln:5999:39 |vpiName:lce_resp_payload_width_lp |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_header_s.lce_resp_payload_width_lp |vpiOperand: @@ -87968,7 +87952,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_header_s.paddr_width_p), line:6001:12, endln:6001:25 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_resp_msg_header_s), line:5997:11, endln:5997:17 + \_operation: , line:6001:12, endln:6001:27 |vpiName:paddr_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_header_s.paddr_width_p |vpiOperand: @@ -88036,7 +88020,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_s.cce_block_width_p), line:6007:12, endln:6007:29 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_resp_msg_s), line:6005:11, endln:6005:17 + \_operation: , line:6007:12, endln:6007:31 |vpiName:cce_block_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_msg_s.cce_block_width_p |vpiOperand: @@ -88101,7 +88085,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_payload_s.lce_id_width_p), line:5962:12, endln:5962:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_resp_payload_s), line:5960:11, endln:5960:17 + \_operation: , line:5962:12, endln:5962:28 |vpiName:lce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_payload_s.lce_id_width_p |vpiOperand: @@ -88146,7 +88130,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_payload_s.cce_id_width_p), line:5963:12, endln:5963:26 |vpiParent: - \_struct_typespec: (bp_bedrock_lce_resp_payload_s), line:5960:11, endln:5960:17 + \_operation: , line:5963:12, endln:5963:28 |vpiName:cce_id_width_p |vpiFullName:work@bp_me_nonsynth_lce_tracer.bp_bedrock_lce_resp_payload_s.cce_id_width_p |vpiOperand: @@ -88735,7 +88719,7 @@ design: (work@testbench) |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.file_name), line:6034:5, endln:6034:14 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6033:32, endln:6036:6 + \_assignment: , line:6034:5, endln:6034:69 |vpiName:file_name |vpiFullName:work@bp_me_nonsynth_lce_tracer.file_name |vpiStmt: @@ -88766,7 +88750,7 @@ design: (work@testbench) |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.file), line:6035:5, endln:6035:9 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6033:32, endln:6036:6 + \_assignment: , line:6035:5, endln:6035:39 |vpiName:file |vpiFullName:work@bp_me_nonsynth_lce_tracer.file |vpiAlwaysType:3 @@ -88826,7 +88810,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_req_v_i), line:6044:11, endln:6044:22 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6039:19, endln:6081:8 + \_operation: , line:6044:11, endln:6044:40 |vpiName:lce_req_v_i |vpiFullName:work@bp_me_nonsynth_lce_tracer.lce_req_v_i |vpiOperand: @@ -88852,7 +88836,7 @@ design: (work@testbench) |vpiOperand: \_hier_path: (lce_req_payload.src_id), line:6045:16, endln:6045:38 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6044:42, endln:6051:10 + \_operation: , line:6045:16, endln:6045:50 |vpiName:lce_req_payload.src_id |vpiActual: \_ref_obj: (lce_req_payload), line:6045:16, endln:6045:31 @@ -88860,10 +88844,11 @@ design: (work@testbench) \_hier_path: (lce_req_payload.src_id), line:6045:16, endln:6045:38 |vpiName:lce_req_payload |vpiActual: - \_ref_obj: (src_id), line:6045:32, endln:6045:38 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6045:32, endln:6045:38 |vpiParent: \_hier_path: (lce_req_payload.src_id), line:6045:16, endln:6045:38 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6045:42, endln:6045:50 |vpiParent: @@ -88917,10 +88902,11 @@ design: (work@testbench) \_hier_path: (lce_req_payload.src_id), line:6047:28, endln:6047:50 |vpiName:lce_req_payload |vpiActual: - \_ref_obj: (src_id), line:6047:44, endln:6047:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6047:44, endln:6047:50 |vpiParent: \_hier_path: (lce_req_payload.src_id), line:6047:28, endln:6047:50 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiArgument: \_hier_path: (lce_req.header.addr), line:6047:52, endln:6047:71 |vpiParent: @@ -88937,10 +88923,11 @@ design: (work@testbench) \_hier_path: (lce_req.header.addr), line:6047:52, endln:6047:71 |vpiName:header |vpiActual: - \_ref_obj: (addr), line:6047:67, endln:6047:71 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.addr), line:6047:67, endln:6047:71 |vpiParent: \_hier_path: (lce_req.header.addr), line:6047:52, endln:6047:71 |vpiName:addr + |vpiFullName:work@bp_me_nonsynth_lce_tracer.addr |vpiArgument: \_hier_path: (lce_req_payload.dst_id), line:6047:73, endln:6047:95 |vpiParent: @@ -88952,10 +88939,11 @@ design: (work@testbench) \_hier_path: (lce_req_payload.dst_id), line:6047:73, endln:6047:95 |vpiName:lce_req_payload |vpiActual: - \_ref_obj: (dst_id), line:6047:89, endln:6047:95 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.dst_id), line:6047:89, endln:6047:95 |vpiParent: \_hier_path: (lce_req_payload.dst_id), line:6047:73, endln:6047:95 |vpiName:dst_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.dst_id |vpiArgument: \_hier_path: (lce_req.header.msg_type), line:6047:97, endln:6047:120 |vpiParent: @@ -88972,10 +88960,11 @@ design: (work@testbench) \_hier_path: (lce_req.header.msg_type), line:6047:97, endln:6047:120 |vpiName:header |vpiActual: - \_ref_obj: (msg_type), line:6047:112, endln:6047:120 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.msg_type), line:6047:112, endln:6047:120 |vpiParent: \_hier_path: (lce_req.header.msg_type), line:6047:97, endln:6047:120 |vpiName:msg_type + |vpiFullName:work@bp_me_nonsynth_lce_tracer.msg_type |vpiArgument: \_hier_path: (lce_req_payload.non_exclusive), line:6048:21, endln:6048:50 |vpiParent: @@ -88987,10 +88976,11 @@ design: (work@testbench) \_hier_path: (lce_req_payload.non_exclusive), line:6048:21, endln:6048:50 |vpiName:lce_req_payload |vpiActual: - \_ref_obj: (non_exclusive), line:6048:37, endln:6048:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.non_exclusive), line:6048:37, endln:6048:50 |vpiParent: \_hier_path: (lce_req_payload.non_exclusive), line:6048:21, endln:6048:50 |vpiName:non_exclusive + |vpiFullName:work@bp_me_nonsynth_lce_tracer.non_exclusive |vpiArgument: \_hier_path: (lce_req_payload.lru_way_id), line:6048:52, endln:6048:78 |vpiParent: @@ -89002,10 +88992,11 @@ design: (work@testbench) \_hier_path: (lce_req_payload.lru_way_id), line:6048:52, endln:6048:78 |vpiName:lce_req_payload |vpiActual: - \_ref_obj: (lru_way_id), line:6048:68, endln:6048:78 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lru_way_id), line:6048:68, endln:6048:78 |vpiParent: \_hier_path: (lce_req_payload.lru_way_id), line:6048:52, endln:6048:78 |vpiName:lru_way_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.lru_way_id |vpiArgument: \_hier_path: (lce_req.header.size), line:6049:21, endln:6049:40 |vpiParent: @@ -89022,10 +89013,11 @@ design: (work@testbench) \_hier_path: (lce_req.header.size), line:6049:21, endln:6049:40 |vpiName:header |vpiActual: - \_ref_obj: (size), line:6049:36, endln:6049:40 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.size), line:6049:36, endln:6049:40 |vpiParent: \_hier_path: (lce_req.header.size), line:6049:21, endln:6049:40 |vpiName:size + |vpiFullName:work@bp_me_nonsynth_lce_tracer.size |vpiArgument: \_hier_path: (lce_req.data), line:6049:42, endln:6049:54 |vpiParent: @@ -89037,10 +89029,11 @@ design: (work@testbench) \_hier_path: (lce_req.data), line:6049:42, endln:6049:54 |vpiName:lce_req |vpiActual: - \_ref_obj: (data), line:6049:50, endln:6049:54 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.data), line:6049:50, endln:6049:54 |vpiParent: \_hier_path: (lce_req.data), line:6049:42, endln:6049:54 |vpiName:data + |vpiFullName:work@bp_me_nonsynth_lce_tracer.data |vpiName:$fdisplay |vpiStmt: \_if_stmt: , line:6054:7, endln:6060:10 @@ -89054,7 +89047,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_resp_v_i), line:6054:11, endln:6054:23 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6039:19, endln:6081:8 + \_operation: , line:6054:11, endln:6054:42 |vpiName:lce_resp_v_i |vpiFullName:work@bp_me_nonsynth_lce_tracer.lce_resp_v_i |vpiOperand: @@ -89080,7 +89073,7 @@ design: (work@testbench) |vpiOperand: \_hier_path: (lce_resp_payload.src_id), line:6055:16, endln:6055:39 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6054:44, endln:6060:10 + \_operation: , line:6055:16, endln:6055:51 |vpiName:lce_resp_payload.src_id |vpiActual: \_ref_obj: (lce_resp_payload), line:6055:16, endln:6055:32 @@ -89088,10 +89081,11 @@ design: (work@testbench) \_hier_path: (lce_resp_payload.src_id), line:6055:16, endln:6055:39 |vpiName:lce_resp_payload |vpiActual: - \_ref_obj: (src_id), line:6055:33, endln:6055:39 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6055:33, endln:6055:39 |vpiParent: \_hier_path: (lce_resp_payload.src_id), line:6055:16, endln:6055:39 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6055:43, endln:6055:51 |vpiParent: @@ -89145,10 +89139,11 @@ design: (work@testbench) \_hier_path: (lce_resp_payload.src_id), line:6057:28, endln:6057:51 |vpiName:lce_resp_payload |vpiActual: - \_ref_obj: (src_id), line:6057:45, endln:6057:51 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6057:45, endln:6057:51 |vpiParent: \_hier_path: (lce_resp_payload.src_id), line:6057:28, endln:6057:51 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiArgument: \_hier_path: (lce_resp.header.addr), line:6057:53, endln:6057:73 |vpiParent: @@ -89165,10 +89160,11 @@ design: (work@testbench) \_hier_path: (lce_resp.header.addr), line:6057:53, endln:6057:73 |vpiName:header |vpiActual: - \_ref_obj: (addr), line:6057:69, endln:6057:73 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.addr), line:6057:69, endln:6057:73 |vpiParent: \_hier_path: (lce_resp.header.addr), line:6057:53, endln:6057:73 |vpiName:addr + |vpiFullName:work@bp_me_nonsynth_lce_tracer.addr |vpiArgument: \_hier_path: (lce_resp_payload.dst_id), line:6057:75, endln:6057:98 |vpiParent: @@ -89180,10 +89176,11 @@ design: (work@testbench) \_hier_path: (lce_resp_payload.dst_id), line:6057:75, endln:6057:98 |vpiName:lce_resp_payload |vpiActual: - \_ref_obj: (dst_id), line:6057:92, endln:6057:98 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.dst_id), line:6057:92, endln:6057:98 |vpiParent: \_hier_path: (lce_resp_payload.dst_id), line:6057:75, endln:6057:98 |vpiName:dst_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.dst_id |vpiArgument: \_hier_path: (lce_resp.header.msg_type), line:6057:100, endln:6057:124 |vpiParent: @@ -89200,10 +89197,11 @@ design: (work@testbench) \_hier_path: (lce_resp.header.msg_type), line:6057:100, endln:6057:124 |vpiName:header |vpiActual: - \_ref_obj: (msg_type), line:6057:116, endln:6057:124 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.msg_type), line:6057:116, endln:6057:124 |vpiParent: \_hier_path: (lce_resp.header.msg_type), line:6057:100, endln:6057:124 |vpiName:msg_type + |vpiFullName:work@bp_me_nonsynth_lce_tracer.msg_type |vpiArgument: \_hier_path: (lce_resp.header.size), line:6058:21, endln:6058:41 |vpiParent: @@ -89220,10 +89218,11 @@ design: (work@testbench) \_hier_path: (lce_resp.header.size), line:6058:21, endln:6058:41 |vpiName:header |vpiActual: - \_ref_obj: (size), line:6058:37, endln:6058:41 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.size), line:6058:37, endln:6058:41 |vpiParent: \_hier_path: (lce_resp.header.size), line:6058:21, endln:6058:41 |vpiName:size + |vpiFullName:work@bp_me_nonsynth_lce_tracer.size |vpiArgument: \_hier_path: (lce_resp.data), line:6058:43, endln:6058:56 |vpiParent: @@ -89235,10 +89234,11 @@ design: (work@testbench) \_hier_path: (lce_resp.data), line:6058:43, endln:6058:56 |vpiName:lce_resp |vpiActual: - \_ref_obj: (data), line:6058:52, endln:6058:56 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.data), line:6058:52, endln:6058:56 |vpiParent: \_hier_path: (lce_resp.data), line:6058:43, endln:6058:56 |vpiName:data + |vpiFullName:work@bp_me_nonsynth_lce_tracer.data |vpiName:$fdisplay |vpiStmt: \_if_stmt: , line:6063:7, endln:6070:10 @@ -89252,7 +89252,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_v_i), line:6063:11, endln:6063:22 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6039:19, endln:6081:8 + \_operation: , line:6063:11, endln:6063:39 |vpiName:lce_cmd_v_i |vpiFullName:work@bp_me_nonsynth_lce_tracer.lce_cmd_v_i |vpiOperand: @@ -89278,7 +89278,7 @@ design: (work@testbench) |vpiOperand: \_hier_path: (lce_cmd_payload.dst_id), line:6064:16, endln:6064:38 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6063:41, endln:6070:10 + \_operation: , line:6064:16, endln:6064:50 |vpiName:lce_cmd_payload.dst_id |vpiActual: \_ref_obj: (lce_cmd_payload), line:6064:16, endln:6064:31 @@ -89286,10 +89286,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.dst_id), line:6064:16, endln:6064:38 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (dst_id), line:6064:32, endln:6064:38 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.dst_id), line:6064:32, endln:6064:38 |vpiParent: \_hier_path: (lce_cmd_payload.dst_id), line:6064:16, endln:6064:38 |vpiName:dst_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.dst_id |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_id_i), line:6064:42, endln:6064:50 |vpiParent: @@ -89343,10 +89344,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.dst_id), line:6066:28, endln:6066:50 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (dst_id), line:6066:44, endln:6066:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.dst_id), line:6066:44, endln:6066:50 |vpiParent: \_hier_path: (lce_cmd_payload.dst_id), line:6066:28, endln:6066:50 |vpiName:dst_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.dst_id |vpiArgument: \_hier_path: (lce_cmd.header.addr), line:6066:52, endln:6066:71 |vpiParent: @@ -89363,10 +89365,11 @@ design: (work@testbench) \_hier_path: (lce_cmd.header.addr), line:6066:52, endln:6066:71 |vpiName:header |vpiActual: - \_ref_obj: (addr), line:6066:67, endln:6066:71 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.addr), line:6066:67, endln:6066:71 |vpiParent: \_hier_path: (lce_cmd.header.addr), line:6066:52, endln:6066:71 |vpiName:addr + |vpiFullName:work@bp_me_nonsynth_lce_tracer.addr |vpiArgument: \_hier_path: (lce_cmd_payload.src_id), line:6066:73, endln:6066:95 |vpiParent: @@ -89378,10 +89381,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.src_id), line:6066:73, endln:6066:95 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (src_id), line:6066:89, endln:6066:95 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6066:89, endln:6066:95 |vpiParent: \_hier_path: (lce_cmd_payload.src_id), line:6066:73, endln:6066:95 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiArgument: \_hier_path: (lce_cmd.header.msg_type), line:6066:97, endln:6066:120 |vpiParent: @@ -89398,10 +89402,11 @@ design: (work@testbench) \_hier_path: (lce_cmd.header.msg_type), line:6066:97, endln:6066:120 |vpiName:header |vpiActual: - \_ref_obj: (msg_type), line:6066:112, endln:6066:120 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.msg_type), line:6066:112, endln:6066:120 |vpiParent: \_hier_path: (lce_cmd.header.msg_type), line:6066:97, endln:6066:120 |vpiName:msg_type + |vpiFullName:work@bp_me_nonsynth_lce_tracer.msg_type |vpiArgument: \_hier_path: (lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp]), line:6067:21, endln:6067:74 |vpiParent: @@ -89418,17 +89423,20 @@ design: (work@testbench) \_hier_path: (lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp]), line:6067:21, endln:6067:74 |vpiName:header |vpiActual: - \_indexed_part_select: , line:6067:36, endln:6067:73 - |vpiParent: - \_ref_obj: (addr) - |vpiName:addr + \_indexed_part_select: (lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp]), line:6067:36, endln:6067:73 + |vpiName:addr + |vpiFullName:lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp] |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_ref_obj: (block_offset_bits_lp), line:6067:41, endln:6067:61 + |vpiParent: + \_indexed_part_select: (lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp]), line:6067:36, endln:6067:73 |vpiName:block_offset_bits_lp |vpiWidthExpr: \_ref_obj: (lg_sets_lp), line:6067:63, endln:6067:73 + |vpiParent: + \_indexed_part_select: (lce_cmd.header.addr[block_offset_bits_lp+:lg_sets_lp]), line:6067:36, endln:6067:73 |vpiName:lg_sets_lp |vpiArgument: \_hier_path: (lce_cmd_payload.way_id), line:6067:76, endln:6067:98 @@ -89441,10 +89449,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.way_id), line:6067:76, endln:6067:98 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (way_id), line:6067:92, endln:6067:98 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.way_id), line:6067:92, endln:6067:98 |vpiParent: \_hier_path: (lce_cmd_payload.way_id), line:6067:76, endln:6067:98 |vpiName:way_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.way_id |vpiArgument: \_hier_path: (lce_cmd_payload.state), line:6067:100, endln:6067:121 |vpiParent: @@ -89456,10 +89465,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.state), line:6067:100, endln:6067:121 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (state), line:6067:116, endln:6067:121 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.state), line:6067:116, endln:6067:121 |vpiParent: \_hier_path: (lce_cmd_payload.state), line:6067:100, endln:6067:121 |vpiName:state + |vpiFullName:work@bp_me_nonsynth_lce_tracer.state |vpiArgument: \_hier_path: (lce_cmd_payload.target), line:6067:123, endln:6067:145 |vpiParent: @@ -89471,10 +89481,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.target), line:6067:123, endln:6067:145 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (target), line:6067:139, endln:6067:145 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.target), line:6067:139, endln:6067:145 |vpiParent: \_hier_path: (lce_cmd_payload.target), line:6067:123, endln:6067:145 |vpiName:target + |vpiFullName:work@bp_me_nonsynth_lce_tracer.target |vpiArgument: \_hier_path: (lce_cmd_payload.target_way_id), line:6068:21, endln:6068:50 |vpiParent: @@ -89486,10 +89497,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_payload.target_way_id), line:6068:21, endln:6068:50 |vpiName:lce_cmd_payload |vpiActual: - \_ref_obj: (target_way_id), line:6068:37, endln:6068:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.target_way_id), line:6068:37, endln:6068:50 |vpiParent: \_hier_path: (lce_cmd_payload.target_way_id), line:6068:21, endln:6068:50 |vpiName:target_way_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.target_way_id |vpiArgument: \_hier_path: (lce_cmd.header.size), line:6068:52, endln:6068:71 |vpiParent: @@ -89506,10 +89518,11 @@ design: (work@testbench) \_hier_path: (lce_cmd.header.size), line:6068:52, endln:6068:71 |vpiName:header |vpiActual: - \_ref_obj: (size), line:6068:67, endln:6068:71 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.size), line:6068:67, endln:6068:71 |vpiParent: \_hier_path: (lce_cmd.header.size), line:6068:52, endln:6068:71 |vpiName:size + |vpiFullName:work@bp_me_nonsynth_lce_tracer.size |vpiArgument: \_hier_path: (lce_cmd.data), line:6068:73, endln:6068:85 |vpiParent: @@ -89521,10 +89534,11 @@ design: (work@testbench) \_hier_path: (lce_cmd.data), line:6068:73, endln:6068:85 |vpiName:lce_cmd |vpiActual: - \_ref_obj: (data), line:6068:81, endln:6068:85 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.data), line:6068:81, endln:6068:85 |vpiParent: \_hier_path: (lce_cmd.data), line:6068:73, endln:6068:85 |vpiName:data + |vpiFullName:work@bp_me_nonsynth_lce_tracer.data |vpiName:$fdisplay |vpiStmt: \_if_stmt: , line:6073:7, endln:6079:10 @@ -89538,7 +89552,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_o_v_i), line:6073:11, endln:6073:24 |vpiParent: - \_begin: (work@bp_me_nonsynth_lce_tracer), line:6039:19, endln:6081:8 + \_operation: , line:6073:11, endln:6073:44 |vpiName:lce_cmd_o_v_i |vpiFullName:work@bp_me_nonsynth_lce_tracer.lce_cmd_o_v_i |vpiOperand: @@ -89592,10 +89606,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.dst_id), line:6075:38, endln:6075:63 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (dst_id), line:6075:57, endln:6075:63 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.dst_id), line:6075:57, endln:6075:63 |vpiParent: \_hier_path: (lce_cmd_lo_payload.dst_id), line:6075:38, endln:6075:63 |vpiName:dst_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.dst_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.addr), line:6075:65, endln:6075:87 |vpiParent: @@ -89612,10 +89627,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo.header.addr), line:6075:65, endln:6075:87 |vpiName:header |vpiActual: - \_ref_obj: (addr), line:6075:83, endln:6075:87 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.addr), line:6075:83, endln:6075:87 |vpiParent: \_hier_path: (lce_cmd_lo.header.addr), line:6075:65, endln:6075:87 |vpiName:addr + |vpiFullName:work@bp_me_nonsynth_lce_tracer.addr |vpiArgument: \_hier_path: (lce_cmd_lo_payload.src_id), line:6075:89, endln:6075:114 |vpiParent: @@ -89627,10 +89643,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.src_id), line:6075:89, endln:6075:114 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (src_id), line:6075:108, endln:6075:114 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.src_id), line:6075:108, endln:6075:114 |vpiParent: \_hier_path: (lce_cmd_lo_payload.src_id), line:6075:89, endln:6075:114 |vpiName:src_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.src_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.msg_type), line:6075:116, endln:6075:142 |vpiParent: @@ -89647,10 +89664,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo.header.msg_type), line:6075:116, endln:6075:142 |vpiName:header |vpiActual: - \_ref_obj: (msg_type), line:6075:134, endln:6075:142 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.msg_type), line:6075:134, endln:6075:142 |vpiParent: \_hier_path: (lce_cmd_lo.header.msg_type), line:6075:116, endln:6075:142 |vpiName:msg_type + |vpiFullName:work@bp_me_nonsynth_lce_tracer.msg_type |vpiArgument: \_hier_path: (lce_cmd_lo_payload.way_id), line:6076:21, endln:6076:46 |vpiParent: @@ -89662,10 +89680,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.way_id), line:6076:21, endln:6076:46 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (way_id), line:6076:40, endln:6076:46 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.way_id), line:6076:40, endln:6076:46 |vpiParent: \_hier_path: (lce_cmd_lo_payload.way_id), line:6076:21, endln:6076:46 |vpiName:way_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.way_id |vpiArgument: \_hier_path: (lce_cmd_lo_payload.state), line:6076:48, endln:6076:72 |vpiParent: @@ -89677,10 +89696,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.state), line:6076:48, endln:6076:72 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (state), line:6076:67, endln:6076:72 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.state), line:6076:67, endln:6076:72 |vpiParent: \_hier_path: (lce_cmd_lo_payload.state), line:6076:48, endln:6076:72 |vpiName:state + |vpiFullName:work@bp_me_nonsynth_lce_tracer.state |vpiArgument: \_hier_path: (lce_cmd_lo_payload.target), line:6076:74, endln:6076:99 |vpiParent: @@ -89692,10 +89712,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.target), line:6076:74, endln:6076:99 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (target), line:6076:93, endln:6076:99 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.target), line:6076:93, endln:6076:99 |vpiParent: \_hier_path: (lce_cmd_lo_payload.target), line:6076:74, endln:6076:99 |vpiName:target + |vpiFullName:work@bp_me_nonsynth_lce_tracer.target |vpiArgument: \_hier_path: (lce_cmd_lo_payload.target_way_id), line:6076:101, endln:6076:133 |vpiParent: @@ -89707,10 +89728,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo_payload.target_way_id), line:6076:101, endln:6076:133 |vpiName:lce_cmd_lo_payload |vpiActual: - \_ref_obj: (target_way_id), line:6076:120, endln:6076:133 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.target_way_id), line:6076:120, endln:6076:133 |vpiParent: \_hier_path: (lce_cmd_lo_payload.target_way_id), line:6076:101, endln:6076:133 |vpiName:target_way_id + |vpiFullName:work@bp_me_nonsynth_lce_tracer.target_way_id |vpiArgument: \_hier_path: (lce_cmd_lo.header.size), line:6077:21, endln:6077:43 |vpiParent: @@ -89727,10 +89749,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo.header.size), line:6077:21, endln:6077:43 |vpiName:header |vpiActual: - \_ref_obj: (size), line:6077:39, endln:6077:43 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.size), line:6077:39, endln:6077:43 |vpiParent: \_hier_path: (lce_cmd_lo.header.size), line:6077:21, endln:6077:43 |vpiName:size + |vpiFullName:work@bp_me_nonsynth_lce_tracer.size |vpiArgument: \_hier_path: (lce_cmd_lo.data), line:6077:45, endln:6077:60 |vpiParent: @@ -89742,10 +89765,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo.data), line:6077:45, endln:6077:60 |vpiName:lce_cmd_lo |vpiActual: - \_ref_obj: (data), line:6077:56, endln:6077:60 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.data), line:6077:56, endln:6077:60 |vpiParent: \_hier_path: (lce_cmd_lo.data), line:6077:45, endln:6077:60 |vpiName:data + |vpiFullName:work@bp_me_nonsynth_lce_tracer.data |vpiName:$fdisplay |vpiAlwaysType:3 |vpiContAssign: @@ -89832,10 +89856,11 @@ design: (work@testbench) \_hier_path: (lce_req.header.payload), line:6025:28, endln:6025:50 |vpiName:header |vpiActual: - \_ref_obj: (payload), line:6025:43, endln:6025:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.payload), line:6025:43, endln:6025:50 |vpiParent: \_hier_path: (lce_req.header.payload), line:6025:28, endln:6025:50 |vpiName:payload + |vpiFullName:work@bp_me_nonsynth_lce_tracer.payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_req_payload), line:6025:10, endln:6025:25 |vpiParent: @@ -89862,10 +89887,11 @@ design: (work@testbench) \_hier_path: (lce_resp.header.payload), line:6026:29, endln:6026:52 |vpiName:header |vpiActual: - \_ref_obj: (payload), line:6026:45, endln:6026:52 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.payload), line:6026:45, endln:6026:52 |vpiParent: \_hier_path: (lce_resp.header.payload), line:6026:29, endln:6026:52 |vpiName:payload + |vpiFullName:work@bp_me_nonsynth_lce_tracer.payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_resp_payload), line:6026:10, endln:6026:26 |vpiParent: @@ -89892,10 +89918,11 @@ design: (work@testbench) \_hier_path: (lce_cmd.header.payload), line:6027:28, endln:6027:50 |vpiName:header |vpiActual: - \_ref_obj: (payload), line:6027:43, endln:6027:50 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.payload), line:6027:43, endln:6027:50 |vpiParent: \_hier_path: (lce_cmd.header.payload), line:6027:28, endln:6027:50 |vpiName:payload + |vpiFullName:work@bp_me_nonsynth_lce_tracer.payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_payload), line:6027:10, endln:6027:25 |vpiParent: @@ -89922,10 +89949,11 @@ design: (work@testbench) \_hier_path: (lce_cmd_lo.header.payload), line:6028:31, endln:6028:56 |vpiName:header |vpiActual: - \_ref_obj: (payload), line:6028:49, endln:6028:56 + \_ref_obj: (work@bp_me_nonsynth_lce_tracer.payload), line:6028:49, endln:6028:56 |vpiParent: \_hier_path: (lce_cmd_lo.header.payload), line:6028:31, endln:6028:56 |vpiName:payload + |vpiFullName:work@bp_me_nonsynth_lce_tracer.payload |vpiLhs: \_ref_obj: (work@bp_me_nonsynth_lce_tracer.lce_cmd_lo_payload), line:6028:10, endln:6028:28 |vpiParent: @@ -111621,16 +111649,12 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:6086:1, endln:6503:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:6094:48, endln:6094:72 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp |vpiIndex: - \_ref_obj: (all_cfgs_gp.bp_params_p), line:6094:60, endln:6094:71 + \_ref_obj: (bp_params_p), line:6094:60, endln:6094:71 |vpiParent: \_bit_select: (all_cfgs_gp), line:6094:48, endln:6094:72 |vpiName:bp_params_p - |vpiFullName:all_cfgs_gp.bp_params_p |vpiLhs: \_parameter: (work@testbench.proc_param_lp), line:6094:32, endln:6094:45 |vpiParamAssign: @@ -112028,7 +112052,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (cc_x_dim_p), line:6121:79, endln:6121:89 |vpiParent: - \_sys_func_call: ($clog2), line:6121:71, endln:6121:102 + \_operation: , line:6121:79, endln:6121:100 |vpiName:cc_x_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6121:90, endln:6121:100 @@ -112094,12 +112118,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:56, endln:6122:68 |vpiParent: - \_operation: , line:6122:38, endln:6122:71 + \_operation: , line:6122:56, endln:6122:70 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6122:56, endln:6122:66 |vpiParent: - \_operation: , line:6122:38, endln:6122:71 + \_operation: , line:6122:56, endln:6122:68 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:6122:67, endln:6122:68 @@ -112145,17 +112169,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:92, endln:6122:106 |vpiParent: - \_sys_func_call: ($clog2), line:6122:83, endln:6122:126 + \_operation: , line:6122:91, endln:6122:124 |vpiOpType:24 |vpiOperand: \_operation: , line:6122:92, endln:6122:104 |vpiParent: - \_sys_func_call: ($clog2), line:6122:83, endln:6122:126 + \_operation: , line:6122:92, endln:6122:106 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_x_dim_p), line:6122:92, endln:6122:102 |vpiParent: - \_sys_func_call: ($clog2), line:6122:83, endln:6122:126 + \_operation: , line:6122:92, endln:6122:104 |vpiName:cc_x_dim_p |vpiOperand: \_constant: , line:6122:103, endln:6122:104 @@ -112181,12 +112205,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:109, endln:6122:121 |vpiParent: - \_operation: , line:6122:91, endln:6122:124 + \_operation: , line:6122:109, endln:6122:123 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6122:109, endln:6122:119 |vpiParent: - \_operation: , line:6122:91, endln:6122:124 + \_operation: , line:6122:109, endln:6122:121 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:6122:120, endln:6122:121 @@ -112263,12 +112287,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:56, endln:6123:68 |vpiParent: - \_operation: , line:6123:38, endln:6123:71 + \_operation: , line:6123:56, endln:6123:70 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6123:56, endln:6123:66 |vpiParent: - \_operation: , line:6123:38, endln:6123:71 + \_operation: , line:6123:56, endln:6123:68 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:6123:67, endln:6123:68 @@ -112314,17 +112338,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:92, endln:6123:106 |vpiParent: - \_sys_func_call: ($clog2), line:6123:83, endln:6123:126 + \_operation: , line:6123:91, endln:6123:124 |vpiOpType:24 |vpiOperand: \_operation: , line:6123:92, endln:6123:104 |vpiParent: - \_sys_func_call: ($clog2), line:6123:83, endln:6123:126 + \_operation: , line:6123:92, endln:6123:106 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_x_dim_p), line:6123:92, endln:6123:102 |vpiParent: - \_sys_func_call: ($clog2), line:6123:83, endln:6123:126 + \_operation: , line:6123:92, endln:6123:104 |vpiName:cc_x_dim_p |vpiOperand: \_constant: , line:6123:103, endln:6123:104 @@ -112350,12 +112374,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:109, endln:6123:121 |vpiParent: - \_operation: , line:6123:91, endln:6123:124 + \_operation: , line:6123:109, endln:6123:123 |vpiOpType:25 |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6123:109, endln:6123:119 |vpiParent: - \_operation: , line:6123:91, endln:6123:124 + \_operation: , line:6123:109, endln:6123:121 |vpiName:cc_y_dim_p |vpiOperand: \_constant: , line:6123:120, endln:6123:121 @@ -112971,12 +112995,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6161:56, endln:6161:89 |vpiParent: - \_operation: , line:6160:47, endln:6161:130 + \_operation: , line:6161:55, endln:6161:128 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_assoc_p), line:6161:57, endln:6161:71 |vpiParent: - \_operation: , line:6160:47, endln:6161:130 + \_operation: , line:6161:56, endln:6161:89 |vpiName:icache_assoc_p |vpiOperand: \_ref_obj: (acache_assoc_p), line:6161:74, endln:6161:88 @@ -113006,12 +113030,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6162:56, endln:6162:89 |vpiParent: - \_operation: , line:6160:46, endln:6162:130 + \_operation: , line:6162:55, endln:6162:128 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_assoc_p), line:6162:57, endln:6162:71 |vpiParent: - \_operation: , line:6160:46, endln:6162:130 + \_operation: , line:6162:56, endln:6162:89 |vpiName:icache_assoc_p |vpiOperand: \_ref_obj: (acache_assoc_p), line:6162:74, endln:6162:88 @@ -113100,12 +113124,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6166:56, endln:6166:87 |vpiParent: - \_operation: , line:6165:47, endln:6166:126 + \_operation: , line:6166:55, endln:6166:124 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_sets_p), line:6166:57, endln:6166:70 |vpiParent: - \_operation: , line:6165:47, endln:6166:126 + \_operation: , line:6166:56, endln:6166:87 |vpiName:icache_sets_p |vpiOperand: \_ref_obj: (acache_sets_p), line:6166:73, endln:6166:86 @@ -113135,12 +113159,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6167:56, endln:6167:87 |vpiParent: - \_operation: , line:6165:46, endln:6167:126 + \_operation: , line:6167:55, endln:6167:124 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_sets_p), line:6167:57, endln:6167:70 |vpiParent: - \_operation: , line:6165:46, endln:6167:126 + \_operation: , line:6167:56, endln:6167:87 |vpiName:icache_sets_p |vpiOperand: \_ref_obj: (acache_sets_p), line:6167:73, endln:6167:86 @@ -113229,12 +113253,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6172:56, endln:6173:77 |vpiParent: - \_operation: , line:6171:48, endln:6175:2 + \_operation: , line:6172:55, endln:6174:77 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_block_width_p), line:6172:57, endln:6172:77 |vpiParent: - \_operation: , line:6171:48, endln:6175:2 + \_operation: , line:6172:56, endln:6173:77 |vpiName:icache_block_width_p |vpiOperand: \_ref_obj: (acache_block_width_p), line:6173:56, endln:6173:76 @@ -113264,12 +113288,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6176:56, endln:6177:77 |vpiParent: - \_operation: , line:6171:47, endln:6179:2 + \_operation: , line:6176:55, endln:6178:77 |vpiOpType:18 |vpiOperand: \_ref_obj: (icache_block_width_p), line:6176:57, endln:6176:77 |vpiParent: - \_operation: , line:6171:47, endln:6179:2 + \_operation: , line:6176:56, endln:6177:77 |vpiName:icache_block_width_p |vpiOperand: \_ref_obj: (acache_block_width_p), line:6177:56, endln:6177:76 @@ -113683,17 +113707,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6202:99, endln:6202:131 |vpiParent: - \_sys_func_call: ($clog2), line:6202:91, endln:6202:135 + \_operation: , line:6202:99, endln:6202:133 |vpiOpType:24 |vpiOperand: \_operation: , line:6202:99, endln:6202:120 |vpiParent: - \_sys_func_call: ($clog2), line:6202:91, endln:6202:135 + \_operation: , line:6202:99, endln:6202:131 |vpiOpType:24 |vpiOperand: \_ref_obj: (ic_y_dim_p), line:6202:99, endln:6202:109 |vpiParent: - \_sys_func_call: ($clog2), line:6202:91, endln:6202:135 + \_operation: , line:6202:99, endln:6202:120 |vpiName:ic_y_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6202:110, endln:6202:120 @@ -113794,17 +113818,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6203:101, endln:6203:135 |vpiParent: - \_sys_func_call: ($clog2), line:6203:93, endln:6203:139 + \_operation: , line:6203:101, endln:6203:137 |vpiOpType:24 |vpiOperand: \_operation: , line:6203:101, endln:6203:123 |vpiParent: - \_sys_func_call: ($clog2), line:6203:93, endln:6203:139 + \_operation: , line:6203:101, endln:6203:135 |vpiOpType:24 |vpiOperand: \_ref_obj: (sac_x_dim_p), line:6203:101, endln:6203:112 |vpiParent: - \_sys_func_call: ($clog2), line:6203:93, endln:6203:139 + \_operation: , line:6203:101, endln:6203:123 |vpiName:sac_x_dim_p |vpiOperand: \_ref_obj: (cc_x_dim_p), line:6203:113, endln:6203:123 @@ -113915,7 +113939,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:6208:11, endln:6208:33 |vpiParent: - \_operation: , line:6208:9, endln:6208:84 + \_operation: , line:6208:11, endln:6208:56 |vpiName:coh_noc_x_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:6208:34, endln:6208:56 @@ -113946,7 +113970,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:6209:11, endln:6209:33 |vpiParent: - \_operation: , line:6209:9, endln:6209:84 + \_operation: , line:6209:11, endln:6209:56 |vpiName:coh_noc_y_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:6209:34, endln:6209:56 @@ -113972,16 +113996,12 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:6086:1, endln:6503:10 |vpiRhs: \_bit_select: (coh_noc_cord_markers_pos_p), line:6210:41, endln:6210:83 - |vpiParent: - \_ref_obj: (coh_noc_cord_markers_pos_p) - |vpiName:coh_noc_cord_markers_pos_p |vpiName:coh_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (coh_noc_cord_markers_pos_p.coh_noc_dims_p), line:6210:68, endln:6210:82 + \_ref_obj: (coh_noc_dims_p), line:6210:68, endln:6210:82 |vpiParent: \_bit_select: (coh_noc_cord_markers_pos_p), line:6210:41, endln:6210:83 |vpiName:coh_noc_dims_p - |vpiFullName:coh_noc_cord_markers_pos_p.coh_noc_dims_p |vpiLhs: \_parameter: (work@testbench.coh_noc_cord_width_p), line:6210:16, endln:6210:36 |vpiParamAssign: @@ -114157,17 +114177,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6217:102, endln:6217:134 |vpiParent: - \_sys_func_call: ($clog2), line:6217:94, endln:6217:138 + \_operation: , line:6217:102, endln:6217:136 |vpiOpType:24 |vpiOperand: \_operation: , line:6217:102, endln:6217:123 |vpiParent: - \_sys_func_call: ($clog2), line:6217:94, endln:6217:138 + \_operation: , line:6217:102, endln:6217:134 |vpiOpType:24 |vpiOperand: \_ref_obj: (ic_y_dim_p), line:6217:102, endln:6217:112 |vpiParent: - \_sys_func_call: ($clog2), line:6217:94, endln:6217:138 + \_operation: , line:6217:102, endln:6217:123 |vpiName:ic_y_dim_p |vpiOperand: \_ref_obj: (cc_y_dim_p), line:6217:113, endln:6217:123 @@ -114306,7 +114326,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (mem_noc_x_cord_width_p), line:6224:11, endln:6224:33 |vpiParent: - \_operation: , line:6224:9, endln:6224:84 + \_operation: , line:6224:11, endln:6224:56 |vpiName:mem_noc_x_cord_width_p |vpiOperand: \_ref_obj: (mem_noc_y_cord_width_p), line:6224:34, endln:6224:56 @@ -114337,7 +114357,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (mem_noc_y_cord_width_p), line:6225:11, endln:6225:33 |vpiParent: - \_operation: , line:6225:9, endln:6225:84 + \_operation: , line:6225:11, endln:6225:56 |vpiName:mem_noc_y_cord_width_p |vpiOperand: \_ref_obj: (mem_noc_x_cord_width_p), line:6225:34, endln:6225:56 @@ -114363,16 +114383,12 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:6086:1, endln:6503:10 |vpiRhs: \_bit_select: (mem_noc_cord_markers_pos_p), line:6226:44, endln:6226:86 - |vpiParent: - \_ref_obj: (mem_noc_cord_markers_pos_p) - |vpiName:mem_noc_cord_markers_pos_p |vpiName:mem_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (mem_noc_cord_markers_pos_p.mem_noc_dims_p), line:6226:71, endln:6226:85 + \_ref_obj: (mem_noc_dims_p), line:6226:71, endln:6226:85 |vpiParent: \_bit_select: (mem_noc_cord_markers_pos_p), line:6226:44, endln:6226:86 |vpiName:mem_noc_dims_p - |vpiFullName:mem_noc_cord_markers_pos_p.mem_noc_dims_p |vpiLhs: \_parameter: (work@testbench.mem_noc_cord_width_p), line:6226:16, endln:6226:36 |vpiParamAssign: @@ -114614,7 +114630,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (io_noc_x_cord_width_p), line:6241:11, endln:6241:32 |vpiParent: - \_operation: , line:6241:9, endln:6241:81 + \_operation: , line:6241:11, endln:6241:54 |vpiName:io_noc_x_cord_width_p |vpiOperand: \_ref_obj: (io_noc_y_cord_width_p), line:6241:33, endln:6241:54 @@ -114645,7 +114661,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (io_noc_y_cord_width_p), line:6242:11, endln:6242:32 |vpiParent: - \_operation: , line:6242:9, endln:6242:81 + \_operation: , line:6242:11, endln:6242:54 |vpiName:io_noc_y_cord_width_p |vpiOperand: \_ref_obj: (io_noc_x_cord_width_p), line:6242:33, endln:6242:54 @@ -114671,16 +114687,12 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:6086:1, endln:6503:10 |vpiRhs: \_bit_select: (io_noc_cord_markers_pos_p), line:6243:43, endln:6243:83 - |vpiParent: - \_ref_obj: (io_noc_cord_markers_pos_p) - |vpiName:io_noc_cord_markers_pos_p |vpiName:io_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (io_noc_cord_markers_pos_p.io_noc_dims_p), line:6243:69, endln:6243:82 + \_ref_obj: (io_noc_dims_p), line:6243:69, endln:6243:82 |vpiParent: \_bit_select: (io_noc_cord_markers_pos_p), line:6243:43, endln:6243:83 |vpiName:io_noc_dims_p - |vpiFullName:io_noc_cord_markers_pos_p.io_noc_dims_p |vpiLhs: \_parameter: (work@testbench.io_noc_cord_width_p), line:6243:16, endln:6243:35 |vpiParamAssign: @@ -114861,22 +114873,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6259:10, endln:6265:18 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6259:9, endln:6271:18 |vpiOpType:18 |vpiOperand: \_operation: , line:6260:4, endln:6260:63 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6259:10, endln:6265:18 |vpiOpType:24 |vpiOperand: \_operation: , line:6260:4, endln:6260:33 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6260:4, endln:6260:63 |vpiOpType:24 |vpiOperand: \_ref_obj: (vaddr_width_p), line:6260:4, endln:6260:17 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6260:4, endln:6260:33 |vpiName:vaddr_width_p |vpiOperand: \_ref_obj: (instr_width_p), line:6260:20, endln:6260:33 @@ -114896,7 +114908,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (vaddr_width_p), line:6263:4, endln:6263:17 |vpiParent: - \_operation: , line:6259:10, endln:6265:18 + \_operation: , line:6263:4, endln:6263:49 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:6263:20, endln:6263:49 @@ -114914,12 +114926,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6266:4, endln:6266:33 |vpiParent: - \_operation: , line:6259:9, endln:6271:18 + \_operation: , line:6266:4, endln:6266:63 |vpiOpType:24 |vpiOperand: \_ref_obj: (vaddr_width_p), line:6266:4, endln:6266:17 |vpiParent: - \_operation: , line:6259:9, endln:6271:18 + \_operation: , line:6266:4, endln:6266:33 |vpiName:vaddr_width_p |vpiOperand: \_ref_obj: (instr_width_p), line:6266:20, endln:6266:33 @@ -114939,7 +114951,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (vaddr_width_p), line:6269:4, endln:6269:17 |vpiParent: - \_operation: , line:6259:9, endln:6271:18 + \_operation: , line:6269:4, endln:6269:49 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:6269:20, endln:6269:49 @@ -114997,22 +115009,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6281:8, endln:6329:16 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6281:7, endln:6377:16 |vpiOpType:18 |vpiOperand: \_operation: , line:6282:4, endln:6283:75 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6281:8, endln:6329:16 |vpiOpType:24 |vpiOperand: \_operation: , line:6282:4, endln:6283:71 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6282:4, endln:6283:75 |vpiOpType:24 |vpiOperand: \_operation: , line:6282:4, endln:6283:33 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6282:4, endln:6283:71 |vpiOpType:24 |vpiOperand: \_constant: , line:6282:4, endln:6282:43 @@ -115051,12 +115063,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6285:20, endln:6306:26 |vpiParent: - \_operation: , line:6281:8, endln:6329:16 + \_operation: , line:6285:19, endln:6327:26 |vpiOpType:18 |vpiOperand: \_operation: , line:6286:4, endln:6286:33 |vpiParent: - \_operation: , line:6281:8, endln:6329:16 + \_operation: , line:6285:20, endln:6306:26 |vpiOpType:24 |vpiOperand: \_constant: , line:6286:4, endln:6286:5 @@ -115079,22 +115091,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6288:30, endln:6296:36 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6288:29, endln:6304:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6290:4, endln:6290:47 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6288:30, endln:6296:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6290:4, endln:6290:43 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6290:4, endln:6290:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6290:4, endln:6290:17 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6290:4, endln:6290:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6290:20, endln:6290:43 @@ -115124,7 +115136,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6294:4, endln:6294:16 |vpiParent: - \_operation: , line:6288:30, endln:6296:36 + \_operation: , line:6294:4, endln:6294:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6294:19, endln:6294:20 @@ -115142,12 +115154,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6298:4, endln:6298:43 |vpiParent: - \_operation: , line:6288:29, endln:6304:36 + \_operation: , line:6298:4, endln:6298:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6298:4, endln:6298:17 |vpiParent: - \_operation: , line:6288:29, endln:6304:36 + \_operation: , line:6298:4, endln:6298:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6298:20, endln:6298:43 @@ -115177,7 +115189,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6302:4, endln:6302:16 |vpiParent: - \_operation: , line:6288:29, endln:6304:36 + \_operation: , line:6302:4, endln:6302:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6302:19, endln:6302:20 @@ -115213,22 +115225,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6309:32, endln:6317:36 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6309:31, endln:6325:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6311:4, endln:6311:47 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6309:32, endln:6317:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6311:4, endln:6311:43 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6311:4, endln:6311:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6311:4, endln:6311:17 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6311:4, endln:6311:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6311:20, endln:6311:43 @@ -115258,7 +115270,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6315:4, endln:6315:16 |vpiParent: - \_operation: , line:6309:32, endln:6317:36 + \_operation: , line:6315:4, endln:6315:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6315:19, endln:6315:20 @@ -115276,12 +115288,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6319:4, endln:6319:43 |vpiParent: - \_operation: , line:6309:31, endln:6325:36 + \_operation: , line:6319:4, endln:6319:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6319:4, endln:6319:17 |vpiParent: - \_operation: , line:6309:31, endln:6325:36 + \_operation: , line:6319:4, endln:6319:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6319:20, endln:6319:43 @@ -115311,7 +115323,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6323:4, endln:6323:16 |vpiParent: - \_operation: , line:6309:31, endln:6325:36 + \_operation: , line:6323:4, endln:6323:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6323:19, endln:6323:20 @@ -115329,12 +115341,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6330:4, endln:6331:71 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6330:4, endln:6331:75 |vpiOpType:24 |vpiOperand: \_operation: , line:6330:4, endln:6331:33 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6330:4, endln:6331:71 |vpiOpType:24 |vpiOperand: \_constant: , line:6330:4, endln:6330:43 @@ -115373,12 +115385,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6333:22, endln:6354:26 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6333:21, endln:6375:26 |vpiOpType:18 |vpiOperand: \_operation: , line:6334:4, endln:6334:33 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6333:22, endln:6354:26 |vpiOpType:24 |vpiOperand: \_constant: , line:6334:4, endln:6334:5 @@ -115401,22 +115413,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6336:30, endln:6344:36 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6336:29, endln:6352:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6338:4, endln:6338:47 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6336:30, endln:6344:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6338:4, endln:6338:43 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6338:4, endln:6338:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6338:4, endln:6338:17 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6338:4, endln:6338:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6338:20, endln:6338:43 @@ -115446,7 +115458,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6342:4, endln:6342:16 |vpiParent: - \_operation: , line:6336:30, endln:6344:36 + \_operation: , line:6342:4, endln:6342:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6342:19, endln:6342:20 @@ -115464,12 +115476,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6346:4, endln:6346:43 |vpiParent: - \_operation: , line:6336:29, endln:6352:36 + \_operation: , line:6346:4, endln:6346:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6346:4, endln:6346:17 |vpiParent: - \_operation: , line:6336:29, endln:6352:36 + \_operation: , line:6346:4, endln:6346:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6346:20, endln:6346:43 @@ -115499,7 +115511,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6350:4, endln:6350:16 |vpiParent: - \_operation: , line:6336:29, endln:6352:36 + \_operation: , line:6350:4, endln:6350:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6350:19, endln:6350:20 @@ -115535,22 +115547,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6357:32, endln:6365:36 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6357:31, endln:6373:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6359:4, endln:6359:47 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6357:32, endln:6365:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6359:4, endln:6359:43 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6359:4, endln:6359:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6359:4, endln:6359:17 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6359:4, endln:6359:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6359:20, endln:6359:43 @@ -115580,7 +115592,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6363:4, endln:6363:16 |vpiParent: - \_operation: , line:6357:32, endln:6365:36 + \_operation: , line:6363:4, endln:6363:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6363:19, endln:6363:20 @@ -115598,12 +115610,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6367:4, endln:6367:43 |vpiParent: - \_operation: , line:6357:31, endln:6373:36 + \_operation: , line:6367:4, endln:6367:47 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:6367:4, endln:6367:17 |vpiParent: - \_operation: , line:6357:31, endln:6373:36 + \_operation: , line:6367:4, endln:6367:43 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:6367:20, endln:6367:43 @@ -115633,7 +115645,7 @@ design: (work@testbench) |vpiOperand: \_ref_obj: (asid_width_p), line:6371:4, endln:6371:16 |vpiParent: - \_operation: , line:6357:31, endln:6373:36 + \_operation: , line:6371:4, endln:6371:20 |vpiName:asid_width_p |vpiOperand: \_constant: , line:6371:19, endln:6371:20 @@ -115683,12 +115695,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6387:24, endln:6387:40 |vpiParent: - \_operation: , line:6387:4, endln:6387:70 + \_operation: , line:6387:23, endln:6387:69 |vpiOpType:14 |vpiOperand: \_ref_obj: (lce_assoc_p), line:6387:25, endln:6387:36 |vpiParent: - \_operation: , line:6387:4, endln:6387:70 + \_operation: , line:6387:24, endln:6387:40 |vpiName:lce_assoc_p |vpiOperand: \_constant: , line:6387:39, endln:6387:40 @@ -125785,16 +125797,14 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/BlackParrotConf/dut.sv, line:6086:1, endln:6503:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:6094:48, endln:6094:72 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp + |vpiActual: + \_parameter: (work@testbench.all_cfgs_gp), line:2516:44, endln:2516:55 |vpiIndex: - \_ref_obj: (all_cfgs_gp.bp_params_p), line:6094:60, endln:6094:71 + \_ref_obj: (bp_params_p), line:6094:60, endln:6094:71 |vpiParent: \_bit_select: (all_cfgs_gp), line:6094:48, endln:6094:72 |vpiName:bp_params_p - |vpiFullName:all_cfgs_gp.bp_params_p |vpiActual: \_parameter: (work@testbench.bp_params_p), line:6092:26, endln:6092:37 |vpiLhs: @@ -126510,7 +126520,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:56, endln:6122:68 |vpiParent: - \_operation: , line:6122:38, endln:6122:71 + \_operation: , line:6122:56, endln:6122:70 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_y_dim), line:6122:56, endln:6122:66 @@ -126573,12 +126583,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:92, endln:6122:106 |vpiParent: - \_sys_func_call: ($clog2), line:6122:83, endln:6122:126 + \_operation: , line:6122:91, endln:6122:124 |vpiOpType:24 |vpiOperand: \_operation: , line:6122:92, endln:6122:104 |vpiParent: - \_sys_func_call: ($clog2), line:6122:83, endln:6122:126 + \_operation: , line:6122:92, endln:6122:106 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_x_dim), line:6122:92, endln:6122:102 @@ -126621,7 +126631,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6122:109, endln:6122:121 |vpiParent: - \_operation: , line:6122:91, endln:6122:124 + \_operation: , line:6122:109, endln:6122:123 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_y_dim), line:6122:109, endln:6122:119 @@ -126729,7 +126739,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:56, endln:6123:68 |vpiParent: - \_operation: , line:6123:38, endln:6123:71 + \_operation: , line:6123:56, endln:6123:70 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_y_dim), line:6123:56, endln:6123:66 @@ -126792,12 +126802,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:92, endln:6123:106 |vpiParent: - \_sys_func_call: ($clog2), line:6123:83, endln:6123:126 + \_operation: , line:6123:91, endln:6123:124 |vpiOpType:24 |vpiOperand: \_operation: , line:6123:92, endln:6123:104 |vpiParent: - \_sys_func_call: ($clog2), line:6123:83, endln:6123:126 + \_operation: , line:6123:92, endln:6123:106 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_x_dim), line:6123:92, endln:6123:102 @@ -126840,7 +126850,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6123:109, endln:6123:121 |vpiParent: - \_operation: , line:6123:91, endln:6123:124 + \_operation: , line:6123:109, endln:6123:123 |vpiOpType:25 |vpiOperand: \_hier_path: (proc_param_lp.cc_y_dim), line:6123:109, endln:6123:119 @@ -127515,7 +127525,7 @@ design: (work@testbench) |vpiRhs: \_operation: , line:6160:46, endln:6162:130 |vpiParent: - \_operation: , line:6164:48, endln:6164:64 + \_operation: , line:6387:24, endln:6387:40 |vpiOpType:32 |vpiOperand: \_operation: , line:6160:47, endln:6161:130 @@ -127547,7 +127557,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6161:56, endln:6161:89 |vpiParent: - \_operation: , line:6160:47, endln:6161:130 + \_operation: , line:6161:55, endln:6161:128 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_assoc), line:6161:57, endln:6161:71 @@ -127642,7 +127652,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6162:56, endln:6162:89 |vpiParent: - \_operation: , line:6160:46, endln:6162:130 + \_operation: , line:6162:55, endln:6162:128 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_assoc), line:6162:57, endln:6162:71 @@ -127792,7 +127802,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6166:56, endln:6166:87 |vpiParent: - \_operation: , line:6165:47, endln:6166:126 + \_operation: , line:6166:55, endln:6166:124 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_sets), line:6166:57, endln:6166:70 @@ -127887,7 +127897,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6167:56, endln:6167:87 |vpiParent: - \_operation: , line:6165:46, endln:6167:126 + \_operation: , line:6167:55, endln:6167:124 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_sets), line:6167:57, endln:6167:70 @@ -128037,7 +128047,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6172:56, endln:6173:77 |vpiParent: - \_operation: , line:6171:48, endln:6175:2 + \_operation: , line:6172:55, endln:6174:77 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_block_width), line:6172:57, endln:6172:77 @@ -128132,7 +128142,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6176:56, endln:6177:77 |vpiParent: - \_operation: , line:6171:47, endln:6179:2 + \_operation: , line:6176:55, endln:6178:77 |vpiOpType:18 |vpiOperand: \_hier_path: (proc_param_lp.icache_block_width), line:6176:57, endln:6176:77 @@ -128614,7 +128624,7 @@ design: (work@testbench) |vpiRhs: \_operation: , line:6202:43, endln:6202:135 |vpiParent: - \_operation: , line:6208:11, endln:6208:56 + \_operation: , line:6209:11, endln:6209:56 |vpiOpType:32 |vpiOperand: \_operation: , line:6202:44, endln:6202:83 @@ -128723,12 +128733,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6202:99, endln:6202:131 |vpiParent: - \_sys_func_call: ($clog2), line:6202:91, endln:6202:135 + \_operation: , line:6202:99, endln:6202:133 |vpiOpType:24 |vpiOperand: \_operation: , line:6202:99, endln:6202:120 |vpiParent: - \_sys_func_call: ($clog2), line:6202:91, endln:6202:135 + \_operation: , line:6202:99, endln:6202:131 |vpiOpType:24 |vpiOperand: \_hier_path: (proc_param_lp.ic_y_dim), line:6202:99, endln:6202:109 @@ -128799,7 +128809,7 @@ design: (work@testbench) |vpiRhs: \_operation: , line:6203:43, endln:6203:139 |vpiParent: - \_operation: , line:6208:11, endln:6208:56 + \_operation: , line:6209:11, endln:6209:56 |vpiOpType:32 |vpiOperand: \_operation: , line:6203:44, endln:6203:85 @@ -128908,12 +128918,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6203:101, endln:6203:135 |vpiParent: - \_sys_func_call: ($clog2), line:6203:93, endln:6203:139 + \_operation: , line:6203:101, endln:6203:137 |vpiOpType:24 |vpiOperand: \_operation: , line:6203:101, endln:6203:123 |vpiParent: - \_sys_func_call: ($clog2), line:6203:93, endln:6203:139 + \_operation: , line:6203:101, endln:6203:135 |vpiOpType:24 |vpiOperand: \_hier_path: (proc_param_lp.sac_x_dim), line:6203:101, endln:6203:112 @@ -129707,7 +129717,7 @@ design: (work@testbench) |vpiRhs: \_operation: , line:6217:46, endln:6217:138 |vpiParent: - \_operation: , line:6224:11, endln:6224:56 + \_operation: , line:6225:11, endln:6225:56 |vpiOpType:32 |vpiOperand: \_operation: , line:6217:47, endln:6217:86 @@ -129816,12 +129826,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6217:102, endln:6217:134 |vpiParent: - \_sys_func_call: ($clog2), line:6217:94, endln:6217:138 + \_operation: , line:6217:102, endln:6217:136 |vpiOpType:24 |vpiOperand: \_operation: , line:6217:102, endln:6217:123 |vpiParent: - \_sys_func_call: ($clog2), line:6217:94, endln:6217:138 + \_operation: , line:6217:102, endln:6217:134 |vpiOpType:24 |vpiOperand: \_hier_path: (proc_param_lp.ic_y_dim), line:6217:102, endln:6217:112 @@ -130845,17 +130855,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6259:10, endln:6265:18 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6259:9, endln:6271:18 |vpiOpType:18 |vpiOperand: \_operation: , line:6260:4, endln:6260:63 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6259:10, endln:6265:18 |vpiOpType:24 |vpiOperand: \_operation: , line:6260:4, endln:6260:33 |vpiParent: - \_operation: , line:6259:4, endln:6271:19 + \_operation: , line:6260:4, endln:6260:63 |vpiOpType:24 |vpiOperand: \_hier_path: (proc_param_lp.vaddr_width), line:6260:4, endln:6260:17 @@ -130937,7 +130947,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6266:4, endln:6266:33 |vpiParent: - \_operation: , line:6259:9, endln:6271:18 + \_operation: , line:6266:4, endln:6266:63 |vpiOpType:24 |vpiOperand: \_hier_path: (proc_param_lp.vaddr_width), line:6266:4, endln:6266:17 @@ -131071,22 +131081,22 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6281:8, endln:6329:16 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6281:7, endln:6377:16 |vpiOpType:18 |vpiOperand: \_operation: , line:6282:4, endln:6283:75 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6281:8, endln:6329:16 |vpiOpType:24 |vpiOperand: \_operation: , line:6282:4, endln:6283:71 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6282:4, endln:6283:75 |vpiOpType:24 |vpiOperand: \_operation: , line:6282:4, endln:6283:33 |vpiParent: - \_operation: , line:6281:4, endln:6377:17 + \_operation: , line:6282:4, endln:6283:71 |vpiOpType:24 |vpiOperand: \_constant: , line:6282:4, endln:6282:43 @@ -131137,12 +131147,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6285:20, endln:6306:26 |vpiParent: - \_operation: , line:6281:8, endln:6329:16 + \_operation: , line:6285:19, endln:6327:26 |vpiOpType:18 |vpiOperand: \_operation: , line:6286:4, endln:6286:33 |vpiParent: - \_operation: , line:6281:8, endln:6329:16 + \_operation: , line:6285:20, endln:6306:26 |vpiOpType:24 |vpiOperand: \_constant: , line:6286:4, endln:6286:5 @@ -131177,17 +131187,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6288:30, endln:6296:36 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6288:29, endln:6304:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6290:4, endln:6290:47 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6288:30, endln:6296:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6290:4, endln:6290:43 |vpiParent: - \_operation: , line:6285:20, endln:6306:26 + \_operation: , line:6290:4, endln:6290:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6290:4, endln:6290:17 @@ -131260,7 +131270,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6298:4, endln:6298:43 |vpiParent: - \_operation: , line:6288:29, endln:6304:36 + \_operation: , line:6298:4, endln:6298:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6298:4, endln:6298:17 @@ -131363,17 +131373,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6309:32, endln:6317:36 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6309:31, endln:6325:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6311:4, endln:6311:47 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6309:32, endln:6317:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6311:4, endln:6311:43 |vpiParent: - \_operation: , line:6285:19, endln:6327:26 + \_operation: , line:6311:4, endln:6311:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6311:4, endln:6311:17 @@ -131446,7 +131456,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6319:4, endln:6319:43 |vpiParent: - \_operation: , line:6309:31, endln:6325:36 + \_operation: , line:6319:4, endln:6319:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6319:4, endln:6319:17 @@ -131519,12 +131529,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6330:4, endln:6331:71 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6330:4, endln:6331:75 |vpiOpType:24 |vpiOperand: \_operation: , line:6330:4, endln:6331:33 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6330:4, endln:6331:71 |vpiOpType:24 |vpiOperand: \_constant: , line:6330:4, endln:6330:43 @@ -131575,12 +131585,12 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6333:22, endln:6354:26 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6333:21, endln:6375:26 |vpiOpType:18 |vpiOperand: \_operation: , line:6334:4, endln:6334:33 |vpiParent: - \_operation: , line:6281:7, endln:6377:16 + \_operation: , line:6333:22, endln:6354:26 |vpiOpType:24 |vpiOperand: \_constant: , line:6334:4, endln:6334:5 @@ -131615,17 +131625,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6336:30, endln:6344:36 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6336:29, endln:6352:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6338:4, endln:6338:47 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6336:30, endln:6344:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6338:4, endln:6338:43 |vpiParent: - \_operation: , line:6333:22, endln:6354:26 + \_operation: , line:6338:4, endln:6338:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6338:4, endln:6338:17 @@ -131698,7 +131708,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6346:4, endln:6346:43 |vpiParent: - \_operation: , line:6336:29, endln:6352:36 + \_operation: , line:6346:4, endln:6346:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6346:4, endln:6346:17 @@ -131801,17 +131811,17 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6357:32, endln:6365:36 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6357:31, endln:6373:36 |vpiOpType:18 |vpiOperand: \_operation: , line:6359:4, endln:6359:47 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6357:32, endln:6365:36 |vpiOpType:24 |vpiOperand: \_operation: , line:6359:4, endln:6359:43 |vpiParent: - \_operation: , line:6333:21, endln:6375:26 + \_operation: , line:6359:4, endln:6359:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6359:4, endln:6359:17 @@ -131884,7 +131894,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6367:4, endln:6367:43 |vpiParent: - \_operation: , line:6357:31, endln:6373:36 + \_operation: , line:6367:4, endln:6367:47 |vpiOpType:11 |vpiOperand: \_hier_path: (proc_param_lp.paddr_width), line:6367:4, endln:6367:17 @@ -131958,7 +131968,7 @@ design: (work@testbench) |vpiRhs: \_operation: , line:6387:4, endln:6387:93 |vpiParent: - \_operation: , line:6392:4, endln:6392:95 + \_operation: , line:6398:4, endln:6398:95 |vpiOpType:24 |vpiOperand: \_operation: , line:6387:4, endln:6387:70 @@ -131988,7 +131998,7 @@ design: (work@testbench) |vpiOperand: \_operation: , line:6387:24, endln:6387:40 |vpiParent: - \_operation: , line:6387:4, endln:6387:70 + \_operation: , line:6387:23, endln:6387:69 |vpiOpType:14 |vpiOperand: \_operation: , line:6160:46, endln:6162:130 diff --git a/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log b/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log index 6cdb91515a..7000748bcd 100644 --- a/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log +++ b/tests/BlackParrotMuteErrors/BlackParrotMuteErrors.log @@ -6682,7 +6682,7 @@ param_assign 3583 parameter 4817 range 2785 ref_module 5 -ref_obj 298 +ref_obj 270 ref_var 3 return_stmt 8 string_typespec 1104 @@ -6736,7 +6736,7 @@ param_assign 6859 parameter 7129 range 4465 ref_module 5 -ref_obj 1000 +ref_obj 968 ref_var 5 return_stmt 29 string_typespec 1360 @@ -16462,7 +16462,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (otp_ctrl_pkg::otp_ctrl_pkg::otp_keymgr_key_t::KeyMgrKeyWidth), line:641:12, endln:641:26 |vpiParent: - \_struct_typespec: (otp_ctrl_pkg::otp_keymgr_key_t), line:639:11, endln:639:17 + \_operation: , line:641:12, endln:641:28 |vpiName:KeyMgrKeyWidth |vpiFullName:otp_ctrl_pkg::otp_ctrl_pkg::otp_keymgr_key_t::KeyMgrKeyWidth |vpiActual: @@ -16511,7 +16511,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (otp_ctrl_pkg::otp_ctrl_pkg::otp_keymgr_key_t::KeyMgrKeyWidth), line:642:12, endln:642:26 |vpiParent: - \_struct_typespec: (otp_ctrl_pkg::otp_keymgr_key_t), line:639:11, endln:639:17 + \_operation: , line:642:12, endln:642:28 |vpiName:KeyMgrKeyWidth |vpiFullName:otp_ctrl_pkg::otp_ctrl_pkg::otp_keymgr_key_t::KeyMgrKeyWidth |vpiActual: @@ -16606,7 +16606,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (otp_ctrl_pkg::otp_ctrl_pkg::flash_otp_key_rsp_t::FlashKeyWidth), line:667:12, endln:667:25 |vpiParent: - \_struct_typespec: (otp_ctrl_pkg::flash_otp_key_rsp_t), line:664:11, endln:664:17 + \_operation: , line:667:12, endln:667:27 |vpiName:FlashKeyWidth |vpiFullName:otp_ctrl_pkg::otp_ctrl_pkg::flash_otp_key_rsp_t::FlashKeyWidth |vpiActual: @@ -22733,7 +22733,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (OtpWidth), line:481:62, endln:481:70 |vpiParent: - \_sys_func_call: ($clog2), line:481:55, endln:481:73 + \_operation: , line:481:62, endln:481:72 |vpiName:OtpWidth |vpiActual: \_parameter: (otp_ctrl_pkg::OtpWidth), line:480:17, endln:480:25 @@ -24320,7 +24320,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (otp_ctrl_pkg::otp_ctrl_pkg::otp_ast_req_t::OtpPwrSeqWidth), line:715:12, endln:715:26 |vpiParent: - \_struct_typespec: (otp_ctrl_pkg::otp_ast_req_t), line:714:11, endln:714:17 + \_operation: , line:715:12, endln:715:28 |vpiName:OtpPwrSeqWidth |vpiFullName:otp_ctrl_pkg::otp_ctrl_pkg::otp_ast_req_t::OtpPwrSeqWidth |vpiActual: @@ -24377,7 +24377,7 @@ design: (work@otp_ctrl) |vpiOperand: \_ref_obj: (otp_ctrl_pkg::otp_ctrl_pkg::otp_ast_rsp_t::OtpPwrSeqWidth), line:719:12, endln:719:26 |vpiParent: - \_struct_typespec: (otp_ctrl_pkg::otp_ast_rsp_t), line:718:11, endln:718:17 + \_operation: , line:719:12, endln:719:28 |vpiName:OtpPwrSeqWidth |vpiFullName:otp_ctrl_pkg::otp_ctrl_pkg::otp_ast_rsp_t::OtpPwrSeqWidth |vpiActual: @@ -121074,13 +121074,11 @@ design: (work@otp_ctrl) \_operation: , line:884:5, endln:884:36 |vpiName:PartInfo[k].variant |vpiActual: - \_bit_select: (PartInfo), line:884:5, endln:884:13 + \_bit_select: (PartInfo[k]), line:884:5, endln:884:13 |vpiParent: - \_ref_obj: (PartInfo[k]) - |vpiParent: - \_hier_path: (PartInfo[k].variant), line:884:5, endln:884:13 - |vpiName:PartInfo[k] + \_hier_path: (PartInfo[k].variant), line:884:5, endln:884:13 |vpiName:PartInfo + |vpiFullName:PartInfo[k] |vpiIndex: \_ref_obj: (k), line:884:14, endln:884:15 |vpiName:k @@ -160003,7 +160001,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:798:19, endln:798:29 |vpiParent: - \_tagged_pattern: , line:798:19, endln:798:29 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:0 |vpiSize:2 |INT:0 @@ -160143,7 +160141,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:809:19, endln:809:29 |vpiParent: - \_tagged_pattern: , line:809:19, endln:809:29 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:0 |vpiSize:2 |INT:0 @@ -160285,7 +160283,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:820:19, endln:820:27 |vpiParent: - \_tagged_pattern: , line:820:19, endln:820:27 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:1 |vpiSize:2 |INT:1 @@ -160302,7 +160300,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:821:19, endln:821:27 |vpiParent: - \_tagged_pattern: , line:821:19, endln:821:27 + \_operation: , line:887:37, endln:887:57 |vpiDecompile:11'd1536 |vpiSize:11 |DEC:1536 @@ -160319,7 +160317,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:822:19, endln:822:22 |vpiParent: - \_tagged_pattern: , line:822:19, endln:822:22 + \_operation: , line:887:61, endln:887:79 |vpiDecompile:208 |vpiSize:64 |UINT:208 @@ -160427,7 +160425,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:831:19, endln:831:27 |vpiParent: - \_tagged_pattern: , line:831:19, endln:831:27 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:1 |vpiSize:2 |INT:1 @@ -160444,7 +160442,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:832:19, endln:832:27 |vpiParent: - \_tagged_pattern: , line:832:19, endln:832:27 + \_operation: , line:887:37, endln:887:57 |vpiDecompile:11'd1744 |vpiSize:11 |DEC:1744 @@ -160461,7 +160459,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:833:19, endln:833:21 |vpiParent: - \_tagged_pattern: , line:833:19, endln:833:21 + \_operation: , line:887:61, endln:887:79 |vpiDecompile:40 |vpiSize:64 |UINT:40 @@ -160570,7 +160568,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:842:19, endln:842:27 |vpiParent: - \_tagged_pattern: , line:842:19, endln:842:27 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:1 |vpiSize:2 |INT:1 @@ -160587,7 +160585,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:843:19, endln:843:27 |vpiParent: - \_tagged_pattern: , line:843:19, endln:843:27 + \_operation: , line:887:37, endln:887:57 |vpiDecompile:11'd1784 |vpiSize:11 |DEC:1784 @@ -160604,7 +160602,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:844:19, endln:844:21 |vpiParent: - \_tagged_pattern: , line:844:19, endln:844:21 + \_operation: , line:887:61, endln:887:79 |vpiDecompile:88 |vpiSize:64 |UINT:88 @@ -160713,7 +160711,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:853:19, endln:853:27 |vpiParent: - \_tagged_pattern: , line:853:19, endln:853:27 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:1 |vpiSize:2 |INT:1 @@ -160730,7 +160728,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:854:19, endln:854:27 |vpiParent: - \_tagged_pattern: , line:854:19, endln:854:27 + \_operation: , line:887:37, endln:887:57 |vpiDecompile:11'd1872 |vpiSize:11 |DEC:1872 @@ -160747,7 +160745,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:855:19, endln:855:22 |vpiParent: - \_tagged_pattern: , line:855:19, endln:855:22 + \_operation: , line:887:61, endln:887:79 |vpiDecompile:120 |vpiSize:64 |UINT:120 @@ -160854,7 +160852,7 @@ design: (work@otp_ctrl) |vpiPattern: \_constant: , line:864:19, endln:864:28 |vpiParent: - \_tagged_pattern: , line:864:19, endln:864:28 + \_operation: , line:884:5, endln:884:36 |vpiDecompile:2 |vpiSize:2 |INT:2 @@ -165443,25 +165441,19 @@ design: (work@otp_ctrl) |vpiRhs: \_bit_select: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiParent: - \_ref_obj: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo) - |vpiParent: - \_param_assign: , line:774:37, endln:774:59 - |vpiName:PartInfo - |vpiFullName:work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 + \_param_assign: , line:774:37, endln:774:59 |vpiName:PartInfo |vpiFullName:work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo + |vpiActual: + \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiIndex: - \_ref_obj: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo.k), line:886:24, endln:886:25 + \_ref_obj: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.k), line:886:24, endln:886:25 |vpiParent: \_bit_select: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiName:k - |vpiFullName:work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.PartInfo.k + |vpiFullName:work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.k |vpiActual: \_parameter: (work@otp_ctrl.gen_partitions[2].k), line:882:0 - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiLhs: \_parameter: (work@otp_ctrl.gen_partitions[2].gen_buffered.u_part_buf.Info), line:774:37, endln:774:41 |vpiParamAssign: @@ -174767,25 +174759,19 @@ design: (work@otp_ctrl) |vpiRhs: \_bit_select: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiParent: - \_ref_obj: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo) - |vpiParent: - \_param_assign: , line:774:37, endln:774:59 - |vpiName:PartInfo - |vpiFullName:work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 + \_param_assign: , line:774:37, endln:774:59 |vpiName:PartInfo |vpiFullName:work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo + |vpiActual: + \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiIndex: - \_ref_obj: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo.k), line:886:24, endln:886:25 + \_ref_obj: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.k), line:886:24, endln:886:25 |vpiParent: \_bit_select: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiName:k - |vpiFullName:work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.PartInfo.k + |vpiFullName:work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.k |vpiActual: \_parameter: (work@otp_ctrl.gen_partitions[3].k), line:882:0 - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiLhs: \_parameter: (work@otp_ctrl.gen_partitions[3].gen_buffered.u_part_buf.Info), line:774:37, endln:774:41 |vpiParamAssign: @@ -184091,25 +184077,19 @@ design: (work@otp_ctrl) |vpiRhs: \_bit_select: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiParent: - \_ref_obj: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo) - |vpiParent: - \_param_assign: , line:774:37, endln:774:59 - |vpiName:PartInfo - |vpiFullName:work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 + \_param_assign: , line:774:37, endln:774:59 |vpiName:PartInfo |vpiFullName:work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo + |vpiActual: + \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiIndex: - \_ref_obj: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo.k), line:886:24, endln:886:25 + \_ref_obj: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.k), line:886:24, endln:886:25 |vpiParent: \_bit_select: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiName:k - |vpiFullName:work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.PartInfo.k + |vpiFullName:work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.k |vpiActual: \_parameter: (work@otp_ctrl.gen_partitions[4].k), line:882:0 - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiLhs: \_parameter: (work@otp_ctrl.gen_partitions[4].gen_buffered.u_part_buf.Info), line:774:37, endln:774:41 |vpiParamAssign: @@ -193415,25 +193395,19 @@ design: (work@otp_ctrl) |vpiRhs: \_bit_select: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiParent: - \_ref_obj: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo) - |vpiParent: - \_param_assign: , line:774:37, endln:774:59 - |vpiName:PartInfo - |vpiFullName:work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 + \_param_assign: , line:774:37, endln:774:59 |vpiName:PartInfo |vpiFullName:work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo + |vpiActual: + \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiIndex: - \_ref_obj: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo.k), line:886:24, endln:886:25 + \_ref_obj: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.k), line:886:24, endln:886:25 |vpiParent: \_bit_select: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo), line:886:15, endln:886:26 |vpiName:k - |vpiFullName:work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.PartInfo.k + |vpiFullName:work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.k |vpiActual: \_parameter: (work@otp_ctrl.gen_partitions[5].k), line:882:0 - |vpiActual: - \_parameter: (work@otp_ctrl.PartInfo), line:795:26, endln:795:34 |vpiLhs: \_parameter: (work@otp_ctrl.gen_partitions[5].gen_buffered.u_part_buf.Info), line:774:37, endln:774:41 |vpiParamAssign: diff --git a/tests/BlackParrotParam/BlackParrotParam.log b/tests/BlackParrotParam/BlackParrotParam.log index d938b3f9f3..6cfe7c132b 100644 --- a/tests/BlackParrotParam/BlackParrotParam.log +++ b/tests/BlackParrotParam/BlackParrotParam.log @@ -8902,7 +8902,7 @@ packed_array_typespec 41 param_assign 630 parameter 821 range 405 -ref_obj 513 +ref_obj 426 string_typespec 2972 struct_typespec 177 sys_func_call 10 @@ -8943,7 +8943,7 @@ packed_array_typespec 41 param_assign 630 parameter 821 range 405 -ref_obj 518 +ref_obj 431 string_typespec 2972 struct_typespec 177 sys_func_call 10 @@ -12183,7 +12183,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_imm12_width_gp), line:1991:12, endln:1991:31 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1991:12, endln:1991:33 |vpiName:rv64_imm12_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_imm12_width_gp |vpiActual: @@ -12232,7 +12232,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp), line:1992:12, endln:1992:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1992:12, endln:1992:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12281,7 +12281,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_funct3_width_gp), line:1993:12, endln:1993:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1993:12, endln:1993:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_funct3_width_gp |vpiActual: @@ -12330,7 +12330,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp), line:1994:12, endln:1994:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_itype_s), line:1989:11, endln:1989:17 + \_operation: , line:1994:12, endln:1994:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_itype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12387,7 +12387,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct7_width_gp), line:1982:12, endln:1982:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1982:12, endln:1982:34 |vpiName:rv64_funct7_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct7_width_gp |vpiActual: @@ -12436,7 +12436,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1983:12, endln:1983:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1983:12, endln:1983:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12485,7 +12485,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1984:12, endln:1984:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1984:12, endln:1984:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12534,7 +12534,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct3_width_gp), line:1985:12, endln:1985:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1985:12, endln:1985:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_funct3_width_gp |vpiActual: @@ -12583,7 +12583,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp), line:1986:12, endln:1986:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_rtype_s), line:1980:11, endln:1980:17 + \_operation: , line:1986:12, endln:1986:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_rtype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12689,7 +12689,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm11to5_width_gp), line:1999:12, endln:1999:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:1999:12, endln:1999:36 |vpiName:rv64_imm11to5_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm11to5_width_gp |vpiActual: @@ -12738,7 +12738,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp), line:2000:12, endln:2000:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2000:12, endln:2000:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12787,7 +12787,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp), line:2001:12, endln:2001:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2001:12, endln:2001:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_reg_addr_width_gp |vpiActual: @@ -12836,7 +12836,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_funct3_width_gp), line:2002:12, endln:2002:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2002:12, endln:2002:34 |vpiName:rv64_funct3_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_funct3_width_gp |vpiActual: @@ -12885,7 +12885,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm4to0_width_gp), line:2003:12, endln:2003:33 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_stype_s), line:1997:11, endln:1997:17 + \_operation: , line:2003:12, endln:2003:35 |vpiName:rv64_imm4to0_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_stype_s::rv64_imm4to0_width_gp |vpiActual: @@ -12952,7 +12952,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_imm20_width_gp), line:2008:12, endln:2008:31 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_utype_s), line:2006:11, endln:2006:17 + \_operation: , line:2008:12, endln:2008:33 |vpiName:rv64_imm20_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_imm20_width_gp |vpiActual: @@ -13001,7 +13001,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_reg_addr_width_gp), line:2009:12, endln:2009:34 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_utype_s), line:2006:11, endln:2006:17 + \_operation: , line:2009:12, endln:2009:36 |vpiName:rv64_reg_addr_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_utype_s::rv64_reg_addr_width_gp |vpiActual: @@ -13060,7 +13060,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_s::rv64_opcode_width_gp), line:2021:12, endln:2021:32 |vpiParent: - \_struct_typespec: (bp_common_rv64_pkg::rv64_instr_s), line:2012:11, endln:2012:17 + \_operation: , line:2021:12, endln:2021:34 |vpiName:rv64_opcode_width_gp |vpiFullName:bp_common_rv64_pkg::bp_common_rv64_pkg::rv64_instr_s::rv64_opcode_width_gp |vpiActual: @@ -25055,12 +25055,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:3171:12, endln:3171:56 |vpiParent: - \_struct_typespec: (bp_be_pkg::bp_sv39_pte_s), line:3169:11, endln:3169:17 + \_operation: , line:3171:12, endln:3171:58 |vpiOpType:11 |vpiOperand: \_operation: , line:3171:12, endln:3171:35 |vpiParent: - \_struct_typespec: (bp_be_pkg::bp_sv39_pte_s), line:3169:11, endln:3169:17 + \_operation: , line:3171:12, endln:3171:56 |vpiOpType:11 |vpiOperand: \_constant: , line:3171:12, endln:3171:32 @@ -59326,16 +59326,12 @@ design: (work@bp_be_ptw) \_module_inst: work@bp_be_ptw (work@bp_be_ptw), file:${SURELOG_DIR}/tests/BlackParrotParam/dut.sv, line:4371:1, endln:4628:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:4379:48, endln:4379:66 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp |vpiIndex: - \_ref_obj: (all_cfgs_gp.cfg_p), line:4379:60, endln:4379:65 + \_ref_obj: (cfg_p), line:4379:60, endln:4379:65 |vpiParent: \_bit_select: (all_cfgs_gp), line:4379:48, endln:4379:66 |vpiName:cfg_p - |vpiFullName:all_cfgs_gp.cfg_p |vpiLhs: \_parameter: (work@bp_be_ptw.proc_param_lp), line:4379:32, endln:4379:45 |vpiParamAssign: @@ -60491,22 +60487,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4455:10, endln:4461:18 |vpiParent: - \_operation: , line:4455:4, endln:4467:19 + \_operation: , line:4455:9, endln:4467:18 |vpiOpType:18 |vpiOperand: \_operation: , line:4456:4, endln:4456:67 |vpiParent: - \_operation: , line:4455:4, endln:4467:19 + \_operation: , line:4455:10, endln:4461:18 |vpiOpType:24 |vpiOperand: \_operation: , line:4456:4, endln:4456:37 |vpiParent: - \_operation: , line:4455:4, endln:4467:19 + \_operation: , line:4456:4, endln:4456:67 |vpiOpType:24 |vpiOperand: \_ref_obj: (vaddr_width_p), line:4456:4, endln:4456:17 |vpiParent: - \_operation: , line:4455:4, endln:4467:19 + \_operation: , line:4456:4, endln:4456:37 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:4456:20, endln:4456:37 @@ -60533,7 +60529,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (vaddr_width_p), line:4459:4, endln:4459:17 |vpiParent: - \_operation: , line:4455:10, endln:4461:18 + \_operation: , line:4459:4, endln:4459:49 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:4459:20, endln:4459:49 @@ -60551,12 +60547,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4462:4, endln:4462:37 |vpiParent: - \_operation: , line:4455:9, endln:4467:18 + \_operation: , line:4462:4, endln:4462:67 |vpiOpType:24 |vpiOperand: \_ref_obj: (vaddr_width_p), line:4462:4, endln:4462:17 |vpiParent: - \_operation: , line:4455:9, endln:4467:18 + \_operation: , line:4462:4, endln:4462:37 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:4462:20, endln:4462:37 @@ -60583,7 +60579,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (vaddr_width_p), line:4465:4, endln:4465:17 |vpiParent: - \_operation: , line:4455:9, endln:4467:18 + \_operation: , line:4465:4, endln:4465:49 |vpiName:vaddr_width_p |vpiOperand: \_constant: , line:4465:20, endln:4465:49 @@ -60641,22 +60637,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4478:8, endln:4537:16 |vpiParent: - \_operation: , line:4478:4, endln:4596:17 + \_operation: , line:4478:7, endln:4596:16 |vpiOpType:18 |vpiOperand: \_operation: , line:4479:4, endln:4481:91 |vpiParent: - \_operation: , line:4478:4, endln:4596:17 + \_operation: , line:4478:8, endln:4537:16 |vpiOpType:24 |vpiOperand: \_operation: , line:4479:4, endln:4481:87 |vpiParent: - \_operation: , line:4478:4, endln:4596:17 + \_operation: , line:4479:4, endln:4481:91 |vpiOpType:24 |vpiOperand: \_operation: , line:4479:4, endln:4480:33 |vpiParent: - \_operation: , line:4478:4, endln:4596:17 + \_operation: , line:4479:4, endln:4481:87 |vpiOpType:24 |vpiOperand: \_constant: , line:4479:4, endln:4479:43 @@ -60695,12 +60691,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4483:20, endln:4509:26 |vpiParent: - \_operation: , line:4478:8, endln:4537:16 + \_operation: , line:4483:19, endln:4535:26 |vpiOpType:18 |vpiOperand: \_ref_obj: (branch_metadata_fwd_width_p), line:4484:4, endln:4484:31 |vpiParent: - \_operation: , line:4478:8, endln:4537:16 + \_operation: , line:4483:20, endln:4509:26 |vpiName:branch_metadata_fwd_width_p |vpiOperand: \_operation: , line:4487:29, endln:4507:36 @@ -60710,22 +60706,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4487:30, endln:4497:36 |vpiParent: - \_operation: , line:4483:20, endln:4509:26 + \_operation: , line:4487:29, endln:4507:36 |vpiOpType:18 |vpiOperand: \_operation: , line:4489:4, endln:4490:79 |vpiParent: - \_operation: , line:4483:20, endln:4509:26 + \_operation: , line:4487:30, endln:4497:36 |vpiOpType:24 |vpiOperand: \_operation: , line:4489:4, endln:4490:75 |vpiParent: - \_operation: , line:4483:20, endln:4509:26 + \_operation: , line:4489:4, endln:4490:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4489:4, endln:4489:17 |vpiParent: - \_operation: , line:4483:20, endln:4509:26 + \_operation: , line:4489:4, endln:4490:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4490:52, endln:4490:75 @@ -60755,7 +60751,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4494:4, endln:4494:16 |vpiParent: - \_operation: , line:4487:30, endln:4497:36 + \_operation: , line:4494:4, endln:4495:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4495:52, endln:4495:53 @@ -60773,12 +60769,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4499:4, endln:4500:75 |vpiParent: - \_operation: , line:4487:29, endln:4507:36 + \_operation: , line:4499:4, endln:4500:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4499:4, endln:4499:17 |vpiParent: - \_operation: , line:4487:29, endln:4507:36 + \_operation: , line:4499:4, endln:4500:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4500:52, endln:4500:75 @@ -60808,7 +60804,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4504:4, endln:4504:16 |vpiParent: - \_operation: , line:4487:29, endln:4507:36 + \_operation: , line:4504:4, endln:4505:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4505:52, endln:4505:53 @@ -60831,22 +60827,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4513:32, endln:4523:36 |vpiParent: - \_operation: , line:4483:19, endln:4535:26 + \_operation: , line:4513:31, endln:4533:36 |vpiOpType:18 |vpiOperand: \_operation: , line:4515:4, endln:4516:79 |vpiParent: - \_operation: , line:4483:19, endln:4535:26 + \_operation: , line:4513:32, endln:4523:36 |vpiOpType:24 |vpiOperand: \_operation: , line:4515:4, endln:4516:75 |vpiParent: - \_operation: , line:4483:19, endln:4535:26 + \_operation: , line:4515:4, endln:4516:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4515:4, endln:4515:17 |vpiParent: - \_operation: , line:4483:19, endln:4535:26 + \_operation: , line:4515:4, endln:4516:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4516:52, endln:4516:75 @@ -60876,7 +60872,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4520:4, endln:4520:16 |vpiParent: - \_operation: , line:4513:32, endln:4523:36 + \_operation: , line:4520:4, endln:4521:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4521:52, endln:4521:53 @@ -60894,12 +60890,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4525:4, endln:4526:75 |vpiParent: - \_operation: , line:4513:31, endln:4533:36 + \_operation: , line:4525:4, endln:4526:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4525:4, endln:4525:17 |vpiParent: - \_operation: , line:4513:31, endln:4533:36 + \_operation: , line:4525:4, endln:4526:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4526:52, endln:4526:75 @@ -60929,7 +60925,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4530:4, endln:4530:16 |vpiParent: - \_operation: , line:4513:31, endln:4533:36 + \_operation: , line:4530:4, endln:4531:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4531:52, endln:4531:53 @@ -60947,12 +60943,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4538:4, endln:4540:87 |vpiParent: - \_operation: , line:4478:7, endln:4596:16 + \_operation: , line:4538:4, endln:4540:91 |vpiOpType:24 |vpiOperand: \_operation: , line:4538:4, endln:4539:33 |vpiParent: - \_operation: , line:4478:7, endln:4596:16 + \_operation: , line:4538:4, endln:4540:87 |vpiOpType:24 |vpiOperand: \_constant: , line:4538:4, endln:4538:43 @@ -60991,12 +60987,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4542:22, endln:4568:26 |vpiParent: - \_operation: , line:4478:7, endln:4596:16 + \_operation: , line:4542:21, endln:4594:26 |vpiOpType:18 |vpiOperand: \_ref_obj: (branch_metadata_fwd_width_p), line:4543:4, endln:4543:31 |vpiParent: - \_operation: , line:4478:7, endln:4596:16 + \_operation: , line:4542:22, endln:4568:26 |vpiName:branch_metadata_fwd_width_p |vpiOperand: \_operation: , line:4546:29, endln:4566:36 @@ -61006,22 +61002,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4546:30, endln:4556:36 |vpiParent: - \_operation: , line:4542:22, endln:4568:26 + \_operation: , line:4546:29, endln:4566:36 |vpiOpType:18 |vpiOperand: \_operation: , line:4548:4, endln:4549:79 |vpiParent: - \_operation: , line:4542:22, endln:4568:26 + \_operation: , line:4546:30, endln:4556:36 |vpiOpType:24 |vpiOperand: \_operation: , line:4548:4, endln:4549:75 |vpiParent: - \_operation: , line:4542:22, endln:4568:26 + \_operation: , line:4548:4, endln:4549:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4548:4, endln:4548:17 |vpiParent: - \_operation: , line:4542:22, endln:4568:26 + \_operation: , line:4548:4, endln:4549:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4549:52, endln:4549:75 @@ -61051,7 +61047,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4553:4, endln:4553:16 |vpiParent: - \_operation: , line:4546:30, endln:4556:36 + \_operation: , line:4553:4, endln:4554:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4554:52, endln:4554:53 @@ -61069,12 +61065,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4558:4, endln:4559:75 |vpiParent: - \_operation: , line:4546:29, endln:4566:36 + \_operation: , line:4558:4, endln:4559:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4558:4, endln:4558:17 |vpiParent: - \_operation: , line:4546:29, endln:4566:36 + \_operation: , line:4558:4, endln:4559:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4559:52, endln:4559:75 @@ -61104,7 +61100,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4563:4, endln:4563:16 |vpiParent: - \_operation: , line:4546:29, endln:4566:36 + \_operation: , line:4563:4, endln:4564:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4564:52, endln:4564:53 @@ -61127,22 +61123,22 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4572:32, endln:4582:36 |vpiParent: - \_operation: , line:4542:21, endln:4594:26 + \_operation: , line:4572:31, endln:4592:36 |vpiOpType:18 |vpiOperand: \_operation: , line:4574:4, endln:4575:79 |vpiParent: - \_operation: , line:4542:21, endln:4594:26 + \_operation: , line:4572:32, endln:4582:36 |vpiOpType:24 |vpiOperand: \_operation: , line:4574:4, endln:4575:75 |vpiParent: - \_operation: , line:4542:21, endln:4594:26 + \_operation: , line:4574:4, endln:4575:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4574:4, endln:4574:17 |vpiParent: - \_operation: , line:4542:21, endln:4594:26 + \_operation: , line:4574:4, endln:4575:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4575:52, endln:4575:75 @@ -61172,7 +61168,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4579:4, endln:4579:16 |vpiParent: - \_operation: , line:4572:32, endln:4582:36 + \_operation: , line:4579:4, endln:4580:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4580:52, endln:4580:53 @@ -61190,12 +61186,12 @@ design: (work@bp_be_ptw) |vpiOperand: \_operation: , line:4584:4, endln:4585:75 |vpiParent: - \_operation: , line:4572:31, endln:4592:36 + \_operation: , line:4584:4, endln:4585:79 |vpiOpType:11 |vpiOperand: \_ref_obj: (paddr_width_p), line:4584:4, endln:4584:17 |vpiParent: - \_operation: , line:4572:31, endln:4592:36 + \_operation: , line:4584:4, endln:4585:75 |vpiName:paddr_width_p |vpiOperand: \_constant: , line:4585:52, endln:4585:75 @@ -61225,7 +61221,7 @@ design: (work@bp_be_ptw) |vpiOperand: \_ref_obj: (asid_width_p), line:4589:4, endln:4589:16 |vpiParent: - \_operation: , line:4572:31, endln:4592:36 + \_operation: , line:4589:4, endln:4590:53 |vpiName:asid_width_p |vpiOperand: \_constant: , line:4590:52, endln:4590:53 @@ -70176,10 +70172,9 @@ design: (work@bp_be_ptw) \_module_inst: work@bp_be_ptw (work@bp_be_ptw), file:${SURELOG_DIR}/tests/BlackParrotParam/dut.sv, line:4371:1, endln:4628:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:4379:48, endln:4379:66 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp + |vpiActual: + \_parameter: (work@bp_be_ptw.all_cfgs_gp), line:2516:44, endln:2516:55 |vpiIndex: \_constant: , line:4379:60, endln:4379:65 |vpiParent: diff --git a/tests/BlackParrotSkipParam/BlackParrotSkipParam.log b/tests/BlackParrotSkipParam/BlackParrotSkipParam.log index d350d77e92..5584af6fa2 100644 --- a/tests/BlackParrotSkipParam/BlackParrotSkipParam.log +++ b/tests/BlackParrotSkipParam/BlackParrotSkipParam.log @@ -947,7 +947,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (max_val_p), line:4:39, endln:4:48 |vpiParent: - \_sys_func_call: ($clog2), line:4:32, endln:4:51 + \_operation: , line:4:39, endln:4:50 |vpiName:max_val_p |vpiOperand: \_constant: , line:4:49, endln:4:50 diff --git a/tests/BlackParrotStructParam/BlackParrotStructParam.log b/tests/BlackParrotStructParam/BlackParrotStructParam.log index 6f770b3348..64fc9c4f86 100644 --- a/tests/BlackParrotStructParam/BlackParrotStructParam.log +++ b/tests/BlackParrotStructParam/BlackParrotStructParam.log @@ -691,7 +691,7 @@ param_assign 48 parameter 59 range 14 ref_module 2 -ref_obj 94 +ref_obj 89 string_typespec 50 struct_typespec 54 tagged_pattern 50 @@ -733,7 +733,7 @@ param_assign 48 parameter 59 range 14 ref_module 2 -ref_obj 94 +ref_obj 89 string_typespec 50 struct_typespec 54 tagged_pattern 50 @@ -2413,16 +2413,12 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BlackParrotStructParam/dut.sv, line:55:1, endln:66:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:57:46, endln:57:70 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp |vpiIndex: - \_ref_obj: (all_cfgs_gp.bp_params_p), line:57:58, endln:57:69 + \_ref_obj: (bp_params_p), line:57:58, endln:57:69 |vpiParent: \_bit_select: (all_cfgs_gp), line:57:46, endln:57:70 |vpiName:bp_params_p - |vpiFullName:all_cfgs_gp.bp_params_p |vpiLhs: \_parameter: (work@top.proc_param_lp), line:57:30, endln:57:43 |vpiParamAssign: @@ -2882,10 +2878,9 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/BlackParrotStructParam/dut.sv, line:55:1, endln:66:10 |vpiRhs: \_bit_select: (all_cfgs_gp), line:57:46, endln:57:70 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp + |vpiActual: + \_parameter: (work@top.all_cfgs_gp), line:42:41, endln:42:52 |vpiIndex: \_constant: , line:57:58, endln:57:69 |vpiParent: diff --git a/tests/CarryTrans/CarryTrans.log b/tests/CarryTrans/CarryTrans.log index 3398a17650..e8f7d3e799 100644 --- a/tests/CarryTrans/CarryTrans.log +++ b/tests/CarryTrans/CarryTrans.log @@ -1780,7 +1780,7 @@ design: (work@carry_rtl) |vpiOperand: \_ref_obj: (work@carry_rtl.a), line:3:27, endln:3:28 |vpiParent: - \_operation: , line:3:18, endln:3:31 + \_operation: , line:3:27, endln:3:30 |vpiName:a |vpiFullName:work@carry_rtl.a |vpiActual: @@ -1801,7 +1801,7 @@ design: (work@carry_rtl) |vpiOperand: \_ref_obj: (work@carry_rtl.b), line:3:35, endln:3:36 |vpiParent: - \_operation: , line:3:18, endln:3:39 + \_operation: , line:3:35, endln:3:38 |vpiName:b |vpiFullName:work@carry_rtl.b |vpiActual: diff --git a/tests/CaseExpression/CaseExpression.log b/tests/CaseExpression/CaseExpression.log index ccc8d478ec..8cbd2b76c1 100644 --- a/tests/CaseExpression/CaseExpression.log +++ b/tests/CaseExpression/CaseExpression.log @@ -1138,8 +1138,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:26, endln:19:27 - |vpiParent: - \_assignment: , line:19:22, endln:19:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1147,7 +1145,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.a), line:19:22, endln:19:23 |vpiParent: - \_case_item: , line:19:13, endln:19:28 + \_assignment: , line:19:22, endln:19:27 |vpiName:a |vpiFullName:work@case_expr_non_const_top.a |vpiActual: @@ -1164,8 +1162,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:20:26, endln:20:27 - |vpiParent: - \_assignment: , line:20:22, endln:20:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1173,7 +1169,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.a), line:20:22, endln:20:23 |vpiParent: - \_case_item: , line:20:13, endln:20:28 + \_assignment: , line:20:22, endln:20:27 |vpiName:a |vpiFullName:work@case_expr_non_const_top.a |vpiActual: @@ -1219,8 +1215,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:23:26, endln:23:27 - |vpiParent: - \_assignment: , line:23:22, endln:23:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1228,7 +1222,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.b), line:23:22, endln:23:23 |vpiParent: - \_case_item: , line:23:13, endln:23:28 + \_assignment: , line:23:22, endln:23:27 |vpiName:b |vpiFullName:work@case_expr_non_const_top.b |vpiActual: @@ -1256,8 +1250,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:26, endln:24:27 - |vpiParent: - \_assignment: , line:24:22, endln:24:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1265,7 +1257,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.b), line:24:22, endln:24:23 |vpiParent: - \_case_item: , line:24:13, endln:24:28 + \_assignment: , line:24:22, endln:24:27 |vpiName:b |vpiFullName:work@case_expr_non_const_top.b |vpiActual: @@ -1300,8 +1292,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:26, endln:27:27 - |vpiParent: - \_assignment: , line:27:22, endln:27:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1309,7 +1299,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.c), line:27:22, endln:27:23 |vpiParent: - \_case_item: , line:27:13, endln:27:28 + \_assignment: , line:27:22, endln:27:27 |vpiName:c |vpiFullName:work@case_expr_non_const_top.c |vpiActual: @@ -1337,8 +1327,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:28:26, endln:28:27 - |vpiParent: - \_assignment: , line:28:22, endln:28:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1346,7 +1334,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.c), line:28:22, endln:28:23 |vpiParent: - \_case_item: , line:28:13, endln:28:28 + \_assignment: , line:28:22, endln:28:27 |vpiName:c |vpiFullName:work@case_expr_non_const_top.c |vpiActual: @@ -1376,8 +1364,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:26, endln:31:27 - |vpiParent: - \_assignment: , line:31:22, endln:31:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1385,7 +1371,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.d), line:31:22, endln:31:23 |vpiParent: - \_case_item: , line:31:13, endln:31:28 + \_assignment: , line:31:22, endln:31:27 |vpiName:d |vpiFullName:work@case_expr_non_const_top.d |vpiActual: @@ -1413,8 +1399,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:32:26, endln:32:27 - |vpiParent: - \_assignment: , line:32:22, endln:32:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1422,7 +1406,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.d), line:32:22, endln:32:23 |vpiParent: - \_case_item: , line:32:13, endln:32:28 + \_assignment: , line:32:22, endln:32:27 |vpiName:d |vpiFullName:work@case_expr_non_const_top.d |vpiActual: @@ -1439,8 +1423,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:33:26, endln:33:27 - |vpiParent: - \_assignment: , line:33:22, endln:33:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1448,7 +1430,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.d), line:33:22, endln:33:23 |vpiParent: - \_case_item: , line:33:13, endln:33:28 + \_assignment: , line:33:22, endln:33:27 |vpiName:d |vpiFullName:work@case_expr_non_const_top.d |vpiActual: @@ -1489,8 +1471,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:36:26, endln:36:27 - |vpiParent: - \_assignment: , line:36:22, endln:36:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1498,7 +1478,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.e), line:36:22, endln:36:23 |vpiParent: - \_case_item: , line:36:13, endln:36:28 + \_assignment: , line:36:22, endln:36:27 |vpiName:e |vpiFullName:work@case_expr_non_const_top.e |vpiActual: @@ -1526,8 +1506,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:37:26, endln:37:27 - |vpiParent: - \_assignment: , line:37:22, endln:37:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1535,7 +1513,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.e), line:37:22, endln:37:23 |vpiParent: - \_case_item: , line:37:13, endln:37:28 + \_assignment: , line:37:22, endln:37:27 |vpiName:e |vpiFullName:work@case_expr_non_const_top.e |vpiActual: @@ -1552,8 +1530,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:38:26, endln:38:27 - |vpiParent: - \_assignment: , line:38:22, endln:38:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1561,7 +1537,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.e), line:38:22, endln:38:23 |vpiParent: - \_case_item: , line:38:13, endln:38:28 + \_assignment: , line:38:22, endln:38:27 |vpiName:e |vpiFullName:work@case_expr_non_const_top.e |vpiActual: @@ -1605,8 +1581,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:41:26, endln:41:27 - |vpiParent: - \_assignment: , line:41:22, endln:41:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1614,7 +1588,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.f), line:41:22, endln:41:23 |vpiParent: - \_case_item: , line:41:13, endln:41:28 + \_assignment: , line:41:22, endln:41:27 |vpiName:f |vpiFullName:work@case_expr_non_const_top.f |vpiActual: @@ -1633,8 +1607,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:42:26, endln:42:27 - |vpiParent: - \_assignment: , line:42:22, endln:42:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1642,7 +1614,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.f), line:42:22, endln:42:23 |vpiParent: - \_case_item: , line:42:13, endln:42:28 + \_assignment: , line:42:22, endln:42:27 |vpiName:f |vpiFullName:work@case_expr_non_const_top.f |vpiActual: @@ -1659,8 +1631,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:43:26, endln:43:27 - |vpiParent: - \_assignment: , line:43:22, endln:43:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1668,7 +1638,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.f), line:43:22, endln:43:23 |vpiParent: - \_case_item: , line:43:13, endln:43:28 + \_assignment: , line:43:22, endln:43:27 |vpiName:f |vpiFullName:work@case_expr_non_const_top.f |vpiActual: @@ -1712,8 +1682,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:46:26, endln:46:27 - |vpiParent: - \_assignment: , line:46:22, endln:46:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1721,7 +1689,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.g), line:46:22, endln:46:23 |vpiParent: - \_case_item: , line:46:13, endln:46:28 + \_assignment: , line:46:22, endln:46:27 |vpiName:g |vpiFullName:work@case_expr_non_const_top.g |vpiActual: @@ -1746,8 +1714,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:47:26, endln:47:27 - |vpiParent: - \_assignment: , line:47:22, endln:47:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1755,7 +1721,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.g), line:47:22, endln:47:23 |vpiParent: - \_case_item: , line:47:13, endln:47:28 + \_assignment: , line:47:22, endln:47:27 |vpiName:g |vpiFullName:work@case_expr_non_const_top.g |vpiActual: @@ -1783,8 +1749,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:48:26, endln:48:27 - |vpiParent: - \_assignment: , line:48:22, endln:48:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1792,7 +1756,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.g), line:48:22, endln:48:23 |vpiParent: - \_case_item: , line:48:13, endln:48:28 + \_assignment: , line:48:22, endln:48:27 |vpiName:g |vpiFullName:work@case_expr_non_const_top.g |vpiActual: @@ -1809,8 +1773,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:49:26, endln:49:27 - |vpiParent: - \_assignment: , line:49:22, endln:49:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1818,7 +1780,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.g), line:49:22, endln:49:23 |vpiParent: - \_case_item: , line:49:13, endln:49:28 + \_assignment: , line:49:22, endln:49:27 |vpiName:g |vpiFullName:work@case_expr_non_const_top.g |vpiActual: @@ -1862,8 +1824,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:52:26, endln:52:27 - |vpiParent: - \_assignment: , line:52:22, endln:52:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1871,7 +1831,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.h), line:52:22, endln:52:23 |vpiParent: - \_case_item: , line:52:13, endln:52:28 + \_assignment: , line:52:22, endln:52:27 |vpiName:h |vpiFullName:work@case_expr_non_const_top.h |vpiActual: @@ -1894,8 +1854,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:53:26, endln:53:27 - |vpiParent: - \_assignment: , line:53:22, endln:53:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1903,7 +1861,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.h), line:53:22, endln:53:23 |vpiParent: - \_case_item: , line:53:13, endln:53:28 + \_assignment: , line:53:22, endln:53:27 |vpiName:h |vpiFullName:work@case_expr_non_const_top.h |vpiActual: @@ -1922,8 +1880,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:54:26, endln:54:27 - |vpiParent: - \_assignment: , line:54:22, endln:54:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1931,7 +1887,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.h), line:54:22, endln:54:23 |vpiParent: - \_case_item: , line:54:13, endln:54:28 + \_assignment: , line:54:22, endln:54:27 |vpiName:h |vpiFullName:work@case_expr_non_const_top.h |vpiActual: @@ -1959,8 +1915,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:55:26, endln:55:27 - |vpiParent: - \_assignment: , line:55:22, endln:55:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1968,7 +1922,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.h), line:55:22, endln:55:23 |vpiParent: - \_case_item: , line:55:13, endln:55:28 + \_assignment: , line:55:22, endln:55:27 |vpiName:h |vpiFullName:work@case_expr_non_const_top.h |vpiActual: @@ -1985,8 +1939,6 @@ design: (work@case_expr_non_const_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:56:26, endln:56:27 - |vpiParent: - \_assignment: , line:56:22, endln:56:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1994,7 +1946,7 @@ design: (work@case_expr_non_const_top) |vpiLhs: \_ref_obj: (work@case_expr_non_const_top.h), line:56:22, endln:56:23 |vpiParent: - \_case_item: , line:56:13, endln:56:28 + \_assignment: , line:56:22, endln:56:27 |vpiName:h |vpiFullName:work@case_expr_non_const_top.h |vpiActual: diff --git a/tests/CaseFullElab/CaseFullElab.log b/tests/CaseFullElab/CaseFullElab.log index 3136eb2c32..146bb2dfae 100644 --- a/tests/CaseFullElab/CaseFullElab.log +++ b/tests/CaseFullElab/CaseFullElab.log @@ -1646,13 +1646,13 @@ design: (work@FSM) |vpiRhs: \_ref_obj: (work@FSM.FSM3.Slow), line:23:24, endln:23:28 |vpiParent: - \_case_item: , line:23:7, endln:23:29 + \_assignment: , line:23:15, endln:23:28 |vpiName:Slow |vpiFullName:work@FSM.FSM3.Slow |vpiLhs: \_ref_obj: (work@FSM.FSM3.Speed), line:23:15, endln:23:20 |vpiParent: - \_case_item: , line:23:7, endln:23:29 + \_assignment: , line:23:15, endln:23:28 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: @@ -1675,13 +1675,13 @@ design: (work@FSM) |vpiRhs: \_ref_obj: (work@FSM.FSM3.Faster), line:24:24, endln:24:30 |vpiParent: - \_case_item: , line:24:7, endln:24:31 + \_assignment: , line:24:15, endln:24:30 |vpiName:Faster |vpiFullName:work@FSM.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM.FSM3.Speed), line:24:15, endln:24:20 |vpiParent: - \_case_item: , line:24:7, endln:24:31 + \_assignment: , line:24:15, endln:24:30 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: @@ -1738,13 +1738,13 @@ design: (work@FSM) |vpiRhs: \_ref_obj: (work@FSM.FSM3.Faster), line:31:24, endln:31:30 |vpiParent: - \_case_item: , line:31:7, endln:31:31 + \_assignment: , line:31:15, endln:31:30 |vpiName:Faster |vpiFullName:work@FSM.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM.FSM3.Speed), line:31:15, endln:31:20 |vpiParent: - \_case_item: , line:31:7, endln:31:31 + \_assignment: , line:31:15, endln:31:30 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: @@ -1767,13 +1767,13 @@ design: (work@FSM) |vpiRhs: \_ref_obj: (work@FSM.FSM3.Faster), line:32:24, endln:32:30 |vpiParent: - \_case_item: , line:32:7, endln:32:31 + \_assignment: , line:32:15, endln:32:30 |vpiName:Faster |vpiFullName:work@FSM.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM.FSM3.Speed), line:32:15, endln:32:20 |vpiParent: - \_case_item: , line:32:7, endln:32:31 + \_assignment: , line:32:15, endln:32:30 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: @@ -1800,7 +1800,7 @@ design: (work@FSM) |vpiRhs: \_ref_obj: (work@FSM.FSM3.Speed), line:37:14, endln:37:19 |vpiParent: - \_begin: (work@FSM.FSM3), line:36:8, endln:38:6 + \_assignment: , line:37:5, endln:37:19 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: @@ -1808,7 +1808,7 @@ design: (work@FSM) |vpiLhs: \_ref_obj: (work@FSM.FSM3.Speed), line:37:5, endln:37:10 |vpiParent: - \_begin: (work@FSM.FSM3), line:36:8, endln:38:6 + \_assignment: , line:37:5, endln:37:19 |vpiName:Speed |vpiFullName:work@FSM.FSM3.Speed |vpiActual: diff --git a/tests/CaseInside/CaseInside.log b/tests/CaseInside/CaseInside.log index f3b9a6d378..fe4a4de044 100644 --- a/tests/CaseInside/CaseInside.log +++ b/tests/CaseInside/CaseInside.log @@ -1125,10 +1125,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.addr), line:15:27, endln:15:41 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (addr), line:15:37, endln:15:41 + \_ref_obj: (work@dm_csrs.csr_read_write.addr), line:15:37, endln:15:41 |vpiParent: \_hier_path: (dmi_req_i.addr), line:15:27, endln:15:41 |vpiName:addr + |vpiFullName:work@dm_csrs.csr_read_write.addr |vpiCaseItem: \_case_item: , line:17:9, endln:21:12 |vpiParent: @@ -1166,8 +1167,6 @@ design: (work@dm_csrs) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:29, endln:19:33 - |vpiParent: - \_assignment: , line:19:11, endln:19:33 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -1175,7 +1174,7 @@ design: (work@dm_csrs) |vpiLhs: \_ref_obj: (work@dm_csrs.csr_read_write.resp_queue_data), line:19:11, endln:19:26 |vpiParent: - \_begin: (work@dm_csrs.csr_read_write), line:17:36, endln:21:12 + \_assignment: , line:19:11, endln:19:33 |vpiName:resp_queue_data |vpiFullName:work@dm_csrs.csr_read_write.resp_queue_data |vpiActual: @@ -1207,7 +1206,7 @@ design: (work@dm_csrs) |vpiRhs: \_ref_obj: (work@dm_csrs.csr_read_write.dmcontrol_q), line:23:45, endln:23:56 |vpiParent: - \_case_item: , line:23:9, endln:23:57 + \_assignment: , line:23:27, endln:23:56 |vpiName:dmcontrol_q |vpiFullName:work@dm_csrs.csr_read_write.dmcontrol_q |vpiActual: @@ -1215,7 +1214,7 @@ design: (work@dm_csrs) |vpiLhs: \_ref_obj: (work@dm_csrs.csr_read_write.resp_queue_data), line:23:27, endln:23:42 |vpiParent: - \_case_item: , line:23:9, endln:23:57 + \_assignment: , line:23:27, endln:23:56 |vpiName:resp_queue_data |vpiFullName:work@dm_csrs.csr_read_write.resp_queue_data |vpiActual: @@ -1273,10 +1272,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.addr), line:15:27, endln:15:41 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (addr), line:15:37, endln:15:41 + \_ref_obj: (work@dm_csrs.csr_read_write.addr), line:15:37, endln:15:41 |vpiParent: \_hier_path: (dmi_req_i.addr), line:15:27, endln:15:41 |vpiName:addr + |vpiFullName:work@dm_csrs.csr_read_write.addr |vpiCaseItem: \_case_item: , line:17:9, endln:21:12 |vpiParent: diff --git a/tests/CastEnum/CastEnum.log b/tests/CastEnum/CastEnum.log index 9cce3a8fc2..e92dfa95f4 100644 --- a/tests/CastEnum/CastEnum.log +++ b/tests/CastEnum/CastEnum.log @@ -1033,10 +1033,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.op), line:15:33, endln:15:45 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (op), line:15:43, endln:15:45 + \_ref_obj: (work@dm_csrs.op), line:15:43, endln:15:45 |vpiParent: \_hier_path: (dmi_req_i.op), line:15:33, endln:15:45 |vpiName:op + |vpiFullName:work@dm_csrs.op |vpiLhs: \_ref_obj: (work@dm_csrs.dtm_op), line:15:10, endln:15:16 |vpiParent: @@ -1137,10 +1138,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.op), line:15:33, endln:15:45 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (op), line:15:43, endln:15:45 + \_ref_obj: (work@dm_csrs.op), line:15:43, endln:15:45 |vpiParent: \_hier_path: (dmi_req_i.op), line:15:33, endln:15:45 |vpiName:op + |vpiFullName:work@dm_csrs.op |vpiLhs: \_ref_obj: (work@dm_csrs.dtm_op), line:15:10, endln:15:16 |vpiParent: diff --git a/tests/CastPartSelect/CastPartSelect.log b/tests/CastPartSelect/CastPartSelect.log index 5323a15b38..32f0f9031d 100644 --- a/tests/CastPartSelect/CastPartSelect.log +++ b/tests/CastPartSelect/CastPartSelect.log @@ -405,7 +405,7 @@ package 2 part_select 1 port 2 range 4 -ref_obj 5 +ref_obj 4 task 9 === UHDM Object Stats End === [ERR:UH0718] ${SURELOG_DIR}/tests/CastPartSelect/dut.sv:6:9: Illegal lhs of type wire "csr_pipe_flush". @@ -439,7 +439,7 @@ package 2 part_select 2 port 3 range 4 -ref_obj 9 +ref_obj 7 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/CastPartSelect/slpp_all/surelog.uhdm ... @@ -964,14 +964,12 @@ design: (work@top) |vpiSigned:1 |vpiOpType:67 |vpiOperand: - \_part_select: , line:5:14, endln:5:34 + \_part_select: instr_rdata_i (work@top.csr_pipeline_flushes.instr_rdata_i), line:5:14, endln:5:34 |vpiParent: - \_ref_obj: instr_rdata_i (work@top.csr_pipeline_flushes.instr_rdata_i), line:5:14, endln:5:27 - |vpiParent: - \_operation: , line:5:9, endln:5:35 - |vpiName:instr_rdata_i - |vpiFullName:work@top.csr_pipeline_flushes.instr_rdata_i - |vpiDefName:instr_rdata_i + \_operation: , line:5:9, endln:5:35 + |vpiName:instr_rdata_i + |vpiFullName:work@top.csr_pipeline_flushes.instr_rdata_i + |vpiDefName:instr_rdata_i |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:28, endln:5:30 @@ -1006,8 +1004,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:26, endln:6:30 - |vpiParent: - \_assignment: , line:6:9, endln:6:30 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1015,7 +1011,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.csr_pipeline_flushes.csr_pipe_flush), line:6:9, endln:6:23 |vpiParent: - \_begin: (work@top.csr_pipeline_flushes), line:5:52, endln:7:10 + \_assignment: , line:6:9, endln:6:30 |vpiName:csr_pipe_flush |vpiFullName:work@top.csr_pipeline_flushes.csr_pipe_flush |vpiActual: @@ -1127,16 +1123,14 @@ design: (work@top) \_int_typespec: , line:5:9, endln:5:12 |vpiOpType:67 |vpiOperand: - \_part_select: , line:5:14, endln:5:34 + \_part_select: instr_rdata_i (work@top.instr_rdata_i), line:5:14, endln:5:34 |vpiParent: - \_ref_obj: instr_rdata_i (work@top.csr_pipeline_flushes.instr_rdata_i), line:5:14, endln:5:27 - |vpiParent: - \_operation: , line:5:9, endln:5:35 - |vpiName:instr_rdata_i - |vpiFullName:work@top.csr_pipeline_flushes.instr_rdata_i - |vpiDefName:instr_rdata_i - |vpiActual: - \_logic_net: (work@top.instr_rdata_i), line:1:32, endln:1:45 + \_operation: , line:5:9, endln:5:35 + |vpiName:instr_rdata_i + |vpiFullName:work@top.instr_rdata_i + |vpiDefName:instr_rdata_i + |vpiActual: + \_logic_net: (work@top.instr_rdata_i), line:1:32, endln:1:45 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:28, endln:5:30 diff --git a/tests/CastTypespec/CastTypespec.log b/tests/CastTypespec/CastTypespec.log index 58c4f90e59..72a9343fe4 100644 --- a/tests/CastTypespec/CastTypespec.log +++ b/tests/CastTypespec/CastTypespec.log @@ -1958,7 +1958,7 @@ design: (work@tlul_adapter_host) |vpiRhs: \_operation: , line:32:12, endln:32:38 |vpiParent: - \_begin: (work@top), line:30:13, endln:33:8 + \_assignment: , line:32:7, endln:32:38 |vpiOpType:76 |vpiOperand: \_constant: , line:32:14, endln:32:15 @@ -2035,7 +2035,7 @@ design: (work@tlul_adapter_host) |vpiLhs: \_ref_obj: (work@top.v1), line:32:7, endln:32:9 |vpiParent: - \_begin: (work@top), line:30:13, endln:33:8 + \_assignment: , line:32:7, endln:32:38 |vpiName:v1 |vpiFullName:work@top.v1 |vpiActual: @@ -2062,7 +2062,7 @@ design: (work@tlul_adapter_host) |vpiOperand: \_ref_obj: (work@top.p_outmux.selected_hart), line:37:9, endln:37:22 |vpiParent: - \_named_begin: (work@top.p_outmux), line:36:15, endln:40:6 + \_operation: , line:37:9, endln:37:49 |vpiName:selected_hart |vpiFullName:work@top.p_outmux.selected_hart |vpiActual: @@ -2114,7 +2114,7 @@ design: (work@tlul_adapter_host) |vpiRhs: \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiParent: - \_begin: (work@top.p_outmux), line:37:51, endln:39:8 + \_assignment: , line:38:7, endln:38:41 |vpiName:dmcontrol_q.resumereq |vpiActual: \_ref_obj: (dmcontrol_q), line:38:20, endln:38:31 @@ -2122,14 +2122,15 @@ design: (work@tlul_adapter_host) \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiName:dmcontrol_q |vpiActual: - \_ref_obj: (resumereq), line:38:32, endln:38:41 + \_ref_obj: (work@top.p_outmux.resumereq), line:38:32, endln:38:41 |vpiParent: \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiName:resumereq + |vpiFullName:work@top.p_outmux.resumereq |vpiLhs: \_ref_obj: (work@top.p_outmux.resumereq_o), line:38:7, endln:38:18 |vpiParent: - \_begin: (work@top.p_outmux), line:37:51, endln:39:8 + \_assignment: , line:38:7, endln:38:41 |vpiName:resumereq_o |vpiFullName:work@top.p_outmux.resumereq_o |vpiActual: @@ -2488,10 +2489,11 @@ design: (work@tlul_adapter_host) \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiName:dmcontrol_q |vpiActual: - \_ref_obj: (resumereq), line:38:32, endln:38:41 + \_ref_obj: (work@top.p_outmux.resumereq), line:38:32, endln:38:41 |vpiParent: \_hier_path: (dmcontrol_q.resumereq), line:38:20, endln:38:41 |vpiName:resumereq + |vpiFullName:work@top.p_outmux.resumereq |vpiLhs: \_ref_obj: (work@top.p_outmux.resumereq_o), line:38:7, endln:38:18 |vpiParent: diff --git a/tests/CastUnsigned/CastUnsigned.log b/tests/CastUnsigned/CastUnsigned.log index a05c5a6624..46de81e1dd 100644 --- a/tests/CastUnsigned/CastUnsigned.log +++ b/tests/CastUnsigned/CastUnsigned.log @@ -1069,7 +1069,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.proc_stall_tieoff.setup_received), line:8:11, endln:8:25 |vpiParent: - \_named_begin: (work@top.proc_stall_tieoff), line:7:15, endln:11:6 + \_operation: , line:8:11, endln:8:39 |vpiName:setup_received |vpiFullName:work@top.proc_stall_tieoff.setup_received |vpiActual: @@ -1103,7 +1103,7 @@ design: (work@top) |vpiRhs: \_sys_func_call: ($unsigned), line:9:24, endln:9:36 |vpiParent: - \_begin: (work@top.proc_stall_tieoff), line:8:41, endln:10:10 + \_assignment: , line:9:9, endln:9:36 |vpiArgument: \_ref_obj: (work@top.proc_stall_tieoff.i), line:9:34, endln:9:35 |vpiParent: @@ -1116,7 +1116,7 @@ design: (work@top) |vpiLhs: \_hier_path: (hw2reg.stall), line:9:9, endln:9:21 |vpiParent: - \_begin: (work@top.proc_stall_tieoff), line:8:41, endln:10:10 + \_assignment: , line:9:9, endln:9:36 |vpiName:hw2reg.stall |vpiActual: \_ref_obj: (hw2reg) diff --git a/tests/ClassFsm/ClassFsm.log b/tests/ClassFsm/ClassFsm.log index 7d77f87197..37aa0b9c33 100644 --- a/tests/ClassFsm/ClassFsm.log +++ b/tests/ClassFsm/ClassFsm.log @@ -55,7 +55,7 @@ param_assign 4 parameter 4 port 6 range 4 -ref_obj 36 +ref_obj 31 task 7 task_call 4 === UHDM Object Stats End === @@ -91,7 +91,7 @@ param_assign 28 parameter 4 port 9 range 4 -ref_obj 192 +ref_obj 159 task 45 task_call 76 === UHDM Object Stats End === @@ -205,8 +205,6 @@ design: (work@fsm_class) |vpiBlocking:1 |vpiRhs: \_constant: , line:11:22, endln:11:23 - |vpiParent: - \_assignment: , line:11:9, endln:11:23 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -227,8 +225,6 @@ design: (work@fsm_class) |vpiBlocking:1 |vpiRhs: \_constant: , line:12:37, endln:12:41 - |vpiParent: - \_assignment: , line:12:9, endln:12:41 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -236,25 +232,19 @@ design: (work@fsm_class) |vpiLhs: \_bit_select: (work@fsm_class::baseFsm::next_state_transition::next_state), line:12:9, endln:12:34 |vpiParent: - \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::next_state) - |vpiParent: - \_assignment: , line:12:9, endln:12:41 - |vpiName:next_state - |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 + \_assignment: , line:12:9, endln:12:41 |vpiName:next_state |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 |vpiIndex: - \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::next_state::state_to_bit), line:12:21, endln:12:33 + \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::state_to_bit), line:12:21, endln:12:33 |vpiParent: \_bit_select: (work@fsm_class::baseFsm::next_state_transition::next_state), line:12:9, endln:12:34 |vpiName:state_to_bit - |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state::state_to_bit + |vpiFullName:work@fsm_class::baseFsm::next_state_transition::state_to_bit |vpiActual: \_io_decl: (state_to_bit), line:8:43, endln:8:55 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 |vpiMethod: \_task: (work@fsm_class::baseFsm::current_state_transition), line:15:5, endln:23:12 |vpiParent: @@ -296,8 +286,6 @@ design: (work@fsm_class) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:25, endln:19:26 - |vpiParent: - \_assignment: , line:19:9, endln:19:26 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -702,25 +690,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:72:11, endln:72:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:72:11, endln:72:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:72:11, endln:72:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_00_BIT), line:72:25, endln:72:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_00_BIT), line:72:25, endln:72:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:72:11, endln:72:38 |vpiName:STATE_00_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_00_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_00_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_00_BIT), line:28:17, endln:28:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_00), line:72:40, endln:72:53 |vpiParent: @@ -735,25 +717,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:73:11, endln:73:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:73:11, endln:73:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:73:11, endln:73:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_01_BIT), line:73:25, endln:73:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_01_BIT), line:73:25, endln:73:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:73:11, endln:73:38 |vpiName:STATE_01_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_01_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_01_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_01_BIT), line:29:17, endln:29:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_01), line:73:40, endln:73:53 |vpiParent: @@ -768,25 +744,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:74:11, endln:74:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:74:11, endln:74:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:74:11, endln:74:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_10_BIT), line:74:25, endln:74:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_10_BIT), line:74:25, endln:74:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:74:11, endln:74:38 |vpiName:STATE_10_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_10_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_10_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_10_BIT), line:30:17, endln:30:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_10), line:74:40, endln:74:53 |vpiParent: @@ -801,25 +771,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:75:11, endln:75:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:75:11, endln:75:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:75:11, endln:75:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_11_BIT), line:75:25, endln:75:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_11_BIT), line:75:25, endln:75:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:75:11, endln:75:38 |vpiName:STATE_11_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_11_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_11_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_11_BIT), line:31:17, endln:31:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_11), line:75:40, endln:75:53 |vpiParent: @@ -1048,25 +1012,19 @@ design: (work@fsm_class) |vpiLhs: \_bit_select: (work@fsm_class::baseFsm::next_state_transition::next_state), line:12:9, endln:12:34 |vpiParent: - \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::next_state) - |vpiParent: - \_assignment: , line:12:9, endln:12:41 - |vpiName:next_state - |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 + \_assignment: , line:12:9, endln:12:41 |vpiName:next_state |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 |vpiIndex: - \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::next_state::state_to_bit), line:12:21, endln:12:33 + \_ref_obj: (work@fsm_class::baseFsm::next_state_transition::state_to_bit), line:12:21, endln:12:33 |vpiParent: \_bit_select: (work@fsm_class::baseFsm::next_state_transition::next_state), line:12:9, endln:12:34 |vpiName:state_to_bit - |vpiFullName:work@fsm_class::baseFsm::next_state_transition::next_state::state_to_bit + |vpiFullName:work@fsm_class::baseFsm::next_state_transition::state_to_bit |vpiActual: \_io_decl: (state_to_bit), line:8:43, endln:8:55 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::next_state), line:6:15, endln:6:25 |vpiMethod: \_task: (work@fsm_class::baseFsm::current_state_transition), line:15:5, endln:23:12 |vpiParent: @@ -1448,25 +1406,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:72:11, endln:72:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:72:11, endln:72:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:72:11, endln:72:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_00_BIT), line:72:25, endln:72:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_00_BIT), line:72:25, endln:72:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:72:11, endln:72:38 |vpiName:STATE_00_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_00_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_00_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_00_BIT), line:28:17, endln:28:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_00), line:72:40, endln:72:53 |vpiParent: @@ -1481,25 +1433,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:73:11, endln:73:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:73:11, endln:73:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:73:11, endln:73:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_01_BIT), line:73:25, endln:73:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_01_BIT), line:73:25, endln:73:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:73:11, endln:73:38 |vpiName:STATE_01_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_01_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_01_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_01_BIT), line:29:17, endln:29:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_01), line:73:40, endln:73:53 |vpiParent: @@ -1514,25 +1460,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:74:11, endln:74:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:74:11, endln:74:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:74:11, endln:74:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_10_BIT), line:74:25, endln:74:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_10_BIT), line:74:25, endln:74:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:74:11, endln:74:38 |vpiName:STATE_10_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_10_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_10_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_10_BIT), line:30:17, endln:30:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_10), line:74:40, endln:74:53 |vpiParent: @@ -1547,25 +1487,19 @@ design: (work@fsm_class) |vpiExpr: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:75:11, endln:75:38 |vpiParent: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state) - |vpiParent: - \_case_item: , line:75:11, endln:75:54 - |vpiName:current_state - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 + \_case_item: , line:75:11, endln:75:54 |vpiName:current_state |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state + |vpiActual: + \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiIndex: - \_ref_obj: (work@fsm_class::specificFSM::main_comb::current_state::STATE_11_BIT), line:75:25, endln:75:37 + \_ref_obj: (work@fsm_class::specificFSM::main_comb::STATE_11_BIT), line:75:25, endln:75:37 |vpiParent: \_bit_select: (work@fsm_class::specificFSM::main_comb::current_state), line:75:11, endln:75:38 |vpiName:STATE_11_BIT - |vpiFullName:work@fsm_class::specificFSM::main_comb::current_state::STATE_11_BIT + |vpiFullName:work@fsm_class::specificFSM::main_comb::STATE_11_BIT |vpiActual: \_parameter: (work@fsm_class::specificFSM::STATE_11_BIT), line:31:17, endln:31:29 - |vpiActual: - \_bit_var: (work@fsm_class::baseFsm::current_state), line:5:15, endln:5:28 |vpiStmt: \_task_call: (from_state_11), line:75:40, endln:75:53 |vpiParent: diff --git a/tests/ClassMemberRef/ClassMemberRef.log b/tests/ClassMemberRef/ClassMemberRef.log index 50a66e9732..be881abb8e 100644 --- a/tests/ClassMemberRef/ClassMemberRef.log +++ b/tests/ClassMemberRef/ClassMemberRef.log @@ -438,13 +438,14 @@ design: (work@top) |vpiRhs: \_method_func_call: (new) |vpiParent: - \_begin: (work@top), line:25:9, endln:28:4 + \_assignment: , line:26:5, endln:26:18 |vpiName:new |vpiLhs: - \_ref_obj: (printer), line:26:5, endln:26:12 + \_ref_obj: (work@top.printer), line:26:5, endln:26:12 |vpiParent: \_hier_path: (printer) |vpiName:printer + |vpiFullName:work@top.printer |vpiStmt: \_method_func_call: (set_name_enabled), line:27:9, endln:27:25 |vpiParent: @@ -509,10 +510,11 @@ design: (work@top) \_assignment: , line:26:5, endln:26:18 |vpiName:new |vpiLhs: - \_ref_obj: (printer), line:26:5, endln:26:12 + \_ref_obj: (work@top.printer), line:26:5, endln:26:12 |vpiParent: \_assignment: , line:26:5, endln:26:18 |vpiName:printer + |vpiFullName:work@top.printer |vpiActual: \_class_var: (work@top.printer), line:24:18, endln:24:25 |vpiStmt: diff --git a/tests/ClassMethodCall/ClassMethodCall.log b/tests/ClassMethodCall/ClassMethodCall.log index 40aa123d68..6d8b2adcc7 100644 --- a/tests/ClassMethodCall/ClassMethodCall.log +++ b/tests/ClassMethodCall/ClassMethodCall.log @@ -478,13 +478,14 @@ design: (work@door_mod) |vpiRhs: \_method_func_call: (new) |vpiParent: - \_begin: (work@door_mod), line:46:13, endln:50:8 + \_assignment: , line:47:9, endln:47:21 |vpiName:new |vpiLhs: - \_ref_obj: (open), line:47:9, endln:47:13 + \_ref_obj: (work@door_mod.open), line:47:9, endln:47:13 |vpiParent: \_hier_path: (open) |vpiName:open + |vpiFullName:work@door_mod.open |vpiStmt: \_method_func_call: (door_fsm), line:48:14, endln:48:22 |vpiParent: @@ -548,10 +549,11 @@ design: (work@door_mod) \_assignment: , line:47:9, endln:47:21 |vpiName:new |vpiLhs: - \_ref_obj: (open), line:47:9, endln:47:13 + \_ref_obj: (work@door_mod.open), line:47:9, endln:47:13 |vpiParent: \_assignment: , line:47:9, endln:47:21 |vpiName:open + |vpiFullName:work@door_mod.open |vpiActual: \_class_var: (work@door_mod.open), line:45:20, endln:45:24 |vpiStmt: diff --git a/tests/ClassMini/ClassMini.log b/tests/ClassMini/ClassMini.log index 658923b88c..1067782f3f 100644 --- a/tests/ClassMini/ClassMini.log +++ b/tests/ClassMini/ClassMini.log @@ -373,13 +373,14 @@ design: (work@door_mod) |vpiRhs: \_method_func_call: (new) |vpiParent: - \_begin: (work@door_mod), line:23:13, endln:26:8 + \_assignment: , line:24:9, endln:24:21 |vpiName:new |vpiLhs: - \_ref_obj: (open), line:24:9, endln:24:13 + \_ref_obj: (work@door_mod.open), line:24:9, endln:24:13 |vpiParent: \_hier_path: (open) |vpiName:open + |vpiFullName:work@door_mod.open |vpiStmt: \_method_func_call: (door_fsm), line:25:14, endln:25:22 |vpiParent: @@ -432,10 +433,11 @@ design: (work@door_mod) \_assignment: , line:24:9, endln:24:21 |vpiName:new |vpiLhs: - \_ref_obj: (open), line:24:9, endln:24:13 + \_ref_obj: (work@door_mod.open), line:24:9, endln:24:13 |vpiParent: \_assignment: , line:24:9, endln:24:21 |vpiName:open + |vpiFullName:work@door_mod.open |vpiActual: \_class_var: (work@door_mod.open), line:22:20, endln:22:24 |vpiStmt: diff --git a/tests/ClassScope/ClassScope.log b/tests/ClassScope/ClassScope.log index 94b2506e66..68f02064c8 100644 --- a/tests/ClassScope/ClassScope.log +++ b/tests/ClassScope/ClassScope.log @@ -10429,7 +10429,7 @@ parameter 242 part_select 31 range 3 ref_module 96 -ref_obj 484 +ref_obj 421 sys_func_call 213 type_parameter 15 unsupported_typespec 38 @@ -10459,7 +10459,7 @@ parameter 434 part_select 31 range 3 ref_module 96 -ref_obj 1233 +ref_obj 1170 sys_func_call 510 type_parameter 15 unsupported_typespec 38 @@ -10517,7 +10517,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (P::T::E), line:11:32, endln:11:33 |vpiParent: - \_type_parameter: (P::T), line:11:21, endln:11:22 + \_operation: , line:11:32, endln:11:37 |vpiName:E |vpiFullName:P::T::E |vpiActual: @@ -10594,7 +10594,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (P::T::E), line:11:32, endln:11:33 |vpiParent: - \_type_parameter: (P::T), line:11:21, endln:11:22 + \_operation: , line:11:32, endln:11:37 |vpiName:E |vpiFullName:P::T::E |vpiActual: @@ -10674,20 +10674,23 @@ design: (work@top) |vpiParent: \_type_parameter: (work@C::T), line:6:21, endln:6:22 |vpiExpr: - \_part_select: , line:6:25, endln:6:48 - |vpiParent: - \_ref_obj: PARAM_T (PARAM_T) - |vpiName:PARAM_T - |vpiDefName:PARAM_T + \_part_select: PARAM_T (PARAM_T), line:6:25, endln:6:48 + |vpiName:PARAM_T + |vpiDefName:PARAM_T + |vpiActual: + \_type_parameter: (work@C::PARAM_T), line:3:20, endln:3:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:6:34, endln:6:45 + |vpiParent: + \_part_select: PARAM_T (PARAM_T), line:6:25, endln:6:48 |vpiOpType:11 |vpiOperand: - \_ref_obj: (PARAM_E), line:6:34, endln:6:41 + \_ref_obj: (PARAM_T.PARAM_E), line:6:34, endln:6:41 |vpiParent: \_operation: , line:6:34, endln:6:45 |vpiName:PARAM_E + |vpiFullName:PARAM_T.PARAM_E |vpiActual: \_parameter: (work@C::PARAM_E), line:2:15, endln:2:22 |vpiOperand: @@ -11057,12 +11060,12 @@ design: (work@top) |vpiOperand: \_operation: , line:40:32, endln:40:37 |vpiParent: - \_type_parameter: (work@top.T), line:40:21, endln:40:22 + \_operation: , line:40:32, endln:40:41 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@top.T.E), line:40:32, endln:40:33 |vpiParent: - \_type_parameter: (work@top.T), line:40:21, endln:40:22 + \_operation: , line:40:32, endln:40:37 |vpiName:E |vpiFullName:work@top.T.E |vpiActual: diff --git a/tests/ClassVar/ClassVar.log b/tests/ClassVar/ClassVar.log index 64e2866bbf..38d8b68302 100644 --- a/tests/ClassVar/ClassVar.log +++ b/tests/ClassVar/ClassVar.log @@ -163,7 +163,7 @@ function 1 hier_path 1 package 3 range 2 -ref_obj 5 +ref_obj 3 ref_var 2 string_typespec 3 string_var 1 @@ -190,7 +190,7 @@ function 2 hier_path 2 package 3 range 2 -ref_obj 10 +ref_obj 6 ref_var 4 string_typespec 3 string_var 3 @@ -431,25 +431,19 @@ design: (unnamed) |vpiRhs: \_bit_select: (pack::uvm_mem_mam::check_reg::paths), line:17:30, endln:17:38 |vpiParent: - \_ref_obj: (pack::uvm_mem_mam::check_reg::paths) - |vpiParent: - \_assign_stmt: , line:17:25, endln:17:38 - |vpiName:paths - |vpiFullName:pack::uvm_mem_mam::check_reg::paths - |vpiActual: - \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 + \_assign_stmt: , line:17:25, endln:17:38 |vpiName:paths |vpiFullName:pack::uvm_mem_mam::check_reg::paths + |vpiActual: + \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 |vpiIndex: - \_ref_obj: (pack::uvm_mem_mam::check_reg::paths::p), line:17:36, endln:17:37 + \_ref_obj: (pack::uvm_mem_mam::check_reg::p), line:17:36, endln:17:37 |vpiParent: \_bit_select: (pack::uvm_mem_mam::check_reg::paths), line:17:30, endln:17:38 |vpiName:p - |vpiFullName:pack::uvm_mem_mam::check_reg::paths::p + |vpiFullName:pack::uvm_mem_mam::check_reg::p |vpiActual: \_ref_var: (pack::uvm_mem_mam::check_reg::p), line:16:17, endln:16:18 - |vpiActual: - \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 |vpiLhs: \_class_var: (pack::uvm_mem_mam::check_reg::path), line:17:25, endln:17:29 |vpiParent: @@ -475,16 +469,13 @@ design: (unnamed) |vpiActual: \_class_var: (pack::uvm_mem_mam::check_reg::path), line:17:25, endln:17:29 |vpiActual: - \_bit_select: (slices), line:18:22, endln:18:28 + \_bit_select: (path.slices[0]), line:18:22, endln:18:28 |vpiParent: - \_ref_obj: (pack::uvm_mem_mam::check_reg::slices[0]) - |vpiParent: - \_hier_path: (path.slices[0].spath), line:18:17, endln:18:37 - |vpiName:slices[0] - |vpiFullName:pack::uvm_mem_mam::check_reg::slices[0] - |vpiActual: - \_array_var: (pack::uvm_hdl_path_concat::slices), line:8:23, endln:8:29 + \_hier_path: (path.slices[0].spath), line:18:17, endln:18:37 |vpiName:slices + |vpiFullName:path.slices[0] + |vpiActual: + \_array_var: (pack::uvm_hdl_path_concat::slices), line:8:23, endln:8:29 |vpiIndex: \_constant: , line:18:29, endln:18:30 |vpiDecompile:0 @@ -492,10 +483,11 @@ design: (unnamed) |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (spath), line:18:32, endln:18:37 + \_ref_obj: (pack::uvm_mem_mam::check_reg::spath), line:18:32, endln:18:37 |vpiParent: \_hier_path: (path.slices[0].spath), line:18:17, endln:18:37 |vpiName:spath + |vpiFullName:pack::uvm_mem_mam::check_reg::spath |vpiActual: \_typespec_member: (spath), line:4:11, endln:4:16 |vpiLhs: diff --git a/tests/ClockingBlock/ClockingBlock.log b/tests/ClockingBlock/ClockingBlock.log index 009bdb15c3..698dd8460a 100644 --- a/tests/ClockingBlock/ClockingBlock.log +++ b/tests/ClockingBlock/ClockingBlock.log @@ -1162,10 +1162,11 @@ design: (work@top) |vpiActual: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ClockingBlock/dut.sv, line:1:1, endln:17:10 |vpiActual: - \_ref_obj: (to), line:14:33, endln:14:35 + \_ref_obj: (work@top.cb1.to_Dut.to), line:14:33, endln:14:35 |vpiParent: \_hier_path: (top.to), line:14:29, endln:14:35 |vpiName:to + |vpiFullName:work@top.cb1.to_Dut.to =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/ClockingDrive/ClockingDrive.log b/tests/ClockingDrive/ClockingDrive.log index f34c158fbf..70812ccc2b 100644 --- a/tests/ClockingDrive/ClockingDrive.log +++ b/tests/ClockingDrive/ClockingDrive.log @@ -491,7 +491,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.expr1), line:10:12, endln:10:17 |vpiParent: - \_delay_control: , line:10:1, endln:10:3 + \_assignment: , line:10:4, endln:10:17 |vpiName:expr1 |vpiFullName:work@main.expr1 |vpiActual: @@ -499,7 +499,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.v), line:10:4, endln:10:8 |vpiParent: - \_delay_control: , line:10:1, endln:10:3 + \_assignment: , line:10:4, endln:10:17 |vpiName:cb.v |vpiActual: \_ref_obj: (cb) @@ -528,7 +528,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.c), line:13:13, endln:13:14 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:13:5, endln:13:14 |vpiName:c |vpiFullName:work@main.c |vpiActual: @@ -536,7 +536,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.a), line:13:5, endln:13:9 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:13:5, endln:13:14 |vpiName:cb.a |vpiActual: \_ref_obj: (cb) @@ -556,7 +556,7 @@ design: (work@main) |vpiRhs: \_hier_path: (cb.a), line:14:13, endln:14:17 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:14:5, endln:14:17 |vpiName:cb.a |vpiActual: \_ref_obj: (cb), line:14:13, endln:14:15 @@ -564,14 +564,15 @@ design: (work@main) \_hier_path: (cb.a), line:14:13, endln:14:17 |vpiName:cb |vpiActual: - \_ref_obj: (a), line:14:16, endln:14:17 + \_ref_obj: (work@main.a), line:14:16, endln:14:17 |vpiParent: \_hier_path: (cb.a), line:14:13, endln:14:17 |vpiName:a + |vpiFullName:work@main.a |vpiLhs: \_hier_path: (cb.b), line:14:5, endln:14:9 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:14:5, endln:14:17 |vpiName:cb.b |vpiActual: \_ref_obj: (cb) @@ -590,8 +591,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:17:22, endln:17:26 - |vpiParent: - \_assignment: , line:17:5, endln:17:26 |vpiDecompile:4'h5 |vpiSize:4 |HEX:5 @@ -599,7 +598,7 @@ design: (work@main) |vpiLhs: \_hier_path: (bus.data), line:17:5, endln:17:18 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:17:5, endln:17:26 |vpiName:bus.data |vpiActual: \_ref_obj: (bus) @@ -623,8 +622,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:18:21, endln:18:25 - |vpiParent: - \_assignment: , line:18:9, endln:18:25 |vpiDecompile:8'hz |vpiSize:8 |HEX:z @@ -632,7 +629,7 @@ design: (work@main) |vpiLhs: \_hier_path: (bus.data), line:18:9, endln:18:17 |vpiParent: - \_delay_control: , line:18:5, endln:18:8 + \_assignment: , line:18:9, endln:18:25 |vpiName:bus.data |vpiActual: \_ref_obj: (bus) @@ -656,8 +653,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:19:22, endln:19:23 - |vpiParent: - \_assignment: , line:19:10, endln:19:23 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -665,7 +660,7 @@ design: (work@main) |vpiLhs: \_hier_path: (bus.data), line:19:10, endln:19:18 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:19:10, endln:19:23 |vpiName:bus.data |vpiActual: \_ref_obj: (bus) @@ -685,7 +680,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.r), line:20:21, endln:20:22 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:20:5, endln:20:22 |vpiName:r |vpiFullName:work@main.r |vpiActual: @@ -693,7 +688,7 @@ design: (work@main) |vpiLhs: \_hier_path: (bus.data), line:20:5, endln:20:13 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:20:5, endln:20:22 |vpiName:bus.data |vpiActual: \_ref_obj: (bus) @@ -718,7 +713,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.r), line:22:20, endln:22:21 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:22:5, endln:22:21 |vpiName:r |vpiFullName:work@main.r |vpiActual: @@ -726,7 +721,7 @@ design: (work@main) |vpiLhs: \_hier_path: (bus.data), line:22:5, endln:22:13 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:22:5, endln:22:21 |vpiName:bus.data |vpiActual: \_ref_obj: (bus) @@ -756,7 +751,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.expr1), line:25:13, endln:25:18 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:25:5, endln:25:18 |vpiName:expr1 |vpiFullName:work@main.expr1 |vpiActual: @@ -764,7 +759,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.v), line:25:5, endln:25:9 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:25:5, endln:25:18 |vpiName:cb.v |vpiActual: \_ref_obj: (cb) @@ -784,7 +779,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.expr2), line:26:17, endln:26:22 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:26:5, endln:26:22 |vpiName:expr2 |vpiFullName:work@main.expr2 |vpiActual: @@ -792,7 +787,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.v), line:26:5, endln:26:9 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:26:5, endln:26:22 |vpiName:cb.v |vpiActual: \_ref_obj: (cb) @@ -822,7 +817,7 @@ design: (work@main) |vpiRhs: \_ref_obj: (work@main.expr3), line:27:20, endln:27:25 |vpiParent: - \_delay_control: , line:27:5, endln:27:7 + \_assignment: , line:27:8, endln:27:25 |vpiName:expr3 |vpiFullName:work@main.expr3 |vpiActual: @@ -830,7 +825,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.v), line:27:8, endln:27:12 |vpiParent: - \_delay_control: , line:27:5, endln:27:7 + \_assignment: , line:27:8, endln:27:25 |vpiName:cb.v |vpiActual: \_ref_obj: (cb) @@ -859,8 +854,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:29:9, endln:29:13 - |vpiParent: - \_assignment: , line:29:1, endln:29:13 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -868,7 +861,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.a), line:29:1, endln:29:5 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:29:1, endln:29:13 |vpiName:cb.a |vpiActual: \_ref_obj: (cb) @@ -899,8 +892,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:31:9, endln:31:13 - |vpiParent: - \_assignment: , line:31:1, endln:31:13 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -908,7 +899,7 @@ design: (work@main) |vpiLhs: \_hier_path: (cb.a), line:31:1, endln:31:5 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:31:1, endln:31:13 |vpiName:cb.a |vpiActual: \_ref_obj: (cb) @@ -932,8 +923,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:33:14, endln:33:21 - |vpiParent: - \_assignment: , line:33:1, endln:33:21 |vpiDecompile:4'b0101 |vpiSize:4 |BIN:0101 @@ -941,7 +930,7 @@ design: (work@main) |vpiLhs: \_hier_path: (pe.nibble), line:33:1, endln:33:10 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:33:1, endln:33:21 |vpiName:pe.nibble |vpiActual: \_ref_obj: (pe) @@ -960,8 +949,6 @@ design: (work@main) |vpiOpType:82 |vpiRhs: \_constant: , line:34:14, endln:34:21 - |vpiParent: - \_assignment: , line:34:1, endln:34:21 |vpiDecompile:4'b0011 |vpiSize:4 |BIN:0011 @@ -969,7 +956,7 @@ design: (work@main) |vpiLhs: \_hier_path: (pe.nibble), line:34:1, endln:34:10 |vpiParent: - \_begin: (work@main), line:12:9, endln:35:8 + \_assignment: , line:34:1, endln:34:21 |vpiName:pe.nibble |vpiActual: \_ref_obj: (pe) @@ -1149,10 +1136,11 @@ design: (work@main) |vpiActual: \_clocking_block: (cb), line:6:1, endln:8:12 |vpiActual: - \_ref_obj: (a), line:14:16, endln:14:17 + \_ref_obj: (work@main.a), line:14:16, endln:14:17 |vpiParent: \_hier_path: (cb.a), line:14:13, endln:14:17 |vpiName:a + |vpiFullName:work@main.a |vpiLhs: \_hier_path: (cb.b), line:14:5, endln:14:9 |vpiParent: diff --git a/tests/ClockingSntx/ClockingSntx.log b/tests/ClockingSntx/ClockingSntx.log index e870782955..76c9bf756d 100644 --- a/tests/ClockingSntx/ClockingSntx.log +++ b/tests/ClockingSntx/ClockingSntx.log @@ -280,7 +280,7 @@ operation 5 part_select 1 port 12 range 10 -ref_obj 27 +ref_obj 26 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -302,7 +302,7 @@ operation 9 part_select 2 port 18 range 10 -ref_obj 45 +ref_obj 43 === UHDM Object Stats End === [ERR:UH0725] ${SURELOG_DIR}/tests/ClockingSntx/dut.sv:15:17: Unresolved hierarchical reference "top.cpu1.state". @@ -562,13 +562,11 @@ design: (work@top) |vpiActual: \_logic_net: (regA) |vpiOperand: - \_part_select: , line:3:38, endln:3:47 + \_part_select: regB (regB), line:3:38, endln:3:47 |vpiParent: - \_ref_obj: regB (regB), line:3:38, endln:3:42 - |vpiParent: - \_event_control: , line:2:15, endln:2:23 - |vpiName:regB - |vpiDefName:regB + \_event_control: , line:2:15, endln:2:23 + |vpiName:regB + |vpiDefName:regB |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:3:43, endln:3:44 @@ -1036,14 +1034,12 @@ design: (work@top) |vpiActual: \_logic_net: (regA) |vpiOperand: - \_part_select: , line:3:38, endln:3:47 + \_part_select: regB (work@top.mem.instruction.regB), line:3:38, endln:3:47 |vpiParent: - \_ref_obj: regB (work@top.mem.instruction.regB), line:3:38, endln:3:42 - |vpiParent: - \_operation: , line:3:22, endln:3:49 - |vpiName:regB - |vpiFullName:work@top.mem.instruction.regB - |vpiDefName:regB + \_operation: , line:3:22, endln:3:49 + |vpiName:regB + |vpiFullName:work@top.mem.instruction.regB + |vpiDefName:regB |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:3:43, endln:3:44 @@ -1110,10 +1106,11 @@ design: (work@top) \_hier_path: (top.cpu1.state), line:15:17, endln:15:31 |vpiName:cpu1 |vpiActual: - \_ref_obj: (state), line:15:26, endln:15:31 + \_ref_obj: (work@top.cd1.state.state), line:15:26, endln:15:31 |vpiParent: \_hier_path: (top.cpu1.state), line:15:17, endln:15:31 |vpiName:state + |vpiFullName:work@top.cd1.state.state |vpiClockingBlock: \_clocking_block: (work@top.cd2), line:18:2, endln:21:13 |vpiParent: @@ -1169,4 +1166,4 @@ design: (work@top) [ NOTE] : 6 -[roundtrip]: ${SURELOG_DIR}/tests/ClockingSntx/dut.sv | ${SURELOG_DIR}/build/regression/ClockingSntx/roundtrip/dut_000.sv | 15 | 27 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ClockingSntx/dut.sv | ${SURELOG_DIR}/build/regression/ClockingSntx/roundtrip/dut_000.sv | 16 | 27 | \ No newline at end of file diff --git a/tests/ClogCast/ClogCast.log b/tests/ClogCast/ClogCast.log index 57d02d835e..395f5e9c8c 100644 --- a/tests/ClogCast/ClogCast.log +++ b/tests/ClogCast/ClogCast.log @@ -708,7 +708,7 @@ parameter 2 part_select 1 port 8 range 14 -ref_obj 20 +ref_obj 18 sys_func_call 2 task 9 === UHDM Object Stats End === @@ -746,7 +746,7 @@ parameter 2 part_select 2 port 12 range 14 -ref_obj 35 +ref_obj 31 sys_func_call 3 task 18 === UHDM Object Stats End === @@ -1408,35 +1408,33 @@ design: (work@debug_rom) \_begin: (work@debug_rom), line:37:17, endln:39:9 |vpiOpType:82 |vpiRhs: - \_part_select: , line:38:18, endln:38:47 + \_part_select: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:47 |vpiParent: - \_ref_obj: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:24 - |vpiParent: - \_assignment: , line:38:8, endln:38:47 - |vpiName:addr_i - |vpiFullName:work@debug_rom.addr_i - |vpiDefName:addr_i + \_assignment: , line:38:8, endln:38:47 + |vpiName:addr_i + |vpiFullName:work@debug_rom.addr_i + |vpiDefName:addr_i |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:25, endln:38:44 |vpiParent: - \_begin: (work@debug_rom), line:37:17, endln:39:9 + \_part_select: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:47 |vpiOpType:24 |vpiOperand: \_operation: , line:38:25, endln:38:42 |vpiParent: - \_begin: (work@debug_rom), line:37:17, endln:39:9 + \_operation: , line:38:25, endln:38:44 |vpiOpType:11 |vpiOperand: \_sys_func_call: ($clog2), line:38:25, endln:38:40 |vpiParent: \_operation: , line:38:25, endln:38:42 |vpiArgument: - \_ref_obj: (work@debug_rom.RomSize), line:38:32, endln:38:39 + \_ref_obj: (work@debug_rom.addr_i.RomSize), line:38:32, endln:38:39 |vpiParent: \_sys_func_call: ($clog2), line:38:25, endln:38:40 |vpiName:RomSize - |vpiFullName:work@debug_rom.RomSize + |vpiFullName:work@debug_rom.addr_i.RomSize |vpiName:$clog2 |vpiOperand: \_constant: , line:38:41, endln:38:42 @@ -1463,7 +1461,7 @@ design: (work@debug_rom) |vpiLhs: \_ref_obj: (work@debug_rom.addr_q), line:38:8, endln:38:14 |vpiParent: - \_begin: (work@debug_rom), line:37:17, endln:39:9 + \_assignment: , line:38:8, endln:38:47 |vpiName:addr_q |vpiFullName:work@debug_rom.addr_q |vpiActual: @@ -1487,8 +1485,6 @@ design: (work@debug_rom) |vpiBlocking:1 |vpiRhs: \_constant: , line:45:16, endln:45:18 - |vpiParent: - \_assignment: , line:45:6, endln:45:18 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -1496,7 +1492,7 @@ design: (work@debug_rom) |vpiLhs: \_ref_obj: (work@debug_rom.p_outmux.rdata_o), line:45:6, endln:45:13 |vpiParent: - \_named_begin: (work@debug_rom.p_outmux), line:44:16, endln:49:7 + \_assignment: , line:45:6, endln:45:18 |vpiName:rdata_o |vpiFullName:work@debug_rom.p_outmux.rdata_o |vpiActual: @@ -1513,7 +1509,7 @@ design: (work@debug_rom) |vpiOperand: \_ref_obj: (work@debug_rom.p_outmux.addr_q), line:46:10, endln:46:16 |vpiParent: - \_named_begin: (work@debug_rom.p_outmux), line:44:16, endln:49:7 + \_operation: , line:46:10, endln:46:44 |vpiName:addr_q |vpiFullName:work@debug_rom.p_outmux.addr_q |vpiActual: @@ -1555,17 +1551,13 @@ design: (work@debug_rom) |vpiRhs: \_bit_select: (work@debug_rom.p_outmux.mem), line:47:20, endln:47:31 |vpiParent: - \_ref_obj: (work@debug_rom.p_outmux.mem) - |vpiParent: - \_assignment: , line:47:10, endln:47:31 - |vpiName:mem - |vpiFullName:work@debug_rom.p_outmux.mem + \_assignment: , line:47:10, endln:47:31 |vpiName:mem |vpiFullName:work@debug_rom.p_outmux.mem |vpiIndex: \_ref_obj: (work@debug_rom.p_outmux.addr_q), line:47:24, endln:47:30 |vpiParent: - \_begin: (work@debug_rom.p_outmux), line:46:46, endln:48:9 + \_bit_select: (work@debug_rom.p_outmux.mem), line:47:20, endln:47:31 |vpiName:addr_q |vpiFullName:work@debug_rom.p_outmux.addr_q |vpiActual: @@ -1573,7 +1565,7 @@ design: (work@debug_rom) |vpiLhs: \_ref_obj: (work@debug_rom.p_outmux.rdata_o), line:47:10, endln:47:17 |vpiParent: - \_begin: (work@debug_rom.p_outmux), line:46:46, endln:48:9 + \_assignment: , line:47:10, endln:47:31 |vpiName:rdata_o |vpiFullName:work@debug_rom.p_outmux.rdata_o |vpiActual: @@ -2126,21 +2118,19 @@ design: (work@debug_rom) \_begin: (work@debug_rom), line:37:17, endln:39:9 |vpiOpType:82 |vpiRhs: - \_part_select: , line:38:18, endln:38:47 + \_part_select: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:47 |vpiParent: - \_ref_obj: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:24 - |vpiParent: - \_assignment: , line:38:8, endln:38:47 - |vpiName:addr_i - |vpiFullName:work@debug_rom.addr_i - |vpiDefName:addr_i - |vpiActual: - \_logic_net: (work@debug_rom.addr_i), line:6:25, endln:6:31 + \_assignment: , line:38:8, endln:38:47 + |vpiName:addr_i + |vpiFullName:work@debug_rom.addr_i + |vpiDefName:addr_i + |vpiActual: + \_logic_net: (work@debug_rom.addr_i), line:6:25, endln:6:31 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:25, endln:38:44 |vpiParent: - \_part_select: , line:38:18, endln:38:47 + \_part_select: addr_i (work@debug_rom.addr_i), line:38:18, endln:38:47 |vpiOpType:24 |vpiOperand: \_operation: , line:38:25, endln:38:42 @@ -2253,25 +2243,19 @@ design: (work@debug_rom) |vpiRhs: \_bit_select: (work@debug_rom.p_outmux.mem), line:47:20, endln:47:31 |vpiParent: - \_ref_obj: (work@debug_rom.p_outmux.mem) - |vpiParent: - \_assignment: , line:47:10, endln:47:31 - |vpiName:mem - |vpiFullName:work@debug_rom.p_outmux.mem - |vpiActual: - \_logic_var: (work@debug_rom.mem), line:12:36, endln:32:5 + \_assignment: , line:47:10, endln:47:31 |vpiName:mem |vpiFullName:work@debug_rom.p_outmux.mem + |vpiActual: + \_logic_var: (work@debug_rom.mem), line:12:36, endln:32:5 |vpiIndex: - \_ref_obj: (work@debug_rom.p_outmux.mem.addr_q), line:47:24, endln:47:30 + \_ref_obj: (work@debug_rom.p_outmux.addr_q), line:47:24, endln:47:30 |vpiParent: \_bit_select: (work@debug_rom.p_outmux.mem), line:47:20, endln:47:31 |vpiName:addr_q - |vpiFullName:work@debug_rom.p_outmux.mem.addr_q + |vpiFullName:work@debug_rom.p_outmux.addr_q |vpiActual: \_logic_var: (work@debug_rom.addr_q), line:34:32, endln:34:38 - |vpiActual: - \_logic_var: (work@debug_rom.mem), line:12:36, endln:32:5 |vpiLhs: \_ref_obj: (work@debug_rom.p_outmux.rdata_o), line:47:10, endln:47:17 |vpiParent: @@ -2289,4 +2273,4 @@ design: (work@debug_rom) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/ClogCast/dut.sv | ${SURELOG_DIR}/build/regression/ClogCast/roundtrip/dut_000.sv | 29 | 51 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ClogCast/dut.sv | ${SURELOG_DIR}/build/regression/ClogCast/roundtrip/dut_000.sv | 30 | 51 | \ No newline at end of file diff --git a/tests/ComplexBitSelect/ComplexBitSelect.log b/tests/ComplexBitSelect/ComplexBitSelect.log index e281fe379d..50e4811b29 100644 --- a/tests/ComplexBitSelect/ComplexBitSelect.log +++ b/tests/ComplexBitSelect/ComplexBitSelect.log @@ -527,7 +527,7 @@ package 5 param_assign 20 parameter 34 range 16 -ref_obj 48 +ref_obj 22 ref_var 1 task 9 unsupported_typespec 1 @@ -565,7 +565,7 @@ package 5 param_assign 20 parameter 34 range 16 -ref_obj 62 +ref_obj 29 ref_var 1 task 18 unsupported_typespec 1 @@ -1749,15 +1749,12 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_bit_select: (InfoTypeSize), line:19:13, endln:19:34 |vpiParent: - \_ref_obj: (InfoTypeSize) - |vpiParent: - \_operation: , line:19:9, endln:19:34 - |vpiName:InfoTypeSize + \_operation: , line:19:9, endln:19:34 |vpiName:InfoTypeSize |vpiIndex: \_ref_obj: (InfoSel), line:19:26, endln:19:33 |vpiParent: - \_operation: , line:19:9, endln:19:34 + \_bit_select: (InfoTypeSize), line:19:13, endln:19:34 |vpiName:InfoSel |vpiStmt: \_named_begin: (gen_invalid_region) @@ -1775,17 +1772,13 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiIndex: - \_ref_obj: (cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:cfgs_o.i |uhdmtopModules: \_module_inst: work@flash_ctrl_info_cfg (work@flash_ctrl_info_cfg), file:${SURELOG_DIR}/tests/ComplexBitSelect/dut.sv, line:12:1, endln:24:10 |vpiName:work@flash_ctrl_info_cfg @@ -2024,7 +2017,7 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_constant: , line:6:5, endln:6:6 |vpiParent: - \_operation: , line:3:44, endln:7:4 + \_operation: , line:19:9, endln:19:34 |vpiDecompile:2 |vpiSize:32 |UINT:2 @@ -2178,19 +2171,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[3].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[3].i), line:16:0 |vpiGenScopeArray: @@ -2240,19 +2229,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[4].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[4].i), line:16:0 |vpiGenScopeArray: @@ -2302,19 +2287,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[5].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[5].i), line:16:0 |vpiGenScopeArray: @@ -2364,19 +2345,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[6].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[6].i), line:16:0 |vpiGenScopeArray: @@ -2426,19 +2403,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[7].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[7].i), line:16:0 |vpiGenScopeArray: @@ -2488,19 +2461,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[8].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[8].i), line:16:0 |vpiGenScopeArray: @@ -2550,19 +2519,15 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o) - |vpiParent: - \_cont_assign: , line:20:14, endln:20:28 - |vpiName:cfgs_o - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o + \_cont_assign: , line:20:14, endln:20:28 |vpiName:cfgs_o |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o.i), line:20:21, endln:20:22 + \_ref_obj: (work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.i), line:20:21, endln:20:22 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o), line:20:14, endln:20:23 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.cfgs_o.i + |vpiFullName:work@flash_ctrl_info_cfg.gen_info_priv[9].gen_invalid_region.i |vpiActual: \_parameter: (work@flash_ctrl_info_cfg.gen_info_priv[9].i), line:16:0 =================== diff --git a/tests/ComplexEscaped/ComplexEscaped.log b/tests/ComplexEscaped/ComplexEscaped.log index 090db481d5..f6d3f9e61d 100644 --- a/tests/ComplexEscaped/ComplexEscaped.log +++ b/tests/ComplexEscaped/ComplexEscaped.log @@ -193,8 +193,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:3:11, endln:3:47 - |vpiParent: - \_assignment: , line:3:7, endln:3:47 |vpiDecompile:"\\/ _| __| | '_ \\ / _` / " |vpiSize:208 |STRING:\\/ _| __| | '_ \\ / _` / @@ -202,7 +200,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:3:7, endln:3:8 |vpiParent: - \_begin: (work@top), line:2:12, endln:4:7 + \_assignment: , line:3:7, endln:3:47 |vpiName:o |vpiFullName:work@top.o |vpiActual: diff --git a/tests/ComplexVarSelect/ComplexVarSelect.log b/tests/ComplexVarSelect/ComplexVarSelect.log index 3f9de3186f..7f8ba1e283 100644 --- a/tests/ComplexVarSelect/ComplexVarSelect.log +++ b/tests/ComplexVarSelect/ComplexVarSelect.log @@ -204,7 +204,6 @@ logic_var 4 module_inst 3 part_select 3 range 10 -ref_obj 4 var_select 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -219,7 +218,6 @@ logic_var 4 module_inst 3 part_select 3 range 10 -ref_obj 4 var_select 1 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ComplexVarSelect/slpp_all/surelog.uhdm ... @@ -439,12 +437,17 @@ design: (work@top) |vpiExpr: \_var_select: (iccm_bank_dout_hi), line:5:20, endln:5:63 |vpiName:iccm_bank_dout_hi + |vpiActual: + \_logic_var: (work@top.iccm_bank_dout_hi), line:2:21, endln:2:48 |vpiIndex: - \_part_select: , line:5:38, endln:5:57 + \_part_select: iccm_rw_addr_q (iccm_bank_dout_hi.iccm_rw_addr_q), line:5:38, endln:5:57 |vpiParent: - \_ref_obj: iccm_rw_addr_q (iccm_rw_addr_q), line:5:38, endln:5:52 - |vpiName:iccm_rw_addr_q - |vpiDefName:iccm_rw_addr_q + \_var_select: (iccm_bank_dout_hi), line:5:20, endln:5:63 + |vpiName:iccm_rw_addr_q + |vpiFullName:iccm_bank_dout_hi.iccm_rw_addr_q + |vpiDefName:iccm_rw_addr_q + |vpiActual: + \_logic_var: (work@top.iccm_rw_addr_q), line:3:16, endln:3:38 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:53, endln:5:54 @@ -459,9 +462,14 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiIndex: - \_part_select: , line:5:59, endln:5:62 + \_part_select: iccm_bank_dout_hi (iccm_bank_dout_hi.iccm_bank_dout_hi), line:5:59, endln:5:62 |vpiParent: \_var_select: (iccm_bank_dout_hi), line:5:20, endln:5:63 + |vpiName:iccm_bank_dout_hi + |vpiFullName:iccm_bank_dout_hi.iccm_bank_dout_hi + |vpiDefName:iccm_bank_dout_hi + |vpiActual: + \_logic_var: (work@top.iccm_bank_dout_hi), line:2:21, endln:2:48 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:59, endln:5:60 @@ -522,16 +530,18 @@ design: (work@top) |vpiVisibility:1 |vpiExpr: \_bit_select: (iccm_bank_dout_hi), line:6:20, endln:6:58 - |vpiParent: - \_ref_obj: (iccm_bank_dout_hi) - |vpiName:iccm_bank_dout_hi |vpiName:iccm_bank_dout_hi + |vpiActual: + \_logic_var: (work@top.iccm_bank_dout_hi), line:2:21, endln:2:48 |vpiIndex: - \_part_select: , line:6:38, endln:6:57 + \_part_select: iccm_rw_addr_q (iccm_bank_dout_hi.iccm_rw_addr_q), line:6:38, endln:6:57 |vpiParent: - \_ref_obj: iccm_rw_addr_q (iccm_rw_addr_q), line:6:38, endln:6:52 - |vpiName:iccm_rw_addr_q - |vpiDefName:iccm_rw_addr_q + \_bit_select: (iccm_bank_dout_hi), line:6:20, endln:6:58 + |vpiName:iccm_rw_addr_q + |vpiFullName:iccm_bank_dout_hi.iccm_rw_addr_q + |vpiDefName:iccm_rw_addr_q + |vpiActual: + \_logic_var: (work@top.iccm_rw_addr_q), line:3:16, endln:3:38 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:53, endln:6:54 diff --git a/tests/ConcatOrder/ConcatOrder.log b/tests/ConcatOrder/ConcatOrder.log index 20fee558b3..f9235d4dea 100644 --- a/tests/ConcatOrder/ConcatOrder.log +++ b/tests/ConcatOrder/ConcatOrder.log @@ -380,7 +380,7 @@ param_assign 42 parameter 50 range 12 ref_module 3 -ref_obj 50 +ref_obj 45 string_typespec 24 struct_typespec 34 sys_func_call 4 @@ -412,7 +412,7 @@ param_assign 42 parameter 50 range 12 ref_module 3 -ref_obj 50 +ref_obj 45 string_typespec 24 struct_typespec 34 sys_func_call 4 @@ -1521,16 +1521,12 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/ConcatOrder/dut.sv, line:39:2, endln:54:11 |vpiRhs: \_bit_select: (all_cfgs_gp), line:43:50, endln:43:74 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp |vpiIndex: - \_ref_obj: (all_cfgs_gp.bp_params_p), line:43:62, endln:43:73 + \_ref_obj: (bp_params_p), line:43:62, endln:43:73 |vpiParent: \_bit_select: (all_cfgs_gp), line:43:50, endln:43:74 |vpiName:bp_params_p - |vpiFullName:all_cfgs_gp.bp_params_p |vpiLhs: \_parameter: (work@testbench.proc_param_lp), line:43:34, endln:43:47 |vpiParamAssign: @@ -1886,10 +1882,9 @@ design: (work@testbench) \_module_inst: work@testbench (work@testbench), file:${SURELOG_DIR}/tests/ConcatOrder/dut.sv, line:39:2, endln:54:11 |vpiRhs: \_bit_select: (all_cfgs_gp), line:43:50, endln:43:74 - |vpiParent: - \_ref_obj: (all_cfgs_gp) - |vpiName:all_cfgs_gp |vpiName:all_cfgs_gp + |vpiActual: + \_parameter: (work@testbench.all_cfgs_gp), line:13:42, endln:13:53 |vpiIndex: \_constant: , line:43:62, endln:43:73 |vpiParent: diff --git a/tests/ConcatWidth/ConcatWidth.log b/tests/ConcatWidth/ConcatWidth.log index 592e27e3bc..cb2d319cf8 100644 --- a/tests/ConcatWidth/ConcatWidth.log +++ b/tests/ConcatWidth/ConcatWidth.log @@ -537,7 +537,7 @@ parameter 2 part_select 1 port 4 range 8 -ref_obj 13 +ref_obj 12 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -572,7 +572,7 @@ parameter 2 part_select 2 port 6 range 8 -ref_obj 23 +ref_obj 21 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ConcatWidth/slpp_all/surelog.uhdm ... @@ -1151,8 +1151,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:12:19, endln:12:20 - |vpiParent: - \_assignment: , line:12:9, endln:12:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1160,7 +1158,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.counter), line:12:9, endln:12:16 |vpiParent: - \_initial: , line:11:5, endln:12:21 + \_assignment: , line:12:9, endln:12:20 |vpiName:counter |vpiFullName:work@top.counter |vpiActual: @@ -1200,29 +1198,27 @@ design: (work@top) |vpiRhs: \_operation: , line:14:23, endln:14:80 |vpiParent: - \_begin: (work@top), line:13:27, endln:15:8 + \_assignment: , line:14:9, endln:14:80 |vpiOpType:24 |vpiOperand: - \_part_select: , line:14:23, endln:14:48 + \_part_select: counter (work@top.counter), line:14:23, endln:14:48 |vpiParent: - \_ref_obj: counter (work@top.counter), line:14:23, endln:14:30 - |vpiParent: - \_operation: , line:14:23, endln:14:80 - |vpiName:counter - |vpiFullName:work@top.counter - |vpiDefName:counter + \_operation: , line:14:23, endln:14:80 + |vpiName:counter + |vpiFullName:work@top.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:14:31, endln:14:45 |vpiParent: - \_begin: (work@top), line:13:27, endln:15:8 + \_part_select: counter (work@top.counter), line:14:23, endln:14:48 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@top.CounterWidth), line:14:31, endln:14:43 + \_ref_obj: (work@top.counter.CounterWidth), line:14:31, endln:14:43 |vpiParent: - \_begin: (work@top), line:13:27, endln:15:8 + \_operation: , line:14:31, endln:14:45 |vpiName:CounterWidth - |vpiFullName:work@top.CounterWidth + |vpiFullName:work@top.counter.CounterWidth |vpiOperand: \_constant: , line:14:44, endln:14:45 |vpiParent: @@ -1255,7 +1251,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.CounterWidth), line:14:53, endln:14:65 |vpiParent: - \_operation: , line:14:23, endln:14:80 + \_operation: , line:14:53, endln:14:67 |vpiName:CounterWidth |vpiFullName:work@top.CounterWidth |vpiOperand: @@ -1288,7 +1284,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.counter_upd), line:14:9, endln:14:20 |vpiParent: - \_begin: (work@top), line:13:27, endln:15:8 + \_assignment: , line:14:9, endln:14:80 |vpiName:counter_upd |vpiFullName:work@top.counter_upd |vpiActual: @@ -1587,21 +1583,19 @@ design: (work@top) \_assignment: , line:14:9, endln:14:80 |vpiOpType:24 |vpiOperand: - \_part_select: , line:14:23, endln:14:48 + \_part_select: counter (work@top.counter), line:14:23, endln:14:48 |vpiParent: - \_ref_obj: counter (work@top.counter), line:14:23, endln:14:30 - |vpiParent: - \_operation: , line:14:23, endln:14:80 - |vpiName:counter - |vpiFullName:work@top.counter - |vpiDefName:counter - |vpiActual: - \_logic_var: (work@top.counter), line:8:18, endln:8:25 + \_operation: , line:14:23, endln:14:80 + |vpiName:counter + |vpiFullName:work@top.counter + |vpiDefName:counter + |vpiActual: + \_logic_var: (work@top.counter), line:8:18, endln:8:25 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:14:31, endln:14:45 |vpiParent: - \_part_select: , line:14:23, endln:14:48 + \_part_select: counter (work@top.counter), line:14:23, endln:14:48 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.counter.CounterWidth), line:14:31, endln:14:43 @@ -1686,4 +1680,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/ConcatWidth/dut.sv | ${SURELOG_DIR}/build/regression/ConcatWidth/roundtrip/dut_000.sv | 7 | 18 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ConcatWidth/dut.sv | ${SURELOG_DIR}/build/regression/ConcatWidth/roundtrip/dut_000.sv | 8 | 18 | \ No newline at end of file diff --git a/tests/CondOpPrec/CondOpPred.log b/tests/CondOpPrec/CondOpPred.log index bbf2e309a0..ce06dae371 100644 --- a/tests/CondOpPrec/CondOpPred.log +++ b/tests/CondOpPrec/CondOpPred.log @@ -296,12 +296,12 @@ design: (work@top) |vpiOperand: \_operation: , line:11:30, endln:11:42 |vpiParent: - \_operation: , line:10:29, endln:11:51 + \_operation: , line:11:29, endln:11:51 |vpiOpType:21 |vpiOperand: \_ref_obj: (Width), line:11:30, endln:11:35 |vpiParent: - \_operation: , line:10:29, endln:11:51 + \_operation: , line:11:30, endln:11:42 |vpiName:Width |vpiOperand: \_constant: , line:11:39, endln:11:42 diff --git a/tests/ConstExpand/ConstExpand.log b/tests/ConstExpand/ConstExpand.log index 36dbb94359..e89110853c 100644 --- a/tests/ConstExpand/ConstExpand.log +++ b/tests/ConstExpand/ConstExpand.log @@ -183,7 +183,7 @@ logic_net 2 module_inst 3 operation 2 port 2 -ref_obj 6 +ref_obj 5 string_typespec 5 struct_typespec 1 struct_var 1 @@ -208,7 +208,7 @@ logic_net 2 module_inst 3 operation 2 port 3 -ref_obj 11 +ref_obj 9 string_typespec 5 struct_typespec 1 struct_var 1 @@ -340,7 +340,7 @@ design: (work@top) |vpiRhs: \_hier_path: (operation_i.operand_a[0+:32]), line:11:17, endln:11:45 |vpiParent: - \_case_item: , line:11:10, endln:11:46 + \_assignment: , line:11:13, endln:11:45 |vpiName:operation_i.operand_a[0+:32] |vpiActual: \_ref_obj: (operation_i), line:11:17, endln:11:28 @@ -348,10 +348,9 @@ design: (work@top) \_hier_path: (operation_i.operand_a[0+:32]), line:11:17, endln:11:45 |vpiName:operation_i |vpiActual: - \_indexed_part_select: , line:11:29, endln:11:44 - |vpiParent: - \_ref_obj: (operand_a) - |vpiName:operand_a + \_indexed_part_select: (operation_i.operand_a[0+:32]), line:11:29, endln:11:44 + |vpiName:operand_a + |vpiFullName:operation_i.operand_a[0+:32] |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -369,7 +368,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:11:13, endln:11:14 |vpiParent: - \_case_item: , line:11:10, endln:11:46 + \_assignment: , line:11:13, endln:11:45 |vpiName:o |vpiFullName:work@top.o |vpiActual: @@ -386,8 +385,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:12:23, endln:12:25 - |vpiParent: - \_assignment: , line:12:19, endln:12:25 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -395,7 +392,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:12:19, endln:12:20 |vpiParent: - \_case_item: , line:12:10, endln:12:26 + \_assignment: , line:12:19, endln:12:25 |vpiName:o |vpiFullName:work@top.o |vpiActual: @@ -507,13 +504,13 @@ design: (work@top) |vpiActual: \_struct_var: (work@top.operation_i), line:7:27, endln:7:38 |vpiActual: - \_indexed_part_select: , line:11:29, endln:11:44 + \_indexed_part_select: (operation_i.operand_a[0+:32]), line:11:29, endln:11:44 |vpiParent: - \_ref_obj: (work@top.operand_a) - |vpiParent: - \_hier_path: (operation_i.operand_a[0+:32]), line:11:17, endln:11:45 - |vpiName:operand_a - |vpiFullName:work@top.operand_a + \_hier_path: (operation_i.operand_a[0+:32]), line:11:17, endln:11:45 + |vpiName:operand_a + |vpiFullName:operation_i.operand_a[0+:32] + |vpiActual: + \_typespec_member: (operand_a), line:3:11, endln:3:20 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: diff --git a/tests/ConstantBits/ConstantBits.log b/tests/ConstantBits/ConstantBits.log index ea6febbd62..7eb8317c31 100644 --- a/tests/ConstantBits/ConstantBits.log +++ b/tests/ConstantBits/ConstantBits.log @@ -176,7 +176,7 @@ module_inst 5 operation 4 part_select 2 range 4 -ref_obj 4 +ref_obj 2 struct_net 1 struct_typespec 2 typespec_member 8 @@ -194,7 +194,7 @@ module_inst 5 operation 6 part_select 3 range 4 -ref_obj 6 +ref_obj 3 struct_net 1 struct_typespec 2 typespec_member 8 @@ -326,17 +326,17 @@ design: (work@dut) \_struct_typespec: (cpu_ctrl_t), line:3:17, endln:3:23 |vpiOpType:67 |vpiOperand: - \_part_select: , line:11:44, endln:11:80 + \_part_select: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:80 |vpiParent: - \_ref_obj: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:57 - |vpiParent: - \_operation: , line:11:32, endln:11:81 - |vpiName:csr_wdata_int - |vpiFullName:work@dut.csr_wdata_int - |vpiDefName:csr_wdata_int + \_operation: , line:11:32, endln:11:81 + |vpiName:csr_wdata_int + |vpiFullName:work@dut.csr_wdata_int + |vpiDefName:csr_wdata_int |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:11:58, endln:11:77 + |vpiParent: + \_part_select: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:80 |vpiOpType:11 |vpiOperand: \_constant: , line:11:58, endln:11:75 @@ -523,21 +523,19 @@ design: (work@dut) |vpiRefEndColumnNo:16 |vpiOpType:67 |vpiOperand: - \_part_select: , line:11:44, endln:11:80 + \_part_select: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:80 |vpiParent: - \_ref_obj: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:57 - |vpiParent: - \_operation: , line:11:32, endln:11:81 - |vpiName:csr_wdata_int - |vpiFullName:work@dut.csr_wdata_int - |vpiDefName:csr_wdata_int - |vpiActual: - \_logic_var: (work@dut.csr_wdata_int), line:10:22, endln:10:35 + \_operation: , line:11:32, endln:11:81 + |vpiName:csr_wdata_int + |vpiFullName:work@dut.csr_wdata_int + |vpiDefName:csr_wdata_int + |vpiActual: + \_logic_var: (work@dut.csr_wdata_int), line:10:22, endln:10:35 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:11:58, endln:11:77 |vpiParent: - \_part_select: , line:11:44, endln:11:80 + \_part_select: csr_wdata_int (work@dut.csr_wdata_int), line:11:44, endln:11:80 |vpiOpType:11 |vpiOperand: \_constant: , line:11:58, endln:11:75 @@ -558,7 +556,7 @@ design: (work@dut) |vpiRightRange: \_constant: , line:11:78, endln:11:79 |vpiParent: - \_part_select: , line:11:44, endln:11:80 + \_part_select: csr_wdata_int (csr_wdata_int), line:11:44, endln:11:80 |vpiDecompile:0 |vpiSize:64 |UINT:0 diff --git a/tests/ConstantRange/ConstantRange.log b/tests/ConstantRange/ConstantRange.log index baf72923ff..0b16294bc8 100644 --- a/tests/ConstantRange/ConstantRange.log +++ b/tests/ConstantRange/ConstantRange.log @@ -277,7 +277,7 @@ param_assign 6 parameter 14 range 21 ref_module 6 -ref_obj 29 +ref_obj 9 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -303,7 +303,7 @@ param_assign 6 parameter 14 range 21 ref_module 6 -ref_obj 29 +ref_obj 9 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -523,29 +523,22 @@ design: (work@dut) |vpiOperand: \_bit_select: (ConnectDioIn), line:12:10, endln:12:25 |vpiParent: - \_ref_obj: (ConnectDioIn) - |vpiParent: - \_operation: , line:12:10, endln:12:45 - |vpiName:ConnectDioIn + \_operation: , line:12:10, endln:12:45 |vpiName:ConnectDioIn |vpiIndex: - \_ref_obj: (ConnectDioIn.k), line:12:23, endln:12:24 + \_ref_obj: (k), line:12:23, endln:12:24 |vpiParent: \_bit_select: (ConnectDioIn), line:12:10, endln:12:25 |vpiName:k - |vpiFullName:ConnectDioIn.k |vpiOperand: \_bit_select: (ConnectDioOut), line:12:29, endln:12:45 |vpiParent: - \_ref_obj: (ConnectDioOut) - |vpiParent: - \_operation: , line:12:10, endln:12:45 - |vpiName:ConnectDioOut + \_operation: , line:12:10, endln:12:45 |vpiName:ConnectDioOut |vpiIndex: \_ref_obj: (k), line:12:43, endln:12:44 |vpiParent: - \_operation: , line:12:10, endln:12:45 + \_bit_select: (ConnectDioOut), line:12:29, endln:12:45 |vpiName:k |vpiStmt: \_named_begin: (gen_mio_inout) @@ -560,9 +553,6 @@ design: (work@dut) \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/ConstantRange/dut.sv, line:6:1, endln:21:10 |vpiCondition: \_bit_select: (ConnectDioIn), line:17:5, endln:17:20 - |vpiParent: - \_ref_obj: (ConnectDioIn) - |vpiName:ConnectDioIn |vpiName:ConnectDioIn |vpiIndex: \_constant: , line:17:18, endln:17:19 diff --git a/tests/CovMacro/CovMacro.log b/tests/CovMacro/CovMacro.log index 66aa6810cb..d154867fee 100644 --- a/tests/CovMacro/CovMacro.log +++ b/tests/CovMacro/CovMacro.log @@ -1309,7 +1309,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:12:9, endln:12:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:12:9, endln:12:52 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1360,7 +1360,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:13:9, endln:13:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:13:9, endln:13:48 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1424,7 +1424,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:14:9, endln:14:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:14:9, endln:14:58 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1488,7 +1488,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:15:9, endln:15:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:15:9, endln:15:59 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1539,7 +1539,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:16:9, endln:16:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:16:9, endln:16:48 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1582,7 +1582,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:17:9, endln:17:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:17:9, endln:17:45 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1638,7 +1638,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.r), line:18:9, endln:18:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:18:9, endln:18:51 |vpiName:r |vpiFullName:work@top.r |vpiActual: @@ -1673,7 +1673,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:19:9, endln:19:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:19:9, endln:19:45 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1708,7 +1708,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.i), line:20:9, endln:20:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:20:9, endln:20:44 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1753,7 +1753,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.r), line:23:9, endln:23:10 |vpiParent: - \_begin: (work@top), line:11:13, endln:24:8 + \_assignment: , line:23:9, endln:23:28 |vpiName:r |vpiFullName:work@top.r |vpiActual: diff --git a/tests/DefaultNetType/DefaultNetType.log b/tests/DefaultNetType/DefaultNetType.log index 91b31a494d..fc00645449 100644 --- a/tests/DefaultNetType/DefaultNetType.log +++ b/tests/DefaultNetType/DefaultNetType.log @@ -581,7 +581,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad1.__truncate_to_2_bits.i), line:19:24, endln:19:25 |vpiParent: - \_function: (work@bad1.__truncate_to_2_bits), line:18:1, endln:20:12 + \_assignment: , line:19:1, endln:19:25 |vpiName:i |vpiFullName:work@bad1.__truncate_to_2_bits.i |vpiActual: @@ -589,7 +589,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad1.__truncate_to_2_bits.__truncate_to_2_bits), line:19:1, endln:19:21 |vpiParent: - \_function: (work@bad1.__truncate_to_2_bits), line:18:1, endln:20:12 + \_assignment: , line:19:1, endln:19:25 |vpiName:__truncate_to_2_bits |vpiFullName:work@bad1.__truncate_to_2_bits.__truncate_to_2_bits |vpiActual: @@ -681,7 +681,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad2.S_A), line:34:21, endln:34:24 |vpiParent: - \_begin: (work@bad2), line:33:11, endln:35:4 + \_assignment: , line:34:5, endln:34:24 |vpiName:S_A |vpiFullName:work@bad2.S_A |vpiActual: @@ -689,7 +689,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad2.currentState), line:34:5, endln:34:17 |vpiParent: - \_begin: (work@bad2), line:33:11, endln:35:4 + \_assignment: , line:34:5, endln:34:24 |vpiName:currentState |vpiFullName:work@bad2.currentState |vpiActual: @@ -707,7 +707,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad2.nextState), line:36:21, endln:36:30 |vpiParent: - \_begin: (work@bad2), line:35:10, endln:37:4 + \_assignment: , line:36:5, endln:36:30 |vpiName:nextState |vpiFullName:work@bad2.nextState |vpiActual: @@ -715,7 +715,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad2.currentState), line:36:5, endln:36:17 |vpiParent: - \_begin: (work@bad2), line:35:10, endln:37:4 + \_assignment: , line:36:5, endln:36:30 |vpiName:currentState |vpiFullName:work@bad2.currentState |vpiActual: @@ -762,7 +762,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad2.READ), line:41:33, endln:41:37 |vpiParent: - \_case_item: , line:41:13, endln:41:38 + \_assignment: , line:41:21, endln:41:37 |vpiName:READ |vpiFullName:work@bad2.READ |vpiActual: @@ -770,7 +770,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad2.operation), line:41:21, endln:41:30 |vpiParent: - \_case_item: , line:41:13, endln:41:38 + \_assignment: , line:41:21, endln:41:37 |vpiName:operation |vpiFullName:work@bad2.operation |vpiCaseItem: @@ -794,7 +794,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad2.WRITE), line:42:33, endln:42:38 |vpiParent: - \_case_item: , line:42:13, endln:42:39 + \_assignment: , line:42:21, endln:42:38 |vpiName:WRITE |vpiFullName:work@bad2.WRITE |vpiActual: @@ -802,7 +802,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad2.operation), line:42:21, endln:42:30 |vpiParent: - \_case_item: , line:42:13, endln:42:39 + \_assignment: , line:42:21, endln:42:38 |vpiName:operation |vpiFullName:work@bad2.operation |vpiCaseItem: @@ -818,7 +818,7 @@ design: (work@ok) |vpiRhs: \_ref_obj: (work@bad2.NONE), line:43:34, endln:43:38 |vpiParent: - \_case_item: , line:43:13, endln:43:39 + \_assignment: , line:43:22, endln:43:38 |vpiName:NONE |vpiFullName:work@bad2.NONE |vpiActual: @@ -826,7 +826,7 @@ design: (work@ok) |vpiLhs: \_ref_obj: (work@bad2.operation), line:43:22, endln:43:31 |vpiParent: - \_case_item: , line:43:13, endln:43:39 + \_assignment: , line:43:22, endln:43:38 |vpiName:operation |vpiFullName:work@bad2.operation |vpiAlwaysType:2 @@ -1024,7 +1024,7 @@ design: (work@ok) |vpiName:__truncate_to_2_bits |vpiFullName:work@bad1.__truncate_to_2_bits.__truncate_to_2_bits |vpiActual: - \_logic_var: , line:18:10, endln:18:15 + \_logic_var: (__truncate_to_2_bits), line:18:10, endln:18:15 |vpiInstance: \_module_inst: work@bad1 (work@bad1), file:${SURELOG_DIR}/tests/DefaultNetType/dut.sv, line:14:1, endln:22:10 |vpiNet: diff --git a/tests/DefaultPatternInt/DefaultPatternInt.log b/tests/DefaultPatternInt/DefaultPatternInt.log index 3414cc1fb3..95bf848763 100644 --- a/tests/DefaultPatternInt/DefaultPatternInt.log +++ b/tests/DefaultPatternInt/DefaultPatternInt.log @@ -427,7 +427,7 @@ param_assign 26 parameter 28 range 17 ref_module 1 -ref_obj 15 +ref_obj 7 string_typespec 6 sys_task_call 1 tagged_pattern 6 @@ -460,7 +460,7 @@ param_assign 26 parameter 28 range 17 ref_module 1 -ref_obj 21 +ref_obj 11 string_typespec 6 sys_task_call 2 tagged_pattern 6 @@ -1204,17 +1204,13 @@ design: (work@main) |vpiRhs: \_bit_select: (work@top.ASSIGN_VADDR.V), line:13:28, endln:13:32 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:13:10, endln:13:32 - |vpiName:V - |vpiFullName:work@top.ASSIGN_VADDR.V + \_assignment: , line:13:10, endln:13:32 |vpiName:V |vpiFullName:work@top.ASSIGN_VADDR.V |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:13:30, endln:13:31 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:12:35, endln:14:8 + \_bit_select: (work@top.ASSIGN_VADDR.V), line:13:28, endln:13:32 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -1222,17 +1218,15 @@ design: (work@main) |vpiLhs: \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:13:10, endln:13:25 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:13:10, endln:13:32 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + \_assignment: , line:13:10, endln:13:32 |vpiName:ASSIGN_VADDR |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:11:17, endln:11:35 |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:13:23, endln:13:24 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:12:35, endln:14:8 + \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:13:10, endln:13:25 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -1249,10 +1243,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:19:5, endln:19:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:19:5, endln:19:18 - |vpiName:VADDR + \_operation: , line:19:5, endln:19:18 |vpiName:VADDR |vpiIndex: \_constant: , line:19:11, endln:19:12 @@ -1282,10 +1273,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:22:5, endln:22:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:22:5, endln:22:18 - |vpiName:VADDR + \_operation: , line:22:5, endln:22:18 |vpiName:VADDR |vpiIndex: \_constant: , line:22:11, endln:22:12 @@ -1315,10 +1303,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:26:5, endln:26:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:26:5, endln:26:18 - |vpiName:VADDR + \_operation: , line:26:5, endln:26:18 |vpiName:VADDR |vpiIndex: \_constant: , line:26:11, endln:26:12 @@ -1575,14 +1560,14 @@ design: (work@main) |vpiExpr: \_constant: , line:19:5, endln:19:10 |vpiParent: - \_array_expr: + \_operation: , line:19:5, endln:19:18 |vpiDecompile:3 |UINT:3 |vpiConstType:9 |vpiExpr: \_constant: , line:22:5, endln:22:10 |vpiParent: - \_array_expr: + \_operation: , line:26:5, endln:26:18 |vpiDecompile:3 |UINT:3 |vpiConstType:9 @@ -1677,47 +1662,35 @@ design: (work@main) |vpiRhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:13:28, endln:13:32 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:13:10, endln:13:32 - |vpiName:V - |vpiFullName:work@main.top1.ASSIGN_VADDR.V - |vpiActual: - \_parameter: (work@main.top1.V), line:4:25, endln:4:26 + \_assignment: , line:13:10, endln:13:32 |vpiName:V |vpiFullName:work@main.top1.ASSIGN_VADDR.V + |vpiActual: + \_parameter: (work@main.top1.V), line:4:25, endln:4:26 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V.i), line:13:30, endln:13:31 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:13:30, endln:13:31 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:13:28, endln:13:32 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.V.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:12:14, endln:12:15 - |vpiActual: - \_parameter: (work@main.top1.V), line:4:25, endln:4:26 |vpiLhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:13:10, endln:13:25 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:13:10, endln:13:32 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR - |vpiActual: - \_array_var: , line:11:17, endln:11:35 + \_assignment: , line:13:10, endln:13:32 |vpiName:ASSIGN_VADDR |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:11:17, endln:11:35 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i), line:13:23, endln:13:24 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:13:23, endln:13:24 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:13:10, endln:13:25 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:12:14, endln:12:15 - |vpiActual: - \_array_var: , line:11:17, endln:11:35 |vpiInstance: \_module_inst: work@top (work@main.top1), file:${SURELOG_DIR}/tests/DefaultPatternInt/dut.sv, line:33:1, endln:33:16 |vpiInstance: diff --git a/tests/DefaultPatternModule/DefaultPatternModule.log b/tests/DefaultPatternModule/DefaultPatternModule.log index cc0e24c2a8..310f44fea9 100644 --- a/tests/DefaultPatternModule/DefaultPatternModule.log +++ b/tests/DefaultPatternModule/DefaultPatternModule.log @@ -415,7 +415,7 @@ param_assign 18 parameter 18 range 8 ref_module 1 -ref_obj 21 +ref_obj 13 string_typespec 2 sys_task_call 1 tagged_pattern 2 @@ -446,7 +446,7 @@ param_assign 18 parameter 18 range 8 ref_module 1 -ref_obj 28 +ref_obj 18 string_typespec 2 sys_task_call 2 tagged_pattern 2 @@ -787,17 +787,13 @@ design: (work@main) |vpiRhs: \_bit_select: (work@top.ASSIGN_VADDR.V), line:10:28, endln:10:32 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:10:10, endln:10:32 - |vpiName:V - |vpiFullName:work@top.ASSIGN_VADDR.V + \_assignment: , line:10:10, endln:10:32 |vpiName:V |vpiFullName:work@top.ASSIGN_VADDR.V |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:10:30, endln:10:31 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:9:35, endln:11:8 + \_bit_select: (work@top.ASSIGN_VADDR.V), line:10:28, endln:10:32 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -805,17 +801,15 @@ design: (work@main) |vpiLhs: \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:10:10, endln:10:25 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:10:10, endln:10:32 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + \_assignment: , line:10:10, endln:10:32 |vpiName:ASSIGN_VADDR |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:8:17, endln:8:35 |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:10:23, endln:10:24 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:9:35, endln:11:8 + \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:10:10, endln:10:25 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -832,10 +826,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:16:5, endln:16:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:16:5, endln:16:18 - |vpiName:VADDR + \_operation: , line:16:5, endln:16:18 |vpiName:VADDR |vpiIndex: \_constant: , line:16:11, endln:16:12 @@ -865,10 +856,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:19:5, endln:19:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:19:5, endln:19:18 - |vpiName:VADDR + \_operation: , line:19:5, endln:19:18 |vpiName:VADDR |vpiIndex: \_constant: , line:19:11, endln:19:12 @@ -898,10 +886,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:23:5, endln:23:13 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:23:5, endln:23:18 - |vpiName:VADDR + \_operation: , line:23:5, endln:23:18 |vpiName:VADDR |vpiIndex: \_constant: , line:23:11, endln:23:12 @@ -1130,7 +1115,7 @@ design: (work@main) |vpiExpr: \_constant: , line:16:5, endln:16:10 |vpiParent: - \_operation: , line:16:5, endln:16:18 + \_operation: , line:23:5, endln:23:18 |vpiDecompile:3 |UINT:3 |vpiConstType:9 @@ -1231,47 +1216,35 @@ design: (work@main) |vpiRhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:10:28, endln:10:32 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V) - |vpiParent: - \_assignment: , line:10:10, endln:10:32 - |vpiName:V - |vpiFullName:work@main.top1.ASSIGN_VADDR.V - |vpiActual: - \_parameter: (work@main.top1.V), line:5:25, endln:5:26 + \_assignment: , line:10:10, endln:10:32 |vpiName:V |vpiFullName:work@main.top1.ASSIGN_VADDR.V + |vpiActual: + \_parameter: (work@main.top1.V), line:5:25, endln:5:26 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.V.i), line:10:30, endln:10:31 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:10:30, endln:10:31 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.V), line:10:28, endln:10:32 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.V.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:9:14, endln:9:15 - |vpiActual: - \_parameter: (work@main.top1.V), line:5:25, endln:5:26 |vpiLhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:10:10, endln:10:25 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:10:10, endln:10:32 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR - |vpiActual: - \_array_var: , line:8:17, endln:8:35 + \_assignment: , line:10:10, endln:10:32 |vpiName:ASSIGN_VADDR |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:8:17, endln:8:35 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i), line:10:23, endln:10:24 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:10:23, endln:10:24 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:10:10, endln:10:25 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:9:14, endln:9:15 - |vpiActual: - \_array_var: , line:8:17, endln:8:35 |vpiInstance: \_module_inst: work@top (work@main.top1), file:${SURELOG_DIR}/tests/DefaultPatternModule/dut.sv, line:30:1, endln:30:16 |vpiInstance: diff --git a/tests/DeferAssert/DeferAssert.log b/tests/DeferAssert/DeferAssert.log index 1068524c09..18c5df6960 100644 --- a/tests/DeferAssert/DeferAssert.log +++ b/tests/DeferAssert/DeferAssert.log @@ -90,7 +90,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.a), line:3:23, endln:3:24 |vpiParent: - \_initial: , line:3:3, endln:3:31 + \_operation: , line:3:23, endln:3:29 |vpiName:a |vpiFullName:work@top.a |vpiActual: diff --git a/tests/DelayAssign/DelayAssign.log b/tests/DelayAssign/DelayAssign.log index bbd88976dd..ef6f1724b2 100644 --- a/tests/DelayAssign/DelayAssign.log +++ b/tests/DelayAssign/DelayAssign.log @@ -1010,7 +1010,7 @@ package 2 part_select 3 port 24 range 29 -ref_obj 59 +ref_obj 56 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -1046,7 +1046,7 @@ package 2 part_select 6 port 36 range 29 -ref_obj 105 +ref_obj 99 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/DelayAssign/slpp_all/surelog.uhdm ... @@ -1934,7 +1934,7 @@ design: (work@SimDTM) |vpiRhs: \_ref_obj: (work@SimDTM.reset), line:57:16, endln:57:21 |vpiParent: - \_begin: (work@SimDTM), line:56:3, endln:78:6 + \_assignment: , line:57:5, endln:57:21 |vpiName:reset |vpiFullName:work@SimDTM.reset |vpiActual: @@ -1942,7 +1942,7 @@ design: (work@SimDTM) |vpiLhs: \_ref_obj: (work@SimDTM.r_reset), line:57:5, endln:57:12 |vpiParent: - \_begin: (work@SimDTM), line:56:3, endln:78:6 + \_assignment: , line:57:5, endln:57:21 |vpiName:r_reset |vpiFullName:work@SimDTM.r_reset |vpiActual: @@ -1959,7 +1959,7 @@ design: (work@SimDTM) |vpiOperand: \_ref_obj: (work@SimDTM.reset), line:58:9, endln:58:14 |vpiParent: - \_begin: (work@SimDTM), line:56:3, endln:78:6 + \_operation: , line:58:9, endln:58:25 |vpiName:reset |vpiFullName:work@SimDTM.reset |vpiActual: @@ -1985,8 +1985,6 @@ design: (work@SimDTM) |vpiBlocking:1 |vpiRhs: \_constant: , line:60:27, endln:60:28 - |vpiParent: - \_assignment: , line:60:7, endln:60:28 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1994,7 +1992,7 @@ design: (work@SimDTM) |vpiLhs: \_ref_obj: (work@SimDTM.__debug_req_valid), line:60:7, endln:60:24 |vpiParent: - \_begin: (work@SimDTM), line:59:5, endln:63:8 + \_assignment: , line:60:7, endln:60:28 |vpiName:__debug_req_valid |vpiFullName:work@SimDTM.__debug_req_valid |vpiActual: @@ -2007,8 +2005,6 @@ design: (work@SimDTM) |vpiBlocking:1 |vpiRhs: \_constant: , line:61:28, endln:61:29 - |vpiParent: - \_assignment: , line:61:7, endln:61:29 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2016,7 +2012,7 @@ design: (work@SimDTM) |vpiLhs: \_ref_obj: (work@SimDTM.__debug_resp_ready), line:61:7, endln:61:25 |vpiParent: - \_begin: (work@SimDTM), line:59:5, endln:63:8 + \_assignment: , line:61:7, endln:61:29 |vpiName:__debug_resp_ready |vpiFullName:work@SimDTM.__debug_resp_ready |vpiActual: @@ -2029,8 +2025,6 @@ design: (work@SimDTM) |vpiBlocking:1 |vpiRhs: \_constant: , line:62:16, endln:62:17 - |vpiParent: - \_assignment: , line:62:7, endln:62:17 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2038,7 +2032,7 @@ design: (work@SimDTM) |vpiLhs: \_ref_obj: (work@SimDTM.__exit), line:62:7, endln:62:13 |vpiParent: - \_begin: (work@SimDTM), line:59:5, endln:63:8 + \_assignment: , line:62:7, endln:62:17 |vpiName:__exit |vpiFullName:work@SimDTM.__exit |vpiActual: @@ -2056,85 +2050,74 @@ design: (work@SimDTM) |vpiBlocking:1 |vpiRhs: \_func_call: (debug_tick), line:66:16, endln:76:8 - |vpiParent: - \_assignment: , line:66:7, endln:76:8 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_req_valid), line:67:9, endln:67:26 + \_ref_obj: (__debug_req_valid), line:67:9, endln:67:26 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_req_valid - |vpiFullName:work@SimDTM.__debug_req_valid |vpiActual: \_bit_var: (work@SimDTM.__debug_req_valid), line:41:7, endln:41:24 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_req_ready), line:68:9, endln:68:26 + \_ref_obj: (__debug_req_ready), line:68:9, endln:68:26 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_req_ready - |vpiFullName:work@SimDTM.__debug_req_ready |vpiActual: \_logic_net: (work@SimDTM.__debug_req_ready), line:36:13, endln:36:30 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_req_bits_addr), line:69:9, endln:69:30 + \_ref_obj: (__debug_req_bits_addr), line:69:9, endln:69:30 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_req_bits_addr - |vpiFullName:work@SimDTM.__debug_req_bits_addr |vpiActual: \_int_var: (work@SimDTM.__debug_req_bits_addr), line:42:7, endln:42:28 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_req_bits_op), line:70:9, endln:70:28 + \_ref_obj: (__debug_req_bits_op), line:70:9, endln:70:28 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_req_bits_op - |vpiFullName:work@SimDTM.__debug_req_bits_op |vpiActual: \_int_var: (work@SimDTM.__debug_req_bits_op), line:43:7, endln:43:26 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_req_bits_data), line:71:9, endln:71:30 + \_ref_obj: (__debug_req_bits_data), line:71:9, endln:71:30 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_req_bits_data - |vpiFullName:work@SimDTM.__debug_req_bits_data |vpiActual: \_int_var: (work@SimDTM.__debug_req_bits_data), line:44:7, endln:44:28 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_resp_valid), line:72:9, endln:72:27 + \_ref_obj: (__debug_resp_valid), line:72:9, endln:72:27 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_resp_valid - |vpiFullName:work@SimDTM.__debug_resp_valid |vpiActual: \_logic_net: (work@SimDTM.__debug_resp_valid), line:37:13, endln:37:31 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_resp_ready), line:73:9, endln:73:27 + \_ref_obj: (__debug_resp_ready), line:73:9, endln:73:27 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_resp_ready - |vpiFullName:work@SimDTM.__debug_resp_ready |vpiActual: \_bit_var: (work@SimDTM.__debug_resp_ready), line:45:7, endln:45:25 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_resp_bits_resp), line:74:9, endln:74:31 + \_ref_obj: (__debug_resp_bits_resp), line:74:9, endln:74:31 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_resp_bits_resp - |vpiFullName:work@SimDTM.__debug_resp_bits_resp |vpiActual: \_logic_net: (work@SimDTM.__debug_resp_bits_resp), line:38:20, endln:38:42 |vpiArgument: - \_ref_obj: (work@SimDTM.__debug_resp_bits_data), line:75:9, endln:75:31 + \_ref_obj: (__debug_resp_bits_data), line:75:9, endln:75:31 |vpiParent: \_func_call: (debug_tick), line:66:16, endln:76:8 |vpiName:__debug_resp_bits_data - |vpiFullName:work@SimDTM.__debug_resp_bits_data |vpiActual: \_logic_net: (work@SimDTM.__debug_resp_bits_data), line:39:20, endln:39:42 |vpiName:debug_tick |vpiLhs: \_ref_obj: (work@SimDTM.__exit), line:66:7, endln:66:13 |vpiParent: - \_begin: (work@SimDTM), line:65:5, endln:77:8 + \_assignment: , line:66:7, endln:76:8 |vpiName:__exit |vpiFullName:work@SimDTM.__exit |vpiActual: @@ -2177,14 +2160,12 @@ design: (work@SimDTM) |UINT:0 |vpiConstType:9 |vpiRhs: - \_part_select: , line:49:37, endln:49:63 + \_part_select: __debug_req_bits_addr (work@SimDTM.__debug_req_bits_addr), line:49:37, endln:49:63 |vpiParent: - \_ref_obj: __debug_req_bits_addr (work@SimDTM.__debug_req_bits_addr), line:49:37, endln:49:58 - |vpiParent: - \_cont_assign: , line:49:15, endln:49:63 - |vpiName:__debug_req_bits_addr - |vpiFullName:work@SimDTM.__debug_req_bits_addr - |vpiDefName:__debug_req_bits_addr + \_cont_assign: , line:49:15, endln:49:63 + |vpiName:__debug_req_bits_addr + |vpiFullName:work@SimDTM.__debug_req_bits_addr + |vpiDefName:__debug_req_bits_addr |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:49:59, endln:49:60 @@ -2217,14 +2198,12 @@ design: (work@SimDTM) |UINT:0 |vpiConstType:9 |vpiRhs: - \_part_select: , line:50:35, endln:50:59 + \_part_select: __debug_req_bits_op (work@SimDTM.__debug_req_bits_op), line:50:35, endln:50:59 |vpiParent: - \_ref_obj: __debug_req_bits_op (work@SimDTM.__debug_req_bits_op), line:50:35, endln:50:54 - |vpiParent: - \_cont_assign: , line:50:15, endln:50:59 - |vpiName:__debug_req_bits_op - |vpiFullName:work@SimDTM.__debug_req_bits_op - |vpiDefName:__debug_req_bits_op + \_cont_assign: , line:50:15, endln:50:59 + |vpiName:__debug_req_bits_op + |vpiFullName:work@SimDTM.__debug_req_bits_op + |vpiDefName:__debug_req_bits_op |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:50:55, endln:50:56 @@ -2257,14 +2236,12 @@ design: (work@SimDTM) |UINT:0 |vpiConstType:9 |vpiRhs: - \_part_select: , line:51:37, endln:51:64 + \_part_select: __debug_req_bits_data (work@SimDTM.__debug_req_bits_data), line:51:37, endln:51:64 |vpiParent: - \_ref_obj: __debug_req_bits_data (work@SimDTM.__debug_req_bits_data), line:51:37, endln:51:58 - |vpiParent: - \_cont_assign: , line:51:15, endln:51:64 - |vpiName:__debug_req_bits_data - |vpiFullName:work@SimDTM.__debug_req_bits_data - |vpiDefName:__debug_req_bits_data + \_cont_assign: , line:51:15, endln:51:64 + |vpiName:__debug_req_bits_data + |vpiFullName:work@SimDTM.__debug_req_bits_data + |vpiDefName:__debug_req_bits_data |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:51:59, endln:51:61 @@ -3373,16 +3350,14 @@ design: (work@SimDTM) |vpiDelay: \_constant: , line:49:10, endln:49:14 |vpiRhs: - \_part_select: , line:49:37, endln:49:63 + \_part_select: __debug_req_bits_addr (work@SimDTM.__debug_req_bits_addr), line:49:37, endln:49:63 |vpiParent: - \_ref_obj: __debug_req_bits_addr (work@SimDTM.__debug_req_bits_addr), line:49:37, endln:49:58 - |vpiParent: - \_cont_assign: , line:49:15, endln:49:63 - |vpiName:__debug_req_bits_addr - |vpiFullName:work@SimDTM.__debug_req_bits_addr - |vpiDefName:__debug_req_bits_addr - |vpiActual: - \_int_var: (work@SimDTM.__debug_req_bits_addr), line:42:7, endln:42:28 + \_cont_assign: , line:49:15, endln:49:63 + |vpiName:__debug_req_bits_addr + |vpiFullName:work@SimDTM.__debug_req_bits_addr + |vpiDefName:__debug_req_bits_addr + |vpiActual: + \_int_var: (work@SimDTM.__debug_req_bits_addr), line:42:7, endln:42:28 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:49:59, endln:49:60 @@ -3403,16 +3378,14 @@ design: (work@SimDTM) |vpiDelay: \_constant: , line:50:10, endln:50:14 |vpiRhs: - \_part_select: , line:50:35, endln:50:59 + \_part_select: __debug_req_bits_op (work@SimDTM.__debug_req_bits_op), line:50:35, endln:50:59 |vpiParent: - \_ref_obj: __debug_req_bits_op (work@SimDTM.__debug_req_bits_op), line:50:35, endln:50:54 - |vpiParent: - \_cont_assign: , line:50:15, endln:50:59 - |vpiName:__debug_req_bits_op - |vpiFullName:work@SimDTM.__debug_req_bits_op - |vpiDefName:__debug_req_bits_op - |vpiActual: - \_int_var: (work@SimDTM.__debug_req_bits_op), line:43:7, endln:43:26 + \_cont_assign: , line:50:15, endln:50:59 + |vpiName:__debug_req_bits_op + |vpiFullName:work@SimDTM.__debug_req_bits_op + |vpiDefName:__debug_req_bits_op + |vpiActual: + \_int_var: (work@SimDTM.__debug_req_bits_op), line:43:7, endln:43:26 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:50:55, endln:50:56 @@ -3433,16 +3406,14 @@ design: (work@SimDTM) |vpiDelay: \_constant: , line:51:10, endln:51:14 |vpiRhs: - \_part_select: , line:51:37, endln:51:64 + \_part_select: __debug_req_bits_data (work@SimDTM.__debug_req_bits_data), line:51:37, endln:51:64 |vpiParent: - \_ref_obj: __debug_req_bits_data (work@SimDTM.__debug_req_bits_data), line:51:37, endln:51:58 - |vpiParent: - \_cont_assign: , line:51:15, endln:51:64 - |vpiName:__debug_req_bits_data - |vpiFullName:work@SimDTM.__debug_req_bits_data - |vpiDefName:__debug_req_bits_data - |vpiActual: - \_int_var: (work@SimDTM.__debug_req_bits_data), line:44:7, endln:44:28 + \_cont_assign: , line:51:15, endln:51:64 + |vpiName:__debug_req_bits_data + |vpiFullName:work@SimDTM.__debug_req_bits_data + |vpiDefName:__debug_req_bits_data + |vpiActual: + \_int_var: (work@SimDTM.__debug_req_bits_data), line:44:7, endln:44:28 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:51:59, endln:51:61 diff --git a/tests/DoWhile/DoWhile.log b/tests/DoWhile/DoWhile.log index 0a5905f64f..9a714ad883 100644 --- a/tests/DoWhile/DoWhile.log +++ b/tests/DoWhile/DoWhile.log @@ -378,7 +378,7 @@ logic_var 1 method_func_call 4 operation 2 package 5 -ref_obj 14 +ref_obj 12 task 9 wait_stmt 2 === UHDM Object Stats End === @@ -405,7 +405,7 @@ logic_var 1 method_func_call 8 operation 4 package 5 -ref_obj 30 +ref_obj 26 task 18 wait_stmt 4 === UHDM Object Stats End === @@ -493,25 +493,23 @@ design: (unnamed) \_operation: , line:7:11, endln:7:49 |vpiName:m_sync[i].m_state |vpiActual: - \_bit_select: (m_sync), line:7:11, endln:7:17 + \_bit_select: (m_sync[i]), line:7:11, endln:7:17 |vpiParent: - \_ref_obj: (toto::uvm_default_factory::print::m_sync[i]) - |vpiParent: - \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 - |vpiName:m_sync[i] - |vpiFullName:toto::uvm_default_factory::print::m_sync[i] + \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 |vpiName:m_sync + |vpiFullName:m_sync[i] |vpiIndex: - \_ref_obj: (toto::uvm_default_factory::print::m_sync[i]::i), line:7:18, endln:7:19 + \_ref_obj: (toto::uvm_default_factory::print::m_sync[i].m_state::i), line:7:18, endln:7:19 |vpiParent: - \_bit_select: (m_sync), line:7:11, endln:7:17 + \_bit_select: (m_sync[i]), line:7:11, endln:7:17 |vpiName:i - |vpiFullName:toto::uvm_default_factory::print::m_sync[i]::i + |vpiFullName:toto::uvm_default_factory::print::m_sync[i].m_state::i |vpiActual: - \_ref_obj: (m_state), line:7:21, endln:7:28 + \_ref_obj: (toto::uvm_default_factory::print::m_state), line:7:21, endln:7:28 |vpiParent: \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 |vpiName:m_state + |vpiFullName:toto::uvm_default_factory::print::m_state |vpiOperand: \_ref_obj: (toto::uvm_default_factory::print::UVM_PHASE_SYNCING), line:7:32, endln:7:49 |vpiParent: @@ -639,25 +637,23 @@ design: (unnamed) \_operation: , line:7:11, endln:7:49 |vpiName:m_sync[i].m_state |vpiActual: - \_bit_select: (m_sync), line:7:11, endln:7:17 + \_bit_select: (m_sync[i]), line:7:11, endln:7:17 |vpiParent: - \_ref_obj: (toto::uvm_default_factory::print::m_sync[i]) - |vpiParent: - \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 - |vpiName:m_sync[i] - |vpiFullName:toto::uvm_default_factory::print::m_sync[i] + \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 |vpiName:m_sync + |vpiFullName:m_sync[i] |vpiIndex: - \_ref_obj: (toto::uvm_default_factory::print::m_sync[i]::i), line:7:18, endln:7:19 + \_ref_obj: (toto::uvm_default_factory::print::m_sync[i].m_state::i), line:7:18, endln:7:19 |vpiParent: - \_bit_select: (m_sync), line:7:11, endln:7:17 + \_bit_select: (m_sync[i]), line:7:11, endln:7:17 |vpiName:i - |vpiFullName:toto::uvm_default_factory::print::m_sync[i]::i + |vpiFullName:toto::uvm_default_factory::print::m_sync[i].m_state::i |vpiActual: - \_ref_obj: (m_state), line:7:21, endln:7:28 + \_ref_obj: (toto::uvm_default_factory::print::m_state), line:7:21, endln:7:28 |vpiParent: \_hier_path: (m_sync[i].m_state), line:7:11, endln:7:28 |vpiName:m_state + |vpiFullName:toto::uvm_default_factory::print::m_state |vpiOperand: \_ref_obj: (toto::uvm_default_factory::print::UVM_PHASE_SYNCING), line:7:32, endln:7:49 |vpiParent: diff --git a/tests/DollarBitsUnary/DollarBitsUnary.log b/tests/DollarBitsUnary/DollarBitsUnary.log index c836f2e9d3..ed33e6b0cf 100644 --- a/tests/DollarBitsUnary/DollarBitsUnary.log +++ b/tests/DollarBitsUnary/DollarBitsUnary.log @@ -169,7 +169,7 @@ operation 4 part_select 1 port 2 range 7 -ref_obj 5 +ref_obj 4 struct_typespec 1 sys_func_call 1 typespec_member 1 @@ -188,7 +188,7 @@ operation 6 part_select 2 port 3 range 7 -ref_obj 9 +ref_obj 7 struct_typespec 1 sys_func_call 2 typespec_member 1 @@ -302,17 +302,17 @@ design: (work@top) |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/DollarBitsUnary/dut.sv, line:1:1, endln:9:10 |vpiRhs: - \_part_select: , line:8:15, endln:8:37 + \_part_select: dr_x (work@top.dr_x), line:8:15, endln:8:37 |vpiParent: - \_ref_obj: dr_x (work@top.dr_x), line:8:15, endln:8:19 - |vpiParent: - \_cont_assign: , line:8:11, endln:8:37 - |vpiName:dr_x - |vpiFullName:work@top.dr_x - |vpiDefName:dr_x + \_cont_assign: , line:8:11, endln:8:37 + |vpiName:dr_x + |vpiFullName:work@top.dr_x + |vpiDefName:dr_x |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:8:20, endln:8:34 + |vpiParent: + \_part_select: dr_x (work@top.dr_x), line:8:15, endln:8:37 |vpiOpType:11 |vpiOperand: \_sys_func_call: ($bits), line:8:20, endln:8:32 @@ -324,10 +324,11 @@ design: (work@top) \_sys_func_call: ($bits), line:8:20, endln:8:32 |vpiOpType:4 |vpiOperand: - \_ref_obj: (dr_q), line:8:27, endln:8:31 + \_ref_obj: (work@top.dr_x.dr_q), line:8:27, endln:8:31 |vpiParent: \_operation: , line:8:26, endln:8:27 |vpiName:dr_q + |vpiFullName:work@top.dr_x.dr_q |vpiActual: \_logic_var: (work@top.dr_q), line:6:28, endln:6:32 |vpiName:$bits @@ -476,19 +477,17 @@ design: (work@top) |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/DollarBitsUnary/dut.sv, line:1:1, endln:9:10 |vpiRhs: - \_part_select: , line:8:15, endln:8:37 + \_part_select: dr_x (work@top.dr_x), line:8:15, endln:8:37 |vpiParent: - \_ref_obj: dr_x (work@top.dr_x), line:8:15, endln:8:19 - |vpiParent: - \_cont_assign: , line:8:11, endln:8:37 - |vpiName:dr_x - |vpiFullName:work@top.dr_x - |vpiDefName:dr_x + \_cont_assign: , line:8:11, endln:8:37 + |vpiName:dr_x + |vpiFullName:work@top.dr_x + |vpiDefName:dr_x |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:8:20, endln:8:34 |vpiParent: - \_part_select: , line:8:15, endln:8:37 + \_part_select: dr_x (work@top.dr_x), line:8:15, endln:8:37 |vpiOpType:11 |vpiOperand: \_sys_func_call: ($bits), line:8:20, endln:8:32 diff --git a/tests/DollarRoot/DollarRoot.log b/tests/DollarRoot/DollarRoot.log index 73e4060a1c..e295d33c49 100644 --- a/tests/DollarRoot/DollarRoot.log +++ b/tests/DollarRoot/DollarRoot.log @@ -6802,7 +6802,7 @@ param_assign 20 parameter 20 port 4 range 41 -ref_obj 620 +ref_obj 579 ref_var 6 return_stmt 11 string_typespec 2 @@ -6867,7 +6867,7 @@ param_assign 20 parameter 20 port 6 range 41 -ref_obj 1217 +ref_obj 1135 ref_var 10 return_stmt 22 string_typespec 2 @@ -6928,7 +6928,7 @@ wait_stmt 2 [ERR:UH0725] ${SURELOG_DIR}/tests/DollarRoot/dut.sv:464:32: Unresolved hierarchical reference "$root.tb.dut.slave_1.get_command_byte_enable". -[ERR:UH0725] ${SURELOG_DIR}/tests/DollarRoot/dut.sv:802:13: Unresolved hierarchical reference "$root.tb.dut.master_0[2].signal_write_response_complete". +[ERR:UH0725] ${SURELOG_DIR}/tests/DollarRoot/dut.sv:802:13: Unresolved hierarchical reference "$root.tb.dut.master_02.signal_write_response_complete". [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/DollarRoot/slpp_all/surelog.uhdm ... @@ -7803,7 +7803,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.Command.ADDR_W), line:49:15, endln:49:21 |vpiParent: - \_struct_typespec: (Command), line:45:12, endln:45:18 + \_operation: , line:49:15, endln:49:23 |vpiName:ADDR_W |vpiFullName:work@test_program.Command.ADDR_W |vpiActual: @@ -7850,7 +7850,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.Command.DATA_W), line:50:15, endln:50:21 |vpiParent: - \_struct_typespec: (Command), line:45:12, endln:45:18 + \_operation: , line:50:15, endln:50:23 |vpiName:DATA_W |vpiFullName:work@test_program.Command.DATA_W |vpiActual: @@ -7897,7 +7897,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.Command.NUM_SYMBOLS), line:51:15, endln:51:26 |vpiParent: - \_struct_typespec: (Command), line:45:12, endln:45:18 + \_operation: , line:51:15, endln:51:28 |vpiName:NUM_SYMBOLS |vpiFullName:work@test_program.Command.NUM_SYMBOLS |vpiActual: @@ -8069,7 +8069,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.Response.DATA_W), line:59:14, endln:59:20 |vpiParent: - \_struct_typespec: (Response), line:56:12, endln:56:18 + \_operation: , line:59:14, endln:59:22 |vpiName:DATA_W |vpiFullName:work@test_program.Response.DATA_W |vpiActual: @@ -8172,10 +8172,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (addr), line:227:53, endln:227:57 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.addr), line:227:53, endln:227:57 |vpiParent: \_hier_path: (cmd.addr), line:227:49, endln:227:57 |vpiName:addr + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.addr |vpiName:$root.tb.dut.master_0.set_command_address |vpiStmt: \_func_call: ($root.tb.dut.master_0.set_command_burst_count), line:228:7, endln:228:68 @@ -8194,10 +8195,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:228:57, endln:228:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:228:57, endln:228:67 |vpiParent: \_hier_path: (cmd.burstcount), line:228:53, endln:228:67 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiName:$root.tb.dut.master_0.set_command_burst_count |vpiStmt: \_func_call: ($root.tb.dut.master_0.set_command_burst_size), line:229:7, endln:229:67 @@ -8216,10 +8218,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:229:56, endln:229:66 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:229:56, endln:229:66 |vpiParent: \_hier_path: (cmd.burstcount), line:229:52, endln:229:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiName:$root.tb.dut.master_0.set_command_burst_size |vpiStmt: \_func_call: ($root.tb.dut.master_0.set_command_init_latency), line:230:7, endln:230:68 @@ -8238,10 +8241,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (cmd_delay), line:230:58, endln:230:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.cmd_delay), line:230:58, endln:230:67 |vpiParent: \_hier_path: (cmd.cmd_delay), line:230:54, endln:230:67 |vpiName:cmd_delay + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd_delay |vpiName:$root.tb.dut.master_0.set_command_init_latency |vpiStmt: \_if_else: , line:232:7, endln:242:10 @@ -8255,7 +8259,7 @@ design: (work@top) |vpiOperand: \_hier_path: (cmd.trans), line:232:11, endln:232:20 |vpiParent: - \_begin: (work@test_program.configure_and_push_command_to_master_0) + \_operation: , line:232:11, endln:232:29 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd), line:232:11, endln:232:14 @@ -8265,10 +8269,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (trans), line:232:15, endln:232:20 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.trans), line:232:15, endln:232:20 |vpiParent: \_hier_path: (cmd.trans), line:232:11, endln:232:20 |vpiName:trans + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.trans |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.WRITE), line:232:24, endln:232:29 |vpiParent: @@ -8361,10 +8366,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:234:34, endln:234:44 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:234:34, endln:234:44 |vpiParent: \_hier_path: (cmd.burstcount), line:234:30, endln:234:44 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_command_to_master_0), line:234:51, endln:238:13 |vpiParent: @@ -8389,17 +8395,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data) - |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_data), line:235:13, endln:235:67 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data + \_func_call: ($root.tb.dut.master_0.set_command_data), line:235:13, endln:235:67 |vpiName:data |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.i), line:235:61, endln:235:62 |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_data), line:235:13, endln:235:67 + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_0.i |vpiActual: @@ -8432,17 +8434,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_0.byteenable) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.byteenable) - |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_byte_enable), line:236:13, endln:236:80 - |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.byteenable + \_func_call: ($root.tb.dut.master_0.set_command_byte_enable), line:236:13, endln:236:80 |vpiName:byteenable |vpiFullName:work@test_program.configure_and_push_command_to_master_0.byteenable |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.i), line:236:74, endln:236:75 |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_byte_enable), line:236:13, endln:236:80 + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.byteenable) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_0.i |vpiActual: @@ -8475,17 +8473,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data_idles) - |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_idle), line:237:13, endln:237:73 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles + \_func_call: ($root.tb.dut.master_0.set_command_idle), line:237:13, endln:237:73 |vpiName:data_idles |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.i), line:237:67, endln:237:68 |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_idle), line:237:13, endln:237:73 + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_0.i |vpiActual: @@ -8536,11 +8530,7 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data_idles) - |vpiParent: - \_func_call: ($root.tb.dut.master_0.set_command_idle), line:241:10, endln:241:70 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles + \_func_call: ($root.tb.dut.master_0.set_command_idle), line:241:10, endln:241:70 |vpiName:data_idles |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles |vpiIndex: @@ -8639,7 +8629,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.burstcount), line:271:7, endln:271:21 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_0) + \_assignment: , line:271:7, endln:271:74 |vpiName:rsp.burstcount |vpiActual: \_ref_obj: (rsp) @@ -8719,10 +8709,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: - \_ref_obj: (burstcount), line:272:31, endln:272:41 + \_ref_obj: (work@test_program.get_read_response_from_master_0.burstcount), line:272:31, endln:272:41 |vpiParent: \_hier_path: (rsp.burstcount), line:272:27, endln:272:41 |vpiName:burstcount + |vpiFullName:work@test_program.get_read_response_from_master_0.burstcount |vpiStmt: \_begin: (work@test_program.get_read_response_from_master_0), line:272:48, endln:274:10 |vpiParent: @@ -8768,7 +8759,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.data[i]), line:273:10, endln:273:21 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_0), line:272:48, endln:274:10 + \_assignment: , line:273:10, endln:273:69 |vpiName:rsp.data[i] |vpiActual: \_ref_obj: (rsp) @@ -8778,21 +8769,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: - \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i]), line:273:14, endln:273:18 + \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i].data), line:273:14, endln:273:18 |vpiParent: - \_ref_obj: (work@test_program.get_read_response_from_master_0.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:273:10, endln:273:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i] + \_hier_path: (rsp.data[i]), line:273:10, endln:273:21 |vpiName:data - |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i] + |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.get_read_response_from_master_0.i), line:273:19, endln:273:20 + \_ref_obj: (work@test_program.get_read_response_from_master_0.rsp.data[i].i), line:273:19, endln:273:20 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_0), line:272:48, endln:274:10 + \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i].data), line:273:14, endln:273:18 |vpiName:i - |vpiFullName:work@test_program.get_read_response_from_master_0.i + |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.get_read_response_from_master_0.i), line:272:16, endln:272:17 |vpiStmt: @@ -8881,7 +8868,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.burstcount), line:314:7, endln:314:21 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0) + \_assignment: , line:314:7, endln:314:79 |vpiName:cmd.burstcount |vpiActual: \_ref_obj: (cmd) @@ -8935,7 +8922,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.addr), line:315:7, endln:315:15 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0) + \_assignment: , line:315:7, endln:315:75 |vpiName:cmd.addr |vpiActual: \_ref_obj: (cmd) @@ -9011,7 +8998,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.get_command_from_slave_0.WRITE), line:318:22, endln:318:27 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:317:68, endln:323:10 + \_assignment: , line:318:10, endln:318:27 |vpiName:WRITE |vpiFullName:work@test_program.get_command_from_slave_0.WRITE |vpiActual: @@ -9019,7 +9006,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.trans), line:318:10, endln:318:19 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:317:68, endln:323:10 + \_assignment: , line:318:10, endln:318:27 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd) @@ -9099,10 +9086,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_ref_obj: (burstcount), line:319:33, endln:319:43 + \_ref_obj: (work@test_program.get_command_from_slave_0.burstcount), line:319:33, endln:319:43 |vpiParent: \_hier_path: (cmd.burstcount), line:319:29, endln:319:43 |vpiName:burstcount + |vpiFullName:work@test_program.get_command_from_slave_0.burstcount |vpiStmt: \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 |vpiParent: @@ -9148,7 +9136,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.data[i]), line:320:13, endln:320:24 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 + \_assignment: , line:320:13, endln:320:72 |vpiName:cmd.data[i] |vpiActual: \_ref_obj: (cmd) @@ -9158,21 +9146,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i]), line:320:17, endln:320:21 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i].data), line:320:17, endln:320:21 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:320:13, endln:320:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i] + \_hier_path: (cmd.data[i]), line:320:13, endln:320:24 |vpiName:data - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i] + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.get_command_from_slave_0.i), line:320:22, endln:320:23 + \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.data[i].i), line:320:22, endln:320:23 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i].data), line:320:17, endln:320:21 |vpiName:i - |vpiFullName:work@test_program.get_command_from_slave_0.i + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_0.i), line:319:18, endln:319:19 |vpiStmt: @@ -9215,7 +9199,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.byteenable[i]), line:321:13, endln:321:30 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 + \_assignment: , line:321:13, endln:321:79 |vpiName:cmd.byteenable[i] |vpiActual: \_ref_obj: (cmd) @@ -9225,21 +9209,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i]), line:321:17, endln:321:27 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable), line:321:17, endln:321:27 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:321:13, endln:321:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i] + \_hier_path: (cmd.byteenable[i]), line:321:13, endln:321:30 |vpiName:byteenable - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i] + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable |vpiIndex: - \_ref_obj: (work@test_program.get_command_from_slave_0.i), line:321:28, endln:321:29 + \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].i), line:321:28, endln:321:29 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:319:50, endln:322:13 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable), line:321:17, endln:321:27 |vpiName:i - |vpiFullName:work@test_program.get_command_from_slave_0.i + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_0.i), line:319:18, endln:319:19 |vpiElseStmt: @@ -9256,7 +9236,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.get_command_from_slave_0.READ), line:324:22, endln:324:26 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:323:16, endln:325:10 + \_assignment: , line:324:10, endln:324:26 |vpiName:READ |vpiFullName:work@test_program.get_command_from_slave_0.READ |vpiActual: @@ -9264,7 +9244,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.trans), line:324:10, endln:324:19 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_0), line:323:16, endln:325:10 + \_assignment: , line:324:10, endln:324:26 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd) @@ -9353,10 +9333,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:347:56, endln:347:66 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:347:56, endln:347:66 |vpiParent: \_hier_path: (rsp.burstcount), line:347:52, endln:347:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiName:$root.tb.dut.slave_0.set_response_burst_size |vpiStmt: \_for_stmt: (work@test_program.configure_and_push_response_to_slave_0), line:348:7, endln:348:10 @@ -9424,10 +9405,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:348:31, endln:348:41 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:348:31, endln:348:41 |vpiParent: \_hier_path: (rsp.burstcount), line:348:27, endln:348:41 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:348:48, endln:359:10 |vpiParent: @@ -9452,17 +9434,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.data) - |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_data), line:349:10, endln:349:64 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.data + \_func_call: ($root.tb.dut.slave_0.set_response_data), line:349:10, endln:349:64 |vpiName:data |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.data |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:349:58, endln:349:59 |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_data), line:349:10, endln:349:64 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.data) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9488,7 +9466,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:351:14, endln:351:15 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:348:48, endln:359:10 + \_operation: , line:351:14, endln:351:20 |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9518,7 +9496,7 @@ design: (work@top) |vpiOperand: \_hier_path: (rsp.latency[i]), line:352:55, endln:352:69 |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:352:13, endln:352:103 + \_operation: , line:352:55, endln:352:99 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:352:55, endln:352:58 @@ -9530,17 +9508,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:352:13, endln:352:103 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:352:13, endln:352:103 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:352:67, endln:352:68 |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:352:13, endln:352:103 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9571,7 +9545,7 @@ design: (work@top) |vpiRhs: \_hier_path: (rsp.latency[i]), line:353:37, endln:353:51 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:351:22, endln:354:13 + \_assignment: , line:353:13, endln:353:51 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:353:37, endln:353:40 @@ -9583,17 +9557,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:351:22, endln:354:13 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + \_assignment: , line:353:13, endln:353:51 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:353:49, endln:353:50 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:351:22, endln:354:13 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9601,7 +9571,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.read_response_latency), line:353:13, endln:353:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:351:22, endln:354:13 + \_assignment: , line:353:13, endln:353:51 |vpiName:read_response_latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.read_response_latency |vpiActual: @@ -9630,17 +9600,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:355:13, endln:355:73 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:355:13, endln:355:73 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:355:67, endln:355:68 |vpiParent: - \_func_call: ($root.tb.dut.slave_0.set_response_latency), line:355:13, endln:355:73 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9663,12 +9629,12 @@ design: (work@top) |vpiRhs: \_operation: , line:356:37, endln:356:75 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:354:19, endln:357:13 + \_assignment: , line:356:13, endln:356:75 |vpiOpType:24 |vpiOperand: \_hier_path: (rsp.latency[i]), line:356:37, endln:356:51 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:354:19, endln:357:13 + \_operation: , line:356:37, endln:356:75 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:356:37, endln:356:40 @@ -9680,17 +9646,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:354:19, endln:357:13 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + \_assignment: , line:356:13, endln:356:75 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.i), line:356:49, endln:356:50 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:354:19, endln:357:13 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.i |vpiActual: @@ -9706,7 +9668,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.read_response_latency), line:356:13, endln:356:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0), line:354:19, endln:357:13 + \_assignment: , line:356:13, endln:356:75 |vpiName:read_response_latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.read_response_latency |vpiActual: @@ -9725,22 +9687,22 @@ design: (work@top) |vpiRhs: \_operation: , line:361:37, endln:361:109 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0) + \_assignment: , line:361:7, endln:361:109 |vpiOpType:24 |vpiOperand: \_operation: , line:361:37, endln:361:105 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0) + \_operation: , line:361:37, endln:361:109 |vpiOpType:24 |vpiOperand: \_operation: , line:361:37, endln:361:88 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0) + \_operation: , line:361:37, endln:361:105 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.pending_read_cycles_slave_0), line:361:37, endln:361:64 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0) + \_operation: , line:361:37, endln:361:88 |vpiName:pending_read_cycles_slave_0 |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.pending_read_cycles_slave_0 |vpiActual: @@ -9766,10 +9728,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:361:95, endln:361:105 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:361:95, endln:361:105 |vpiParent: \_hier_path: (rsp.burstcount), line:361:91, endln:361:105 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiOperand: \_constant: , line:361:108, endln:361:109 |vpiParent: @@ -9781,7 +9744,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.pending_read_cycles_slave_0), line:361:7, endln:361:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_0) + \_assignment: , line:361:7, endln:361:109 |vpiName:pending_read_cycles_slave_0 |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.pending_read_cycles_slave_0 |vpiActual: @@ -9824,10 +9787,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (addr), line:370:53, endln:370:57 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.addr), line:370:53, endln:370:57 |vpiParent: \_hier_path: (cmd.addr), line:370:49, endln:370:57 |vpiName:addr + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.addr |vpiName:$root.tb.dut.master_1.set_command_address |vpiStmt: \_func_call: ($root.tb.dut.master_1.set_command_burst_count), line:371:7, endln:371:68 @@ -9846,10 +9810,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:371:57, endln:371:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:371:57, endln:371:67 |vpiParent: \_hier_path: (cmd.burstcount), line:371:53, endln:371:67 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiName:$root.tb.dut.master_1.set_command_burst_count |vpiStmt: \_func_call: ($root.tb.dut.master_1.set_command_burst_size), line:372:7, endln:372:67 @@ -9868,10 +9833,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:372:56, endln:372:66 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:372:56, endln:372:66 |vpiParent: \_hier_path: (cmd.burstcount), line:372:52, endln:372:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiName:$root.tb.dut.master_1.set_command_burst_size |vpiStmt: \_func_call: ($root.tb.dut.master_1.set_command_init_latency), line:373:7, endln:373:68 @@ -9890,10 +9856,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (cmd_delay), line:373:58, endln:373:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.cmd_delay), line:373:58, endln:373:67 |vpiParent: \_hier_path: (cmd.cmd_delay), line:373:54, endln:373:67 |vpiName:cmd_delay + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd_delay |vpiName:$root.tb.dut.master_1.set_command_init_latency |vpiStmt: \_if_else: , line:375:7, endln:385:10 @@ -9907,7 +9874,7 @@ design: (work@top) |vpiOperand: \_hier_path: (cmd.trans), line:375:11, endln:375:20 |vpiParent: - \_begin: (work@test_program.configure_and_push_command_to_master_1) + \_operation: , line:375:11, endln:375:29 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd), line:375:11, endln:375:14 @@ -9917,10 +9884,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (trans), line:375:15, endln:375:20 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.trans), line:375:15, endln:375:20 |vpiParent: \_hier_path: (cmd.trans), line:375:11, endln:375:20 |vpiName:trans + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.trans |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.WRITE), line:375:24, endln:375:29 |vpiParent: @@ -10013,10 +9981,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:377:34, endln:377:44 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:377:34, endln:377:44 |vpiParent: \_hier_path: (cmd.burstcount), line:377:30, endln:377:44 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_command_to_master_1), line:377:51, endln:381:13 |vpiParent: @@ -10041,17 +10010,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data) - |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_data), line:378:13, endln:378:67 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data + \_func_call: ($root.tb.dut.master_1.set_command_data), line:378:13, endln:378:67 |vpiName:data |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.i), line:378:61, endln:378:62 |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_data), line:378:13, endln:378:67 + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_1.i |vpiActual: @@ -10084,17 +10049,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_1.byteenable) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.byteenable) - |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_byte_enable), line:379:13, endln:379:80 - |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.byteenable + \_func_call: ($root.tb.dut.master_1.set_command_byte_enable), line:379:13, endln:379:80 |vpiName:byteenable |vpiFullName:work@test_program.configure_and_push_command_to_master_1.byteenable |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.i), line:379:74, endln:379:75 |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_byte_enable), line:379:13, endln:379:80 + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.byteenable) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_1.i |vpiActual: @@ -10127,17 +10088,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data_idles) - |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_idle), line:380:13, endln:380:73 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles + \_func_call: ($root.tb.dut.master_1.set_command_idle), line:380:13, endln:380:73 |vpiName:data_idles |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.i), line:380:67, endln:380:68 |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_idle), line:380:13, endln:380:73 + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) |vpiName:i |vpiFullName:work@test_program.configure_and_push_command_to_master_1.i |vpiActual: @@ -10188,11 +10145,7 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data_idles) - |vpiParent: - \_func_call: ($root.tb.dut.master_1.set_command_idle), line:384:10, endln:384:70 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles + \_func_call: ($root.tb.dut.master_1.set_command_idle), line:384:10, endln:384:70 |vpiName:data_idles |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles |vpiIndex: @@ -10291,7 +10244,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.burstcount), line:414:7, endln:414:21 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_1) + \_assignment: , line:414:7, endln:414:74 |vpiName:rsp.burstcount |vpiActual: \_ref_obj: (rsp) @@ -10371,10 +10324,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: - \_ref_obj: (burstcount), line:415:31, endln:415:41 + \_ref_obj: (work@test_program.get_read_response_from_master_1.burstcount), line:415:31, endln:415:41 |vpiParent: \_hier_path: (rsp.burstcount), line:415:27, endln:415:41 |vpiName:burstcount + |vpiFullName:work@test_program.get_read_response_from_master_1.burstcount |vpiStmt: \_begin: (work@test_program.get_read_response_from_master_1), line:415:48, endln:417:10 |vpiParent: @@ -10420,7 +10374,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.data[i]), line:416:10, endln:416:21 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_1), line:415:48, endln:417:10 + \_assignment: , line:416:10, endln:416:69 |vpiName:rsp.data[i] |vpiActual: \_ref_obj: (rsp) @@ -10430,21 +10384,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: - \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i]), line:416:14, endln:416:18 + \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i].data), line:416:14, endln:416:18 |vpiParent: - \_ref_obj: (work@test_program.get_read_response_from_master_1.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:416:10, endln:416:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i] + \_hier_path: (rsp.data[i]), line:416:10, endln:416:21 |vpiName:data - |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i] + |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.get_read_response_from_master_1.i), line:416:19, endln:416:20 + \_ref_obj: (work@test_program.get_read_response_from_master_1.rsp.data[i].i), line:416:19, endln:416:20 |vpiParent: - \_begin: (work@test_program.get_read_response_from_master_1), line:415:48, endln:417:10 + \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i].data), line:416:14, endln:416:18 |vpiName:i - |vpiFullName:work@test_program.get_read_response_from_master_1.i + |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.get_read_response_from_master_1.i), line:415:16, endln:415:17 |vpiStmt: @@ -10533,7 +10483,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.burstcount), line:457:7, endln:457:21 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1) + \_assignment: , line:457:7, endln:457:79 |vpiName:cmd.burstcount |vpiActual: \_ref_obj: (cmd) @@ -10587,7 +10537,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.addr), line:458:7, endln:458:15 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1) + \_assignment: , line:458:7, endln:458:75 |vpiName:cmd.addr |vpiActual: \_ref_obj: (cmd) @@ -10663,7 +10613,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.get_command_from_slave_1.WRITE), line:461:22, endln:461:27 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:460:68, endln:466:10 + \_assignment: , line:461:10, endln:461:27 |vpiName:WRITE |vpiFullName:work@test_program.get_command_from_slave_1.WRITE |vpiActual: @@ -10671,7 +10621,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.trans), line:461:10, endln:461:19 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:460:68, endln:466:10 + \_assignment: , line:461:10, endln:461:27 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd) @@ -10751,10 +10701,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_ref_obj: (burstcount), line:462:33, endln:462:43 + \_ref_obj: (work@test_program.get_command_from_slave_1.burstcount), line:462:33, endln:462:43 |vpiParent: \_hier_path: (cmd.burstcount), line:462:29, endln:462:43 |vpiName:burstcount + |vpiFullName:work@test_program.get_command_from_slave_1.burstcount |vpiStmt: \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 |vpiParent: @@ -10800,7 +10751,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.data[i]), line:463:13, endln:463:24 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 + \_assignment: , line:463:13, endln:463:72 |vpiName:cmd.data[i] |vpiActual: \_ref_obj: (cmd) @@ -10810,21 +10761,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i]), line:463:17, endln:463:21 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i].data), line:463:17, endln:463:21 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:463:13, endln:463:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i] + \_hier_path: (cmd.data[i]), line:463:13, endln:463:24 |vpiName:data - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i] + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.get_command_from_slave_1.i), line:463:22, endln:463:23 + \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.data[i].i), line:463:22, endln:463:23 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i].data), line:463:17, endln:463:21 |vpiName:i - |vpiFullName:work@test_program.get_command_from_slave_1.i + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_1.i), line:462:18, endln:462:19 |vpiStmt: @@ -10867,7 +10814,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.byteenable[i]), line:464:13, endln:464:30 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 + \_assignment: , line:464:13, endln:464:79 |vpiName:cmd.byteenable[i] |vpiActual: \_ref_obj: (cmd) @@ -10877,21 +10824,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i]), line:464:17, endln:464:27 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable), line:464:17, endln:464:27 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:464:13, endln:464:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i] + \_hier_path: (cmd.byteenable[i]), line:464:13, endln:464:30 |vpiName:byteenable - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i] + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable |vpiIndex: - \_ref_obj: (work@test_program.get_command_from_slave_1.i), line:464:28, endln:464:29 + \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].i), line:464:28, endln:464:29 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:462:50, endln:465:13 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable), line:464:17, endln:464:27 |vpiName:i - |vpiFullName:work@test_program.get_command_from_slave_1.i + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_1.i), line:462:18, endln:462:19 |vpiElseStmt: @@ -10908,7 +10851,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.get_command_from_slave_1.READ), line:467:22, endln:467:26 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:466:16, endln:468:10 + \_assignment: , line:467:10, endln:467:26 |vpiName:READ |vpiFullName:work@test_program.get_command_from_slave_1.READ |vpiActual: @@ -10916,7 +10859,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.trans), line:467:10, endln:467:19 |vpiParent: - \_begin: (work@test_program.get_command_from_slave_1), line:466:16, endln:468:10 + \_assignment: , line:467:10, endln:467:26 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd) @@ -11005,10 +10948,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:490:56, endln:490:66 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:490:56, endln:490:66 |vpiParent: \_hier_path: (rsp.burstcount), line:490:52, endln:490:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiName:$root.tb.dut.slave_1.set_response_burst_size |vpiStmt: \_for_stmt: (work@test_program.configure_and_push_response_to_slave_1), line:491:7, endln:491:10 @@ -11076,10 +11020,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:491:31, endln:491:41 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:491:31, endln:491:41 |vpiParent: \_hier_path: (rsp.burstcount), line:491:27, endln:491:41 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiStmt: \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:491:48, endln:502:10 |vpiParent: @@ -11104,17 +11049,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.data) - |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_data), line:492:10, endln:492:64 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.data + \_func_call: ($root.tb.dut.slave_1.set_response_data), line:492:10, endln:492:64 |vpiName:data |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.data |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:492:58, endln:492:59 |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_data), line:492:10, endln:492:64 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.data) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11140,7 +11081,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:494:14, endln:494:15 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:491:48, endln:502:10 + \_operation: , line:494:14, endln:494:20 |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11170,7 +11111,7 @@ design: (work@top) |vpiOperand: \_hier_path: (rsp.latency[i]), line:495:55, endln:495:69 |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:495:13, endln:495:103 + \_operation: , line:495:55, endln:495:99 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:495:55, endln:495:58 @@ -11182,17 +11123,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:495:13, endln:495:103 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:495:13, endln:495:103 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:495:67, endln:495:68 |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:495:13, endln:495:103 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11223,7 +11160,7 @@ design: (work@top) |vpiRhs: \_hier_path: (rsp.latency[i]), line:496:37, endln:496:51 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:494:22, endln:497:13 + \_assignment: , line:496:13, endln:496:51 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:496:37, endln:496:40 @@ -11235,17 +11172,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:494:22, endln:497:13 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + \_assignment: , line:496:13, endln:496:51 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:496:49, endln:496:50 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:494:22, endln:497:13 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11253,7 +11186,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.read_response_latency), line:496:13, endln:496:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:494:22, endln:497:13 + \_assignment: , line:496:13, endln:496:51 |vpiName:read_response_latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.read_response_latency |vpiActual: @@ -11282,17 +11215,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:498:13, endln:498:73 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:498:13, endln:498:73 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:498:67, endln:498:68 |vpiParent: - \_func_call: ($root.tb.dut.slave_1.set_response_latency), line:498:13, endln:498:73 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11315,12 +11244,12 @@ design: (work@top) |vpiRhs: \_operation: , line:499:37, endln:499:75 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:497:19, endln:500:13 + \_assignment: , line:499:13, endln:499:75 |vpiOpType:24 |vpiOperand: \_hier_path: (rsp.latency[i]), line:499:37, endln:499:51 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:497:19, endln:500:13 + \_operation: , line:499:37, endln:499:75 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp), line:499:37, endln:499:40 @@ -11332,17 +11261,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:497:19, endln:500:13 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + \_assignment: , line:499:13, endln:499:75 |vpiName:latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency |vpiIndex: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.i), line:499:49, endln:499:50 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:497:19, endln:500:13 + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) |vpiName:i |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.i |vpiActual: @@ -11358,7 +11283,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.read_response_latency), line:499:13, endln:499:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1), line:497:19, endln:500:13 + \_assignment: , line:499:13, endln:499:75 |vpiName:read_response_latency |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.read_response_latency |vpiActual: @@ -11377,22 +11302,22 @@ design: (work@top) |vpiRhs: \_operation: , line:504:37, endln:504:109 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1) + \_assignment: , line:504:7, endln:504:109 |vpiOpType:24 |vpiOperand: \_operation: , line:504:37, endln:504:105 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1) + \_operation: , line:504:37, endln:504:109 |vpiOpType:24 |vpiOperand: \_operation: , line:504:37, endln:504:88 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1) + \_operation: , line:504:37, endln:504:105 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.pending_read_cycles_slave_1), line:504:37, endln:504:64 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1) + \_operation: , line:504:37, endln:504:88 |vpiName:pending_read_cycles_slave_1 |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.pending_read_cycles_slave_1 |vpiActual: @@ -11418,10 +11343,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:504:95, endln:504:105 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:504:95, endln:504:105 |vpiParent: \_hier_path: (rsp.burstcount), line:504:91, endln:504:105 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiOperand: \_constant: , line:504:108, endln:504:109 |vpiParent: @@ -11433,7 +11359,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.pending_read_cycles_slave_1), line:504:7, endln:504:34 |vpiParent: - \_begin: (work@test_program.configure_and_push_response_to_slave_1) + \_assignment: , line:504:7, endln:504:109 |vpiName:pending_read_cycles_slave_1 |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.pending_read_cycles_slave_1 |vpiActual: @@ -11635,7 +11561,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.master_send_commands.master_id), line:557:10, endln:557:19 |vpiParent: - \_begin: (work@test_program.master_send_commands), line:554:45, endln:566:10 + \_assignment: , line:557:10, endln:557:47 |vpiName:master_id |vpiFullName:work@test_program.master_send_commands.master_id |vpiActual: @@ -11683,7 +11609,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.master_send_commands.slave_id), line:558:10, endln:558:18 |vpiParent: - \_begin: (work@test_program.master_send_commands), line:554:45, endln:566:10 + \_assignment: , line:558:10, endln:558:47 |vpiName:slave_id |vpiFullName:work@test_program.master_send_commands.slave_id |vpiActual: @@ -11728,7 +11654,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.master_send_commands.cmd), line:560:10, endln:560:13 |vpiParent: - \_begin: (work@test_program.master_send_commands), line:554:45, endln:566:10 + \_assignment: , line:560:10, endln:564:11 |vpiName:cmd |vpiFullName:work@test_program.master_send_commands.cmd |vpiActual: @@ -11824,7 +11750,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.create_command.burstmode), line:578:11, endln:578:20 |vpiParent: - \_begin: (work@test_program.create_command) + \_operation: , line:578:11, endln:578:29 |vpiName:burstmode |vpiFullName:work@test_program.create_command.burstmode |vpiActual: @@ -11858,7 +11784,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.burstcount), line:579:10, endln:579:24 |vpiParent: - \_begin: (work@test_program.create_command), line:578:31, endln:580:10 + \_assignment: , line:579:10, endln:579:61 |vpiName:cmd.burstcount |vpiActual: \_ref_obj: (cmd) @@ -11885,8 +11811,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:581:39, endln:581:40 - |vpiParent: - \_assignment: , line:581:10, endln:581:40 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11894,7 +11818,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.burstcount), line:581:10, endln:581:24 |vpiParent: - \_begin: (work@test_program.create_command), line:580:16, endln:582:10 + \_assignment: , line:581:10, endln:581:40 |vpiName:cmd.burstcount |vpiActual: \_ref_obj: (cmd) @@ -11917,7 +11841,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.create_command.trans), line:584:36, endln:584:41 |vpiParent: - \_begin: (work@test_program.create_command) + \_assignment: , line:584:7, endln:584:41 |vpiName:trans |vpiFullName:work@test_program.create_command.trans |vpiActual: @@ -11925,7 +11849,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.trans), line:584:7, endln:584:16 |vpiParent: - \_begin: (work@test_program.create_command) + \_assignment: , line:584:7, endln:584:41 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd) @@ -11965,7 +11889,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.addr), line:585:7, endln:585:15 |vpiParent: - \_begin: (work@test_program.create_command) + \_assignment: , line:585:7, endln:585:77 |vpiName:cmd.addr |vpiActual: \_ref_obj: (cmd) @@ -12007,7 +11931,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.cmd_delay), line:586:7, endln:586:20 |vpiParent: - \_begin: (work@test_program.create_command) + \_assignment: , line:586:7, endln:586:71 |vpiName:cmd.cmd_delay |vpiActual: \_ref_obj: (cmd) @@ -12033,7 +11957,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.create_command.trans), line:588:11, endln:588:16 |vpiParent: - \_begin: (work@test_program.create_command) + \_operation: , line:588:11, endln:588:25 |vpiName:trans |vpiFullName:work@test_program.create_command.trans |vpiActual: @@ -12117,10 +12041,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_ref_obj: (burstcount), line:589:34, endln:589:44 + \_ref_obj: (work@test_program.create_command.burstcount), line:589:34, endln:589:44 |vpiParent: \_hier_path: (cmd.burstcount), line:589:30, endln:589:44 |vpiName:burstcount + |vpiFullName:work@test_program.create_command.burstcount |vpiStmt: \_begin: (work@test_program.create_command), line:589:51, endln:593:13 |vpiParent: @@ -12140,7 +12065,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.data[i]), line:590:13, endln:590:24 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:590:13, endln:590:43 |vpiName:cmd.data[i] |vpiActual: \_ref_obj: (cmd) @@ -12150,21 +12075,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data[i]), line:590:17, endln:590:21 + \_bit_select: (work@test_program.create_command.cmd.data[i].data), line:590:17, endln:590:21 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:590:13, endln:590:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.create_command.cmd.data[i] + \_hier_path: (cmd.data[i]), line:590:13, endln:590:24 |vpiName:data - |vpiFullName:work@test_program.create_command.cmd.data[i] + |vpiFullName:work@test_program.create_command.cmd.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.create_command.i), line:590:22, endln:590:23 + \_ref_obj: (work@test_program.create_command.cmd.data[i].i), line:590:22, endln:590:23 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_bit_select: (work@test_program.create_command.cmd.data[i].data), line:590:17, endln:590:21 |vpiName:i - |vpiFullName:work@test_program.create_command.i + |vpiFullName:work@test_program.create_command.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 |vpiStmt: @@ -12176,18 +12097,18 @@ design: (work@top) |vpiRhs: \_operation: , line:591:36, endln:591:55 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:591:13, endln:591:55 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@test_program.create_command.NUM_SYMBOLS), line:591:37, endln:591:48 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:591:13, endln:591:55 |vpiName:NUM_SYMBOLS |vpiFullName:work@test_program.create_command.NUM_SYMBOLS |vpiOperand: \_operation: , line:591:48, endln:591:54 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:591:13, endln:591:55 |vpiOpType:33 |vpiOperand: \_constant: , line:591:49, endln:591:53 @@ -12198,7 +12119,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.byteenable[i]), line:591:13, endln:591:30 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:591:13, endln:591:55 |vpiName:cmd.byteenable[i] |vpiActual: \_ref_obj: (cmd) @@ -12208,21 +12129,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.byteenable[i]), line:591:17, endln:591:27 + \_bit_select: (work@test_program.create_command.cmd.byteenable[i].byteenable), line:591:17, endln:591:27 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:591:13, endln:591:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.create_command.cmd.byteenable[i] + \_hier_path: (cmd.byteenable[i]), line:591:13, endln:591:30 |vpiName:byteenable - |vpiFullName:work@test_program.create_command.cmd.byteenable[i] + |vpiFullName:work@test_program.create_command.cmd.byteenable[i].byteenable |vpiIndex: - \_ref_obj: (work@test_program.create_command.i), line:591:28, endln:591:29 + \_ref_obj: (work@test_program.create_command.cmd.byteenable[i].i), line:591:28, endln:591:29 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_bit_select: (work@test_program.create_command.cmd.byteenable[i].byteenable), line:591:17, endln:591:27 |vpiName:i - |vpiFullName:work@test_program.create_command.i + |vpiFullName:work@test_program.create_command.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 |vpiStmt: @@ -12253,7 +12170,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.data_idles[i]), line:592:13, endln:592:30 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_assignment: , line:592:13, endln:592:68 |vpiName:cmd.data_idles[i] |vpiActual: \_ref_obj: (cmd) @@ -12263,21 +12180,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data_idles[i]), line:592:17, endln:592:27 + \_bit_select: (work@test_program.create_command.cmd.data_idles[i].data_idles), line:592:17, endln:592:27 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data_idles[i]) - |vpiParent: - \_hier_path: (cmd.data_idles[i]), line:592:13, endln:592:30 - |vpiName:cmd.data_idles[i] - |vpiFullName:work@test_program.create_command.cmd.data_idles[i] + \_hier_path: (cmd.data_idles[i]), line:592:13, endln:592:30 |vpiName:data_idles - |vpiFullName:work@test_program.create_command.cmd.data_idles[i] + |vpiFullName:work@test_program.create_command.cmd.data_idles[i].data_idles |vpiIndex: - \_ref_obj: (work@test_program.create_command.i), line:592:28, endln:592:29 + \_ref_obj: (work@test_program.create_command.cmd.data_idles[i].i), line:592:28, endln:592:29 |vpiParent: - \_begin: (work@test_program.create_command), line:589:51, endln:593:13 + \_bit_select: (work@test_program.create_command.cmd.data_idles[i].data_idles), line:592:17, endln:592:27 |vpiName:i - |vpiFullName:work@test_program.create_command.i + |vpiFullName:work@test_program.create_command.cmd.data_idles[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 |vpiElseStmt: @@ -12313,7 +12226,7 @@ design: (work@top) |vpiLhs: \_hier_path: (cmd.data_idles[0]), line:595:10, endln:595:27 |vpiParent: - \_begin: (work@test_program.create_command), line:594:16, endln:596:10 + \_assignment: , line:595:10, endln:595:68 |vpiName:cmd.data_idles[0] |vpiActual: \_ref_obj: (cmd) @@ -12323,19 +12236,15 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data_idles[0]), line:595:14, endln:595:24 + \_bit_select: (work@test_program.create_command.cmd.data_idles[0].data_idles), line:595:14, endln:595:24 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data_idles[0]) - |vpiParent: - \_hier_path: (cmd.data_idles[0]), line:595:10, endln:595:27 - |vpiName:cmd.data_idles[0] - |vpiFullName:work@test_program.create_command.cmd.data_idles[0] + \_hier_path: (cmd.data_idles[0]), line:595:10, endln:595:27 |vpiName:data_idles - |vpiFullName:work@test_program.create_command.cmd.data_idles[0] + |vpiFullName:work@test_program.create_command.cmd.data_idles[0].data_idles |vpiIndex: \_constant: , line:595:25, endln:595:26 |vpiParent: - \_bit_select: (work@test_program.create_command.cmd.data_idles[0]), line:595:14, endln:595:24 + \_bit_select: (work@test_program.create_command.cmd.data_idles[0].data_idles), line:595:14, endln:595:24 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12481,7 +12390,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.randomize_burstcount.burstcount), line:605:7, endln:605:17 |vpiParent: - \_begin: (work@test_program.randomize_burstcount) + \_assignment: , line:605:7, endln:605:48 |vpiName:burstcount |vpiFullName:work@test_program.randomize_burstcount.burstcount |vpiActual: @@ -12524,7 +12433,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.generate_random_aligned_address.ADDR_W), line:612:14, endln:612:20 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:612:14, endln:612:22 |vpiName:ADDR_W |vpiFullName:work@test_program.generate_random_aligned_address.ADDR_W |vpiActual: @@ -12565,7 +12474,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.generate_random_aligned_address.ADDR_W), line:612:14, endln:612:20 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:612:14, endln:612:22 |vpiName:ADDR_W |vpiFullName:work@test_program.generate_random_aligned_address.ADDR_W |vpiActual: @@ -12649,12 +12558,12 @@ design: (work@top) |vpiRhs: \_operation: , line:614:19, endln:614:40 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_assignment: , line:614:7, endln:614:40 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@test_program.generate_random_aligned_address.slave_id), line:614:19, endln:614:27 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:614:19, endln:614:40 |vpiName:slave_id |vpiFullName:work@test_program.generate_random_aligned_address.slave_id |vpiActual: @@ -12668,7 +12577,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.generate_random_aligned_address.base_addr), line:614:7, endln:614:16 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_assignment: , line:614:7, endln:614:40 |vpiName:base_addr |vpiFullName:work@test_program.generate_random_aligned_address.base_addr |vpiActual: @@ -12682,12 +12591,12 @@ design: (work@top) |vpiRhs: \_operation: , line:615:14, endln:615:48 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_assignment: , line:615:7, endln:615:48 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test_program.generate_random_aligned_address.base_addr), line:615:14, endln:615:23 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:615:14, endln:615:48 |vpiName:base_addr |vpiFullName:work@test_program.generate_random_aligned_address.base_addr |vpiActual: @@ -12711,7 +12620,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.generate_random_aligned_address.addr), line:615:7, endln:615:11 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_assignment: , line:615:7, endln:615:48 |vpiName:addr |vpiFullName:work@test_program.generate_random_aligned_address.addr |vpiActual: @@ -12728,12 +12637,12 @@ design: (work@top) |vpiOperand: \_operation: , line:617:15, endln:617:33 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:617:14, endln:617:48 |vpiOpType:12 |vpiOperand: \_ref_obj: (work@test_program.generate_random_aligned_address.addr), line:617:15, endln:617:19 |vpiParent: - \_begin: (work@test_program.generate_random_aligned_address) + \_operation: , line:617:15, endln:617:33 |vpiName:addr |vpiFullName:work@test_program.generate_random_aligned_address.addr |vpiActual: @@ -12889,7 +12798,7 @@ design: (work@top) |vpiOperand: \_hier_path: (cmd.trans), line:636:14, endln:636:23 |vpiParent: - \_task: (work@test_program.save_command_master), line:631:4, endln:642:11 + \_operation: , line:636:14, endln:636:32 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd), line:636:14, endln:636:17 @@ -12899,10 +12808,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:632:16, endln:632:19 |vpiActual: - \_ref_obj: (trans), line:636:18, endln:636:23 + \_ref_obj: (work@test_program.save_command_master.trans), line:636:18, endln:636:23 |vpiParent: \_hier_path: (cmd.trans), line:636:14, endln:636:23 |vpiName:trans + |vpiFullName:work@test_program.save_command_master.trans |vpiOperand: \_ref_obj: (work@test_program.save_command_master.WRITE), line:636:27, endln:636:32 |vpiParent: @@ -13010,17 +12920,18 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: - \_ref_obj: (addr), line:649:56, endln:649:60 + \_ref_obj: (work@test_program.save_command_slave.addr), line:649:56, endln:649:60 |vpiParent: \_hier_path: (cmd.addr), line:649:52, endln:649:60 |vpiName:addr + |vpiFullName:work@test_program.save_command_slave.addr |vpiName:translate_master_to_slave_address |vpiFunction: \_function: (work@test_program.translate_master_to_slave_address), line:658:4, endln:668:15 |vpiLhs: \_hier_path: (cmd.addr), line:649:7, endln:649:15 |vpiParent: - \_begin: (work@test_program.save_command_slave) + \_assignment: , line:649:7, endln:649:61 |vpiName:cmd.addr |vpiActual: \_ref_obj: (cmd) @@ -13046,7 +12957,7 @@ design: (work@top) |vpiOperand: \_hier_path: (cmd.trans), line:650:11, endln:650:20 |vpiParent: - \_begin: (work@test_program.save_command_slave) + \_operation: , line:650:11, endln:650:29 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd), line:650:11, endln:650:14 @@ -13056,10 +12967,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: - \_ref_obj: (trans), line:650:15, endln:650:20 + \_ref_obj: (work@test_program.save_command_slave.trans), line:650:15, endln:650:20 |vpiParent: \_hier_path: (cmd.trans), line:650:11, endln:650:20 |vpiName:trans + |vpiFullName:work@test_program.save_command_slave.trans |vpiOperand: \_ref_obj: (work@test_program.save_command_slave.WRITE), line:650:24, endln:650:29 |vpiParent: @@ -13152,7 +13064,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.translate_master_to_slave_address.ADDR_W), line:662:14, endln:662:20 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_operation: , line:662:14, endln:662:22 |vpiName:ADDR_W |vpiFullName:work@test_program.translate_master_to_slave_address.ADDR_W |vpiActual: @@ -13193,7 +13105,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.translate_master_to_slave_address.ADDR_W), line:662:14, endln:662:20 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_operation: , line:662:14, endln:662:22 |vpiName:ADDR_W |vpiFullName:work@test_program.translate_master_to_slave_address.ADDR_W |vpiActual: @@ -13333,12 +13245,12 @@ design: (work@top) |vpiRhs: \_operation: , line:664:19, endln:664:40 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_assignment: , line:664:7, endln:664:40 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@test_program.translate_master_to_slave_address.slave_id), line:664:19, endln:664:27 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_operation: , line:664:19, endln:664:40 |vpiName:slave_id |vpiFullName:work@test_program.translate_master_to_slave_address.slave_id |vpiActual: @@ -13352,7 +13264,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.translate_master_to_slave_address.base_addr), line:664:7, endln:664:16 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_assignment: , line:664:7, endln:664:40 |vpiName:base_addr |vpiFullName:work@test_program.translate_master_to_slave_address.base_addr |vpiActual: @@ -13366,12 +13278,12 @@ design: (work@top) |vpiRhs: \_operation: , line:665:16, endln:665:32 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_assignment: , line:665:7, endln:665:32 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test_program.translate_master_to_slave_address.addr), line:665:16, endln:665:20 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_operation: , line:665:16, endln:665:32 |vpiName:addr |vpiFullName:work@test_program.translate_master_to_slave_address.addr |vpiActual: @@ -13387,7 +13299,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.translate_master_to_slave_address.offset), line:665:7, endln:665:13 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_assignment: , line:665:7, endln:665:32 |vpiName:offset |vpiFullName:work@test_program.translate_master_to_slave_address.offset |vpiActual: @@ -13404,7 +13316,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.translate_master_to_slave_address.offset), line:667:15, endln:667:21 |vpiParent: - \_begin: (work@test_program.translate_master_to_slave_address) + \_operation: , line:667:15, endln:667:35 |vpiName:offset |vpiFullName:work@test_program.translate_master_to_slave_address.offset |vpiActual: @@ -13450,7 +13362,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master.master_id), line:674:11, endln:674:20 |vpiParent: - \_task: (work@test_program.configure_and_push_command_to_master), line:670:4, endln:680:11 + \_operation: , line:674:11, endln:674:25 |vpiName:master_id |vpiFullName:work@test_program.configure_and_push_command_to_master.master_id |vpiActual: @@ -13495,7 +13407,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.configure_and_push_command_to_master.master_id), line:676:20, endln:676:29 |vpiParent: - \_if_else: , line:674:7, endln:678:10 + \_operation: , line:676:20, endln:676:34 |vpiName:master_id |vpiFullName:work@test_program.configure_and_push_command_to_master.master_id |vpiActual: @@ -13608,7 +13520,7 @@ design: (work@top) |vpiOperand: \_hier_path: (cmd.trans), line:690:11, endln:690:20 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave) + \_operation: , line:690:11, endln:690:29 |vpiName:cmd.trans |vpiActual: \_ref_obj: (cmd), line:690:11, endln:690:14 @@ -13618,10 +13530,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (trans), line:690:15, endln:690:20 + \_ref_obj: (work@test_program.get_expected_command_for_slave.trans), line:690:15, endln:690:20 |vpiParent: \_hier_path: (cmd.trans), line:690:11, endln:690:20 |vpiName:trans + |vpiFullName:work@test_program.get_expected_command_for_slave.trans |vpiOperand: \_ref_obj: (work@test_program.get_expected_command_for_slave.WRITE), line:690:24, endln:690:29 |vpiParent: @@ -13710,25 +13623,25 @@ design: (work@top) |vpiName:write_command_queue_slave |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.slave_id), line:692:49, endln:692:57 + \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave.slave_id), line:692:49, endln:692:57 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:691:58, endln:698:13 + \_var_select: (work@test_program.get_expected_command_for_slave.write_command_queue_slave), line:692:23, endln:692:61 |vpiName:slave_id - |vpiFullName:work@test_program.get_expected_command_for_slave.slave_id + |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave.slave_id |vpiActual: \_io_decl: (slave_id), line:684:15, endln:684:23 |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.i), line:692:59, endln:692:60 + \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave.i), line:692:59, endln:692:60 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:691:58, endln:698:13 + \_var_select: (work@test_program.get_expected_command_for_slave.write_command_queue_slave), line:692:23, endln:692:61 |vpiName:i - |vpiFullName:work@test_program.get_expected_command_for_slave.i + |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave.i |vpiActual: \_int_var: (i), line:691:54, endln:691:55 |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.exp_cmd), line:692:13, endln:692:20 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:691:58, endln:698:13 + \_assignment: , line:692:13, endln:692:61 |vpiName:exp_cmd |vpiFullName:work@test_program.get_expected_command_for_slave.exp_cmd |vpiActual: @@ -13745,7 +13658,7 @@ design: (work@top) |vpiOperand: \_hier_path: (exp_cmd.addr), line:693:17, endln:693:29 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:691:58, endln:698:13 + \_operation: , line:693:17, endln:693:41 |vpiName:exp_cmd.addr |vpiActual: \_ref_obj: (exp_cmd), line:693:17, endln:693:24 @@ -13755,10 +13668,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: - \_ref_obj: (addr), line:693:25, endln:693:29 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:693:25, endln:693:29 |vpiParent: \_hier_path: (exp_cmd.addr), line:693:17, endln:693:29 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiOperand: \_hier_path: (cmd.addr), line:693:33, endln:693:41 |vpiParent: @@ -13772,10 +13686,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (addr), line:693:37, endln:693:41 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:693:37, endln:693:41 |vpiParent: \_hier_path: (cmd.addr), line:693:33, endln:693:41 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiStmt: \_begin: (work@test_program.get_expected_command_for_slave), line:693:43, endln:697:16 |vpiParent: @@ -13808,8 +13723,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:695:24, endln:695:25 - |vpiParent: - \_assignment: , line:695:16, endln:695:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13817,7 +13730,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.found), line:695:16, endln:695:21 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:693:43, endln:697:16 + \_assignment: , line:695:16, endln:695:25 |vpiName:found |vpiFullName:work@test_program.get_expected_command_for_slave.found |vpiActual: @@ -13838,7 +13751,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.get_expected_command_for_slave.found), line:699:14, endln:699:19 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:690:31, endln:702:10 + \_operation: , line:699:14, endln:699:24 |vpiName:found |vpiFullName:work@test_program.get_expected_command_for_slave.found |vpiActual: @@ -13865,21 +13778,18 @@ design: (work@top) |vpiRhs: \_hier_path: (write_command_queue_slave[slave_id].pop_front), line:700:23, endln:700:70 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:699:26, endln:701:13 + \_assignment: , line:700:13, endln:700:70 |vpiName:write_command_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (write_command_queue_slave), line:700:23, endln:700:48 + \_bit_select: (write_command_queue_slave[slave_id]), line:700:23, endln:700:48 |vpiParent: - \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (write_command_queue_slave[slave_id].pop_front), line:700:23, endln:700:70 - |vpiName:write_command_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id] + \_hier_path: (write_command_queue_slave[slave_id].pop_front), line:700:23, endln:700:70 |vpiName:write_command_queue_slave + |vpiFullName:write_command_queue_slave[slave_id] |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.slave_id), line:700:49, endln:700:57 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:699:26, endln:701:13 + \_assignment: , line:700:13, endln:700:70 |vpiName:slave_id |vpiFullName:work@test_program.get_expected_command_for_slave.slave_id |vpiActual: @@ -13890,7 +13800,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.exp_cmd), line:700:13, endln:700:20 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:699:26, endln:701:13 + \_assignment: , line:700:13, endln:700:70 |vpiName:exp_cmd |vpiFullName:work@test_program.get_expected_command_for_slave.exp_cmd |vpiActual: @@ -13975,25 +13885,25 @@ design: (work@top) |vpiName:read_command_queue_slave |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.slave_id), line:704:48, endln:704:56 + \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave.slave_id), line:704:48, endln:704:56 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:703:57, endln:710:13 + \_var_select: (work@test_program.get_expected_command_for_slave.read_command_queue_slave), line:704:23, endln:704:60 |vpiName:slave_id - |vpiFullName:work@test_program.get_expected_command_for_slave.slave_id + |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave.slave_id |vpiActual: \_io_decl: (slave_id), line:684:15, endln:684:23 |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.i), line:704:58, endln:704:59 + \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave.i), line:704:58, endln:704:59 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:703:57, endln:710:13 + \_var_select: (work@test_program.get_expected_command_for_slave.read_command_queue_slave), line:704:23, endln:704:60 |vpiName:i - |vpiFullName:work@test_program.get_expected_command_for_slave.i + |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave.i |vpiActual: \_int_var: (i), line:703:53, endln:703:54 |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.exp_cmd), line:704:13, endln:704:20 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:703:57, endln:710:13 + \_assignment: , line:704:13, endln:704:60 |vpiName:exp_cmd |vpiFullName:work@test_program.get_expected_command_for_slave.exp_cmd |vpiActual: @@ -14010,7 +13920,7 @@ design: (work@top) |vpiOperand: \_hier_path: (exp_cmd.addr), line:705:17, endln:705:29 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:703:57, endln:710:13 + \_operation: , line:705:17, endln:705:41 |vpiName:exp_cmd.addr |vpiActual: \_ref_obj: (exp_cmd), line:705:17, endln:705:24 @@ -14020,10 +13930,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: - \_ref_obj: (addr), line:705:25, endln:705:29 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:705:25, endln:705:29 |vpiParent: \_hier_path: (exp_cmd.addr), line:705:17, endln:705:29 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiOperand: \_hier_path: (cmd.addr), line:705:33, endln:705:41 |vpiParent: @@ -14037,10 +13948,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (addr), line:705:37, endln:705:41 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:705:37, endln:705:41 |vpiParent: \_hier_path: (cmd.addr), line:705:33, endln:705:41 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiStmt: \_begin: (work@test_program.get_expected_command_for_slave), line:705:43, endln:709:16 |vpiParent: @@ -14073,8 +13985,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:707:24, endln:707:25 - |vpiParent: - \_assignment: , line:707:16, endln:707:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -14082,7 +13992,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.found), line:707:16, endln:707:21 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:705:43, endln:709:16 + \_assignment: , line:707:16, endln:707:25 |vpiName:found |vpiFullName:work@test_program.get_expected_command_for_slave.found |vpiActual: @@ -14103,7 +14013,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.get_expected_command_for_slave.found), line:711:14, endln:711:19 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:702:16, endln:714:10 + \_operation: , line:711:14, endln:711:24 |vpiName:found |vpiFullName:work@test_program.get_expected_command_for_slave.found |vpiActual: @@ -14130,21 +14040,18 @@ design: (work@top) |vpiRhs: \_hier_path: (read_command_queue_slave[slave_id].pop_front), line:712:23, endln:712:69 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:711:26, endln:713:13 + \_assignment: , line:712:13, endln:712:69 |vpiName:read_command_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (read_command_queue_slave), line:712:23, endln:712:47 + \_bit_select: (read_command_queue_slave[slave_id]), line:712:23, endln:712:47 |vpiParent: - \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (read_command_queue_slave[slave_id].pop_front), line:712:23, endln:712:69 - |vpiName:read_command_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id] + \_hier_path: (read_command_queue_slave[slave_id].pop_front), line:712:23, endln:712:69 |vpiName:read_command_queue_slave + |vpiFullName:read_command_queue_slave[slave_id] |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.slave_id), line:712:48, endln:712:56 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:711:26, endln:713:13 + \_assignment: , line:712:13, endln:712:69 |vpiName:slave_id |vpiFullName:work@test_program.get_expected_command_for_slave.slave_id |vpiActual: @@ -14155,7 +14062,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.get_expected_command_for_slave.exp_cmd), line:712:13, endln:712:20 |vpiParent: - \_begin: (work@test_program.get_expected_command_for_slave), line:711:26, endln:713:13 + \_assignment: , line:712:13, endln:712:69 |vpiName:exp_cmd |vpiFullName:work@test_program.get_expected_command_for_slave.exp_cmd |vpiActual: @@ -14224,10 +14131,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_ref_obj: (addr), line:723:46, endln:723:50 + \_ref_obj: (work@test_program.verify_command.addr), line:723:46, endln:723:50 |vpiParent: \_hier_path: (exp_cmd.addr), line:723:38, endln:723:50 |vpiName:addr + |vpiFullName:work@test_program.verify_command.addr |vpiArgument: \_hier_path: (actual_cmd.addr), line:723:52, endln:723:67 |vpiParent: @@ -14241,10 +14149,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (addr), line:723:63, endln:723:67 + \_ref_obj: (work@test_program.verify_command.addr), line:723:63, endln:723:67 |vpiParent: \_hier_path: (actual_cmd.addr), line:723:52, endln:723:67 |vpiName:addr + |vpiFullName:work@test_program.verify_command.addr |vpiName:assert_equals |vpiTask: \_task: (work@test_program.assert_equals), line:735:4, endln:757:11 @@ -14273,10 +14182,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_ref_obj: (burstcount), line:724:49, endln:724:59 + \_ref_obj: (work@test_program.verify_command.burstcount), line:724:49, endln:724:59 |vpiParent: \_hier_path: (exp_cmd.burstcount), line:724:41, endln:724:59 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiArgument: \_hier_path: (actual_cmd.burstcount), line:724:61, endln:724:82 |vpiParent: @@ -14290,10 +14200,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (burstcount), line:724:72, endln:724:82 + \_ref_obj: (work@test_program.verify_command.burstcount), line:724:72, endln:724:82 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:724:61, endln:724:82 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiName:assert_equals |vpiTask: \_task: (work@test_program.assert_equals), line:735:4, endln:757:11 @@ -14309,7 +14220,7 @@ design: (work@top) |vpiOperand: \_hier_path: (actual_cmd.trans), line:726:11, endln:726:27 |vpiParent: - \_begin: (work@test_program.verify_command) + \_operation: , line:726:11, endln:726:36 |vpiName:actual_cmd.trans |vpiActual: \_ref_obj: (actual_cmd), line:726:11, endln:726:21 @@ -14319,10 +14230,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (trans), line:726:22, endln:726:27 + \_ref_obj: (work@test_program.verify_command.trans), line:726:22, endln:726:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:726:11, endln:726:27 |vpiName:trans + |vpiFullName:work@test_program.verify_command.trans |vpiOperand: \_ref_obj: (work@test_program.verify_command.WRITE), line:726:31, endln:726:36 |vpiParent: @@ -14402,10 +14314,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (burstcount), line:727:41, endln:727:51 + \_ref_obj: (work@test_program.verify_command.burstcount), line:727:41, endln:727:51 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:727:30, endln:727:51 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiStmt: \_begin: (work@test_program.verify_command), line:727:58, endln:730:13 |vpiParent: @@ -14438,17 +14351,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_command.data) |vpiParent: - \_ref_obj: (work@test_program.verify_command.data) - |vpiParent: - \_task_call: (assert_equals), line:728:13, endln:728:83 - |vpiName:data - |vpiFullName:work@test_program.verify_command.data + \_task_call: (assert_equals), line:728:13, endln:728:83 |vpiName:data |vpiFullName:work@test_program.verify_command.data |vpiIndex: \_ref_obj: (work@test_program.verify_command.i), line:728:60, endln:728:61 |vpiParent: - \_task_call: (assert_equals), line:728:13, endln:728:83 + \_bit_select: (work@test_program.verify_command.data) |vpiName:i |vpiFullName:work@test_program.verify_command.i |vpiActual: @@ -14468,17 +14377,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_command.data) |vpiParent: - \_ref_obj: (work@test_program.verify_command.data) - |vpiParent: - \_task_call: (assert_equals), line:728:13, endln:728:83 - |vpiName:data - |vpiFullName:work@test_program.verify_command.data + \_task_call: (assert_equals), line:728:13, endln:728:83 |vpiName:data |vpiFullName:work@test_program.verify_command.data |vpiIndex: \_ref_obj: (work@test_program.verify_command.i), line:728:80, endln:728:81 |vpiParent: - \_task_call: (assert_equals), line:728:13, endln:728:83 + \_bit_select: (work@test_program.verify_command.data) |vpiName:i |vpiFullName:work@test_program.verify_command.i |vpiActual: @@ -14513,17 +14418,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_command.byteenable) |vpiParent: - \_ref_obj: (work@test_program.verify_command.byteenable) - |vpiParent: - \_task_call: (assert_equals), line:729:13, endln:729:95 - |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable + \_task_call: (assert_equals), line:729:13, endln:729:95 |vpiName:byteenable |vpiFullName:work@test_program.verify_command.byteenable |vpiIndex: \_ref_obj: (work@test_program.verify_command.i), line:729:66, endln:729:67 |vpiParent: - \_task_call: (assert_equals), line:729:13, endln:729:95 + \_bit_select: (work@test_program.verify_command.byteenable) |vpiName:i |vpiFullName:work@test_program.verify_command.i |vpiActual: @@ -14543,17 +14444,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_command.byteenable) |vpiParent: - \_ref_obj: (work@test_program.verify_command.byteenable) - |vpiParent: - \_task_call: (assert_equals), line:729:13, endln:729:95 - |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable + \_task_call: (assert_equals), line:729:13, endln:729:95 |vpiName:byteenable |vpiFullName:work@test_program.verify_command.byteenable |vpiIndex: \_ref_obj: (work@test_program.verify_command.i), line:729:92, endln:729:93 |vpiParent: - \_task_call: (assert_equals), line:729:13, endln:729:95 + \_bit_select: (work@test_program.verify_command.byteenable) |vpiName:i |vpiFullName:work@test_program.verify_command.i |vpiActual: @@ -14657,7 +14554,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.assert_equals.actual_obj), line:743:14, endln:743:24 |vpiParent: - \_begin: (work@test_program.assert_equals), line:742:7, endln:756:10 + \_operation: , line:743:14, endln:743:40 |vpiName:actual_obj |vpiFullName:work@test_program.assert_equals.actual_obj |vpiActual: @@ -14754,8 +14651,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:753:28, endln:753:29 - |vpiParent: - \_assignment: , line:753:13, endln:753:29 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14763,7 +14658,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.assert_equals.test_success), line:753:13, endln:753:25 |vpiParent: - \_begin: (work@test_program.assert_equals), line:747:19, endln:755:13 + \_assignment: , line:753:13, endln:753:29 |vpiName:test_success |vpiFullName:work@test_program.assert_equals.test_success |vpiActual: @@ -14854,7 +14749,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@test_program.create_response.burstcount), line:765:30, endln:765:40 |vpiParent: - \_begin: (work@test_program.create_response) + \_assignment: , line:765:7, endln:765:40 |vpiName:burstcount |vpiFullName:work@test_program.create_response.burstcount |vpiActual: @@ -14862,7 +14757,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.burstcount), line:765:7, endln:765:21 |vpiParent: - \_begin: (work@test_program.create_response) + \_assignment: , line:765:7, endln:765:40 |vpiName:rsp.burstcount |vpiActual: \_ref_obj: (rsp) @@ -14958,7 +14853,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.data[i]), line:767:10, endln:767:21 |vpiParent: - \_begin: (work@test_program.create_response), line:766:43, endln:769:10 + \_assignment: , line:767:10, endln:767:37 |vpiName:rsp.data[i] |vpiActual: \_ref_obj: (rsp) @@ -14968,21 +14863,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_response.rsp), line:763:16, endln:763:19 |vpiActual: - \_bit_select: (work@test_program.create_response.rsp.data[i]), line:767:14, endln:767:18 + \_bit_select: (work@test_program.create_response.rsp.data[i].data), line:767:14, endln:767:18 |vpiParent: - \_ref_obj: (work@test_program.create_response.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:767:10, endln:767:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.create_response.rsp.data[i] + \_hier_path: (rsp.data[i]), line:767:10, endln:767:21 |vpiName:data - |vpiFullName:work@test_program.create_response.rsp.data[i] + |vpiFullName:work@test_program.create_response.rsp.data[i].data |vpiIndex: - \_ref_obj: (work@test_program.create_response.i), line:767:19, endln:767:20 + \_ref_obj: (work@test_program.create_response.rsp.data[i].i), line:767:19, endln:767:20 |vpiParent: - \_begin: (work@test_program.create_response), line:766:43, endln:769:10 + \_bit_select: (work@test_program.create_response.rsp.data[i].data), line:767:14, endln:767:18 |vpiName:i - |vpiFullName:work@test_program.create_response.i + |vpiFullName:work@test_program.create_response.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.create_response.i), line:766:16, endln:766:17 |vpiStmt: @@ -15013,7 +14904,7 @@ design: (work@top) |vpiLhs: \_hier_path: (rsp.latency[i]), line:768:10, endln:768:24 |vpiParent: - \_begin: (work@test_program.create_response), line:766:43, endln:769:10 + \_assignment: , line:768:10, endln:768:62 |vpiName:rsp.latency[i] |vpiActual: \_ref_obj: (rsp) @@ -15023,21 +14914,17 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_response.rsp), line:763:16, endln:763:19 |vpiActual: - \_bit_select: (work@test_program.create_response.rsp.latency[i]), line:768:14, endln:768:21 + \_bit_select: (work@test_program.create_response.rsp.latency[i].latency), line:768:14, endln:768:21 |vpiParent: - \_ref_obj: (work@test_program.create_response.rsp.latency[i]) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:768:10, endln:768:24 - |vpiName:rsp.latency[i] - |vpiFullName:work@test_program.create_response.rsp.latency[i] + \_hier_path: (rsp.latency[i]), line:768:10, endln:768:24 |vpiName:latency - |vpiFullName:work@test_program.create_response.rsp.latency[i] + |vpiFullName:work@test_program.create_response.rsp.latency[i].latency |vpiIndex: - \_ref_obj: (work@test_program.create_response.i), line:768:22, endln:768:23 + \_ref_obj: (work@test_program.create_response.rsp.latency[i].i), line:768:22, endln:768:23 |vpiParent: - \_begin: (work@test_program.create_response), line:766:43, endln:769:10 + \_bit_select: (work@test_program.create_response.rsp.latency[i].latency), line:768:14, endln:768:21 |vpiName:i - |vpiFullName:work@test_program.create_response.i + |vpiFullName:work@test_program.create_response.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.create_response.i), line:766:16, endln:766:17 |vpiStmt: @@ -15121,10 +15008,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:775:15, endln:775:18 |vpiActual: - \_ref_obj: (addr), line:779:31, endln:779:35 + \_ref_obj: (work@test_program.get_expected_read_response.addr), line:779:31, endln:779:35 |vpiParent: \_hier_path: (cmd.addr), line:779:27, endln:779:35 |vpiName:addr + |vpiFullName:work@test_program.get_expected_read_response.addr |vpiOperand: \_ref_obj: (work@test_program.get_expected_read_response.SLAVE_SPAN), line:779:38, endln:779:48 |vpiParent: @@ -15142,21 +15030,18 @@ design: (work@top) |vpiRhs: \_hier_path: (read_response_queue_slave[slave_id].pop_front), line:781:13, endln:781:60 |vpiParent: - \_begin: (work@test_program.get_expected_read_response) + \_assignment: , line:781:7, endln:781:60 |vpiName:read_response_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (read_response_queue_slave), line:781:13, endln:781:38 + \_bit_select: (read_response_queue_slave[slave_id]), line:781:13, endln:781:38 |vpiParent: - \_ref_obj: (work@test_program.get_expected_read_response.read_response_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (read_response_queue_slave[slave_id].pop_front), line:781:13, endln:781:60 - |vpiName:read_response_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_read_response.read_response_queue_slave[slave_id] + \_hier_path: (read_response_queue_slave[slave_id].pop_front), line:781:13, endln:781:60 |vpiName:read_response_queue_slave + |vpiFullName:read_response_queue_slave[slave_id] |vpiIndex: \_ref_obj: (work@test_program.get_expected_read_response.slave_id), line:781:39, endln:781:47 |vpiParent: - \_begin: (work@test_program.get_expected_read_response) + \_assignment: , line:781:7, endln:781:60 |vpiName:slave_id |vpiFullName:work@test_program.get_expected_read_response.slave_id |vpiActual: @@ -15167,7 +15052,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.get_expected_read_response.rsp), line:781:7, endln:781:10 |vpiParent: - \_begin: (work@test_program.get_expected_read_response) + \_assignment: , line:781:7, endln:781:60 |vpiName:rsp |vpiFullName:work@test_program.get_expected_read_response.rsp |vpiActual: @@ -15236,10 +15121,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_rsp), line:787:28, endln:787:35 |vpiActual: - \_ref_obj: (burstcount), line:790:49, endln:790:59 + \_ref_obj: (work@test_program.verify_response.burstcount), line:790:49, endln:790:59 |vpiParent: \_hier_path: (exp_rsp.burstcount), line:790:41, endln:790:59 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiArgument: \_hier_path: (actual_rsp.burstcount), line:790:61, endln:790:82 |vpiParent: @@ -15253,10 +15139,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: - \_ref_obj: (burstcount), line:790:72, endln:790:82 + \_ref_obj: (work@test_program.verify_response.burstcount), line:790:72, endln:790:82 |vpiParent: \_hier_path: (actual_rsp.burstcount), line:790:61, endln:790:82 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiName:assert_equals |vpiTask: \_task: (work@test_program.assert_equals), line:735:4, endln:757:11 @@ -15326,10 +15213,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: - \_ref_obj: (burstcount), line:791:38, endln:791:48 + \_ref_obj: (work@test_program.verify_response.burstcount), line:791:38, endln:791:48 |vpiParent: \_hier_path: (actual_rsp.burstcount), line:791:27, endln:791:48 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiStmt: \_begin: (work@test_program.verify_response), line:791:55, endln:793:10 |vpiParent: @@ -15362,17 +15250,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_response.data) |vpiParent: - \_ref_obj: (work@test_program.verify_response.data) - |vpiParent: - \_task_call: (assert_equals), line:792:10, endln:792:79 - |vpiName:data - |vpiFullName:work@test_program.verify_response.data + \_task_call: (assert_equals), line:792:10, endln:792:79 |vpiName:data |vpiFullName:work@test_program.verify_response.data |vpiIndex: \_ref_obj: (work@test_program.verify_response.i), line:792:56, endln:792:57 |vpiParent: - \_task_call: (assert_equals), line:792:10, endln:792:79 + \_bit_select: (work@test_program.verify_response.data) |vpiName:i |vpiFullName:work@test_program.verify_response.i |vpiActual: @@ -15392,17 +15276,13 @@ design: (work@top) |vpiActual: \_bit_select: (work@test_program.verify_response.data) |vpiParent: - \_ref_obj: (work@test_program.verify_response.data) - |vpiParent: - \_task_call: (assert_equals), line:792:10, endln:792:79 - |vpiName:data - |vpiFullName:work@test_program.verify_response.data + \_task_call: (assert_equals), line:792:10, endln:792:79 |vpiName:data |vpiFullName:work@test_program.verify_response.data |vpiIndex: \_ref_obj: (work@test_program.verify_response.i), line:792:76, endln:792:77 |vpiParent: - \_task_call: (assert_equals), line:792:10, endln:792:79 + \_bit_select: (work@test_program.verify_response.data) |vpiName:i |vpiFullName:work@test_program.verify_response.i |vpiActual: @@ -15543,17 +15423,14 @@ design: (work@top) |vpiRhs: \_hier_path: (read_command_queue_master[0].pop_front), line:254:13, endln:254:53 |vpiParent: - \_begin: (work@test_program), line:249:66, endln:258:7 + \_assignment: , line:254:7, endln:254:53 |vpiName:read_command_queue_master[0].pop_front |vpiActual: - \_bit_select: (read_command_queue_master), line:254:13, endln:254:38 + \_bit_select: (read_command_queue_master[0]), line:254:13, endln:254:38 |vpiParent: - \_ref_obj: (work@test_program.read_command_queue_master[0]) - |vpiParent: - \_hier_path: (read_command_queue_master[0].pop_front), line:254:13, endln:254:53 - |vpiName:read_command_queue_master[0] - |vpiFullName:work@test_program.read_command_queue_master[0] + \_hier_path: (read_command_queue_master[0].pop_front), line:254:13, endln:254:53 |vpiName:read_command_queue_master + |vpiFullName:read_command_queue_master[0] |vpiIndex: \_constant: , line:254:39, endln:254:40 |vpiDecompile:0 @@ -15566,7 +15443,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.cmd), line:254:7, endln:254:10 |vpiParent: - \_begin: (work@test_program), line:249:66, endln:258:7 + \_assignment: , line:254:7, endln:254:53 |vpiName:cmd |vpiFullName:work@test_program.cmd |vpiActual: @@ -15587,7 +15464,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.actual_rsp), line:255:7, endln:255:17 |vpiParent: - \_begin: (work@test_program), line:249:66, endln:258:7 + \_assignment: , line:255:7, endln:255:53 |vpiName:actual_rsp |vpiFullName:work@test_program.actual_rsp |vpiActual: @@ -15616,7 +15493,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.exp_rsp), line:256:7, endln:256:14 |vpiParent: - \_begin: (work@test_program), line:249:66, endln:258:7 + \_assignment: , line:256:7, endln:256:48 |vpiName:exp_rsp |vpiFullName:work@test_program.exp_rsp |vpiActual: @@ -15866,7 +15743,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.backpressure_cycles), line:291:10, endln:291:29 |vpiParent: - \_begin: (work@test_program), line:290:43, endln:293:10 + \_assignment: , line:291:10, endln:291:75 |vpiName:backpressure_cycles |vpiFullName:work@test_program.backpressure_cycles |vpiActual: @@ -15908,7 +15785,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.actual_cmd), line:295:7, endln:295:17 |vpiParent: - \_begin: (work@test_program), line:282:59, endln:305:7 + \_assignment: , line:295:7, endln:295:46 |vpiName:actual_cmd |vpiFullName:work@test_program.actual_cmd |vpiActual: @@ -15945,7 +15822,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.exp_cmd), line:296:7, endln:296:14 |vpiParent: - \_begin: (work@test_program), line:282:59, endln:305:7 + \_assignment: , line:296:7, endln:296:62 |vpiName:exp_cmd |vpiFullName:work@test_program.exp_cmd |vpiActual: @@ -15985,7 +15862,7 @@ design: (work@top) |vpiOperand: \_hier_path: (actual_cmd.trans), line:300:11, endln:300:27 |vpiParent: - \_begin: (work@test_program), line:282:59, endln:305:7 + \_operation: , line:300:11, endln:300:35 |vpiName:actual_cmd.trans |vpiActual: \_ref_obj: (actual_cmd), line:300:11, endln:300:21 @@ -15995,10 +15872,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: - \_ref_obj: (trans), line:300:22, endln:300:27 + \_ref_obj: (work@test_program.trans), line:300:22, endln:300:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:300:11, endln:300:27 |vpiName:trans + |vpiFullName:work@test_program.trans |vpiOperand: \_ref_obj: (work@test_program.READ), line:300:31, endln:300:35 |vpiParent: @@ -16035,17 +15913,18 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: - \_ref_obj: (burstcount), line:301:43, endln:301:53 + \_ref_obj: (work@test_program.burstcount), line:301:43, endln:301:53 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:301:32, endln:301:53 |vpiName:burstcount + |vpiFullName:work@test_program.burstcount |vpiName:create_response |vpiFunction: \_function: (work@test_program.create_response), line:759:4, endln:772:15 |vpiLhs: \_ref_obj: (work@test_program.rsp), line:301:10, endln:301:13 |vpiParent: - \_begin: (work@test_program), line:300:37, endln:304:10 + \_assignment: , line:301:10, endln:301:54 |vpiName:rsp |vpiFullName:work@test_program.rsp |vpiActual: @@ -16099,27 +15978,30 @@ design: (work@top) \_event_control: , line:333:11, endln:333:42 |vpiOpType:39 |vpiOperand: - \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:333:21, endln:333:41 + |vpiParent: + \_operation: , line:333:13, endln:333:41 |vpiName:$root.tb.dut.clk_clk + |vpiFullName:work@test_program.$root.tb.dut.clk_clk |vpiActual: \_ref_obj: ($root) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:$root |vpiActual: \_ref_obj: (tb) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:tb |vpiActual: \_ref_obj: (dut) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:dut |vpiActual: \_ref_obj: (clk_clk) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:333:21, endln:333:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:333:21, endln:333:41 |vpiName:clk_clk |vpiStmt: \_begin: (work@test_program), line:333:43, endln:337:7 @@ -16138,7 +16020,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.pending_read_cycles_slave_0), line:334:11, endln:334:38 |vpiParent: - \_begin: (work@test_program), line:333:43, endln:337:7 + \_operation: , line:334:11, endln:334:42 |vpiName:pending_read_cycles_slave_0 |vpiFullName:work@test_program.pending_read_cycles_slave_0 |vpiActual: @@ -16247,17 +16129,14 @@ design: (work@top) |vpiRhs: \_hier_path: (read_command_queue_master[1].pop_front), line:397:13, endln:397:53 |vpiParent: - \_begin: (work@test_program), line:392:66, endln:401:7 + \_assignment: , line:397:7, endln:397:53 |vpiName:read_command_queue_master[1].pop_front |vpiActual: - \_bit_select: (read_command_queue_master), line:397:13, endln:397:38 + \_bit_select: (read_command_queue_master[1]), line:397:13, endln:397:38 |vpiParent: - \_ref_obj: (work@test_program.read_command_queue_master[1]) - |vpiParent: - \_hier_path: (read_command_queue_master[1].pop_front), line:397:13, endln:397:53 - |vpiName:read_command_queue_master[1] - |vpiFullName:work@test_program.read_command_queue_master[1] + \_hier_path: (read_command_queue_master[1].pop_front), line:397:13, endln:397:53 |vpiName:read_command_queue_master + |vpiFullName:read_command_queue_master[1] |vpiIndex: \_constant: , line:397:39, endln:397:40 |vpiDecompile:1 @@ -16270,7 +16149,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.cmd), line:397:7, endln:397:10 |vpiParent: - \_begin: (work@test_program), line:392:66, endln:401:7 + \_assignment: , line:397:7, endln:397:53 |vpiName:cmd |vpiFullName:work@test_program.cmd |vpiActual: @@ -16291,7 +16170,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.actual_rsp), line:398:7, endln:398:17 |vpiParent: - \_begin: (work@test_program), line:392:66, endln:401:7 + \_assignment: , line:398:7, endln:398:53 |vpiName:actual_rsp |vpiFullName:work@test_program.actual_rsp |vpiActual: @@ -16320,7 +16199,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.exp_rsp), line:399:7, endln:399:14 |vpiParent: - \_begin: (work@test_program), line:392:66, endln:401:7 + \_assignment: , line:399:7, endln:399:48 |vpiName:exp_rsp |vpiFullName:work@test_program.exp_rsp |vpiActual: @@ -16570,7 +16449,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.backpressure_cycles), line:434:10, endln:434:29 |vpiParent: - \_begin: (work@test_program), line:433:43, endln:436:10 + \_assignment: , line:434:10, endln:434:75 |vpiName:backpressure_cycles |vpiFullName:work@test_program.backpressure_cycles |vpiActual: @@ -16612,7 +16491,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.actual_cmd), line:438:7, endln:438:17 |vpiParent: - \_begin: (work@test_program), line:425:59, endln:448:7 + \_assignment: , line:438:7, endln:438:46 |vpiName:actual_cmd |vpiFullName:work@test_program.actual_cmd |vpiActual: @@ -16649,7 +16528,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@test_program.exp_cmd), line:439:7, endln:439:14 |vpiParent: - \_begin: (work@test_program), line:425:59, endln:448:7 + \_assignment: , line:439:7, endln:439:62 |vpiName:exp_cmd |vpiFullName:work@test_program.exp_cmd |vpiActual: @@ -16689,7 +16568,7 @@ design: (work@top) |vpiOperand: \_hier_path: (actual_cmd.trans), line:443:11, endln:443:27 |vpiParent: - \_begin: (work@test_program), line:425:59, endln:448:7 + \_operation: , line:443:11, endln:443:35 |vpiName:actual_cmd.trans |vpiActual: \_ref_obj: (actual_cmd), line:443:11, endln:443:21 @@ -16699,10 +16578,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: - \_ref_obj: (trans), line:443:22, endln:443:27 + \_ref_obj: (work@test_program.trans), line:443:22, endln:443:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:443:11, endln:443:27 |vpiName:trans + |vpiFullName:work@test_program.trans |vpiOperand: \_ref_obj: (work@test_program.READ), line:443:31, endln:443:35 |vpiParent: @@ -16739,17 +16619,18 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: - \_ref_obj: (burstcount), line:444:43, endln:444:53 + \_ref_obj: (work@test_program.burstcount), line:444:43, endln:444:53 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:444:32, endln:444:53 |vpiName:burstcount + |vpiFullName:work@test_program.burstcount |vpiName:create_response |vpiFunction: \_function: (work@test_program.create_response), line:759:4, endln:772:15 |vpiLhs: \_ref_obj: (work@test_program.rsp), line:444:10, endln:444:13 |vpiParent: - \_begin: (work@test_program), line:443:37, endln:447:10 + \_assignment: , line:444:10, endln:444:54 |vpiName:rsp |vpiFullName:work@test_program.rsp |vpiActual: @@ -16803,27 +16684,30 @@ design: (work@top) \_event_control: , line:476:11, endln:476:42 |vpiOpType:39 |vpiOperand: - \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:476:21, endln:476:41 + |vpiParent: + \_operation: , line:476:13, endln:476:41 |vpiName:$root.tb.dut.clk_clk + |vpiFullName:work@test_program.$root.tb.dut.clk_clk |vpiActual: \_ref_obj: ($root) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:$root |vpiActual: \_ref_obj: (tb) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:tb |vpiActual: \_ref_obj: (dut) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:dut |vpiActual: \_ref_obj: (clk_clk) |vpiParent: - \_hier_path: ($root.tb.dut.clk_clk), line:476:21, endln:476:41 + \_hier_path: (work@test_program.$root.tb.dut.clk_clk), line:476:21, endln:476:41 |vpiName:clk_clk |vpiStmt: \_begin: (work@test_program), line:476:43, endln:480:7 @@ -16842,7 +16726,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@test_program.pending_read_cycles_slave_1), line:477:11, endln:477:38 |vpiParent: - \_begin: (work@test_program), line:476:43, endln:480:7 + \_operation: , line:477:11, endln:477:42 |vpiName:pending_read_cycles_slave_1 |vpiFullName:work@test_program.pending_read_cycles_slave_1 |vpiActual: @@ -17156,33 +17040,37 @@ design: (work@top) |vpiParent: \_always: , line:802:4, endln:804:7 |vpiCondition: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiParent: \_event_control: , line:802:11, endln:802:69 - |vpiName:$root.tb.dut.master_0[2].signal_write_response_complete - |vpiFullName:work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete + |vpiName:$root.tb.dut.master_02.signal_write_response_complete + |vpiFullName:work@test_program1.$root.tb.dut.master_02.signal_write_response_complete |vpiActual: \_ref_obj: ($root) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:$root |vpiActual: \_ref_obj: (tb) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:tb |vpiActual: \_ref_obj: (dut) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:dut |vpiActual: \_ref_obj: (master_0) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:master_0 |vpiActual: - \_bit_select: + \_bit_select: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete.2) + |vpiParent: + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 + |vpiName:2 + |vpiFullName:work@test_program1.$root.tb.dut.master_02.signal_write_response_complete.2 |vpiIndex: \_constant: , line:802:35, endln:802:36 |vpiDecompile:2 @@ -17192,7 +17080,7 @@ design: (work@top) |vpiActual: \_ref_obj: (signal_write_response_complete) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:signal_write_response_complete |vpiStmt: \_begin: (work@test_program1), line:802:70, endln:804:7 @@ -17917,10 +17805,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (addr), line:227:53, endln:227:57 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.addr), line:227:53, endln:227:57 |vpiParent: \_hier_path: (cmd.addr), line:227:49, endln:227:57 |vpiName:addr + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiName:$root.tb.dut.master_0.set_command_address @@ -17941,10 +17830,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:228:57, endln:228:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:228:57, endln:228:67 |vpiParent: \_hier_path: (cmd.burstcount), line:228:53, endln:228:67 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:$root.tb.dut.master_0.set_command_burst_count @@ -17965,10 +17855,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:229:56, endln:229:66 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:229:56, endln:229:66 |vpiParent: \_hier_path: (cmd.burstcount), line:229:52, endln:229:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:$root.tb.dut.master_0.set_command_burst_size @@ -17989,10 +17880,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (cmd_delay), line:230:58, endln:230:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.cmd_delay), line:230:58, endln:230:67 |vpiParent: \_hier_path: (cmd.cmd_delay), line:230:54, endln:230:67 |vpiName:cmd_delay + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd_delay |vpiActual: \_typespec_member: (cmd_delay), line:52:37, endln:52:46 |vpiName:$root.tb.dut.master_0.set_command_init_latency @@ -18018,10 +17910,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (trans), line:232:15, endln:232:20 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.trans), line:232:15, endln:232:20 |vpiParent: \_hier_path: (cmd.trans), line:232:11, endln:232:20 |vpiName:trans + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -18109,10 +18002,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_ref_obj: (burstcount), line:234:34, endln:234:44 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.burstcount), line:234:34, endln:234:44 |vpiParent: \_hier_path: (cmd.burstcount), line:234:30, endln:234:44 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -18137,23 +18031,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data) - |vpiParent: - \_hier_path: (cmd.data[i]), line:235:52, endln:235:63 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (cmd.data[i]), line:235:52, endln:235:63 |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data.i), line:235:61, endln:235:62 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.cmd.data[i].i), line:235:61, endln:235:62 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.data[i].data) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_0.i), line:234:19, endln:234:20 |vpiArgument: @@ -18182,23 +18072,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.byteenable) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.byteenable[i].byteenable) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.byteenable) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:236:59, endln:236:76 - |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.byteenable - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (cmd.byteenable[i]), line:236:59, endln:236:76 |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.byteenable + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.byteenable.i), line:236:74, endln:236:75 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.cmd.byteenable[i].i), line:236:74, endln:236:75 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.byteenable) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.byteenable[i].byteenable) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.byteenable.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_0.i), line:234:19, endln:234:20 |vpiArgument: @@ -18227,23 +18113,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[i].data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data_idles) - |vpiParent: - \_hier_path: (cmd.data_idles[i]), line:237:52, endln:237:69 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[i]), line:237:52, endln:237:69 |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[i].data_idles + |vpiActual: + \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data_idles.i), line:237:67, endln:237:68 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[i].i), line:237:67, endln:237:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[i].data_idles) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_0.i), line:234:19, endln:234:20 |vpiArgument: @@ -18290,17 +18172,13 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:225:16, endln:225:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_0.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[0].data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_0.data_idles) - |vpiParent: - \_hier_path: (cmd.data_idles[0]), line:241:49, endln:241:66 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[0]), line:241:49, endln:241:66 |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_0.data_idles + |vpiFullName:work@test_program.configure_and_push_command_to_master_0.cmd.data_idles[0].data_idles + |vpiActual: + \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiIndex: \_constant: , line:241:64, endln:241:65 |vpiArgument: @@ -18464,10 +18342,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: - \_ref_obj: (burstcount), line:272:31, endln:272:41 + \_ref_obj: (work@test_program.get_read_response_from_master_0.burstcount), line:272:31, endln:272:41 |vpiParent: \_hier_path: (rsp.burstcount), line:272:27, endln:272:41 |vpiName:burstcount + |vpiFullName:work@test_program.get_read_response_from_master_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiStmt: @@ -18525,27 +18404,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_0.rsp), line:268:16, endln:268:19 |vpiActual: - \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i]), line:273:14, endln:273:18 + \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i].data), line:273:14, endln:273:18 |vpiParent: - \_ref_obj: (work@test_program.get_read_response_from_master_0.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:273:10, endln:273:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i] - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (rsp.data[i]), line:273:10, endln:273:21 |vpiName:data - |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i] + |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: \_ref_obj: (work@test_program.get_read_response_from_master_0.rsp.data[i].i), line:273:19, endln:273:20 |vpiParent: - \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i]), line:273:14, endln:273:18 + \_bit_select: (work@test_program.get_read_response_from_master_0.rsp.data[i].data), line:273:14, endln:273:18 |vpiName:i |vpiFullName:work@test_program.get_read_response_from_master_0.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.get_read_response_from_master_0.i), line:272:16, endln:272:17 - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 |vpiStmt: \_return_stmt: , line:276:7, endln:276:13 |vpiParent: @@ -18853,10 +18726,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_ref_obj: (burstcount), line:319:33, endln:319:43 + \_ref_obj: (work@test_program.get_command_from_slave_0.burstcount), line:319:33, endln:319:43 |vpiParent: \_hier_path: (cmd.burstcount), line:319:29, endln:319:43 |vpiName:burstcount + |vpiFullName:work@test_program.get_command_from_slave_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -18914,27 +18788,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i]), line:320:17, endln:320:21 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i].data), line:320:17, endln:320:21 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:320:13, endln:320:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i] - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (cmd.data[i]), line:320:13, endln:320:24 |vpiName:data - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i] + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.data[i].i), line:320:22, endln:320:23 |vpiParent: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i]), line:320:17, endln:320:21 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.data[i].data), line:320:17, endln:320:21 |vpiName:i |vpiFullName:work@test_program.get_command_from_slave_0.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_0.i), line:319:18, endln:319:19 - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 |vpiStmt: \_assignment: , line:321:13, endln:321:79 |vpiParent: @@ -18985,27 +18853,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_0.cmd), line:311:15, endln:311:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i]), line:321:17, endln:321:27 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable), line:321:17, endln:321:27 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:321:13, endln:321:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i] - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (cmd.byteenable[i]), line:321:13, endln:321:30 |vpiName:byteenable - |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i] + |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: \_ref_obj: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].i), line:321:28, endln:321:29 |vpiParent: - \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i]), line:321:17, endln:321:27 + \_bit_select: (work@test_program.get_command_from_slave_0.cmd.byteenable[i].byteenable), line:321:17, endln:321:27 |vpiName:i |vpiFullName:work@test_program.get_command_from_slave_0.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_0.i), line:319:18, endln:319:19 - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiElseStmt: \_begin: (work@test_program.get_command_from_slave_0), line:323:16, endln:325:10 |vpiParent: @@ -19127,10 +18989,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:347:56, endln:347:66 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:347:56, endln:347:66 |vpiParent: \_hier_path: (rsp.burstcount), line:347:52, endln:347:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiName:$root.tb.dut.slave_0.set_response_burst_size @@ -19193,10 +19056,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:348:31, endln:348:41 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:348:31, endln:348:41 |vpiParent: \_hier_path: (rsp.burstcount), line:348:27, endln:348:41 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiStmt: @@ -19221,23 +19085,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.data) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.data) - |vpiParent: - \_hier_path: (rsp.data[i]), line:349:49, endln:349:60 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.data - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (rsp.data[i]), line:349:49, endln:349:60 |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.data + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.data.i), line:349:58, endln:349:59 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.rsp.data[i].i), line:349:58, endln:349:59 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.data) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.data[i].data) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.data.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_0.i), line:348:16, endln:348:17 |vpiArgument: @@ -19295,23 +19155,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:352:55, endln:352:69 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:352:55, endln:352:69 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency.i), line:352:67, endln:352:68 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i), line:352:67, endln:352:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_0.i), line:348:16, endln:348:17 |vpiOperand: @@ -19350,23 +19206,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:353:37, endln:353:51 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:353:37, endln:353:51 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency.i), line:353:49, endln:353:50 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i), line:353:49, endln:353:50 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_0.i), line:348:16, endln:348:17 |vpiLhs: @@ -19399,23 +19251,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:355:55, endln:355:69 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:355:55, endln:355:69 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency.i), line:355:67, endln:355:68 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i), line:355:67, endln:355:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_0.i), line:348:16, endln:348:17 |vpiArgument: @@ -19451,23 +19299,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:356:37, endln:356:51 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:356:37, endln:356:51 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.latency.i), line:356:49, endln:356:50 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i), line:356:49, endln:356:50 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_0.i), line:348:16, endln:348:17 |vpiOperand: @@ -19541,10 +19385,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:341:16, endln:341:19 |vpiActual: - \_ref_obj: (burstcount), line:361:95, endln:361:105 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_0.burstcount), line:361:95, endln:361:105 |vpiParent: \_hier_path: (rsp.burstcount), line:361:91, endln:361:105 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_0.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiOperand: @@ -19597,10 +19442,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (addr), line:370:53, endln:370:57 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.addr), line:370:53, endln:370:57 |vpiParent: \_hier_path: (cmd.addr), line:370:49, endln:370:57 |vpiName:addr + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiName:$root.tb.dut.master_1.set_command_address @@ -19621,10 +19467,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:371:57, endln:371:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:371:57, endln:371:67 |vpiParent: \_hier_path: (cmd.burstcount), line:371:53, endln:371:67 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:$root.tb.dut.master_1.set_command_burst_count @@ -19645,10 +19492,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:372:56, endln:372:66 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:372:56, endln:372:66 |vpiParent: \_hier_path: (cmd.burstcount), line:372:52, endln:372:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:$root.tb.dut.master_1.set_command_burst_size @@ -19669,10 +19517,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (cmd_delay), line:373:58, endln:373:67 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.cmd_delay), line:373:58, endln:373:67 |vpiParent: \_hier_path: (cmd.cmd_delay), line:373:54, endln:373:67 |vpiName:cmd_delay + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd_delay |vpiActual: \_typespec_member: (cmd_delay), line:52:37, endln:52:46 |vpiName:$root.tb.dut.master_1.set_command_init_latency @@ -19698,10 +19547,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (trans), line:375:15, endln:375:20 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.trans), line:375:15, endln:375:20 |vpiParent: \_hier_path: (cmd.trans), line:375:11, endln:375:20 |vpiName:trans + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -19789,10 +19639,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_ref_obj: (burstcount), line:377:34, endln:377:44 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.burstcount), line:377:34, endln:377:44 |vpiParent: \_hier_path: (cmd.burstcount), line:377:30, endln:377:44 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -19817,23 +19668,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data) - |vpiParent: - \_hier_path: (cmd.data[i]), line:378:52, endln:378:63 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (cmd.data[i]), line:378:52, endln:378:63 |vpiName:data - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data.i), line:378:61, endln:378:62 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.cmd.data[i].i), line:378:61, endln:378:62 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.data[i].data) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_1.i), line:377:19, endln:377:20 |vpiArgument: @@ -19862,23 +19709,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.byteenable) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.byteenable[i].byteenable) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.byteenable) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:379:59, endln:379:76 - |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.byteenable - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (cmd.byteenable[i]), line:379:59, endln:379:76 |vpiName:byteenable - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.byteenable + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.byteenable.i), line:379:74, endln:379:75 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.cmd.byteenable[i].i), line:379:74, endln:379:75 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.byteenable) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.byteenable[i].byteenable) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.byteenable.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_1.i), line:377:19, endln:377:20 |vpiArgument: @@ -19907,23 +19750,19 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[i].data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data_idles) - |vpiParent: - \_hier_path: (cmd.data_idles[i]), line:380:52, endln:380:69 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[i]), line:380:52, endln:380:69 |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[i].data_idles + |vpiActual: + \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data_idles.i), line:380:67, endln:380:68 + \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[i].i), line:380:67, endln:380:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[i].data_idles) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles.i + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_command_to_master_1.i), line:377:19, endln:377:20 |vpiArgument: @@ -19970,17 +19809,13 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:368:16, endln:368:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_command_to_master_1.data_idles) + \_bit_select: (work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[0].data_idles) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_command_to_master_1.data_idles) - |vpiParent: - \_hier_path: (cmd.data_idles[0]), line:384:49, endln:384:66 - |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[0]), line:384:49, endln:384:66 |vpiName:data_idles - |vpiFullName:work@test_program.configure_and_push_command_to_master_1.data_idles + |vpiFullName:work@test_program.configure_and_push_command_to_master_1.cmd.data_idles[0].data_idles + |vpiActual: + \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiIndex: \_constant: , line:384:64, endln:384:65 |vpiArgument: @@ -20144,10 +19979,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: - \_ref_obj: (burstcount), line:415:31, endln:415:41 + \_ref_obj: (work@test_program.get_read_response_from_master_1.burstcount), line:415:31, endln:415:41 |vpiParent: \_hier_path: (rsp.burstcount), line:415:27, endln:415:41 |vpiName:burstcount + |vpiFullName:work@test_program.get_read_response_from_master_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiStmt: @@ -20205,27 +20041,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_read_response_from_master_1.rsp), line:411:16, endln:411:19 |vpiActual: - \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i]), line:416:14, endln:416:18 + \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i].data), line:416:14, endln:416:18 |vpiParent: - \_ref_obj: (work@test_program.get_read_response_from_master_1.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:416:10, endln:416:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i] - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (rsp.data[i]), line:416:10, endln:416:21 |vpiName:data - |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i] + |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: \_ref_obj: (work@test_program.get_read_response_from_master_1.rsp.data[i].i), line:416:19, endln:416:20 |vpiParent: - \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i]), line:416:14, endln:416:18 + \_bit_select: (work@test_program.get_read_response_from_master_1.rsp.data[i].data), line:416:14, endln:416:18 |vpiName:i |vpiFullName:work@test_program.get_read_response_from_master_1.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.get_read_response_from_master_1.i), line:415:16, endln:415:17 - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 |vpiStmt: \_return_stmt: , line:419:7, endln:419:13 |vpiParent: @@ -20533,10 +20363,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_ref_obj: (burstcount), line:462:33, endln:462:43 + \_ref_obj: (work@test_program.get_command_from_slave_1.burstcount), line:462:33, endln:462:43 |vpiParent: \_hier_path: (cmd.burstcount), line:462:29, endln:462:43 |vpiName:burstcount + |vpiFullName:work@test_program.get_command_from_slave_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -20594,27 +20425,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i]), line:463:17, endln:463:21 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i].data), line:463:17, endln:463:21 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:463:13, endln:463:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i] - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (cmd.data[i]), line:463:13, endln:463:24 |vpiName:data - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i] + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.data[i].i), line:463:22, endln:463:23 |vpiParent: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i]), line:463:17, endln:463:21 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.data[i].data), line:463:17, endln:463:21 |vpiName:i |vpiFullName:work@test_program.get_command_from_slave_1.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_1.i), line:462:18, endln:462:19 - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 |vpiStmt: \_assignment: , line:464:13, endln:464:79 |vpiParent: @@ -20665,27 +20490,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_command_from_slave_1.cmd), line:454:15, endln:454:18 |vpiActual: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i]), line:464:17, endln:464:27 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable), line:464:17, endln:464:27 |vpiParent: - \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:464:13, endln:464:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i] - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (cmd.byteenable[i]), line:464:13, endln:464:30 |vpiName:byteenable - |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i] + |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: \_ref_obj: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].i), line:464:28, endln:464:29 |vpiParent: - \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i]), line:464:17, endln:464:27 + \_bit_select: (work@test_program.get_command_from_slave_1.cmd.byteenable[i].byteenable), line:464:17, endln:464:27 |vpiName:i |vpiFullName:work@test_program.get_command_from_slave_1.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.get_command_from_slave_1.i), line:462:18, endln:462:19 - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiElseStmt: \_begin: (work@test_program.get_command_from_slave_1), line:466:16, endln:468:10 |vpiParent: @@ -20807,10 +20626,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:490:56, endln:490:66 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:490:56, endln:490:66 |vpiParent: \_hier_path: (rsp.burstcount), line:490:52, endln:490:66 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiName:$root.tb.dut.slave_1.set_response_burst_size @@ -20873,10 +20693,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:491:31, endln:491:41 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:491:31, endln:491:41 |vpiParent: \_hier_path: (rsp.burstcount), line:491:27, endln:491:41 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiStmt: @@ -20901,23 +20722,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.data) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.data) - |vpiParent: - \_hier_path: (rsp.data[i]), line:492:49, endln:492:60 - |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.data - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (rsp.data[i]), line:492:49, endln:492:60 |vpiName:data - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.data + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.data.i), line:492:58, endln:492:59 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.rsp.data[i].i), line:492:58, endln:492:59 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.data) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.data[i].data) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.data.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_1.i), line:491:16, endln:491:17 |vpiArgument: @@ -20975,23 +20792,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:495:55, endln:495:69 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:495:55, endln:495:69 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency.i), line:495:67, endln:495:68 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i), line:495:67, endln:495:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_1.i), line:491:16, endln:491:17 |vpiOperand: @@ -21030,23 +20843,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:496:37, endln:496:51 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:496:37, endln:496:51 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency.i), line:496:49, endln:496:50 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i), line:496:49, endln:496:50 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_1.i), line:491:16, endln:491:17 |vpiLhs: @@ -21079,23 +20888,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:498:55, endln:498:69 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:498:55, endln:498:69 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency.i), line:498:67, endln:498:68 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i), line:498:67, endln:498:68 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_1.i), line:491:16, endln:491:17 |vpiArgument: @@ -21131,23 +20936,19 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiParent: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:499:37, endln:499:51 - |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:499:37, endln:499:51 |vpiName:latency - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: - \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.latency.i), line:499:49, endln:499:50 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i), line:499:49, endln:499:50 |vpiParent: - \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.latency) + \_bit_select: (work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].latency) |vpiName:i - |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.latency.i + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.configure_and_push_response_to_slave_1.i), line:491:16, endln:491:17 |vpiOperand: @@ -21221,10 +21022,11 @@ design: (work@top) |vpiActual: \_io_decl: (rsp), line:484:16, endln:484:19 |vpiActual: - \_ref_obj: (burstcount), line:504:95, endln:504:105 + \_ref_obj: (work@test_program.configure_and_push_response_to_slave_1.burstcount), line:504:95, endln:504:105 |vpiParent: \_hier_path: (rsp.burstcount), line:504:91, endln:504:105 |vpiName:burstcount + |vpiFullName:work@test_program.configure_and_push_response_to_slave_1.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiOperand: @@ -21908,10 +21710,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_ref_obj: (burstcount), line:589:34, endln:589:44 + \_ref_obj: (work@test_program.create_command.burstcount), line:589:34, endln:589:44 |vpiParent: \_hier_path: (cmd.burstcount), line:589:30, endln:589:44 |vpiName:burstcount + |vpiFullName:work@test_program.create_command.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -21943,27 +21746,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data[i]), line:590:17, endln:590:21 + \_bit_select: (work@test_program.create_command.cmd.data[i].data), line:590:17, endln:590:21 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data[i]) - |vpiParent: - \_hier_path: (cmd.data[i]), line:590:13, endln:590:24 - |vpiName:cmd.data[i] - |vpiFullName:work@test_program.create_command.cmd.data[i] - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (cmd.data[i]), line:590:13, endln:590:24 |vpiName:data - |vpiFullName:work@test_program.create_command.cmd.data[i] + |vpiFullName:work@test_program.create_command.cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: \_ref_obj: (work@test_program.create_command.cmd.data[i].i), line:590:22, endln:590:23 |vpiParent: - \_bit_select: (work@test_program.create_command.cmd.data[i]), line:590:17, endln:590:21 + \_bit_select: (work@test_program.create_command.cmd.data[i].data), line:590:17, endln:590:21 |vpiName:i |vpiFullName:work@test_program.create_command.cmd.data[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 |vpiStmt: \_assignment: , line:591:13, endln:591:55 |vpiParent: @@ -22003,27 +21800,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.byteenable[i]), line:591:17, endln:591:27 + \_bit_select: (work@test_program.create_command.cmd.byteenable[i].byteenable), line:591:17, endln:591:27 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.byteenable[i]) - |vpiParent: - \_hier_path: (cmd.byteenable[i]), line:591:13, endln:591:30 - |vpiName:cmd.byteenable[i] - |vpiFullName:work@test_program.create_command.cmd.byteenable[i] - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (cmd.byteenable[i]), line:591:13, endln:591:30 |vpiName:byteenable - |vpiFullName:work@test_program.create_command.cmd.byteenable[i] + |vpiFullName:work@test_program.create_command.cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: \_ref_obj: (work@test_program.create_command.cmd.byteenable[i].i), line:591:28, endln:591:29 |vpiParent: - \_bit_select: (work@test_program.create_command.cmd.byteenable[i]), line:591:17, endln:591:27 + \_bit_select: (work@test_program.create_command.cmd.byteenable[i].byteenable), line:591:17, endln:591:27 |vpiName:i |vpiFullName:work@test_program.create_command.cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiStmt: \_assignment: , line:592:13, endln:592:68 |vpiParent: @@ -22058,27 +21849,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data_idles[i]), line:592:17, endln:592:27 + \_bit_select: (work@test_program.create_command.cmd.data_idles[i].data_idles), line:592:17, endln:592:27 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data_idles[i]) - |vpiParent: - \_hier_path: (cmd.data_idles[i]), line:592:13, endln:592:30 - |vpiName:cmd.data_idles[i] - |vpiFullName:work@test_program.create_command.cmd.data_idles[i] - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[i]), line:592:13, endln:592:30 |vpiName:data_idles - |vpiFullName:work@test_program.create_command.cmd.data_idles[i] + |vpiFullName:work@test_program.create_command.cmd.data_idles[i].data_idles + |vpiActual: + \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiIndex: \_ref_obj: (work@test_program.create_command.cmd.data_idles[i].i), line:592:28, endln:592:29 |vpiParent: - \_bit_select: (work@test_program.create_command.cmd.data_idles[i]), line:592:17, endln:592:27 + \_bit_select: (work@test_program.create_command.cmd.data_idles[i].data_idles), line:592:17, endln:592:27 |vpiName:i |vpiFullName:work@test_program.create_command.cmd.data_idles[i].i |vpiActual: \_int_var: (work@test_program.create_command.i), line:589:19, endln:589:20 - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 |vpiElseStmt: \_begin: (work@test_program.create_command), line:594:16, endln:596:10 |vpiParent: @@ -22118,21 +21903,15 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_command.cmd), line:576:15, endln:576:18 |vpiActual: - \_bit_select: (work@test_program.create_command.cmd.data_idles[0]), line:595:14, endln:595:24 + \_bit_select: (work@test_program.create_command.cmd.data_idles[0].data_idles), line:595:14, endln:595:24 |vpiParent: - \_ref_obj: (work@test_program.create_command.cmd.data_idles[0]) - |vpiParent: - \_hier_path: (cmd.data_idles[0]), line:595:10, endln:595:27 - |vpiName:cmd.data_idles[0] - |vpiFullName:work@test_program.create_command.cmd.data_idles[0] - |vpiActual: - \_typespec_member: (data_idles), line:53:37, endln:53:63 + \_hier_path: (cmd.data_idles[0]), line:595:10, endln:595:27 |vpiName:data_idles - |vpiFullName:work@test_program.create_command.cmd.data_idles[0] - |vpiIndex: - \_constant: , line:595:25, endln:595:26 + |vpiFullName:work@test_program.create_command.cmd.data_idles[0].data_idles |vpiActual: \_typespec_member: (data_idles), line:53:37, endln:53:63 + |vpiIndex: + \_constant: , line:595:25, endln:595:26 |vpiStmt: \_return_stmt: , line:598:7, endln:598:13 |vpiParent: @@ -22550,10 +22329,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:632:16, endln:632:19 |vpiActual: - \_ref_obj: (trans), line:636:18, endln:636:23 + \_ref_obj: (work@test_program.save_command_master.trans), line:636:18, endln:636:23 |vpiParent: \_hier_path: (cmd.trans), line:636:14, endln:636:23 |vpiName:trans + |vpiFullName:work@test_program.save_command_master.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -22670,10 +22450,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: - \_ref_obj: (addr), line:649:56, endln:649:60 + \_ref_obj: (work@test_program.save_command_slave.addr), line:649:56, endln:649:60 |vpiParent: \_hier_path: (cmd.addr), line:649:52, endln:649:60 |vpiName:addr + |vpiFullName:work@test_program.save_command_slave.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiName:translate_master_to_slave_address @@ -22720,10 +22501,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:645:16, endln:645:19 |vpiActual: - \_ref_obj: (trans), line:650:15, endln:650:20 + \_ref_obj: (work@test_program.save_command_slave.trans), line:650:15, endln:650:20 |vpiParent: \_hier_path: (cmd.trans), line:650:11, endln:650:20 |vpiName:trans + |vpiFullName:work@test_program.save_command_slave.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -23198,10 +22980,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (trans), line:690:15, endln:690:20 + \_ref_obj: (work@test_program.get_expected_command_for_slave.trans), line:690:15, endln:690:20 |vpiParent: \_hier_path: (cmd.trans), line:690:11, endln:690:20 |vpiName:trans + |vpiFullName:work@test_program.get_expected_command_for_slave.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -23267,6 +23050,8 @@ design: (work@top) \_assignment: , line:692:13, endln:692:61 |vpiName:write_command_queue_slave |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave + |vpiActual: + \_array_var: (work@test_program.write_command_queue_slave), line:71:10, endln:71:38 |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave.slave_id), line:692:49, endln:692:57 |vpiParent: @@ -23274,7 +23059,7 @@ design: (work@top) |vpiName:slave_id |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave.slave_id |vpiActual: - \_ref_var: (work@test_program.get_expected_command_for_slave.slave_id), line:691:45, endln:691:53 + \_io_decl: (slave_id), line:684:15, endln:684:23 |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave.i), line:692:59, endln:692:60 |vpiParent: @@ -23313,10 +23098,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: - \_ref_obj: (addr), line:693:25, endln:693:29 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:693:25, endln:693:29 |vpiParent: \_hier_path: (exp_cmd.addr), line:693:17, endln:693:29 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiOperand: @@ -23332,10 +23118,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (addr), line:693:37, endln:693:41 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:693:37, endln:693:41 |vpiParent: \_hier_path: (cmd.addr), line:693:33, endln:693:41 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiStmt: @@ -23420,24 +23207,21 @@ design: (work@top) \_assignment: , line:700:13, endln:700:70 |vpiName:write_command_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (write_command_queue_slave), line:700:23, endln:700:48 + \_bit_select: (write_command_queue_slave[slave_id]), line:700:23, endln:700:48 |vpiParent: - \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (write_command_queue_slave[slave_id].pop_front), line:700:23, endln:700:70 - |vpiName:write_command_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id] + \_hier_path: (write_command_queue_slave[slave_id].pop_front), line:700:23, endln:700:70 |vpiName:write_command_queue_slave + |vpiFullName:write_command_queue_slave[slave_id] + |vpiActual: + \_array_var: (work@test_program.write_command_queue_slave), line:71:10, endln:71:38 |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id].slave_id), line:700:49, endln:700:57 + \_ref_obj: (work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id].pop_front.slave_id), line:700:49, endln:700:57 |vpiParent: - \_bit_select: (write_command_queue_slave), line:700:23, endln:700:48 + \_bit_select: (write_command_queue_slave[slave_id]), line:700:23, endln:700:48 |vpiName:slave_id - |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id].slave_id + |vpiFullName:work@test_program.get_expected_command_for_slave.write_command_queue_slave[slave_id].pop_front.slave_id |vpiActual: \_io_decl: (slave_id), line:684:15, endln:684:23 - |vpiActual: - \_array_var: (work@test_program.write_command_queue_slave), line:71:10, endln:71:38 |vpiActual: \_method_func_call: (pop_front), line:700:59, endln:700:68 |vpiParent: @@ -23506,6 +23290,8 @@ design: (work@top) \_assignment: , line:704:13, endln:704:60 |vpiName:read_command_queue_slave |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave + |vpiActual: + \_array_var: (work@test_program.read_command_queue_slave), line:72:10, endln:72:37 |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave.slave_id), line:704:48, endln:704:56 |vpiParent: @@ -23513,7 +23299,7 @@ design: (work@top) |vpiName:slave_id |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave.slave_id |vpiActual: - \_ref_var: (work@test_program.get_expected_command_for_slave.slave_id), line:703:44, endln:703:52 + \_io_decl: (slave_id), line:684:15, endln:684:23 |vpiIndex: \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave.i), line:704:58, endln:704:59 |vpiParent: @@ -23552,10 +23338,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.get_expected_command_for_slave.exp_cmd), line:687:15, endln:687:22 |vpiActual: - \_ref_obj: (addr), line:705:25, endln:705:29 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:705:25, endln:705:29 |vpiParent: \_hier_path: (exp_cmd.addr), line:705:17, endln:705:29 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiOperand: @@ -23571,10 +23358,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:683:15, endln:683:18 |vpiActual: - \_ref_obj: (addr), line:705:37, endln:705:41 + \_ref_obj: (work@test_program.get_expected_command_for_slave.addr), line:705:37, endln:705:41 |vpiParent: \_hier_path: (cmd.addr), line:705:33, endln:705:41 |vpiName:addr + |vpiFullName:work@test_program.get_expected_command_for_slave.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiStmt: @@ -23659,24 +23447,21 @@ design: (work@top) \_assignment: , line:712:13, endln:712:69 |vpiName:read_command_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (read_command_queue_slave), line:712:23, endln:712:47 + \_bit_select: (read_command_queue_slave[slave_id]), line:712:23, endln:712:47 |vpiParent: - \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (read_command_queue_slave[slave_id].pop_front), line:712:23, endln:712:69 - |vpiName:read_command_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id] + \_hier_path: (read_command_queue_slave[slave_id].pop_front), line:712:23, endln:712:69 |vpiName:read_command_queue_slave + |vpiFullName:read_command_queue_slave[slave_id] + |vpiActual: + \_array_var: (work@test_program.read_command_queue_slave), line:72:10, endln:72:37 |vpiIndex: - \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id].slave_id), line:712:48, endln:712:56 + \_ref_obj: (work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id].pop_front.slave_id), line:712:48, endln:712:56 |vpiParent: - \_bit_select: (read_command_queue_slave), line:712:23, endln:712:47 + \_bit_select: (read_command_queue_slave[slave_id]), line:712:23, endln:712:47 |vpiName:slave_id - |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id].slave_id + |vpiFullName:work@test_program.get_expected_command_for_slave.read_command_queue_slave[slave_id].pop_front.slave_id |vpiActual: \_io_decl: (slave_id), line:684:15, endln:684:23 - |vpiActual: - \_array_var: (work@test_program.read_command_queue_slave), line:72:10, endln:72:37 |vpiActual: \_method_func_call: (pop_front), line:712:58, endln:712:67 |vpiParent: @@ -23752,10 +23537,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_ref_obj: (addr), line:723:46, endln:723:50 + \_ref_obj: (work@test_program.verify_command.addr), line:723:46, endln:723:50 |vpiParent: \_hier_path: (exp_cmd.addr), line:723:38, endln:723:50 |vpiName:addr + |vpiFullName:work@test_program.verify_command.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiArgument: @@ -23771,10 +23557,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (addr), line:723:63, endln:723:67 + \_ref_obj: (work@test_program.verify_command.addr), line:723:63, endln:723:67 |vpiParent: \_hier_path: (actual_cmd.addr), line:723:52, endln:723:67 |vpiName:addr + |vpiFullName:work@test_program.verify_command.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiName:assert_equals @@ -23799,10 +23586,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_ref_obj: (burstcount), line:724:49, endln:724:59 + \_ref_obj: (work@test_program.verify_command.burstcount), line:724:49, endln:724:59 |vpiParent: \_hier_path: (exp_cmd.burstcount), line:724:41, endln:724:59 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiArgument: @@ -23818,10 +23606,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (burstcount), line:724:72, endln:724:82 + \_ref_obj: (work@test_program.verify_command.burstcount), line:724:72, endln:724:82 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:724:61, endln:724:82 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:assert_equals @@ -23849,10 +23638,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (trans), line:726:22, endln:726:27 + \_ref_obj: (work@test_program.verify_command.trans), line:726:22, endln:726:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:726:11, endln:726:27 |vpiName:trans + |vpiFullName:work@test_program.verify_command.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -23927,10 +23717,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_ref_obj: (burstcount), line:727:41, endln:727:51 + \_ref_obj: (work@test_program.verify_command.burstcount), line:727:41, endln:727:51 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:727:30, endln:727:51 |vpiName:burstcount + |vpiFullName:work@test_program.verify_command.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiStmt: @@ -23957,23 +23748,19 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_bit_select: (work@test_program.verify_command.data) + \_bit_select: (work@test_program.verify_command.exp_cmd.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.verify_command.data) - |vpiParent: - \_hier_path: (exp_cmd.data[i]), line:728:47, endln:728:62 - |vpiName:data - |vpiFullName:work@test_program.verify_command.data - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (exp_cmd.data[i]), line:728:47, endln:728:62 |vpiName:data - |vpiFullName:work@test_program.verify_command.data + |vpiFullName:work@test_program.verify_command.exp_cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: - \_ref_obj: (work@test_program.verify_command.data.i), line:728:60, endln:728:61 + \_ref_obj: (work@test_program.verify_command.exp_cmd.data[i].i), line:728:60, endln:728:61 |vpiParent: - \_bit_select: (work@test_program.verify_command.data) + \_bit_select: (work@test_program.verify_command.exp_cmd.data[i].data) |vpiName:i - |vpiFullName:work@test_program.verify_command.data.i + |vpiFullName:work@test_program.verify_command.exp_cmd.data[i].i |vpiActual: \_int_var: (work@test_program.verify_command.i), line:727:19, endln:727:20 |vpiArgument: @@ -23989,23 +23776,19 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_bit_select: (work@test_program.verify_command.data) + \_bit_select: (work@test_program.verify_command.actual_cmd.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.verify_command.data) - |vpiParent: - \_hier_path: (actual_cmd.data[i]), line:728:64, endln:728:82 - |vpiName:data - |vpiFullName:work@test_program.verify_command.data - |vpiActual: - \_typespec_member: (data), line:50:37, endln:50:63 + \_hier_path: (actual_cmd.data[i]), line:728:64, endln:728:82 |vpiName:data - |vpiFullName:work@test_program.verify_command.data + |vpiFullName:work@test_program.verify_command.actual_cmd.data[i].data + |vpiActual: + \_typespec_member: (data), line:50:37, endln:50:63 |vpiIndex: - \_ref_obj: (work@test_program.verify_command.data.i), line:728:80, endln:728:81 + \_ref_obj: (work@test_program.verify_command.actual_cmd.data[i].i), line:728:80, endln:728:81 |vpiParent: - \_bit_select: (work@test_program.verify_command.data) + \_bit_select: (work@test_program.verify_command.actual_cmd.data[i].data) |vpiName:i - |vpiFullName:work@test_program.verify_command.data.i + |vpiFullName:work@test_program.verify_command.actual_cmd.data[i].i |vpiActual: \_int_var: (work@test_program.verify_command.i), line:727:19, endln:727:20 |vpiName:assert_equals @@ -24030,23 +23813,19 @@ design: (work@top) |vpiActual: \_io_decl: (exp_cmd), line:720:27, endln:720:34 |vpiActual: - \_bit_select: (work@test_program.verify_command.byteenable) + \_bit_select: (work@test_program.verify_command.exp_cmd.byteenable[i].byteenable) |vpiParent: - \_ref_obj: (work@test_program.verify_command.byteenable) - |vpiParent: - \_hier_path: (exp_cmd.byteenable[i]), line:729:47, endln:729:68 - |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (exp_cmd.byteenable[i]), line:729:47, endln:729:68 |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable + |vpiFullName:work@test_program.verify_command.exp_cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: - \_ref_obj: (work@test_program.verify_command.byteenable.i), line:729:66, endln:729:67 + \_ref_obj: (work@test_program.verify_command.exp_cmd.byteenable[i].i), line:729:66, endln:729:67 |vpiParent: - \_bit_select: (work@test_program.verify_command.byteenable) + \_bit_select: (work@test_program.verify_command.exp_cmd.byteenable[i].byteenable) |vpiName:i - |vpiFullName:work@test_program.verify_command.byteenable.i + |vpiFullName:work@test_program.verify_command.exp_cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.verify_command.i), line:727:19, endln:727:20 |vpiArgument: @@ -24062,23 +23841,19 @@ design: (work@top) |vpiActual: \_io_decl: (actual_cmd), line:720:15, endln:720:25 |vpiActual: - \_bit_select: (work@test_program.verify_command.byteenable) + \_bit_select: (work@test_program.verify_command.actual_cmd.byteenable[i].byteenable) |vpiParent: - \_ref_obj: (work@test_program.verify_command.byteenable) - |vpiParent: - \_hier_path: (actual_cmd.byteenable[i]), line:729:70, endln:729:94 - |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable - |vpiActual: - \_typespec_member: (byteenable), line:51:37, endln:51:63 + \_hier_path: (actual_cmd.byteenable[i]), line:729:70, endln:729:94 |vpiName:byteenable - |vpiFullName:work@test_program.verify_command.byteenable + |vpiFullName:work@test_program.verify_command.actual_cmd.byteenable[i].byteenable + |vpiActual: + \_typespec_member: (byteenable), line:51:37, endln:51:63 |vpiIndex: - \_ref_obj: (work@test_program.verify_command.byteenable.i), line:729:92, endln:729:93 + \_ref_obj: (work@test_program.verify_command.actual_cmd.byteenable[i].i), line:729:92, endln:729:93 |vpiParent: - \_bit_select: (work@test_program.verify_command.byteenable) + \_bit_select: (work@test_program.verify_command.actual_cmd.byteenable[i].byteenable) |vpiName:i - |vpiFullName:work@test_program.verify_command.byteenable.i + |vpiFullName:work@test_program.verify_command.actual_cmd.byteenable[i].i |vpiActual: \_int_var: (work@test_program.verify_command.i), line:727:19, endln:727:20 |vpiName:assert_equals @@ -24418,27 +24193,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_response.rsp), line:763:16, endln:763:19 |vpiActual: - \_bit_select: (work@test_program.create_response.rsp.data[i]), line:767:14, endln:767:18 + \_bit_select: (work@test_program.create_response.rsp.data[i].data), line:767:14, endln:767:18 |vpiParent: - \_ref_obj: (work@test_program.create_response.rsp.data[i]) - |vpiParent: - \_hier_path: (rsp.data[i]), line:767:10, endln:767:21 - |vpiName:rsp.data[i] - |vpiFullName:work@test_program.create_response.rsp.data[i] - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (rsp.data[i]), line:767:10, endln:767:21 |vpiName:data - |vpiFullName:work@test_program.create_response.rsp.data[i] + |vpiFullName:work@test_program.create_response.rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: \_ref_obj: (work@test_program.create_response.rsp.data[i].i), line:767:19, endln:767:20 |vpiParent: - \_bit_select: (work@test_program.create_response.rsp.data[i]), line:767:14, endln:767:18 + \_bit_select: (work@test_program.create_response.rsp.data[i].data), line:767:14, endln:767:18 |vpiName:i |vpiFullName:work@test_program.create_response.rsp.data[i].i |vpiActual: \_int_var: (work@test_program.create_response.i), line:766:16, endln:766:17 - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 |vpiStmt: \_assignment: , line:768:10, endln:768:62 |vpiParent: @@ -24473,27 +24242,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.create_response.rsp), line:763:16, endln:763:19 |vpiActual: - \_bit_select: (work@test_program.create_response.rsp.latency[i]), line:768:14, endln:768:21 + \_bit_select: (work@test_program.create_response.rsp.latency[i].latency), line:768:14, endln:768:21 |vpiParent: - \_ref_obj: (work@test_program.create_response.rsp.latency[i]) - |vpiParent: - \_hier_path: (rsp.latency[i]), line:768:10, endln:768:24 - |vpiName:rsp.latency[i] - |vpiFullName:work@test_program.create_response.rsp.latency[i] - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 + \_hier_path: (rsp.latency[i]), line:768:10, endln:768:24 |vpiName:latency - |vpiFullName:work@test_program.create_response.rsp.latency[i] + |vpiFullName:work@test_program.create_response.rsp.latency[i].latency + |vpiActual: + \_typespec_member: (latency), line:60:37, endln:60:61 |vpiIndex: \_ref_obj: (work@test_program.create_response.rsp.latency[i].i), line:768:22, endln:768:23 |vpiParent: - \_bit_select: (work@test_program.create_response.rsp.latency[i]), line:768:14, endln:768:21 + \_bit_select: (work@test_program.create_response.rsp.latency[i].latency), line:768:14, endln:768:21 |vpiName:i |vpiFullName:work@test_program.create_response.rsp.latency[i].i |vpiActual: \_int_var: (work@test_program.create_response.i), line:766:16, endln:766:17 - |vpiActual: - \_typespec_member: (latency), line:60:37, endln:60:61 |vpiStmt: \_return_stmt: , line:771:7, endln:771:13 |vpiParent: @@ -24587,10 +24350,11 @@ design: (work@top) |vpiActual: \_io_decl: (cmd), line:775:15, endln:775:18 |vpiActual: - \_ref_obj: (addr), line:779:31, endln:779:35 + \_ref_obj: (work@test_program.get_expected_read_response.addr), line:779:31, endln:779:35 |vpiParent: \_hier_path: (cmd.addr), line:779:27, endln:779:35 |vpiName:addr + |vpiFullName:work@test_program.get_expected_read_response.addr |vpiActual: \_typespec_member: (addr), line:49:37, endln:49:41 |vpiOperand: @@ -24622,24 +24386,21 @@ design: (work@top) \_assignment: , line:781:7, endln:781:60 |vpiName:read_response_queue_slave[slave_id].pop_front |vpiActual: - \_bit_select: (read_response_queue_slave), line:781:13, endln:781:38 + \_bit_select: (read_response_queue_slave[slave_id]), line:781:13, endln:781:38 |vpiParent: - \_ref_obj: (work@test_program.get_expected_read_response.read_response_queue_slave[slave_id]) - |vpiParent: - \_hier_path: (read_response_queue_slave[slave_id].pop_front), line:781:13, endln:781:60 - |vpiName:read_response_queue_slave[slave_id] - |vpiFullName:work@test_program.get_expected_read_response.read_response_queue_slave[slave_id] + \_hier_path: (read_response_queue_slave[slave_id].pop_front), line:781:13, endln:781:60 |vpiName:read_response_queue_slave + |vpiFullName:read_response_queue_slave[slave_id] + |vpiActual: + \_array_var: (work@test_program.read_response_queue_slave), line:75:10, endln:75:38 |vpiIndex: - \_ref_obj: (work@test_program.get_expected_read_response.read_response_queue_slave[slave_id].slave_id), line:781:39, endln:781:47 + \_ref_obj: (work@test_program.get_expected_read_response.read_response_queue_slave[slave_id].pop_front.slave_id), line:781:39, endln:781:47 |vpiParent: - \_bit_select: (read_response_queue_slave), line:781:13, endln:781:38 + \_bit_select: (read_response_queue_slave[slave_id]), line:781:13, endln:781:38 |vpiName:slave_id - |vpiFullName:work@test_program.get_expected_read_response.read_response_queue_slave[slave_id].slave_id + |vpiFullName:work@test_program.get_expected_read_response.read_response_queue_slave[slave_id].pop_front.slave_id |vpiActual: \_int_var: (work@test_program.get_expected_read_response.slave_id), line:779:16, endln:779:24 - |vpiActual: - \_array_var: (work@test_program.read_response_queue_slave), line:75:10, endln:75:38 |vpiActual: \_method_func_call: (pop_front), line:781:49, endln:781:58 |vpiParent: @@ -24715,10 +24476,11 @@ design: (work@top) |vpiActual: \_io_decl: (exp_rsp), line:787:28, endln:787:35 |vpiActual: - \_ref_obj: (burstcount), line:790:49, endln:790:59 + \_ref_obj: (work@test_program.verify_response.burstcount), line:790:49, endln:790:59 |vpiParent: \_hier_path: (exp_rsp.burstcount), line:790:41, endln:790:59 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiArgument: @@ -24734,10 +24496,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: - \_ref_obj: (burstcount), line:790:72, endln:790:82 + \_ref_obj: (work@test_program.verify_response.burstcount), line:790:72, endln:790:82 |vpiParent: \_hier_path: (actual_rsp.burstcount), line:790:61, endln:790:82 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiName:assert_equals @@ -24802,10 +24565,11 @@ design: (work@top) |vpiActual: \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: - \_ref_obj: (burstcount), line:791:38, endln:791:48 + \_ref_obj: (work@test_program.verify_response.burstcount), line:791:38, endln:791:48 |vpiParent: \_hier_path: (actual_rsp.burstcount), line:791:27, endln:791:48 |vpiName:burstcount + |vpiFullName:work@test_program.verify_response.burstcount |vpiActual: \_typespec_member: (burstcount), line:58:37, endln:58:47 |vpiStmt: @@ -24832,23 +24596,19 @@ design: (work@top) |vpiActual: \_io_decl: (exp_rsp), line:787:28, endln:787:35 |vpiActual: - \_bit_select: (work@test_program.verify_response.data) + \_bit_select: (work@test_program.verify_response.exp_rsp.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.verify_response.data) - |vpiParent: - \_hier_path: (exp_rsp.data[i]), line:792:43, endln:792:58 - |vpiName:data - |vpiFullName:work@test_program.verify_response.data - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (exp_rsp.data[i]), line:792:43, endln:792:58 |vpiName:data - |vpiFullName:work@test_program.verify_response.data + |vpiFullName:work@test_program.verify_response.exp_rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: - \_ref_obj: (work@test_program.verify_response.data.i), line:792:56, endln:792:57 + \_ref_obj: (work@test_program.verify_response.exp_rsp.data[i].i), line:792:56, endln:792:57 |vpiParent: - \_bit_select: (work@test_program.verify_response.data) + \_bit_select: (work@test_program.verify_response.exp_rsp.data[i].data) |vpiName:i - |vpiFullName:work@test_program.verify_response.data.i + |vpiFullName:work@test_program.verify_response.exp_rsp.data[i].i |vpiActual: \_int_var: (work@test_program.verify_response.i), line:791:16, endln:791:17 |vpiArgument: @@ -24864,23 +24624,19 @@ design: (work@top) |vpiActual: \_io_decl: (actual_rsp), line:787:16, endln:787:26 |vpiActual: - \_bit_select: (work@test_program.verify_response.data) + \_bit_select: (work@test_program.verify_response.actual_rsp.data[i].data) |vpiParent: - \_ref_obj: (work@test_program.verify_response.data) - |vpiParent: - \_hier_path: (actual_rsp.data[i]), line:792:60, endln:792:78 - |vpiName:data - |vpiFullName:work@test_program.verify_response.data - |vpiActual: - \_typespec_member: (data), line:59:37, endln:59:61 + \_hier_path: (actual_rsp.data[i]), line:792:60, endln:792:78 |vpiName:data - |vpiFullName:work@test_program.verify_response.data + |vpiFullName:work@test_program.verify_response.actual_rsp.data[i].data + |vpiActual: + \_typespec_member: (data), line:59:37, endln:59:61 |vpiIndex: - \_ref_obj: (work@test_program.verify_response.data.i), line:792:76, endln:792:77 + \_ref_obj: (work@test_program.verify_response.actual_rsp.data[i].i), line:792:76, endln:792:77 |vpiParent: - \_bit_select: (work@test_program.verify_response.data) + \_bit_select: (work@test_program.verify_response.actual_rsp.data[i].data) |vpiName:i - |vpiFullName:work@test_program.verify_response.data.i + |vpiFullName:work@test_program.verify_response.actual_rsp.data[i].i |vpiActual: \_int_var: (work@test_program.verify_response.i), line:791:16, endln:791:17 |vpiName:assert_equals @@ -24989,18 +24745,15 @@ design: (work@top) \_assignment: , line:254:7, endln:254:53 |vpiName:read_command_queue_master[0].pop_front |vpiActual: - \_bit_select: (read_command_queue_master), line:254:13, endln:254:38 + \_bit_select: (read_command_queue_master[0]), line:254:13, endln:254:38 |vpiParent: - \_ref_obj: (work@test_program.read_command_queue_master[0]) - |vpiParent: - \_hier_path: (read_command_queue_master[0].pop_front), line:254:13, endln:254:53 - |vpiName:read_command_queue_master[0] - |vpiFullName:work@test_program.read_command_queue_master[0] + \_hier_path: (read_command_queue_master[0].pop_front), line:254:13, endln:254:53 |vpiName:read_command_queue_master - |vpiIndex: - \_constant: , line:254:39, endln:254:40 + |vpiFullName:read_command_queue_master[0] |vpiActual: \_array_var: (work@test_program.read_command_queue_master), line:68:10, endln:68:38 + |vpiIndex: + \_constant: , line:254:39, endln:254:40 |vpiActual: \_method_func_call: (pop_front), line:254:42, endln:254:51 |vpiParent: @@ -25422,10 +25175,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: - \_ref_obj: (trans), line:300:22, endln:300:27 + \_ref_obj: (work@test_program.trans), line:300:22, endln:300:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:300:11, endln:300:27 |vpiName:trans + |vpiFullName:work@test_program.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -25464,10 +25218,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:284:19, endln:284:29 |vpiActual: - \_ref_obj: (burstcount), line:301:43, endln:301:53 + \_ref_obj: (work@test_program.burstcount), line:301:43, endln:301:53 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:301:32, endln:301:53 |vpiName:burstcount + |vpiFullName:work@test_program.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:create_response @@ -25680,18 +25435,15 @@ design: (work@top) \_assignment: , line:397:7, endln:397:53 |vpiName:read_command_queue_master[1].pop_front |vpiActual: - \_bit_select: (read_command_queue_master), line:397:13, endln:397:38 + \_bit_select: (read_command_queue_master[1]), line:397:13, endln:397:38 |vpiParent: - \_ref_obj: (work@test_program.read_command_queue_master[1]) - |vpiParent: - \_hier_path: (read_command_queue_master[1].pop_front), line:397:13, endln:397:53 - |vpiName:read_command_queue_master[1] - |vpiFullName:work@test_program.read_command_queue_master[1] + \_hier_path: (read_command_queue_master[1].pop_front), line:397:13, endln:397:53 |vpiName:read_command_queue_master - |vpiIndex: - \_constant: , line:397:39, endln:397:40 + |vpiFullName:read_command_queue_master[1] |vpiActual: \_array_var: (work@test_program.read_command_queue_master), line:68:10, endln:68:38 + |vpiIndex: + \_constant: , line:397:39, endln:397:40 |vpiActual: \_method_func_call: (pop_front), line:397:42, endln:397:51 |vpiParent: @@ -26113,10 +25865,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: - \_ref_obj: (trans), line:443:22, endln:443:27 + \_ref_obj: (work@test_program.trans), line:443:22, endln:443:27 |vpiParent: \_hier_path: (actual_cmd.trans), line:443:11, endln:443:27 |vpiName:trans + |vpiFullName:work@test_program.trans |vpiActual: \_typespec_member: (trans), line:47:37, endln:47:42 |vpiOperand: @@ -26155,10 +25908,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@test_program.actual_cmd), line:427:19, endln:427:29 |vpiActual: - \_ref_obj: (burstcount), line:444:43, endln:444:53 + \_ref_obj: (work@test_program.burstcount), line:444:43, endln:444:53 |vpiParent: \_hier_path: (actual_cmd.burstcount), line:444:32, endln:444:53 |vpiName:burstcount + |vpiFullName:work@test_program.burstcount |vpiActual: \_typespec_member: (burstcount), line:48:37, endln:48:47 |vpiName:create_response @@ -26507,42 +26261,43 @@ design: (work@top) |vpiParent: \_always: , line:802:4, endln:804:7 |vpiCondition: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiParent: \_event_control: , line:802:11, endln:802:69 - |vpiName:$root.tb.dut.master_0[2].signal_write_response_complete - |vpiFullName:work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete + |vpiName:$root.tb.dut.master_02.signal_write_response_complete + |vpiFullName:work@test_program1.$root.tb.dut.master_02.signal_write_response_complete |vpiActual: \_ref_obj: ($root) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:$root |vpiActual: \_ref_obj: (tb) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:tb |vpiActual: \_ref_obj: (dut) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:dut |vpiActual: \_ref_obj: (master_0) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:master_0 |vpiActual: - \_bit_select: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete) + \_bit_select: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete.2) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 - |vpiFullName:work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 + |vpiName:2 + |vpiFullName:work@test_program1.$root.tb.dut.master_02.signal_write_response_complete.2 |vpiIndex: \_constant: , line:802:35, endln:802:36 |vpiActual: \_ref_obj: (signal_write_response_complete) |vpiParent: - \_hier_path: (work@test_program1.$root.tb.dut.master_0[2].signal_write_response_complete), line:802:13, endln:802:68 + \_hier_path: (work@test_program1.$root.tb.dut.master_02.signal_write_response_complete), line:802:13, endln:802:68 |vpiName:signal_write_response_complete |vpiStmt: \_begin: (work@test_program1), line:802:70, endln:804:7 diff --git a/tests/DoublePres/DoublePres.log b/tests/DoublePres/DoublePres.log index 67016b912d..3dd30b5be5 100644 --- a/tests/DoublePres/DoublePres.log +++ b/tests/DoublePres/DoublePres.log @@ -1144,7 +1144,7 @@ integer_typespec 2 integer_var 1 logic_net 8 logic_typespec 12 -logic_var 1 +logic_var 2 module_inst 22 operation 89 param_assign 43 @@ -1172,7 +1172,7 @@ integer_typespec 2 integer_var 2 logic_net 8 logic_typespec 12 -logic_var 1 +logic_var 2 module_inst 36 operation 90 param_assign 43 @@ -1808,8 +1808,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:48:13, endln:48:17 - |vpiParent: - \_assignment: , line:48:4, endln:48:17 |vpiDecompile:10.1 |vpiSize:64 |REAL:10.100000 @@ -1817,11 +1815,11 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@dut.incr_d.incr_d), line:48:4, endln:48:10 |vpiParent: - \_begin: (work@dut.incr_d) + \_assignment: , line:48:4, endln:48:17 |vpiName:incr_d |vpiFullName:work@dut.incr_d.incr_d |vpiActual: - \_integer_var: (incr_d), line:47:4, endln:47:11 + \_logic_var: (incr_d) |vpiStmt: \_operation: , line:49:4, endln:49:12 |vpiParent: @@ -2135,7 +2133,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (A9), line:87:22, endln:87:24 |vpiParent: - \_operation: , line:87:7, endln:87:29 + \_operation: , line:87:22, endln:87:28 |vpiName:A9 |vpiOperand: \_constant: , line:87:27, endln:87:28 @@ -2184,7 +2182,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (A10), line:91:24, endln:91:27 |vpiParent: - \_operation: , line:91:7, endln:91:35 + \_operation: , line:91:24, endln:91:34 |vpiName:A10 |vpiOperand: \_constant: , line:91:31, endln:91:34 @@ -2259,7 +2257,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (A12), line:99:23, endln:99:26 |vpiParent: - \_operation: , line:99:7, endln:99:36 + \_operation: , line:99:23, endln:99:35 |vpiName:A12 |vpiOperand: \_constant: , line:99:29, endln:99:35 @@ -2308,7 +2306,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (A13), line:103:23, endln:103:26 |vpiParent: - \_operation: , line:103:7, endln:103:36 + \_operation: , line:103:23, endln:103:35 |vpiName:A13 |vpiOperand: \_constant: , line:103:29, endln:103:35 @@ -2357,7 +2355,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (A15), line:107:21, endln:107:24 |vpiParent: - \_operation: , line:107:6, endln:107:33 + \_operation: , line:107:21, endln:107:32 |vpiName:A15 |vpiOperand: \_constant: , line:107:28, endln:107:32 @@ -2953,7 +2951,7 @@ design: (work@top) |vpiName:incr_d |vpiFullName:work@top.d.incr_d.incr_d |vpiActual: - \_integer_var: (work@top.d.incr_d.incr_d), line:47:4, endln:47:11 + \_logic_var: (incr_d) |vpiStmt: \_operation: , line:49:4, endln:49:12 |vpiParent: @@ -2966,7 +2964,7 @@ design: (work@top) |vpiName:incr_d |vpiFullName:work@top.d.incr_d.incr_d |vpiActual: - \_integer_var: (work@top.d.incr_d.incr_d), line:47:4, endln:47:11 + \_integer_var: (incr_d), line:47:4, endln:47:11 |vpiStmt: \_return_stmt: , line:50:4, endln:50:10 |vpiParent: @@ -2978,7 +2976,7 @@ design: (work@top) |vpiName:incr_d |vpiFullName:work@top.d.incr_d.incr_d |vpiActual: - \_integer_var: (work@top.d.incr_d.incr_d), line:47:4, endln:47:11 + \_integer_var: (incr_d), line:47:4, endln:47:11 |vpiInstance: \_module_inst: work@dut (work@top.d), file:${SURELOG_DIR}/tests/DoublePres/dut.sv, line:3:3, endln:5:10 |vpiNet: diff --git a/tests/DpiTask/DpiTask.log b/tests/DpiTask/DpiTask.log index f367853006..dbf13a8750 100644 --- a/tests/DpiTask/DpiTask.log +++ b/tests/DpiTask/DpiTask.log @@ -862,8 +862,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:5:11, endln:5:12 - |vpiParent: - \_assignment: , line:5:5, endln:5:12 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -871,7 +869,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.task_1.ret), line:5:5, endln:5:8 |vpiParent: - \_function: (work@top.task_1), line:4:3, endln:6:10 + \_assignment: , line:5:5, endln:5:12 |vpiName:ret |vpiFullName:work@top.task_1.ret |vpiActual: diff --git a/tests/EarlgreyPackParam/EarlgreyPackParam.log b/tests/EarlgreyPackParam/EarlgreyPackParam.log index 7bc5d6073b..ca26a0ab08 100644 --- a/tests/EarlgreyPackParam/EarlgreyPackParam.log +++ b/tests/EarlgreyPackParam/EarlgreyPackParam.log @@ -460,7 +460,7 @@ parameter 31 part_select 3 range 8 ref_module 10 -ref_obj 13 +ref_obj 6 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -488,7 +488,7 @@ parameter 31 part_select 3 range 8 ref_module 10 -ref_obj 13 +ref_obj 6 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -953,11 +953,9 @@ design: (work@test) |vpiParent: \_module_inst: work@test (work@test), file:${SURELOG_DIR}/tests/EarlgreyPackParam/dut.sv, line:7:1, endln:10:10 |vpiRhs: - \_part_select: , line:9:50, endln:9:55 - |vpiParent: - \_ref_obj: alert_handler_reg_pkg::AsyncOn (alert_handler_reg_pkg::AsyncOn) - |vpiName:alert_handler_reg_pkg::AsyncOn - |vpiDefName:alert_handler_reg_pkg::AsyncOn + \_part_select: alert_handler_reg_pkg::AsyncOn (alert_handler_reg_pkg::AsyncOn), line:9:50, endln:9:55 + |vpiName:alert_handler_reg_pkg::AsyncOn + |vpiDefName:alert_handler_reg_pkg::AsyncOn |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:50, endln:9:52 diff --git a/tests/ElabCParam/ElabCParam.log b/tests/ElabCParam/ElabCParam.log index a8c93f1aaf..00155f86b5 100644 --- a/tests/ElabCParam/ElabCParam.log +++ b/tests/ElabCParam/ElabCParam.log @@ -913,7 +913,7 @@ param_assign 31 parameter 35 range 18 ref_module 7 -ref_obj 25 +ref_obj 17 ref_var 2 sys_func_call 2 task 9 @@ -953,7 +953,7 @@ param_assign 45 parameter 35 range 18 ref_module 7 -ref_obj 31 +ref_obj 23 ref_var 2 sys_func_call 2 task 18 @@ -1579,15 +1579,15 @@ design: (work@socket_1n) |vpiParent: \_module_inst: work@all_zero (work@all_zero), file:${SURELOG_DIR}/tests/ElabCParam/dut.sv, line:54:1, endln:67:10 |vpiRhs: - \_indexed_part_select: , line:58:28, endln:58:45 - |vpiParent: - \_ref_obj: DReqDepth (DReqDepth) - |vpiName:DReqDepth - |vpiDefName:DReqDepth + \_indexed_part_select: DReqDepth (DReqDepth), line:58:28, endln:58:45 + |vpiName:DReqDepth + |vpiDefName:DReqDepth |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:58:38, endln:58:41 + |vpiParent: + \_indexed_part_select: DReqDepth (DReqDepth), line:58:28, endln:58:45 |vpiOpType:25 |vpiOperand: \_constant: , line:58:38, endln:58:39 @@ -1802,6 +1802,8 @@ design: (work@socket_1n) |vpiOpType:8 |vpiOperand: \_sys_func_call: ($clog2), line:18:59, endln:18:72 + |vpiParent: + \_operation: , line:18:57, endln:18:72 |vpiArgument: \_ref_obj: (Depth), line:18:66, endln:18:71 |vpiParent: @@ -1980,15 +1982,15 @@ design: (work@socket_1n) |vpiParent: \_module_inst: work@socket_1n (work@socket_1n), file:${SURELOG_DIR}/tests/ElabCParam/dut.sv, line:38:1, endln:51:10 |vpiRhs: - \_indexed_part_select: , line:42:28, endln:42:45 - |vpiParent: - \_ref_obj: DReqDepth (DReqDepth) - |vpiName:DReqDepth - |vpiDefName:DReqDepth + \_indexed_part_select: DReqDepth (DReqDepth), line:42:28, endln:42:45 + |vpiName:DReqDepth + |vpiDefName:DReqDepth |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:42:38, endln:42:41 + |vpiParent: + \_indexed_part_select: DReqDepth (DReqDepth), line:42:28, endln:42:45 |vpiOpType:25 |vpiOperand: \_constant: , line:42:38, endln:42:39 @@ -2936,4 +2938,4 @@ design: (work@socket_1n) [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/tests/ElabCParam/dut.sv | ${SURELOG_DIR}/build/regression/ElabCParam/roundtrip/dut_000.sv | 26 | 67 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ElabCParam/dut.sv | ${SURELOG_DIR}/build/regression/ElabCParam/roundtrip/dut_000.sv | 28 | 67 | \ No newline at end of file diff --git a/tests/EmptyAssign/EmptyAssign.log b/tests/EmptyAssign/EmptyAssign.log index ac087f0dcc..7d962fd69d 100644 --- a/tests/EmptyAssign/EmptyAssign.log +++ b/tests/EmptyAssign/EmptyAssign.log @@ -357,7 +357,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@dut.b), line:5:7, endln:5:8 |vpiParent: - \_begin: (work@dut), line:3:9, endln:9:4 + \_operation: , line:5:7, endln:5:14 |vpiName:b |vpiFullName:work@dut.b |vpiOperand: diff --git a/tests/Escape/Escape.log b/tests/Escape/Escape.log index c909c6671b..1f559581e2 100644 --- a/tests/Escape/Escape.log +++ b/tests/Escape/Escape.log @@ -117,7 +117,7 @@ port 21 prim_term 3 range 3 ref_module 2 -ref_obj 31 +ref_obj 30 task 9 unsupported_typespec 1 === UHDM Object Stats End === diff --git a/tests/EvalFunc/EvalFunc.log b/tests/EvalFunc/EvalFunc.log index f89ab755d6..cb992eb17f 100644 --- a/tests/EvalFunc/EvalFunc.log +++ b/tests/EvalFunc/EvalFunc.log @@ -1601,12 +1601,12 @@ design: (work@top) |vpiOperand: \_operation: , line:25:11, endln:25:21 |vpiParent: - \_function: (work@top.vbits), line:24:1, endln:26:12 + \_operation: , line:25:10, endln:25:42 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@top.vbits.value), line:25:11, endln:25:16 |vpiParent: - \_function: (work@top.vbits), line:24:1, endln:26:12 + \_operation: , line:25:11, endln:25:21 |vpiName:value |vpiFullName:work@top.vbits.value |vpiActual: @@ -1751,7 +1751,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.log2.value), line:38:6, endln:38:11 |vpiParent: - \_begin: (work@top.log2), line:37:1, endln:47:4 + \_operation: , line:38:6, endln:38:15 |vpiName:value |vpiFullName:work@top.log2.value |vpiActual: @@ -1773,7 +1773,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.log2.value), line:39:10, endln:39:15 |vpiParent: - \_if_else: , line:38:2, endln:46:5 + \_assignment: , line:39:3, endln:39:15 |vpiName:value |vpiFullName:work@top.log2.value |vpiActual: @@ -1781,7 +1781,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2.log2), line:39:3, endln:39:7 |vpiParent: - \_if_else: , line:38:2, endln:46:5 + \_assignment: , line:39:3, endln:39:15 |vpiName:log2 |vpiFullName:work@top.log2.log2 |vpiActual: @@ -1800,12 +1800,12 @@ design: (work@top) |vpiRhs: \_operation: , line:42:13, endln:42:20 |vpiParent: - \_begin: (work@top.log2), line:41:2, endln:46:5 + \_assignment: , line:42:3, endln:42:20 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.log2.value), line:42:13, endln:42:18 |vpiParent: - \_begin: (work@top.log2), line:41:2, endln:46:5 + \_operation: , line:42:13, endln:42:20 |vpiName:value |vpiFullName:work@top.log2.value |vpiActual: @@ -1821,7 +1821,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2.shifted), line:42:3, endln:42:10 |vpiParent: - \_begin: (work@top.log2), line:41:2, endln:46:5 + \_assignment: , line:42:3, endln:42:20 |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: @@ -1858,12 +1858,12 @@ design: (work@top) |vpiRhs: \_operation: , line:43:30, endln:43:35 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_assignment: , line:43:26, endln:43:35 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@top.log2.res), line:43:30, endln:43:33 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_operation: , line:43:30, endln:43:35 |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: @@ -1879,7 +1879,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2.res), line:43:26, endln:43:29 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_assignment: , line:43:26, endln:43:35 |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: @@ -1914,12 +1914,12 @@ design: (work@top) |vpiRhs: \_operation: , line:44:14, endln:44:24 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_assignment: , line:44:4, endln:44:24 |vpiOpType:23 |vpiOperand: \_ref_obj: (work@top.log2.shifted), line:44:14, endln:44:21 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_operation: , line:44:14, endln:44:24 |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: @@ -1935,7 +1935,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2.shifted), line:44:4, endln:44:11 |vpiParent: - \_for_stmt: (work@top.log2), line:43:3, endln:43:6 + \_assignment: , line:44:4, endln:44:24 |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: @@ -1949,7 +1949,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.log2.res), line:45:10, endln:45:13 |vpiParent: - \_begin: (work@top.log2), line:41:2, endln:46:5 + \_assignment: , line:45:3, endln:45:13 |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: @@ -1957,7 +1957,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2.log2), line:45:3, endln:45:7 |vpiParent: - \_begin: (work@top.log2), line:41:2, endln:46:5 + \_assignment: , line:45:3, endln:45:13 |vpiName:log2 |vpiFullName:work@top.log2.log2 |vpiActual: @@ -1999,8 +1999,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:54:10, endln:54:11 - |vpiParent: - \_assignment: , line:54:1, endln:54:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2008,7 +2006,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2_2.log2_2), line:54:1, endln:54:7 |vpiParent: - \_begin: (work@top.log2_2), line:53:1, endln:60:4 + \_assignment: , line:54:1, endln:54:11 |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: @@ -2039,7 +2037,7 @@ design: (work@top) |vpiRhs: \_operation: , line:56:13, endln:56:27 |vpiParent: - \_begin: (work@top.log2_2), line:55:12, endln:59:4 + \_assignment: , line:56:5, endln:56:27 |vpiOpType:11 |vpiOperand: \_func_call: (foo), line:56:13, endln:56:23 @@ -2067,7 +2065,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2_2.value), line:56:5, endln:56:10 |vpiParent: - \_begin: (work@top.log2_2), line:55:12, endln:59:4 + \_assignment: , line:56:5, endln:56:27 |vpiName:value |vpiFullName:work@top.log2_2.value |vpiActual: @@ -2086,12 +2084,12 @@ design: (work@top) |vpiRhs: \_operation: , line:57:32, endln:57:42 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_assignment: , line:57:23, endln:57:42 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@top.log2_2.log2_2), line:57:32, endln:57:38 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_operation: , line:57:32, endln:57:42 |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: @@ -2107,7 +2105,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2_2.log2_2), line:57:23, endln:57:29 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_assignment: , line:57:23, endln:57:42 |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: @@ -2142,12 +2140,12 @@ design: (work@top) |vpiRhs: \_operation: , line:58:14, endln:58:24 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_assignment: , line:58:6, endln:58:24 |vpiOpType:23 |vpiOperand: \_ref_obj: (work@top.log2_2.value), line:58:14, endln:58:19 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_operation: , line:58:14, endln:58:24 |vpiName:value |vpiFullName:work@top.log2_2.value |vpiActual: @@ -2163,7 +2161,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.log2_2.value), line:58:6, endln:58:11 |vpiParent: - \_for_stmt: (work@top.log2_2), line:57:5, endln:57:8 + \_assignment: , line:58:6, endln:58:24 |vpiName:value |vpiFullName:work@top.log2_2.value |vpiActual: @@ -2448,7 +2446,7 @@ design: (work@top) |vpiName:log2 |vpiFullName:work@top.log2.log2 |vpiActual: - \_integer_var: , line:33:10, endln:33:17 + \_integer_var: (log2), line:33:10, endln:33:17 |vpiElseStmt: \_begin: (work@top.log2), line:41:2, endln:46:5 |vpiParent: @@ -2482,7 +2480,7 @@ design: (work@top) |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: - \_logic_var: (work@top.log2.shifted), line:35:1, endln:35:11 + \_logic_var: (shifted), line:35:1, endln:35:11 |vpiStmt: \_for_stmt: (work@top.log2), line:43:3, endln:43:6 |vpiParent: @@ -2520,7 +2518,7 @@ design: (work@top) |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: - \_integer_var: (work@top.log2.res), line:36:1, endln:36:8 + \_integer_var: (res), line:36:1, endln:36:8 |vpiOperand: \_constant: , line:43:34, endln:43:35 |vpiLhs: @@ -2530,7 +2528,7 @@ design: (work@top) |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: - \_integer_var: (work@top.log2.res), line:36:1, endln:36:8 + \_integer_var: (res), line:36:1, endln:36:8 |vpiCondition: \_operation: , line:43:15, endln:43:24 |vpiParent: @@ -2543,7 +2541,7 @@ design: (work@top) |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: - \_logic_var: (work@top.log2.shifted), line:35:1, endln:35:11 + \_logic_var: (shifted), line:35:1, endln:35:11 |vpiOperand: \_constant: , line:43:23, endln:43:24 |vpiStmt: @@ -2564,7 +2562,7 @@ design: (work@top) |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: - \_logic_var: (work@top.log2.shifted), line:35:1, endln:35:11 + \_logic_var: (shifted), line:35:1, endln:35:11 |vpiOperand: \_constant: , line:44:23, endln:44:24 |vpiLhs: @@ -2574,7 +2572,7 @@ design: (work@top) |vpiName:shifted |vpiFullName:work@top.log2.shifted |vpiActual: - \_logic_var: (work@top.log2.shifted), line:35:1, endln:35:11 + \_logic_var: (shifted), line:35:1, endln:35:11 |vpiStmt: \_assignment: , line:45:3, endln:45:13 |vpiParent: @@ -2588,7 +2586,7 @@ design: (work@top) |vpiName:res |vpiFullName:work@top.log2.res |vpiActual: - \_integer_var: (work@top.log2.res), line:36:1, endln:36:8 + \_integer_var: (res), line:36:1, endln:36:8 |vpiLhs: \_ref_obj: (work@top.log2.log2), line:45:3, endln:45:7 |vpiParent: @@ -2596,7 +2594,7 @@ design: (work@top) |vpiName:log2 |vpiFullName:work@top.log2.log2 |vpiActual: - \_integer_var: , line:33:10, endln:33:17 + \_integer_var: (log2), line:33:10, endln:33:17 |vpiInstance: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/EvalFunc/dut.sv, line:22:1, endln:68:10 |vpiTaskFunc: @@ -2636,7 +2634,7 @@ design: (work@top) |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: - \_integer_var: , line:51:10, endln:51:17 + \_integer_var: (log2_2), line:51:10, endln:51:17 |vpiStmt: \_if_stmt: , line:55:1, endln:59:4 |vpiParent: @@ -2713,7 +2711,7 @@ design: (work@top) |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: - \_integer_var: , line:51:10, endln:51:17 + \_integer_var: (log2_2), line:51:10, endln:51:17 |vpiOperand: \_constant: , line:57:41, endln:57:42 |vpiLhs: @@ -2723,7 +2721,7 @@ design: (work@top) |vpiName:log2_2 |vpiFullName:work@top.log2_2.log2_2 |vpiActual: - \_integer_var: , line:51:10, endln:51:17 + \_integer_var: (log2_2), line:51:10, endln:51:17 |vpiCondition: \_operation: , line:57:12, endln:57:21 |vpiParent: diff --git a/tests/EvalFuncArray/EvalFuncArray.log b/tests/EvalFuncArray/EvalFuncArray.log index 2294ccc167..db68acd88e 100644 --- a/tests/EvalFuncArray/EvalFuncArray.log +++ b/tests/EvalFuncArray/EvalFuncArray.log @@ -505,7 +505,7 @@ package 5 param_assign 20 parameter 20 range 2 -ref_obj 23 +ref_obj 19 return_stmt 2 task 9 === UHDM Object Stats End === @@ -540,7 +540,7 @@ package 5 param_assign 20 parameter 20 range 4 -ref_obj 45 +ref_obj 37 return_stmt 4 task 18 === UHDM Object Stats End === @@ -843,25 +843,19 @@ design: (unnamed) |vpiOperand: \_bit_select: (earlgrey::max_info_pages::infos), line:16:11, endln:16:19 |vpiParent: - \_ref_obj: (earlgrey::max_info_pages::infos) - |vpiParent: - \_operation: , line:16:11, endln:16:33 - |vpiName:infos - |vpiFullName:earlgrey::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 + \_operation: , line:16:11, endln:16:33 |vpiName:infos |vpiFullName:earlgrey::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:12:50, endln:12:55 |vpiIndex: - \_ref_obj: (earlgrey::max_info_pages::infos::i), line:16:17, endln:16:18 + \_ref_obj: (earlgrey::max_info_pages::i), line:16:17, endln:16:18 |vpiParent: \_bit_select: (earlgrey::max_info_pages::infos), line:16:11, endln:16:19 |vpiName:i - |vpiFullName:earlgrey::max_info_pages::infos::i + |vpiFullName:earlgrey::max_info_pages::i |vpiActual: \_int_var: (earlgrey::max_info_pages::i), line:15:14, endln:15:15 - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 |vpiOperand: \_ref_obj: (earlgrey::max_info_pages::current_max), line:16:22, endln:16:33 |vpiParent: @@ -884,25 +878,19 @@ design: (unnamed) |vpiRhs: \_bit_select: (earlgrey::max_info_pages::infos), line:17:23, endln:17:31 |vpiParent: - \_ref_obj: (earlgrey::max_info_pages::infos) - |vpiParent: - \_assignment: , line:17:9, endln:17:31 - |vpiName:infos - |vpiFullName:earlgrey::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 + \_assignment: , line:17:9, endln:17:31 |vpiName:infos |vpiFullName:earlgrey::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:12:50, endln:12:55 |vpiIndex: - \_ref_obj: (earlgrey::max_info_pages::infos::i), line:17:29, endln:17:30 + \_ref_obj: (earlgrey::max_info_pages::i), line:17:29, endln:17:30 |vpiParent: \_bit_select: (earlgrey::max_info_pages::infos), line:17:23, endln:17:31 |vpiName:i - |vpiFullName:earlgrey::max_info_pages::infos::i + |vpiFullName:earlgrey::max_info_pages::i |vpiActual: \_int_var: (earlgrey::max_info_pages::i), line:15:14, endln:15:15 - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 |vpiLhs: \_ref_obj: (earlgrey::max_info_pages::current_max), line:17:9, endln:17:20 |vpiParent: @@ -1210,25 +1198,19 @@ design: (unnamed) |vpiOperand: \_bit_select: (earlgrey::max_info_pages::infos), line:16:11, endln:16:19 |vpiParent: - \_ref_obj: (earlgrey::max_info_pages::infos) - |vpiParent: - \_operation: , line:16:11, endln:16:33 - |vpiName:infos - |vpiFullName:earlgrey::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 + \_operation: , line:16:11, endln:16:33 |vpiName:infos |vpiFullName:earlgrey::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:12:50, endln:12:55 |vpiIndex: - \_ref_obj: (earlgrey::max_info_pages::infos::i), line:16:17, endln:16:18 + \_ref_obj: (earlgrey::max_info_pages::i), line:16:17, endln:16:18 |vpiParent: \_bit_select: (earlgrey::max_info_pages::infos), line:16:11, endln:16:19 |vpiName:i - |vpiFullName:earlgrey::max_info_pages::infos::i + |vpiFullName:earlgrey::max_info_pages::i |vpiActual: \_int_var: (earlgrey::max_info_pages::i), line:15:14, endln:15:15 - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 |vpiOperand: \_ref_obj: (earlgrey::max_info_pages::current_max), line:16:22, endln:16:33 |vpiParent: @@ -1251,25 +1233,19 @@ design: (unnamed) |vpiRhs: \_bit_select: (earlgrey::max_info_pages::infos), line:17:23, endln:17:31 |vpiParent: - \_ref_obj: (earlgrey::max_info_pages::infos) - |vpiParent: - \_assignment: , line:17:9, endln:17:31 - |vpiName:infos - |vpiFullName:earlgrey::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 + \_assignment: , line:17:9, endln:17:31 |vpiName:infos |vpiFullName:earlgrey::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:12:50, endln:12:55 |vpiIndex: - \_ref_obj: (earlgrey::max_info_pages::infos::i), line:17:29, endln:17:30 + \_ref_obj: (earlgrey::max_info_pages::i), line:17:29, endln:17:30 |vpiParent: \_bit_select: (earlgrey::max_info_pages::infos), line:17:23, endln:17:31 |vpiName:i - |vpiFullName:earlgrey::max_info_pages::infos::i + |vpiFullName:earlgrey::max_info_pages::i |vpiActual: \_int_var: (earlgrey::max_info_pages::i), line:15:14, endln:15:15 - |vpiActual: - \_io_decl: (infos), line:12:50, endln:12:55 |vpiLhs: \_ref_obj: (earlgrey::max_info_pages::current_max), line:17:9, endln:17:20 |vpiParent: diff --git a/tests/EvalFuncCont/EvalFuncCont.log b/tests/EvalFuncCont/EvalFuncCont.log index e5228b039d..2bdc1c2a4b 100644 --- a/tests/EvalFuncCont/EvalFuncCont.log +++ b/tests/EvalFuncCont/EvalFuncCont.log @@ -1217,8 +1217,6 @@ design: (work@t) |vpiBlocking:1 |vpiRhs: \_constant: , line:22:17, endln:22:18 - |vpiParent: - \_assignment: , line:22:7, endln:22:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1226,7 +1224,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.num_out.num_out), line:22:7, endln:22:14 |vpiParent: - \_begin: (work@t.num_out) + \_assignment: , line:22:7, endln:22:18 |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: @@ -1307,12 +1305,12 @@ design: (work@t) |vpiRhs: \_operation: , line:24:19, endln:24:30 |vpiParent: - \_begin: (work@t.num_out), line:23:59, endln:26:10 + \_assignment: , line:24:9, endln:24:30 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@t.num_out.num_out), line:24:19, endln:24:26 |vpiParent: - \_begin: (work@t.num_out), line:23:59, endln:26:10 + \_operation: , line:24:19, endln:24:30 |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: @@ -1328,7 +1326,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.num_out.num_out), line:24:9, endln:24:16 |vpiParent: - \_begin: (work@t.num_out), line:23:59, endln:26:10 + \_assignment: , line:24:9, endln:24:30 |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: @@ -1385,7 +1383,7 @@ design: (work@t) |vpiOperand: \_ref_obj: (work@t.NUM_OUT), line:30:11, endln:30:18 |vpiParent: - \_begin: (work@t), line:29:12, endln:34:7 + \_operation: , line:30:11, endln:30:23 |vpiName:NUM_OUT |vpiFullName:work@t.NUM_OUT |vpiOperand: @@ -1566,7 +1564,7 @@ design: (work@t) |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: - \_integer_var: , line:20:13, endln:20:20 + \_integer_var: (num_out), line:20:13, endln:20:20 |vpiStmt: \_while_stmt: , line:23:7, endln:23:12 |vpiParent: @@ -1606,7 +1604,7 @@ design: (work@t) |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: - \_integer_var: , line:20:13, endln:20:20 + \_integer_var: (num_out), line:20:13, endln:20:20 |vpiOperand: \_constant: , line:23:33, endln:23:34 |vpiOperand: @@ -1616,7 +1614,7 @@ design: (work@t) |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: - \_integer_var: , line:20:13, endln:20:20 + \_integer_var: (num_out), line:20:13, endln:20:20 |vpiOperand: \_ref_obj: (work@t.num_out.MAX_WIDTH), line:23:48, endln:23:57 |vpiParent: @@ -1648,7 +1646,7 @@ design: (work@t) |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: - \_integer_var: , line:20:13, endln:20:20 + \_integer_var: (num_out), line:20:13, endln:20:20 |vpiOperand: \_constant: , line:24:29, endln:24:30 |vpiLhs: @@ -1658,7 +1656,7 @@ design: (work@t) |vpiName:num_out |vpiFullName:work@t.num_out.num_out |vpiActual: - \_integer_var: , line:20:13, endln:20:20 + \_integer_var: (num_out), line:20:13, endln:20:20 |vpiStmt: \_continue_stmt: , line:25:9, endln:25:17 |vpiParent: diff --git a/tests/EvalFuncNamed/EvalFuncNamed.log b/tests/EvalFuncNamed/EvalFuncNamed.log index e130a4cd2c..832fda1698 100644 --- a/tests/EvalFuncNamed/EvalFuncNamed.log +++ b/tests/EvalFuncNamed/EvalFuncNamed.log @@ -681,7 +681,7 @@ design: (work@t) |vpiName:simple_minus |vpiFullName:my_funcs::simple_minus::simple_minus |vpiActual: - \_int_var: , line:3:23, endln:3:26 + \_int_var: (simple_minus), line:3:23, endln:3:26 |vpiInstance: \_package: my_funcs (my_funcs::), file:${SURELOG_DIR}/tests/EvalFuncNamed/dut.sv, line:1:1, endln:14:11 |vpiTaskFunc: @@ -763,7 +763,7 @@ design: (work@t) |vpiName:simple_func |vpiFullName:my_funcs::simple_func::simple_func |vpiActual: - \_int_var: , line:9:23, endln:9:26 + \_int_var: (simple_func), line:9:23, endln:9:26 |vpiInstance: \_package: my_funcs (my_funcs::), file:${SURELOG_DIR}/tests/EvalFuncNamed/dut.sv, line:1:1, endln:14:11 |uhdmallPackages: @@ -1120,7 +1120,7 @@ design: (work@t) |vpiName:simple_minus |vpiFullName:my_funcs::simple_minus::simple_minus |vpiActual: - \_int_var: , line:3:23, endln:3:26 + \_int_var: (simple_minus), line:3:23, endln:3:26 |vpiInstance: \_package: my_funcs (my_funcs::), file:${SURELOG_DIR}/tests/EvalFuncNamed/dut.sv, line:1:1, endln:14:11 |vpiTaskFunc: @@ -1196,7 +1196,7 @@ design: (work@t) |vpiName:simple_func |vpiFullName:my_funcs::simple_func::simple_func |vpiActual: - \_int_var: , line:9:23, endln:9:26 + \_int_var: (simple_func), line:9:23, endln:9:26 |vpiInstance: \_package: my_funcs (my_funcs::), file:${SURELOG_DIR}/tests/EvalFuncNamed/dut.sv, line:1:1, endln:14:11 |uhdmtopPackages: diff --git a/tests/EvalFuncPack/EvalFuncPack.log b/tests/EvalFuncPack/EvalFuncPack.log index 53db3dc095..014303b5d2 100644 --- a/tests/EvalFuncPack/EvalFuncPack.log +++ b/tests/EvalFuncPack/EvalFuncPack.log @@ -792,7 +792,7 @@ package 11 param_assign 74 parameter 77 range 4 -ref_obj 60 +ref_obj 56 ref_var 2 return_stmt 8 task 9 @@ -831,7 +831,7 @@ package 11 param_assign 74 parameter 77 range 7 -ref_obj 117 +ref_obj 107 ref_var 4 return_stmt 17 task 18 @@ -1472,25 +1472,19 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_operation: , line:38:11, endln:38:33 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_operation: , line:38:11, endln:38:33 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos::i), line:38:17, endln:38:18 + \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:38:17, endln:38:18 |vpiParent: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiName:i - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos::i + |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiOperand: \_ref_obj: (flash_ctrl_pkg::max_info_pages::current_max), line:38:22, endln:38:33 |vpiParent: @@ -1513,25 +1507,19 @@ design: (work@flash_ctrl_info_cfg) |vpiRhs: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_assignment: , line:39:9, endln:39:31 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_assignment: , line:39:9, endln:39:31 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos::i), line:39:29, endln:39:30 + \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:39:29, endln:39:30 |vpiParent: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiName:i - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos::i + |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiLhs: \_ref_obj: (flash_ctrl_pkg::max_info_pages::current_max), line:39:9, endln:39:20 |vpiParent: @@ -2309,25 +2297,19 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_operation: , line:38:11, endln:38:33 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_operation: , line:38:11, endln:38:33 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos::i), line:38:17, endln:38:18 + \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:38:17, endln:38:18 |vpiParent: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiName:i - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos::i + |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiOperand: \_ref_obj: (flash_ctrl_pkg::max_info_pages::current_max), line:38:22, endln:38:33 |vpiParent: @@ -2350,25 +2332,19 @@ design: (work@flash_ctrl_info_cfg) |vpiRhs: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_assignment: , line:39:9, endln:39:31 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_assignment: , line:39:9, endln:39:31 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos::i), line:39:29, endln:39:30 + \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:39:29, endln:39:30 |vpiParent: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiName:i - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos::i + |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiLhs: \_ref_obj: (flash_ctrl_pkg::max_info_pages::current_max), line:39:9, endln:39:20 |vpiParent: @@ -3190,17 +3166,15 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_operation: , line:38:11, endln:38:33 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + \_operation: , line:38:11, endln:38:33 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:38:17, endln:38:18 |vpiParent: - \_begin: (flash_ctrl_pkg::max_info_pages), line:37:41, endln:41:8 + \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:38:11, endln:38:19 |vpiName:i |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: @@ -3227,17 +3201,15 @@ design: (work@flash_ctrl_info_cfg) |vpiRhs: \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiParent: - \_ref_obj: (flash_ctrl_pkg::max_info_pages::infos) - |vpiParent: - \_assignment: , line:39:9, endln:39:31 - |vpiName:infos - |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + \_assignment: , line:39:9, endln:39:31 |vpiName:infos |vpiFullName:flash_ctrl_pkg::max_info_pages::infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: \_ref_obj: (flash_ctrl_pkg::max_info_pages::i), line:39:29, endln:39:30 |vpiParent: - \_begin: (flash_ctrl_pkg::max_info_pages), line:38:35, endln:40:10 + \_bit_select: (flash_ctrl_pkg::max_info_pages::infos), line:39:23, endln:39:31 |vpiName:i |vpiFullName:flash_ctrl_pkg::max_info_pages::i |vpiActual: @@ -3245,7 +3217,7 @@ design: (work@flash_ctrl_info_cfg) |vpiLhs: \_ref_obj: (flash_ctrl_pkg::max_info_pages::current_max), line:39:9, endln:39:20 |vpiParent: - \_begin: (flash_ctrl_pkg::max_info_pages), line:38:35, endln:40:10 + \_assignment: , line:39:9, endln:39:31 |vpiName:current_max |vpiFullName:flash_ctrl_pkg::max_info_pages::current_max |vpiActual: @@ -3454,7 +3426,7 @@ design: (work@flash_ctrl_info_cfg) |vpiName:InfoTypes |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos.InfoTypes |vpiActual: - \_parameter: (work@flash_ctrl_info_cfg.InfoTypes), line:26:15, endln:26:24 + \_parameter: (flash_ctrl_pkg::InfoTypes), line:26:15, endln:26:24 |vpiOperand: \_constant: |vpiTypedef: @@ -3541,7 +3513,7 @@ design: (work@flash_ctrl_info_cfg) |vpiName:InfoTypes |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.InfoTypes |vpiActual: - \_parameter: (work@flash_ctrl_info_cfg.InfoTypes), line:26:15, endln:26:24 + \_parameter: (flash_ctrl_pkg::InfoTypes), line:26:15, endln:26:24 |vpiStmt: \_begin: (work@flash_ctrl_info_cfg.max_info_pages), line:37:41, endln:41:8 |vpiParent: @@ -3559,25 +3531,19 @@ design: (work@flash_ctrl_info_cfg) |vpiOperand: \_bit_select: (work@flash_ctrl_info_cfg.max_info_pages.infos), line:38:11, endln:38:19 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.infos) - |vpiParent: - \_operation: , line:38:11, endln:38:33 - |vpiName:infos - |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_operation: , line:38:11, endln:38:33 |vpiName:infos |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.infos.i), line:38:17, endln:38:18 + \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.i), line:38:17, endln:38:18 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.max_info_pages.infos), line:38:11, endln:38:19 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos.i + |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiOperand: \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.current_max), line:38:22, endln:38:33 |vpiParent: @@ -3600,25 +3566,19 @@ design: (work@flash_ctrl_info_cfg) |vpiRhs: \_bit_select: (work@flash_ctrl_info_cfg.max_info_pages.infos), line:39:23, endln:39:31 |vpiParent: - \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.infos) - |vpiParent: - \_assignment: , line:39:9, endln:39:31 - |vpiName:infos - |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 + \_assignment: , line:39:9, endln:39:31 |vpiName:infos |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos + |vpiActual: + \_io_decl: (infos), line:35:47, endln:35:52 |vpiIndex: - \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.infos.i), line:39:29, endln:39:30 + \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.i), line:39:29, endln:39:30 |vpiParent: \_bit_select: (work@flash_ctrl_info_cfg.max_info_pages.infos), line:39:23, endln:39:31 |vpiName:i - |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.infos.i + |vpiFullName:work@flash_ctrl_info_cfg.max_info_pages.i |vpiActual: \_int_var: (flash_ctrl_pkg::max_info_pages::i), line:37:14, endln:37:15 - |vpiActual: - \_io_decl: (infos), line:35:47, endln:35:52 |vpiLhs: \_ref_obj: (work@flash_ctrl_info_cfg.max_info_pages.current_max), line:39:9, endln:39:20 |vpiParent: diff --git a/tests/ExponTimeIfElseGen/ExponTimeIfElseGen.log b/tests/ExponTimeIfElseGen/ExponTimeIfElseGen.log index a80123025a..5630ba1c40 100644 --- a/tests/ExponTimeIfElseGen/ExponTimeIfElseGen.log +++ b/tests/ExponTimeIfElseGen/ExponTimeIfElseGen.log @@ -999,7 +999,7 @@ module_inst 5 operation 194 param_assign 2 parameter 20 -ref_obj 160 +ref_obj 158 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -1020,7 +1020,7 @@ module_inst 5 operation 196 param_assign 2 parameter 20 -ref_obj 166 +ref_obj 162 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ExponTimeIfElseGen/slpp_all/surelog.uhdm ... @@ -1211,11 +1211,7 @@ design: (work@Foo) |vpiRhs: \_bit_select: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4), line:17:41, endln:17:55 |vpiParent: - \_ref_obj: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4) - |vpiParent: - \_assignment: , line:17:25, endln:17:55 - |vpiName:foo_bar_4 - |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4 + \_assignment: , line:17:25, endln:17:55 |vpiName:foo_bar_4 |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4 |vpiIndex: @@ -1242,19 +1238,15 @@ design: (work@Foo) |vpiLhs: \_bit_select: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4), line:17:25, endln:17:37 |vpiParent: - \_ref_obj: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4) - |vpiParent: - \_assignment: , line:17:25, endln:17:55 - |vpiName:foo_bar_4 - |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4 + \_assignment: , line:17:25, endln:17:55 |vpiName:foo_bar_4 |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4 |vpiIndex: - \_ref_obj: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4.i), line:17:35, endln:17:36 + \_ref_obj: (work@Foo.genblk1[1].genblk1.genblk1.i), line:17:35, endln:17:36 |vpiParent: \_bit_select: (work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4), line:17:25, endln:17:37 |vpiName:i - |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.foo_bar_4.i + |vpiFullName:work@Foo.genblk1[1].genblk1.genblk1.i |vpiActual: \_parameter: (work@Foo.genblk1[1].i), line:5:0 |vpiAlwaysType:3 diff --git a/tests/ExtendClassMember/ExtendClassMember.log b/tests/ExtendClassMember/ExtendClassMember.log index 5fcbb480fd..d407698074 100644 --- a/tests/ExtendClassMember/ExtendClassMember.log +++ b/tests/ExtendClassMember/ExtendClassMember.log @@ -219,8 +219,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:21:41, endln:21:42 - |vpiParent: - \_assignment: , line:21:3, endln:21:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -339,8 +337,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:21:41, endln:21:42 - |vpiParent: - \_assignment: , line:21:3, endln:21:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 diff --git a/tests/FSM2Always/FSM2Always.log b/tests/FSM2Always/FSM2Always.log index 6946904f04..3f440d7732 100644 --- a/tests/FSM2Always/FSM2Always.log +++ b/tests/FSM2Always/FSM2Always.log @@ -1944,8 +1944,6 @@ design: (work@fsm_using_always) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:15, endln:31:21 - |vpiParent: - \_assignment: , line:31:2, endln:31:21 |vpiDecompile:3'b000 |vpiSize:3 |BIN:000 @@ -1953,7 +1951,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:31:2, endln:31:12 |vpiParent: - \_named_begin: (work@fsm_using_always.FSM_COMBO), line:30:1, endln:52:4 + \_assignment: , line:31:2, endln:31:21 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -1993,7 +1991,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.FSM_COMBO.req_0), line:33:15, endln:33:20 |vpiParent: - \_case_item: , line:33:4, endln:39:18 + \_operation: , line:33:15, endln:33:28 |vpiName:req_0 |vpiFullName:work@fsm_using_always.FSM_COMBO.req_0 |vpiActual: @@ -2020,13 +2018,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.GNT0), line:34:30, endln:34:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:33:30, endln:35:18 + \_assignment: , line:34:17, endln:34:34 |vpiName:GNT0 |vpiFullName:work@fsm_using_always.FSM_COMBO.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:34:17, endln:34:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:33:30, endln:35:18 + \_assignment: , line:34:17, endln:34:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2043,7 +2041,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.FSM_COMBO.req_1), line:35:28, endln:35:33 |vpiParent: - \_if_else: , line:33:11, endln:39:18 + \_operation: , line:35:28, endln:35:41 |vpiName:req_1 |vpiFullName:work@fsm_using_always.FSM_COMBO.req_1 |vpiActual: @@ -2070,13 +2068,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.GNT1), line:36:29, endln:36:33 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:35:43, endln:37:18 + \_assignment: , line:36:17, endln:36:33 |vpiName:GNT1 |vpiFullName:work@fsm_using_always.FSM_COMBO.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:36:17, endln:36:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:35:43, endln:37:18 + \_assignment: , line:36:17, endln:36:33 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2095,13 +2093,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.IDLE), line:38:30, endln:38:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:37:24, endln:39:18 + \_assignment: , line:38:17, endln:38:34 |vpiName:IDLE |vpiFullName:work@fsm_using_always.FSM_COMBO.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:38:17, endln:38:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:37:24, endln:39:18 + \_assignment: , line:38:17, endln:38:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2128,7 +2126,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.FSM_COMBO.req_0), line:40:15, endln:40:20 |vpiParent: - \_case_item: , line:40:4, endln:44:18 + \_operation: , line:40:15, endln:40:28 |vpiName:req_0 |vpiFullName:work@fsm_using_always.FSM_COMBO.req_0 |vpiActual: @@ -2155,13 +2153,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.GNT0), line:41:30, endln:41:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:40:30, endln:42:18 + \_assignment: , line:41:17, endln:41:34 |vpiName:GNT0 |vpiFullName:work@fsm_using_always.FSM_COMBO.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:41:17, endln:41:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:40:30, endln:42:18 + \_assignment: , line:41:17, endln:41:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2180,13 +2178,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.IDLE), line:43:30, endln:43:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:42:24, endln:44:18 + \_assignment: , line:43:17, endln:43:34 |vpiName:IDLE |vpiFullName:work@fsm_using_always.FSM_COMBO.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:43:17, endln:43:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:42:24, endln:44:18 + \_assignment: , line:43:17, endln:43:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2213,7 +2211,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.FSM_COMBO.req_1), line:45:15, endln:45:20 |vpiParent: - \_case_item: , line:45:4, endln:49:18 + \_operation: , line:45:15, endln:45:28 |vpiName:req_1 |vpiFullName:work@fsm_using_always.FSM_COMBO.req_1 |vpiActual: @@ -2240,13 +2238,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.GNT1), line:46:30, endln:46:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:45:30, endln:47:18 + \_assignment: , line:46:17, endln:46:34 |vpiName:GNT1 |vpiFullName:work@fsm_using_always.FSM_COMBO.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:46:17, endln:46:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:45:30, endln:47:18 + \_assignment: , line:46:17, endln:46:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2265,13 +2263,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.IDLE), line:48:30, endln:48:34 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:47:24, endln:49:18 + \_assignment: , line:48:17, endln:48:34 |vpiName:IDLE |vpiFullName:work@fsm_using_always.FSM_COMBO.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:48:17, endln:48:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_COMBO), line:47:24, endln:49:18 + \_assignment: , line:48:17, endln:48:34 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2289,13 +2287,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.IDLE), line:50:27, endln:50:31 |vpiParent: - \_case_item: , line:50:4, endln:50:32 + \_assignment: , line:50:14, endln:50:31 |vpiName:IDLE |vpiFullName:work@fsm_using_always.FSM_COMBO.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_COMBO.next_state), line:50:14, endln:50:24 |vpiParent: - \_case_item: , line:50:4, endln:50:32 + \_assignment: , line:50:14, endln:50:31 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_COMBO.next_state |vpiActual: @@ -2340,7 +2338,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.FSM_SEQ.reset), line:56:7, endln:56:12 |vpiParent: - \_named_begin: (work@fsm_using_always.FSM_SEQ), line:55:1, endln:61:4 + \_operation: , line:56:7, endln:56:20 |vpiName:reset |vpiFullName:work@fsm_using_always.FSM_SEQ.reset |vpiActual: @@ -2366,13 +2364,13 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_SEQ.IDLE), line:57:17, endln:57:21 |vpiParent: - \_begin: (work@fsm_using_always.FSM_SEQ), line:56:22, endln:58:6 + \_assignment: , line:57:5, endln:57:21 |vpiName:IDLE |vpiFullName:work@fsm_using_always.FSM_SEQ.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_SEQ.state), line:57:5, endln:57:10 |vpiParent: - \_begin: (work@fsm_using_always.FSM_SEQ), line:56:22, endln:58:6 + \_assignment: , line:57:5, endln:57:21 |vpiName:state |vpiFullName:work@fsm_using_always.FSM_SEQ.state |vpiActual: @@ -2395,7 +2393,7 @@ design: (work@fsm_using_always) |vpiRhs: \_ref_obj: (work@fsm_using_always.FSM_SEQ.next_state), line:59:17, endln:59:27 |vpiParent: - \_begin: (work@fsm_using_always.FSM_SEQ), line:58:12, endln:60:6 + \_assignment: , line:59:5, endln:59:27 |vpiName:next_state |vpiFullName:work@fsm_using_always.FSM_SEQ.next_state |vpiActual: @@ -2403,7 +2401,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.FSM_SEQ.state), line:59:5, endln:59:10 |vpiParent: - \_begin: (work@fsm_using_always.FSM_SEQ), line:58:12, endln:60:6 + \_assignment: , line:59:5, endln:59:27 |vpiName:state |vpiFullName:work@fsm_using_always.FSM_SEQ.state |vpiActual: @@ -2453,7 +2451,7 @@ design: (work@fsm_using_always) |vpiOperand: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.reset), line:65:5, endln:65:10 |vpiParent: - \_named_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:64:1, endln:89:4 + \_operation: , line:65:5, endln:65:18 |vpiName:reset |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.reset |vpiActual: @@ -2478,8 +2476,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:66:15, endln:66:19 - |vpiParent: - \_assignment: , line:66:3, endln:66:19 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2487,7 +2483,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_0), line:66:3, endln:66:8 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:65:20, endln:68:4 + \_assignment: , line:66:3, endln:66:19 |vpiName:gnt_0 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2504,8 +2500,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:67:15, endln:67:19 - |vpiParent: - \_assignment: , line:67:3, endln:67:19 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2513,7 +2507,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_1), line:67:3, endln:67:8 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:65:20, endln:68:4 + \_assignment: , line:67:3, endln:67:19 |vpiName:gnt_1 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2563,8 +2557,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:72:31, endln:72:35 - |vpiParent: - \_assignment: , line:72:19, endln:72:35 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2572,7 +2564,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_0), line:72:19, endln:72:24 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:71:12, endln:74:19 + \_assignment: , line:72:19, endln:72:35 |vpiName:gnt_0 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2589,8 +2581,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:73:31, endln:73:35 - |vpiParent: - \_assignment: , line:73:19, endln:73:35 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2598,7 +2588,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_1), line:73:19, endln:73:24 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:71:12, endln:74:19 + \_assignment: , line:73:19, endln:73:35 |vpiName:gnt_1 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2630,8 +2620,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:76:32, endln:76:36 - |vpiParent: - \_assignment: , line:76:20, endln:76:36 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -2639,7 +2627,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_0), line:76:20, endln:76:25 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:75:11, endln:78:20 + \_assignment: , line:76:20, endln:76:36 |vpiName:gnt_0 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2656,8 +2644,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:77:32, endln:77:36 - |vpiParent: - \_assignment: , line:77:20, endln:77:36 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2665,7 +2651,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_1), line:77:20, endln:77:25 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:75:11, endln:78:20 + \_assignment: , line:77:20, endln:77:36 |vpiName:gnt_1 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2697,8 +2683,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:80:32, endln:80:36 - |vpiParent: - \_assignment: , line:80:20, endln:80:36 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2706,7 +2690,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_0), line:80:20, endln:80:25 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:79:11, endln:82:20 + \_assignment: , line:80:20, endln:80:36 |vpiName:gnt_0 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2723,8 +2707,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:81:32, endln:81:36 - |vpiParent: - \_assignment: , line:81:20, endln:81:36 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -2732,7 +2714,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_1), line:81:20, endln:81:25 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:79:11, endln:82:20 + \_assignment: , line:81:20, endln:81:36 |vpiName:gnt_1 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2758,8 +2740,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:84:33, endln:84:37 - |vpiParent: - \_assignment: , line:84:21, endln:84:37 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2767,7 +2747,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_0), line:84:21, endln:84:26 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:83:14, endln:86:22 + \_assignment: , line:84:21, endln:84:37 |vpiName:gnt_0 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2784,8 +2764,6 @@ design: (work@fsm_using_always) |vpiOpType:82 |vpiRhs: \_constant: , line:85:33, endln:85:37 - |vpiParent: - \_assignment: , line:85:21, endln:85:37 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2793,7 +2771,7 @@ design: (work@fsm_using_always) |vpiLhs: \_ref_obj: (work@fsm_using_always.OUTPUT_LOGIC.gnt_1), line:85:21, endln:85:26 |vpiParent: - \_begin: (work@fsm_using_always.OUTPUT_LOGIC), line:83:14, endln:86:22 + \_assignment: , line:85:21, endln:85:37 |vpiName:gnt_1 |vpiFullName:work@fsm_using_always.OUTPUT_LOGIC.gnt_1 |vpiActual: diff --git a/tests/FSMBsp13/FSMBsp13.log b/tests/FSMBsp13/FSMBsp13.log index 7e042c608f..8afc9a2790 100644 --- a/tests/FSMBsp13/FSMBsp13.log +++ b/tests/FSMBsp13/FSMBsp13.log @@ -7581,13 +7581,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.SEQ.ST_Read), line:16:16, endln:16:23 |vpiParent: - \_if_else: , line:15:3, endln:18:26 + \_assignment: , line:16:5, endln:16:23 |vpiName:ST_Read |vpiFullName:work@FSM1.SEQ.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.SEQ.CurState), line:16:5, endln:16:13 |vpiParent: - \_if_else: , line:15:3, endln:18:26 + \_assignment: , line:16:5, endln:16:23 |vpiName:CurState |vpiFullName:work@FSM1.SEQ.CurState |vpiActual: @@ -7601,7 +7601,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.SEQ.NextState), line:18:16, endln:18:25 |vpiParent: - \_if_else: , line:15:3, endln:18:26 + \_assignment: , line:18:5, endln:18:25 |vpiName:NextState |vpiFullName:work@FSM1.SEQ.NextState |vpiActual: @@ -7609,7 +7609,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.SEQ.CurState), line:18:5, endln:18:13 |vpiParent: - \_if_else: , line:15:3, endln:18:26 + \_assignment: , line:18:5, endln:18:25 |vpiName:CurState |vpiFullName:work@FSM1.SEQ.CurState |vpiActual: @@ -7632,8 +7632,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:22:10, endln:22:11 - |vpiParent: - \_assignment: , line:22:3, endln:22:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7641,7 +7639,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.Read), line:22:3, endln:22:7 |vpiParent: - \_begin: (work@FSM1), line:21:9, endln:26:4 + \_assignment: , line:22:3, endln:22:11 |vpiName:Read |vpiFullName:work@FSM1.Read |vpiActual: @@ -7654,8 +7652,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:23:11, endln:23:12 - |vpiParent: - \_assignment: , line:23:3, endln:23:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -7663,7 +7659,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.Write), line:23:3, endln:23:8 |vpiParent: - \_begin: (work@FSM1), line:21:9, endln:26:4 + \_assignment: , line:23:3, endln:23:12 |vpiName:Write |vpiFullName:work@FSM1.Write |vpiActual: @@ -7676,8 +7672,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:10, endln:24:11 - |vpiParent: - \_assignment: , line:24:3, endln:24:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7685,7 +7679,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.Wait), line:24:3, endln:24:7 |vpiParent: - \_begin: (work@FSM1), line:21:9, endln:26:4 + \_assignment: , line:24:3, endln:24:11 |vpiName:Wait |vpiFullName:work@FSM1.Wait |vpiActual: @@ -7698,8 +7692,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:25:11, endln:25:12 - |vpiParent: - \_assignment: , line:25:3, endln:25:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -7707,7 +7699,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.Delay), line:25:3, endln:25:8 |vpiParent: - \_begin: (work@FSM1), line:21:9, endln:26:4 + \_assignment: , line:25:3, endln:25:12 |vpiName:Delay |vpiFullName:work@FSM1.Delay |vpiActual: @@ -7771,7 +7763,7 @@ design: (work@top) |vpiRhs: \_operation: , line:32:14, endln:32:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:32:7, endln:32:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:32:15, endln:32:19 @@ -7784,7 +7776,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:32:7, endln:32:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:32:7, endln:32:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -7798,7 +7790,7 @@ design: (work@top) |vpiRhs: \_operation: , line:33:15, endln:33:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:33:7, endln:33:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:33:16, endln:33:21 @@ -7811,7 +7803,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:33:7, endln:33:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:33:7, endln:33:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -7825,7 +7817,7 @@ design: (work@top) |vpiRhs: \_operation: , line:34:14, endln:34:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:34:7, endln:34:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:34:15, endln:34:20 @@ -7838,7 +7830,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:34:7, endln:34:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:34:7, endln:34:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -7852,7 +7844,7 @@ design: (work@top) |vpiRhs: \_operation: , line:35:15, endln:35:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:35:7, endln:35:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:35:16, endln:35:20 @@ -7865,7 +7857,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:35:7, endln:35:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_assignment: , line:35:7, endln:35:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -7882,7 +7874,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:36:11, endln:36:15 |vpiParent: - \_begin: (work@FSM1.COMB), line:31:13, endln:42:8 + \_operation: , line:36:11, endln:36:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -7904,13 +7896,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Hold), line:36:34, endln:36:41 |vpiParent: - \_if_else: , line:36:7, endln:41:33 + \_assignment: , line:36:22, endln:36:41 |vpiName:ST_Hold |vpiFullName:work@FSM1.COMB.ST_Hold |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:36:22, endln:36:31 |vpiParent: - \_if_else: , line:36:7, endln:41:33 + \_assignment: , line:36:22, endln:36:41 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -7927,7 +7919,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:37:16, endln:37:21 |vpiParent: - \_if_else: , line:36:7, endln:41:33 + \_operation: , line:37:16, endln:37:26 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -7949,13 +7941,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Block), line:37:40, endln:37:48 |vpiParent: - \_if_else: , line:37:12, endln:41:33 + \_assignment: , line:37:28, endln:37:48 |vpiName:ST_Block |vpiFullName:work@FSM1.COMB.ST_Block |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:37:28, endln:37:37 |vpiParent: - \_if_else: , line:37:12, endln:41:33 + \_assignment: , line:37:28, endln:37:48 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -7972,7 +7964,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.SlowRam), line:38:16, endln:38:23 |vpiParent: - \_if_else: , line:37:12, endln:41:33 + \_operation: , line:38:16, endln:38:28 |vpiName:SlowRam |vpiFullName:work@FSM1.COMB.SlowRam |vpiActual: @@ -7994,13 +7986,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Wait), line:38:42, endln:38:49 |vpiParent: - \_if_else: , line:38:12, endln:41:33 + \_assignment: , line:38:30, endln:38:49 |vpiName:ST_Wait |vpiFullName:work@FSM1.COMB.ST_Wait |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:38:30, endln:38:39 |vpiParent: - \_if_else: , line:38:12, endln:41:33 + \_assignment: , line:38:30, endln:38:49 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8017,7 +8009,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:39:16, endln:39:20 |vpiParent: - \_if_else: , line:38:12, endln:41:33 + \_operation: , line:39:16, endln:39:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8039,13 +8031,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:39:39, endln:39:46 |vpiParent: - \_if_else: , line:39:12, endln:41:33 + \_assignment: , line:39:27, endln:39:46 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:39:27, endln:39:36 |vpiParent: - \_if_else: , line:39:12, endln:41:33 + \_assignment: , line:39:27, endln:39:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8062,7 +8054,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:40:16, endln:40:21 |vpiParent: - \_if_else: , line:39:12, endln:41:33 + \_operation: , line:40:16, endln:40:26 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8084,13 +8076,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Quit), line:40:40, endln:40:47 |vpiParent: - \_if_else: , line:40:12, endln:41:33 + \_assignment: , line:40:28, endln:40:47 |vpiName:ST_Quit |vpiFullName:work@FSM1.COMB.ST_Quit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:40:28, endln:40:37 |vpiParent: - \_if_else: , line:40:12, endln:41:33 + \_assignment: , line:40:28, endln:40:47 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8104,13 +8096,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Block), line:41:24, endln:41:32 |vpiParent: - \_if_else: , line:40:12, endln:41:33 + \_assignment: , line:41:12, endln:41:32 |vpiName:ST_Block |vpiFullName:work@FSM1.COMB.ST_Block |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:41:12, endln:41:21 |vpiParent: - \_if_else: , line:40:12, endln:41:33 + \_assignment: , line:41:12, endln:41:32 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8139,7 +8131,7 @@ design: (work@top) |vpiRhs: \_operation: , line:45:14, endln:45:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:45:7, endln:45:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:45:15, endln:45:19 @@ -8152,7 +8144,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:45:7, endln:45:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:45:7, endln:45:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8166,7 +8158,7 @@ design: (work@top) |vpiRhs: \_operation: , line:46:15, endln:46:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:46:7, endln:46:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:46:16, endln:46:21 @@ -8179,7 +8171,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:46:7, endln:46:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:46:7, endln:46:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8193,7 +8185,7 @@ design: (work@top) |vpiRhs: \_operation: , line:47:14, endln:47:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:47:7, endln:47:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:47:15, endln:47:20 @@ -8206,7 +8198,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:47:7, endln:47:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:47:7, endln:47:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -8220,7 +8212,7 @@ design: (work@top) |vpiRhs: \_operation: , line:48:15, endln:48:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:48:7, endln:48:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:48:16, endln:48:20 @@ -8233,7 +8225,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:48:7, endln:48:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_assignment: , line:48:7, endln:48:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -8250,7 +8242,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:49:11, endln:49:15 |vpiParent: - \_begin: (work@FSM1.COMB), line:44:14, endln:55:8 + \_operation: , line:49:11, endln:49:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -8272,13 +8264,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Hold), line:49:34, endln:49:41 |vpiParent: - \_if_else: , line:49:7, endln:54:33 + \_assignment: , line:49:22, endln:49:41 |vpiName:ST_Hold |vpiFullName:work@FSM1.COMB.ST_Hold |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:49:22, endln:49:31 |vpiParent: - \_if_else: , line:49:7, endln:54:33 + \_assignment: , line:49:22, endln:49:41 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8295,7 +8287,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:50:16, endln:50:21 |vpiParent: - \_if_else: , line:49:7, endln:54:33 + \_operation: , line:50:16, endln:50:26 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -8317,13 +8309,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Block), line:50:40, endln:50:48 |vpiParent: - \_if_else: , line:50:12, endln:54:33 + \_assignment: , line:50:28, endln:50:48 |vpiName:ST_Block |vpiFullName:work@FSM1.COMB.ST_Block |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:50:28, endln:50:37 |vpiParent: - \_if_else: , line:50:12, endln:54:33 + \_assignment: , line:50:28, endln:50:48 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8340,7 +8332,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.SlowRam), line:51:16, endln:51:23 |vpiParent: - \_if_else: , line:50:12, endln:54:33 + \_operation: , line:51:16, endln:51:28 |vpiName:SlowRam |vpiFullName:work@FSM1.COMB.SlowRam |vpiActual: @@ -8362,13 +8354,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Wait), line:51:42, endln:51:49 |vpiParent: - \_if_else: , line:51:12, endln:54:33 + \_assignment: , line:51:30, endln:51:49 |vpiName:ST_Wait |vpiFullName:work@FSM1.COMB.ST_Wait |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:51:30, endln:51:39 |vpiParent: - \_if_else: , line:51:12, endln:54:33 + \_assignment: , line:51:30, endln:51:49 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8385,7 +8377,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:52:16, endln:52:20 |vpiParent: - \_if_else: , line:51:12, endln:54:33 + \_operation: , line:52:16, endln:52:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8407,13 +8399,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:52:39, endln:52:46 |vpiParent: - \_if_else: , line:52:12, endln:54:33 + \_assignment: , line:52:27, endln:52:46 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:52:27, endln:52:36 |vpiParent: - \_if_else: , line:52:12, endln:54:33 + \_assignment: , line:52:27, endln:52:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8430,7 +8422,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:53:16, endln:53:21 |vpiParent: - \_if_else: , line:52:12, endln:54:33 + \_operation: , line:53:16, endln:53:26 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8452,13 +8444,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Quit), line:53:40, endln:53:47 |vpiParent: - \_if_else: , line:53:12, endln:54:33 + \_assignment: , line:53:28, endln:53:47 |vpiName:ST_Quit |vpiFullName:work@FSM1.COMB.ST_Quit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:53:28, endln:53:37 |vpiParent: - \_if_else: , line:53:12, endln:54:33 + \_assignment: , line:53:28, endln:53:47 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8472,13 +8464,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Block), line:54:24, endln:54:32 |vpiParent: - \_if_else: , line:53:12, endln:54:33 + \_assignment: , line:54:12, endln:54:32 |vpiName:ST_Block |vpiFullName:work@FSM1.COMB.ST_Block |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:54:12, endln:54:21 |vpiParent: - \_if_else: , line:53:12, endln:54:33 + \_assignment: , line:54:12, endln:54:32 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8507,7 +8499,7 @@ design: (work@top) |vpiRhs: \_operation: , line:58:14, endln:58:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:58:7, endln:58:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:58:15, endln:58:19 @@ -8520,7 +8512,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:58:7, endln:58:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:58:7, endln:58:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8534,7 +8526,7 @@ design: (work@top) |vpiRhs: \_operation: , line:59:15, endln:59:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:59:7, endln:59:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:59:16, endln:59:21 @@ -8547,7 +8539,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:59:7, endln:59:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:59:7, endln:59:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8561,7 +8553,7 @@ design: (work@top) |vpiRhs: \_operation: , line:60:14, endln:60:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:60:7, endln:60:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:60:15, endln:60:20 @@ -8574,7 +8566,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:60:7, endln:60:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:60:7, endln:60:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -8588,7 +8580,7 @@ design: (work@top) |vpiRhs: \_operation: , line:61:15, endln:61:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:61:7, endln:61:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:61:16, endln:61:20 @@ -8601,7 +8593,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:61:7, endln:61:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_assignment: , line:61:7, endln:61:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -8618,7 +8610,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:62:11, endln:62:15 |vpiParent: - \_begin: (work@FSM1.COMB), line:57:15, endln:68:8 + \_operation: , line:62:11, endln:62:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -8640,13 +8632,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Wait), line:62:34, endln:62:41 |vpiParent: - \_if_else: , line:62:7, endln:67:33 + \_assignment: , line:62:22, endln:62:41 |vpiName:ST_Wait |vpiFullName:work@FSM1.COMB.ST_Wait |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:62:22, endln:62:31 |vpiParent: - \_if_else: , line:62:7, endln:67:33 + \_assignment: , line:62:22, endln:62:41 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8663,7 +8655,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:63:16, endln:63:21 |vpiParent: - \_if_else: , line:62:7, endln:67:33 + \_operation: , line:63:16, endln:63:26 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -8685,13 +8677,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:63:40, endln:63:47 |vpiParent: - \_if_else: , line:63:12, endln:67:33 + \_assignment: , line:63:28, endln:63:47 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:63:28, endln:63:37 |vpiParent: - \_if_else: , line:63:12, endln:67:33 + \_assignment: , line:63:28, endln:63:47 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8708,7 +8700,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.SlowRam), line:64:16, endln:64:23 |vpiParent: - \_if_else: , line:63:12, endln:67:33 + \_operation: , line:64:16, endln:64:28 |vpiName:SlowRam |vpiFullName:work@FSM1.COMB.SlowRam |vpiActual: @@ -8730,13 +8722,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Quit), line:64:42, endln:64:49 |vpiParent: - \_if_else: , line:64:12, endln:67:33 + \_assignment: , line:64:30, endln:64:49 |vpiName:ST_Quit |vpiFullName:work@FSM1.COMB.ST_Quit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:64:30, endln:64:39 |vpiParent: - \_if_else: , line:64:12, endln:67:33 + \_assignment: , line:64:30, endln:64:49 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8753,7 +8745,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:65:16, endln:65:20 |vpiParent: - \_if_else: , line:64:12, endln:67:33 + \_operation: , line:65:16, endln:65:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8775,13 +8767,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Done), line:65:39, endln:65:46 |vpiParent: - \_if_else: , line:65:12, endln:67:33 + \_assignment: , line:65:27, endln:65:46 |vpiName:ST_Done |vpiFullName:work@FSM1.COMB.ST_Done |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:65:27, endln:65:36 |vpiParent: - \_if_else: , line:65:12, endln:67:33 + \_assignment: , line:65:27, endln:65:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8798,7 +8790,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:66:16, endln:66:21 |vpiParent: - \_if_else: , line:65:12, endln:67:33 + \_operation: , line:66:16, endln:66:26 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8820,13 +8812,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Exit), line:66:40, endln:66:47 |vpiParent: - \_if_else: , line:66:12, endln:67:33 + \_assignment: , line:66:28, endln:66:47 |vpiName:ST_Exit |vpiFullName:work@FSM1.COMB.ST_Exit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:66:28, endln:66:37 |vpiParent: - \_if_else: , line:66:12, endln:67:33 + \_assignment: , line:66:28, endln:66:47 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8840,13 +8832,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Block), line:67:24, endln:67:32 |vpiParent: - \_if_else: , line:66:12, endln:67:33 + \_assignment: , line:67:12, endln:67:32 |vpiName:ST_Block |vpiFullName:work@FSM1.COMB.ST_Block |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:67:12, endln:67:21 |vpiParent: - \_if_else: , line:66:12, endln:67:33 + \_assignment: , line:67:12, endln:67:32 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -8875,7 +8867,7 @@ design: (work@top) |vpiRhs: \_operation: , line:71:14, endln:71:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:71:7, endln:71:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:71:15, endln:71:19 @@ -8888,7 +8880,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:71:7, endln:71:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:71:7, endln:71:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -8902,7 +8894,7 @@ design: (work@top) |vpiRhs: \_operation: , line:72:15, endln:72:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:72:7, endln:72:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:72:16, endln:72:21 @@ -8915,7 +8907,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:72:7, endln:72:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:72:7, endln:72:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -8929,7 +8921,7 @@ design: (work@top) |vpiRhs: \_operation: , line:73:14, endln:73:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:73:7, endln:73:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:73:15, endln:73:20 @@ -8942,7 +8934,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:73:7, endln:73:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:73:7, endln:73:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -8956,7 +8948,7 @@ design: (work@top) |vpiRhs: \_operation: , line:74:15, endln:74:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:74:7, endln:74:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:74:16, endln:74:20 @@ -8969,7 +8961,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:74:7, endln:74:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_assignment: , line:74:7, endln:74:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -8986,7 +8978,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:75:11, endln:75:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:70:14, endln:78:8 + \_operation: , line:75:11, endln:75:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9008,13 +9000,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Quit), line:75:35, endln:75:42 |vpiParent: - \_if_else: , line:75:7, endln:77:32 + \_assignment: , line:75:23, endln:75:42 |vpiName:ST_Quit |vpiFullName:work@FSM1.COMB.ST_Quit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:75:23, endln:75:32 |vpiParent: - \_if_else: , line:75:7, endln:77:32 + \_assignment: , line:75:23, endln:75:42 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9031,7 +9023,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:76:16, endln:76:20 |vpiParent: - \_if_else: , line:75:7, endln:77:32 + \_operation: , line:76:16, endln:76:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9053,13 +9045,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:76:39, endln:76:46 |vpiParent: - \_if_else: , line:76:12, endln:77:32 + \_assignment: , line:76:27, endln:76:46 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:76:27, endln:76:36 |vpiParent: - \_if_else: , line:76:12, endln:77:32 + \_assignment: , line:76:27, endln:76:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9073,13 +9065,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:77:24, endln:77:31 |vpiParent: - \_if_else: , line:76:12, endln:77:32 + \_assignment: , line:77:12, endln:77:31 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:77:12, endln:77:21 |vpiParent: - \_if_else: , line:76:12, endln:77:32 + \_assignment: , line:77:12, endln:77:31 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9108,7 +9100,7 @@ design: (work@top) |vpiRhs: \_operation: , line:81:14, endln:81:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:81:7, endln:81:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:81:15, endln:81:19 @@ -9121,7 +9113,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:81:7, endln:81:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:81:7, endln:81:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9135,7 +9127,7 @@ design: (work@top) |vpiRhs: \_operation: , line:82:15, endln:82:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:82:7, endln:82:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:82:16, endln:82:21 @@ -9148,7 +9140,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:82:7, endln:82:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:82:7, endln:82:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9162,7 +9154,7 @@ design: (work@top) |vpiRhs: \_operation: , line:83:14, endln:83:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:83:7, endln:83:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:83:15, endln:83:20 @@ -9175,7 +9167,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:83:7, endln:83:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:83:7, endln:83:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -9189,7 +9181,7 @@ design: (work@top) |vpiRhs: \_operation: , line:84:15, endln:84:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:84:7, endln:84:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:84:16, endln:84:20 @@ -9202,7 +9194,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:84:7, endln:84:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_assignment: , line:84:7, endln:84:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -9219,7 +9211,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:85:11, endln:85:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:80:14, endln:88:8 + \_operation: , line:85:11, endln:85:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9241,13 +9233,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Write), line:85:35, endln:85:43 |vpiParent: - \_if_else: , line:85:7, endln:87:32 + \_assignment: , line:85:23, endln:85:43 |vpiName:ST_Write |vpiFullName:work@FSM1.COMB.ST_Write |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:85:23, endln:85:32 |vpiParent: - \_if_else: , line:85:7, endln:87:32 + \_assignment: , line:85:23, endln:85:43 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9264,7 +9256,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:86:16, endln:86:20 |vpiParent: - \_if_else: , line:85:7, endln:87:32 + \_operation: , line:86:16, endln:86:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9286,13 +9278,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:86:39, endln:86:46 |vpiParent: - \_if_else: , line:86:12, endln:87:32 + \_assignment: , line:86:27, endln:86:46 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:86:27, endln:86:36 |vpiParent: - \_if_else: , line:86:12, endln:87:32 + \_assignment: , line:86:27, endln:86:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9306,13 +9298,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Exit), line:87:24, endln:87:31 |vpiParent: - \_if_else: , line:86:12, endln:87:32 + \_assignment: , line:87:12, endln:87:31 |vpiName:ST_Exit |vpiFullName:work@FSM1.COMB.ST_Exit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:87:12, endln:87:21 |vpiParent: - \_if_else: , line:86:12, endln:87:32 + \_assignment: , line:87:12, endln:87:31 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9341,7 +9333,7 @@ design: (work@top) |vpiRhs: \_operation: , line:91:14, endln:91:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:91:7, endln:91:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:91:15, endln:91:19 @@ -9354,7 +9346,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:91:7, endln:91:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:91:7, endln:91:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9368,7 +9360,7 @@ design: (work@top) |vpiRhs: \_operation: , line:92:15, endln:92:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:92:7, endln:92:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:92:16, endln:92:21 @@ -9381,7 +9373,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:92:7, endln:92:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:92:7, endln:92:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9395,7 +9387,7 @@ design: (work@top) |vpiRhs: \_operation: , line:93:14, endln:93:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:93:7, endln:93:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:93:15, endln:93:20 @@ -9408,7 +9400,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:93:7, endln:93:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:93:7, endln:93:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -9422,7 +9414,7 @@ design: (work@top) |vpiRhs: \_operation: , line:94:15, endln:94:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:94:7, endln:94:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:94:16, endln:94:20 @@ -9435,7 +9427,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:94:7, endln:94:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_assignment: , line:94:7, endln:94:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -9452,7 +9444,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:95:11, endln:95:15 |vpiParent: - \_begin: (work@FSM1.COMB), line:90:14, endln:98:8 + \_operation: , line:95:11, endln:95:20 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9474,13 +9466,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Wait), line:95:34, endln:95:41 |vpiParent: - \_if_else: , line:95:7, endln:97:32 + \_assignment: , line:95:22, endln:95:41 |vpiName:ST_Wait |vpiFullName:work@FSM1.COMB.ST_Wait |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:95:22, endln:95:31 |vpiParent: - \_if_else: , line:95:7, endln:97:32 + \_assignment: , line:95:22, endln:95:41 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9497,7 +9489,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:96:16, endln:96:21 |vpiParent: - \_if_else: , line:95:7, endln:97:32 + \_operation: , line:96:16, endln:96:26 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -9519,13 +9511,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:96:40, endln:96:47 |vpiParent: - \_if_else: , line:96:12, endln:97:32 + \_assignment: , line:96:28, endln:96:47 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:96:28, endln:96:37 |vpiParent: - \_if_else: , line:96:12, endln:97:32 + \_assignment: , line:96:28, endln:96:47 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9539,13 +9531,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:97:24, endln:97:31 |vpiParent: - \_if_else: , line:96:12, endln:97:32 + \_assignment: , line:97:12, endln:97:31 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:97:12, endln:97:21 |vpiParent: - \_if_else: , line:96:12, endln:97:32 + \_assignment: , line:97:12, endln:97:31 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9574,7 +9566,7 @@ design: (work@top) |vpiRhs: \_operation: , line:101:14, endln:101:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:101:7, endln:101:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:101:15, endln:101:19 @@ -9587,7 +9579,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:101:7, endln:101:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:101:7, endln:101:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9601,7 +9593,7 @@ design: (work@top) |vpiRhs: \_operation: , line:102:15, endln:102:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:102:7, endln:102:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:102:16, endln:102:21 @@ -9614,7 +9606,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:102:7, endln:102:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:102:7, endln:102:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9628,7 +9620,7 @@ design: (work@top) |vpiRhs: \_operation: , line:103:14, endln:103:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:103:7, endln:103:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:103:15, endln:103:20 @@ -9641,7 +9633,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:103:7, endln:103:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:103:7, endln:103:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -9655,7 +9647,7 @@ design: (work@top) |vpiRhs: \_operation: , line:104:15, endln:104:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:104:7, endln:104:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:104:16, endln:104:20 @@ -9668,7 +9660,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:104:7, endln:104:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_assignment: , line:104:7, endln:104:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -9685,7 +9677,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:105:11, endln:105:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:100:14, endln:108:8 + \_operation: , line:105:11, endln:105:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9707,13 +9699,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Done), line:105:35, endln:105:42 |vpiParent: - \_if_else: , line:105:7, endln:107:33 + \_assignment: , line:105:23, endln:105:42 |vpiName:ST_Done |vpiFullName:work@FSM1.COMB.ST_Done |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:105:23, endln:105:32 |vpiParent: - \_if_else: , line:105:7, endln:107:33 + \_assignment: , line:105:23, endln:105:42 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9730,7 +9722,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:106:16, endln:106:20 |vpiParent: - \_if_else: , line:105:7, endln:107:33 + \_operation: , line:106:16, endln:106:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9752,13 +9744,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:106:39, endln:106:46 |vpiParent: - \_if_else: , line:106:12, endln:107:33 + \_assignment: , line:106:27, endln:106:46 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:106:27, endln:106:36 |vpiParent: - \_if_else: , line:106:12, endln:107:33 + \_assignment: , line:106:27, endln:106:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9772,13 +9764,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Write), line:107:24, endln:107:32 |vpiParent: - \_if_else: , line:106:12, endln:107:33 + \_assignment: , line:107:12, endln:107:32 |vpiName:ST_Write |vpiFullName:work@FSM1.COMB.ST_Write |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:107:12, endln:107:21 |vpiParent: - \_if_else: , line:106:12, endln:107:33 + \_assignment: , line:107:12, endln:107:32 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9807,7 +9799,7 @@ design: (work@top) |vpiRhs: \_operation: , line:111:14, endln:111:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:111:7, endln:111:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:111:15, endln:111:19 @@ -9820,7 +9812,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:111:7, endln:111:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:111:7, endln:111:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9834,7 +9826,7 @@ design: (work@top) |vpiRhs: \_operation: , line:112:15, endln:112:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:112:7, endln:112:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:112:16, endln:112:21 @@ -9847,7 +9839,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:112:7, endln:112:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:112:7, endln:112:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9861,7 +9853,7 @@ design: (work@top) |vpiRhs: \_operation: , line:113:14, endln:113:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:113:7, endln:113:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Write), line:113:15, endln:113:20 @@ -9874,7 +9866,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:113:7, endln:113:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:113:7, endln:113:20 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -9888,7 +9880,7 @@ design: (work@top) |vpiRhs: \_operation: , line:114:15, endln:114:20 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:114:7, endln:114:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Read), line:114:16, endln:114:20 @@ -9901,7 +9893,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:114:7, endln:114:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_assignment: , line:114:7, endln:114:20 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -9918,7 +9910,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:115:11, endln:115:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:110:14, endln:118:8 + \_operation: , line:115:11, endln:115:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -9940,13 +9932,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Quit), line:115:35, endln:115:42 |vpiParent: - \_if_else: , line:115:7, endln:117:32 + \_assignment: , line:115:23, endln:115:42 |vpiName:ST_Quit |vpiFullName:work@FSM1.COMB.ST_Quit |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:115:23, endln:115:32 |vpiParent: - \_if_else: , line:115:7, endln:117:32 + \_assignment: , line:115:23, endln:115:42 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -9963,7 +9955,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:116:16, endln:116:20 |vpiParent: - \_if_else: , line:115:7, endln:117:32 + \_operation: , line:116:16, endln:116:25 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -9985,13 +9977,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:116:39, endln:116:46 |vpiParent: - \_if_else: , line:116:12, endln:117:32 + \_assignment: , line:116:27, endln:116:46 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:116:27, endln:116:36 |vpiParent: - \_if_else: , line:116:12, endln:117:32 + \_assignment: , line:116:27, endln:116:46 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10005,13 +9997,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Turn), line:117:24, endln:117:31 |vpiParent: - \_if_else: , line:116:12, endln:117:32 + \_assignment: , line:117:12, endln:117:31 |vpiName:ST_Turn |vpiFullName:work@FSM1.COMB.ST_Turn |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:117:12, endln:117:21 |vpiParent: - \_if_else: , line:116:12, endln:117:32 + \_assignment: , line:117:12, endln:117:31 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10039,8 +10031,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:121:14, endln:121:15 - |vpiParent: - \_assignment: , line:121:7, endln:121:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10048,7 +10038,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:121:7, endln:121:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:121:7, endln:121:15 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -10061,8 +10051,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:122:15, endln:122:16 - |vpiParent: - \_assignment: , line:122:7, endln:122:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10070,7 +10058,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:122:7, endln:122:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:122:7, endln:122:16 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -10084,7 +10072,7 @@ design: (work@top) |vpiRhs: \_operation: , line:123:14, endln:123:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:123:7, endln:123:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:123:15, endln:123:19 @@ -10097,7 +10085,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:123:7, endln:123:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:123:7, endln:123:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -10111,7 +10099,7 @@ design: (work@top) |vpiRhs: \_operation: , line:124:15, endln:124:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:124:7, endln:124:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:124:16, endln:124:21 @@ -10124,7 +10112,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:124:7, endln:124:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:124:7, endln:124:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -10138,13 +10126,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Write), line:125:19, endln:125:27 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:125:7, endln:125:27 |vpiName:ST_Write |vpiFullName:work@FSM1.COMB.ST_Write |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:125:7, endln:125:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:120:14, endln:126:8 + \_assignment: , line:125:7, endln:125:27 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10173,7 +10161,7 @@ design: (work@top) |vpiRhs: \_operation: , line:129:14, endln:129:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:129:7, endln:129:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:129:15, endln:129:19 @@ -10186,7 +10174,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:129:7, endln:129:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:129:7, endln:129:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -10200,7 +10188,7 @@ design: (work@top) |vpiRhs: \_operation: , line:130:15, endln:130:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:130:7, endln:130:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:130:16, endln:130:21 @@ -10213,7 +10201,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:130:7, endln:130:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:130:7, endln:130:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -10226,8 +10214,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:131:14, endln:131:15 - |vpiParent: - \_assignment: , line:131:7, endln:131:15 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10235,7 +10221,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:131:7, endln:131:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:131:7, endln:131:15 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -10248,8 +10234,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:132:15, endln:132:16 - |vpiParent: - \_assignment: , line:132:7, endln:132:16 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10257,7 +10241,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:132:7, endln:132:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:128:15, endln:137:8 + \_assignment: , line:132:7, endln:132:16 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -10283,13 +10267,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Delay), line:134:21, endln:134:29 |vpiParent: - \_if_else: , line:133:7, endln:136:29 + \_assignment: , line:134:9, endln:134:29 |vpiName:ST_Delay |vpiFullName:work@FSM1.COMB.ST_Delay |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:134:9, endln:134:18 |vpiParent: - \_if_else: , line:133:7, endln:136:29 + \_assignment: , line:134:9, endln:134:29 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10303,13 +10287,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:136:21, endln:136:28 |vpiParent: - \_if_else: , line:133:7, endln:136:29 + \_assignment: , line:136:9, endln:136:28 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:136:9, endln:136:18 |vpiParent: - \_if_else: , line:133:7, endln:136:29 + \_assignment: , line:136:9, endln:136:28 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10338,7 +10322,7 @@ design: (work@top) |vpiRhs: \_operation: , line:140:14, endln:140:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:140:7, endln:140:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:140:15, endln:140:19 @@ -10351,7 +10335,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:140:7, endln:140:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:140:7, endln:140:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -10365,7 +10349,7 @@ design: (work@top) |vpiRhs: \_operation: , line:141:15, endln:141:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:141:7, endln:141:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:141:16, endln:141:21 @@ -10378,7 +10362,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:141:7, endln:141:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:141:7, endln:141:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -10391,8 +10375,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:142:14, endln:142:15 - |vpiParent: - \_assignment: , line:142:7, endln:142:15 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10400,7 +10382,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:142:7, endln:142:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:142:7, endln:142:15 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -10413,8 +10395,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:143:15, endln:143:16 - |vpiParent: - \_assignment: , line:143:7, endln:143:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10422,7 +10402,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:143:7, endln:143:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:143:7, endln:143:16 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -10436,13 +10416,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:144:19, endln:144:26 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:144:7, endln:144:26 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:144:7, endln:144:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:139:15, endln:145:8 + \_assignment: , line:144:7, endln:144:26 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -10465,7 +10445,7 @@ design: (work@top) |vpiRhs: \_operation: , line:148:14, endln:148:19 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:148:7, endln:148:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Wait), line:148:15, endln:148:19 @@ -10478,7 +10458,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Wait), line:148:7, endln:148:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:148:7, endln:148:19 |vpiName:Wait |vpiFullName:work@FSM1.COMB.Wait |vpiActual: @@ -10492,7 +10472,7 @@ design: (work@top) |vpiRhs: \_operation: , line:149:15, endln:149:21 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:149:7, endln:149:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM1.COMB.Delay), line:149:16, endln:149:21 @@ -10505,7 +10485,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Delay), line:149:7, endln:149:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:149:7, endln:149:21 |vpiName:Delay |vpiFullName:work@FSM1.COMB.Delay |vpiActual: @@ -10518,8 +10498,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:150:14, endln:150:15 - |vpiParent: - \_assignment: , line:150:7, endln:150:15 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10527,7 +10505,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Read), line:150:7, endln:150:11 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:150:7, endln:150:15 |vpiName:Read |vpiFullName:work@FSM1.COMB.Read |vpiActual: @@ -10540,8 +10518,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:151:15, endln:151:16 - |vpiParent: - \_assignment: , line:151:7, endln:151:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10549,7 +10525,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM1.COMB.Write), line:151:7, endln:151:12 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:151:7, endln:151:16 |vpiName:Write |vpiFullName:work@FSM1.COMB.Write |vpiActual: @@ -10563,13 +10539,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM1.COMB.ST_Read), line:152:19, endln:152:26 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:152:7, endln:152:26 |vpiName:ST_Read |vpiFullName:work@FSM1.COMB.ST_Read |vpiLhs: \_ref_obj: (work@FSM1.COMB.NextState), line:152:7, endln:152:16 |vpiParent: - \_begin: (work@FSM1.COMB), line:147:14, endln:153:8 + \_assignment: , line:152:7, endln:152:26 |vpiName:NextState |vpiFullName:work@FSM1.COMB.NextState |vpiActual: @@ -11075,7 +11051,7 @@ design: (work@top) |vpiRhs: \_operation: , line:25:11, endln:25:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:25:3, endln:25:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl1), line:25:12, endln:25:17 @@ -11088,7 +11064,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl1), line:25:3, endln:25:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:25:3, endln:25:17 |vpiName:Ctrl1 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl1 |vpiActual: @@ -11102,7 +11078,7 @@ design: (work@top) |vpiRhs: \_operation: , line:26:11, endln:26:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:26:3, endln:26:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl2), line:26:12, endln:26:17 @@ -11115,7 +11091,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl2), line:26:3, endln:26:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:26:3, endln:26:17 |vpiName:Ctrl2 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl2 |vpiActual: @@ -11129,7 +11105,7 @@ design: (work@top) |vpiRhs: \_operation: , line:27:11, endln:27:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:27:3, endln:27:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl3), line:27:12, endln:27:17 @@ -11142,7 +11118,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl3), line:27:3, endln:27:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:27:3, endln:27:17 |vpiName:Ctrl3 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl3 |vpiActual: @@ -11156,7 +11132,7 @@ design: (work@top) |vpiRhs: \_operation: , line:28:11, endln:28:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:28:3, endln:28:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl4), line:28:12, endln:28:17 @@ -11169,7 +11145,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl4), line:28:3, endln:28:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:28:3, endln:28:17 |vpiName:Ctrl4 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl4 |vpiActual: @@ -11183,7 +11159,7 @@ design: (work@top) |vpiRhs: \_operation: , line:29:11, endln:29:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:29:3, endln:29:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl5), line:29:12, endln:29:17 @@ -11196,7 +11172,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl5), line:29:3, endln:29:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:29:3, endln:29:17 |vpiName:Ctrl5 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl5 |vpiActual: @@ -11210,7 +11186,7 @@ design: (work@top) |vpiRhs: \_operation: , line:30:11, endln:30:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:30:3, endln:30:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl6), line:30:12, endln:30:17 @@ -11223,7 +11199,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl6), line:30:3, endln:30:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:30:3, endln:30:17 |vpiName:Ctrl6 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl6 |vpiActual: @@ -11237,7 +11213,7 @@ design: (work@top) |vpiRhs: \_operation: , line:31:11, endln:31:17 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:31:3, endln:31:17 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl7), line:31:12, endln:31:17 @@ -11250,7 +11226,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SwitchCtrl.Ctrl7), line:31:3, endln:31:8 |vpiParent: - \_begin: (work@FSM2.SwitchCtrl), line:24:1, endln:32:4 + \_assignment: , line:31:3, endln:31:17 |vpiName:Ctrl7 |vpiFullName:work@FSM2.SwitchCtrl.Ctrl7 |vpiActual: @@ -11428,8 +11404,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:13:11, endln:13:12 - |vpiParent: - \_assignment: , line:13:3, endln:13:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11437,7 +11411,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl1), line:13:3, endln:13:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:13:3, endln:13:12 |vpiName:Ctrl1 |vpiFullName:work@FSM2.Ctrl1 |vpiActual: @@ -11450,8 +11424,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:14:11, endln:14:12 - |vpiParent: - \_assignment: , line:14:3, endln:14:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11459,7 +11431,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl2), line:14:3, endln:14:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:14:3, endln:14:12 |vpiName:Ctrl2 |vpiFullName:work@FSM2.Ctrl2 |vpiActual: @@ -11472,8 +11444,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:11, endln:15:12 - |vpiParent: - \_assignment: , line:15:3, endln:15:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11481,7 +11451,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl3), line:15:3, endln:15:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:15:3, endln:15:12 |vpiName:Ctrl3 |vpiFullName:work@FSM2.Ctrl3 |vpiActual: @@ -11494,8 +11464,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:11, endln:16:12 - |vpiParent: - \_assignment: , line:16:3, endln:16:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11503,7 +11471,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl4), line:16:3, endln:16:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:16:3, endln:16:12 |vpiName:Ctrl4 |vpiFullName:work@FSM2.Ctrl4 |vpiActual: @@ -11516,8 +11484,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:11, endln:17:12 - |vpiParent: - \_assignment: , line:17:3, endln:17:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11525,7 +11491,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl5), line:17:3, endln:17:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:17:3, endln:17:12 |vpiName:Ctrl5 |vpiFullName:work@FSM2.Ctrl5 |vpiActual: @@ -11538,8 +11504,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:18:11, endln:18:12 - |vpiParent: - \_assignment: , line:18:3, endln:18:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11547,7 +11511,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl6), line:18:3, endln:18:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:18:3, endln:18:12 |vpiName:Ctrl6 |vpiFullName:work@FSM2.Ctrl6 |vpiActual: @@ -11560,8 +11524,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:11, endln:19:12 - |vpiParent: - \_assignment: , line:19:3, endln:19:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11569,7 +11531,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.Ctrl7), line:19:3, endln:19:8 |vpiParent: - \_begin: (work@FSM2), line:12:9, endln:20:4 + \_assignment: , line:19:3, endln:19:12 |vpiName:Ctrl7 |vpiFullName:work@FSM2.Ctrl7 |vpiActual: @@ -11612,7 +11574,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST0), line:37:15, endln:37:18 |vpiParent: - \_named_begin: (work@FSM2.COMB), line:36:35, endln:113:4 + \_assignment: , line:37:3, endln:37:18 |vpiName:ST0 |vpiFullName:work@FSM2.COMB.ST0 |vpiActual: @@ -11620,7 +11582,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:37:3, endln:37:12 |vpiParent: - \_named_begin: (work@FSM2.COMB), line:36:35, endln:113:4 + \_assignment: , line:37:3, endln:37:18 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11664,7 +11626,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:40:19, endln:40:22 |vpiParent: - \_begin: (work@FSM2.COMB), line:39:9, endln:42:8 + \_assignment: , line:40:7, endln:40:22 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -11672,7 +11634,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:40:7, endln:40:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:39:9, endln:42:8 + \_assignment: , line:40:7, endln:40:22 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11722,7 +11684,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST2), line:46:21, endln:46:24 |vpiParent: - \_if_else: , line:45:7, endln:48:25 + \_assignment: , line:46:9, endln:46:24 |vpiName:ST2 |vpiFullName:work@FSM2.COMB.ST2 |vpiActual: @@ -11730,7 +11692,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:46:9, endln:46:18 |vpiParent: - \_if_else: , line:45:7, endln:48:25 + \_assignment: , line:46:9, endln:46:24 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11744,7 +11706,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST3), line:48:21, endln:48:24 |vpiParent: - \_if_else: , line:45:7, endln:48:25 + \_assignment: , line:48:9, endln:48:24 |vpiName:ST3 |vpiFullName:work@FSM2.COMB.ST3 |vpiActual: @@ -11752,7 +11714,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:48:9, endln:48:18 |vpiParent: - \_if_else: , line:45:7, endln:48:25 + \_assignment: , line:48:9, endln:48:24 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11790,7 +11752,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST3), line:53:19, endln:53:22 |vpiParent: - \_begin: (work@FSM2.COMB), line:52:9, endln:55:8 + \_assignment: , line:53:7, endln:53:22 |vpiName:ST3 |vpiFullName:work@FSM2.COMB.ST3 |vpiActual: @@ -11798,7 +11760,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:53:7, endln:53:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:52:9, endln:55:8 + \_assignment: , line:53:7, endln:53:22 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11836,7 +11798,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST0), line:58:19, endln:58:22 |vpiParent: - \_begin: (work@FSM2.COMB), line:57:9, endln:59:8 + \_assignment: , line:58:7, endln:58:22 |vpiName:ST0 |vpiFullName:work@FSM2.COMB.ST0 |vpiActual: @@ -11844,7 +11806,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:58:7, endln:58:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:57:9, endln:59:8 + \_assignment: , line:58:7, endln:58:22 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11882,7 +11844,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST5), line:63:19, endln:63:22 |vpiParent: - \_begin: (work@FSM2.COMB), line:61:8, endln:64:7 + \_assignment: , line:63:7, endln:63:22 |vpiName:ST5 |vpiFullName:work@FSM2.COMB.ST5 |vpiActual: @@ -11890,7 +11852,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:63:7, endln:63:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:61:8, endln:64:7 + \_assignment: , line:63:7, endln:63:22 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11921,7 +11883,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST10), line:67:19, endln:67:23 |vpiParent: - \_begin: (work@FSM2.COMB), line:66:8, endln:69:7 + \_assignment: , line:67:7, endln:67:23 |vpiName:ST10 |vpiFullName:work@FSM2.COMB.ST10 |vpiActual: @@ -11929,7 +11891,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:67:7, endln:67:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:66:8, endln:69:7 + \_assignment: , line:67:7, endln:67:23 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -11974,7 +11936,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST3), line:73:19, endln:73:22 |vpiParent: - \_begin: (work@FSM2.COMB), line:71:8, endln:74:7 + \_assignment: , line:73:7, endln:73:22 |vpiName:ST3 |vpiFullName:work@FSM2.COMB.ST3 |vpiActual: @@ -11982,7 +11944,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:73:7, endln:73:16 |vpiParent: - \_begin: (work@FSM2.COMB), line:71:8, endln:74:7 + \_assignment: , line:73:7, endln:73:22 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12032,7 +11994,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST8), line:78:30, endln:78:33 |vpiParent: - \_if_else: , line:78:7, endln:85:28 + \_assignment: , line:78:18, endln:78:33 |vpiName:ST8 |vpiFullName:work@FSM2.COMB.ST8 |vpiActual: @@ -12040,7 +12002,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:78:18, endln:78:27 |vpiParent: - \_if_else: , line:78:7, endln:85:28 + \_assignment: , line:78:18, endln:78:33 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12066,7 +12028,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST4), line:79:35, endln:79:38 |vpiParent: - \_if_else: , line:79:12, endln:85:28 + \_assignment: , line:79:23, endln:79:38 |vpiName:ST4 |vpiFullName:work@FSM2.COMB.ST4 |vpiActual: @@ -12074,7 +12036,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:79:23, endln:79:32 |vpiParent: - \_if_else: , line:79:12, endln:85:28 + \_assignment: , line:79:23, endln:79:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12100,7 +12062,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST3), line:80:35, endln:80:38 |vpiParent: - \_if_else: , line:80:12, endln:85:28 + \_assignment: , line:80:23, endln:80:38 |vpiName:ST3 |vpiFullName:work@FSM2.COMB.ST3 |vpiActual: @@ -12108,7 +12070,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:80:23, endln:80:32 |vpiParent: - \_if_else: , line:80:12, endln:85:28 + \_assignment: , line:80:23, endln:80:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12134,7 +12096,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:81:35, endln:81:38 |vpiParent: - \_if_else: , line:81:12, endln:85:28 + \_assignment: , line:81:23, endln:81:38 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12142,7 +12104,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:81:23, endln:81:32 |vpiParent: - \_if_else: , line:81:12, endln:85:28 + \_assignment: , line:81:23, endln:81:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12168,7 +12130,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST0), line:82:35, endln:82:38 |vpiParent: - \_if_else: , line:82:12, endln:85:28 + \_assignment: , line:82:23, endln:82:38 |vpiName:ST0 |vpiFullName:work@FSM2.COMB.ST0 |vpiActual: @@ -12176,7 +12138,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:82:23, endln:82:32 |vpiParent: - \_if_else: , line:82:12, endln:85:28 + \_assignment: , line:82:23, endln:82:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12202,7 +12164,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST2), line:83:35, endln:83:38 |vpiParent: - \_if_else: , line:83:12, endln:85:28 + \_assignment: , line:83:23, endln:83:38 |vpiName:ST2 |vpiFullName:work@FSM2.COMB.ST2 |vpiActual: @@ -12210,7 +12172,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:83:23, endln:83:32 |vpiParent: - \_if_else: , line:83:12, endln:85:28 + \_assignment: , line:83:23, endln:83:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12236,7 +12198,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST5), line:84:35, endln:84:38 |vpiParent: - \_if_else: , line:84:12, endln:85:28 + \_assignment: , line:84:23, endln:84:38 |vpiName:ST5 |vpiFullName:work@FSM2.COMB.ST5 |vpiActual: @@ -12244,7 +12206,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:84:23, endln:84:32 |vpiParent: - \_if_else: , line:84:12, endln:85:28 + \_assignment: , line:84:23, endln:84:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12258,7 +12220,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:85:24, endln:85:27 |vpiParent: - \_if_else: , line:84:12, endln:85:28 + \_assignment: , line:85:12, endln:85:27 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12266,7 +12228,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:85:12, endln:85:21 |vpiParent: - \_if_else: , line:84:12, endln:85:28 + \_assignment: , line:85:12, endln:85:27 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12316,7 +12278,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST8), line:90:30, endln:90:33 |vpiParent: - \_if_else: , line:90:7, endln:97:28 + \_assignment: , line:90:18, endln:90:33 |vpiName:ST8 |vpiFullName:work@FSM2.COMB.ST8 |vpiActual: @@ -12324,7 +12286,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:90:18, endln:90:27 |vpiParent: - \_if_else: , line:90:7, endln:97:28 + \_assignment: , line:90:18, endln:90:33 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12355,7 +12317,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST4), line:91:36, endln:91:39 |vpiParent: - \_if_else: , line:91:12, endln:97:28 + \_assignment: , line:91:24, endln:91:39 |vpiName:ST4 |vpiFullName:work@FSM2.COMB.ST4 |vpiActual: @@ -12363,7 +12325,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:91:24, endln:91:33 |vpiParent: - \_if_else: , line:91:12, endln:97:28 + \_assignment: , line:91:24, endln:91:39 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12389,7 +12351,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST3), line:92:35, endln:92:38 |vpiParent: - \_if_else: , line:92:12, endln:97:28 + \_assignment: , line:92:23, endln:92:38 |vpiName:ST3 |vpiFullName:work@FSM2.COMB.ST3 |vpiActual: @@ -12397,7 +12359,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:92:23, endln:92:32 |vpiParent: - \_if_else: , line:92:12, endln:97:28 + \_assignment: , line:92:23, endln:92:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12428,7 +12390,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:93:36, endln:93:39 |vpiParent: - \_if_else: , line:93:12, endln:97:28 + \_assignment: , line:93:24, endln:93:39 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12436,7 +12398,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:93:24, endln:93:33 |vpiParent: - \_if_else: , line:93:12, endln:97:28 + \_assignment: , line:93:24, endln:93:39 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12462,7 +12424,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST0), line:94:35, endln:94:38 |vpiParent: - \_if_else: , line:94:12, endln:97:28 + \_assignment: , line:94:23, endln:94:38 |vpiName:ST0 |vpiFullName:work@FSM2.COMB.ST0 |vpiActual: @@ -12470,7 +12432,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:94:23, endln:94:32 |vpiParent: - \_if_else: , line:94:12, endln:97:28 + \_assignment: , line:94:23, endln:94:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12501,7 +12463,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST2), line:95:36, endln:95:39 |vpiParent: - \_if_else: , line:95:12, endln:97:28 + \_assignment: , line:95:24, endln:95:39 |vpiName:ST2 |vpiFullName:work@FSM2.COMB.ST2 |vpiActual: @@ -12509,7 +12471,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:95:24, endln:95:33 |vpiParent: - \_if_else: , line:95:12, endln:97:28 + \_assignment: , line:95:24, endln:95:39 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12535,7 +12497,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST5), line:96:35, endln:96:38 |vpiParent: - \_if_else: , line:96:12, endln:97:28 + \_assignment: , line:96:23, endln:96:38 |vpiName:ST5 |vpiFullName:work@FSM2.COMB.ST5 |vpiActual: @@ -12543,7 +12505,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:96:23, endln:96:32 |vpiParent: - \_if_else: , line:96:12, endln:97:28 + \_assignment: , line:96:23, endln:96:38 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12557,7 +12519,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:97:24, endln:97:27 |vpiParent: - \_if_else: , line:96:12, endln:97:28 + \_assignment: , line:97:12, endln:97:27 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12565,7 +12527,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:97:12, endln:97:21 |vpiParent: - \_if_else: , line:96:12, endln:97:28 + \_assignment: , line:97:12, endln:97:27 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12615,7 +12577,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST7), line:102:30, endln:102:33 |vpiParent: - \_if_else: , line:102:7, endln:103:28 + \_assignment: , line:102:18, endln:102:33 |vpiName:ST7 |vpiFullName:work@FSM2.COMB.ST7 |vpiActual: @@ -12623,7 +12585,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:102:18, endln:102:27 |vpiParent: - \_if_else: , line:102:7, endln:103:28 + \_assignment: , line:102:18, endln:102:33 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12637,7 +12599,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:103:24, endln:103:27 |vpiParent: - \_if_else: , line:102:7, endln:103:28 + \_assignment: , line:103:12, endln:103:27 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12645,7 +12607,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:103:12, endln:103:21 |vpiParent: - \_if_else: , line:102:7, endln:103:28 + \_assignment: , line:103:12, endln:103:27 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12695,7 +12657,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST6), line:108:30, endln:108:33 |vpiParent: - \_if_else: , line:108:7, endln:109:28 + \_assignment: , line:108:18, endln:108:33 |vpiName:ST6 |vpiFullName:work@FSM2.COMB.ST6 |vpiActual: @@ -12703,7 +12665,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:108:18, endln:108:27 |vpiParent: - \_if_else: , line:108:7, endln:109:28 + \_assignment: , line:108:18, endln:108:33 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12717,7 +12679,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.COMB.ST1), line:109:24, endln:109:27 |vpiParent: - \_if_else: , line:108:7, endln:109:28 + \_assignment: , line:109:12, endln:109:27 |vpiName:ST1 |vpiFullName:work@FSM2.COMB.ST1 |vpiActual: @@ -12725,7 +12687,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.COMB.NextState), line:109:12, endln:109:21 |vpiParent: - \_if_else: , line:108:7, endln:109:28 + \_assignment: , line:109:12, endln:109:27 |vpiName:NextState |vpiFullName:work@FSM2.COMB.NextState |vpiActual: @@ -12791,7 +12753,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.SEQ.ST0), line:118:20, endln:118:23 |vpiParent: - \_if_else: , line:117:3, endln:120:30 + \_assignment: , line:118:5, endln:118:23 |vpiName:ST0 |vpiFullName:work@FSM2.SEQ.ST0 |vpiActual: @@ -12799,7 +12761,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SEQ.CurrentState), line:118:5, endln:118:17 |vpiParent: - \_if_else: , line:117:3, endln:120:30 + \_assignment: , line:118:5, endln:118:23 |vpiName:CurrentState |vpiFullName:work@FSM2.SEQ.CurrentState |vpiActual: @@ -12813,7 +12775,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM2.SEQ.NextState), line:120:20, endln:120:29 |vpiParent: - \_if_else: , line:117:3, endln:120:30 + \_assignment: , line:120:5, endln:120:29 |vpiName:NextState |vpiFullName:work@FSM2.SEQ.NextState |vpiActual: @@ -12821,7 +12783,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.SEQ.CurrentState), line:120:5, endln:120:17 |vpiParent: - \_if_else: , line:117:3, endln:120:30 + \_assignment: , line:120:5, endln:120:29 |vpiName:CurrentState |vpiFullName:work@FSM2.SEQ.CurrentState |vpiActual: @@ -12882,8 +12844,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:126:12, endln:126:13 - |vpiParent: - \_assignment: , line:126:10, endln:126:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -12891,7 +12851,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.OUT_LOGIC.y), line:126:10, endln:126:11 |vpiParent: - \_case_item: , line:126:5, endln:126:14 + \_assignment: , line:126:10, endln:126:13 |vpiName:y |vpiFullName:work@FSM2.OUT_LOGIC.y |vpiActual: @@ -12916,8 +12876,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:127:12, endln:127:13 - |vpiParent: - \_assignment: , line:127:10, endln:127:13 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -12925,7 +12883,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.OUT_LOGIC.y), line:127:10, endln:127:11 |vpiParent: - \_case_item: , line:127:5, endln:127:14 + \_assignment: , line:127:10, endln:127:13 |vpiName:y |vpiFullName:work@FSM2.OUT_LOGIC.y |vpiActual: @@ -12950,8 +12908,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:128:12, endln:128:13 - |vpiParent: - \_assignment: , line:128:10, endln:128:13 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -12959,7 +12915,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.OUT_LOGIC.y), line:128:10, endln:128:11 |vpiParent: - \_case_item: , line:128:5, endln:128:14 + \_assignment: , line:128:10, endln:128:13 |vpiName:y |vpiFullName:work@FSM2.OUT_LOGIC.y |vpiActual: @@ -12984,8 +12940,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:129:12, endln:129:13 - |vpiParent: - \_assignment: , line:129:10, endln:129:13 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -12993,7 +12947,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.OUT_LOGIC.y), line:129:10, endln:129:11 |vpiParent: - \_case_item: , line:129:5, endln:129:14 + \_assignment: , line:129:10, endln:129:13 |vpiName:y |vpiFullName:work@FSM2.OUT_LOGIC.y |vpiActual: @@ -13010,8 +12964,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:130:16, endln:130:17 - |vpiParent: - \_assignment: , line:130:14, endln:130:17 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13019,7 +12971,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM2.OUT_LOGIC.y), line:130:14, endln:130:15 |vpiParent: - \_case_item: , line:130:5, endln:130:18 + \_assignment: , line:130:14, endln:130:17 |vpiName:y |vpiFullName:work@FSM2.OUT_LOGIC.y |vpiActual: @@ -13395,8 +13347,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:11, endln:17:12 - |vpiParent: - \_assignment: , line:17:3, endln:17:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -13404,7 +13354,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.Ctrl1), line:17:3, endln:17:8 |vpiParent: - \_begin: (work@FSM3), line:16:9, endln:20:4 + \_assignment: , line:17:3, endln:17:12 |vpiName:Ctrl1 |vpiFullName:work@FSM3.Ctrl1 |vpiActual: @@ -13417,8 +13367,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:18:11, endln:18:12 - |vpiParent: - \_assignment: , line:18:3, endln:18:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13426,7 +13374,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.Ctrl2), line:18:3, endln:18:8 |vpiParent: - \_begin: (work@FSM3), line:16:9, endln:20:4 + \_assignment: , line:18:3, endln:18:12 |vpiName:Ctrl2 |vpiFullName:work@FSM3.Ctrl2 |vpiActual: @@ -13439,8 +13387,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:11, endln:19:12 - |vpiParent: - \_assignment: , line:19:3, endln:19:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -13448,7 +13394,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.Ctrl3), line:19:3, endln:19:8 |vpiParent: - \_begin: (work@FSM3), line:16:9, endln:20:4 + \_assignment: , line:19:3, endln:19:12 |vpiName:Ctrl3 |vpiFullName:work@FSM3.Ctrl3 |vpiActual: @@ -13518,13 +13464,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Stop), line:24:12, endln:24:16 |vpiParent: - \_if_else: , line:23:3, endln:46:19 + \_assignment: , line:24:4, endln:24:16 |vpiName:Stop |vpiFullName:work@FSM3.FSM3.Stop |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:24:4, endln:24:9 |vpiParent: - \_if_else: , line:23:3, endln:46:19 + \_assignment: , line:24:4, endln:24:16 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13573,13 +13519,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Slow), line:27:23, endln:27:27 |vpiParent: - \_case_item: , line:27:7, endln:27:28 + \_assignment: , line:27:15, endln:27:27 |vpiName:Slow |vpiFullName:work@FSM3.FSM3.Slow |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:27:15, endln:27:20 |vpiParent: - \_case_item: , line:27:7, endln:27:28 + \_assignment: , line:27:15, endln:27:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13603,13 +13549,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Faster), line:28:23, endln:28:29 |vpiParent: - \_case_item: , line:28:7, endln:28:30 + \_assignment: , line:28:15, endln:28:29 |vpiName:Faster |vpiFullName:work@FSM3.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:28:15, endln:28:20 |vpiParent: - \_case_item: , line:28:7, endln:28:30 + \_assignment: , line:28:15, endln:28:29 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13633,13 +13579,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Move), line:29:23, endln:29:27 |vpiParent: - \_case_item: , line:29:7, endln:29:28 + \_assignment: , line:29:15, endln:29:27 |vpiName:Move |vpiFullName:work@FSM3.FSM3.Move |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:29:15, endln:29:20 |vpiParent: - \_case_item: , line:29:7, endln:29:28 + \_assignment: , line:29:15, endln:29:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13663,13 +13609,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Medium), line:30:23, endln:30:29 |vpiParent: - \_case_item: , line:30:7, endln:30:30 + \_assignment: , line:30:15, endln:30:29 |vpiName:Medium |vpiFullName:work@FSM3.FSM3.Medium |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:30:15, endln:30:20 |vpiParent: - \_case_item: , line:30:7, endln:30:30 + \_assignment: , line:30:15, endln:30:29 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13693,13 +13639,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Fast), line:31:23, endln:31:27 |vpiParent: - \_case_item: , line:31:7, endln:31:28 + \_assignment: , line:31:15, endln:31:27 |vpiName:Fast |vpiFullName:work@FSM3.FSM3.Fast |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:31:15, endln:31:20 |vpiParent: - \_case_item: , line:31:7, endln:31:28 + \_assignment: , line:31:15, endln:31:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13723,13 +13669,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Fast), line:32:23, endln:32:27 |vpiParent: - \_case_item: , line:32:7, endln:32:28 + \_assignment: , line:32:15, endln:32:27 |vpiName:Fast |vpiFullName:work@FSM3.FSM3.Fast |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:32:15, endln:32:20 |vpiParent: - \_case_item: , line:32:7, endln:32:28 + \_assignment: , line:32:15, endln:32:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13753,13 +13699,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Stop), line:33:23, endln:33:27 |vpiParent: - \_case_item: , line:33:7, endln:33:28 + \_assignment: , line:33:15, endln:33:27 |vpiName:Stop |vpiFullName:work@FSM3.FSM3.Stop |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:33:15, endln:33:20 |vpiParent: - \_case_item: , line:33:7, endln:33:28 + \_assignment: , line:33:15, endln:33:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13808,13 +13754,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Faster), line:37:23, endln:37:29 |vpiParent: - \_case_item: , line:37:7, endln:37:30 + \_assignment: , line:37:15, endln:37:29 |vpiName:Faster |vpiFullName:work@FSM3.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:37:15, endln:37:20 |vpiParent: - \_case_item: , line:37:7, endln:37:30 + \_assignment: , line:37:15, endln:37:29 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13838,13 +13784,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Faster), line:38:23, endln:38:29 |vpiParent: - \_case_item: , line:38:7, endln:38:30 + \_assignment: , line:38:15, endln:38:29 |vpiName:Faster |vpiFullName:work@FSM3.FSM3.Faster |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:38:15, endln:38:20 |vpiParent: - \_case_item: , line:38:7, endln:38:30 + \_assignment: , line:38:15, endln:38:29 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13868,13 +13814,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Move), line:39:23, endln:39:27 |vpiParent: - \_case_item: , line:39:7, endln:39:28 + \_assignment: , line:39:15, endln:39:27 |vpiName:Move |vpiFullName:work@FSM3.FSM3.Move |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:39:15, endln:39:20 |vpiParent: - \_case_item: , line:39:7, endln:39:28 + \_assignment: , line:39:15, endln:39:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13898,13 +13844,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Stop), line:40:23, endln:40:27 |vpiParent: - \_case_item: , line:40:7, endln:40:28 + \_assignment: , line:40:15, endln:40:27 |vpiName:Stop |vpiFullName:work@FSM3.FSM3.Stop |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:40:15, endln:40:20 |vpiParent: - \_case_item: , line:40:7, endln:40:28 + \_assignment: , line:40:15, endln:40:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13928,13 +13874,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Slow), line:41:23, endln:41:27 |vpiParent: - \_case_item: , line:41:7, endln:41:28 + \_assignment: , line:41:15, endln:41:27 |vpiName:Slow |vpiFullName:work@FSM3.FSM3.Slow |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:41:15, endln:41:20 |vpiParent: - \_case_item: , line:41:7, endln:41:28 + \_assignment: , line:41:15, endln:41:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13958,13 +13904,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Medium), line:42:23, endln:42:29 |vpiParent: - \_case_item: , line:42:7, endln:42:30 + \_assignment: , line:42:15, endln:42:29 |vpiName:Medium |vpiFullName:work@FSM3.FSM3.Medium |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:42:15, endln:42:20 |vpiParent: - \_case_item: , line:42:7, endln:42:30 + \_assignment: , line:42:15, endln:42:29 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -13988,13 +13934,13 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Slow), line:43:23, endln:43:27 |vpiParent: - \_case_item: , line:43:7, endln:43:28 + \_assignment: , line:43:15, endln:43:27 |vpiName:Slow |vpiFullName:work@FSM3.FSM3.Slow |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:43:15, endln:43:20 |vpiParent: - \_case_item: , line:43:7, endln:43:28 + \_assignment: , line:43:15, endln:43:27 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -14008,7 +13954,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:46:13, endln:46:18 |vpiParent: - \_if_else: , line:35:8, endln:46:19 + \_assignment: , line:46:5, endln:46:18 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -14016,7 +13962,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Speed), line:46:5, endln:46:10 |vpiParent: - \_if_else: , line:35:8, endln:46:19 + \_assignment: , line:46:5, endln:46:18 |vpiName:Speed |vpiFullName:work@FSM3.FSM3.Speed |vpiActual: @@ -14046,8 +13992,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:49:12, endln:49:13 - |vpiParent: - \_assignment: , line:49:4, endln:49:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14055,7 +13999,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl1), line:49:4, endln:49:9 |vpiParent: - \_if_else: , line:48:2, endln:51:19 + \_assignment: , line:49:4, endln:49:13 |vpiName:Ctrl1 |vpiFullName:work@FSM3.FSM3.Ctrl1 |vpiActual: @@ -14069,7 +14013,7 @@ design: (work@top) |vpiRhs: \_operation: , line:51:12, endln:51:18 |vpiParent: - \_if_else: , line:48:2, endln:51:19 + \_assignment: , line:51:4, endln:51:18 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM3.FSM3.Ctrl1), line:51:13, endln:51:18 @@ -14082,7 +14026,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl1), line:51:4, endln:51:9 |vpiParent: - \_if_else: , line:48:2, endln:51:19 + \_assignment: , line:51:4, endln:51:18 |vpiName:Ctrl1 |vpiFullName:work@FSM3.FSM3.Ctrl1 |vpiActual: @@ -14112,8 +14056,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:54:12, endln:54:13 - |vpiParent: - \_assignment: , line:54:4, endln:54:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14121,7 +14063,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl2), line:54:4, endln:54:9 |vpiParent: - \_if_else: , line:53:2, endln:56:19 + \_assignment: , line:54:4, endln:54:13 |vpiName:Ctrl2 |vpiFullName:work@FSM3.FSM3.Ctrl2 |vpiActual: @@ -14135,7 +14077,7 @@ design: (work@top) |vpiRhs: \_operation: , line:56:12, endln:56:18 |vpiParent: - \_if_else: , line:53:2, endln:56:19 + \_assignment: , line:56:4, endln:56:18 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM3.FSM3.Ctrl2), line:56:13, endln:56:18 @@ -14148,7 +14090,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl2), line:56:4, endln:56:9 |vpiParent: - \_if_else: , line:53:2, endln:56:19 + \_assignment: , line:56:4, endln:56:18 |vpiName:Ctrl2 |vpiFullName:work@FSM3.FSM3.Ctrl2 |vpiActual: @@ -14178,8 +14120,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:59:12, endln:59:13 - |vpiParent: - \_assignment: , line:59:4, endln:59:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14187,7 +14127,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl3), line:59:4, endln:59:9 |vpiParent: - \_if_else: , line:58:2, endln:61:19 + \_assignment: , line:59:4, endln:59:13 |vpiName:Ctrl3 |vpiFullName:work@FSM3.FSM3.Ctrl3 |vpiActual: @@ -14201,7 +14141,7 @@ design: (work@top) |vpiRhs: \_operation: , line:61:12, endln:61:18 |vpiParent: - \_if_else: , line:58:2, endln:61:19 + \_assignment: , line:61:4, endln:61:18 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@FSM3.FSM3.Ctrl3), line:61:13, endln:61:18 @@ -14214,7 +14154,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@FSM3.FSM3.Ctrl3), line:61:4, endln:61:9 |vpiParent: - \_if_else: , line:58:2, endln:61:19 + \_assignment: , line:61:4, endln:61:18 |vpiName:Ctrl3 |vpiFullName:work@FSM3.FSM3.Ctrl3 |vpiActual: @@ -14432,8 +14372,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:30:13, endln:30:14 - |vpiParent: - \_assignment: , line:30:3, endln:30:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14441,7 +14379,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1clk), line:30:3, endln:30:10 |vpiParent: - \_begin: (work@top), line:29:9, endln:32:4 + \_assignment: , line:30:3, endln:30:14 |vpiName:fsm1clk |vpiFullName:work@top.fsm1clk |vpiActual: @@ -14464,7 +14402,7 @@ design: (work@top) |vpiRhs: \_operation: , line:31:25, endln:31:33 |vpiParent: - \_delay_control: , line:31:11, endln:31:14 + \_assignment: , line:31:15, endln:31:33 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.fsm1clk), line:31:26, endln:31:33 @@ -14477,7 +14415,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1clk), line:31:15, endln:31:22 |vpiParent: - \_delay_control: , line:31:11, endln:31:14 + \_assignment: , line:31:15, endln:31:33 |vpiName:fsm1clk |vpiFullName:work@top.fsm1clk |vpiActual: @@ -14499,8 +14437,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:37:7, endln:37:8 - |vpiParent: - \_assignment: , line:37:3, endln:37:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14508,7 +14444,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.a), line:37:3, endln:37:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:37:3, endln:37:8 |vpiName:a |vpiFullName:work@top.a |vpiActual: @@ -14521,8 +14457,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:38:7, endln:38:8 - |vpiParent: - \_assignment: , line:38:3, endln:38:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14530,7 +14464,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.b), line:38:3, endln:38:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:38:3, endln:38:8 |vpiName:b |vpiFullName:work@top.b |vpiActual: @@ -14543,8 +14477,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:39:7, endln:39:8 - |vpiParent: - \_assignment: , line:39:3, endln:39:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14552,7 +14484,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.c), line:39:3, endln:39:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:39:3, endln:39:8 |vpiName:c |vpiFullName:work@top.c |vpiActual: @@ -14565,8 +14497,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:40:7, endln:40:8 - |vpiParent: - \_assignment: , line:40:3, endln:40:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14574,7 +14504,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.m), line:40:3, endln:40:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:40:3, endln:40:8 |vpiName:m |vpiFullName:work@top.m |vpiActual: @@ -14587,8 +14517,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:41:7, endln:41:8 - |vpiParent: - \_assignment: , line:41:3, endln:41:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14596,7 +14524,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.n), line:41:3, endln:41:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:41:3, endln:41:8 |vpiName:n |vpiFullName:work@top.n |vpiActual: @@ -14609,8 +14537,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:42:7, endln:42:8 - |vpiParent: - \_assignment: , line:42:3, endln:42:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14618,7 +14544,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:42:3, endln:42:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:42:3, endln:42:8 |vpiName:o |vpiFullName:work@top.o |vpiActual: @@ -14631,8 +14557,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:43:7, endln:43:8 - |vpiParent: - \_assignment: , line:43:3, endln:43:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14640,7 +14564,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.p), line:43:3, endln:43:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:43:3, endln:43:8 |vpiName:p |vpiFullName:work@top.p |vpiActual: @@ -14653,8 +14577,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:44:7, endln:44:8 - |vpiParent: - \_assignment: , line:44:3, endln:44:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14662,7 +14584,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.q), line:44:3, endln:44:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:44:3, endln:44:8 |vpiName:q |vpiFullName:work@top.q |vpiActual: @@ -14675,8 +14597,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:45:7, endln:45:8 - |vpiParent: - \_assignment: , line:45:3, endln:45:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14684,7 +14604,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.r), line:45:3, endln:45:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:45:3, endln:45:8 |vpiName:r |vpiFullName:work@top.r |vpiActual: @@ -14697,8 +14617,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:46:7, endln:46:8 - |vpiParent: - \_assignment: , line:46:3, endln:46:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14706,7 +14624,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.s), line:46:3, endln:46:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:46:3, endln:46:8 |vpiName:s |vpiFullName:work@top.s |vpiActual: @@ -14719,8 +14637,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:47:7, endln:47:8 - |vpiParent: - \_assignment: , line:47:3, endln:47:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14728,7 +14644,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.t), line:47:3, endln:47:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:47:3, endln:47:8 |vpiName:t |vpiFullName:work@top.t |vpiActual: @@ -14741,8 +14657,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:48:7, endln:48:8 - |vpiParent: - \_assignment: , line:48:3, endln:48:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14750,7 +14664,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.u), line:48:3, endln:48:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:48:3, endln:48:8 |vpiName:u |vpiFullName:work@top.u |vpiActual: @@ -14763,8 +14677,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:49:7, endln:49:8 - |vpiParent: - \_assignment: , line:49:3, endln:49:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14772,7 +14684,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.v), line:49:3, endln:49:4 |vpiParent: - \_begin: (work@top), line:36:9, endln:69:4 + \_assignment: , line:49:3, endln:49:8 |vpiName:v |vpiFullName:work@top.v |vpiActual: @@ -14805,17 +14717,17 @@ design: (work@top) |vpiRhs: \_operation: , line:52:15, endln:52:24 |vpiParent: - \_delay_control: , line:52:7, endln:52:10 + \_assignment: , line:52:11, endln:52:24 |vpiOpType:29 |vpiOperand: \_operation: , line:52:15, endln:52:20 |vpiParent: - \_delay_control: , line:52:7, endln:52:10 + \_operation: , line:52:15, endln:52:24 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.m), line:52:15, endln:52:16 |vpiParent: - \_delay_control: , line:52:7, endln:52:10 + \_operation: , line:52:15, endln:52:20 |vpiName:m |vpiFullName:work@top.m |vpiActual: @@ -14839,7 +14751,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.a), line:52:11, endln:52:12 |vpiParent: - \_delay_control: , line:52:7, endln:52:10 + \_assignment: , line:52:11, endln:52:24 |vpiName:a |vpiFullName:work@top.a |vpiActual: @@ -14853,17 +14765,17 @@ design: (work@top) |vpiRhs: \_operation: , line:53:20, endln:53:29 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:53:7, endln:53:29 |vpiOpType:29 |vpiOperand: \_operation: , line:53:20, endln:53:25 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:53:20, endln:53:29 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.a), line:53:20, endln:53:21 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:53:20, endln:53:25 |vpiName:a |vpiFullName:work@top.a |vpiActual: @@ -14887,7 +14799,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.accelerate), line:53:7, endln:53:17 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:53:7, endln:53:29 |vpiName:accelerate |vpiFullName:work@top.accelerate |vpiActual: @@ -14906,17 +14818,17 @@ design: (work@top) |vpiRhs: \_operation: , line:54:15, endln:54:24 |vpiParent: - \_delay_control: , line:54:7, endln:54:10 + \_assignment: , line:54:11, endln:54:24 |vpiOpType:29 |vpiOperand: \_operation: , line:54:15, endln:54:20 |vpiParent: - \_delay_control: , line:54:7, endln:54:10 + \_operation: , line:54:15, endln:54:24 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.p), line:54:15, endln:54:16 |vpiParent: - \_delay_control: , line:54:7, endln:54:10 + \_operation: , line:54:15, endln:54:20 |vpiName:p |vpiFullName:work@top.p |vpiActual: @@ -14940,7 +14852,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.b), line:54:11, endln:54:12 |vpiParent: - \_delay_control: , line:54:7, endln:54:10 + \_assignment: , line:54:11, endln:54:24 |vpiName:b |vpiFullName:work@top.b |vpiActual: @@ -14954,17 +14866,17 @@ design: (work@top) |vpiRhs: \_operation: , line:55:20, endln:55:29 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:55:7, endln:55:29 |vpiOpType:29 |vpiOperand: \_operation: , line:55:20, endln:55:25 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:55:20, endln:55:29 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.a), line:55:20, endln:55:21 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:55:20, endln:55:25 |vpiName:a |vpiFullName:work@top.a |vpiActual: @@ -14988,7 +14900,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.accelerate), line:55:7, endln:55:17 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:55:7, endln:55:29 |vpiName:accelerate |vpiFullName:work@top.accelerate |vpiActual: @@ -15007,17 +14919,17 @@ design: (work@top) |vpiRhs: \_operation: , line:56:15, endln:56:24 |vpiParent: - \_delay_control: , line:56:7, endln:56:10 + \_assignment: , line:56:11, endln:56:24 |vpiOpType:29 |vpiOperand: \_operation: , line:56:15, endln:56:20 |vpiParent: - \_delay_control: , line:56:7, endln:56:10 + \_operation: , line:56:15, endln:56:24 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.t), line:56:15, endln:56:16 |vpiParent: - \_delay_control: , line:56:7, endln:56:10 + \_operation: , line:56:15, endln:56:20 |vpiName:t |vpiFullName:work@top.t |vpiActual: @@ -15041,7 +14953,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.c), line:56:11, endln:56:12 |vpiParent: - \_delay_control: , line:56:7, endln:56:10 + \_assignment: , line:56:11, endln:56:24 |vpiName:c |vpiFullName:work@top.c |vpiActual: @@ -15055,17 +14967,17 @@ design: (work@top) |vpiRhs: \_operation: , line:57:20, endln:57:29 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:57:7, endln:57:29 |vpiOpType:29 |vpiOperand: \_operation: , line:57:20, endln:57:25 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:57:20, endln:57:29 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@top.a), line:57:20, endln:57:21 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_operation: , line:57:20, endln:57:25 |vpiName:a |vpiFullName:work@top.a |vpiActual: @@ -15089,7 +15001,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.accelerate), line:57:7, endln:57:17 |vpiParent: - \_begin: (work@top), line:51:13, endln:58:8 + \_assignment: , line:57:7, endln:57:29 |vpiName:accelerate |vpiFullName:work@top.accelerate |vpiActual: @@ -15117,7 +15029,7 @@ design: (work@top) |vpiRhs: \_operation: , line:60:13, endln:60:15 |vpiParent: - \_delay_control: , line:60:6, endln:60:8 + \_assignment: , line:60:9, endln:60:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.p), line:60:14, endln:60:15 @@ -15130,7 +15042,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.p), line:60:9, endln:60:10 |vpiParent: - \_delay_control: , line:60:6, endln:60:8 + \_assignment: , line:60:9, endln:60:15 |vpiName:p |vpiFullName:work@top.p |vpiActual: @@ -15149,7 +15061,7 @@ design: (work@top) |vpiRhs: \_operation: , line:61:13, endln:61:15 |vpiParent: - \_delay_control: , line:61:6, endln:61:8 + \_assignment: , line:61:9, endln:61:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.q), line:61:14, endln:61:15 @@ -15162,7 +15074,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.q), line:61:9, endln:61:10 |vpiParent: - \_delay_control: , line:61:6, endln:61:8 + \_assignment: , line:61:9, endln:61:15 |vpiName:q |vpiFullName:work@top.q |vpiActual: @@ -15181,7 +15093,7 @@ design: (work@top) |vpiRhs: \_operation: , line:62:13, endln:62:15 |vpiParent: - \_delay_control: , line:62:6, endln:62:8 + \_assignment: , line:62:9, endln:62:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.r), line:62:14, endln:62:15 @@ -15194,7 +15106,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.r), line:62:9, endln:62:10 |vpiParent: - \_delay_control: , line:62:6, endln:62:8 + \_assignment: , line:62:9, endln:62:15 |vpiName:r |vpiFullName:work@top.r |vpiActual: @@ -15213,7 +15125,7 @@ design: (work@top) |vpiRhs: \_operation: , line:63:13, endln:63:15 |vpiParent: - \_delay_control: , line:63:6, endln:63:8 + \_assignment: , line:63:9, endln:63:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.s), line:63:14, endln:63:15 @@ -15226,7 +15138,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.s), line:63:9, endln:63:10 |vpiParent: - \_delay_control: , line:63:6, endln:63:8 + \_assignment: , line:63:9, endln:63:15 |vpiName:s |vpiFullName:work@top.s |vpiActual: @@ -15245,7 +15157,7 @@ design: (work@top) |vpiRhs: \_operation: , line:64:13, endln:64:15 |vpiParent: - \_delay_control: , line:64:6, endln:64:8 + \_assignment: , line:64:9, endln:64:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.t), line:64:14, endln:64:15 @@ -15258,7 +15170,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.t), line:64:9, endln:64:10 |vpiParent: - \_delay_control: , line:64:6, endln:64:8 + \_assignment: , line:64:9, endln:64:15 |vpiName:t |vpiFullName:work@top.t |vpiActual: @@ -15277,7 +15189,7 @@ design: (work@top) |vpiRhs: \_operation: , line:65:13, endln:65:15 |vpiParent: - \_delay_control: , line:65:6, endln:65:8 + \_assignment: , line:65:9, endln:65:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.u), line:65:14, endln:65:15 @@ -15290,7 +15202,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.u), line:65:9, endln:65:10 |vpiParent: - \_delay_control: , line:65:6, endln:65:8 + \_assignment: , line:65:9, endln:65:15 |vpiName:u |vpiFullName:work@top.u |vpiActual: @@ -15309,7 +15221,7 @@ design: (work@top) |vpiRhs: \_operation: , line:66:13, endln:66:15 |vpiParent: - \_delay_control: , line:66:6, endln:66:8 + \_assignment: , line:66:9, endln:66:15 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.v), line:66:14, endln:66:15 @@ -15322,7 +15234,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.v), line:66:9, endln:66:10 |vpiParent: - \_delay_control: , line:66:6, endln:66:8 + \_assignment: , line:66:9, endln:66:15 |vpiName:v |vpiFullName:work@top.v |vpiActual: @@ -15349,8 +15261,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:74:13, endln:74:14 - |vpiParent: - \_assignment: , line:74:3, endln:74:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15358,7 +15268,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2clk), line:74:3, endln:74:10 |vpiParent: - \_begin: (work@top), line:72:9, endln:76:4 + \_assignment: , line:74:3, endln:74:14 |vpiName:fsm2clk |vpiFullName:work@top.fsm2clk |vpiActual: @@ -15381,7 +15291,7 @@ design: (work@top) |vpiRhs: \_operation: , line:75:25, endln:75:33 |vpiParent: - \_delay_control: , line:75:11, endln:75:14 + \_assignment: , line:75:15, endln:75:33 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.fsm2clk), line:75:26, endln:75:33 @@ -15394,7 +15304,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2clk), line:75:15, endln:75:22 |vpiParent: - \_delay_control: , line:75:11, endln:75:14 + \_assignment: , line:75:15, endln:75:33 |vpiName:fsm2clk |vpiFullName:work@top.fsm2clk |vpiActual: @@ -15421,8 +15331,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:81:13, endln:81:14 - |vpiParent: - \_assignment: , line:81:3, endln:81:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15430,7 +15338,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm3clk), line:81:3, endln:81:10 |vpiParent: - \_begin: (work@top), line:79:9, endln:83:4 + \_assignment: , line:81:3, endln:81:14 |vpiName:fsm3clk |vpiFullName:work@top.fsm3clk |vpiActual: @@ -15453,7 +15361,7 @@ design: (work@top) |vpiRhs: \_operation: , line:82:25, endln:82:33 |vpiParent: - \_delay_control: , line:82:11, endln:82:14 + \_assignment: , line:82:15, endln:82:33 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.fsm3clk), line:82:26, endln:82:33 @@ -15466,7 +15374,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm3clk), line:82:15, endln:82:22 |vpiParent: - \_delay_control: , line:82:11, endln:82:14 + \_assignment: , line:82:15, endln:82:33 |vpiName:fsm3clk |vpiFullName:work@top.fsm3clk |vpiActual: @@ -15488,8 +15396,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:87:13, endln:87:14 - |vpiParent: - \_assignment: , line:87:3, endln:87:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15497,7 +15403,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.SlowRam), line:87:3, endln:87:10 |vpiParent: - \_begin: (work@top), line:86:9, endln:89:4 + \_assignment: , line:87:3, endln:87:14 |vpiName:SlowRam |vpiFullName:work@top.SlowRam |vpiActual: @@ -15520,7 +15426,7 @@ design: (work@top) |vpiRhs: \_operation: , line:88:26, endln:88:34 |vpiParent: - \_delay_control: , line:88:11, endln:88:15 + \_assignment: , line:88:16, endln:88:34 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.SlowRam), line:88:27, endln:88:34 @@ -15533,7 +15439,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.SlowRam), line:88:16, endln:88:23 |vpiParent: - \_delay_control: , line:88:11, endln:88:15 + \_assignment: , line:88:16, endln:88:34 |vpiName:SlowRam |vpiFullName:work@top.SlowRam |vpiActual: @@ -15555,8 +15461,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:93:13, endln:93:14 - |vpiParent: - \_assignment: , line:93:3, endln:93:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15564,7 +15468,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1rst), line:93:3, endln:93:10 |vpiParent: - \_begin: (work@top), line:92:9, endln:97:4 + \_assignment: , line:93:3, endln:93:14 |vpiName:fsm1rst |vpiFullName:work@top.fsm1rst |vpiActual: @@ -15582,8 +15486,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:94:17, endln:94:18 - |vpiParent: - \_assignment: , line:94:7, endln:94:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -15591,7 +15493,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1rst), line:94:7, endln:94:14 |vpiParent: - \_delay_control: , line:94:3, endln:94:6 + \_assignment: , line:94:7, endln:94:18 |vpiName:fsm1rst |vpiFullName:work@top.fsm1rst |vpiActual: @@ -15609,8 +15511,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:95:17, endln:95:18 - |vpiParent: - \_assignment: , line:95:7, endln:95:18 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15618,7 +15518,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1rst), line:95:7, endln:95:14 |vpiParent: - \_delay_control: , line:95:3, endln:95:6 + \_assignment: , line:95:7, endln:95:18 |vpiName:fsm1rst |vpiFullName:work@top.fsm1rst |vpiActual: @@ -15641,7 +15541,7 @@ design: (work@top) |vpiRhs: \_operation: , line:96:26, endln:96:34 |vpiParent: - \_delay_control: , line:96:11, endln:96:15 + \_assignment: , line:96:16, endln:96:34 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.fsm1rst), line:96:27, endln:96:34 @@ -15654,7 +15554,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm1rst), line:96:16, endln:96:23 |vpiParent: - \_delay_control: , line:96:11, endln:96:15 + \_assignment: , line:96:16, endln:96:34 |vpiName:fsm1rst |vpiFullName:work@top.fsm1rst |vpiActual: @@ -15681,8 +15581,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:102:13, endln:102:14 - |vpiParent: - \_assignment: , line:102:3, endln:102:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15690,7 +15588,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2rst), line:102:3, endln:102:10 |vpiParent: - \_begin: (work@top), line:100:9, endln:106:4 + \_assignment: , line:102:3, endln:102:14 |vpiName:fsm2rst |vpiFullName:work@top.fsm2rst |vpiActual: @@ -15708,8 +15606,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:103:17, endln:103:18 - |vpiParent: - \_assignment: , line:103:7, endln:103:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -15717,7 +15613,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2rst), line:103:7, endln:103:14 |vpiParent: - \_delay_control: , line:103:3, endln:103:6 + \_assignment: , line:103:7, endln:103:18 |vpiName:fsm2rst |vpiFullName:work@top.fsm2rst |vpiActual: @@ -15735,8 +15631,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:104:17, endln:104:18 - |vpiParent: - \_assignment: , line:104:7, endln:104:18 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15744,7 +15638,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2rst), line:104:7, endln:104:14 |vpiParent: - \_delay_control: , line:104:3, endln:104:6 + \_assignment: , line:104:7, endln:104:18 |vpiName:fsm2rst |vpiFullName:work@top.fsm2rst |vpiActual: @@ -15767,7 +15661,7 @@ design: (work@top) |vpiRhs: \_operation: , line:105:26, endln:105:34 |vpiParent: - \_delay_control: , line:105:11, endln:105:15 + \_assignment: , line:105:16, endln:105:34 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.fsm2rst), line:105:27, endln:105:34 @@ -15780,7 +15674,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.fsm2rst), line:105:16, endln:105:23 |vpiParent: - \_delay_control: , line:105:11, endln:105:15 + \_assignment: , line:105:16, endln:105:34 |vpiName:fsm2rst |vpiFullName:work@top.fsm2rst |vpiActual: @@ -15802,8 +15696,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:110:10, endln:110:11 - |vpiParent: - \_assignment: , line:110:3, endln:110:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15811,7 +15703,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.ctrl), line:110:3, endln:110:7 |vpiParent: - \_begin: (work@top), line:109:9, endln:113:4 + \_assignment: , line:110:3, endln:110:11 |vpiName:ctrl |vpiFullName:work@top.ctrl |vpiActual: @@ -15839,7 +15731,7 @@ design: (work@top) |vpiRhs: \_operation: , line:112:23, endln:112:28 |vpiParent: - \_delay_control: , line:112:11, endln:112:15 + \_assignment: , line:112:16, endln:112:28 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.ctrl), line:112:24, endln:112:28 @@ -15852,7 +15744,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.ctrl), line:112:16, endln:112:20 |vpiParent: - \_delay_control: , line:112:11, endln:112:15 + \_assignment: , line:112:16, endln:112:28 |vpiName:ctrl |vpiFullName:work@top.ctrl |vpiActual: @@ -15889,10 +15781,11 @@ design: (work@top) \_hier_path: (top.F2), line:121:17, endln:121:23 |vpiName:top |vpiActual: - \_ref_obj: (F2), line:121:21, endln:121:23 + \_ref_obj: (work@top.F2), line:121:21, endln:121:23 |vpiParent: \_hier_path: (top.F2), line:121:17, endln:121:23 |vpiName:F2 + |vpiFullName:work@top.F2 |vpiName:$vtDumpvars |vpiStmt: \_delay_control: , line:126:3, endln:126:11 @@ -15921,8 +15814,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:132:10, endln:132:11 - |vpiParent: - \_assignment: , line:132:3, endln:132:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15930,7 +15821,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.keys), line:132:3, endln:132:7 |vpiParent: - \_begin: (work@top), line:131:9, endln:142:4 + \_assignment: , line:132:3, endln:132:11 |vpiName:keys |vpiFullName:work@top.keys |vpiActual: @@ -15943,8 +15834,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:133:11, endln:133:12 - |vpiParent: - \_assignment: , line:133:3, endln:133:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15952,7 +15841,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.brake), line:133:3, endln:133:8 |vpiParent: - \_begin: (work@top), line:131:9, endln:142:4 + \_assignment: , line:133:3, endln:133:12 |vpiName:brake |vpiFullName:work@top.brake |vpiActual: @@ -15979,8 +15868,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:136:16, endln:136:17 - |vpiParent: - \_assignment: , line:136:9, endln:136:17 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -15988,7 +15875,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.keys), line:136:9, endln:136:13 |vpiParent: - \_delay_control: , line:136:5, endln:136:8 + \_assignment: , line:136:9, endln:136:17 |vpiName:keys |vpiFullName:work@top.keys |vpiActual: @@ -16006,8 +15893,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:137:18, endln:137:19 - |vpiParent: - \_assignment: , line:137:10, endln:137:19 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -16015,7 +15900,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.brake), line:137:10, endln:137:15 |vpiParent: - \_delay_control: , line:137:5, endln:137:9 + \_assignment: , line:137:10, endln:137:19 |vpiName:brake |vpiFullName:work@top.brake |vpiActual: @@ -16033,8 +15918,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:138:18, endln:138:19 - |vpiParent: - \_assignment: , line:138:10, endln:138:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -16042,7 +15925,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.brake), line:138:10, endln:138:15 |vpiParent: - \_delay_control: , line:138:5, endln:138:9 + \_assignment: , line:138:10, endln:138:19 |vpiName:brake |vpiFullName:work@top.brake |vpiActual: @@ -16060,8 +15943,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:139:17, endln:139:18 - |vpiParent: - \_assignment: , line:139:10, endln:139:18 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -16069,7 +15950,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.keys), line:139:10, endln:139:14 |vpiParent: - \_delay_control: , line:139:5, endln:139:9 + \_assignment: , line:139:10, endln:139:18 |vpiName:keys |vpiFullName:work@top.keys |vpiActual: @@ -17821,10 +17702,11 @@ design: (work@top) |vpiActual: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/FSMBsp13/top.v, line:1:1, endln:146:10 |vpiActual: - \_ref_obj: (F2), line:121:21, endln:121:23 + \_ref_obj: (work@top.F2), line:121:21, endln:121:23 |vpiParent: \_hier_path: (top.F2), line:121:17, endln:121:23 |vpiName:F2 + |vpiFullName:work@top.F2 |vpiActual: \_module_inst: work@FSM2 (work@top.F2), file:${SURELOG_DIR}/tests/FSMBsp13/top.v, line:17:1, endln:20:22 |vpiName:$vtDumpvars diff --git a/tests/FSMFunction/FSMFunction.log b/tests/FSMFunction/FSMFunction.log index eda031eca0..0651f321ed 100644 --- a/tests/FSMFunction/FSMFunction.log +++ b/tests/FSMFunction/FSMFunction.log @@ -1876,7 +1876,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.SIZE), line:32:11, endln:32:15 |vpiParent: - \_function: (work@fsm_using_function.fsm_function), line:31:1, endln:55:12 + \_operation: , line:32:11, endln:32:17 |vpiName:SIZE |vpiFullName:work@fsm_using_function.fsm_function.SIZE |vpiActual: @@ -1944,7 +1944,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_0), line:36:15, endln:36:20 |vpiParent: - \_case_item: , line:36:4, endln:42:18 + \_operation: , line:36:15, endln:36:28 |vpiName:req_0 |vpiFullName:work@fsm_using_function.fsm_function.req_0 |vpiActual: @@ -1971,13 +1971,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT0), line:37:32, endln:37:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:36:30, endln:38:18 + \_assignment: , line:37:17, endln:37:36 |vpiName:GNT0 |vpiFullName:work@fsm_using_function.fsm_function.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:37:17, endln:37:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:36:30, endln:38:18 + \_assignment: , line:37:17, endln:37:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -1994,7 +1994,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_1), line:38:28, endln:38:33 |vpiParent: - \_if_else: , line:36:11, endln:42:18 + \_operation: , line:38:28, endln:38:41 |vpiName:req_1 |vpiFullName:work@fsm_using_function.fsm_function.req_1 |vpiActual: @@ -2021,13 +2021,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT1), line:39:31, endln:39:35 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:38:43, endln:40:18 + \_assignment: , line:39:17, endln:39:35 |vpiName:GNT1 |vpiFullName:work@fsm_using_function.fsm_function.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:39:17, endln:39:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:38:43, endln:40:18 + \_assignment: , line:39:17, endln:39:35 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2046,13 +2046,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:41:32, endln:41:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:40:24, endln:42:18 + \_assignment: , line:41:17, endln:41:36 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:41:17, endln:41:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:40:24, endln:42:18 + \_assignment: , line:41:17, endln:41:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2079,7 +2079,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_0), line:43:15, endln:43:20 |vpiParent: - \_case_item: , line:43:4, endln:47:18 + \_operation: , line:43:15, endln:43:28 |vpiName:req_0 |vpiFullName:work@fsm_using_function.fsm_function.req_0 |vpiActual: @@ -2106,13 +2106,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT0), line:44:32, endln:44:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:43:30, endln:45:18 + \_assignment: , line:44:17, endln:44:36 |vpiName:GNT0 |vpiFullName:work@fsm_using_function.fsm_function.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:44:17, endln:44:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:43:30, endln:45:18 + \_assignment: , line:44:17, endln:44:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2131,13 +2131,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:46:32, endln:46:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:45:24, endln:47:18 + \_assignment: , line:46:17, endln:46:36 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:46:17, endln:46:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:45:24, endln:47:18 + \_assignment: , line:46:17, endln:46:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2164,7 +2164,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_1), line:48:15, endln:48:20 |vpiParent: - \_case_item: , line:48:4, endln:52:18 + \_operation: , line:48:15, endln:48:28 |vpiName:req_1 |vpiFullName:work@fsm_using_function.fsm_function.req_1 |vpiActual: @@ -2191,13 +2191,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT1), line:49:32, endln:49:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:48:30, endln:50:14 + \_assignment: , line:49:17, endln:49:36 |vpiName:GNT1 |vpiFullName:work@fsm_using_function.fsm_function.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:49:17, endln:49:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:48:30, endln:50:14 + \_assignment: , line:49:17, endln:49:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2216,13 +2216,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:51:32, endln:51:36 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:50:20, endln:52:18 + \_assignment: , line:51:17, endln:51:36 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:51:17, endln:51:29 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:50:20, endln:52:18 + \_assignment: , line:51:17, endln:51:36 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2240,13 +2240,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:53:29, endln:53:33 |vpiParent: - \_case_item: , line:53:4, endln:53:34 + \_assignment: , line:53:14, endln:53:33 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.fsm_function), line:53:14, endln:53:26 |vpiParent: - \_case_item: , line:53:4, endln:53:34 + \_assignment: , line:53:14, endln:53:33 |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: @@ -2420,7 +2420,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.FSM_SEQ.reset), line:59:7, endln:59:12 |vpiParent: - \_named_begin: (work@fsm_using_function.FSM_SEQ), line:58:1, endln:64:4 + \_operation: , line:59:7, endln:59:20 |vpiName:reset |vpiFullName:work@fsm_using_function.FSM_SEQ.reset |vpiActual: @@ -2446,13 +2446,13 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.IDLE), line:60:17, endln:60:21 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:59:22, endln:61:6 + \_assignment: , line:60:5, endln:60:21 |vpiName:IDLE |vpiFullName:work@fsm_using_function.FSM_SEQ.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.state), line:60:5, endln:60:10 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:59:22, endln:61:6 + \_assignment: , line:60:5, endln:60:21 |vpiName:state |vpiFullName:work@fsm_using_function.FSM_SEQ.state |vpiActual: @@ -2475,7 +2475,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.next_state), line:62:17, endln:62:27 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:61:12, endln:63:6 + \_assignment: , line:62:5, endln:62:27 |vpiName:next_state |vpiFullName:work@fsm_using_function.FSM_SEQ.next_state |vpiActual: @@ -2483,7 +2483,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.state), line:62:5, endln:62:10 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:61:12, endln:63:6 + \_assignment: , line:62:5, endln:62:27 |vpiName:state |vpiFullName:work@fsm_using_function.FSM_SEQ.state |vpiActual: @@ -2533,7 +2533,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.reset), line:68:5, endln:68:10 |vpiParent: - \_named_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:67:1, endln:92:4 + \_operation: , line:68:5, endln:68:18 |vpiName:reset |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.reset |vpiActual: @@ -2558,8 +2558,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:69:15, endln:69:19 - |vpiParent: - \_assignment: , line:69:3, endln:69:19 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2567,7 +2565,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_0), line:69:3, endln:69:8 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:68:20, endln:71:4 + \_assignment: , line:69:3, endln:69:19 |vpiName:gnt_0 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2584,8 +2582,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:70:15, endln:70:19 - |vpiParent: - \_assignment: , line:70:3, endln:70:19 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2593,7 +2589,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_1), line:70:3, endln:70:8 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:68:20, endln:71:4 + \_assignment: , line:70:3, endln:70:19 |vpiName:gnt_1 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2643,8 +2639,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:75:31, endln:75:35 - |vpiParent: - \_assignment: , line:75:19, endln:75:35 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2652,7 +2646,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_0), line:75:19, endln:75:24 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:74:12, endln:77:19 + \_assignment: , line:75:19, endln:75:35 |vpiName:gnt_0 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2669,8 +2663,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:76:31, endln:76:35 - |vpiParent: - \_assignment: , line:76:19, endln:76:35 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2678,7 +2670,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_1), line:76:19, endln:76:24 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:74:12, endln:77:19 + \_assignment: , line:76:19, endln:76:35 |vpiName:gnt_1 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2710,8 +2702,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:79:32, endln:79:36 - |vpiParent: - \_assignment: , line:79:20, endln:79:36 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -2719,7 +2709,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_0), line:79:20, endln:79:25 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:78:11, endln:81:20 + \_assignment: , line:79:20, endln:79:36 |vpiName:gnt_0 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2736,8 +2726,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:80:32, endln:80:36 - |vpiParent: - \_assignment: , line:80:20, endln:80:36 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2745,7 +2733,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_1), line:80:20, endln:80:25 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:78:11, endln:81:20 + \_assignment: , line:80:20, endln:80:36 |vpiName:gnt_1 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2777,8 +2765,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:83:32, endln:83:36 - |vpiParent: - \_assignment: , line:83:20, endln:83:36 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2786,7 +2772,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_0), line:83:20, endln:83:25 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:82:11, endln:85:20 + \_assignment: , line:83:20, endln:83:36 |vpiName:gnt_0 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2803,8 +2789,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:84:32, endln:84:36 - |vpiParent: - \_assignment: , line:84:20, endln:84:36 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -2812,7 +2796,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_1), line:84:20, endln:84:25 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:82:11, endln:85:20 + \_assignment: , line:84:20, endln:84:36 |vpiName:gnt_1 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -2838,8 +2822,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:87:33, endln:87:37 - |vpiParent: - \_assignment: , line:87:21, endln:87:37 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2847,7 +2829,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_0), line:87:21, endln:87:26 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:86:14, endln:89:22 + \_assignment: , line:87:21, endln:87:37 |vpiName:gnt_0 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_0 |vpiActual: @@ -2864,8 +2846,6 @@ design: (work@fsm_using_function) |vpiOpType:82 |vpiRhs: \_constant: , line:88:33, endln:88:37 - |vpiParent: - \_assignment: , line:88:21, endln:88:37 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -2873,7 +2853,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.OUTPUT_LOGIC.gnt_1), line:88:21, endln:88:26 |vpiParent: - \_begin: (work@fsm_using_function.OUTPUT_LOGIC), line:86:14, endln:89:22 + \_assignment: , line:88:21, endln:88:37 |vpiName:gnt_1 |vpiFullName:work@fsm_using_function.OUTPUT_LOGIC.gnt_1 |vpiActual: @@ -3175,7 +3155,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiElseStmt: \_if_else: , line:38:24, endln:42:18 |vpiParent: @@ -3221,7 +3201,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiElseStmt: \_begin: (work@fsm_using_function.fsm_function), line:40:24, endln:42:18 |vpiParent: @@ -3248,7 +3228,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiCaseItem: \_case_item: , line:43:4, endln:47:18 |vpiParent: @@ -3306,7 +3286,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiElseStmt: \_begin: (work@fsm_using_function.fsm_function), line:45:24, endln:47:18 |vpiParent: @@ -3333,7 +3313,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiCaseItem: \_case_item: , line:48:4, endln:52:18 |vpiParent: @@ -3391,7 +3371,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiElseStmt: \_begin: (work@fsm_using_function.fsm_function), line:50:20, endln:52:18 |vpiParent: @@ -3418,7 +3398,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiCaseItem: \_case_item: , line:53:4, endln:53:34 |vpiParent: @@ -3444,7 +3424,7 @@ design: (work@fsm_using_function) |vpiName:fsm_function |vpiFullName:work@fsm_using_function.fsm_function.fsm_function |vpiActual: - \_logic_var: , line:31:10, endln:31:20 + \_logic_var: (fsm_function), line:31:10, endln:31:20 |vpiInstance: \_module_inst: work@fsm_using_function (work@fsm_using_function), file:${SURELOG_DIR}/tests/FSMFunction/top.sv, line:6:1, endln:94:10 |vpiNet: diff --git a/tests/FSMSingleAlways/FSMSingleAlways.log b/tests/FSMSingleAlways/FSMSingleAlways.log index 863a6e6e2c..8c87be628b 100644 --- a/tests/FSMSingleAlways/FSMSingleAlways.log +++ b/tests/FSMSingleAlways/FSMSingleAlways.log @@ -1696,7 +1696,7 @@ design: (work@fsm_using_single_always) |vpiOperand: \_ref_obj: (work@fsm_using_single_always.FSM.reset), line:32:5, endln:32:10 |vpiParent: - \_named_begin: (work@fsm_using_single_always.FSM), line:31:1, endln:61:4 + \_operation: , line:32:5, endln:32:18 |vpiName:reset |vpiFullName:work@fsm_using_single_always.FSM.reset |vpiActual: @@ -1722,13 +1722,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.IDLE), line:33:15, endln:33:19 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:32:20, endln:36:4 + \_assignment: , line:33:3, endln:33:19 |vpiName:IDLE |vpiFullName:work@fsm_using_single_always.FSM.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:33:3, endln:33:8 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:32:20, endln:36:4 + \_assignment: , line:33:3, endln:33:19 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -1745,8 +1745,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:34:12, endln:34:13 - |vpiParent: - \_assignment: , line:34:3, endln:34:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1754,7 +1752,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_0), line:34:3, endln:34:8 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:32:20, endln:36:4 + \_assignment: , line:34:3, endln:34:13 |vpiName:gnt_0 |vpiFullName:work@fsm_using_single_always.FSM.gnt_0 |vpiActual: @@ -1766,8 +1764,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:35:12, endln:35:13 - |vpiParent: - \_assignment: , line:35:3, endln:35:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1775,7 +1771,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_1), line:35:3, endln:35:8 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:32:20, endln:36:4 + \_assignment: , line:35:3, endln:35:13 |vpiName:gnt_1 |vpiFullName:work@fsm_using_single_always.FSM.gnt_1 |vpiActual: @@ -1815,7 +1811,7 @@ design: (work@fsm_using_single_always) |vpiOperand: \_ref_obj: (work@fsm_using_single_always.FSM.req_0), line:38:15, endln:38:20 |vpiParent: - \_case_item: , line:38:4, endln:46:18 + \_operation: , line:38:15, endln:38:28 |vpiName:req_0 |vpiFullName:work@fsm_using_single_always.FSM.req_0 |vpiActual: @@ -1841,13 +1837,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.GNT0), line:39:29, endln:39:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:38:30, endln:41:18 + \_assignment: , line:39:17, endln:39:33 |vpiName:GNT0 |vpiFullName:work@fsm_using_single_always.FSM.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:39:17, endln:39:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:38:30, endln:41:18 + \_assignment: , line:39:17, endln:39:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -1864,8 +1860,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:40:26, endln:40:27 - |vpiParent: - \_assignment: , line:40:17, endln:40:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1873,7 +1867,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_0), line:40:17, endln:40:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:38:30, endln:41:18 + \_assignment: , line:40:17, endln:40:27 |vpiName:gnt_0 |vpiFullName:work@fsm_using_single_always.FSM.gnt_0 |vpiActual: @@ -1890,7 +1884,7 @@ design: (work@fsm_using_single_always) |vpiOperand: \_ref_obj: (work@fsm_using_single_always.FSM.req_1), line:41:28, endln:41:33 |vpiParent: - \_if_else: , line:38:11, endln:46:18 + \_operation: , line:41:28, endln:41:41 |vpiName:req_1 |vpiFullName:work@fsm_using_single_always.FSM.req_1 |vpiActual: @@ -1915,8 +1909,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:42:26, endln:42:27 - |vpiParent: - \_assignment: , line:42:17, endln:42:27 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1924,7 +1916,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_1), line:42:17, endln:42:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:41:43, endln:44:18 + \_assignment: , line:42:17, endln:42:27 |vpiName:gnt_1 |vpiFullName:work@fsm_using_single_always.FSM.gnt_1 |vpiActual: @@ -1937,13 +1929,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.GNT1), line:43:29, endln:43:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:41:43, endln:44:18 + \_assignment: , line:43:17, endln:43:33 |vpiName:GNT1 |vpiFullName:work@fsm_using_single_always.FSM.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:43:17, endln:43:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:41:43, endln:44:18 + \_assignment: , line:43:17, endln:43:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -1966,13 +1958,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.IDLE), line:45:29, endln:45:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:44:24, endln:46:18 + \_assignment: , line:45:17, endln:45:33 |vpiName:IDLE |vpiFullName:work@fsm_using_single_always.FSM.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:45:17, endln:45:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:44:24, endln:46:18 + \_assignment: , line:45:17, endln:45:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -2004,7 +1996,7 @@ design: (work@fsm_using_single_always) |vpiOperand: \_ref_obj: (work@fsm_using_single_always.FSM.req_0), line:47:15, endln:47:20 |vpiParent: - \_case_item: , line:47:4, endln:52:18 + \_operation: , line:47:15, endln:47:28 |vpiName:req_0 |vpiFullName:work@fsm_using_single_always.FSM.req_0 |vpiActual: @@ -2030,13 +2022,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.GNT0), line:48:29, endln:48:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:47:30, endln:49:18 + \_assignment: , line:48:17, endln:48:33 |vpiName:GNT0 |vpiFullName:work@fsm_using_single_always.FSM.GNT0 |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:48:17, endln:48:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:47:30, endln:49:18 + \_assignment: , line:48:17, endln:48:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -2058,8 +2050,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:50:26, endln:50:27 - |vpiParent: - \_assignment: , line:50:17, endln:50:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2067,7 +2057,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_0), line:50:17, endln:50:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:49:24, endln:52:18 + \_assignment: , line:50:17, endln:50:27 |vpiName:gnt_0 |vpiFullName:work@fsm_using_single_always.FSM.gnt_0 |vpiActual: @@ -2080,13 +2070,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.IDLE), line:51:29, endln:51:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:49:24, endln:52:18 + \_assignment: , line:51:17, endln:51:33 |vpiName:IDLE |vpiFullName:work@fsm_using_single_always.FSM.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:51:17, endln:51:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:49:24, endln:52:18 + \_assignment: , line:51:17, endln:51:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -2118,7 +2108,7 @@ design: (work@fsm_using_single_always) |vpiOperand: \_ref_obj: (work@fsm_using_single_always.FSM.req_1), line:53:15, endln:53:20 |vpiParent: - \_case_item: , line:53:4, endln:58:18 + \_operation: , line:53:15, endln:53:28 |vpiName:req_1 |vpiFullName:work@fsm_using_single_always.FSM.req_1 |vpiActual: @@ -2144,13 +2134,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.GNT1), line:54:29, endln:54:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:53:30, endln:55:18 + \_assignment: , line:54:17, endln:54:33 |vpiName:GNT1 |vpiFullName:work@fsm_using_single_always.FSM.GNT1 |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:54:17, endln:54:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:53:30, endln:55:18 + \_assignment: , line:54:17, endln:54:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -2172,8 +2162,6 @@ design: (work@fsm_using_single_always) |vpiOpType:82 |vpiRhs: \_constant: , line:56:26, endln:56:27 - |vpiParent: - \_assignment: , line:56:17, endln:56:27 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2181,7 +2169,7 @@ design: (work@fsm_using_single_always) |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.gnt_1), line:56:17, endln:56:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:55:24, endln:58:18 + \_assignment: , line:56:17, endln:56:27 |vpiName:gnt_1 |vpiFullName:work@fsm_using_single_always.FSM.gnt_1 |vpiActual: @@ -2194,13 +2182,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.IDLE), line:57:29, endln:57:33 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:55:24, endln:58:18 + \_assignment: , line:57:17, endln:57:33 |vpiName:IDLE |vpiFullName:work@fsm_using_single_always.FSM.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:57:17, endln:57:22 |vpiParent: - \_begin: (work@fsm_using_single_always.FSM), line:55:24, endln:58:18 + \_assignment: , line:57:17, endln:57:33 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: @@ -2222,13 +2210,13 @@ design: (work@fsm_using_single_always) |vpiRhs: \_ref_obj: (work@fsm_using_single_always.FSM.IDLE), line:59:26, endln:59:30 |vpiParent: - \_case_item: , line:59:4, endln:59:31 + \_assignment: , line:59:14, endln:59:30 |vpiName:IDLE |vpiFullName:work@fsm_using_single_always.FSM.IDLE |vpiLhs: \_ref_obj: (work@fsm_using_single_always.FSM.state), line:59:14, endln:59:19 |vpiParent: - \_case_item: , line:59:4, endln:59:31 + \_assignment: , line:59:14, endln:59:30 |vpiName:state |vpiFullName:work@fsm_using_single_always.FSM.state |vpiActual: diff --git a/tests/FileList/FileList.log b/tests/FileList/FileList.log index 989a8638c4..9c1bb96e81 100644 --- a/tests/FileList/FileList.log +++ b/tests/FileList/FileList.log @@ -244,7 +244,7 @@ param_assign 4 parameter 4 port 4 range 2 -ref_obj 17 +ref_obj 16 return_stmt 2 sys_func_call 2 === UHDM Object Stats End === @@ -275,7 +275,7 @@ param_assign 4 parameter 4 port 6 range 2 -ref_obj 30 +ref_obj 28 return_stmt 5 sys_func_call 5 === UHDM Object Stats End === @@ -502,12 +502,12 @@ design: (work@foo) |vpiOperand: \_operation: , line:4:13, endln:4:23 |vpiParent: - \_function: (prim_util_pkg::vbits), line:3:2, endln:5:14 + \_operation: , line:4:12, endln:4:44 |vpiOpType:14 |vpiOperand: \_ref_obj: (prim_util_pkg::vbits::value), line:4:13, endln:4:18 |vpiParent: - \_function: (prim_util_pkg::vbits), line:3:2, endln:5:14 + \_operation: , line:4:13, endln:4:23 |vpiName:value |vpiFullName:prim_util_pkg::vbits::value |vpiActual: @@ -608,12 +608,12 @@ design: (work@foo) |vpiRhs: \_operation: , line:8:10, endln:8:18 |vpiParent: - \_begin: (work@foo), line:7:23, endln:9:4 + \_assignment: , line:8:5, endln:8:18 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@foo.a), line:8:10, endln:8:11 |vpiParent: - \_begin: (work@foo), line:7:23, endln:9:4 + \_operation: , line:8:10, endln:8:18 |vpiName:a |vpiFullName:work@foo.a |vpiActual: @@ -629,7 +629,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.a), line:8:5, endln:8:6 |vpiParent: - \_begin: (work@foo), line:7:23, endln:9:4 + \_assignment: , line:8:5, endln:8:18 |vpiName:a |vpiFullName:work@foo.a |vpiActual: @@ -642,11 +642,7 @@ design: (work@foo) |vpiRhs: \_bit_select: (work@foo.a), line:10:14, endln:10:18 |vpiParent: - \_ref_obj: (work@foo.a) - |vpiParent: - \_cont_assign: , line:10:8, endln:10:18 - |vpiName:a - |vpiFullName:work@foo.a + \_cont_assign: , line:10:8, endln:10:18 |vpiName:a |vpiFullName:work@foo.a |vpiIndex: @@ -891,19 +887,13 @@ design: (work@foo) |vpiRhs: \_bit_select: (work@foo.a), line:10:14, endln:10:18 |vpiParent: - \_ref_obj: (work@foo.a) - |vpiParent: - \_cont_assign: , line:10:8, endln:10:18 - |vpiName:a - |vpiFullName:work@foo.a - |vpiActual: - \_logic_var: (work@foo.a), line:6:22, endln:6:23 + \_cont_assign: , line:10:8, endln:10:18 |vpiName:a |vpiFullName:work@foo.a - |vpiIndex: - \_constant: , line:10:16, endln:10:17 |vpiActual: \_logic_var: (work@foo.a), line:6:22, endln:6:23 + |vpiIndex: + \_constant: , line:10:16, endln:10:17 |vpiLhs: \_ref_obj: (work@foo.out), line:10:8, endln:10:11 |vpiParent: diff --git a/tests/ForElab/ForElab.log b/tests/ForElab/ForElab.log index 00c2ace59e..6b11b9991e 100644 --- a/tests/ForElab/ForElab.log +++ b/tests/ForElab/ForElab.log @@ -100,7 +100,7 @@ port 17 prim_term 18 range 4 ref_module 2 -ref_obj 33 +ref_obj 32 string_typespec 6 sys_func_call 2 === UHDM Object Stats End === @@ -321,10 +321,7 @@ design: (work@tlul_socket_m1) |vpiRhs: \_bit_select: (req_i), line:30:23, endln:30:31 |vpiParent: - \_ref_obj: (req_i) - |vpiParent: - \_cont_assign: , line:30:12, endln:30:31 - |vpiName:req_i + \_cont_assign: , line:30:12, endln:30:31 |vpiName:req_i |vpiIndex: \_constant: , line:30:29, endln:30:30 diff --git a/tests/ForLoop/ForLoop.log b/tests/ForLoop/ForLoop.log index b0747369ea..8a8827f51c 100644 --- a/tests/ForLoop/ForLoop.log +++ b/tests/ForLoop/ForLoop.log @@ -1636,12 +1636,12 @@ design: (work@t) |vpiRhs: \_operation: , line:7:17, endln:7:20 |vpiParent: - \_for_stmt: (work@t), line:7:6, endln:7:9 + \_assignment: , line:7:15, endln:7:20 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:7:17, endln:7:18 |vpiParent: - \_for_stmt: (work@t), line:7:6, endln:7:9 + \_operation: , line:7:17, endln:7:20 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1657,7 +1657,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:7:15, endln:7:16 |vpiParent: - \_for_stmt: (work@t), line:7:6, endln:7:9 + \_assignment: , line:7:15, endln:7:20 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1676,12 +1676,12 @@ design: (work@t) |vpiRhs: \_operation: , line:8:17, endln:8:20 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_assignment: , line:8:15, endln:8:20 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:8:17, endln:8:18 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_operation: , line:8:17, endln:8:20 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1697,7 +1697,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:8:15, endln:8:16 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_assignment: , line:8:15, endln:8:20 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1711,12 +1711,12 @@ design: (work@t) |vpiRhs: \_operation: , line:8:24, endln:8:27 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_assignment: , line:8:22, endln:8:27 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:8:24, endln:8:25 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_operation: , line:8:24, endln:8:27 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -1732,7 +1732,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:8:22, endln:8:23 |vpiParent: - \_for_stmt: (work@t), line:8:6, endln:8:9 + \_assignment: , line:8:22, endln:8:27 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -1777,12 +1777,12 @@ design: (work@t) |vpiRhs: \_operation: , line:10:20, endln:10:23 |vpiParent: - \_for_stmt: (work@t), line:10:6, endln:10:9 + \_assignment: , line:10:18, endln:10:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:10:20, endln:10:21 |vpiParent: - \_for_stmt: (work@t), line:10:6, endln:10:9 + \_operation: , line:10:20, endln:10:23 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1798,7 +1798,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:10:18, endln:10:19 |vpiParent: - \_for_stmt: (work@t), line:10:6, endln:10:9 + \_assignment: , line:10:18, endln:10:23 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1838,12 +1838,12 @@ design: (work@t) |vpiRhs: \_operation: , line:11:20, endln:11:23 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_assignment: , line:11:18, endln:11:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:11:20, endln:11:21 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_operation: , line:11:20, endln:11:23 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1859,7 +1859,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:11:18, endln:11:19 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_assignment: , line:11:18, endln:11:23 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -1873,12 +1873,12 @@ design: (work@t) |vpiRhs: \_operation: , line:11:27, endln:11:30 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_assignment: , line:11:25, endln:11:30 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:11:27, endln:11:28 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_operation: , line:11:27, endln:11:30 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -1894,7 +1894,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:11:25, endln:11:26 |vpiParent: - \_for_stmt: (work@t), line:11:6, endln:11:9 + \_assignment: , line:11:25, endln:11:30 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -1996,12 +1996,12 @@ design: (work@t) |vpiRhs: \_operation: , line:13:23, endln:13:26 |vpiParent: - \_for_stmt: (work@t), line:13:6, endln:13:9 + \_assignment: , line:13:21, endln:13:26 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:13:23, endln:13:24 |vpiParent: - \_for_stmt: (work@t), line:13:6, endln:13:9 + \_operation: , line:13:23, endln:13:26 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2017,7 +2017,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:13:21, endln:13:22 |vpiParent: - \_for_stmt: (work@t), line:13:6, endln:13:9 + \_assignment: , line:13:21, endln:13:26 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2075,12 +2075,12 @@ design: (work@t) |vpiRhs: \_operation: , line:14:23, endln:14:26 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_assignment: , line:14:21, endln:14:26 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:14:23, endln:14:24 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_operation: , line:14:23, endln:14:26 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2096,7 +2096,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:14:21, endln:14:22 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_assignment: , line:14:21, endln:14:26 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2110,12 +2110,12 @@ design: (work@t) |vpiRhs: \_operation: , line:14:30, endln:14:33 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_assignment: , line:14:28, endln:14:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:14:30, endln:14:31 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_operation: , line:14:30, endln:14:33 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2131,7 +2131,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:14:28, endln:14:29 |vpiParent: - \_for_stmt: (work@t), line:14:6, endln:14:9 + \_assignment: , line:14:28, endln:14:33 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2241,12 +2241,12 @@ design: (work@t) |vpiRhs: \_operation: , line:16:31, endln:16:34 |vpiParent: - \_for_stmt: (work@t), line:16:6, endln:16:9 + \_assignment: , line:16:29, endln:16:34 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:16:31, endln:16:32 |vpiParent: - \_for_stmt: (work@t), line:16:6, endln:16:9 + \_operation: , line:16:31, endln:16:34 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2262,7 +2262,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:16:29, endln:16:30 |vpiParent: - \_for_stmt: (work@t), line:16:6, endln:16:9 + \_assignment: , line:16:29, endln:16:34 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2324,12 +2324,12 @@ design: (work@t) |vpiRhs: \_operation: , line:17:31, endln:17:34 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_assignment: , line:17:29, endln:17:34 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:17:31, endln:17:32 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_operation: , line:17:31, endln:17:34 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2345,7 +2345,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:17:29, endln:17:30 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_assignment: , line:17:29, endln:17:34 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2359,12 +2359,12 @@ design: (work@t) |vpiRhs: \_operation: , line:17:38, endln:17:41 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_assignment: , line:17:36, endln:17:41 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:17:38, endln:17:39 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_operation: , line:17:38, endln:17:41 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2380,7 +2380,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:17:36, endln:17:37 |vpiParent: - \_for_stmt: (work@t), line:17:6, endln:17:9 + \_assignment: , line:17:36, endln:17:41 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2490,12 +2490,12 @@ design: (work@t) |vpiRhs: \_operation: , line:19:35, endln:19:38 |vpiParent: - \_for_stmt: (work@t), line:19:6, endln:19:9 + \_assignment: , line:19:33, endln:19:38 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:19:35, endln:19:36 |vpiParent: - \_for_stmt: (work@t), line:19:6, endln:19:9 + \_operation: , line:19:35, endln:19:38 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2511,7 +2511,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:19:33, endln:19:34 |vpiParent: - \_for_stmt: (work@t), line:19:6, endln:19:9 + \_assignment: , line:19:33, endln:19:38 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2573,12 +2573,12 @@ design: (work@t) |vpiRhs: \_operation: , line:20:35, endln:20:38 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_assignment: , line:20:33, endln:20:38 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:20:35, endln:20:36 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_operation: , line:20:35, endln:20:38 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2594,7 +2594,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:20:33, endln:20:34 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_assignment: , line:20:33, endln:20:38 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2608,12 +2608,12 @@ design: (work@t) |vpiRhs: \_operation: , line:20:42, endln:20:45 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_assignment: , line:20:40, endln:20:45 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:20:42, endln:20:43 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_operation: , line:20:42, endln:20:45 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2629,7 +2629,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:20:40, endln:20:41 |vpiParent: - \_for_stmt: (work@t), line:20:6, endln:20:9 + \_assignment: , line:20:40, endln:20:45 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2783,12 +2783,12 @@ design: (work@t) |vpiRhs: \_operation: , line:22:44, endln:22:47 |vpiParent: - \_for_stmt: (work@t), line:22:6, endln:22:9 + \_assignment: , line:22:42, endln:22:47 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:22:44, endln:22:45 |vpiParent: - \_for_stmt: (work@t), line:22:6, endln:22:9 + \_operation: , line:22:44, endln:22:47 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2804,7 +2804,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:22:42, endln:22:43 |vpiParent: - \_for_stmt: (work@t), line:22:6, endln:22:9 + \_assignment: , line:22:42, endln:22:47 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2888,12 +2888,12 @@ design: (work@t) |vpiRhs: \_operation: , line:23:44, endln:23:47 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_assignment: , line:23:42, endln:23:47 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.a), line:23:44, endln:23:45 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_operation: , line:23:44, endln:23:47 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2909,7 +2909,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.a), line:23:42, endln:23:43 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_assignment: , line:23:42, endln:23:47 |vpiName:a |vpiFullName:work@t.a |vpiActual: @@ -2923,12 +2923,12 @@ design: (work@t) |vpiRhs: \_operation: , line:23:51, endln:23:54 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_assignment: , line:23:49, endln:23:54 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@t.b), line:23:51, endln:23:52 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_operation: , line:23:51, endln:23:54 |vpiName:b |vpiFullName:work@t.b |vpiActual: @@ -2944,7 +2944,7 @@ design: (work@t) |vpiLhs: \_ref_obj: (work@t.b), line:23:49, endln:23:50 |vpiParent: - \_for_stmt: (work@t), line:23:6, endln:23:9 + \_assignment: , line:23:49, endln:23:54 |vpiName:b |vpiFullName:work@t.b |vpiActual: diff --git a/tests/ForLoopBind/ForLoopBind.log b/tests/ForLoopBind/ForLoopBind.log index eaae424f56..357c769e8a 100644 --- a/tests/ForLoopBind/ForLoopBind.log +++ b/tests/ForLoopBind/ForLoopBind.log @@ -742,8 +742,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:21, endln:31:22 - |vpiParent: - \_assignment: , line:31:10, endln:31:22 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1009,8 +1007,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:21, endln:31:22 - |vpiParent: - \_assignment: , line:31:10, endln:31:22 |vpiDecompile:1 |vpiSize:64 |UINT:1 diff --git a/tests/ForeachArray/ForeachArray.log b/tests/ForeachArray/ForeachArray.log index 12fc8af865..3d11d55be9 100644 --- a/tests/ForeachArray/ForeachArray.log +++ b/tests/ForeachArray/ForeachArray.log @@ -105,7 +105,7 @@ logic_net 1 module_inst 4 operation 1 range 1 -ref_obj 4 +ref_obj 3 ref_var 2 unsupported_typespec 2 === UHDM Object Stats End === @@ -128,7 +128,7 @@ logic_net 1 module_inst 4 operation 1 range 1 -ref_obj 7 +ref_obj 5 ref_var 3 unsupported_typespec 2 === UHDM Object Stats End === @@ -193,7 +193,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.i), line:7:24, endln:7:25 |vpiParent: - \_foreach_stmt: (work@dut), line:6:9, endln:6:16 + \_assignment: , line:7:13, endln:7:25 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -201,17 +201,13 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.array), line:7:13, endln:7:21 |vpiParent: - \_ref_obj: (work@dut.array) - |vpiParent: - \_assignment: , line:7:13, endln:7:25 - |vpiName:array - |vpiFullName:work@dut.array + \_assignment: , line:7:13, endln:7:25 |vpiName:array |vpiFullName:work@dut.array |vpiIndex: \_ref_obj: (work@dut.i), line:7:19, endln:7:20 |vpiParent: - \_foreach_stmt: (work@dut), line:6:9, endln:6:16 + \_bit_select: (work@dut.array), line:7:13, endln:7:21 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -317,25 +313,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.array), line:7:13, endln:7:21 |vpiParent: - \_ref_obj: (work@dut.array) - |vpiParent: - \_assignment: , line:7:13, endln:7:25 - |vpiName:array - |vpiFullName:work@dut.array - |vpiActual: - \_array_var: (work@dut.array), line:3:9, endln:3:18 + \_assignment: , line:7:13, endln:7:25 |vpiName:array |vpiFullName:work@dut.array + |vpiActual: + \_array_var: (work@dut.array), line:3:9, endln:3:18 |vpiIndex: - \_ref_obj: (work@dut.array.i), line:7:19, endln:7:20 + \_ref_obj: (work@dut.i), line:7:19, endln:7:20 |vpiParent: \_bit_select: (work@dut.array), line:7:13, endln:7:21 |vpiName:i - |vpiFullName:work@dut.array.i + |vpiFullName:work@dut.i |vpiActual: \_int_var: (i), line:6:23, endln:6:24 - |vpiActual: - \_array_var: (work@dut.array), line:3:9, endln:3:18 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/ForeachClass/ForeachClass.log b/tests/ForeachClass/ForeachClass.log index b5d0ce6c40..abcfd9efb8 100644 --- a/tests/ForeachClass/ForeachClass.log +++ b/tests/ForeachClass/ForeachClass.log @@ -156,7 +156,7 @@ module_inst 2 operation 7 package 3 range 1 -ref_obj 20 +ref_obj 16 ref_var 2 unsupported_typespec 2 === UHDM Object Stats End === @@ -183,7 +183,7 @@ module_inst 2 operation 14 package 3 range 2 -ref_obj 40 +ref_obj 32 ref_var 3 unsupported_typespec 2 === UHDM Object Stats End === @@ -299,19 +299,15 @@ design: (unnamed) |vpiOperand: \_bit_select: (uvm::f1::addrs), line:12:11, endln:12:19 |vpiParent: - \_ref_obj: (uvm::f1::addrs) - |vpiParent: - \_operation: , line:12:11, endln:12:32 - |vpiName:addrs - |vpiFullName:uvm::f1::addrs + \_operation: , line:12:11, endln:12:32 |vpiName:addrs |vpiFullName:uvm::f1::addrs |vpiIndex: - \_ref_obj: (uvm::f1::addrs::i), line:12:17, endln:12:18 + \_ref_obj: (uvm::f1::i), line:12:17, endln:12:18 |vpiParent: \_bit_select: (uvm::f1::addrs), line:12:11, endln:12:19 |vpiName:i - |vpiFullName:uvm::f1::addrs::i + |vpiFullName:uvm::f1::i |vpiOperand: \_hier_path: (range.min), line:12:23, endln:12:32 |vpiParent: @@ -325,10 +321,11 @@ design: (unnamed) |vpiActual: \_ref_var: (uvm::f1::range), line:11:39, endln:11:44 |vpiActual: - \_ref_obj: (min), line:12:29, endln:12:32 + \_ref_obj: (uvm::f1::min), line:12:29, endln:12:32 |vpiParent: \_hier_path: (range.min), line:12:23, endln:12:32 |vpiName:min + |vpiFullName:uvm::f1::min |vpiOperand: \_operation: , line:12:36, endln:12:57 |vpiParent: @@ -337,19 +334,15 @@ design: (unnamed) |vpiOperand: \_bit_select: (uvm::f1::addrs), line:12:36, endln:12:44 |vpiParent: - \_ref_obj: (uvm::f1::addrs) - |vpiParent: - \_operation: , line:12:36, endln:12:57 - |vpiName:addrs - |vpiFullName:uvm::f1::addrs + \_operation: , line:12:36, endln:12:57 |vpiName:addrs |vpiFullName:uvm::f1::addrs |vpiIndex: - \_ref_obj: (uvm::f1::addrs::i), line:12:42, endln:12:43 + \_ref_obj: (uvm::f1::i), line:12:42, endln:12:43 |vpiParent: \_bit_select: (uvm::f1::addrs), line:12:36, endln:12:44 |vpiName:i - |vpiFullName:uvm::f1::addrs::i + |vpiFullName:uvm::f1::i |vpiOperand: \_hier_path: (range.max), line:12:48, endln:12:57 |vpiParent: @@ -363,10 +356,11 @@ design: (unnamed) |vpiActual: \_ref_var: (uvm::f1::range), line:11:39, endln:11:44 |vpiActual: - \_ref_obj: (max), line:12:54, endln:12:57 + \_ref_obj: (uvm::f1::max), line:12:54, endln:12:57 |vpiParent: \_hier_path: (range.max), line:12:48, endln:12:57 |vpiName:max + |vpiFullName:uvm::f1::max |vpiStmt: \_begin: (uvm::f1), line:12:59, endln:13:10 |vpiParent: @@ -524,19 +518,15 @@ design: (unnamed) |vpiOperand: \_bit_select: (uvm::f1::addrs), line:12:11, endln:12:19 |vpiParent: - \_ref_obj: (uvm::f1::addrs) - |vpiParent: - \_operation: , line:12:11, endln:12:32 - |vpiName:addrs - |vpiFullName:uvm::f1::addrs + \_operation: , line:12:11, endln:12:32 |vpiName:addrs |vpiFullName:uvm::f1::addrs |vpiIndex: - \_ref_obj: (uvm::f1::addrs::i), line:12:17, endln:12:18 + \_ref_obj: (uvm::f1::i), line:12:17, endln:12:18 |vpiParent: \_bit_select: (uvm::f1::addrs), line:12:11, endln:12:19 |vpiName:i - |vpiFullName:uvm::f1::addrs::i + |vpiFullName:uvm::f1::i |vpiOperand: \_hier_path: (range.min), line:12:23, endln:12:32 |vpiParent: @@ -550,10 +540,11 @@ design: (unnamed) |vpiActual: \_array_var: (range), line:11:39, endln:11:44 |vpiActual: - \_ref_obj: (min), line:12:29, endln:12:32 + \_ref_obj: (uvm::f1::min), line:12:29, endln:12:32 |vpiParent: \_hier_path: (range.min), line:12:23, endln:12:32 |vpiName:min + |vpiFullName:uvm::f1::min |vpiActual: \_func_call: (min) |vpiOperand: @@ -564,19 +555,15 @@ design: (unnamed) |vpiOperand: \_bit_select: (uvm::f1::addrs), line:12:36, endln:12:44 |vpiParent: - \_ref_obj: (uvm::f1::addrs) - |vpiParent: - \_operation: , line:12:36, endln:12:57 - |vpiName:addrs - |vpiFullName:uvm::f1::addrs + \_operation: , line:12:36, endln:12:57 |vpiName:addrs |vpiFullName:uvm::f1::addrs |vpiIndex: - \_ref_obj: (uvm::f1::addrs::i), line:12:42, endln:12:43 + \_ref_obj: (uvm::f1::i), line:12:42, endln:12:43 |vpiParent: \_bit_select: (uvm::f1::addrs), line:12:36, endln:12:44 |vpiName:i - |vpiFullName:uvm::f1::addrs::i + |vpiFullName:uvm::f1::i |vpiOperand: \_hier_path: (range.max), line:12:48, endln:12:57 |vpiParent: @@ -590,10 +577,11 @@ design: (unnamed) |vpiActual: \_array_var: (range), line:11:39, endln:11:44 |vpiActual: - \_ref_obj: (max), line:12:54, endln:12:57 + \_ref_obj: (uvm::f1::max), line:12:54, endln:12:57 |vpiParent: \_hier_path: (range.max), line:12:48, endln:12:57 |vpiName:max + |vpiFullName:uvm::f1::max |vpiActual: \_func_call: (max) |vpiStmt: diff --git a/tests/ForeachForeach/ForeachForeach.log b/tests/ForeachForeach/ForeachForeach.log index 816e3b4d89..a5946626e1 100644 --- a/tests/ForeachForeach/ForeachForeach.log +++ b/tests/ForeachForeach/ForeachForeach.log @@ -144,7 +144,7 @@ hier_path 3 module_inst 4 package 3 range 6 -ref_obj 15 +ref_obj 13 ref_var 6 unsupported_typespec 6 === UHDM Object Stats End === @@ -169,7 +169,7 @@ hier_path 5 module_inst 4 package 3 range 6 -ref_obj 23 +ref_obj 19 ref_var 10 unsupported_typespec 6 === UHDM Object Stats End === @@ -352,8 +352,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:37, endln:15:38 - |vpiParent: - \_assignment: , line:15:14, endln:15:38 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -361,25 +359,19 @@ design: (unnamed) |vpiLhs: \_bit_select: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:15:14, endln:15:34 |vpiParent: - \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors) - |vpiParent: - \_assignment: , line:15:14, endln:15:38 - |vpiName:predecessors - |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors - |vpiActual: - \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 + \_assignment: , line:15:14, endln:15:38 |vpiName:predecessors |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors + |vpiActual: + \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 |vpiIndex: - \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors::next_p), line:15:27, endln:15:33 + \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::next_p), line:15:27, endln:15:33 |vpiParent: \_bit_select: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:15:14, endln:15:34 |vpiName:next_p - |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors::next_p + |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::next_p |vpiActual: \_ref_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::next_p), line:14:38, endln:14:44 - |vpiActual: - \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 |vpiInstance: \_package: uvm (uvm::), file:${SURELOG_DIR}/tests/ForeachForeach/dut.sv, line:1:1, endln:23:11 |uhdmtopPackages: @@ -570,8 +562,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:37, endln:15:38 - |vpiParent: - \_assignment: , line:15:14, endln:15:38 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -579,25 +569,19 @@ design: (unnamed) |vpiLhs: \_bit_select: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:15:14, endln:15:34 |vpiParent: - \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors) - |vpiParent: - \_assignment: , line:15:14, endln:15:38 - |vpiName:predecessors - |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors - |vpiActual: - \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 + \_assignment: , line:15:14, endln:15:38 |vpiName:predecessors |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors + |vpiActual: + \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 |vpiIndex: - \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors::next_p), line:15:27, endln:15:33 + \_ref_obj: (uvm::uvm_phase::get_adjacent_predecessor_nodes::next_p), line:15:27, endln:15:33 |vpiParent: \_bit_select: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:15:14, endln:15:34 |vpiName:next_p - |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors::next_p + |vpiFullName:uvm::uvm_phase::get_adjacent_predecessor_nodes::next_p |vpiActual: \_class_var: (next_p), line:14:38, endln:14:44 - |vpiActual: - \_array_var: (uvm::uvm_phase::get_adjacent_predecessor_nodes::predecessors), line:11:10, endln:11:22 |vpiInstance: \_package: uvm (uvm::), file:${SURELOG_DIR}/tests/ForeachForeach/dut.sv, line:1:1, endln:23:11 =================== diff --git a/tests/ForeachSquare/ForeachSquare.log b/tests/ForeachSquare/ForeachSquare.log index 7e3c8a0bf6..2e75e40cc1 100644 --- a/tests/ForeachSquare/ForeachSquare.log +++ b/tests/ForeachSquare/ForeachSquare.log @@ -245,12 +245,12 @@ design: (work@dut) |vpiRhs: \_operation: , line:8:31, endln:8:36 |vpiParent: - \_foreach_stmt: (work@dut), line:7:13, endln:7:20 + \_assignment: , line:8:17, endln:8:36 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@dut.i), line:8:31, endln:8:32 |vpiParent: - \_foreach_stmt: (work@dut), line:7:13, endln:7:20 + \_operation: , line:8:31, endln:8:36 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -270,19 +270,19 @@ design: (work@dut) |vpiName:array |vpiFullName:work@dut.array |vpiIndex: - \_ref_obj: (work@dut.i), line:8:23, endln:8:24 + \_ref_obj: (work@dut.array.i), line:8:23, endln:8:24 |vpiParent: - \_foreach_stmt: (work@dut), line:7:13, endln:7:20 + \_var_select: (work@dut.array), line:8:17, endln:8:28 |vpiName:i - |vpiFullName:work@dut.i + |vpiFullName:work@dut.array.i |vpiActual: \_int_var: (i), line:6:23, endln:6:24 |vpiIndex: - \_ref_obj: (work@dut.j), line:8:26, endln:8:27 + \_ref_obj: (work@dut.array.j), line:8:26, endln:8:27 |vpiParent: - \_foreach_stmt: (work@dut), line:7:13, endln:7:20 + \_var_select: (work@dut.array), line:8:17, endln:8:28 |vpiName:j - |vpiFullName:work@dut.j + |vpiFullName:work@dut.array.j |vpiActual: \_int_var: (j), line:7:30, endln:7:31 |uhdmtopModules: @@ -446,7 +446,7 @@ design: (work@dut) |vpiName:i |vpiFullName:work@dut.i |vpiActual: - \_ref_var: (work@dut.i), line:7:27, endln:7:28 + \_int_var: (i), line:6:23, endln:6:24 |vpiOperand: \_ref_obj: (work@dut.j), line:8:35, endln:8:36 |vpiParent: @@ -461,6 +461,8 @@ design: (work@dut) \_assignment: , line:8:17, endln:8:36 |vpiName:array |vpiFullName:work@dut.array + |vpiActual: + \_array_var: (work@dut.array), line:3:9, endln:3:18 |vpiIndex: \_ref_obj: (work@dut.array.i), line:8:23, endln:8:24 |vpiParent: @@ -468,7 +470,7 @@ design: (work@dut) |vpiName:i |vpiFullName:work@dut.array.i |vpiActual: - \_ref_var: (work@dut.i), line:7:27, endln:7:28 + \_int_var: (i), line:6:23, endln:6:24 |vpiIndex: \_ref_obj: (work@dut.array.j), line:8:26, endln:8:27 |vpiParent: diff --git a/tests/FuncArgDirection/FuncArgDirection.log b/tests/FuncArgDirection/FuncArgDirection.log index 689790fdbf..7e26f42f5b 100644 --- a/tests/FuncArgDirection/FuncArgDirection.log +++ b/tests/FuncArgDirection/FuncArgDirection.log @@ -524,7 +524,7 @@ package 2 param_assign 1 parameter 1 range 8 -ref_obj 11 +ref_obj 9 return_stmt 1 task 9 === UHDM Object Stats End === @@ -559,7 +559,7 @@ package 2 param_assign 1 parameter 1 range 8 -ref_obj 21 +ref_obj 17 return_stmt 2 task 18 === UHDM Object Stats End === @@ -1184,17 +1184,15 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.aes_rev_order_bit.in), line:5:14, endln:5:21 |vpiParent: - \_ref_obj: (work@dut.aes_rev_order_bit.in) - |vpiParent: - \_assignment: , line:5:5, endln:5:21 - |vpiName:in - |vpiFullName:work@dut.aes_rev_order_bit.in + \_assignment: , line:5:5, endln:5:21 |vpiName:in |vpiFullName:work@dut.aes_rev_order_bit.in + |vpiActual: + \_io_decl: (in), line:2:62, endln:2:64 |vpiIndex: \_operation: , line:5:17, endln:5:20 |vpiParent: - \_begin: (work@dut.aes_rev_order_bit), line:4:27, endln:6:6 + \_bit_select: (work@dut.aes_rev_order_bit.in), line:5:14, endln:5:21 |vpiOpType:11 |vpiOperand: \_constant: , line:5:17, endln:5:18 @@ -1205,27 +1203,25 @@ design: (work@dut) |UINT:7 |vpiConstType:9 |vpiOperand: - \_ref_obj: (work@dut.aes_rev_order_bit.i), line:5:19, endln:5:20 + \_ref_obj: (work@dut.aes_rev_order_bit.in.i), line:5:19, endln:5:20 |vpiParent: \_operation: , line:5:17, endln:5:20 |vpiName:i - |vpiFullName:work@dut.aes_rev_order_bit.i + |vpiFullName:work@dut.aes_rev_order_bit.in.i |vpiActual: \_int_var: (work@dut.aes_rev_order_bit.i), line:4:12, endln:4:13 |vpiLhs: \_bit_select: (work@dut.aes_rev_order_bit.out), line:5:5, endln:5:11 |vpiParent: - \_ref_obj: (work@dut.aes_rev_order_bit.out) - |vpiParent: - \_assignment: , line:5:5, endln:5:21 - |vpiName:out - |vpiFullName:work@dut.aes_rev_order_bit.out + \_assignment: , line:5:5, endln:5:21 |vpiName:out |vpiFullName:work@dut.aes_rev_order_bit.out + |vpiActual: + \_logic_var: (work@dut.aes_rev_order_bit.out), line:3:15, endln:3:18 |vpiIndex: \_ref_obj: (work@dut.aes_rev_order_bit.i), line:5:9, endln:5:10 |vpiParent: - \_begin: (work@dut.aes_rev_order_bit), line:4:27, endln:6:6 + \_bit_select: (work@dut.aes_rev_order_bit.out), line:5:5, endln:5:11 |vpiName:i |vpiFullName:work@dut.aes_rev_order_bit.i |vpiActual: @@ -1485,15 +1481,11 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.aes_rev_order_bit.in), line:5:14, endln:5:21 |vpiParent: - \_ref_obj: (work@dut.aes_rev_order_bit.in) - |vpiParent: - \_assignment: , line:5:5, endln:5:21 - |vpiName:in - |vpiFullName:work@dut.aes_rev_order_bit.in - |vpiActual: - \_io_decl: (in), line:2:62, endln:2:64 + \_assignment: , line:5:5, endln:5:21 |vpiName:in |vpiFullName:work@dut.aes_rev_order_bit.in + |vpiActual: + \_io_decl: (in), line:2:62, endln:2:64 |vpiIndex: \_operation: , line:5:17, endln:5:20 |vpiParent: @@ -1509,30 +1501,22 @@ design: (work@dut) |vpiFullName:work@dut.aes_rev_order_bit.in.i |vpiActual: \_int_var: (work@dut.aes_rev_order_bit.i), line:4:12, endln:4:13 - |vpiActual: - \_io_decl: (in), line:2:62, endln:2:64 |vpiLhs: \_bit_select: (work@dut.aes_rev_order_bit.out), line:5:5, endln:5:11 |vpiParent: - \_ref_obj: (work@dut.aes_rev_order_bit.out) - |vpiParent: - \_assignment: , line:5:5, endln:5:21 - |vpiName:out - |vpiFullName:work@dut.aes_rev_order_bit.out - |vpiActual: - \_logic_var: (work@dut.aes_rev_order_bit.out), line:3:15, endln:3:18 + \_assignment: , line:5:5, endln:5:21 |vpiName:out |vpiFullName:work@dut.aes_rev_order_bit.out + |vpiActual: + \_logic_var: (work@dut.aes_rev_order_bit.out), line:3:15, endln:3:18 |vpiIndex: - \_ref_obj: (work@dut.aes_rev_order_bit.out.i), line:5:9, endln:5:10 + \_ref_obj: (work@dut.aes_rev_order_bit.i), line:5:9, endln:5:10 |vpiParent: \_bit_select: (work@dut.aes_rev_order_bit.out), line:5:5, endln:5:11 |vpiName:i - |vpiFullName:work@dut.aes_rev_order_bit.out.i + |vpiFullName:work@dut.aes_rev_order_bit.i |vpiActual: \_int_var: (work@dut.aes_rev_order_bit.i), line:4:12, endln:4:13 - |vpiActual: - \_logic_var: (work@dut.aes_rev_order_bit.out), line:3:15, endln:3:18 |vpiStmt: \_return_stmt: , line:7:3, endln:7:9 |vpiParent: diff --git a/tests/FuncArgs/FuncArgs.log b/tests/FuncArgs/FuncArgs.log index 7670ad4448..4a019d025e 100644 --- a/tests/FuncArgs/FuncArgs.log +++ b/tests/FuncArgs/FuncArgs.log @@ -487,8 +487,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:33, endln:8:34 - |vpiParent: - \_assignment: , line:8:25, endln:8:34 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -496,7 +494,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.pow_a.pow_a), line:8:25, endln:8:30 |vpiParent: - \_begin: (work@dut.pow_a), line:7:17, endln:11:20 + \_assignment: , line:8:25, endln:8:34 |vpiName:pow_a |vpiFullName:work@dut.pow_a.pow_a |vpiActual: @@ -513,7 +511,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.pow_a.exp), line:9:29, endln:9:32 |vpiParent: - \_begin: (work@dut.pow_a), line:7:17, endln:11:20 + \_operation: , line:9:29, endln:9:36 |vpiName:exp |vpiFullName:work@dut.pow_a.exp |vpiActual: @@ -535,12 +533,12 @@ design: (work@dut) |vpiRhs: \_operation: , line:10:41, endln:10:68 |vpiParent: - \_if_stmt: , line:9:25, endln:10:69 + \_assignment: , line:10:33, endln:10:68 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@dut.pow_a.base), line:10:41, endln:10:45 |vpiParent: - \_if_stmt: , line:9:25, endln:10:69 + \_operation: , line:10:41, endln:10:68 |vpiName:base |vpiFullName:work@dut.pow_a.base |vpiActual: @@ -565,7 +563,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.pow_a.exp), line:10:60, endln:10:63 |vpiParent: - \_func_call: (pow_a), line:10:48, endln:10:68 + \_operation: , line:10:60, endln:10:67 |vpiName:exp |vpiFullName:work@dut.pow_a.exp |vpiActual: @@ -584,7 +582,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.pow_a.pow_a), line:10:33, endln:10:38 |vpiParent: - \_if_stmt: , line:9:25, endln:10:69 + \_assignment: , line:10:33, endln:10:68 |vpiName:pow_a |vpiFullName:work@dut.pow_a.pow_a |vpiActual: @@ -670,8 +668,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:33, endln:17:34 - |vpiParent: - \_assignment: , line:17:25, endln:17:34 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -679,7 +675,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.pow_b.pow_b), line:17:25, endln:17:30 |vpiParent: - \_begin: (work@dut.pow_b), line:16:17, endln:20:20 + \_assignment: , line:17:25, endln:17:34 |vpiName:pow_b |vpiFullName:work@dut.pow_b.pow_b |vpiActual: @@ -696,7 +692,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.pow_b.exp), line:18:29, endln:18:32 |vpiParent: - \_begin: (work@dut.pow_b), line:16:17, endln:20:20 + \_operation: , line:18:29, endln:18:36 |vpiName:exp |vpiFullName:work@dut.pow_b.exp |vpiActual: @@ -718,12 +714,12 @@ design: (work@dut) |vpiRhs: \_operation: , line:19:41, endln:19:68 |vpiParent: - \_if_stmt: , line:18:25, endln:19:69 + \_assignment: , line:19:33, endln:19:68 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@dut.pow_b.base), line:19:41, endln:19:45 |vpiParent: - \_if_stmt: , line:18:25, endln:19:69 + \_operation: , line:19:41, endln:19:68 |vpiName:base |vpiFullName:work@dut.pow_b.base |vpiActual: @@ -748,7 +744,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.pow_b.exp), line:19:60, endln:19:63 |vpiParent: - \_func_call: (pow_b), line:19:48, endln:19:68 + \_operation: , line:19:60, endln:19:67 |vpiName:exp |vpiFullName:work@dut.pow_b.exp |vpiActual: @@ -767,7 +763,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.pow_b.pow_b), line:19:33, endln:19:38 |vpiParent: - \_if_stmt: , line:18:25, endln:19:69 + \_assignment: , line:19:33, endln:19:68 |vpiName:pow_b |vpiFullName:work@dut.pow_b.pow_b |vpiActual: @@ -1014,7 +1010,7 @@ design: (work@dut) |vpiName:pow_a |vpiFullName:work@dut.pow_a.pow_a |vpiActual: - \_logic_var: , line:5:28, endln:5:33 + \_logic_var: (pow_a), line:5:28, endln:5:33 |vpiStmt: \_if_stmt: , line:9:25, endln:10:69 |vpiParent: @@ -1090,7 +1086,7 @@ design: (work@dut) |vpiName:pow_a |vpiFullName:work@dut.pow_a.pow_a |vpiActual: - \_logic_var: , line:5:28, endln:5:33 + \_logic_var: (pow_a), line:5:28, endln:5:33 |vpiInstance: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/FuncArgs/dut.sv, line:1:1, endln:25:10 |vpiTaskFunc: @@ -1139,7 +1135,7 @@ design: (work@dut) |vpiName:pow_b |vpiFullName:work@dut.pow_b.pow_b |vpiActual: - \_logic_var: , line:14:28, endln:14:33 + \_logic_var: (pow_b), line:14:28, endln:14:33 |vpiStmt: \_if_stmt: , line:18:25, endln:19:69 |vpiParent: @@ -1215,7 +1211,7 @@ design: (work@dut) |vpiName:pow_b |vpiFullName:work@dut.pow_b.pow_b |vpiActual: - \_logic_var: , line:14:28, endln:14:33 + \_logic_var: (pow_b), line:14:28, endln:14:33 |vpiInstance: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/FuncArgs/dut.sv, line:1:1, endln:25:10 |vpiNet: diff --git a/tests/FuncAttrib/FuncAttrib.log b/tests/FuncAttrib/FuncAttrib.log index 60b7ac9977..cb6c47de1e 100644 --- a/tests/FuncAttrib/FuncAttrib.log +++ b/tests/FuncAttrib/FuncAttrib.log @@ -523,8 +523,6 @@ design: (work@foo) |vpiOpType:82 |vpiRhs: \_constant: , line:17:19, endln:17:20 - |vpiParent: - \_assignment: , line:17:12, endln:17:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -532,7 +530,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.out), line:17:12, endln:17:15 |vpiParent: - \_if_else: , line:17:3, endln:20:53 + \_assignment: , line:17:12, endln:17:20 |vpiName:out |vpiFullName:work@foo.out |vpiActual: @@ -568,7 +566,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (work@foo.out), line:19:5, endln:19:8 |vpiParent: - \_if_else: , line:17:3, endln:20:53 + \_assignment: , line:19:5, endln:20:52 |vpiName:out |vpiFullName:work@foo.out |vpiActual: @@ -668,12 +666,12 @@ design: (work@foo) |vpiRhs: \_operation: , line:5:10, endln:5:23 |vpiParent: - \_function: (do_add), line:1:1, endln:7:12 + \_assignment: , line:5:1, endln:5:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (do_add.inp_a), line:5:10, endln:5:15 |vpiParent: - \_function: (do_add), line:1:1, endln:7:12 + \_operation: , line:5:10, endln:5:23 |vpiName:inp_a |vpiFullName:do_add.inp_a |vpiActual: @@ -689,7 +687,7 @@ design: (work@foo) |vpiLhs: \_ref_obj: (do_add.do_add), line:5:1, endln:5:7 |vpiParent: - \_function: (do_add), line:1:1, endln:7:12 + \_assignment: , line:5:1, endln:5:23 |vpiName:do_add |vpiFullName:do_add.do_add |vpiActual: diff --git a/tests/FuncBinding/FuncBinding.log b/tests/FuncBinding/FuncBinding.log index 24d82b3911..2c8cb99209 100644 --- a/tests/FuncBinding/FuncBinding.log +++ b/tests/FuncBinding/FuncBinding.log @@ -253,7 +253,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_0), line:23:14, endln:23:19 |vpiParent: - \_case_item: , line:23:3, endln:29:13 + \_operation: , line:23:14, endln:23:27 |vpiName:req_0 |vpiFullName:work@fsm_using_function.fsm_function.req_0 |vpiActual: @@ -280,7 +280,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT0), line:24:27, endln:24:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:23:29, endln:25:13 + \_assignment: , line:24:12, endln:24:31 |vpiName:GNT0 |vpiFullName:work@fsm_using_function.fsm_function.GNT0 |vpiActual: @@ -288,7 +288,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:24:12, endln:24:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:23:29, endln:25:13 + \_assignment: , line:24:12, endln:24:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -305,7 +305,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_1), line:25:23, endln:25:28 |vpiParent: - \_if_else: , line:23:10, endln:29:13 + \_operation: , line:25:23, endln:25:36 |vpiName:req_1 |vpiFullName:work@fsm_using_function.fsm_function.req_1 |vpiActual: @@ -332,7 +332,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT1), line:26:26, endln:26:30 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:25:38, endln:27:13 + \_assignment: , line:26:12, endln:26:30 |vpiName:GNT1 |vpiFullName:work@fsm_using_function.fsm_function.GNT1 |vpiActual: @@ -340,7 +340,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:26:12, endln:26:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:25:38, endln:27:13 + \_assignment: , line:26:12, endln:26:30 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -359,7 +359,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:28:27, endln:28:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:27:19, endln:29:13 + \_assignment: , line:28:12, endln:28:31 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiActual: @@ -367,7 +367,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:28:12, endln:28:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:27:19, endln:29:13 + \_assignment: , line:28:12, endln:28:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -396,7 +396,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_0), line:30:14, endln:30:19 |vpiParent: - \_case_item: , line:30:3, endln:34:13 + \_operation: , line:30:14, endln:30:27 |vpiName:req_0 |vpiFullName:work@fsm_using_function.fsm_function.req_0 |vpiActual: @@ -423,7 +423,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT0), line:31:27, endln:31:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:30:29, endln:32:13 + \_assignment: , line:31:12, endln:31:31 |vpiName:GNT0 |vpiFullName:work@fsm_using_function.fsm_function.GNT0 |vpiActual: @@ -431,7 +431,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:31:12, endln:31:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:30:29, endln:32:13 + \_assignment: , line:31:12, endln:31:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -450,7 +450,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:33:27, endln:33:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:32:19, endln:34:13 + \_assignment: , line:33:12, endln:33:31 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiActual: @@ -458,7 +458,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:33:12, endln:33:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:32:19, endln:34:13 + \_assignment: , line:33:12, endln:33:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -487,7 +487,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.fsm_function.req_1), line:35:14, endln:35:19 |vpiParent: - \_case_item: , line:35:3, endln:39:13 + \_operation: , line:35:14, endln:35:27 |vpiName:req_1 |vpiFullName:work@fsm_using_function.fsm_function.req_1 |vpiActual: @@ -514,7 +514,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.GNT1), line:36:27, endln:36:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:35:29, endln:37:13 + \_assignment: , line:36:12, endln:36:31 |vpiName:GNT1 |vpiFullName:work@fsm_using_function.fsm_function.GNT1 |vpiActual: @@ -522,7 +522,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:36:12, endln:36:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:35:29, endln:37:13 + \_assignment: , line:36:12, endln:36:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -541,7 +541,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:38:27, endln:38:31 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:37:19, endln:39:13 + \_assignment: , line:38:12, endln:38:31 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiActual: @@ -549,7 +549,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:38:12, endln:38:24 |vpiParent: - \_begin: (work@fsm_using_function.fsm_function), line:37:19, endln:39:13 + \_assignment: , line:38:12, endln:38:31 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -567,7 +567,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.fsm_function.IDLE), line:40:28, endln:40:32 |vpiParent: - \_case_item: , line:40:3, endln:40:33 + \_assignment: , line:40:13, endln:40:32 |vpiName:IDLE |vpiFullName:work@fsm_using_function.fsm_function.IDLE |vpiActual: @@ -575,7 +575,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.fsm_function.future_state), line:40:13, endln:40:25 |vpiParent: - \_case_item: , line:40:3, endln:40:33 + \_assignment: , line:40:13, endln:40:32 |vpiName:future_state |vpiFullName:work@fsm_using_function.fsm_function.future_state |vpiActual: @@ -820,7 +820,7 @@ design: (work@fsm_using_function) |vpiOperand: \_ref_obj: (work@fsm_using_function.FSM_SEQ.reset), line:47:6, endln:47:11 |vpiParent: - \_named_begin: (work@fsm_using_function.FSM_SEQ), line:46:1, endln:52:4 + \_operation: , line:47:6, endln:47:19 |vpiName:reset |vpiFullName:work@fsm_using_function.FSM_SEQ.reset |vpiActual: @@ -846,7 +846,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.IDLE), line:48:22, endln:48:26 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:47:21, endln:49:5 + \_assignment: , line:48:5, endln:48:26 |vpiName:IDLE |vpiFullName:work@fsm_using_function.FSM_SEQ.IDLE |vpiActual: @@ -854,7 +854,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.curr_state), line:48:5, endln:48:15 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:47:21, endln:49:5 + \_assignment: , line:48:5, endln:48:26 |vpiName:curr_state |vpiFullName:work@fsm_using_function.FSM_SEQ.curr_state |vpiActual: @@ -877,7 +877,7 @@ design: (work@fsm_using_function) |vpiRhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.next_state), line:50:22, endln:50:32 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:49:11, endln:51:5 + \_assignment: , line:50:5, endln:50:32 |vpiName:next_state |vpiFullName:work@fsm_using_function.FSM_SEQ.next_state |vpiActual: @@ -885,7 +885,7 @@ design: (work@fsm_using_function) |vpiLhs: \_ref_obj: (work@fsm_using_function.FSM_SEQ.curr_state), line:50:5, endln:50:15 |vpiParent: - \_begin: (work@fsm_using_function.FSM_SEQ), line:49:11, endln:51:5 + \_assignment: , line:50:5, endln:50:32 |vpiName:curr_state |vpiFullName:work@fsm_using_function.FSM_SEQ.curr_state |vpiActual: diff --git a/tests/FuncBinding2/FuncBinding2.log b/tests/FuncBinding2/FuncBinding2.log index cb1fee48c4..937f401cdd 100644 --- a/tests/FuncBinding2/FuncBinding2.log +++ b/tests/FuncBinding2/FuncBinding2.log @@ -233,7 +233,7 @@ design: (work@vend) |vpiOperand: \_ref_obj: (work@vend.fsm.fsm_coin), line:18:13, endln:18:21 |vpiParent: - \_begin: (work@vend.fsm), line:17:5, endln:22:8 + \_operation: , line:18:13, endln:18:30 |vpiName:fsm_coin |vpiFullName:work@vend.fsm.fsm_coin |vpiActual: @@ -259,8 +259,6 @@ design: (work@vend) |vpiBlocking:1 |vpiRhs: \_constant: , line:20:33, endln:20:37 - |vpiParent: - \_assignment: , line:20:17, endln:20:37 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -268,7 +266,7 @@ design: (work@vend) |vpiLhs: \_ref_obj: (work@vend.fsm.fsm_newspaper), line:20:17, endln:20:30 |vpiParent: - \_begin: (work@vend.fsm), line:19:13, endln:21:16 + \_assignment: , line:20:17, endln:20:37 |vpiName:fsm_newspaper |vpiFullName:work@vend.fsm.fsm_newspaper |vpiActual: @@ -282,7 +280,7 @@ design: (work@vend) |vpiRhs: \_ref_obj: (work@vend.fsm.fsm_newspaper), line:24:7, endln:24:20 |vpiParent: - \_begin: (work@vend.fsm), line:14:1, endln:25:4 + \_assignment: , line:24:1, endln:24:20 |vpiName:fsm_newspaper |vpiFullName:work@vend.fsm.fsm_newspaper |vpiActual: @@ -290,7 +288,7 @@ design: (work@vend) |vpiLhs: \_ref_obj: (work@vend.fsm.fsm), line:24:1, endln:24:4 |vpiParent: - \_begin: (work@vend.fsm), line:14:1, endln:25:4 + \_assignment: , line:24:1, endln:24:20 |vpiName:fsm |vpiFullName:work@vend.fsm.fsm |vpiActual: @@ -532,7 +530,7 @@ design: (work@vend) |vpiName:fsm_newspaper |vpiFullName:work@vend.fsm.fsm_newspaper |vpiActual: - \_logic_var: (work@vend.fsm.fsm_newspaper), line:12:1, endln:12:4 + \_logic_var: (fsm_newspaper), line:12:1, endln:12:4 |vpiStmt: \_assignment: , line:24:1, endln:24:20 |vpiParent: @@ -546,7 +544,7 @@ design: (work@vend) |vpiName:fsm_newspaper |vpiFullName:work@vend.fsm.fsm_newspaper |vpiActual: - \_logic_var: (work@vend.fsm.fsm_newspaper), line:12:1, endln:12:4 + \_logic_var: (fsm_newspaper), line:12:1, endln:12:4 |vpiLhs: \_ref_obj: (work@vend.fsm.fsm), line:24:1, endln:24:4 |vpiParent: @@ -554,7 +552,7 @@ design: (work@vend) |vpiName:fsm |vpiFullName:work@vend.fsm.fsm |vpiActual: - \_logic_var: , line:10:10, endln:10:15 + \_logic_var: (fsm), line:10:10, endln:10:15 |vpiInstance: \_module_inst: work@vend (work@vend), file:${SURELOG_DIR}/tests/FuncBinding2/dut.sv, line:1:1, endln:33:10 |vpiNet: diff --git a/tests/FuncDef/FuncDef.log b/tests/FuncDef/FuncDef.log index 3529d120e0..f9e389a04d 100644 --- a/tests/FuncDef/FuncDef.log +++ b/tests/FuncDef/FuncDef.log @@ -299,12 +299,12 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiRhs: \_operation: , line:7:13, endln:7:18 |vpiParent: - \_begin: (work@mulAddRecFNToRaw_preMul.clog2), line:6:5, endln:9:8 + \_assignment: , line:7:9, endln:7:18 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.a), line:7:13, endln:7:14 |vpiParent: - \_begin: (work@mulAddRecFNToRaw_preMul.clog2), line:6:5, endln:9:8 + \_operation: , line:7:13, endln:7:18 |vpiName:a |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.a |vpiActual: @@ -320,7 +320,7 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiLhs: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.a), line:7:9, endln:7:10 |vpiParent: - \_begin: (work@mulAddRecFNToRaw_preMul.clog2), line:6:5, endln:9:8 + \_assignment: , line:7:9, endln:7:18 |vpiName:a |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.a |vpiActual: @@ -357,12 +357,12 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiRhs: \_operation: , line:8:40, endln:8:49 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_assignment: , line:8:32, endln:8:49 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.clog2), line:8:40, endln:8:45 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_operation: , line:8:40, endln:8:49 |vpiName:clog2 |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.clog2 |vpiActual: @@ -378,7 +378,7 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiLhs: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.clog2), line:8:32, endln:8:37 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_assignment: , line:8:32, endln:8:49 |vpiName:clog2 |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.clog2 |vpiActual: @@ -413,12 +413,12 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiRhs: \_operation: , line:8:55, endln:8:59 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_assignment: , line:8:51, endln:8:59 |vpiOpType:23 |vpiOperand: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.a), line:8:55, endln:8:56 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_operation: , line:8:55, endln:8:59 |vpiName:a |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.a |vpiActual: @@ -434,7 +434,7 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiLhs: \_ref_obj: (work@mulAddRecFNToRaw_preMul.clog2.a), line:8:51, endln:8:52 |vpiParent: - \_for_stmt: (work@mulAddRecFNToRaw_preMul.clog2), line:8:9, endln:8:12 + \_assignment: , line:8:51, endln:8:59 |vpiName:a |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.a |vpiActual: @@ -568,7 +568,7 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiName:clog2 |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.clog2 |vpiActual: - \_integer_var: , line:3:10, endln:3:17 + \_integer_var: (clog2), line:3:10, endln:3:17 |vpiOperand: \_constant: , line:8:48, endln:8:49 |vpiLhs: @@ -578,7 +578,7 @@ design: (work@mulAddRecFNToRaw_preMul) |vpiName:clog2 |vpiFullName:work@mulAddRecFNToRaw_preMul.clog2.clog2 |vpiActual: - \_integer_var: , line:3:10, endln:3:17 + \_integer_var: (clog2), line:3:10, endln:3:17 |vpiCondition: \_operation: , line:8:25, endln:8:30 |vpiParent: diff --git a/tests/FuncDef2/FuncDef2.log b/tests/FuncDef2/FuncDef2.log index 3bb677d003..cbe6c8b1a3 100644 --- a/tests/FuncDef2/FuncDef2.log +++ b/tests/FuncDef2/FuncDef2.log @@ -3688,7 +3688,7 @@ param_assign 118 parameter 125 port 6 range 9 -ref_obj 476 +ref_obj 437 ref_var 1 return_stmt 88 short_int_typespec 104 @@ -3740,7 +3740,7 @@ param_assign 118 parameter 125 port 9 range 9 -ref_obj 1082 +ref_obj 1006 ref_var 1 return_stmt 220 short_int_typespec 104 @@ -4417,8 +4417,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:69:15, endln:69:16 - |vpiParent: - \_assignment: , line:69:5, endln:69:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4506,25 +4504,19 @@ design: (work@tnoc_vc_splitter) |vpiCondition: \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiParent: - \_ref_obj: (tnoc_pkg::tnoc_clog2::n) - |vpiParent: - \_if_stmt: , line:71:7, endln:74:10 - |vpiName:n - |vpiFullName:tnoc_pkg::tnoc_clog2::n - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 + \_if_stmt: , line:71:7, endln:74:10 |vpiName:n |vpiFullName:tnoc_pkg::tnoc_clog2::n + |vpiActual: + \_io_decl: (n), line:66:48, endln:66:49 |vpiIndex: - \_ref_obj: (tnoc_pkg::tnoc_clog2::n::i), line:71:13, endln:71:14 + \_ref_obj: (tnoc_pkg::tnoc_clog2::i), line:71:13, endln:71:14 |vpiParent: \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiName:i - |vpiFullName:tnoc_pkg::tnoc_clog2::n::i + |vpiFullName:tnoc_pkg::tnoc_clog2::i |vpiActual: \_int_var: (tnoc_pkg::tnoc_clog2::i), line:70:14, endln:70:15 - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 |vpiStmt: \_begin: (tnoc_pkg::tnoc_clog2), line:71:17, endln:74:10 |vpiParent: @@ -4689,10 +4681,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:86:23, endln:86:29 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:86:23, endln:86:29 |vpiParent: \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiOperand: @@ -4729,10 +4722,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:87:39, endln:87:45 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:87:39, endln:87:45 |vpiParent: \_hier_path: (packet_config.size_x), line:87:25, endln:87:45 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiName:tnoc_clog2 @@ -4803,10 +4797,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:95:23, endln:95:29 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:95:23, endln:95:29 |vpiParent: \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiOperand: @@ -4843,10 +4838,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:96:39, endln:96:45 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:96:39, endln:96:45 |vpiParent: \_hier_path: (packet_config.size_y), line:96:25, endln:96:45 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiName:tnoc_clog2 @@ -4986,10 +4982,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:108:23, endln:108:39 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:108:23, endln:108:39 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiOperand: @@ -5026,10 +5023,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:109:39, endln:109:55 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:109:39, endln:109:55 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:109:25, endln:109:55 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiName:tnoc_clog2 @@ -5100,10 +5098,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:117:23, endln:117:27 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:117:23, endln:117:27 |vpiParent: \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiOperand: @@ -5140,10 +5139,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:118:39, endln:118:43 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:118:39, endln:118:43 |vpiParent: \_hier_path: (packet_config.tags), line:118:25, endln:118:43 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiName:tnoc_clog2 @@ -5214,10 +5214,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:126:23, endln:126:37 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:126:23, endln:126:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -5268,10 +5269,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:127:50, endln:127:64 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:127:50, endln:127:64 |vpiParent: \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -5367,10 +5369,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:134:67, endln:134:80 |vpiActual: - \_ref_obj: (max_byte_length), line:135:37, endln:135:52 + \_ref_obj: (tnoc_pkg::get_byte_length_width::max_byte_length), line:135:37, endln:135:52 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -5432,10 +5435,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:139:23, endln:139:38 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:139:23, endln:139:38 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -5472,10 +5476,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:140:39, endln:140:54 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:140:39, endln:140:54 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:140:25, endln:140:54 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiName:tnoc_clog2 @@ -5546,10 +5551,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:148:23, endln:148:37 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:148:23, endln:148:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -5591,10 +5597,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:149:39, endln:149:53 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:149:39, endln:149:53 |vpiParent: \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -5673,10 +5680,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:157:23, endln:157:33 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:157:23, endln:157:33 |vpiParent: \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -5718,10 +5726,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:158:39, endln:158:49 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:158:39, endln:158:49 |vpiParent: \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -5828,10 +5837,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (data_width), line:167:33, endln:167:43 + \_ref_obj: (tnoc_pkg::get_burst_length_width::data_width), line:167:33, endln:167:43 |vpiParent: \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_burst_length_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -5883,10 +5893,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (max_byte_length), line:168:38, endln:168:53 + \_ref_obj: (tnoc_pkg::get_burst_length_width::max_byte_length), line:168:38, endln:168:53 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_burst_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -6015,15 +6026,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_request_packet_type::packet_type), line:204:52, endln:204:94 |vpiParent: - \_ref_obj: (tnoc_pkg::is_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:204:51, endln:204:94 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:203:68, endln:203:79 + \_operation: , line:204:51, endln:204:94 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:203:68, endln:203:79 |vpiIndex: \_constant: , line:204:64, endln:204:93 |vpiParent: @@ -6039,8 +6046,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:203:68, endln:203:79 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6094,15 +6099,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_response_packet_type::packet_type), line:208:50, endln:208:92 |vpiParent: - \_ref_obj: (tnoc_pkg::is_response_packet_type::packet_type) - |vpiParent: - \_operation: , line:208:13, endln:208:92 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:207:69, endln:207:80 + \_operation: , line:208:13, endln:208:92 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:207:69, endln:207:80 |vpiIndex: \_constant: , line:208:62, endln:208:91 |vpiParent: @@ -6118,8 +6119,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:207:69, endln:207:80 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6173,15 +6172,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_packet_with_payload_type::packet_type), line:212:50, endln:212:91 |vpiParent: - \_ref_obj: (tnoc_pkg::is_packet_with_payload_type::packet_type) - |vpiParent: - \_operation: , line:212:13, endln:212:91 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:211:73, endln:211:84 + \_operation: , line:212:13, endln:212:91 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:211:73, endln:211:84 |vpiIndex: \_constant: , line:212:62, endln:212:90 |vpiParent: @@ -6197,8 +6192,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:211:73, endln:211:84 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6257,15 +6250,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_header_only_packet_type::packet_type), line:216:52, endln:216:93 |vpiParent: - \_ref_obj: (tnoc_pkg::is_header_only_packet_type::packet_type) - |vpiParent: - \_operation: , line:216:51, endln:216:93 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:215:72, endln:215:83 + \_operation: , line:216:51, endln:216:93 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:215:72, endln:215:83 |vpiIndex: \_constant: , line:216:64, endln:216:92 |vpiParent: @@ -6281,8 +6270,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:215:72, endln:215:83 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6341,15 +6328,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_posted_request_packet_type::packet_type), line:220:54, endln:220:98 |vpiParent: - \_ref_obj: (tnoc_pkg::is_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:220:53, endln:220:98 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:219:75, endln:219:86 + \_operation: , line:220:53, endln:220:98 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:219:75, endln:219:86 |vpiIndex: \_constant: , line:220:66, endln:220:97 |vpiParent: @@ -6365,8 +6348,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:219:75, endln:219:86 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6420,15 +6401,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_non_posted_request_packet_type::packet_type), line:224:52, endln:224:96 |vpiParent: - \_ref_obj: (tnoc_pkg::is_non_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:224:13, endln:224:96 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:223:79, endln:223:90 + \_operation: , line:224:13, endln:224:96 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:223:79, endln:223:90 |vpiIndex: \_constant: , line:224:64, endln:224:95 |vpiParent: @@ -6444,8 +6421,6 @@ design: (work@tnoc_vc_splitter) \_package: (tnoc_pkg) |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:223:79, endln:223:90 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -6506,8 +6481,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:229:13, endln:229:14 - |vpiParent: - \_assignment: , line:229:5, endln:229:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6528,8 +6501,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:230:14, endln:230:37 - |vpiParent: - \_assignment: , line:230:5, endln:230:37 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -6666,8 +6637,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:235:14, endln:235:15 - |vpiParent: - \_assignment: , line:235:5, endln:235:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6752,8 +6721,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:241:13, endln:241:14 - |vpiParent: - \_assignment: , line:241:5, endln:241:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6872,10 +6839,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:239:70, endln:239:83 |vpiActual: - \_ref_obj: (address_width), line:245:28, endln:245:41 + \_ref_obj: (tnoc_pkg::get_request_header_width::address_width), line:245:28, endln:245:41 |vpiParent: \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiName:address_width + |vpiFullName:tnoc_pkg::get_request_header_width::address_width |vpiActual: \_typespec_member: (address_width), line:49:15, endln:49:28 |vpiLhs: @@ -6894,8 +6862,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:246:14, endln:246:36 - |vpiParent: - \_assignment: , line:246:5, endln:246:36 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -6980,8 +6946,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:252:13, endln:252:14 - |vpiParent: - \_assignment: , line:252:5, endln:252:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7089,8 +7053,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:256:14, endln:256:41 - |vpiParent: - \_assignment: , line:256:5, endln:256:41 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -7175,8 +7137,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:263:13, endln:263:14 - |vpiParent: - \_assignment: , line:263:5, endln:263:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7393,8 +7353,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:276:13, endln:276:14 - |vpiParent: - \_assignment: , line:276:5, endln:276:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7426,10 +7384,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:277:28, endln:277:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:277:28, endln:277:38 |vpiParent: \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -7464,10 +7423,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:278:28, endln:278:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:278:28, endln:278:38 |vpiParent: \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -7558,8 +7518,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:284:13, endln:284:14 - |vpiParent: - \_assignment: , line:284:5, endln:284:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7591,10 +7549,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:282:72, endln:282:85 |vpiActual: - \_ref_obj: (data_width), line:285:28, endln:285:38 + \_ref_obj: (tnoc_pkg::get_response_payload_width::data_width), line:285:28, endln:285:38 |vpiParent: \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_response_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -7613,8 +7572,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:286:14, endln:286:41 - |vpiParent: - \_assignment: , line:286:5, endln:286:41 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -7664,8 +7621,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:288:14, endln:288:15 - |vpiParent: - \_assignment: , line:288:5, endln:288:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -7750,8 +7705,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:295:13, endln:295:14 - |vpiParent: - \_assignment: , line:295:5, endln:295:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7968,8 +7921,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:317:13, endln:317:14 - |vpiParent: - \_assignment: , line:317:5, endln:317:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8186,8 +8137,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:331:13, endln:331:14 - |vpiParent: - \_assignment: , line:331:5, endln:331:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8208,8 +8157,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:332:14, endln:332:35 - |vpiParent: - \_assignment: , line:332:5, endln:332:35 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -8230,8 +8177,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:333:14, endln:333:15 - |vpiParent: - \_assignment: , line:333:5, endln:333:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -8252,8 +8197,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:334:14, endln:334:15 - |vpiParent: - \_assignment: , line:334:5, endln:334:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -8731,8 +8674,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:359:13, endln:359:14 - |vpiParent: - \_assignment: , line:359:5, endln:359:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9795,8 +9736,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:69:15, endln:69:16 - |vpiParent: - \_assignment: , line:69:5, endln:69:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9884,25 +9823,19 @@ design: (work@tnoc_vc_splitter) |vpiCondition: \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiParent: - \_ref_obj: (tnoc_pkg::tnoc_clog2::n) - |vpiParent: - \_if_stmt: , line:71:7, endln:74:10 - |vpiName:n - |vpiFullName:tnoc_pkg::tnoc_clog2::n - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 + \_if_stmt: , line:71:7, endln:74:10 |vpiName:n |vpiFullName:tnoc_pkg::tnoc_clog2::n + |vpiActual: + \_io_decl: (n), line:66:48, endln:66:49 |vpiIndex: - \_ref_obj: (tnoc_pkg::tnoc_clog2::n::i), line:71:13, endln:71:14 + \_ref_obj: (tnoc_pkg::tnoc_clog2::i), line:71:13, endln:71:14 |vpiParent: \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiName:i - |vpiFullName:tnoc_pkg::tnoc_clog2::n::i + |vpiFullName:tnoc_pkg::tnoc_clog2::i |vpiActual: \_int_var: (tnoc_pkg::tnoc_clog2::i), line:70:14, endln:70:15 - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 |vpiStmt: \_begin: (tnoc_pkg::tnoc_clog2), line:71:17, endln:74:10 |vpiParent: @@ -10067,10 +10000,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:86:23, endln:86:29 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:86:23, endln:86:29 |vpiParent: \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiOperand: @@ -10107,10 +10041,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:87:39, endln:87:45 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:87:39, endln:87:45 |vpiParent: \_hier_path: (packet_config.size_x), line:87:25, endln:87:45 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiName:tnoc_clog2 @@ -10181,10 +10116,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:95:23, endln:95:29 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:95:23, endln:95:29 |vpiParent: \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiOperand: @@ -10221,10 +10157,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:96:39, endln:96:45 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:96:39, endln:96:45 |vpiParent: \_hier_path: (packet_config.size_y), line:96:25, endln:96:45 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiName:tnoc_clog2 @@ -10364,10 +10301,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:108:23, endln:108:39 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:108:23, endln:108:39 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiOperand: @@ -10404,10 +10342,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:109:39, endln:109:55 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:109:39, endln:109:55 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:109:25, endln:109:55 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiName:tnoc_clog2 @@ -10478,10 +10417,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:117:23, endln:117:27 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:117:23, endln:117:27 |vpiParent: \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiOperand: @@ -10518,10 +10458,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:118:39, endln:118:43 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:118:39, endln:118:43 |vpiParent: \_hier_path: (packet_config.tags), line:118:25, endln:118:43 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiName:tnoc_clog2 @@ -10592,10 +10533,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:126:23, endln:126:37 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:126:23, endln:126:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -10646,10 +10588,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:127:50, endln:127:64 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:127:50, endln:127:64 |vpiParent: \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -10745,10 +10688,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:134:67, endln:134:80 |vpiActual: - \_ref_obj: (max_byte_length), line:135:37, endln:135:52 + \_ref_obj: (tnoc_pkg::get_byte_length_width::max_byte_length), line:135:37, endln:135:52 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -10810,10 +10754,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:139:23, endln:139:38 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:139:23, endln:139:38 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -10850,10 +10795,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:140:39, endln:140:54 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:140:39, endln:140:54 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:140:25, endln:140:54 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiName:tnoc_clog2 @@ -10924,10 +10870,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:148:23, endln:148:37 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:148:23, endln:148:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -10969,10 +10916,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:149:39, endln:149:53 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:149:39, endln:149:53 |vpiParent: \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -11051,10 +10999,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:157:23, endln:157:33 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:157:23, endln:157:33 |vpiParent: \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -11096,10 +11045,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:158:39, endln:158:49 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:158:39, endln:158:49 |vpiParent: \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -11206,10 +11156,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (data_width), line:167:33, endln:167:43 + \_ref_obj: (tnoc_pkg::get_burst_length_width::data_width), line:167:33, endln:167:43 |vpiParent: \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_burst_length_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -11261,10 +11212,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (max_byte_length), line:168:38, endln:168:53 + \_ref_obj: (tnoc_pkg::get_burst_length_width::max_byte_length), line:168:38, endln:168:53 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_burst_length_width::max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -11393,15 +11345,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_request_packet_type::packet_type), line:204:52, endln:204:94 |vpiParent: - \_ref_obj: (tnoc_pkg::is_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:204:51, endln:204:94 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:203:68, endln:203:79 + \_operation: , line:204:51, endln:204:94 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:203:68, endln:203:79 |vpiIndex: \_constant: , line:204:64, endln:204:93 |vpiParent: @@ -11417,8 +11365,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:203:68, endln:203:79 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11472,15 +11418,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_response_packet_type::packet_type), line:208:50, endln:208:92 |vpiParent: - \_ref_obj: (tnoc_pkg::is_response_packet_type::packet_type) - |vpiParent: - \_operation: , line:208:13, endln:208:92 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:207:69, endln:207:80 + \_operation: , line:208:13, endln:208:92 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:207:69, endln:207:80 |vpiIndex: \_constant: , line:208:62, endln:208:91 |vpiParent: @@ -11496,8 +11438,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:207:69, endln:207:80 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11551,15 +11491,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_packet_with_payload_type::packet_type), line:212:50, endln:212:91 |vpiParent: - \_ref_obj: (tnoc_pkg::is_packet_with_payload_type::packet_type) - |vpiParent: - \_operation: , line:212:13, endln:212:91 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:211:73, endln:211:84 + \_operation: , line:212:13, endln:212:91 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:211:73, endln:211:84 |vpiIndex: \_constant: , line:212:62, endln:212:90 |vpiParent: @@ -11575,8 +11511,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:211:73, endln:211:84 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11635,15 +11569,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_header_only_packet_type::packet_type), line:216:52, endln:216:93 |vpiParent: - \_ref_obj: (tnoc_pkg::is_header_only_packet_type::packet_type) - |vpiParent: - \_operation: , line:216:51, endln:216:93 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:215:72, endln:215:83 + \_operation: , line:216:51, endln:216:93 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:215:72, endln:215:83 |vpiIndex: \_constant: , line:216:64, endln:216:92 |vpiParent: @@ -11659,8 +11589,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:215:72, endln:215:83 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11719,15 +11647,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_posted_request_packet_type::packet_type), line:220:54, endln:220:98 |vpiParent: - \_ref_obj: (tnoc_pkg::is_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:220:53, endln:220:98 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:219:75, endln:219:86 + \_operation: , line:220:53, endln:220:98 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:219:75, endln:219:86 |vpiIndex: \_constant: , line:220:66, endln:220:97 |vpiParent: @@ -11743,8 +11667,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:219:75, endln:219:86 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11798,15 +11720,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_non_posted_request_packet_type::packet_type), line:224:52, endln:224:96 |vpiParent: - \_ref_obj: (tnoc_pkg::is_non_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:224:13, endln:224:96 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type - |vpiActual: - \_io_decl: (packet_type), line:223:79, endln:223:90 + \_operation: , line:224:13, endln:224:96 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:223:79, endln:223:90 |vpiIndex: \_constant: , line:224:64, endln:224:95 |vpiParent: @@ -11822,8 +11740,6 @@ design: (work@tnoc_vc_splitter) \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiSigned:1 |vpiConstType:9 - |vpiActual: - \_io_decl: (packet_type), line:223:79, endln:223:90 |vpiInstance: \_package: tnoc_pkg (tnoc_pkg::), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:40:1, endln:400:11 |vpiTaskFunc: @@ -11884,8 +11800,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:229:13, endln:229:14 - |vpiParent: - \_assignment: , line:229:5, endln:229:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11906,8 +11820,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:230:14, endln:230:37 - |vpiParent: - \_assignment: , line:230:5, endln:230:37 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -12044,8 +11956,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:235:14, endln:235:15 - |vpiParent: - \_assignment: , line:235:5, endln:235:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -12130,8 +12040,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:241:13, endln:241:14 - |vpiParent: - \_assignment: , line:241:5, endln:241:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12250,10 +12158,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:239:70, endln:239:83 |vpiActual: - \_ref_obj: (address_width), line:245:28, endln:245:41 + \_ref_obj: (tnoc_pkg::get_request_header_width::address_width), line:245:28, endln:245:41 |vpiParent: \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiName:address_width + |vpiFullName:tnoc_pkg::get_request_header_width::address_width |vpiActual: \_typespec_member: (address_width), line:49:15, endln:49:28 |vpiLhs: @@ -12272,8 +12181,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:246:14, endln:246:36 - |vpiParent: - \_assignment: , line:246:5, endln:246:36 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -12358,8 +12265,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:252:13, endln:252:14 - |vpiParent: - \_assignment: , line:252:5, endln:252:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12467,8 +12372,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:256:14, endln:256:41 - |vpiParent: - \_assignment: , line:256:5, endln:256:41 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -12553,8 +12456,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:263:13, endln:263:14 - |vpiParent: - \_assignment: , line:263:5, endln:263:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12771,8 +12672,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:276:13, endln:276:14 - |vpiParent: - \_assignment: , line:276:5, endln:276:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12804,10 +12703,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:277:28, endln:277:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:277:28, endln:277:38 |vpiParent: \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -12842,10 +12742,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:278:28, endln:278:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:278:28, endln:278:38 |vpiParent: \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -12936,8 +12837,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:284:13, endln:284:14 - |vpiParent: - \_assignment: , line:284:5, endln:284:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12969,10 +12868,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:282:72, endln:282:85 |vpiActual: - \_ref_obj: (data_width), line:285:28, endln:285:38 + \_ref_obj: (tnoc_pkg::get_response_payload_width::data_width), line:285:28, endln:285:38 |vpiParent: \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_response_payload_width::data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -12991,8 +12891,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:286:14, endln:286:41 - |vpiParent: - \_assignment: , line:286:5, endln:286:41 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -13042,8 +12940,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:288:14, endln:288:15 - |vpiParent: - \_assignment: , line:288:5, endln:288:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13128,8 +13024,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:295:13, endln:295:14 - |vpiParent: - \_assignment: , line:295:5, endln:295:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -13346,8 +13240,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:317:13, endln:317:14 - |vpiParent: - \_assignment: , line:317:5, endln:317:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -13564,8 +13456,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:331:13, endln:331:14 - |vpiParent: - \_assignment: , line:331:5, endln:331:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -13586,8 +13476,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:332:14, endln:332:35 - |vpiParent: - \_assignment: , line:332:5, endln:332:35 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13608,8 +13496,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:333:14, endln:333:15 - |vpiParent: - \_assignment: , line:333:5, endln:333:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -13630,8 +13516,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:334:14, endln:334:15 - |vpiParent: - \_assignment: , line:334:5, endln:334:15 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -14109,8 +13993,6 @@ design: (work@tnoc_vc_splitter) |vpiBlocking:1 |vpiRhs: \_constant: , line:359:13, endln:359:14 - |vpiParent: - \_assignment: , line:359:5, endln:359:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15272,7 +15154,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::tnoc_clog2::result), line:69:5, endln:69:11 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2) + \_assignment: , line:69:5, endln:69:16 |vpiName:result |vpiFullName:tnoc_pkg::tnoc_clog2::result |vpiActual: @@ -15337,17 +15219,15 @@ design: (work@tnoc_vc_splitter) |vpiCondition: \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiParent: - \_ref_obj: (tnoc_pkg::tnoc_clog2::n) - |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2), line:70:33, endln:75:8 - |vpiName:n - |vpiFullName:tnoc_pkg::tnoc_clog2::n + \_begin: (tnoc_pkg::tnoc_clog2), line:70:33, endln:75:8 |vpiName:n |vpiFullName:tnoc_pkg::tnoc_clog2::n + |vpiActual: + \_io_decl: (n), line:66:48, endln:66:49 |vpiIndex: \_ref_obj: (tnoc_pkg::tnoc_clog2::i), line:71:13, endln:71:14 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2), line:70:33, endln:75:8 + \_bit_select: (tnoc_pkg::tnoc_clog2::n), line:71:11, endln:71:15 |vpiName:i |vpiFullName:tnoc_pkg::tnoc_clog2::i |vpiActual: @@ -15366,7 +15246,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_ref_obj: (tnoc_pkg::tnoc_clog2::i), line:72:19, endln:72:20 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2), line:71:17, endln:74:10 + \_assignment: , line:72:9, endln:72:20 |vpiName:i |vpiFullName:tnoc_pkg::tnoc_clog2::i |vpiActual: @@ -15374,7 +15254,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::tnoc_clog2::result), line:72:9, endln:72:15 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2), line:71:17, endln:74:10 + \_assignment: , line:72:9, endln:72:20 |vpiName:result |vpiFullName:tnoc_pkg::tnoc_clog2::result |vpiActual: @@ -15395,7 +15275,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_operation: , line:77:10, endln:77:19 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2) + \_operation: , line:77:9, endln:77:25 |vpiOpType:43 |vpiOperand: \_constant: , line:77:10, endln:77:11 @@ -15449,7 +15329,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_ref_obj: (tnoc_pkg::tnoc_clog2::result), line:81:14, endln:81:20 |vpiParent: - \_begin: (tnoc_pkg::tnoc_clog2), line:80:10, endln:82:8 + \_operation: , line:81:14, endln:81:24 |vpiName:result |vpiFullName:tnoc_pkg::tnoc_clog2::result |vpiActual: @@ -15486,7 +15366,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiParent: - \_function: (tnoc_pkg::get_id_x_width), line:85:3, endln:92:14 + \_operation: , line:86:9, endln:86:34 |vpiName:packet_config.size_x |vpiActual: \_ref_obj: (packet_config), line:86:9, endln:86:22 @@ -15496,10 +15376,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:86:23, endln:86:29 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:86:23, endln:86:29 |vpiParent: \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiOperand: \_constant: , line:86:33, endln:86:34 |vpiStmt: @@ -15528,10 +15409,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:87:39, endln:87:45 + \_ref_obj: (tnoc_pkg::get_id_x_width::size_x), line:87:39, endln:87:45 |vpiParent: \_hier_path: (packet_config.size_x), line:87:25, endln:87:45 |vpiName:size_x + |vpiFullName:tnoc_pkg::get_id_x_width::size_x |vpiName:tnoc_clog2 |vpiFunction: \_function: (tnoc_pkg::tnoc_clog2), line:66:3, endln:83:14 @@ -15576,7 +15458,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiParent: - \_function: (tnoc_pkg::get_id_y_width), line:94:3, endln:101:14 + \_operation: , line:95:9, endln:95:34 |vpiName:packet_config.size_y |vpiActual: \_ref_obj: (packet_config), line:95:9, endln:95:22 @@ -15586,10 +15468,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:95:23, endln:95:29 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:95:23, endln:95:29 |vpiParent: \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiOperand: \_constant: , line:95:33, endln:95:34 |vpiStmt: @@ -15618,10 +15501,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:96:39, endln:96:45 + \_ref_obj: (tnoc_pkg::get_id_y_width::size_y), line:96:39, endln:96:45 |vpiParent: \_hier_path: (packet_config.size_y), line:96:25, endln:96:45 |vpiName:size_y + |vpiFullName:tnoc_pkg::get_id_y_width::size_y |vpiName:tnoc_clog2 |vpiFunction: \_function: (tnoc_pkg::tnoc_clog2), line:66:3, endln:83:14 @@ -15727,7 +15611,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiParent: - \_function: (tnoc_pkg::get_vc_width), line:107:3, endln:114:14 + \_operation: , line:108:9, endln:108:44 |vpiName:packet_config.virtual_channels |vpiActual: \_ref_obj: (packet_config), line:108:9, endln:108:22 @@ -15737,10 +15621,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:108:23, endln:108:39 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:108:23, endln:108:39 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiOperand: \_constant: , line:108:43, endln:108:44 |vpiStmt: @@ -15769,10 +15654,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:109:39, endln:109:55 + \_ref_obj: (tnoc_pkg::get_vc_width::virtual_channels), line:109:39, endln:109:55 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:109:25, endln:109:55 |vpiName:virtual_channels + |vpiFullName:tnoc_pkg::get_vc_width::virtual_channels |vpiName:tnoc_clog2 |vpiFunction: \_function: (tnoc_pkg::tnoc_clog2), line:66:3, endln:83:14 @@ -15817,7 +15703,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiParent: - \_function: (tnoc_pkg::get_tag_width), line:116:3, endln:123:14 + \_operation: , line:117:9, endln:117:32 |vpiName:packet_config.tags |vpiActual: \_ref_obj: (packet_config), line:117:9, endln:117:22 @@ -15827,10 +15713,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:117:23, endln:117:27 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:117:23, endln:117:27 |vpiParent: \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiOperand: \_constant: , line:117:31, endln:117:32 |vpiStmt: @@ -15859,10 +15746,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:118:39, endln:118:43 + \_ref_obj: (tnoc_pkg::get_tag_width::tags), line:118:39, endln:118:43 |vpiParent: \_hier_path: (packet_config.tags), line:118:25, endln:118:43 |vpiName:tags + |vpiFullName:tnoc_pkg::get_tag_width::tags |vpiName:tnoc_clog2 |vpiFunction: \_function: (tnoc_pkg::tnoc_clog2), line:66:3, endln:83:14 @@ -15907,7 +15795,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiParent: - \_function: (tnoc_pkg::get_byte_size_width), line:125:3, endln:132:14 + \_operation: , line:126:9, endln:126:43 |vpiName:packet_config.max_data_width |vpiActual: \_ref_obj: (packet_config), line:126:9, endln:126:22 @@ -15917,10 +15805,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:126:23, endln:126:37 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:126:23, endln:126:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiOperand: \_constant: , line:126:41, endln:126:43 |vpiStmt: @@ -15953,7 +15842,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiParent: - \_func_call: (tnoc_clog2), line:127:25, endln:127:69 + \_operation: , line:127:36, endln:127:68 |vpiName:packet_config.max_data_width |vpiActual: \_ref_obj: (packet_config), line:127:36, endln:127:49 @@ -15963,10 +15852,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:127:50, endln:127:64 + \_ref_obj: (tnoc_pkg::get_byte_size_width::max_data_width), line:127:50, endln:127:64 |vpiParent: \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_size_width::max_data_width |vpiOperand: \_constant: , line:127:67, endln:127:68 |vpiName:tnoc_clog2 @@ -16024,7 +15914,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiParent: - \_func_call: (tnoc_clog2), line:135:12, endln:135:57 + \_operation: , line:135:23, endln:135:56 |vpiName:packet_config.max_byte_length |vpiActual: \_ref_obj: (packet_config), line:135:23, endln:135:36 @@ -16034,10 +15924,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:134:67, endln:134:80 |vpiActual: - \_ref_obj: (max_byte_length), line:135:37, endln:135:52 + \_ref_obj: (tnoc_pkg::get_byte_length_width::max_byte_length), line:135:37, endln:135:52 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_byte_length_width::max_byte_length |vpiOperand: \_constant: , line:135:55, endln:135:56 |vpiName:tnoc_clog2 @@ -16073,7 +15964,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiParent: - \_function: (tnoc_pkg::get_packed_byte_length_width), line:138:3, endln:145:14 + \_operation: , line:139:9, endln:139:43 |vpiName:packet_config.max_byte_length |vpiActual: \_ref_obj: (packet_config), line:139:9, endln:139:22 @@ -16083,10 +15974,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:139:23, endln:139:38 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:139:23, endln:139:38 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiOperand: \_constant: , line:139:42, endln:139:43 |vpiStmt: @@ -16115,10 +16007,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:140:39, endln:140:54 + \_ref_obj: (tnoc_pkg::get_packed_byte_length_width::max_byte_length), line:140:39, endln:140:54 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:140:25, endln:140:54 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_packed_byte_length_width::max_byte_length |vpiName:tnoc_clog2 |vpiFunction: \_function: (tnoc_pkg::tnoc_clog2), line:66:3, endln:83:14 @@ -16163,7 +16056,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiParent: - \_function: (tnoc_pkg::get_byte_offset_width), line:147:3, endln:154:14 + \_operation: , line:148:9, endln:148:43 |vpiName:packet_config.max_data_width |vpiActual: \_ref_obj: (packet_config), line:148:9, endln:148:22 @@ -16173,10 +16066,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:148:23, endln:148:37 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:148:23, endln:148:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiOperand: \_constant: , line:148:41, endln:148:43 |vpiStmt: @@ -16200,7 +16094,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiParent: - \_func_call: (tnoc_clog2), line:149:14, endln:149:58 + \_operation: , line:149:25, endln:149:57 |vpiName:packet_config.max_data_width |vpiActual: \_ref_obj: (packet_config), line:149:25, endln:149:38 @@ -16210,10 +16104,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:149:39, endln:149:53 + \_ref_obj: (tnoc_pkg::get_byte_offset_width::max_data_width), line:149:39, endln:149:53 |vpiParent: \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiName:max_data_width + |vpiFullName:tnoc_pkg::get_byte_offset_width::max_data_width |vpiOperand: \_constant: , line:149:56, endln:149:57 |vpiName:tnoc_clog2 @@ -16260,7 +16155,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiParent: - \_function: (tnoc_pkg::get_byte_end_width), line:156:3, endln:163:14 + \_operation: , line:157:9, endln:157:39 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:157:9, endln:157:22 @@ -16270,10 +16165,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:157:23, endln:157:33 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:157:23, endln:157:33 |vpiParent: \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiOperand: \_constant: , line:157:37, endln:157:39 |vpiStmt: @@ -16297,7 +16193,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiParent: - \_func_call: (tnoc_clog2), line:158:14, endln:158:54 + \_operation: , line:158:25, endln:158:53 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:158:25, endln:158:38 @@ -16307,10 +16203,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:158:39, endln:158:49 + \_ref_obj: (tnoc_pkg::get_byte_end_width::data_width), line:158:39, endln:158:49 |vpiParent: \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_byte_end_width::data_width |vpiOperand: \_constant: , line:158:52, endln:158:53 |vpiName:tnoc_clog2 @@ -16370,12 +16267,12 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_operation: , line:167:19, endln:167:47 |vpiParent: - \_begin: (tnoc_pkg::get_burst_length_width) + \_assignment: , line:167:5, endln:167:47 |vpiOpType:12 |vpiOperand: \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiParent: - \_begin: (tnoc_pkg::get_burst_length_width) + \_operation: , line:167:19, endln:167:47 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:167:19, endln:167:32 @@ -16385,16 +16282,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (data_width), line:167:33, endln:167:43 + \_ref_obj: (tnoc_pkg::get_burst_length_width::data_width), line:167:33, endln:167:43 |vpiParent: \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_burst_length_width::data_width |vpiOperand: \_constant: , line:167:46, endln:167:47 |vpiLhs: \_ref_obj: (tnoc_pkg::get_burst_length_width::byte_width), line:167:5, endln:167:15 |vpiParent: - \_begin: (tnoc_pkg::get_burst_length_width) + \_assignment: , line:167:5, endln:167:47 |vpiName:byte_width |vpiFullName:tnoc_pkg::get_burst_length_width::byte_width |vpiActual: @@ -16417,12 +16315,12 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_operation: , line:168:24, endln:168:66 |vpiParent: - \_func_call: (tnoc_clog2), line:168:12, endln:168:72 + \_operation: , line:168:23, endln:168:71 |vpiOpType:12 |vpiOperand: \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiParent: - \_func_call: (tnoc_clog2), line:168:12, endln:168:72 + \_operation: , line:168:24, endln:168:66 |vpiName:packet_config.max_byte_length |vpiActual: \_ref_obj: (packet_config), line:168:24, endln:168:37 @@ -16432,10 +16330,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (max_byte_length), line:168:38, endln:168:53 + \_ref_obj: (tnoc_pkg::get_burst_length_width::max_byte_length), line:168:38, endln:168:53 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiName:max_byte_length + |vpiFullName:tnoc_pkg::get_burst_length_width::max_byte_length |vpiOperand: \_ref_obj: (tnoc_pkg::get_burst_length_width::byte_width), line:168:56, endln:168:66 |vpiParent: @@ -16479,7 +16378,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_ref_obj: (tnoc_pkg::is_valid_packet_type::packet_type), line:200:13, endln:200:24 |vpiParent: - \_function: (tnoc_pkg::is_valid_packet_type), line:199:3, endln:201:14 + \_operation: , line:200:13, endln:200:47 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_valid_packet_type::packet_type |vpiActual: @@ -16544,13 +16443,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_request_packet_type::packet_type), line:204:52, endln:204:94 |vpiParent: - \_ref_obj: (tnoc_pkg::is_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:204:51, endln:204:94 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type + \_operation: , line:204:51, endln:204:94 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:203:68, endln:203:79 |vpiIndex: \_constant: , line:204:64, endln:204:93 |vpiInstance: @@ -16600,13 +16497,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_response_packet_type::packet_type), line:208:50, endln:208:92 |vpiParent: - \_ref_obj: (tnoc_pkg::is_response_packet_type::packet_type) - |vpiParent: - \_operation: , line:208:13, endln:208:92 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type + \_operation: , line:208:13, endln:208:92 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_response_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:207:69, endln:207:80 |vpiIndex: \_constant: , line:208:62, endln:208:91 |vpiInstance: @@ -16656,13 +16551,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_packet_with_payload_type::packet_type), line:212:50, endln:212:91 |vpiParent: - \_ref_obj: (tnoc_pkg::is_packet_with_payload_type::packet_type) - |vpiParent: - \_operation: , line:212:13, endln:212:91 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type + \_operation: , line:212:13, endln:212:91 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_packet_with_payload_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:211:73, endln:211:84 |vpiIndex: \_constant: , line:212:62, endln:212:90 |vpiInstance: @@ -16717,13 +16610,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_header_only_packet_type::packet_type), line:216:52, endln:216:93 |vpiParent: - \_ref_obj: (tnoc_pkg::is_header_only_packet_type::packet_type) - |vpiParent: - \_operation: , line:216:51, endln:216:93 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type + \_operation: , line:216:51, endln:216:93 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_header_only_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:215:72, endln:215:83 |vpiIndex: \_constant: , line:216:64, endln:216:92 |vpiInstance: @@ -16778,13 +16669,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_posted_request_packet_type::packet_type), line:220:54, endln:220:98 |vpiParent: - \_ref_obj: (tnoc_pkg::is_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:220:53, endln:220:98 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type + \_operation: , line:220:53, endln:220:98 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:219:75, endln:219:86 |vpiIndex: \_constant: , line:220:66, endln:220:97 |vpiInstance: @@ -16834,13 +16723,11 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (tnoc_pkg::is_non_posted_request_packet_type::packet_type), line:224:52, endln:224:96 |vpiParent: - \_ref_obj: (tnoc_pkg::is_non_posted_request_packet_type::packet_type) - |vpiParent: - \_operation: , line:224:13, endln:224:96 - |vpiName:packet_type - |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type + \_operation: , line:224:13, endln:224:96 |vpiName:packet_type |vpiFullName:tnoc_pkg::is_non_posted_request_packet_type::packet_type + |vpiActual: + \_io_decl: (packet_type), line:223:79, endln:223:90 |vpiIndex: \_constant: , line:224:64, endln:224:95 |vpiInstance: @@ -16888,7 +16775,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:229:5, endln:229:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:229:5, endln:229:14 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -16904,7 +16791,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:230:5, endln:230:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:230:5, endln:230:37 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -16933,7 +16820,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:231:5, endln:231:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:231:5, endln:231:50 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -16962,7 +16849,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:232:5, endln:232:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:232:5, endln:232:50 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -16991,7 +16878,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:233:5, endln:233:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:233:5, endln:233:41 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -17020,7 +16907,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:234:5, endln:234:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:234:5, endln:234:42 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -17036,7 +16923,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_common_header_field_width::width), line:235:5, endln:235:10 |vpiParent: - \_begin: (tnoc_pkg::get_common_header_field_width) + \_assignment: , line:235:5, endln:235:15 |vpiName:width |vpiFullName:tnoc_pkg::get_common_header_field_width::width |vpiActual: @@ -17098,7 +16985,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:241:5, endln:241:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:241:5, endln:241:14 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17127,7 +17014,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:242:5, endln:242:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:242:5, endln:242:58 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17156,7 +17043,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:243:5, endln:243:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:243:5, endln:243:48 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17185,7 +17072,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:244:5, endln:244:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:244:5, endln:244:57 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17199,7 +17086,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:245:5, endln:245:41 |vpiName:packet_config.address_width |vpiActual: \_ref_obj: (packet_config), line:245:14, endln:245:27 @@ -17209,14 +17096,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:239:70, endln:239:83 |vpiActual: - \_ref_obj: (address_width), line:245:28, endln:245:41 + \_ref_obj: (tnoc_pkg::get_request_header_width::address_width), line:245:28, endln:245:41 |vpiParent: \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiName:address_width + |vpiFullName:tnoc_pkg::get_request_header_width::address_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:245:5, endln:245:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:245:5, endln:245:41 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17232,7 +17120,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_width::width), line:246:5, endln:246:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_width) + \_assignment: , line:246:5, endln:246:36 |vpiName:width |vpiFullName:tnoc_pkg::get_request_header_width::width |vpiActual: @@ -17294,7 +17182,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_width::width), line:252:5, endln:252:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_width) + \_assignment: , line:252:5, endln:252:14 |vpiName:width |vpiFullName:tnoc_pkg::get_response_header_width::width |vpiActual: @@ -17323,7 +17211,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_width::width), line:253:5, endln:253:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_width) + \_assignment: , line:253:5, endln:253:58 |vpiName:width |vpiFullName:tnoc_pkg::get_response_header_width::width |vpiActual: @@ -17352,7 +17240,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_width::width), line:254:5, endln:254:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_width) + \_assignment: , line:254:5, endln:254:48 |vpiName:width |vpiFullName:tnoc_pkg::get_response_header_width::width |vpiActual: @@ -17381,7 +17269,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_width::width), line:255:5, endln:255:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_width) + \_assignment: , line:255:5, endln:255:50 |vpiName:width |vpiFullName:tnoc_pkg::get_response_header_width::width |vpiActual: @@ -17397,7 +17285,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_width::width), line:256:5, endln:256:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_width) + \_assignment: , line:256:5, endln:256:41 |vpiName:width |vpiFullName:tnoc_pkg::get_response_header_width::width |vpiActual: @@ -17459,7 +17347,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_width::width), line:263:5, endln:263:10 |vpiParent: - \_begin: (tnoc_pkg::get_header_width) + \_assignment: , line:263:5, endln:263:14 |vpiName:width |vpiFullName:tnoc_pkg::get_header_width::width |vpiActual: @@ -17525,7 +17413,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_width::width), line:265:7, endln:265:12 |vpiParent: - \_begin: (tnoc_pkg::get_header_width), line:264:58, endln:266:8 + \_assignment: , line:265:7, endln:265:54 |vpiName:width |vpiFullName:tnoc_pkg::get_header_width::width |vpiActual: @@ -17591,7 +17479,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_width::width), line:268:7, endln:268:12 |vpiParent: - \_begin: (tnoc_pkg::get_header_width), line:267:59, endln:269:8 + \_assignment: , line:268:7, endln:268:55 |vpiName:width |vpiFullName:tnoc_pkg::get_header_width::width |vpiActual: @@ -17653,7 +17541,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_payload_width::width), line:276:5, endln:276:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_assignment: , line:276:5, endln:276:14 |vpiName:width |vpiFullName:tnoc_pkg::get_request_payload_width::width |vpiActual: @@ -17667,7 +17555,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_assignment: , line:277:5, endln:277:38 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:277:14, endln:277:27 @@ -17677,14 +17565,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:277:28, endln:277:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:277:28, endln:277:38 |vpiParent: \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_payload_width::width), line:277:5, endln:277:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_assignment: , line:277:5, endln:277:38 |vpiName:width |vpiFullName:tnoc_pkg::get_request_payload_width::width |vpiActual: @@ -17698,12 +17587,12 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_operation: , line:278:14, endln:278:42 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_assignment: , line:278:5, endln:278:42 |vpiOpType:12 |vpiOperand: \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_operation: , line:278:14, endln:278:42 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:278:14, endln:278:27 @@ -17713,16 +17602,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:278:28, endln:278:38 + \_ref_obj: (tnoc_pkg::get_request_payload_width::data_width), line:278:28, endln:278:38 |vpiParent: \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_request_payload_width::data_width |vpiOperand: \_constant: , line:278:41, endln:278:42 |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_payload_width::width), line:278:5, endln:278:10 |vpiParent: - \_begin: (tnoc_pkg::get_request_payload_width) + \_assignment: , line:278:5, endln:278:42 |vpiName:width |vpiFullName:tnoc_pkg::get_request_payload_width::width |vpiActual: @@ -17784,7 +17674,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:284:5, endln:284:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:284:5, endln:284:14 |vpiName:width |vpiFullName:tnoc_pkg::get_response_payload_width::width |vpiActual: @@ -17798,7 +17688,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:285:5, endln:285:38 |vpiName:packet_config.data_width |vpiActual: \_ref_obj: (packet_config), line:285:14, endln:285:27 @@ -17808,14 +17698,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:282:72, endln:282:85 |vpiActual: - \_ref_obj: (data_width), line:285:28, endln:285:38 + \_ref_obj: (tnoc_pkg::get_response_payload_width::data_width), line:285:28, endln:285:38 |vpiParent: \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiName:data_width + |vpiFullName:tnoc_pkg::get_response_payload_width::data_width |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:285:5, endln:285:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:285:5, endln:285:38 |vpiName:width |vpiFullName:tnoc_pkg::get_response_payload_width::width |vpiActual: @@ -17831,7 +17722,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:286:5, endln:286:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:286:5, endln:286:41 |vpiName:width |vpiFullName:tnoc_pkg::get_response_payload_width::width |vpiActual: @@ -17860,7 +17751,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:287:5, endln:287:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:287:5, endln:287:47 |vpiName:width |vpiFullName:tnoc_pkg::get_response_payload_width::width |vpiActual: @@ -17876,7 +17767,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_payload_width::width), line:288:5, endln:288:10 |vpiParent: - \_begin: (tnoc_pkg::get_response_payload_width) + \_assignment: , line:288:5, endln:288:15 |vpiName:width |vpiFullName:tnoc_pkg::get_response_payload_width::width |vpiActual: @@ -17938,7 +17829,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_payload_width::width), line:295:5, endln:295:10 |vpiParent: - \_begin: (tnoc_pkg::get_payload_width) + \_assignment: , line:295:5, endln:295:14 |vpiName:width |vpiFullName:tnoc_pkg::get_payload_width::width |vpiActual: @@ -18004,7 +17895,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_payload_width::width), line:297:7, endln:297:12 |vpiParent: - \_begin: (tnoc_pkg::get_payload_width), line:296:59, endln:298:8 + \_assignment: , line:297:7, endln:297:55 |vpiName:width |vpiFullName:tnoc_pkg::get_payload_width::width |vpiActual: @@ -18070,7 +17961,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_payload_width::width), line:300:7, endln:300:12 |vpiParent: - \_begin: (tnoc_pkg::get_payload_width), line:299:60, endln:301:8 + \_assignment: , line:300:7, endln:300:56 |vpiName:width |vpiFullName:tnoc_pkg::get_payload_width::width |vpiActual: @@ -18132,7 +18023,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_data_width::width), line:317:5, endln:317:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_data_width) + \_assignment: , line:317:5, endln:317:14 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_data_width::width |vpiActual: @@ -18198,7 +18089,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_data_width::width), line:319:7, endln:319:12 |vpiParent: - \_begin: (tnoc_pkg::get_flit_data_width), line:318:63, endln:320:8 + \_assignment: , line:319:7, endln:319:59 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_data_width::width |vpiActual: @@ -18264,7 +18155,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_data_width::width), line:322:7, endln:322:12 |vpiParent: - \_begin: (tnoc_pkg::get_flit_data_width), line:321:51, endln:323:8 + \_assignment: , line:322:7, endln:322:47 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_data_width::width |vpiActual: @@ -18326,7 +18217,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_width::width), line:331:5, endln:331:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_width) + \_assignment: , line:331:5, endln:331:14 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_width::width |vpiActual: @@ -18342,7 +18233,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_width::width), line:332:5, endln:332:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_width) + \_assignment: , line:332:5, endln:332:35 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_width::width |vpiActual: @@ -18358,7 +18249,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_width::width), line:333:5, endln:333:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_width) + \_assignment: , line:333:5, endln:333:15 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_width::width |vpiActual: @@ -18374,7 +18265,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_width::width), line:334:5, endln:334:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_width) + \_assignment: , line:334:5, endln:334:15 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_width::width |vpiActual: @@ -18403,7 +18294,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_flit_width::width), line:335:5, endln:335:10 |vpiParent: - \_begin: (tnoc_pkg::get_flit_width) + \_assignment: , line:335:5, endln:335:48 |vpiName:width |vpiFullName:tnoc_pkg::get_flit_width::width |vpiActual: @@ -18489,7 +18380,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_flits::header_width), line:343:5, endln:343:17 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_flits) + \_assignment: , line:343:5, endln:343:60 |vpiName:header_width |vpiFullName:tnoc_pkg::get_request_header_flits::header_width |vpiActual: @@ -18518,7 +18409,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_request_header_flits::flit_width), line:344:5, endln:344:15 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_flits) + \_assignment: , line:344:5, endln:344:55 |vpiName:flit_width |vpiFullName:tnoc_pkg::get_request_header_flits::flit_width |vpiActual: @@ -18535,17 +18426,17 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_operation: , line:345:13, endln:345:42 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_flits) + \_operation: , line:345:12, endln:345:56 |vpiOpType:11 |vpiOperand: \_operation: , line:345:13, endln:345:38 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_flits) + \_operation: , line:345:13, endln:345:42 |vpiOpType:24 |vpiOperand: \_ref_obj: (tnoc_pkg::get_request_header_flits::header_width), line:345:13, endln:345:25 |vpiParent: - \_begin: (tnoc_pkg::get_request_header_flits) + \_operation: , line:345:13, endln:345:38 |vpiName:header_width |vpiFullName:tnoc_pkg::get_request_header_flits::header_width |vpiActual: @@ -18637,7 +18528,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_flits::header_width), line:351:5, endln:351:17 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_flits) + \_assignment: , line:351:5, endln:351:61 |vpiName:header_width |vpiFullName:tnoc_pkg::get_response_header_flits::header_width |vpiActual: @@ -18666,7 +18557,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_response_header_flits::flit_width), line:352:5, endln:352:15 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_flits) + \_assignment: , line:352:5, endln:352:55 |vpiName:flit_width |vpiFullName:tnoc_pkg::get_response_header_flits::flit_width |vpiActual: @@ -18683,17 +18574,17 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_operation: , line:353:13, endln:353:42 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_flits) + \_operation: , line:353:12, endln:353:56 |vpiOpType:11 |vpiOperand: \_operation: , line:353:13, endln:353:38 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_flits) + \_operation: , line:353:13, endln:353:42 |vpiOpType:24 |vpiOperand: \_ref_obj: (tnoc_pkg::get_response_header_flits::header_width), line:353:13, endln:353:25 |vpiParent: - \_begin: (tnoc_pkg::get_response_header_flits) + \_operation: , line:353:13, endln:353:38 |vpiName:header_width |vpiFullName:tnoc_pkg::get_response_header_flits::header_width |vpiActual: @@ -18761,7 +18652,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_flits::flits), line:359:5, endln:359:10 |vpiParent: - \_begin: (tnoc_pkg::get_header_flits) + \_assignment: , line:359:5, endln:359:14 |vpiName:flits |vpiFullName:tnoc_pkg::get_header_flits::flits |vpiActual: @@ -18827,7 +18718,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_flits::flits), line:361:7, endln:361:12 |vpiParent: - \_begin: (tnoc_pkg::get_header_flits), line:360:58, endln:362:8 + \_assignment: , line:361:7, endln:361:54 |vpiName:flits |vpiFullName:tnoc_pkg::get_header_flits::flits |vpiActual: @@ -18893,7 +18784,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_header_flits::flits), line:364:7, endln:364:12 |vpiParent: - \_begin: (tnoc_pkg::get_header_flits), line:363:59, endln:365:8 + \_assignment: , line:364:7, endln:364:55 |vpiName:flits |vpiFullName:tnoc_pkg::get_header_flits::flits |vpiActual: @@ -18940,7 +18831,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_ref_obj: (tnoc_pkg::is_local_port::port_type), line:379:13, endln:379:22 |vpiParent: - \_function: (tnoc_pkg::is_local_port), line:378:3, endln:380:14 + \_operation: , line:379:13, endln:379:41 |vpiName:port_type |vpiFullName:tnoc_pkg::is_local_port::port_type |vpiActual: @@ -18977,7 +18868,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_ref_obj: (tnoc_pkg::is_interna_port::port_type), line:383:13, endln:383:22 |vpiParent: - \_function: (tnoc_pkg::is_interna_port), line:382:3, endln:384:14 + \_operation: , line:383:13, endln:383:44 |vpiName:port_type |vpiFullName:tnoc_pkg::is_interna_port::port_type |vpiActual: @@ -19054,7 +18945,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_ref_obj: (tnoc_pkg::get_port_flit_width::flit_width), line:392:5, endln:392:15 |vpiParent: - \_begin: (tnoc_pkg::get_port_flit_width) + \_assignment: , line:392:5, endln:392:48 |vpiName:flit_width |vpiFullName:tnoc_pkg::get_port_flit_width::flit_width |vpiActual: @@ -19066,7 +18957,7 @@ design: (work@tnoc_vc_splitter) |vpiCondition: \_func_call: (is_local_port), line:393:9, endln:393:33 |vpiParent: - \_if_else: , line:393:5, endln:398:8 + \_begin: (tnoc_pkg::get_port_flit_width) |vpiArgument: \_ref_obj: (tnoc_pkg::get_port_flit_width::port_type), line:393:23, endln:393:32 |vpiParent: @@ -19095,7 +18986,7 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_ref_obj: (tnoc_pkg::get_port_flit_width::channels), line:394:14, endln:394:22 |vpiParent: - \_begin: (tnoc_pkg::get_port_flit_width), line:393:35, endln:395:8 + \_operation: , line:394:14, endln:394:35 |vpiName:channels |vpiFullName:tnoc_pkg::get_port_flit_width::channels |vpiActual: @@ -19280,7 +19171,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (receiver_if.valid[i]), line:417:33, endln:417:53 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:417:7, endln:417:53 |vpiName:receiver_if.valid[i] |vpiActual: \_ref_obj: (receiver_if), line:417:33, endln:417:44 @@ -19290,39 +19181,35 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_bit_select: (valid) |vpiParent: - \_ref_obj: (valid) - |vpiParent: - \_begin: , line:416:17, endln:420:8 - |vpiName:valid + \_assignment: , line:417:7, endln:417:53 |vpiName:valid |vpiIndex: \_ref_obj: (i), line:417:51, endln:417:52 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_bit_select: (valid) |vpiName:i |vpiLhs: \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:417:7, endln:417:53 |vpiName:sender_if[i].valid |vpiActual: - \_bit_select: (sender_if), line:417:7, endln:417:16 + \_bit_select: (sender_if[i]), line:417:7, endln:417:16 |vpiParent: - \_ref_obj: (sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 - |vpiName:sender_if[i] + \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:sender_if + |vpiFullName:sender_if[i] |vpiIndex: \_ref_obj: (i), line:417:17, endln:417:18 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:417:7, endln:417:53 |vpiName:i |vpiActual: - \_ref_obj: (valid) + \_ref_obj: (sender_if[i].valid) |vpiParent: \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:valid + |vpiFullName:sender_if[i].valid |vpiStmt: \_assignment: , line:418:7, endln:418:51 |vpiParent: @@ -19332,20 +19219,18 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:418:7, endln:418:51 |vpiName:sender_if[i].ready |vpiActual: - \_bit_select: (sender_if), line:418:33, endln:418:42 + \_bit_select: (sender_if[i]), line:418:33, endln:418:42 |vpiParent: - \_ref_obj: (sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 - |vpiName:sender_if[i] + \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiName:sender_if + |vpiFullName:sender_if[i] |vpiIndex: \_ref_obj: (i), line:418:43, endln:418:44 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:418:7, endln:418:51 |vpiName:i |vpiActual: \_ref_obj: (ready), line:418:46, endln:418:51 @@ -19355,7 +19240,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:418:7, endln:418:51 |vpiName:receiver_if.ready[i] |vpiActual: \_ref_obj: (receiver_if) @@ -19363,19 +19248,17 @@ design: (work@tnoc_vc_splitter) \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiName:receiver_if |vpiActual: - \_bit_select: (receiver_if.ready[i]), line:418:19, endln:418:24 + \_bit_select: (receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiParent: - \_ref_obj: (receiver_if.ready[i]) - |vpiParent: - \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 - |vpiName:receiver_if.ready[i] + \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiName:ready - |vpiFullName:receiver_if.ready[i] + |vpiFullName:receiver_if.ready[i].ready |vpiIndex: - \_ref_obj: (i), line:418:25, endln:418:26 + \_ref_obj: (receiver_if.ready[i].i), line:418:25, endln:418:26 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_bit_select: (receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiName:i + |vpiFullName:receiver_if.ready[i].i |vpiStmt: \_assignment: , line:419:7, endln:419:54 |vpiParent: @@ -19385,20 +19268,18 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:419:7, endln:419:54 |vpiName:sender_if[i].vc_ready |vpiActual: - \_bit_select: (sender_if), line:419:33, endln:419:42 + \_bit_select: (sender_if[i]), line:419:33, endln:419:42 |vpiParent: - \_ref_obj: (sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 - |vpiName:sender_if[i] + \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiName:sender_if + |vpiFullName:sender_if[i] |vpiIndex: \_ref_obj: (i), line:419:43, endln:419:44 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:419:7, endln:419:54 |vpiName:i |vpiActual: \_ref_obj: (vc_ready), line:419:46, endln:419:54 @@ -19408,7 +19289,7 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_assignment: , line:419:7, endln:419:54 |vpiName:receiver_if.vc_ready[i] |vpiActual: \_ref_obj: (receiver_if) @@ -19416,19 +19297,17 @@ design: (work@tnoc_vc_splitter) \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiName:receiver_if |vpiActual: - \_bit_select: (receiver_if.vc_ready[i]), line:419:19, endln:419:27 + \_bit_select: (receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiParent: - \_ref_obj: (receiver_if.vc_ready[i]) - |vpiParent: - \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 - |vpiName:receiver_if.vc_ready[i] + \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiName:vc_ready - |vpiFullName:receiver_if.vc_ready[i] + |vpiFullName:receiver_if.vc_ready[i].vc_ready |vpiIndex: - \_ref_obj: (i), line:419:28, endln:419:29 + \_ref_obj: (receiver_if.vc_ready[i].i), line:419:28, endln:419:29 |vpiParent: - \_begin: , line:416:17, endln:420:8 + \_bit_select: (receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiName:i + |vpiFullName:receiver_if.vc_ready[i].i |vpiAlwaysType:2 |vpiStmt: \_gen_if_else: , line:422:5, endln:431:8 @@ -19458,7 +19337,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (receiver_if.flit[i]), line:424:29, endln:424:48 |vpiParent: - \_begin: , line:423:19, endln:425:10 + \_assignment: , line:424:9, endln:424:48 |vpiName:receiver_if.flit[i] |vpiActual: \_ref_obj: (receiver_if), line:424:29, endln:424:40 @@ -19468,39 +19347,35 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_bit_select: (flit) |vpiParent: - \_ref_obj: (flit) - |vpiParent: - \_begin: , line:423:19, endln:425:10 - |vpiName:flit + \_assignment: , line:424:9, endln:424:48 |vpiName:flit |vpiIndex: \_ref_obj: (i), line:424:46, endln:424:47 |vpiParent: - \_begin: , line:423:19, endln:425:10 + \_bit_select: (flit) |vpiName:i |vpiLhs: \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiParent: - \_begin: , line:423:19, endln:425:10 + \_assignment: , line:424:9, endln:424:48 |vpiName:sender_if[i].flit |vpiActual: - \_bit_select: (sender_if), line:424:9, endln:424:18 + \_bit_select: (sender_if[i]), line:424:9, endln:424:18 |vpiParent: - \_ref_obj: (sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 - |vpiName:sender_if[i] + \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:sender_if + |vpiFullName:sender_if[i] |vpiIndex: \_ref_obj: (i), line:424:19, endln:424:20 |vpiParent: - \_begin: , line:423:19, endln:425:10 + \_assignment: , line:424:9, endln:424:48 |vpiName:i |vpiActual: - \_ref_obj: (flit) + \_ref_obj: (sender_if[i].flit) |vpiParent: \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:flit + |vpiFullName:sender_if[i].flit |vpiAlwaysType:2 |vpiElseStmt: \_named_begin: (g) @@ -19520,7 +19395,7 @@ design: (work@tnoc_vc_splitter) |vpiRhs: \_hier_path: (receiver_if.flit), line:429:29, endln:429:45 |vpiParent: - \_begin: , line:428:19, endln:430:10 + \_assignment: , line:429:9, endln:429:45 |vpiName:receiver_if.flit |vpiActual: \_ref_obj: (receiver_if), line:429:29, endln:429:40 @@ -19535,26 +19410,25 @@ design: (work@tnoc_vc_splitter) |vpiLhs: \_hier_path: (sender_if[i].flit), line:429:9, endln:429:18 |vpiParent: - \_begin: , line:428:19, endln:430:10 + \_assignment: , line:429:9, endln:429:45 |vpiName:sender_if[i].flit |vpiActual: - \_bit_select: (sender_if), line:429:9, endln:429:18 + \_bit_select: (sender_if[i]), line:429:9, endln:429:18 |vpiParent: - \_ref_obj: (sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].flit), line:429:9, endln:429:18 - |vpiName:sender_if[i] + \_hier_path: (sender_if[i].flit), line:429:9, endln:429:18 |vpiName:sender_if + |vpiFullName:sender_if[i] |vpiIndex: \_ref_obj: (i), line:429:19, endln:429:20 |vpiParent: - \_begin: , line:428:19, endln:430:10 + \_assignment: , line:429:9, endln:429:45 |vpiName:i |vpiActual: - \_ref_obj: (flit) + \_ref_obj: (sender_if[i].flit) |vpiParent: \_hier_path: (sender_if[i].flit), line:429:9, endln:429:18 |vpiName:flit + |vpiFullName:sender_if[i].flit |vpiAlwaysType:2 |uhdmtopModules: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 @@ -20398,25 +20272,19 @@ design: (work@tnoc_vc_splitter) |vpiCondition: \_bit_select: (work@tnoc_vc_splitter.tnoc_clog2.n), line:71:11, endln:71:15 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.tnoc_clog2.n) - |vpiParent: - \_if_stmt: , line:71:7, endln:74:10 - |vpiName:n - |vpiFullName:work@tnoc_vc_splitter.tnoc_clog2.n - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 + \_if_stmt: , line:71:7, endln:74:10 |vpiName:n |vpiFullName:work@tnoc_vc_splitter.tnoc_clog2.n + |vpiActual: + \_io_decl: (n), line:66:48, endln:66:49 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.tnoc_clog2.n.i), line:71:13, endln:71:14 + \_ref_obj: (work@tnoc_vc_splitter.tnoc_clog2.i), line:71:13, endln:71:14 |vpiParent: \_bit_select: (work@tnoc_vc_splitter.tnoc_clog2.n), line:71:11, endln:71:15 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.tnoc_clog2.n.i + |vpiFullName:work@tnoc_vc_splitter.tnoc_clog2.i |vpiActual: \_int_var: (tnoc_pkg::tnoc_clog2::i), line:70:14, endln:70:15 - |vpiActual: - \_io_decl: (n), line:66:48, endln:66:49 |vpiStmt: \_begin: (work@tnoc_vc_splitter.tnoc_clog2), line:71:17, endln:74:10 |vpiParent: @@ -20563,10 +20431,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:86:23, endln:86:29 + \_ref_obj: (work@tnoc_vc_splitter.get_id_x_width.size_x), line:86:23, endln:86:29 |vpiParent: \_hier_path: (packet_config.size_x), line:86:9, endln:86:29 |vpiName:size_x + |vpiFullName:work@tnoc_vc_splitter.get_id_x_width.size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiOperand: @@ -20597,10 +20466,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:85:60, endln:85:73 |vpiActual: - \_ref_obj: (size_x), line:87:39, endln:87:45 + \_ref_obj: (work@tnoc_vc_splitter.get_id_x_width.size_x), line:87:39, endln:87:45 |vpiParent: \_hier_path: (packet_config.size_x), line:87:25, endln:87:45 |vpiName:size_x + |vpiFullName:work@tnoc_vc_splitter.get_id_x_width.size_x |vpiActual: \_typespec_member: (size_x), line:45:15, endln:45:21 |vpiName:tnoc_clog2 @@ -20659,10 +20529,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:95:23, endln:95:29 + \_ref_obj: (work@tnoc_vc_splitter.get_id_y_width.size_y), line:95:23, endln:95:29 |vpiParent: \_hier_path: (packet_config.size_y), line:95:9, endln:95:29 |vpiName:size_y + |vpiFullName:work@tnoc_vc_splitter.get_id_y_width.size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiOperand: @@ -20693,10 +20564,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:94:60, endln:94:73 |vpiActual: - \_ref_obj: (size_y), line:96:39, endln:96:45 + \_ref_obj: (work@tnoc_vc_splitter.get_id_y_width.size_y), line:96:39, endln:96:45 |vpiParent: \_hier_path: (packet_config.size_y), line:96:25, endln:96:45 |vpiName:size_y + |vpiFullName:work@tnoc_vc_splitter.get_id_y_width.size_y |vpiActual: \_typespec_member: (size_y), line:46:15, endln:46:21 |vpiName:tnoc_clog2 @@ -20818,10 +20690,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:108:23, endln:108:39 + \_ref_obj: (work@tnoc_vc_splitter.get_vc_width.virtual_channels), line:108:23, endln:108:39 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:108:9, endln:108:39 |vpiName:virtual_channels + |vpiFullName:work@tnoc_vc_splitter.get_vc_width.virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiOperand: @@ -20852,10 +20725,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:107:58, endln:107:71 |vpiActual: - \_ref_obj: (virtual_channels), line:109:39, endln:109:55 + \_ref_obj: (work@tnoc_vc_splitter.get_vc_width.virtual_channels), line:109:39, endln:109:55 |vpiParent: \_hier_path: (packet_config.virtual_channels), line:109:25, endln:109:55 |vpiName:virtual_channels + |vpiFullName:work@tnoc_vc_splitter.get_vc_width.virtual_channels |vpiActual: \_typespec_member: (virtual_channels), line:47:15, endln:47:31 |vpiName:tnoc_clog2 @@ -20914,10 +20788,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:117:23, endln:117:27 + \_ref_obj: (work@tnoc_vc_splitter.get_tag_width.tags), line:117:23, endln:117:27 |vpiParent: \_hier_path: (packet_config.tags), line:117:9, endln:117:27 |vpiName:tags + |vpiFullName:work@tnoc_vc_splitter.get_tag_width.tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiOperand: @@ -20948,10 +20823,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:116:59, endln:116:72 |vpiActual: - \_ref_obj: (tags), line:118:39, endln:118:43 + \_ref_obj: (work@tnoc_vc_splitter.get_tag_width.tags), line:118:39, endln:118:43 |vpiParent: \_hier_path: (packet_config.tags), line:118:25, endln:118:43 |vpiName:tags + |vpiFullName:work@tnoc_vc_splitter.get_tag_width.tags |vpiActual: \_typespec_member: (tags), line:48:15, endln:48:19 |vpiName:tnoc_clog2 @@ -21010,10 +20886,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:126:23, endln:126:37 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_size_width.max_data_width), line:126:23, endln:126:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:126:9, endln:126:37 |vpiName:max_data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_size_width.max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -21058,10 +20935,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:125:65, endln:125:78 |vpiActual: - \_ref_obj: (max_data_width), line:127:50, endln:127:64 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_size_width.max_data_width), line:127:50, endln:127:64 |vpiParent: \_hier_path: (packet_config.max_data_width), line:127:36, endln:127:64 |vpiName:max_data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_size_width.max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -21133,10 +21011,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:134:67, endln:134:80 |vpiActual: - \_ref_obj: (max_byte_length), line:135:37, endln:135:52 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_length_width.max_byte_length), line:135:37, endln:135:52 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:135:23, endln:135:52 |vpiName:max_byte_length + |vpiFullName:work@tnoc_vc_splitter.get_byte_length_width.max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -21186,10 +21065,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:139:23, endln:139:38 + \_ref_obj: (work@tnoc_vc_splitter.get_packed_byte_length_width.max_byte_length), line:139:23, endln:139:38 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:139:9, endln:139:38 |vpiName:max_byte_length + |vpiFullName:work@tnoc_vc_splitter.get_packed_byte_length_width.max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -21220,10 +21100,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:138:74, endln:138:87 |vpiActual: - \_ref_obj: (max_byte_length), line:140:39, endln:140:54 + \_ref_obj: (work@tnoc_vc_splitter.get_packed_byte_length_width.max_byte_length), line:140:39, endln:140:54 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:140:25, endln:140:54 |vpiName:max_byte_length + |vpiFullName:work@tnoc_vc_splitter.get_packed_byte_length_width.max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiName:tnoc_clog2 @@ -21282,10 +21163,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:148:23, endln:148:37 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_offset_width.max_data_width), line:148:23, endln:148:37 |vpiParent: \_hier_path: (packet_config.max_data_width), line:148:9, endln:148:37 |vpiName:max_data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_offset_width.max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -21321,10 +21203,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:147:67, endln:147:80 |vpiActual: - \_ref_obj: (max_data_width), line:149:39, endln:149:53 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_offset_width.max_data_width), line:149:39, endln:149:53 |vpiParent: \_hier_path: (packet_config.max_data_width), line:149:25, endln:149:53 |vpiName:max_data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_offset_width.max_data_width |vpiActual: \_typespec_member: (max_data_width), line:51:15, endln:51:29 |vpiOperand: @@ -21385,10 +21268,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:157:23, endln:157:33 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_end_width.data_width), line:157:23, endln:157:33 |vpiParent: \_hier_path: (packet_config.data_width), line:157:9, endln:157:33 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_end_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -21424,10 +21308,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:156:64, endln:156:77 |vpiActual: - \_ref_obj: (data_width), line:158:39, endln:158:49 + \_ref_obj: (work@tnoc_vc_splitter.get_byte_end_width.data_width), line:158:39, endln:158:49 |vpiParent: \_hier_path: (packet_config.data_width), line:158:25, endln:158:49 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_byte_end_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -21513,10 +21398,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (data_width), line:167:33, endln:167:43 + \_ref_obj: (work@tnoc_vc_splitter.get_burst_length_width.data_width), line:167:33, endln:167:43 |vpiParent: \_hier_path: (packet_config.data_width), line:167:19, endln:167:43 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_burst_length_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -21562,10 +21448,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:165:68, endln:165:81 |vpiActual: - \_ref_obj: (max_byte_length), line:168:38, endln:168:53 + \_ref_obj: (work@tnoc_vc_splitter.get_burst_length_width.max_byte_length), line:168:38, endln:168:53 |vpiParent: \_hier_path: (packet_config.max_byte_length), line:168:24, endln:168:53 |vpiName:max_byte_length + |vpiFullName:work@tnoc_vc_splitter.get_burst_length_width.max_byte_length |vpiActual: \_typespec_member: (max_byte_length), line:52:15, endln:52:30 |vpiOperand: @@ -21678,19 +21565,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_request_packet_type.packet_type), line:204:52, endln:204:94 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_request_packet_type.packet_type) - |vpiParent: - \_operation: , line:204:51, endln:204:94 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_request_packet_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:203:68, endln:203:79 + \_operation: , line:204:51, endln:204:94 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_request_packet_type.packet_type - |vpiIndex: - \_constant: , line:204:64, endln:204:93 |vpiActual: \_io_decl: (packet_type), line:203:68, endln:203:79 + |vpiIndex: + \_constant: , line:204:64, endln:204:93 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -21740,19 +21621,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_response_packet_type.packet_type), line:208:50, endln:208:92 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_response_packet_type.packet_type) - |vpiParent: - \_operation: , line:208:13, endln:208:92 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_response_packet_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:207:69, endln:207:80 + \_operation: , line:208:13, endln:208:92 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_response_packet_type.packet_type - |vpiIndex: - \_constant: , line:208:62, endln:208:91 |vpiActual: \_io_decl: (packet_type), line:207:69, endln:207:80 + |vpiIndex: + \_constant: , line:208:62, endln:208:91 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -21802,19 +21677,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_packet_with_payload_type.packet_type), line:212:50, endln:212:91 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_packet_with_payload_type.packet_type) - |vpiParent: - \_operation: , line:212:13, endln:212:91 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_packet_with_payload_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:211:73, endln:211:84 + \_operation: , line:212:13, endln:212:91 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_packet_with_payload_type.packet_type - |vpiIndex: - \_constant: , line:212:62, endln:212:90 |vpiActual: \_io_decl: (packet_type), line:211:73, endln:211:84 + |vpiIndex: + \_constant: , line:212:62, endln:212:90 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -21869,19 +21738,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_header_only_packet_type.packet_type), line:216:52, endln:216:93 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_header_only_packet_type.packet_type) - |vpiParent: - \_operation: , line:216:51, endln:216:93 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_header_only_packet_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:215:72, endln:215:83 + \_operation: , line:216:51, endln:216:93 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_header_only_packet_type.packet_type - |vpiIndex: - \_constant: , line:216:64, endln:216:92 |vpiActual: \_io_decl: (packet_type), line:215:72, endln:215:83 + |vpiIndex: + \_constant: , line:216:64, endln:216:92 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -21936,19 +21799,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_posted_request_packet_type.packet_type), line:220:54, endln:220:98 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_posted_request_packet_type.packet_type) - |vpiParent: - \_operation: , line:220:53, endln:220:98 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_posted_request_packet_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:219:75, endln:219:86 + \_operation: , line:220:53, endln:220:98 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_posted_request_packet_type.packet_type - |vpiIndex: - \_constant: , line:220:66, endln:220:97 |vpiActual: \_io_decl: (packet_type), line:219:75, endln:219:86 + |vpiIndex: + \_constant: , line:220:66, endln:220:97 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -21998,19 +21855,13 @@ design: (work@tnoc_vc_splitter) |vpiOperand: \_bit_select: (work@tnoc_vc_splitter.is_non_posted_request_packet_type.packet_type), line:224:52, endln:224:96 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.is_non_posted_request_packet_type.packet_type) - |vpiParent: - \_operation: , line:224:13, endln:224:96 - |vpiName:packet_type - |vpiFullName:work@tnoc_vc_splitter.is_non_posted_request_packet_type.packet_type - |vpiActual: - \_io_decl: (packet_type), line:223:79, endln:223:90 + \_operation: , line:224:13, endln:224:96 |vpiName:packet_type |vpiFullName:work@tnoc_vc_splitter.is_non_posted_request_packet_type.packet_type - |vpiIndex: - \_constant: , line:224:64, endln:224:95 |vpiActual: \_io_decl: (packet_type), line:223:79, endln:223:90 + |vpiIndex: + \_constant: , line:224:64, endln:224:95 |vpiInstance: \_module_inst: work@tnoc_vc_splitter (work@tnoc_vc_splitter), file:${SURELOG_DIR}/tests/FuncDef2/dut.sv, line:404:1, endln:433:10 |vpiTaskFunc: @@ -22395,10 +22246,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:239:70, endln:239:83 |vpiActual: - \_ref_obj: (address_width), line:245:28, endln:245:41 + \_ref_obj: (work@tnoc_vc_splitter.get_request_header_width.address_width), line:245:28, endln:245:41 |vpiParent: \_hier_path: (packet_config.address_width), line:245:14, endln:245:41 |vpiName:address_width + |vpiFullName:work@tnoc_vc_splitter.get_request_header_width.address_width |vpiActual: \_typespec_member: (address_width), line:49:15, endln:49:28 |vpiLhs: @@ -22892,10 +22744,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:277:28, endln:277:38 + \_ref_obj: (work@tnoc_vc_splitter.get_request_payload_width.data_width), line:277:28, endln:277:38 |vpiParent: \_hier_path: (packet_config.data_width), line:277:14, endln:277:38 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_request_payload_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -22930,10 +22783,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:274:71, endln:274:84 |vpiActual: - \_ref_obj: (data_width), line:278:28, endln:278:38 + \_ref_obj: (work@tnoc_vc_splitter.get_request_payload_width.data_width), line:278:28, endln:278:38 |vpiParent: \_hier_path: (packet_config.data_width), line:278:14, endln:278:38 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_request_payload_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiOperand: @@ -23036,10 +22890,11 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_io_decl: (packet_config), line:282:72, endln:282:85 |vpiActual: - \_ref_obj: (data_width), line:285:28, endln:285:38 + \_ref_obj: (work@tnoc_vc_splitter.get_response_payload_width.data_width), line:285:28, endln:285:38 |vpiParent: \_hier_path: (packet_config.data_width), line:285:14, endln:285:38 |vpiName:data_width + |vpiFullName:work@tnoc_vc_splitter.get_response_payload_width.data_width |vpiActual: \_typespec_member: (data_width), line:50:15, endln:50:25 |vpiLhs: @@ -24615,21 +24470,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[0].valid) + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.valid[i].valid) |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].valid) - |vpiParent: - \_hier_path: (receiver_if.valid[i]), line:417:33, endln:417:53 - |vpiName:valid - |vpiFullName:work@tnoc_vc_splitter.g[0].valid + \_hier_path: (receiver_if.valid[i]), line:417:33, endln:417:53 |vpiName:valid - |vpiFullName:work@tnoc_vc_splitter.g[0].valid + |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.valid[i].valid |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].valid.i), line:417:51, endln:417:52 + \_ref_obj: (work@tnoc_vc_splitter.g[0].receiver_if.valid[i].i), line:417:51, endln:417:52 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[0].valid) + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.valid[i].valid) |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].valid.i + |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.valid[i].i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 |vpiLhs: @@ -24638,29 +24489,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:417:7, endln:417:53 |vpiName:sender_if[i].valid |vpiActual: - \_bit_select: (sender_if), line:417:7, endln:417:16 + \_bit_select: (sender_if[i]), line:417:7, endln:417:16 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i] + \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].i), line:417:17, endln:417:18 + \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].valid.i), line:417:17, endln:417:18 |vpiParent: - \_bit_select: (sender_if), line:417:7, endln:417:16 + \_bit_select: (sender_if[i]), line:417:7, endln:417:16 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].valid.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (valid) + \_ref_obj: (sender_if[i].valid) |vpiParent: \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:valid + |vpiFullName:sender_if[i].valid |vpiStmt: \_assignment: , line:418:7, endln:418:51 |vpiParent: @@ -24673,29 +24522,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:418:7, endln:418:51 |vpiName:sender_if[i].ready |vpiActual: - \_bit_select: (sender_if), line:418:33, endln:418:42 + \_bit_select: (sender_if[i]), line:418:33, endln:418:42 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i] + \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].i), line:418:43, endln:418:44 + \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].ready.i), line:418:43, endln:418:44 |vpiParent: - \_bit_select: (sender_if), line:418:33, endln:418:42 + \_bit_select: (sender_if[i]), line:418:33, endln:418:42 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].ready.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (ready), line:418:46, endln:418:51 + \_ref_obj: (work@tnoc_vc_splitter.g[0].ready), line:418:46, endln:418:51 |vpiParent: \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiName:ready + |vpiFullName:work@tnoc_vc_splitter.g[0].ready |vpiLhs: \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiParent: @@ -24709,19 +24556,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i]), line:418:19, endln:418:24 + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i]) - |vpiParent: - \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 - |vpiName:receiver_if.ready[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.ready[i] + \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiName:ready - |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.ready[i] + |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.ready[i].ready |vpiIndex: \_ref_obj: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i].i), line:418:25, endln:418:26 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i]), line:418:19, endln:418:24 + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiName:i |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.ready[i].i |vpiActual: @@ -24738,29 +24581,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:419:7, endln:419:54 |vpiName:sender_if[i].vc_ready |vpiActual: - \_bit_select: (sender_if), line:419:33, endln:419:42 + \_bit_select: (sender_if[i]), line:419:33, endln:419:42 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i] + \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].i), line:419:43, endln:419:44 + \_ref_obj: (work@tnoc_vc_splitter.g[0].sender_if[i].vc_ready.i), line:419:43, endln:419:44 |vpiParent: - \_bit_select: (sender_if), line:419:33, endln:419:42 + \_bit_select: (sender_if[i]), line:419:33, endln:419:42 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[0].sender_if[i].vc_ready.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (vc_ready), line:419:46, endln:419:54 + \_ref_obj: (work@tnoc_vc_splitter.g[0].vc_ready), line:419:46, endln:419:54 |vpiParent: \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiName:vc_ready + |vpiFullName:work@tnoc_vc_splitter.g[0].vc_ready |vpiLhs: \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiParent: @@ -24774,19 +24615,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i]), line:419:19, endln:419:27 + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i]) - |vpiParent: - \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 - |vpiName:receiver_if.vc_ready[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i] + \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiName:vc_ready - |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i] + |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i].vc_ready |vpiIndex: \_ref_obj: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i].i), line:419:28, endln:419:29 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i]), line:419:19, endln:419:27 + \_bit_select: (work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiName:i |vpiFullName:work@tnoc_vc_splitter.g[0].receiver_if.vc_ready[i].i |vpiActual: @@ -24831,21 +24668,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[0].g.flit) + \_bit_select: (work@tnoc_vc_splitter.g[0].g.receiver_if.flit[i].flit) |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].g.flit) - |vpiParent: - \_hier_path: (receiver_if.flit[i]), line:424:29, endln:424:48 - |vpiName:flit - |vpiFullName:work@tnoc_vc_splitter.g[0].g.flit + \_hier_path: (receiver_if.flit[i]), line:424:29, endln:424:48 |vpiName:flit - |vpiFullName:work@tnoc_vc_splitter.g[0].g.flit + |vpiFullName:work@tnoc_vc_splitter.g[0].g.receiver_if.flit[i].flit |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].g.flit.i), line:424:46, endln:424:47 + \_ref_obj: (work@tnoc_vc_splitter.g[0].g.receiver_if.flit[i].i), line:424:46, endln:424:47 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[0].g.flit) + \_bit_select: (work@tnoc_vc_splitter.g[0].g.receiver_if.flit[i].flit) |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].g.flit.i + |vpiFullName:work@tnoc_vc_splitter.g[0].g.receiver_if.flit[i].i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 |vpiLhs: @@ -24854,29 +24687,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:424:9, endln:424:48 |vpiName:sender_if[i].flit |vpiActual: - \_bit_select: (sender_if), line:424:9, endln:424:18 + \_bit_select: (sender_if[i]), line:424:9, endln:424:18 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[0].g.sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[0].g.sender_if[i] + \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[0].g.sender_if[i].i), line:424:19, endln:424:20 + \_ref_obj: (work@tnoc_vc_splitter.g[0].g.sender_if[i].flit.i), line:424:19, endln:424:20 |vpiParent: - \_bit_select: (sender_if), line:424:9, endln:424:18 + \_bit_select: (sender_if[i]), line:424:9, endln:424:18 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[0].g.sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[0].g.sender_if[i].flit.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[0].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (flit) + \_ref_obj: (sender_if[i].flit) |vpiParent: \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:flit + |vpiFullName:sender_if[i].flit |vpiAlwaysType:2 |vpiGenScopeArray: \_gen_scope_array: (work@tnoc_vc_splitter.g[1]), line:415:39, endln:432:6 @@ -24927,21 +24758,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[1].valid) + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.valid[i].valid) |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].valid) - |vpiParent: - \_hier_path: (receiver_if.valid[i]), line:417:33, endln:417:53 - |vpiName:valid - |vpiFullName:work@tnoc_vc_splitter.g[1].valid + \_hier_path: (receiver_if.valid[i]), line:417:33, endln:417:53 |vpiName:valid - |vpiFullName:work@tnoc_vc_splitter.g[1].valid + |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.valid[i].valid |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].valid.i), line:417:51, endln:417:52 + \_ref_obj: (work@tnoc_vc_splitter.g[1].receiver_if.valid[i].i), line:417:51, endln:417:52 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[1].valid) + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.valid[i].valid) |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].valid.i + |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.valid[i].i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 |vpiLhs: @@ -24950,29 +24777,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:417:7, endln:417:53 |vpiName:sender_if[i].valid |vpiActual: - \_bit_select: (sender_if), line:417:7, endln:417:16 + \_bit_select: (sender_if[i]), line:417:7, endln:417:16 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i] + \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].i), line:417:17, endln:417:18 + \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].valid.i), line:417:17, endln:417:18 |vpiParent: - \_bit_select: (sender_if), line:417:7, endln:417:16 + \_bit_select: (sender_if[i]), line:417:7, endln:417:16 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].valid.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (valid) + \_ref_obj: (sender_if[i].valid) |vpiParent: \_hier_path: (sender_if[i].valid), line:417:7, endln:417:16 |vpiName:valid + |vpiFullName:sender_if[i].valid |vpiStmt: \_assignment: , line:418:7, endln:418:51 |vpiParent: @@ -24985,29 +24810,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:418:7, endln:418:51 |vpiName:sender_if[i].ready |vpiActual: - \_bit_select: (sender_if), line:418:33, endln:418:42 + \_bit_select: (sender_if[i]), line:418:33, endln:418:42 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i] + \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].i), line:418:43, endln:418:44 + \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].ready.i), line:418:43, endln:418:44 |vpiParent: - \_bit_select: (sender_if), line:418:33, endln:418:42 + \_bit_select: (sender_if[i]), line:418:33, endln:418:42 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].ready.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (ready), line:418:46, endln:418:51 + \_ref_obj: (work@tnoc_vc_splitter.g[1].ready), line:418:46, endln:418:51 |vpiParent: \_hier_path: (sender_if[i].ready), line:418:33, endln:418:51 |vpiName:ready + |vpiFullName:work@tnoc_vc_splitter.g[1].ready |vpiLhs: \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiParent: @@ -25021,19 +24844,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i]), line:418:19, endln:418:24 + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i]) - |vpiParent: - \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 - |vpiName:receiver_if.ready[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.ready[i] + \_hier_path: (receiver_if.ready[i]), line:418:7, endln:418:27 |vpiName:ready - |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.ready[i] + |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.ready[i].ready |vpiIndex: \_ref_obj: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i].i), line:418:25, endln:418:26 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i]), line:418:19, endln:418:24 + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.ready[i].ready), line:418:19, endln:418:24 |vpiName:i |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.ready[i].i |vpiActual: @@ -25050,29 +24869,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:419:7, endln:419:54 |vpiName:sender_if[i].vc_ready |vpiActual: - \_bit_select: (sender_if), line:419:33, endln:419:42 + \_bit_select: (sender_if[i]), line:419:33, endln:419:42 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i] + \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].i), line:419:43, endln:419:44 + \_ref_obj: (work@tnoc_vc_splitter.g[1].sender_if[i].vc_ready.i), line:419:43, endln:419:44 |vpiParent: - \_bit_select: (sender_if), line:419:33, endln:419:42 + \_bit_select: (sender_if[i]), line:419:33, endln:419:42 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[1].sender_if[i].vc_ready.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (vc_ready), line:419:46, endln:419:54 + \_ref_obj: (work@tnoc_vc_splitter.g[1].vc_ready), line:419:46, endln:419:54 |vpiParent: \_hier_path: (sender_if[i].vc_ready), line:419:33, endln:419:54 |vpiName:vc_ready + |vpiFullName:work@tnoc_vc_splitter.g[1].vc_ready |vpiLhs: \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiParent: @@ -25086,19 +24903,15 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i]), line:419:19, endln:419:27 + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i]) - |vpiParent: - \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 - |vpiName:receiver_if.vc_ready[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i] + \_hier_path: (receiver_if.vc_ready[i]), line:419:7, endln:419:30 |vpiName:vc_ready - |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i] + |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i].vc_ready |vpiIndex: \_ref_obj: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i].i), line:419:28, endln:419:29 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i]), line:419:19, endln:419:27 + \_bit_select: (work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i].vc_ready), line:419:19, endln:419:27 |vpiName:i |vpiFullName:work@tnoc_vc_splitter.g[1].receiver_if.vc_ready[i].i |vpiActual: @@ -25143,21 +24956,17 @@ design: (work@tnoc_vc_splitter) |vpiActual: \_logic_net: (work@tnoc_vc_splitter.receiver_if), line:412:25, endln:412:36 |vpiActual: - \_bit_select: (work@tnoc_vc_splitter.g[1].g.flit) + \_bit_select: (work@tnoc_vc_splitter.g[1].g.receiver_if.flit[i].flit) |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].g.flit) - |vpiParent: - \_hier_path: (receiver_if.flit[i]), line:424:29, endln:424:48 - |vpiName:flit - |vpiFullName:work@tnoc_vc_splitter.g[1].g.flit + \_hier_path: (receiver_if.flit[i]), line:424:29, endln:424:48 |vpiName:flit - |vpiFullName:work@tnoc_vc_splitter.g[1].g.flit + |vpiFullName:work@tnoc_vc_splitter.g[1].g.receiver_if.flit[i].flit |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].g.flit.i), line:424:46, endln:424:47 + \_ref_obj: (work@tnoc_vc_splitter.g[1].g.receiver_if.flit[i].i), line:424:46, endln:424:47 |vpiParent: - \_bit_select: (work@tnoc_vc_splitter.g[1].g.flit) + \_bit_select: (work@tnoc_vc_splitter.g[1].g.receiver_if.flit[i].flit) |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].g.flit.i + |vpiFullName:work@tnoc_vc_splitter.g[1].g.receiver_if.flit[i].i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 |vpiLhs: @@ -25166,29 +24975,27 @@ design: (work@tnoc_vc_splitter) \_assignment: , line:424:9, endln:424:48 |vpiName:sender_if[i].flit |vpiActual: - \_bit_select: (sender_if), line:424:9, endln:424:18 + \_bit_select: (sender_if[i]), line:424:9, endln:424:18 |vpiParent: - \_ref_obj: (work@tnoc_vc_splitter.g[1].g.sender_if[i]) - |vpiParent: - \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 - |vpiName:sender_if[i] - |vpiFullName:work@tnoc_vc_splitter.g[1].g.sender_if[i] + \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:sender_if + |vpiFullName:sender_if[i] + |vpiActual: + \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiIndex: - \_ref_obj: (work@tnoc_vc_splitter.g[1].g.sender_if[i].i), line:424:19, endln:424:20 + \_ref_obj: (work@tnoc_vc_splitter.g[1].g.sender_if[i].flit.i), line:424:19, endln:424:20 |vpiParent: - \_bit_select: (sender_if), line:424:9, endln:424:18 + \_bit_select: (sender_if[i]), line:424:9, endln:424:18 |vpiName:i - |vpiFullName:work@tnoc_vc_splitter.g[1].g.sender_if[i].i + |vpiFullName:work@tnoc_vc_splitter.g[1].g.sender_if[i].flit.i |vpiActual: \_parameter: (work@tnoc_vc_splitter.g[1].i), line:415:0 - |vpiActual: - \_array_net: (work@tnoc_vc_splitter.sender_if), line:413:25, endln:413:34 |vpiActual: - \_ref_obj: (flit) + \_ref_obj: (sender_if[i].flit) |vpiParent: \_hier_path: (sender_if[i].flit), line:424:9, endln:424:18 |vpiName:flit + |vpiFullName:sender_if[i].flit |vpiAlwaysType:2 =================== [ FATAL] : 0 diff --git a/tests/FuncDefaultVal/FuncDefaultVal.log b/tests/FuncDefaultVal/FuncDefaultVal.log index 66cda416e2..d47aeff1cd 100644 --- a/tests/FuncDefaultVal/FuncDefaultVal.log +++ b/tests/FuncDefaultVal/FuncDefaultVal.log @@ -223,7 +223,7 @@ module_inst 3 operation 3 part_select 1 range 5 -ref_obj 12 +ref_obj 11 string_typespec 2 string_var 2 var_select 1 @@ -248,7 +248,7 @@ module_inst 3 operation 5 part_select 2 range 5 -ref_obj 24 +ref_obj 22 string_typespec 2 string_var 2 var_select 2 @@ -306,22 +306,20 @@ design: (work@top) |vpiRhs: \_operation: , line:6:12, endln:6:86 |vpiParent: - \_begin: (work@top.dasm) + \_assignment: , line:6:5, endln:6:86 |vpiOpType:32 |vpiOperand: \_operation: , line:6:13, endln:6:33 |vpiParent: - \_begin: (work@top.dasm) + \_operation: , line:6:12, endln:6:86 |vpiOpType:14 |vpiOperand: - \_part_select: , line:6:13, endln:6:24 + \_part_select: opcode (work@top.dasm.opcode), line:6:13, endln:6:24 |vpiParent: - \_ref_obj: opcode (work@top.dasm.opcode), line:6:13, endln:6:19 - |vpiParent: - \_operation: , line:6:13, endln:6:33 - |vpiName:opcode - |vpiFullName:work@top.dasm.opcode - |vpiDefName:opcode + \_operation: , line:6:13, endln:6:33 + |vpiName:opcode + |vpiFullName:work@top.dasm.opcode + |vpiDefName:opcode |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:20, endln:6:21 @@ -404,7 +402,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.dasm.dasm), line:6:5, endln:6:9 |vpiParent: - \_begin: (work@top.dasm) + \_assignment: , line:6:5, endln:6:86 |vpiName:dasm |vpiFullName:work@top.dasm.dasm |vpiActual: @@ -430,7 +428,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.dasm.regv), line:7:31, endln:7:35 |vpiParent: - \_if_stmt: , line:7:5, endln:7:36 + \_assignment: , line:7:14, endln:7:35 |vpiName:regv |vpiFullName:work@top.dasm.regv |vpiActual: @@ -442,19 +440,19 @@ design: (work@top) |vpiName:gpr |vpiFullName:work@top.dasm.gpr |vpiIndex: - \_ref_obj: (work@top.dasm.tid), line:7:18, endln:7:21 + \_ref_obj: (work@top.dasm.gpr.tid), line:7:18, endln:7:21 |vpiParent: - \_if_stmt: , line:7:5, endln:7:36 + \_var_select: (work@top.dasm.gpr), line:7:14, endln:7:28 |vpiName:tid - |vpiFullName:work@top.dasm.tid + |vpiFullName:work@top.dasm.gpr.tid |vpiActual: \_io_decl: (tid), line:5:29, endln:5:32 |vpiIndex: - \_ref_obj: (work@top.dasm.regn), line:7:23, endln:7:27 + \_ref_obj: (work@top.dasm.gpr.regn), line:7:23, endln:7:27 |vpiParent: - \_if_stmt: , line:7:5, endln:7:36 + \_var_select: (work@top.dasm.gpr), line:7:14, endln:7:28 |vpiName:regn - |vpiFullName:work@top.dasm.regn + |vpiFullName:work@top.dasm.gpr.regn |vpiActual: \_logic_net: (regn) |vpiInstance: @@ -592,16 +590,13 @@ design: (work@top) \_operation: , line:6:12, endln:6:86 |vpiOpType:14 |vpiOperand: - \_part_select: , line:6:13, endln:6:24 + \_part_select: opcode (opcode), line:6:13, endln:6:24 |vpiParent: - \_ref_obj: opcode (work@top.dasm.opcode), line:6:13, endln:6:19 - |vpiParent: - \_operation: , line:6:13, endln:6:33 - |vpiName:opcode - |vpiFullName:work@top.dasm.opcode - |vpiDefName:opcode - |vpiActual: - \_logic_net: (opcode) + \_operation: , line:6:13, endln:6:33 + |vpiName:opcode + |vpiDefName:opcode + |vpiActual: + \_logic_net: (opcode) |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:20, endln:6:21 @@ -674,7 +669,7 @@ design: (work@top) |vpiName:dasm |vpiFullName:work@top.dasm.dasm |vpiActual: - \_string_var: , line:5:10, endln:5:16 + \_string_var: (dasm), line:5:10, endln:5:16 |vpiStmt: \_if_stmt: , line:7:5, endln:7:36 |vpiParent: @@ -707,6 +702,8 @@ design: (work@top) \_assignment: , line:7:14, endln:7:35 |vpiName:gpr |vpiFullName:work@top.dasm.gpr + |vpiActual: + \_array_var: (work@top.gpr), line:3:18, endln:3:24 |vpiIndex: \_ref_obj: (work@top.dasm.gpr.tid), line:7:18, endln:7:21 |vpiParent: diff --git a/tests/FuncIoTypespec/FuncIoTypespec.log b/tests/FuncIoTypespec/FuncIoTypespec.log index 56aa3fbb36..725a10947a 100644 --- a/tests/FuncIoTypespec/FuncIoTypespec.log +++ b/tests/FuncIoTypespec/FuncIoTypespec.log @@ -1565,7 +1565,7 @@ part_select 7 port 15 range 54 ref_module 1 -ref_obj 131 +ref_obj 120 sys_func_call 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -1598,7 +1598,7 @@ part_select 14 port 21 range 54 ref_module 1 -ref_obj 208 +ref_obj 187 sys_func_call 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncIoTypespec/slpp_all/surelog.uhdm ... @@ -1733,7 +1733,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.len), line:28:11, endln:28:14 |vpiParent: - \_function: (work@shift.fshl_u_1), line:21:3, endln:36:14 + \_operation: , line:28:11, endln:28:16 |vpiName:len |vpiFullName:work@shift.fshl_u_1.len |vpiActual: @@ -1772,7 +1772,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.len), line:29:11, endln:29:14 |vpiParent: - \_function: (work@shift.fshl_u_1), line:21:3, endln:36:14 + \_operation: , line:29:11, endln:29:16 |vpiName:len |vpiFullName:work@shift.fshl_u_1.len |vpiActual: @@ -1946,7 +1946,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.width_s), line:23:13, endln:23:20 |vpiParent: - \_function: (work@shift.fshl_u_1), line:21:3, endln:36:14 + \_operation: , line:23:13, endln:23:22 |vpiName:width_s |vpiFullName:work@shift.fshl_u_1.width_s |vpiActual: @@ -1987,12 +1987,12 @@ design: (work@top) |vpiRhs: \_operation: , line:31:19, endln:31:32 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:31:8, endln:31:32 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.len), line:31:21, endln:31:24 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:31:8, endln:31:32 |vpiName:len |vpiFullName:work@shift.fshl_u_1.len |vpiActual: @@ -2000,12 +2000,12 @@ design: (work@top) |vpiOperand: \_operation: , line:31:25, endln:31:31 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:31:8, endln:31:32 |vpiOpType:33 |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.sbit), line:31:26, endln:31:30 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:31:8, endln:31:32 |vpiName:sbit |vpiFullName:work@shift.fshl_u_1.sbit |vpiActual: @@ -2013,7 +2013,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_u_1.result_t), line:31:8, endln:31:16 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:31:8, endln:31:32 |vpiName:result_t |vpiFullName:work@shift.fshl_u_1.result_t |vpiActual: @@ -2027,32 +2027,32 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@shift.fshl_u_1.arg1), line:32:29, endln:32:33 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:32:8, endln:32:33 |vpiName:arg1 |vpiFullName:work@shift.fshl_u_1.arg1 |vpiActual: \_io_decl: (arg1), line:22:26, endln:22:30 |vpiLhs: - \_part_select: , line:32:8, endln:32:26 + \_part_select: result_t (work@shift.fshl_u_1.result_t), line:32:8, endln:32:26 |vpiParent: - \_ref_obj: result_t (work@shift.fshl_u_1.result_t) - |vpiParent: - \_assignment: , line:32:8, endln:32:33 - |vpiName:result_t - |vpiFullName:work@shift.fshl_u_1.result_t - |vpiDefName:result_t + \_assignment: , line:32:8, endln:32:33 + |vpiName:result_t + |vpiFullName:work@shift.fshl_u_1.result_t + |vpiDefName:result_t + |vpiActual: + \_logic_var: (result_t), line:29:6, endln:29:19 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:17, endln:32:23 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_part_select: result_t (work@shift.fshl_u_1.result_t), line:32:8, endln:32:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshl_u_1.ilen), line:32:17, endln:32:21 + \_ref_obj: (work@shift.fshl_u_1.result_t.ilen), line:32:17, endln:32:21 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_operation: , line:32:17, endln:32:23 |vpiName:ilen - |vpiFullName:work@shift.fshl_u_1.ilen + |vpiFullName:work@shift.fshl_u_1.result_t.ilen |vpiActual: \_parameter: (ilen), line:26:16, endln:26:20 |vpiOperand: @@ -2078,12 +2078,12 @@ design: (work@top) |vpiRhs: \_operation: , line:33:17, endln:33:34 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:33:8, endln:33:34 |vpiOpType:41 |vpiOperand: \_ref_obj: (work@shift.fshl_u_1.result_t), line:33:17, endln:33:25 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_operation: , line:33:17, endln:33:34 |vpiName:result_t |vpiFullName:work@shift.fshl_u_1.result_t |vpiActual: @@ -2099,7 +2099,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_u_1.result), line:33:8, endln:33:14 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:33:8, endln:33:34 |vpiName:result |vpiFullName:work@shift.fshl_u_1.result |vpiActual: @@ -2111,26 +2111,26 @@ design: (work@top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:34:20, endln:34:36 + \_part_select: result (work@shift.fshl_u_1.result), line:34:20, endln:34:36 |vpiParent: - \_ref_obj: result (work@shift.fshl_u_1.result), line:34:20, endln:34:26 - |vpiParent: - \_assignment: , line:34:8, endln:34:36 - |vpiName:result - |vpiFullName:work@shift.fshl_u_1.result - |vpiDefName:result + \_assignment: , line:34:8, endln:34:36 + |vpiName:result + |vpiFullName:work@shift.fshl_u_1.result + |vpiDefName:result + |vpiActual: + \_logic_var: (result), line:28:6, endln:28:19 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:27, endln:34:33 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_part_select: result (work@shift.fshl_u_1.result), line:34:20, endln:34:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshl_u_1.olen), line:34:27, endln:34:31 + \_ref_obj: (work@shift.fshl_u_1.result.olen), line:34:27, endln:34:31 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_operation: , line:34:27, endln:34:33 |vpiName:olen - |vpiFullName:work@shift.fshl_u_1.olen + |vpiFullName:work@shift.fshl_u_1.result.olen |vpiActual: \_parameter: (olen), line:25:16, endln:25:20 |vpiOperand: @@ -2150,7 +2150,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_u_1.fshl_u_1), line:34:8, endln:34:16 |vpiParent: - \_begin: (work@shift.fshl_u_1), line:30:6, endln:35:9 + \_assignment: , line:34:8, endln:34:36 |vpiName:fshl_u_1 |vpiFullName:work@shift.fshl_u_1.fshl_u_1 |vpiActual: @@ -2218,7 +2218,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_u.width_a), line:39:13, endln:39:20 |vpiParent: - \_function: (work@shift.fshl_u), line:38:3, endln:43:14 + \_operation: , line:39:13, endln:39:22 |vpiName:width_a |vpiFullName:work@shift.fshl_u.width_a |vpiActual: @@ -2259,7 +2259,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_u.width_s), line:40:13, endln:40:20 |vpiParent: - \_function: (work@shift.fshl_u), line:38:3, endln:43:14 + \_operation: , line:40:13, endln:40:22 |vpiName:width_s |vpiFullName:work@shift.fshl_u.width_s |vpiActual: @@ -2339,7 +2339,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_u.fshl_u), line:42:6, endln:42:12 |vpiParent: - \_function: (work@shift.fshl_u), line:38:3, endln:43:14 + \_assignment: , line:42:6, endln:42:48 |vpiName:fshl_u |vpiFullName:work@shift.fshl_u.fshl_u |vpiActual: @@ -2368,7 +2368,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshr_u.len), line:52:18, endln:52:21 |vpiParent: - \_function: (work@shift.fshr_u), line:45:3, endln:60:14 + \_operation: , line:52:18, endln:52:23 |vpiName:len |vpiFullName:work@shift.fshr_u.len |vpiActual: @@ -2408,7 +2408,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshr_u.len), line:53:18, endln:53:21 |vpiParent: - \_function: (work@shift.fshr_u), line:45:3, endln:60:14 + \_operation: , line:53:18, endln:53:23 |vpiName:len |vpiFullName:work@shift.fshr_u.len |vpiActual: @@ -2471,7 +2471,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (width_a), line:50:43, endln:50:50 |vpiParent: - \_operation: , line:50:23, endln:50:52 + \_operation: , line:50:43, endln:50:52 |vpiName:width_a |vpiOperand: \_constant: , line:50:51, endln:50:52 @@ -2570,7 +2570,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshr_u.width_a), line:46:13, endln:46:20 |vpiParent: - \_function: (work@shift.fshr_u), line:45:3, endln:60:14 + \_operation: , line:46:13, endln:46:22 |vpiName:width_a |vpiFullName:work@shift.fshr_u.width_a |vpiActual: @@ -2611,7 +2611,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshr_u.width_s), line:47:13, endln:47:20 |vpiParent: - \_function: (work@shift.fshr_u), line:45:3, endln:60:14 + \_operation: , line:47:13, endln:47:22 |vpiName:width_s |vpiFullName:work@shift.fshr_u.width_s |vpiActual: @@ -2652,7 +2652,7 @@ design: (work@top) |vpiRhs: \_sys_func_call: ($signed), line:55:19, endln:55:26 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:55:8, endln:55:43 |vpiArgument: \_operation: , line:55:28, endln:55:41 |vpiParent: @@ -2683,7 +2683,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshr_u.result_t), line:55:8, endln:55:16 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:55:8, endln:55:43 |vpiName:result_t |vpiFullName:work@shift.fshr_u.result_t |vpiActual: @@ -2697,32 +2697,32 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@shift.fshr_u.arg1), line:56:32, endln:56:36 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:56:8, endln:56:36 |vpiName:arg1 |vpiFullName:work@shift.fshr_u.arg1 |vpiActual: \_io_decl: (arg1), line:46:26, endln:46:30 |vpiLhs: - \_part_select: , line:56:8, endln:56:29 + \_part_select: result_t (work@shift.fshr_u.result_t), line:56:8, endln:56:29 |vpiParent: - \_ref_obj: result_t (work@shift.fshr_u.result_t) - |vpiParent: - \_assignment: , line:56:8, endln:56:36 - |vpiName:result_t - |vpiFullName:work@shift.fshr_u.result_t - |vpiDefName:result_t + \_assignment: , line:56:8, endln:56:36 + |vpiName:result_t + |vpiFullName:work@shift.fshr_u.result_t + |vpiDefName:result_t + |vpiActual: + \_logic_var: (result_t), line:53:6, endln:53:26 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:17, endln:56:26 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_part_select: result_t (work@shift.fshr_u.result_t), line:56:8, endln:56:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshr_u.width_a), line:56:17, endln:56:24 + \_ref_obj: (work@shift.fshr_u.result_t.width_a), line:56:17, endln:56:24 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_operation: , line:56:17, endln:56:26 |vpiName:width_a - |vpiFullName:work@shift.fshr_u.width_a + |vpiFullName:work@shift.fshr_u.result_t.width_a |vpiOperand: \_constant: , line:56:25, endln:56:26 |vpiParent: @@ -2746,12 +2746,12 @@ design: (work@top) |vpiRhs: \_operation: , line:57:17, endln:57:34 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:57:8, endln:57:34 |vpiOpType:42 |vpiOperand: \_ref_obj: (work@shift.fshr_u.result_t), line:57:17, endln:57:25 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_operation: , line:57:17, endln:57:34 |vpiName:result_t |vpiFullName:work@shift.fshr_u.result_t |vpiActual: @@ -2767,7 +2767,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshr_u.result), line:57:8, endln:57:14 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:57:8, endln:57:34 |vpiName:result |vpiFullName:work@shift.fshr_u.result |vpiActual: @@ -2779,26 +2779,26 @@ design: (work@top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:58:18, endln:58:34 + \_part_select: result (work@shift.fshr_u.result), line:58:18, endln:58:34 |vpiParent: - \_ref_obj: result (work@shift.fshr_u.result), line:58:18, endln:58:24 - |vpiParent: - \_assignment: , line:58:8, endln:58:34 - |vpiName:result - |vpiFullName:work@shift.fshr_u.result - |vpiDefName:result + \_assignment: , line:58:8, endln:58:34 + |vpiName:result + |vpiFullName:work@shift.fshr_u.result + |vpiDefName:result + |vpiActual: + \_logic_var: (result), line:52:6, endln:52:26 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:25, endln:58:31 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_part_select: result (work@shift.fshr_u.result), line:58:18, endln:58:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshr_u.olen), line:58:25, endln:58:29 + \_ref_obj: (work@shift.fshr_u.result.olen), line:58:25, endln:58:29 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_operation: , line:58:25, endln:58:31 |vpiName:olen - |vpiFullName:work@shift.fshr_u.olen + |vpiFullName:work@shift.fshr_u.result.olen |vpiActual: \_parameter: (olen), line:49:16, endln:49:20 |vpiOperand: @@ -2818,7 +2818,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshr_u.fshr_u), line:58:8, endln:58:14 |vpiParent: - \_begin: (work@shift.fshr_u), line:54:6, endln:59:9 + \_assignment: , line:58:8, endln:58:34 |vpiName:fshr_u |vpiFullName:work@shift.fshr_u.fshr_u |vpiActual: @@ -2912,7 +2912,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_s.width_a), line:63:13, endln:63:20 |vpiParent: - \_function: (work@shift.fshl_s), line:62:3, endln:80:14 + \_operation: , line:63:13, endln:63:22 |vpiName:width_a |vpiFullName:work@shift.fshl_s.width_a |vpiActual: @@ -2953,7 +2953,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@shift.fshl_s.width_s), line:64:13, endln:64:20 |vpiParent: - \_function: (work@shift.fshl_s), line:62:3, endln:80:14 + \_operation: , line:64:13, endln:64:22 |vpiName:width_s |vpiFullName:work@shift.fshl_s.width_s |vpiActual: @@ -2997,24 +2997,22 @@ design: (work@top) |vpiOperand: \_bit_select: (work@shift.fshl_s.arg2), line:68:13, endln:68:28 |vpiParent: - \_ref_obj: (work@shift.fshl_s.arg2) - |vpiParent: - \_operation: , line:68:13, endln:68:36 - |vpiName:arg2 - |vpiFullName:work@shift.fshl_s.arg2 + \_operation: , line:68:13, endln:68:36 |vpiName:arg2 |vpiFullName:work@shift.fshl_s.arg2 + |vpiActual: + \_io_decl: (arg2), line:64:26, endln:64:30 |vpiIndex: \_operation: , line:68:18, endln:68:27 |vpiParent: - \_begin: (work@shift.fshl_s), line:67:6, endln:79:9 + \_bit_select: (work@shift.fshl_s.arg2), line:68:13, endln:68:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshl_s.width_s), line:68:18, endln:68:25 + \_ref_obj: (work@shift.fshl_s.arg2.width_s), line:68:18, endln:68:25 |vpiParent: - \_begin: (work@shift.fshl_s), line:67:6, endln:79:9 + \_operation: , line:68:18, endln:68:27 |vpiName:width_s - |vpiFullName:work@shift.fshl_s.width_s + |vpiFullName:work@shift.fshl_s.arg2.width_s |vpiOperand: \_constant: , line:68:26, endln:68:27 |vpiParent: @@ -3045,17 +3043,17 @@ design: (work@top) |vpiRhs: \_operation: , line:70:33, endln:70:52 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_assignment: , line:70:10, endln:70:52 |vpiOpType:34 |vpiOperand: \_operation: , line:70:35, endln:70:44 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_assignment: , line:70:10, endln:70:52 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@shift.fshl_s.width_a), line:70:35, endln:70:42 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_operation: , line:70:35, endln:70:44 |vpiName:width_a |vpiFullName:work@shift.fshl_s.width_a |vpiOperand: @@ -3069,7 +3067,7 @@ design: (work@top) |vpiOperand: \_operation: , line:70:45, endln:70:51 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_assignment: , line:70:10, endln:70:52 |vpiOpType:33 |vpiOperand: \_constant: , line:70:46, endln:70:50 @@ -3078,21 +3076,21 @@ design: (work@top) |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:70:10, endln:70:30 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:70:10, endln:70:30 |vpiParent: - \_ref_obj: sbit_arg1 (work@shift.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:70:10, endln:70:52 - |vpiName:sbit_arg1 - |vpiFullName:work@shift.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 + \_assignment: , line:70:10, endln:70:52 + |vpiName:sbit_arg1 + |vpiFullName:work@shift.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@shift.fshl_s.width_a), line:70:20, endln:70:27 + \_ref_obj: (work@shift.fshl_s.sbit_arg1.width_a), line:70:20, endln:70:27 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:70:10, endln:70:30 |vpiName:width_a - |vpiFullName:work@shift.fshl_s.width_a + |vpiFullName:work@shift.fshl_s.sbit_arg1.width_a |vpiRightRange: \_constant: , line:70:28, endln:70:29 |vpiDecompile:0 @@ -3139,7 +3137,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_s.fshl_s), line:71:10, endln:71:16 |vpiParent: - \_begin: (work@shift.fshl_s), line:69:8, endln:72:11 + \_assignment: , line:71:10, endln:71:43 |vpiName:fshl_s |vpiFullName:work@shift.fshl_s.fshl_s |vpiActual: @@ -3158,7 +3156,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@shift.fshl_s.sbit), line:75:31, endln:75:35 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_assignment: , line:75:10, endln:75:35 |vpiName:sbit |vpiFullName:work@shift.fshl_s.sbit |vpiActual: @@ -3166,17 +3164,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@shift.fshl_s.sbit_arg1), line:75:10, endln:75:28 |vpiParent: - \_ref_obj: (work@shift.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:75:10, endln:75:35 - |vpiName:sbit_arg1 - |vpiFullName:work@shift.fshl_s.sbit_arg1 + \_assignment: , line:75:10, endln:75:35 |vpiName:sbit_arg1 |vpiFullName:work@shift.fshl_s.sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiIndex: \_ref_obj: (work@shift.fshl_s.width_a), line:75:20, endln:75:27 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_bit_select: (work@shift.fshl_s.sbit_arg1), line:75:10, endln:75:28 |vpiName:width_a |vpiFullName:work@shift.fshl_s.width_a |vpiStmt: @@ -3188,32 +3184,32 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@shift.fshl_s.arg1), line:76:35, endln:76:39 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_assignment: , line:76:10, endln:76:39 |vpiName:arg1 |vpiFullName:work@shift.fshl_s.arg1 |vpiActual: \_io_decl: (arg1), line:63:26, endln:63:30 |vpiLhs: - \_part_select: , line:76:10, endln:76:32 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:76:10, endln:76:32 |vpiParent: - \_ref_obj: sbit_arg1 (work@shift.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:76:10, endln:76:39 - |vpiName:sbit_arg1 - |vpiFullName:work@shift.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 + \_assignment: , line:76:10, endln:76:39 + |vpiName:sbit_arg1 + |vpiFullName:work@shift.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:76:20, endln:76:29 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:76:10, endln:76:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@shift.fshl_s.width_a), line:76:20, endln:76:27 + \_ref_obj: (work@shift.fshl_s.sbit_arg1.width_a), line:76:20, endln:76:27 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_operation: , line:76:20, endln:76:29 |vpiName:width_a - |vpiFullName:work@shift.fshl_s.width_a + |vpiFullName:work@shift.fshl_s.sbit_arg1.width_a |vpiOperand: \_constant: , line:76:28, endln:76:29 |vpiParent: @@ -3239,21 +3235,21 @@ design: (work@top) |vpiParent: \_assignment: , line:77:10, endln:77:60 |vpiArgument: - \_part_select: , line:77:26, endln:77:46 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:77:26, endln:77:46 |vpiParent: - \_ref_obj: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:77:26, endln:77:35 - |vpiParent: - \_func_call: (fshr_u), line:77:19, endln:77:60 - |vpiName:sbit_arg1 - |vpiFullName:work@shift.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 + \_func_call: (fshr_u), line:77:19, endln:77:60 + |vpiName:sbit_arg1 + |vpiFullName:work@shift.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@shift.fshl_s.width_a), line:77:36, endln:77:43 + \_ref_obj: (work@shift.fshl_s.sbit_arg1.width_a), line:77:36, endln:77:43 |vpiParent: - \_func_call: (fshr_u), line:77:19, endln:77:60 + \_part_select: sbit_arg1 (work@shift.fshl_s.sbit_arg1), line:77:26, endln:77:46 |vpiName:width_a - |vpiFullName:work@shift.fshl_s.width_a + |vpiFullName:work@shift.fshl_s.sbit_arg1.width_a |vpiRightRange: \_constant: , line:77:44, endln:77:45 |vpiDecompile:1 @@ -3287,7 +3283,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@shift.fshl_s.fshl_s), line:77:10, endln:77:16 |vpiParent: - \_begin: (work@shift.fshl_s), line:74:8, endln:78:11 + \_assignment: , line:77:10, endln:77:60 |vpiName:fshl_s |vpiFullName:work@shift.fshl_s.fshl_s |vpiActual: @@ -3465,21 +3461,19 @@ design: (work@top) |vpiArgument: \_bit_select: (a), line:13:27, endln:13:39 |vpiParent: - \_ref_obj: (a) - |vpiParent: - \_func_call: (fshl_s), line:13:16, endln:13:40 - |vpiName:a + \_func_call: (fshl_s), line:13:16, endln:13:40 |vpiName:a |vpiIndex: \_operation: , line:13:29, endln:13:38 |vpiParent: - \_func_call: (fshl_s), line:13:16, endln:13:40 + \_bit_select: (a), line:13:27, endln:13:39 |vpiOpType:11 |vpiOperand: - \_ref_obj: (width_a), line:13:29, endln:13:36 + \_ref_obj: (a.width_a), line:13:29, endln:13:36 |vpiParent: - \_func_call: (fshl_s), line:13:16, endln:13:40 + \_operation: , line:13:29, endln:13:38 |vpiName:width_a + |vpiFullName:a.width_a |vpiOperand: \_constant: , line:13:37, endln:13:38 |vpiParent: @@ -4355,7 +4349,7 @@ design: (work@top) |vpiName:result_t |vpiFullName:work@top.inst.fshl_u_1.result_t |vpiActual: - \_logic_var: (work@top.inst.fshl_u_1.result_t), line:29:6, endln:29:19 + \_logic_var: (result_t), line:29:6, endln:29:19 |vpiStmt: \_assignment: , line:32:8, endln:32:33 |vpiParent: @@ -4371,21 +4365,19 @@ design: (work@top) |vpiActual: \_io_decl: (arg1), line:22:26, endln:22:30 |vpiLhs: - \_part_select: , line:32:8, endln:32:26 + \_part_select: result_t (work@top.inst.fshl_u_1.result_t), line:32:8, endln:32:26 |vpiParent: - \_ref_obj: result_t (work@top.inst.fshl_u_1.result_t) - |vpiParent: - \_assignment: , line:32:8, endln:32:33 - |vpiName:result_t - |vpiFullName:work@top.inst.fshl_u_1.result_t - |vpiDefName:result_t - |vpiActual: - \_logic_var: (work@top.inst.fshl_u_1.result_t), line:29:6, endln:29:19 + \_assignment: , line:32:8, endln:32:33 + |vpiName:result_t + |vpiFullName:work@top.inst.fshl_u_1.result_t + |vpiDefName:result_t + |vpiActual: + \_logic_var: (result_t), line:29:6, endln:29:19 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:17, endln:32:23 |vpiParent: - \_part_select: , line:32:8, endln:32:26 + \_part_select: result_t (work@top.inst.fshl_u_1.result_t), line:32:8, endln:32:26 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.inst.fshl_u_1.result_t.ilen), line:32:17, endln:32:21 @@ -4417,7 +4409,7 @@ design: (work@top) |vpiName:result_t |vpiFullName:work@top.inst.fshl_u_1.result_t |vpiActual: - \_logic_var: (work@top.inst.fshl_u_1.result_t), line:29:6, endln:29:19 + \_logic_var: (result_t), line:29:6, endln:29:19 |vpiOperand: \_ref_obj: (work@top.inst.fshl_u_1.arg2), line:33:30, endln:33:34 |vpiParent: @@ -4433,7 +4425,7 @@ design: (work@top) |vpiName:result |vpiFullName:work@top.inst.fshl_u_1.result |vpiActual: - \_logic_var: (work@top.inst.fshl_u_1.result), line:28:6, endln:28:19 + \_logic_var: (result), line:28:6, endln:28:19 |vpiStmt: \_assignment: , line:34:8, endln:34:36 |vpiParent: @@ -4441,21 +4433,19 @@ design: (work@top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:34:20, endln:34:36 + \_part_select: result (work@top.inst.fshl_u_1.result), line:34:20, endln:34:36 |vpiParent: - \_ref_obj: result (work@top.inst.fshl_u_1.result), line:34:20, endln:34:26 - |vpiParent: - \_assignment: , line:34:8, endln:34:36 - |vpiName:result - |vpiFullName:work@top.inst.fshl_u_1.result - |vpiDefName:result - |vpiActual: - \_logic_var: (work@top.inst.fshl_u_1.result), line:28:6, endln:28:19 + \_assignment: , line:34:8, endln:34:36 + |vpiName:result + |vpiFullName:work@top.inst.fshl_u_1.result + |vpiDefName:result + |vpiActual: + \_logic_var: (result), line:28:6, endln:28:19 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:27, endln:34:33 |vpiParent: - \_part_select: , line:34:20, endln:34:36 + \_part_select: result (work@top.inst.fshl_u_1.result), line:34:20, endln:34:36 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.inst.fshl_u_1.result.olen), line:34:27, endln:34:31 @@ -4476,7 +4466,7 @@ design: (work@top) |vpiName:fshl_u_1 |vpiFullName:work@top.inst.fshl_u_1.fshl_u_1 |vpiActual: - \_logic_var: , line:21:12, endln:21:25 + \_logic_var: (fshl_u_1), line:21:12, endln:21:25 |vpiInstance: \_module_inst: work@shift (work@top.inst), file:${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv, line:93:3, endln:101:5 |vpiTaskFunc: @@ -4567,7 +4557,7 @@ design: (work@top) |vpiName:fshl_u |vpiFullName:work@top.inst.fshl_u.fshl_u |vpiActual: - \_logic_var: , line:38:12, endln:38:25 + \_logic_var: (fshl_u), line:38:12, endln:38:25 |vpiInstance: \_module_inst: work@shift (work@top.inst), file:${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv, line:93:3, endln:101:5 |vpiTaskFunc: @@ -4794,7 +4784,7 @@ design: (work@top) |vpiName:result_t |vpiFullName:work@top.inst.fshr_u.result_t |vpiActual: - \_logic_var: (work@top.inst.fshr_u.result_t), line:53:6, endln:53:26 + \_logic_var: (result_t), line:53:6, endln:53:26 |vpiStmt: \_assignment: , line:56:8, endln:56:36 |vpiParent: @@ -4810,21 +4800,19 @@ design: (work@top) |vpiActual: \_io_decl: (arg1), line:46:26, endln:46:30 |vpiLhs: - \_part_select: , line:56:8, endln:56:29 + \_part_select: result_t (work@top.inst.fshr_u.result_t), line:56:8, endln:56:29 |vpiParent: - \_ref_obj: result_t (work@top.inst.fshr_u.result_t) - |vpiParent: - \_assignment: , line:56:8, endln:56:36 - |vpiName:result_t - |vpiFullName:work@top.inst.fshr_u.result_t - |vpiDefName:result_t - |vpiActual: - \_logic_var: (work@top.inst.fshr_u.result_t), line:53:6, endln:53:26 + \_assignment: , line:56:8, endln:56:36 + |vpiName:result_t + |vpiFullName:work@top.inst.fshr_u.result_t + |vpiDefName:result_t + |vpiActual: + \_logic_var: (result_t), line:53:6, endln:53:26 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:17, endln:56:26 |vpiParent: - \_part_select: , line:56:8, endln:56:29 + \_part_select: result_t (work@top.inst.fshr_u.result_t), line:56:8, endln:56:29 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.inst.fshr_u.result_t.width_a), line:56:17, endln:56:24 @@ -4856,7 +4844,7 @@ design: (work@top) |vpiName:result_t |vpiFullName:work@top.inst.fshr_u.result_t |vpiActual: - \_logic_var: (work@top.inst.fshr_u.result_t), line:53:6, endln:53:26 + \_logic_var: (result_t), line:53:6, endln:53:26 |vpiOperand: \_ref_obj: (work@top.inst.fshr_u.arg2), line:57:30, endln:57:34 |vpiParent: @@ -4872,7 +4860,7 @@ design: (work@top) |vpiName:result |vpiFullName:work@top.inst.fshr_u.result |vpiActual: - \_logic_var: (work@top.inst.fshr_u.result), line:52:6, endln:52:26 + \_logic_var: (result), line:52:6, endln:52:26 |vpiStmt: \_assignment: , line:58:8, endln:58:34 |vpiParent: @@ -4880,21 +4868,19 @@ design: (work@top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:58:18, endln:58:34 + \_part_select: result (work@top.inst.fshr_u.result), line:58:18, endln:58:34 |vpiParent: - \_ref_obj: result (work@top.inst.fshr_u.result), line:58:18, endln:58:24 - |vpiParent: - \_assignment: , line:58:8, endln:58:34 - |vpiName:result - |vpiFullName:work@top.inst.fshr_u.result - |vpiDefName:result - |vpiActual: - \_logic_var: (work@top.inst.fshr_u.result), line:52:6, endln:52:26 + \_assignment: , line:58:8, endln:58:34 + |vpiName:result + |vpiFullName:work@top.inst.fshr_u.result + |vpiDefName:result + |vpiActual: + \_logic_var: (result), line:52:6, endln:52:26 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:25, endln:58:31 |vpiParent: - \_part_select: , line:58:18, endln:58:34 + \_part_select: result (work@top.inst.fshr_u.result), line:58:18, endln:58:34 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.inst.fshr_u.result.olen), line:58:25, endln:58:29 @@ -4915,7 +4901,7 @@ design: (work@top) |vpiName:fshr_u |vpiFullName:work@top.inst.fshr_u.fshr_u |vpiActual: - \_logic_var: , line:45:12, endln:45:25 + \_logic_var: (fshr_u), line:45:12, endln:45:25 |vpiInstance: \_module_inst: work@shift (work@top.inst), file:${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv, line:93:3, endln:101:5 |vpiTaskFunc: @@ -4975,15 +4961,11 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.inst.fshl_s.arg2), line:68:13, endln:68:28 |vpiParent: - \_ref_obj: (work@top.inst.fshl_s.arg2) - |vpiParent: - \_operation: , line:68:13, endln:68:36 - |vpiName:arg2 - |vpiFullName:work@top.inst.fshl_s.arg2 - |vpiActual: - \_io_decl: (arg2), line:64:26, endln:64:30 + \_operation: , line:68:13, endln:68:36 |vpiName:arg2 |vpiFullName:work@top.inst.fshl_s.arg2 + |vpiActual: + \_io_decl: (arg2), line:64:26, endln:64:30 |vpiIndex: \_operation: , line:68:18, endln:68:27 |vpiParent: @@ -4999,8 +4981,6 @@ design: (work@top) \_parameter: (work@top.inst.width_s), line:4:16, endln:4:23 |vpiOperand: \_constant: , line:68:26, endln:68:27 - |vpiActual: - \_io_decl: (arg2), line:64:26, endln:64:30 |vpiOperand: \_constant: , line:68:32, endln:68:36 |vpiStmt: @@ -5042,21 +5022,19 @@ design: (work@top) |vpiOperand: \_constant: , line:70:46, endln:70:50 |vpiLhs: - \_part_select: , line:70:10, endln:70:30 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:70:10, endln:70:30 |vpiParent: - \_ref_obj: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:70:10, endln:70:52 - |vpiName:sbit_arg1 - |vpiFullName:work@top.inst.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 - |vpiActual: - \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 + \_assignment: , line:70:10, endln:70:52 + |vpiName:sbit_arg1 + |vpiFullName:work@top.inst.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@top.inst.fshl_s.sbit_arg1.width_a), line:70:20, endln:70:27 |vpiParent: - \_part_select: , line:70:10, endln:70:30 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:70:10, endln:70:30 |vpiName:width_a |vpiFullName:work@top.inst.fshl_s.sbit_arg1.width_a |vpiActual: @@ -5107,7 +5085,7 @@ design: (work@top) |vpiName:fshl_s |vpiFullName:work@top.inst.fshl_s.fshl_s |vpiActual: - \_logic_var: , line:62:12, endln:62:25 + \_logic_var: (fshl_s), line:62:12, endln:62:25 |vpiElseStmt: \_begin: (work@top.inst.fshl_s), line:74:8, endln:78:11 |vpiParent: @@ -5130,25 +5108,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.inst.fshl_s.sbit_arg1), line:75:10, endln:75:28 |vpiParent: - \_ref_obj: (work@top.inst.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:75:10, endln:75:35 - |vpiName:sbit_arg1 - |vpiFullName:work@top.inst.fshl_s.sbit_arg1 - |vpiActual: - \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 + \_assignment: , line:75:10, endln:75:35 |vpiName:sbit_arg1 |vpiFullName:work@top.inst.fshl_s.sbit_arg1 + |vpiActual: + \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 |vpiIndex: - \_ref_obj: (work@top.inst.fshl_s.sbit_arg1.width_a), line:75:20, endln:75:27 + \_ref_obj: (work@top.inst.fshl_s.width_a), line:75:20, endln:75:27 |vpiParent: \_bit_select: (work@top.inst.fshl_s.sbit_arg1), line:75:10, endln:75:28 |vpiName:width_a - |vpiFullName:work@top.inst.fshl_s.sbit_arg1.width_a + |vpiFullName:work@top.inst.fshl_s.width_a |vpiActual: \_parameter: (work@top.inst.width_a), line:2:16, endln:2:23 - |vpiActual: - \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 |vpiStmt: \_assignment: , line:76:10, endln:76:39 |vpiParent: @@ -5164,21 +5136,19 @@ design: (work@top) |vpiActual: \_io_decl: (arg1), line:63:26, endln:63:30 |vpiLhs: - \_part_select: , line:76:10, endln:76:32 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:76:10, endln:76:32 |vpiParent: - \_ref_obj: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1) - |vpiParent: - \_assignment: , line:76:10, endln:76:39 - |vpiName:sbit_arg1 - |vpiFullName:work@top.inst.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 - |vpiActual: - \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 + \_assignment: , line:76:10, endln:76:39 + |vpiName:sbit_arg1 + |vpiFullName:work@top.inst.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:76:20, endln:76:29 |vpiParent: - \_part_select: , line:76:10, endln:76:32 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:76:10, endln:76:32 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.inst.fshl_s.sbit_arg1.width_a), line:76:20, endln:76:27 @@ -5203,21 +5173,19 @@ design: (work@top) |vpiParent: \_assignment: , line:77:10, endln:77:60 |vpiArgument: - \_part_select: , line:77:26, endln:77:46 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:77:26, endln:77:46 |vpiParent: - \_ref_obj: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:77:26, endln:77:35 - |vpiParent: - \_func_call: (fshr_u), line:77:19, endln:77:60 - |vpiName:sbit_arg1 - |vpiFullName:work@top.inst.fshl_s.sbit_arg1 - |vpiDefName:sbit_arg1 - |vpiActual: - \_logic_var: (work@top.inst.fshl_s.sbit_arg1), line:66:6, endln:66:21 + \_func_call: (fshr_u), line:77:19, endln:77:60 + |vpiName:sbit_arg1 + |vpiFullName:work@top.inst.fshl_s.sbit_arg1 + |vpiDefName:sbit_arg1 + |vpiActual: + \_logic_var: (sbit_arg1), line:66:6, endln:66:21 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@top.inst.fshl_s.sbit_arg1.width_a), line:77:36, endln:77:43 |vpiParent: - \_part_select: , line:77:26, endln:77:46 + \_part_select: sbit_arg1 (work@top.inst.fshl_s.sbit_arg1), line:77:26, endln:77:46 |vpiName:width_a |vpiFullName:work@top.inst.fshl_s.sbit_arg1.width_a |vpiActual: @@ -5255,7 +5223,7 @@ design: (work@top) |vpiName:fshl_s |vpiFullName:work@top.inst.fshl_s.fshl_s |vpiActual: - \_logic_var: , line:62:12, endln:62:25 + \_logic_var: (fshl_s), line:62:12, endln:62:25 |vpiInstance: \_module_inst: work@shift (work@top.inst), file:${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv, line:93:3, endln:101:5 |vpiNet: @@ -5518,15 +5486,11 @@ design: (work@top) |vpiArgument: \_bit_select: (work@top.inst.a), line:13:27, endln:13:39 |vpiParent: - \_ref_obj: (work@top.inst.SGNED.a) - |vpiParent: - \_func_call: (fshl_s), line:13:16, endln:13:40 - |vpiName:a - |vpiFullName:work@top.inst.SGNED.a - |vpiActual: - \_logic_net: (work@top.inst.a), line:1:14, endln:1:15 + \_func_call: (fshl_s), line:13:16, endln:13:40 |vpiName:a |vpiFullName:work@top.inst.a + |vpiActual: + \_logic_net: (work@top.inst.a), line:1:14, endln:1:15 |vpiIndex: \_operation: , line:13:29, endln:13:38 |vpiParent: @@ -5548,8 +5512,6 @@ design: (work@top) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@top.inst.a), line:1:14, endln:1:15 |vpiName:fshl_s |vpiFunction: \_function: (work@top.inst.fshl_s), line:62:3, endln:80:14 @@ -5569,4 +5531,4 @@ design: (work@top) [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv | ${SURELOG_DIR}/build/regression/FuncIoTypespec/roundtrip/dut_000.sv | 48 | 102 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/FuncIoTypespec/dut.sv | ${SURELOG_DIR}/build/regression/FuncIoTypespec/roundtrip/dut_000.sv | 54 | 102 | \ No newline at end of file diff --git a/tests/FuncNoArgs/FuncNoArgs.log b/tests/FuncNoArgs/FuncNoArgs.log index b79bb489cc..4224545abe 100644 --- a/tests/FuncNoArgs/FuncNoArgs.log +++ b/tests/FuncNoArgs/FuncNoArgs.log @@ -567,7 +567,7 @@ package 2 param_assign 14 parameter 14 range 6 -ref_obj 9 +ref_obj 8 ref_var 1 task 9 === UHDM Object Stats End === @@ -604,7 +604,7 @@ package 2 param_assign 14 parameter 14 range 6 -ref_obj 18 +ref_obj 16 ref_var 2 task 18 === UHDM Object Stats End === @@ -1212,8 +1212,6 @@ design: (work@my_opt_reduce_or) |vpiBlocking:1 |vpiRhs: \_constant: , line:10:35, endln:10:36 - |vpiParent: - \_assignment: , line:10:13, endln:10:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1221,7 +1219,7 @@ design: (work@my_opt_reduce_or) |vpiLhs: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits), line:10:13, endln:10:32 |vpiParent: - \_begin: (work@my_opt_reduce_or.count_nonconst_bits), line:9:9, endln:14:12 + \_assignment: , line:10:13, endln:10:36 |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: @@ -1258,12 +1256,12 @@ design: (work@my_opt_reduce_or) |vpiRhs: \_operation: , line:11:40, endln:11:43 |vpiParent: - \_for_stmt: (work@my_opt_reduce_or.count_nonconst_bits), line:11:13, endln:11:16 + \_assignment: , line:11:38, endln:11:43 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.i), line:11:40, endln:11:41 |vpiParent: - \_for_stmt: (work@my_opt_reduce_or.count_nonconst_bits), line:11:13, endln:11:16 + \_operation: , line:11:40, endln:11:43 |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: @@ -1279,7 +1277,7 @@ design: (work@my_opt_reduce_or) |vpiLhs: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.i), line:11:38, endln:11:39 |vpiParent: - \_for_stmt: (work@my_opt_reduce_or.count_nonconst_bits), line:11:13, endln:11:16 + \_assignment: , line:11:38, endln:11:43 |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: @@ -1315,17 +1313,13 @@ design: (work@my_opt_reduce_or) |vpiOperand: \_bit_select: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_), line:12:22, endln:12:45 |vpiParent: - \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_) - |vpiParent: - \_operation: , line:12:21, endln:12:45 - |vpiName:_TECHMAP_CONSTMSK_A_ - |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_ + \_operation: , line:12:21, endln:12:45 |vpiName:_TECHMAP_CONSTMSK_A_ |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_ |vpiIndex: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.i), line:12:43, endln:12:44 |vpiParent: - \_operation: , line:12:21, endln:12:45 + \_bit_select: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_), line:12:22, endln:12:45 |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: @@ -1339,12 +1333,12 @@ design: (work@my_opt_reduce_or) |vpiRhs: \_operation: , line:13:43, endln:13:64 |vpiParent: - \_if_stmt: , line:12:17, endln:13:65 + \_assignment: , line:13:21, endln:13:64 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits), line:13:43, endln:13:62 |vpiParent: - \_if_stmt: , line:12:17, endln:13:65 + \_operation: , line:13:43, endln:13:64 |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: @@ -1360,7 +1354,7 @@ design: (work@my_opt_reduce_or) |vpiLhs: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits), line:13:21, endln:13:40 |vpiParent: - \_if_stmt: , line:12:17, endln:13:65 + \_assignment: , line:13:21, endln:13:64 |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: @@ -1529,7 +1523,7 @@ design: (work@my_opt_reduce_or) |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: - \_integer_var: , line:7:14, endln:7:21 + \_integer_var: (count_nonconst_bits), line:7:14, endln:7:21 |vpiStmt: \_for_stmt: (work@my_opt_reduce_or.count_nonconst_bits), line:11:13, endln:11:16 |vpiParent: @@ -1567,7 +1561,7 @@ design: (work@my_opt_reduce_or) |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: - \_integer_var: (work@my_opt_reduce_or.count_nonconst_bits.i), line:8:9, endln:8:16 + \_integer_var: (i), line:8:9, endln:8:16 |vpiOperand: \_constant: , line:11:42, endln:11:43 |vpiLhs: @@ -1577,7 +1571,7 @@ design: (work@my_opt_reduce_or) |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: - \_integer_var: (work@my_opt_reduce_or.count_nonconst_bits.i), line:8:9, endln:8:16 + \_integer_var: (i), line:8:9, endln:8:16 |vpiCondition: \_operation: , line:11:25, endln:11:36 |vpiParent: @@ -1590,7 +1584,7 @@ design: (work@my_opt_reduce_or) |vpiName:i |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: - \_integer_var: (work@my_opt_reduce_or.count_nonconst_bits.i), line:8:9, endln:8:16 + \_integer_var: (i), line:8:9, endln:8:16 |vpiOperand: \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.A_WIDTH), line:11:29, endln:11:36 |vpiParent: @@ -1611,25 +1605,19 @@ design: (work@my_opt_reduce_or) |vpiOperand: \_bit_select: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_), line:12:22, endln:12:45 |vpiParent: - \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_) - |vpiParent: - \_operation: , line:12:21, endln:12:45 - |vpiName:_TECHMAP_CONSTMSK_A_ - |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_ - |vpiActual: - \_parameter: (work@my_opt_reduce_or._TECHMAP_CONSTMSK_A_), line:5:32, endln:5:52 + \_operation: , line:12:21, endln:12:45 |vpiName:_TECHMAP_CONSTMSK_A_ |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_ + |vpiActual: + \_parameter: (work@my_opt_reduce_or._TECHMAP_CONSTMSK_A_), line:5:32, endln:5:52 |vpiIndex: - \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_.i), line:12:43, endln:12:44 + \_ref_obj: (work@my_opt_reduce_or.count_nonconst_bits.i), line:12:43, endln:12:44 |vpiParent: \_bit_select: (work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_), line:12:22, endln:12:45 |vpiName:i - |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits._TECHMAP_CONSTMSK_A_.i + |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.i |vpiActual: - \_integer_var: (work@my_opt_reduce_or.count_nonconst_bits.i), line:8:9, endln:8:16 - |vpiActual: - \_parameter: (work@my_opt_reduce_or._TECHMAP_CONSTMSK_A_), line:5:32, endln:5:52 + \_integer_var: (i), line:8:9, endln:8:16 |vpiStmt: \_assignment: , line:13:21, endln:13:64 |vpiParent: @@ -1648,7 +1636,7 @@ design: (work@my_opt_reduce_or) |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: - \_integer_var: , line:7:14, endln:7:21 + \_integer_var: (count_nonconst_bits), line:7:14, endln:7:21 |vpiOperand: \_constant: , line:13:63, endln:13:64 |vpiLhs: @@ -1658,7 +1646,7 @@ design: (work@my_opt_reduce_or) |vpiName:count_nonconst_bits |vpiFullName:work@my_opt_reduce_or.count_nonconst_bits.count_nonconst_bits |vpiActual: - \_integer_var: , line:7:14, endln:7:21 + \_integer_var: (count_nonconst_bits), line:7:14, endln:7:21 |vpiInstance: \_module_inst: work@my_opt_reduce_or (work@my_opt_reduce_or), file:${SURELOG_DIR}/tests/FuncNoArgs/dut.sv, line:1:1, endln:31:10 |vpiNet: diff --git a/tests/FuncParam/FuncParam.log b/tests/FuncParam/FuncParam.log index 6f04a27753..8c393e8594 100644 --- a/tests/FuncParam/FuncParam.log +++ b/tests/FuncParam/FuncParam.log @@ -620,7 +620,7 @@ design: (work@aes_prng) |vpiOperand: \_ref_obj: (work@prim_lfsr.compute.LfsrDw), line:4:14, endln:4:20 |vpiParent: - \_begin: (work@prim_lfsr.compute) + \_operation: , line:4:14, endln:4:22 |vpiName:LfsrDw |vpiFullName:work@prim_lfsr.compute.LfsrDw |vpiActual: diff --git a/tests/FuncRetArray/FuncRetArray.log b/tests/FuncRetArray/FuncRetArray.log index 0f1585aef4..0f8e55d5c0 100644 --- a/tests/FuncRetArray/FuncRetArray.log +++ b/tests/FuncRetArray/FuncRetArray.log @@ -357,7 +357,7 @@ param_assign 14 parameter 14 range 5 ref_module 1 -ref_obj 10 +ref_obj 3 sys_task_call 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -386,7 +386,7 @@ param_assign 14 parameter 14 range 5 ref_module 1 -ref_obj 14 +ref_obj 6 sys_task_call 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncRetArray/slpp_all/surelog.uhdm ... @@ -636,7 +636,7 @@ design: (work@main) |vpiRhs: \_constant: , line:5:32, endln:5:33 |vpiParent: - \_assignment: , line:5:14, endln:5:33 + \_operation: , line:17:6, endln:17:19 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -644,17 +644,15 @@ design: (work@main) |vpiLhs: \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:5:14, endln:5:29 |vpiParent: - \_ref_obj: (work@top.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:5:14, endln:5:33 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + \_assignment: , line:5:14, endln:5:33 |vpiName:ASSIGN_VADDR |vpiFullName:work@top.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:3:21, endln:3:39 |vpiIndex: \_ref_obj: (work@top.ASSIGN_VADDR.i), line:5:27, endln:5:28 |vpiParent: - \_begin: (work@top.ASSIGN_VADDR), line:4:37, endln:6:12 + \_bit_select: (work@top.ASSIGN_VADDR.ASSIGN_VADDR), line:5:14, endln:5:29 |vpiName:i |vpiFullName:work@top.ASSIGN_VADDR.i |vpiActual: @@ -671,10 +669,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:11:6, endln:11:14 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:11:6, endln:11:19 - |vpiName:VADDR + \_operation: , line:11:6, endln:11:19 |vpiName:VADDR |vpiIndex: \_constant: , line:11:12, endln:11:13 @@ -704,10 +699,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:14:6, endln:14:14 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:14:6, endln:14:19 - |vpiName:VADDR + \_operation: , line:14:6, endln:14:19 |vpiName:VADDR |vpiIndex: \_constant: , line:14:12, endln:14:13 @@ -737,10 +729,7 @@ design: (work@main) |vpiOperand: \_bit_select: (VADDR), line:17:6, endln:17:14 |vpiParent: - \_ref_obj: (VADDR) - |vpiParent: - \_operation: , line:17:6, endln:17:19 - |vpiName:VADDR + \_operation: , line:17:6, endln:17:19 |vpiName:VADDR |vpiIndex: \_constant: , line:17:12, endln:17:13 @@ -941,25 +930,19 @@ design: (work@main) |vpiLhs: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:5:14, endln:5:29 |vpiParent: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR) - |vpiParent: - \_assignment: , line:5:14, endln:5:33 - |vpiName:ASSIGN_VADDR - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR - |vpiActual: - \_array_var: , line:3:21, endln:3:39 + \_assignment: , line:5:14, endln:5:33 |vpiName:ASSIGN_VADDR |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR + |vpiActual: + \_array_var: , line:3:21, endln:3:39 |vpiIndex: - \_ref_obj: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i), line:5:27, endln:5:28 + \_ref_obj: (work@main.top1.ASSIGN_VADDR.i), line:5:27, endln:5:28 |vpiParent: \_bit_select: (work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR), line:5:14, endln:5:29 |vpiName:i - |vpiFullName:work@main.top1.ASSIGN_VADDR.ASSIGN_VADDR.i + |vpiFullName:work@main.top1.ASSIGN_VADDR.i |vpiActual: \_int_var: (work@top.ASSIGN_VADDR.i), line:4:18, endln:4:19 - |vpiActual: - \_array_var: , line:3:21, endln:3:39 |vpiInstance: \_module_inst: work@top (work@main.top1), file:${SURELOG_DIR}/tests/FuncRetArray/dut.sv, line:23:5, endln:23:20 |vpiInstance: diff --git a/tests/FuncReturnRange/FuncReturnRange.log b/tests/FuncReturnRange/FuncReturnRange.log index 5fed73df04..8c3c331d80 100644 --- a/tests/FuncReturnRange/FuncReturnRange.log +++ b/tests/FuncReturnRange/FuncReturnRange.log @@ -459,7 +459,7 @@ design: (work@func_width_scope_top) |vpiRhs: \_operation: , line:7:17, endln:7:19 |vpiParent: - \_function: (work@func_width_scope_top.func1), line:5:5, endln:8:16 + \_assignment: , line:7:9, endln:7:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@func_width_scope_top.func1.s), line:7:18, endln:7:19 @@ -472,7 +472,7 @@ design: (work@func_width_scope_top) |vpiLhs: \_ref_obj: (work@func_width_scope_top.func1.func1), line:7:9, endln:7:14 |vpiParent: - \_function: (work@func_width_scope_top.func1), line:5:5, endln:8:16 + \_assignment: , line:7:9, endln:7:19 |vpiName:func1 |vpiFullName:work@func_width_scope_top.func1.func1 |vpiActual: @@ -752,7 +752,7 @@ design: (work@func_width_scope_top) |vpiName:func1 |vpiFullName:work@func_width_scope_top.func1.func1 |vpiActual: - \_logic_var: , line:5:24, endln:5:37 + \_logic_var: (func1), line:5:24, endln:5:37 |vpiInstance: \_module_inst: work@func_width_scope_top (work@func_width_scope_top), file:${SURELOG_DIR}/tests/FuncReturnRange/dut.sv, line:1:1, endln:18:10 |vpiNet: diff --git a/tests/FuncSideEffect/FuncSideEffect.log b/tests/FuncSideEffect/FuncSideEffect.log index da356bb2ea..b9554b10cd 100644 --- a/tests/FuncSideEffect/FuncSideEffect.log +++ b/tests/FuncSideEffect/FuncSideEffect.log @@ -327,7 +327,7 @@ param_assign 34 parameter 34 port 6 range 27 -ref_obj 18 +ref_obj 17 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -351,7 +351,7 @@ param_assign 34 parameter 34 port 9 range 27 -ref_obj 33 +ref_obj 31 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncSideEffect/slpp_all/surelog.uhdm ... @@ -438,7 +438,7 @@ design: (work@const_fold_func_top) |vpiRhs: \_operation: , line:9:16, endln:9:20 |vpiParent: - \_function: (work@const_fold_func_top.flip), line:7:5, endln:10:16 + \_assignment: , line:9:9, endln:9:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@const_fold_func_top.flip.inp), line:9:17, endln:9:20 @@ -451,7 +451,7 @@ design: (work@const_fold_func_top) |vpiLhs: \_ref_obj: (work@const_fold_func_top.flip.flip), line:9:9, endln:9:13 |vpiParent: - \_function: (work@const_fold_func_top.flip), line:7:5, endln:10:16 + \_assignment: , line:9:9, endln:9:20 |vpiName:flip |vpiFullName:work@const_fold_func_top.flip.flip |vpiActual: @@ -538,12 +538,12 @@ design: (work@const_fold_func_top) |vpiRhs: \_operation: , line:15:21, endln:15:29 |vpiParent: - \_begin: (work@const_fold_func_top.pow_flip_b), line:14:5, endln:19:8 + \_assignment: , line:15:9, endln:15:29 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@const_fold_func_top.pow_flip_b.base), line:15:21, endln:15:25 |vpiParent: - \_begin: (work@const_fold_func_top.pow_flip_b), line:14:5, endln:19:8 + \_operation: , line:15:21, endln:15:29 |vpiName:base |vpiFullName:work@const_fold_func_top.pow_flip_b.base |vpiActual: @@ -559,17 +559,13 @@ design: (work@const_fold_func_top) |vpiLhs: \_bit_select: (work@const_fold_func_top.pow_flip_b.out2), line:15:9, endln:15:18 |vpiParent: - \_ref_obj: (work@const_fold_func_top.pow_flip_b.out2) - |vpiParent: - \_assignment: , line:15:9, endln:15:29 - |vpiName:out2 - |vpiFullName:work@const_fold_func_top.pow_flip_b.out2 + \_assignment: , line:15:9, endln:15:29 |vpiName:out2 |vpiFullName:work@const_fold_func_top.pow_flip_b.out2 |vpiIndex: \_ref_obj: (work@const_fold_func_top.pow_flip_b.exp), line:15:14, endln:15:17 |vpiParent: - \_begin: (work@const_fold_func_top.pow_flip_b), line:14:5, endln:19:8 + \_bit_select: (work@const_fold_func_top.pow_flip_b.out2), line:15:9, endln:15:18 |vpiName:exp |vpiFullName:work@const_fold_func_top.pow_flip_b.exp |vpiActual: @@ -582,8 +578,6 @@ design: (work@const_fold_func_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:22, endln:16:23 - |vpiParent: - \_assignment: , line:16:9, endln:16:23 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -591,7 +585,7 @@ design: (work@const_fold_func_top) |vpiLhs: \_ref_obj: (work@const_fold_func_top.pow_flip_b.pow_flip_b), line:16:9, endln:16:19 |vpiParent: - \_begin: (work@const_fold_func_top.pow_flip_b), line:14:5, endln:19:8 + \_assignment: , line:16:9, endln:16:23 |vpiName:pow_flip_b |vpiFullName:work@const_fold_func_top.pow_flip_b.pow_flip_b |vpiActual: @@ -608,7 +602,7 @@ design: (work@const_fold_func_top) |vpiOperand: \_ref_obj: (work@const_fold_func_top.pow_flip_b.exp), line:17:13, endln:17:16 |vpiParent: - \_begin: (work@const_fold_func_top.pow_flip_b), line:14:5, endln:19:8 + \_operation: , line:17:13, endln:17:20 |vpiName:exp |vpiFullName:work@const_fold_func_top.pow_flip_b.exp |vpiActual: @@ -630,12 +624,12 @@ design: (work@const_fold_func_top) |vpiRhs: \_operation: , line:18:26, endln:18:64 |vpiParent: - \_if_stmt: , line:17:9, endln:18:65 + \_assignment: , line:18:13, endln:18:64 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@const_fold_func_top.pow_flip_b.base), line:18:26, endln:18:30 |vpiParent: - \_if_stmt: , line:17:9, endln:18:65 + \_operation: , line:18:26, endln:18:64 |vpiName:base |vpiFullName:work@const_fold_func_top.pow_flip_b.base |vpiActual: @@ -667,7 +661,7 @@ design: (work@const_fold_func_top) |vpiOperand: \_ref_obj: (work@const_fold_func_top.pow_flip_b.exp), line:18:56, endln:18:59 |vpiParent: - \_func_call: (pow_flip_b), line:18:33, endln:18:64 + \_operation: , line:18:56, endln:18:63 |vpiName:exp |vpiFullName:work@const_fold_func_top.pow_flip_b.exp |vpiActual: @@ -686,7 +680,7 @@ design: (work@const_fold_func_top) |vpiLhs: \_ref_obj: (work@const_fold_func_top.pow_flip_b.pow_flip_b), line:18:13, endln:18:23 |vpiParent: - \_if_stmt: , line:17:9, endln:18:65 + \_assignment: , line:18:13, endln:18:64 |vpiName:pow_flip_b |vpiFullName:work@const_fold_func_top.pow_flip_b.pow_flip_b |vpiActual: @@ -892,7 +886,7 @@ design: (work@const_fold_func_top) |vpiName:flip |vpiFullName:work@const_fold_func_top.flip.flip |vpiActual: - \_logic_var: , line:7:24, endln:7:29 + \_logic_var: (flip), line:7:24, endln:7:29 |vpiInstance: \_module_inst: work@const_fold_func_top (work@const_fold_func_top), file:${SURELOG_DIR}/tests/FuncSideEffect/dut.sv, line:1:1, endln:23:10 |vpiTaskFunc: @@ -950,25 +944,19 @@ design: (work@const_fold_func_top) |vpiLhs: \_bit_select: (work@const_fold_func_top.out2), line:15:9, endln:15:18 |vpiParent: - \_ref_obj: (work@const_fold_func_top.pow_flip_b.out2) - |vpiParent: - \_assignment: , line:15:9, endln:15:29 - |vpiName:out2 - |vpiFullName:work@const_fold_func_top.pow_flip_b.out2 - |vpiActual: - \_logic_net: (work@const_fold_func_top.out2), line:4:22, endln:4:26 + \_assignment: , line:15:9, endln:15:29 |vpiName:out2 |vpiFullName:work@const_fold_func_top.out2 + |vpiActual: + \_logic_net: (work@const_fold_func_top.out2), line:4:22, endln:4:26 |vpiIndex: - \_ref_obj: (work@const_fold_func_top.pow_flip_b.out2.exp), line:15:14, endln:15:17 + \_ref_obj: (work@const_fold_func_top.pow_flip_b.exp), line:15:14, endln:15:17 |vpiParent: \_bit_select: (work@const_fold_func_top.out2), line:15:9, endln:15:18 |vpiName:exp - |vpiFullName:work@const_fold_func_top.pow_flip_b.out2.exp + |vpiFullName:work@const_fold_func_top.pow_flip_b.exp |vpiActual: \_io_decl: (exp), line:13:23, endln:13:26 - |vpiActual: - \_logic_net: (work@const_fold_func_top.out2), line:4:22, endln:4:26 |vpiStmt: \_assignment: , line:16:9, endln:16:23 |vpiParent: @@ -984,7 +972,7 @@ design: (work@const_fold_func_top) |vpiName:pow_flip_b |vpiFullName:work@const_fold_func_top.pow_flip_b.pow_flip_b |vpiActual: - \_logic_var: , line:12:22, endln:12:27 + \_logic_var: (pow_flip_b), line:12:22, endln:12:27 |vpiStmt: \_if_stmt: , line:17:9, endln:18:65 |vpiParent: @@ -1067,7 +1055,7 @@ design: (work@const_fold_func_top) |vpiName:pow_flip_b |vpiFullName:work@const_fold_func_top.pow_flip_b.pow_flip_b |vpiActual: - \_logic_var: , line:12:22, endln:12:27 + \_logic_var: (pow_flip_b), line:12:22, endln:12:27 |vpiInstance: \_module_inst: work@const_fold_func_top (work@const_fold_func_top), file:${SURELOG_DIR}/tests/FuncSideEffect/dut.sv, line:1:1, endln:23:10 |vpiNet: diff --git a/tests/FuncStatic/FuncStatic.log b/tests/FuncStatic/FuncStatic.log index 58c2e885b4..95138654a8 100644 --- a/tests/FuncStatic/FuncStatic.log +++ b/tests/FuncStatic/FuncStatic.log @@ -477,12 +477,12 @@ design: (work@test) |vpiRhs: \_operation: , line:5:9, endln:5:20 |vpiParent: - \_begin: (work@test.accumulate1) + \_assignment: , line:5:3, endln:5:20 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test.accumulate1.acc), line:5:9, endln:5:12 |vpiParent: - \_begin: (work@test.accumulate1) + \_operation: , line:5:9, endln:5:20 |vpiName:acc |vpiFullName:work@test.accumulate1.acc |vpiActual: @@ -498,7 +498,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.accumulate1.acc), line:5:3, endln:5:6 |vpiParent: - \_begin: (work@test.accumulate1) + \_assignment: , line:5:3, endln:5:20 |vpiName:acc |vpiFullName:work@test.accumulate1.acc |vpiActual: @@ -577,12 +577,12 @@ design: (work@test) |vpiRhs: \_operation: , line:11:9, endln:11:20 |vpiParent: - \_begin: (work@test.accumulate2) + \_assignment: , line:11:3, endln:11:20 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test.accumulate2.acc), line:11:9, endln:11:12 |vpiParent: - \_begin: (work@test.accumulate2) + \_operation: , line:11:9, endln:11:20 |vpiName:acc |vpiFullName:work@test.accumulate2.acc |vpiActual: @@ -598,7 +598,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.accumulate2.acc), line:11:3, endln:11:6 |vpiParent: - \_begin: (work@test.accumulate2) + \_assignment: , line:11:3, endln:11:20 |vpiName:acc |vpiFullName:work@test.accumulate2.acc |vpiActual: diff --git a/tests/FuncStruct/FuncStruct.log b/tests/FuncStruct/FuncStruct.log index 508f25837e..81bf9afa0c 100644 --- a/tests/FuncStruct/FuncStruct.log +++ b/tests/FuncStruct/FuncStruct.log @@ -275,7 +275,7 @@ packed_array_typespec 2 param_assign 2 parameter 2 range 26 -ref_obj 11 +ref_obj 6 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -299,7 +299,7 @@ packed_array_typespec 2 param_assign 2 parameter 2 range 26 -ref_obj 24 +ref_obj 14 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/FuncStruct/slpp_all/surelog.uhdm ... @@ -554,8 +554,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:13, endln:6:25 - |vpiParent: - \_assignment: , line:6:3, endln:6:25 |vpiDecompile:32'h11111111 |vpiSize:32 |HEX:11111111 @@ -585,15 +583,11 @@ design: (work@dut) |vpiLhs: \_bit_select: (hmac_pkg::compress::compress), line:7:3, endln:7:14 |vpiParent: - \_ref_obj: (hmac_pkg::compress::compress) - |vpiParent: - \_assignment: , line:7:3, endln:7:26 - |vpiName:compress - |vpiFullName:hmac_pkg::compress::compress - |vpiActual: - \_logic_var: , line:3:20, endln:3:36 + \_assignment: , line:7:3, endln:7:26 |vpiName:compress |vpiFullName:hmac_pkg::compress::compress + |vpiActual: + \_logic_var: , line:3:20, endln:3:36 |vpiIndex: \_constant: , line:7:12, endln:7:13 |vpiParent: @@ -602,8 +596,6 @@ design: (work@dut) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_logic_var: , line:3:20, endln:3:36 |vpiInstance: \_package: hmac_pkg (hmac_pkg::), file:${SURELOG_DIR}/tests/FuncStruct/dut.sv, line:1:1, endln:9:11 |uhdmtopPackages: @@ -848,8 +840,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:13, endln:6:25 - |vpiParent: - \_assignment: , line:6:3, endln:6:25 |vpiDecompile:32'h11111111 |vpiSize:32 |HEX:11111111 @@ -879,15 +869,11 @@ design: (work@dut) |vpiLhs: \_bit_select: (hmac_pkg::compress::compress), line:7:3, endln:7:14 |vpiParent: - \_ref_obj: (hmac_pkg::compress::compress) - |vpiParent: - \_assignment: , line:7:3, endln:7:26 - |vpiName:compress - |vpiFullName:hmac_pkg::compress::compress - |vpiActual: - \_logic_var: , line:3:20, endln:3:36 + \_assignment: , line:7:3, endln:7:26 |vpiName:compress |vpiFullName:hmac_pkg::compress::compress + |vpiActual: + \_logic_var: , line:3:20, endln:3:36 |vpiIndex: \_constant: , line:7:12, endln:7:13 |vpiParent: @@ -896,8 +882,6 @@ design: (work@dut) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_logic_var: , line:3:20, endln:3:36 |vpiInstance: \_package: hmac_pkg (hmac_pkg::), file:${SURELOG_DIR}/tests/FuncStruct/dut.sv, line:1:1, endln:9:11 |uhdmallModules: @@ -961,7 +945,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (hmac_pkg::compress::sigma_0), line:6:3, endln:6:10 |vpiParent: - \_begin: (hmac_pkg::compress) + \_assignment: , line:6:3, endln:6:25 |vpiName:sigma_0 |vpiFullName:hmac_pkg::compress::sigma_0 |vpiActual: @@ -975,7 +959,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (hmac_pkg::compress::sigma_0), line:7:18, endln:7:25 |vpiParent: - \_begin: (hmac_pkg::compress) + \_assignment: , line:7:3, endln:7:26 |vpiName:sigma_0 |vpiFullName:hmac_pkg::compress::sigma_0 |vpiActual: @@ -983,13 +967,11 @@ design: (work@dut) |vpiLhs: \_bit_select: (hmac_pkg::compress::compress), line:7:3, endln:7:14 |vpiParent: - \_ref_obj: (hmac_pkg::compress::compress) - |vpiParent: - \_assignment: , line:7:3, endln:7:26 - |vpiName:compress - |vpiFullName:hmac_pkg::compress::compress + \_assignment: , line:7:3, endln:7:26 |vpiName:compress |vpiFullName:hmac_pkg::compress::compress + |vpiActual: + \_logic_var: , line:3:20, endln:3:36 |vpiIndex: \_constant: , line:7:12, endln:7:13 |vpiInstance: @@ -1023,11 +1005,7 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.w), line:16:8, endln:16:12 |vpiParent: - \_ref_obj: (work@dut.w) - |vpiParent: - \_cont_assign: , line:16:8, endln:16:27 - |vpiName:w - |vpiFullName:work@dut.w + \_cont_assign: , line:16:8, endln:16:27 |vpiName:w |vpiFullName:work@dut.w |vpiIndex: @@ -1049,11 +1027,7 @@ design: (work@dut) |vpiArgument: \_bit_select: (work@dut.w), line:17:24, endln:17:28 |vpiParent: - \_ref_obj: (work@dut.w) - |vpiParent: - \_func_call: (compress), line:17:15, endln:17:35 - |vpiName:w - |vpiFullName:work@dut.w + \_func_call: (compress), line:17:15, endln:17:35 |vpiTypespec: \_logic_typespec: (sha_word_t), line:2:9, endln:2:21 |vpiName:w @@ -1244,19 +1218,13 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.compress.compress), line:7:3, endln:7:14 |vpiParent: - \_ref_obj: (work@dut.compress.compress) - |vpiParent: - \_assignment: , line:7:3, endln:7:26 - |vpiName:compress - |vpiFullName:work@dut.compress.compress - |vpiActual: - \_logic_var: , line:3:20, endln:3:36 + \_assignment: , line:7:3, endln:7:26 |vpiName:compress |vpiFullName:work@dut.compress.compress - |vpiIndex: - \_constant: , line:7:12, endln:7:13 |vpiActual: \_logic_var: , line:3:20, endln:3:36 + |vpiIndex: + \_constant: , line:7:12, endln:7:13 |vpiInstance: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/FuncStruct/dut.sv, line:12:1, endln:19:10 |vpiTopModule:1 @@ -1269,15 +1237,11 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.w), line:16:8, endln:16:12 |vpiParent: - \_ref_obj: (work@dut.w) - |vpiParent: - \_cont_assign: , line:16:8, endln:16:27 - |vpiName:w - |vpiFullName:work@dut.w - |vpiActual: - \_logic_var: (work@dut.w), line:14:19, endln:14:20 + \_cont_assign: , line:16:8, endln:16:27 |vpiName:w |vpiFullName:work@dut.w + |vpiActual: + \_logic_var: (work@dut.w), line:14:19, endln:14:20 |vpiIndex: \_constant: , line:16:10, endln:16:11 |vpiParent: @@ -1286,8 +1250,6 @@ design: (work@dut) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@dut.w), line:14:19, endln:14:20 |vpiContAssign: \_cont_assign: , line:17:8, endln:17:35 |vpiParent: @@ -1299,21 +1261,15 @@ design: (work@dut) |vpiArgument: \_bit_select: (work@dut.w), line:17:24, endln:17:28 |vpiParent: - \_ref_obj: (work@dut.w) - |vpiParent: - \_func_call: (compress), line:17:15, endln:17:35 - |vpiName:w - |vpiFullName:work@dut.w - |vpiActual: - \_logic_var: (work@dut.w), line:14:19, endln:14:20 + \_func_call: (compress), line:17:15, endln:17:35 |vpiTypespec: \_logic_typespec: (sha_word_t), line:2:9, endln:2:21 |vpiName:w |vpiFullName:work@dut.w - |vpiIndex: - \_constant: , line:17:26, endln:17:27 |vpiActual: \_logic_var: (work@dut.w), line:14:19, endln:14:20 + |vpiIndex: + \_constant: , line:17:26, endln:17:27 |vpiArgument: \_ref_obj: (work@dut.hash), line:17:30, endln:17:34 |vpiParent: diff --git a/tests/Gates/Gates.log b/tests/Gates/Gates.log index a6b1cd3306..2d2bb67986 100644 --- a/tests/Gates/Gates.log +++ b/tests/Gates/Gates.log @@ -3766,8 +3766,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:135:7, endln:135:8 - |vpiParent: - \_assignment: , line:135:3, endln:135:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -3775,7 +3773,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@and_from_nand.X), line:135:3, endln:135:4 |vpiParent: - \_begin: (work@and_from_nand), line:133:9, endln:141:4 + \_assignment: , line:135:3, endln:135:8 |vpiName:X |vpiFullName:work@and_from_nand.X |vpiActual: @@ -3788,8 +3786,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:136:7, endln:136:8 - |vpiParent: - \_assignment: , line:136:3, endln:136:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -3797,7 +3793,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@and_from_nand.Y), line:136:3, endln:136:4 |vpiParent: - \_begin: (work@and_from_nand), line:133:9, endln:141:4 + \_assignment: , line:136:3, endln:136:8 |vpiName:Y |vpiFullName:work@and_from_nand.Y |vpiActual: @@ -3815,8 +3811,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:137:10, endln:137:11 - |vpiParent: - \_assignment: , line:137:6, endln:137:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -3824,7 +3818,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@and_from_nand.X), line:137:6, endln:137:7 |vpiParent: - \_delay_control: , line:137:3, endln:137:5 + \_assignment: , line:137:6, endln:137:11 |vpiName:X |vpiFullName:work@and_from_nand.X |vpiActual: @@ -3842,8 +3836,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:138:10, endln:138:11 - |vpiParent: - \_assignment: , line:138:6, endln:138:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -3851,7 +3843,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@and_from_nand.Y), line:138:6, endln:138:7 |vpiParent: - \_delay_control: , line:138:3, endln:138:5 + \_assignment: , line:138:6, endln:138:11 |vpiName:Y |vpiFullName:work@and_from_nand.Y |vpiActual: @@ -3869,8 +3861,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:139:10, endln:139:11 - |vpiParent: - \_assignment: , line:139:6, endln:139:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -3878,7 +3868,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@and_from_nand.X), line:139:6, endln:139:7 |vpiParent: - \_delay_control: , line:139:3, endln:139:5 + \_assignment: , line:139:6, endln:139:11 |vpiName:X |vpiFullName:work@and_from_nand.X |vpiActual: @@ -4152,8 +4142,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:168:7, endln:168:8 - |vpiParent: - \_assignment: , line:168:3, endln:168:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4161,7 +4149,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@delay_example.b), line:168:3, endln:168:4 |vpiParent: - \_begin: (work@delay_example), line:164:9, endln:174:4 + \_assignment: , line:168:3, endln:168:8 |vpiName:b |vpiFullName:work@delay_example.b |vpiActual: @@ -4174,8 +4162,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:169:7, endln:169:8 - |vpiParent: - \_assignment: , line:169:3, endln:169:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4183,7 +4169,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@delay_example.c), line:169:3, endln:169:4 |vpiParent: - \_begin: (work@delay_example), line:164:9, endln:174:4 + \_assignment: , line:169:3, endln:169:8 |vpiName:c |vpiFullName:work@delay_example.c |vpiActual: @@ -4201,8 +4187,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:170:11, endln:170:12 - |vpiParent: - \_assignment: , line:170:7, endln:170:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -4210,7 +4194,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@delay_example.b), line:170:7, endln:170:8 |vpiParent: - \_delay_control: , line:170:3, endln:170:6 + \_assignment: , line:170:7, endln:170:12 |vpiName:b |vpiFullName:work@delay_example.b |vpiActual: @@ -4228,8 +4212,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:171:11, endln:171:12 - |vpiParent: - \_assignment: , line:171:7, endln:171:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -4237,7 +4219,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@delay_example.c), line:171:7, endln:171:8 |vpiParent: - \_delay_control: , line:171:3, endln:171:6 + \_assignment: , line:171:7, endln:171:12 |vpiName:c |vpiFullName:work@delay_example.c |vpiActual: @@ -4255,8 +4237,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:172:11, endln:172:12 - |vpiParent: - \_assignment: , line:172:7, endln:172:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4264,7 +4244,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@delay_example.b), line:172:7, endln:172:8 |vpiParent: - \_delay_control: , line:172:3, endln:172:6 + \_assignment: , line:172:7, endln:172:12 |vpiName:b |vpiFullName:work@delay_example.b |vpiActual: @@ -4542,8 +4522,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:74:9, endln:74:10 - |vpiParent: - \_assignment: , line:74:3, endln:74:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4551,7 +4529,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@dff_from_nand.CLK), line:74:3, endln:74:6 |vpiParent: - \_begin: (work@dff_from_nand), line:72:9, endln:79:4 + \_assignment: , line:74:3, endln:74:10 |vpiName:CLK |vpiFullName:work@dff_from_nand.CLK |vpiActual: @@ -4564,8 +4542,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:75:7, endln:75:8 - |vpiParent: - \_assignment: , line:75:3, endln:75:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4573,7 +4549,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@dff_from_nand.D), line:75:3, endln:75:4 |vpiParent: - \_begin: (work@dff_from_nand), line:72:9, endln:79:4 + \_assignment: , line:75:3, endln:75:8 |vpiName:D |vpiFullName:work@dff_from_nand.D |vpiActual: @@ -4591,8 +4567,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:76:10, endln:76:11 - |vpiParent: - \_assignment: , line:76:6, endln:76:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -4600,7 +4574,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@dff_from_nand.D), line:76:6, endln:76:7 |vpiParent: - \_delay_control: , line:76:3, endln:76:5 + \_assignment: , line:76:6, endln:76:11 |vpiName:D |vpiFullName:work@dff_from_nand.D |vpiActual: @@ -4618,8 +4592,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:77:10, endln:77:11 - |vpiParent: - \_assignment: , line:77:6, endln:77:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4627,7 +4599,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@dff_from_nand.D), line:77:6, endln:77:7 |vpiParent: - \_delay_control: , line:77:3, endln:77:5 + \_assignment: , line:77:6, endln:77:11 |vpiName:D |vpiFullName:work@dff_from_nand.D |vpiActual: @@ -4660,7 +4632,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:81:17, endln:81:21 |vpiParent: - \_delay_control: , line:81:8, endln:81:10 + \_assignment: , line:81:11, endln:81:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@dff_from_nand.CLK), line:81:18, endln:81:21 @@ -4673,7 +4645,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@dff_from_nand.CLK), line:81:11, endln:81:14 |vpiParent: - \_delay_control: , line:81:8, endln:81:10 + \_assignment: , line:81:11, endln:81:21 |vpiName:CLK |vpiFullName:work@dff_from_nand.CLK |vpiActual: @@ -5113,8 +5085,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:9, endln:16:10 - |vpiParent: - \_assignment: , line:16:3, endln:16:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5122,7 +5092,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in1), line:16:3, endln:16:6 |vpiParent: - \_begin: (work@gates), line:12:9, endln:25:4 + \_assignment: , line:16:3, endln:16:10 |vpiName:in1 |vpiFullName:work@gates.in1 |vpiActual: @@ -5135,8 +5105,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:9, endln:17:10 - |vpiParent: - \_assignment: , line:17:3, endln:17:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5144,7 +5112,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in2), line:17:3, endln:17:6 |vpiParent: - \_begin: (work@gates), line:12:9, endln:25:4 + \_assignment: , line:17:3, endln:17:10 |vpiName:in2 |vpiFullName:work@gates.in2 |vpiActual: @@ -5157,8 +5125,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:18:9, endln:18:10 - |vpiParent: - \_assignment: , line:18:3, endln:18:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5166,7 +5132,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in3), line:18:3, endln:18:6 |vpiParent: - \_begin: (work@gates), line:12:9, endln:25:4 + \_assignment: , line:18:3, endln:18:10 |vpiName:in3 |vpiFullName:work@gates.in3 |vpiActual: @@ -5179,8 +5145,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:9, endln:19:10 - |vpiParent: - \_assignment: , line:19:3, endln:19:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5188,7 +5152,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in4), line:19:3, endln:19:6 |vpiParent: - \_begin: (work@gates), line:12:9, endln:25:4 + \_assignment: , line:19:3, endln:19:10 |vpiName:in4 |vpiFullName:work@gates.in4 |vpiActual: @@ -5206,8 +5170,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:20:12, endln:20:13 - |vpiParent: - \_assignment: , line:20:6, endln:20:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5215,7 +5177,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in1), line:20:6, endln:20:9 |vpiParent: - \_delay_control: , line:20:3, endln:20:5 + \_assignment: , line:20:6, endln:20:13 |vpiName:in1 |vpiFullName:work@gates.in1 |vpiActual: @@ -5233,8 +5195,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:21:12, endln:21:13 - |vpiParent: - \_assignment: , line:21:6, endln:21:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5242,7 +5202,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in2), line:21:6, endln:21:9 |vpiParent: - \_delay_control: , line:21:3, endln:21:5 + \_assignment: , line:21:6, endln:21:13 |vpiName:in2 |vpiFullName:work@gates.in2 |vpiActual: @@ -5260,8 +5220,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:22:12, endln:22:13 - |vpiParent: - \_assignment: , line:22:6, endln:22:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5269,7 +5227,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in3), line:22:6, endln:22:9 |vpiParent: - \_delay_control: , line:22:3, endln:22:5 + \_assignment: , line:22:6, endln:22:13 |vpiName:in3 |vpiFullName:work@gates.in3 |vpiActual: @@ -5287,8 +5245,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:23:12, endln:23:13 - |vpiParent: - \_assignment: , line:23:6, endln:23:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5296,7 +5252,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@gates.in4), line:23:6, endln:23:9 |vpiParent: - \_delay_control: , line:23:3, endln:23:5 + \_assignment: , line:23:6, endln:23:13 |vpiName:in4 |vpiFullName:work@gates.in4 |vpiActual: @@ -5775,8 +5731,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:104:8, endln:104:9 - |vpiParent: - \_assignment: , line:104:3, endln:104:9 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5784,7 +5738,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c0), line:104:3, endln:104:5 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:104:3, endln:104:9 |vpiName:c0 |vpiFullName:work@mux_from_gates.c0 |vpiActual: @@ -5797,8 +5751,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:105:8, endln:105:9 - |vpiParent: - \_assignment: , line:105:3, endln:105:9 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5806,7 +5758,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c1), line:105:3, endln:105:5 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:105:3, endln:105:9 |vpiName:c1 |vpiFullName:work@mux_from_gates.c1 |vpiActual: @@ -5819,8 +5771,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:106:8, endln:106:9 - |vpiParent: - \_assignment: , line:106:3, endln:106:9 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5828,7 +5778,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c2), line:106:3, endln:106:5 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:106:3, endln:106:9 |vpiName:c2 |vpiFullName:work@mux_from_gates.c2 |vpiActual: @@ -5841,8 +5791,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:107:8, endln:107:9 - |vpiParent: - \_assignment: , line:107:3, endln:107:9 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5850,7 +5798,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c3), line:107:3, endln:107:5 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:107:3, endln:107:9 |vpiName:c3 |vpiFullName:work@mux_from_gates.c3 |vpiActual: @@ -5863,8 +5811,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:108:7, endln:108:8 - |vpiParent: - \_assignment: , line:108:3, endln:108:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5872,7 +5818,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.A), line:108:3, endln:108:4 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:108:3, endln:108:8 |vpiName:A |vpiFullName:work@mux_from_gates.A |vpiActual: @@ -5885,8 +5831,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:109:7, endln:109:8 - |vpiParent: - \_assignment: , line:109:3, endln:109:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5894,7 +5838,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.B), line:109:3, endln:109:4 |vpiParent: - \_begin: (work@mux_from_gates), line:100:9, endln:114:4 + \_assignment: , line:109:3, endln:109:8 |vpiName:B |vpiFullName:work@mux_from_gates.B |vpiActual: @@ -5912,8 +5856,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:110:11, endln:110:12 - |vpiParent: - \_assignment: , line:110:6, endln:110:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5921,7 +5863,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.A), line:110:6, endln:110:7 |vpiParent: - \_delay_control: , line:110:3, endln:110:5 + \_assignment: , line:110:6, endln:110:12 |vpiName:A |vpiFullName:work@mux_from_gates.A |vpiActual: @@ -5939,8 +5881,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:111:11, endln:111:12 - |vpiParent: - \_assignment: , line:111:6, endln:111:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -5948,7 +5888,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.B), line:111:6, endln:111:7 |vpiParent: - \_delay_control: , line:111:3, endln:111:5 + \_assignment: , line:111:6, endln:111:12 |vpiName:B |vpiFullName:work@mux_from_gates.B |vpiActual: @@ -5966,8 +5906,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:112:11, endln:112:12 - |vpiParent: - \_assignment: , line:112:6, endln:112:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -5975,7 +5913,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.A), line:112:6, endln:112:7 |vpiParent: - \_delay_control: , line:112:3, endln:112:5 + \_assignment: , line:112:6, endln:112:12 |vpiName:A |vpiFullName:work@mux_from_gates.A |vpiActual: @@ -6008,7 +5946,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:116:16, endln:116:19 |vpiParent: - \_delay_control: , line:116:8, endln:116:10 + \_assignment: , line:116:11, endln:116:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@mux_from_gates.c0), line:116:17, endln:116:19 @@ -6021,7 +5959,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c0), line:116:11, endln:116:13 |vpiParent: - \_delay_control: , line:116:8, endln:116:10 + \_assignment: , line:116:11, endln:116:19 |vpiName:c0 |vpiFullName:work@mux_from_gates.c0 |vpiActual: @@ -6045,7 +5983,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:117:16, endln:117:19 |vpiParent: - \_delay_control: , line:117:8, endln:117:10 + \_assignment: , line:117:11, endln:117:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@mux_from_gates.c1), line:117:17, endln:117:19 @@ -6058,7 +5996,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c1), line:117:11, endln:117:13 |vpiParent: - \_delay_control: , line:117:8, endln:117:10 + \_assignment: , line:117:11, endln:117:19 |vpiName:c1 |vpiFullName:work@mux_from_gates.c1 |vpiActual: @@ -6082,7 +6020,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:118:16, endln:118:19 |vpiParent: - \_delay_control: , line:118:8, endln:118:10 + \_assignment: , line:118:11, endln:118:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@mux_from_gates.c2), line:118:17, endln:118:19 @@ -6095,7 +6033,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c2), line:118:11, endln:118:13 |vpiParent: - \_delay_control: , line:118:8, endln:118:10 + \_assignment: , line:118:11, endln:118:19 |vpiName:c2 |vpiFullName:work@mux_from_gates.c2 |vpiActual: @@ -6119,7 +6057,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:119:16, endln:119:19 |vpiParent: - \_delay_control: , line:119:8, endln:119:10 + \_assignment: , line:119:11, endln:119:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@mux_from_gates.c3), line:119:17, endln:119:19 @@ -6132,7 +6070,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@mux_from_gates.c3), line:119:11, endln:119:13 |vpiParent: - \_delay_control: , line:119:8, endln:119:10 + \_assignment: , line:119:11, endln:119:19 |vpiName:c3 |vpiFullName:work@mux_from_gates.c3 |vpiActual: @@ -6573,8 +6511,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:195:9, endln:195:10 - |vpiParent: - \_assignment: , line:195:3, endln:195:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6582,7 +6518,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in1), line:195:3, endln:195:6 |vpiParent: - \_begin: (work@n_in_primitive), line:191:9, endln:204:4 + \_assignment: , line:195:3, endln:195:10 |vpiName:in1 |vpiFullName:work@n_in_primitive.in1 |vpiActual: @@ -6595,8 +6531,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:196:9, endln:196:10 - |vpiParent: - \_assignment: , line:196:3, endln:196:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6604,7 +6538,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in2), line:196:3, endln:196:6 |vpiParent: - \_begin: (work@n_in_primitive), line:191:9, endln:204:4 + \_assignment: , line:196:3, endln:196:10 |vpiName:in2 |vpiFullName:work@n_in_primitive.in2 |vpiActual: @@ -6617,8 +6551,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:197:9, endln:197:10 - |vpiParent: - \_assignment: , line:197:3, endln:197:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6626,7 +6558,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in3), line:197:3, endln:197:6 |vpiParent: - \_begin: (work@n_in_primitive), line:191:9, endln:204:4 + \_assignment: , line:197:3, endln:197:10 |vpiName:in3 |vpiFullName:work@n_in_primitive.in3 |vpiActual: @@ -6639,8 +6571,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:198:9, endln:198:10 - |vpiParent: - \_assignment: , line:198:3, endln:198:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6648,7 +6578,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in4), line:198:3, endln:198:6 |vpiParent: - \_begin: (work@n_in_primitive), line:191:9, endln:204:4 + \_assignment: , line:198:3, endln:198:10 |vpiName:in4 |vpiFullName:work@n_in_primitive.in4 |vpiActual: @@ -6666,8 +6596,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:199:12, endln:199:13 - |vpiParent: - \_assignment: , line:199:6, endln:199:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6675,7 +6603,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in1), line:199:6, endln:199:9 |vpiParent: - \_delay_control: , line:199:3, endln:199:5 + \_assignment: , line:199:6, endln:199:13 |vpiName:in1 |vpiFullName:work@n_in_primitive.in1 |vpiActual: @@ -6693,8 +6621,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:200:12, endln:200:13 - |vpiParent: - \_assignment: , line:200:6, endln:200:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6702,7 +6628,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in2), line:200:6, endln:200:9 |vpiParent: - \_delay_control: , line:200:3, endln:200:5 + \_assignment: , line:200:6, endln:200:13 |vpiName:in2 |vpiFullName:work@n_in_primitive.in2 |vpiActual: @@ -6720,8 +6646,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:201:12, endln:201:13 - |vpiParent: - \_assignment: , line:201:6, endln:201:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6729,7 +6653,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in3), line:201:6, endln:201:9 |vpiParent: - \_delay_control: , line:201:3, endln:201:5 + \_assignment: , line:201:6, endln:201:13 |vpiName:in3 |vpiFullName:work@n_in_primitive.in3 |vpiActual: @@ -6747,8 +6671,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:202:12, endln:202:13 - |vpiParent: - \_assignment: , line:202:6, endln:202:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6756,7 +6678,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@n_in_primitive.in4), line:202:6, endln:202:9 |vpiParent: - \_delay_control: , line:202:3, endln:202:5 + \_assignment: , line:202:6, endln:202:13 |vpiName:in4 |vpiFullName:work@n_in_primitive.in4 |vpiActual: @@ -7368,8 +7290,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:42:21, endln:42:22 - |vpiParent: - \_assignment: , line:42:3, endln:42:22 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7377,7 +7297,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@transmission_gates.data_enable_low), line:42:3, endln:42:18 |vpiParent: - \_begin: (work@transmission_gates), line:38:9, endln:46:4 + \_assignment: , line:42:3, endln:42:22 |vpiName:data_enable_low |vpiFullName:work@transmission_gates.data_enable_low |vpiActual: @@ -7390,8 +7310,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:43:8, endln:43:9 - |vpiParent: - \_assignment: , line:43:3, endln:43:9 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -7399,7 +7317,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@transmission_gates.in), line:43:3, endln:43:5 |vpiParent: - \_begin: (work@transmission_gates), line:38:9, endln:46:4 + \_assignment: , line:43:3, endln:43:9 |vpiName:in |vpiFullName:work@transmission_gates.in |vpiActual: @@ -7417,8 +7335,6 @@ design: (work@gates) |vpiBlocking:1 |vpiRhs: \_constant: , line:44:24, endln:44:25 - |vpiParent: - \_assignment: , line:44:6, endln:44:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -7426,7 +7342,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@transmission_gates.data_enable_low), line:44:6, endln:44:21 |vpiParent: - \_delay_control: , line:44:3, endln:44:5 + \_assignment: , line:44:6, endln:44:25 |vpiName:data_enable_low |vpiFullName:work@transmission_gates.data_enable_low |vpiActual: @@ -7459,7 +7375,7 @@ design: (work@gates) |vpiRhs: \_operation: , line:48:16, endln:48:19 |vpiParent: - \_delay_control: , line:48:8, endln:48:10 + \_assignment: , line:48:11, endln:48:19 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@transmission_gates.in), line:48:17, endln:48:19 @@ -7472,7 +7388,7 @@ design: (work@gates) |vpiLhs: \_ref_obj: (work@transmission_gates.in), line:48:11, endln:48:13 |vpiParent: - \_delay_control: , line:48:8, endln:48:10 + \_assignment: , line:48:11, endln:48:19 |vpiName:in |vpiFullName:work@transmission_gates.in |vpiActual: diff --git a/tests/GenFor/GenFor.log b/tests/GenFor/GenFor.log index 8078e77edb..38e4aba9e6 100644 --- a/tests/GenFor/GenFor.log +++ b/tests/GenFor/GenFor.log @@ -114,7 +114,7 @@ logic_net 1 module_inst 4 operation 6 parameter 3 -ref_obj 17 +ref_obj 10 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -136,7 +136,7 @@ logic_net 1 module_inst 4 operation 6 parameter 3 -ref_obj 23 +ref_obj 13 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -244,17 +244,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:5:18, endln:5:19 + \_ref_obj: (i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:tmp.i |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/GenFor/dut.sv, line:2:1, endln:8:10 |vpiName:work@top @@ -301,19 +297,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[0].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[0].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[0].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[0].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[0].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[0].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[0].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[0].tmp.i + |vpiFullName:work@top.genblk1[0].i |vpiActual: \_parameter: (work@top.genblk1[0].i), line:4:0 |vpiGenScopeArray: @@ -352,19 +344,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[1].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[1].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[1].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[1].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[1].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[1].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[1].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[1].tmp.i + |vpiFullName:work@top.genblk1[1].i |vpiActual: \_parameter: (work@top.genblk1[1].i), line:4:0 |vpiGenScopeArray: @@ -403,19 +391,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[2].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[2].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[2].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[2].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[2].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[2].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[2].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[2].tmp.i + |vpiFullName:work@top.genblk1[2].i |vpiActual: \_parameter: (work@top.genblk1[2].i), line:4:0 =================== diff --git a/tests/GenForDec/GenForDec.log b/tests/GenForDec/GenForDec.log index 23540132a4..9200687049 100644 --- a/tests/GenForDec/GenForDec.log +++ b/tests/GenForDec/GenForDec.log @@ -264,7 +264,7 @@ logic_net 1 module_inst 4 operation 20 parameter 10 -ref_obj 56 +ref_obj 32 ref_var 4 unsupported_typespec 4 === UHDM Object Stats End === @@ -286,7 +286,7 @@ logic_net 1 module_inst 4 operation 20 parameter 10 -ref_obj 76 +ref_obj 42 ref_var 4 unsupported_typespec 4 === UHDM Object Stats End === @@ -374,17 +374,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:5:18, endln:5:19 + \_ref_obj: (i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:tmp.i |vpiGenStmt: \_gen_for: |vpiParent: @@ -451,17 +447,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:9:14, endln:9:20 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:27 - |vpiName:tmp + \_cont_assign: , line:9:14, endln:9:27 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:9:18, endln:9:19 + \_ref_obj: (i), line:9:18, endln:9:19 |vpiParent: \_bit_select: (tmp), line:9:14, endln:9:20 |vpiName:i - |vpiFullName:tmp.i |vpiGenStmt: \_gen_for: |vpiParent: @@ -536,17 +528,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:13:14, endln:13:20 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:13:14, endln:13:27 - |vpiName:tmp + \_cont_assign: , line:13:14, endln:13:27 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:13:18, endln:13:19 + \_ref_obj: (i), line:13:18, endln:13:19 |vpiParent: \_bit_select: (tmp), line:13:14, endln:13:20 |vpiName:i - |vpiFullName:tmp.i |vpiGenStmt: \_gen_for: |vpiParent: @@ -621,17 +609,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:17:14, endln:17:20 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:17:14, endln:17:27 - |vpiName:tmp + \_cont_assign: , line:17:14, endln:17:27 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:17:18, endln:17:19 + \_ref_obj: (i), line:17:18, endln:17:19 |vpiParent: \_bit_select: (tmp), line:17:14, endln:17:20 |vpiName:i - |vpiFullName:tmp.i |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/GenForDec/dut.sv, line:2:1, endln:20:10 |vpiName:work@top @@ -678,19 +662,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[3].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[3].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[3].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[3].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[3].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[3].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[3].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[3].tmp.i + |vpiFullName:work@top.genblk1[3].i |vpiActual: \_parameter: (work@top.genblk1[3].i), line:4:0 |vpiGenScopeArray: @@ -729,19 +709,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[2].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[2].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[2].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[2].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[2].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[2].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[2].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[2].tmp.i + |vpiFullName:work@top.genblk1[2].i |vpiActual: \_parameter: (work@top.genblk1[2].i), line:4:0 |vpiGenScopeArray: @@ -780,19 +756,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk1[1].tmp), line:5:14, endln:5:20 |vpiParent: - \_ref_obj: (work@top.genblk1[1].tmp) - |vpiParent: - \_cont_assign: , line:5:14, endln:5:27 - |vpiName:tmp - |vpiFullName:work@top.genblk1[1].tmp + \_cont_assign: , line:5:14, endln:5:27 |vpiName:tmp |vpiFullName:work@top.genblk1[1].tmp |vpiIndex: - \_ref_obj: (work@top.genblk1[1].tmp.i), line:5:18, endln:5:19 + \_ref_obj: (work@top.genblk1[1].i), line:5:18, endln:5:19 |vpiParent: \_bit_select: (work@top.genblk1[1].tmp), line:5:14, endln:5:20 |vpiName:i - |vpiFullName:work@top.genblk1[1].tmp.i + |vpiFullName:work@top.genblk1[1].i |vpiActual: \_parameter: (work@top.genblk1[1].i), line:4:0 |vpiGenScopeArray: @@ -831,19 +803,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk2[0].tmp), line:9:14, endln:9:20 |vpiParent: - \_ref_obj: (work@top.genblk2[0].tmp) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:27 - |vpiName:tmp - |vpiFullName:work@top.genblk2[0].tmp + \_cont_assign: , line:9:14, endln:9:27 |vpiName:tmp |vpiFullName:work@top.genblk2[0].tmp |vpiIndex: - \_ref_obj: (work@top.genblk2[0].tmp.i), line:9:18, endln:9:19 + \_ref_obj: (work@top.genblk2[0].i), line:9:18, endln:9:19 |vpiParent: \_bit_select: (work@top.genblk2[0].tmp), line:9:14, endln:9:20 |vpiName:i - |vpiFullName:work@top.genblk2[0].tmp.i + |vpiFullName:work@top.genblk2[0].i |vpiActual: \_parameter: (work@top.genblk2[0].i), line:8:0 |vpiGenScopeArray: @@ -882,19 +850,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk2[1].tmp), line:9:14, endln:9:20 |vpiParent: - \_ref_obj: (work@top.genblk2[1].tmp) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:27 - |vpiName:tmp - |vpiFullName:work@top.genblk2[1].tmp + \_cont_assign: , line:9:14, endln:9:27 |vpiName:tmp |vpiFullName:work@top.genblk2[1].tmp |vpiIndex: - \_ref_obj: (work@top.genblk2[1].tmp.i), line:9:18, endln:9:19 + \_ref_obj: (work@top.genblk2[1].i), line:9:18, endln:9:19 |vpiParent: \_bit_select: (work@top.genblk2[1].tmp), line:9:14, endln:9:20 |vpiName:i - |vpiFullName:work@top.genblk2[1].tmp.i + |vpiFullName:work@top.genblk2[1].i |vpiActual: \_parameter: (work@top.genblk2[1].i), line:8:0 |vpiGenScopeArray: @@ -933,19 +897,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk3[0].tmp), line:13:14, endln:13:20 |vpiParent: - \_ref_obj: (work@top.genblk3[0].tmp) - |vpiParent: - \_cont_assign: , line:13:14, endln:13:27 - |vpiName:tmp - |vpiFullName:work@top.genblk3[0].tmp + \_cont_assign: , line:13:14, endln:13:27 |vpiName:tmp |vpiFullName:work@top.genblk3[0].tmp |vpiIndex: - \_ref_obj: (work@top.genblk3[0].tmp.i), line:13:18, endln:13:19 + \_ref_obj: (work@top.genblk3[0].i), line:13:18, endln:13:19 |vpiParent: \_bit_select: (work@top.genblk3[0].tmp), line:13:14, endln:13:20 |vpiName:i - |vpiFullName:work@top.genblk3[0].tmp.i + |vpiFullName:work@top.genblk3[0].i |vpiActual: \_parameter: (work@top.genblk3[0].i), line:12:0 |vpiGenScopeArray: @@ -984,19 +944,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk3[1].tmp), line:13:14, endln:13:20 |vpiParent: - \_ref_obj: (work@top.genblk3[1].tmp) - |vpiParent: - \_cont_assign: , line:13:14, endln:13:27 - |vpiName:tmp - |vpiFullName:work@top.genblk3[1].tmp + \_cont_assign: , line:13:14, endln:13:27 |vpiName:tmp |vpiFullName:work@top.genblk3[1].tmp |vpiIndex: - \_ref_obj: (work@top.genblk3[1].tmp.i), line:13:18, endln:13:19 + \_ref_obj: (work@top.genblk3[1].i), line:13:18, endln:13:19 |vpiParent: \_bit_select: (work@top.genblk3[1].tmp), line:13:14, endln:13:20 |vpiName:i - |vpiFullName:work@top.genblk3[1].tmp.i + |vpiFullName:work@top.genblk3[1].i |vpiActual: \_parameter: (work@top.genblk3[1].i), line:12:0 |vpiGenScopeArray: @@ -1035,19 +991,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk4[3].tmp), line:17:14, endln:17:20 |vpiParent: - \_ref_obj: (work@top.genblk4[3].tmp) - |vpiParent: - \_cont_assign: , line:17:14, endln:17:27 - |vpiName:tmp - |vpiFullName:work@top.genblk4[3].tmp + \_cont_assign: , line:17:14, endln:17:27 |vpiName:tmp |vpiFullName:work@top.genblk4[3].tmp |vpiIndex: - \_ref_obj: (work@top.genblk4[3].tmp.i), line:17:18, endln:17:19 + \_ref_obj: (work@top.genblk4[3].i), line:17:18, endln:17:19 |vpiParent: \_bit_select: (work@top.genblk4[3].tmp), line:17:14, endln:17:20 |vpiName:i - |vpiFullName:work@top.genblk4[3].tmp.i + |vpiFullName:work@top.genblk4[3].i |vpiActual: \_parameter: (work@top.genblk4[3].i), line:16:0 |vpiGenScopeArray: @@ -1086,19 +1038,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk4[2].tmp), line:17:14, endln:17:20 |vpiParent: - \_ref_obj: (work@top.genblk4[2].tmp) - |vpiParent: - \_cont_assign: , line:17:14, endln:17:27 - |vpiName:tmp - |vpiFullName:work@top.genblk4[2].tmp + \_cont_assign: , line:17:14, endln:17:27 |vpiName:tmp |vpiFullName:work@top.genblk4[2].tmp |vpiIndex: - \_ref_obj: (work@top.genblk4[2].tmp.i), line:17:18, endln:17:19 + \_ref_obj: (work@top.genblk4[2].i), line:17:18, endln:17:19 |vpiParent: \_bit_select: (work@top.genblk4[2].tmp), line:17:14, endln:17:20 |vpiName:i - |vpiFullName:work@top.genblk4[2].tmp.i + |vpiFullName:work@top.genblk4[2].i |vpiActual: \_parameter: (work@top.genblk4[2].i), line:16:0 |vpiGenScopeArray: @@ -1137,19 +1085,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.genblk4[1].tmp), line:17:14, endln:17:20 |vpiParent: - \_ref_obj: (work@top.genblk4[1].tmp) - |vpiParent: - \_cont_assign: , line:17:14, endln:17:27 - |vpiName:tmp - |vpiFullName:work@top.genblk4[1].tmp + \_cont_assign: , line:17:14, endln:17:27 |vpiName:tmp |vpiFullName:work@top.genblk4[1].tmp |vpiIndex: - \_ref_obj: (work@top.genblk4[1].tmp.i), line:17:18, endln:17:19 + \_ref_obj: (work@top.genblk4[1].i), line:17:18, endln:17:19 |vpiParent: \_bit_select: (work@top.genblk4[1].tmp), line:17:14, endln:17:20 |vpiName:i - |vpiFullName:work@top.genblk4[1].tmp.i + |vpiFullName:work@top.genblk4[1].i |vpiActual: \_parameter: (work@top.genblk4[1].i), line:16:0 =================== diff --git a/tests/GenIfNamed/GenIfNamed.log b/tests/GenIfNamed/GenIfNamed.log index b1ea2dbba7..1e86649a0f 100644 --- a/tests/GenIfNamed/GenIfNamed.log +++ b/tests/GenIfNamed/GenIfNamed.log @@ -180,7 +180,7 @@ module_inst 4 named_begin 3 operation 6 parameter 3 -ref_obj 21 +ref_obj 12 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -203,7 +203,7 @@ module_inst 4 named_begin 3 operation 6 parameter 3 -ref_obj 27 +ref_obj 15 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -323,17 +323,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:6:16, endln:6:22 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:6:16, endln:6:29 - |vpiName:tmp + \_cont_assign: , line:6:16, endln:6:29 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:6:20, endln:6:21 + \_ref_obj: (i), line:6:20, endln:6:21 |vpiParent: \_bit_select: (tmp), line:6:16, endln:6:22 |vpiName:i - |vpiFullName:tmp.i |vpiElseStmt: \_named_begin: (tag3) |vpiName:tag3 @@ -350,17 +346,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp), line:8:16, endln:8:22 |vpiParent: - \_ref_obj: (tmp) - |vpiParent: - \_cont_assign: , line:8:16, endln:8:29 - |vpiName:tmp + \_cont_assign: , line:8:16, endln:8:29 |vpiName:tmp |vpiIndex: - \_ref_obj: (tmp.i), line:8:20, endln:8:21 + \_ref_obj: (i), line:8:20, endln:8:21 |vpiParent: \_bit_select: (tmp), line:8:16, endln:8:22 |vpiName:i - |vpiFullName:tmp.i |vpiStmt: \_cont_assign: , line:9:16, endln:9:30 |vpiRhs: @@ -374,17 +366,13 @@ design: (work@top) |vpiLhs: \_bit_select: (tmp2), line:9:16, endln:9:23 |vpiParent: - \_ref_obj: (tmp2) - |vpiParent: - \_cont_assign: , line:9:16, endln:9:30 - |vpiName:tmp2 + \_cont_assign: , line:9:16, endln:9:30 |vpiName:tmp2 |vpiIndex: - \_ref_obj: (tmp2.i), line:9:21, endln:9:22 + \_ref_obj: (i), line:9:21, endln:9:22 |vpiParent: \_bit_select: (tmp2), line:9:16, endln:9:23 |vpiName:i - |vpiFullName:tmp2.i |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/GenIfNamed/dut.sv, line:2:1, endln:13:10 |vpiName:work@top @@ -442,19 +430,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.tag1[0].tag2.tmp), line:6:16, endln:6:22 |vpiParent: - \_ref_obj: (work@top.tag1[0].tag2.tmp) - |vpiParent: - \_cont_assign: , line:6:16, endln:6:29 - |vpiName:tmp - |vpiFullName:work@top.tag1[0].tag2.tmp + \_cont_assign: , line:6:16, endln:6:29 |vpiName:tmp |vpiFullName:work@top.tag1[0].tag2.tmp |vpiIndex: - \_ref_obj: (work@top.tag1[0].tag2.tmp.i), line:6:20, endln:6:21 + \_ref_obj: (work@top.tag1[0].tag2.i), line:6:20, endln:6:21 |vpiParent: \_bit_select: (work@top.tag1[0].tag2.tmp), line:6:16, endln:6:22 |vpiName:i - |vpiFullName:work@top.tag1[0].tag2.tmp.i + |vpiFullName:work@top.tag1[0].tag2.i |vpiActual: \_parameter: (work@top.tag1[0].i), line:4:0 |vpiGenScopeArray: @@ -504,19 +488,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.tag1[1].tag2.tmp), line:6:16, endln:6:22 |vpiParent: - \_ref_obj: (work@top.tag1[1].tag2.tmp) - |vpiParent: - \_cont_assign: , line:6:16, endln:6:29 - |vpiName:tmp - |vpiFullName:work@top.tag1[1].tag2.tmp + \_cont_assign: , line:6:16, endln:6:29 |vpiName:tmp |vpiFullName:work@top.tag1[1].tag2.tmp |vpiIndex: - \_ref_obj: (work@top.tag1[1].tag2.tmp.i), line:6:20, endln:6:21 + \_ref_obj: (work@top.tag1[1].tag2.i), line:6:20, endln:6:21 |vpiParent: \_bit_select: (work@top.tag1[1].tag2.tmp), line:6:16, endln:6:22 |vpiName:i - |vpiFullName:work@top.tag1[1].tag2.tmp.i + |vpiFullName:work@top.tag1[1].tag2.i |vpiActual: \_parameter: (work@top.tag1[1].i), line:4:0 |vpiGenScopeArray: @@ -566,19 +546,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.tag1[2].tag2.tmp), line:6:16, endln:6:22 |vpiParent: - \_ref_obj: (work@top.tag1[2].tag2.tmp) - |vpiParent: - \_cont_assign: , line:6:16, endln:6:29 - |vpiName:tmp - |vpiFullName:work@top.tag1[2].tag2.tmp + \_cont_assign: , line:6:16, endln:6:29 |vpiName:tmp |vpiFullName:work@top.tag1[2].tag2.tmp |vpiIndex: - \_ref_obj: (work@top.tag1[2].tag2.tmp.i), line:6:20, endln:6:21 + \_ref_obj: (work@top.tag1[2].tag2.i), line:6:20, endln:6:21 |vpiParent: \_bit_select: (work@top.tag1[2].tag2.tmp), line:6:16, endln:6:22 |vpiName:i - |vpiFullName:work@top.tag1[2].tag2.tmp.i + |vpiFullName:work@top.tag1[2].tag2.i |vpiActual: \_parameter: (work@top.tag1[2].i), line:4:0 =================== diff --git a/tests/GenModHierPath/GenModHierPath.log b/tests/GenModHierPath/GenModHierPath.log index bcf070a79a..20856b6592 100644 --- a/tests/GenModHierPath/GenModHierPath.log +++ b/tests/GenModHierPath/GenModHierPath.log @@ -232,10 +232,11 @@ design: (work@InitializedBlockRAM) \_hier_path: (body.ram.array), line:17:15, endln:17:29 |vpiName:ram |vpiActual: - \_ref_obj: (array), line:17:24, endln:17:29 + \_ref_obj: (work@InitializedBlockRAM.InitializeMemory.array), line:17:24, endln:17:29 |vpiParent: \_hier_path: (body.ram.array), line:17:15, endln:17:29 |vpiName:array + |vpiFullName:work@InitializedBlockRAM.InitializeMemory.array |vpiName:$readmemh |vpiInstance: \_module_inst: work@InitializedBlockRAM (work@InitializedBlockRAM), file:${SURELOG_DIR}/tests/GenModHierPath/dut.sv, line:8:1, endln:20:10 @@ -297,10 +298,11 @@ design: (work@InitializedBlockRAM) |vpiActual: \_module_inst: work@ForNarrowRequest (work@InitializedBlockRAM.body.ram), file:${SURELOG_DIR}/tests/GenModHierPath/dut.sv, line:12:9, endln:12:33 |vpiActual: - \_ref_obj: (array), line:17:24, endln:17:29 + \_ref_obj: (work@InitializedBlockRAM.InitializeMemory.array), line:17:24, endln:17:29 |vpiParent: \_hier_path: (body.ram.array), line:17:15, endln:17:29 |vpiName:array + |vpiFullName:work@InitializedBlockRAM.InitializeMemory.array |vpiActual: \_array_var: (work@InitializedBlockRAM.body.ram.array), line:3:7, endln:3:16 |vpiName:$readmemh diff --git a/tests/GenNet/GenNet.log b/tests/GenNet/GenNet.log index 03b5c9b077..baae7d1340 100644 --- a/tests/GenNet/GenNet.log +++ b/tests/GenNet/GenNet.log @@ -485,7 +485,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (SWACCESS), line:8:30, endln:8:38 |vpiParent: - \_operation: , line:8:7, endln:8:47 + \_operation: , line:8:30, endln:8:46 |vpiName:SWACCESS |vpiOperand: \_constant: , line:8:42, endln:8:46 diff --git a/tests/GenScopeFullName/GenScopeFullName.log b/tests/GenScopeFullName/GenScopeFullName.log index 0b1cef4b4f..8ccf521d2e 100644 --- a/tests/GenScopeFullName/GenScopeFullName.log +++ b/tests/GenScopeFullName/GenScopeFullName.log @@ -149,7 +149,7 @@ parameter 1 port 4 range 2 ref_module 2 -ref_obj 9 +ref_obj 6 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -174,7 +174,7 @@ parameter 1 port 7 range 2 ref_module 2 -ref_obj 15 +ref_obj 9 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -266,16 +266,12 @@ design: (work@dut) |vpiName:b |vpiHighConn: \_bit_select: (a), line:5:42, endln:5:46 - |vpiParent: - \_ref_obj: (a) - |vpiName:a |vpiName:a |vpiIndex: - \_ref_obj: (a.i), line:5:44, endln:5:45 + \_ref_obj: (i), line:5:44, endln:5:45 |vpiParent: \_bit_select: (a), line:5:42, endln:5:46 |vpiName:i - |vpiFullName:a.i |uhdmallModules: \_module_inst: work@ibex_counter (work@ibex_counter), file:${SURELOG_DIR}/tests/GenScopeFullName/dut.sv, line:12:1, endln:14:10 |vpiParent: @@ -402,17 +398,13 @@ design: (work@dut) |vpiName:b |vpiDirection:1 |vpiHighConn: - \_bit_select: (work@dut.gen_modules[0].module_in_genscope.b.a), line:5:42, endln:5:46 + \_bit_select: (work@dut.gen_modules[0].module_in_genscope.a), line:5:42, endln:5:46 |vpiParent: - \_ref_obj: (work@dut.gen_modules[0].module_in_genscope.b.a) - |vpiParent: - \_port: (b), line:12:33, endln:12:34 - |vpiName:a - |vpiFullName:work@dut.gen_modules[0].module_in_genscope.b.a - |vpiActual: - \_logic_var: (work@dut.a), line:2:16, endln:2:17 + \_port: (b), line:12:33, endln:12:34 |vpiName:a - |vpiFullName:work@dut.gen_modules[0].module_in_genscope.b.a + |vpiFullName:work@dut.gen_modules[0].module_in_genscope.a + |vpiActual: + \_logic_var: (work@dut.a), line:2:16, endln:2:17 |vpiIndex: \_constant: , line:5:44, endln:5:45 |vpiParent: @@ -421,8 +413,6 @@ design: (work@dut) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@dut.a), line:2:16, endln:2:17 |vpiLowConn: \_ref_obj: (work@dut.gen_modules[0].module_in_genscope.b), line:5:40, endln:5:41 |vpiParent: diff --git a/tests/GenScopeFunc/GenScopeFunc.log b/tests/GenScopeFunc/GenScopeFunc.log index 710259dd95..36a7b75bdc 100644 --- a/tests/GenScopeFunc/GenScopeFunc.log +++ b/tests/GenScopeFunc/GenScopeFunc.log @@ -358,7 +358,7 @@ design: (work@top) |vpiName:local_function |vpiFullName:work@top.c.cscope.local_function.local_function |vpiActual: - \_logic_var: , line:5:26, endln:5:31 + \_logic_var: (local_function), line:5:26, endln:5:31 |vpiContAssign: \_cont_assign: , line:11:10, endln:11:46 |vpiParent: diff --git a/tests/GenScopeHierPath/GenScopeHierPath.log b/tests/GenScopeHierPath/GenScopeHierPath.log index 87087656c8..faa0e3b3b3 100644 --- a/tests/GenScopeHierPath/GenScopeHierPath.log +++ b/tests/GenScopeHierPath/GenScopeHierPath.log @@ -483,7 +483,7 @@ parameter 31 port 22 range 34 ref_module 10 -ref_obj 64 +ref_obj 60 ref_var 1 string_typespec 12 struct_typespec 13 @@ -521,7 +521,7 @@ parameter 31 port 63 range 34 ref_module 10 -ref_obj 173 +ref_obj 169 ref_var 1 string_typespec 12 struct_typespec 13 @@ -645,7 +645,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads), line:14:19, endln:14:27 |vpiParent: - \_struct_typespec: (pinmux_pkg::target_cfg_t), line:13:12, endln:13:18 + \_operation: , line:14:19, endln:14:29 |vpiName:NDioPads |vpiFullName:pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads |vpiActual: diff --git a/tests/GenScopeHierPath2/GenScopeHierPath2.log b/tests/GenScopeHierPath2/GenScopeHierPath2.log index c844dd6ef8..206994d627 100644 --- a/tests/GenScopeHierPath2/GenScopeHierPath2.log +++ b/tests/GenScopeHierPath2/GenScopeHierPath2.log @@ -935,10 +935,11 @@ design: (work@mod) |vpiActual: \_gen_scope: (work@mod.blk4) |vpiActual: - \_ref_obj: (z), line:24:33, endln:24:34 + \_ref_obj: (work@mod.genblk2.z), line:24:33, endln:24:34 |vpiParent: \_hier_path: (blk4.z), line:24:28, endln:24:34 |vpiName:z + |vpiFullName:work@mod.genblk2.z |vpiActual: \_array_net: (work@mod.blk4.z), line:15:14, endln:15:15 |vpiName:$bits diff --git a/tests/GenerateBlock/GenerateBlock.log b/tests/GenerateBlock/GenerateBlock.log index 10d9d24817..467d5d4302 100644 --- a/tests/GenerateBlock/GenerateBlock.log +++ b/tests/GenerateBlock/GenerateBlock.log @@ -426,10 +426,11 @@ design: (work@gen_test9) |vpiActual: \_gen_scope: (work@gen_test9.A.B) |vpiActual: - \_ref_obj: (y), line:16:38, endln:16:39 + \_ref_obj: (work@gen_test9.A.y), line:16:38, endln:16:39 |vpiParent: \_hier_path: (B.y), line:16:36, endln:16:39 |vpiName:y + |vpiFullName:work@gen_test9.A.y |vpiActual: \_logic_net: (work@gen_test9.A.B.y), line:8:44, endln:8:45 |vpiOperand: @@ -453,10 +454,11 @@ design: (work@gen_test9) |vpiActual: \_gen_scope: (work@gen_test9.A.C) |vpiActual: - \_ref_obj: (z), line:16:52, endln:16:53 + \_ref_obj: (work@gen_test9.A.z), line:16:52, endln:16:53 |vpiParent: \_hier_path: (C.z), line:16:50, endln:16:53 |vpiName:z + |vpiFullName:work@gen_test9.A.z |vpiActual: \_logic_net: (work@gen_test9.A.C.z), line:13:44, endln:13:45 |vpiLhs: diff --git a/tests/GenerateInterface/GenerateInterface.log b/tests/GenerateInterface/GenerateInterface.log index 2319c6548f..7e1a2beacb 100644 --- a/tests/GenerateInterface/GenerateInterface.log +++ b/tests/GenerateInterface/GenerateInterface.log @@ -821,7 +821,7 @@ parameter 13 port 5 range 13 ref_module 2 -ref_obj 43 +ref_obj 28 ref_var 2 task 9 unsupported_typespec 2 @@ -1700,15 +1700,12 @@ design: (work@top) |vpiOperand: \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiParent: - \_ref_obj: (clk_i) - |vpiParent: - \_operation: , line:7:25, endln:7:41 - |vpiName:clk_i + \_operation: , line:7:25, endln:7:41 |vpiName:clk_i |vpiIndex: \_ref_obj: (i), line:7:39, endln:7:40 |vpiParent: - \_operation: , line:7:25, endln:7:41 + \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiName:i |vpiGenScopeArray: \_gen_scope_array: (work@top.intf.block[1]), line:6:34, endln:10:15 @@ -1744,15 +1741,12 @@ design: (work@top) |vpiOperand: \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiParent: - \_ref_obj: (clk_i) - |vpiParent: - \_operation: , line:7:25, endln:7:41 - |vpiName:clk_i + \_operation: , line:7:25, endln:7:41 |vpiName:clk_i |vpiIndex: \_ref_obj: (i), line:7:39, endln:7:40 |vpiParent: - \_operation: , line:7:25, endln:7:41 + \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiName:i |vpiGenScopeArray: \_gen_scope_array: (work@top.intf.block[2]), line:6:34, endln:10:15 @@ -1788,15 +1782,12 @@ design: (work@top) |vpiOperand: \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiParent: - \_ref_obj: (clk_i) - |vpiParent: - \_operation: , line:7:25, endln:7:41 - |vpiName:clk_i + \_operation: , line:7:25, endln:7:41 |vpiName:clk_i |vpiIndex: \_ref_obj: (i), line:7:39, endln:7:40 |vpiParent: - \_operation: , line:7:25, endln:7:41 + \_bit_select: (clk_i), line:7:33, endln:7:41 |vpiName:i |uhdmtopModules: \_module_inst: work@top2 (work@top2), file:${SURELOG_DIR}/tests/GenerateInterface/top.sv, line:34:1, endln:43:10 @@ -2078,33 +2069,25 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top2.intf.each_pin_intf[0].pins_oe), line:29:24, endln:29:34 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[0].pins_oe) - |vpiParent: - \_operation: , line:29:24, endln:29:53 - |vpiName:pins_oe - |vpiFullName:work@top2.intf.each_pin_intf[0].pins_oe + \_operation: , line:29:24, endln:29:53 |vpiName:pins_oe |vpiFullName:work@top2.intf.each_pin_intf[0].pins_oe |vpiIndex: - \_ref_obj: (work@top2.intf.each_pin_intf[0].pins_oe.i), line:29:32, endln:29:33 + \_ref_obj: (work@top2.intf.each_pin_intf[0].i), line:29:32, endln:29:33 |vpiParent: \_bit_select: (work@top2.intf.each_pin_intf[0].pins_oe), line:29:24, endln:29:34 |vpiName:i - |vpiFullName:work@top2.intf.each_pin_intf[0].pins_oe.i + |vpiFullName:work@top2.intf.each_pin_intf[0].i |vpiOperand: \_bit_select: (work@top2.intf.each_pin_intf[0].pins_o), line:29:37, endln:29:46 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[0].pins_o) - |vpiParent: - \_operation: , line:29:24, endln:29:53 - |vpiName:pins_o - |vpiFullName:work@top2.intf.each_pin_intf[0].pins_o + \_operation: , line:29:24, endln:29:53 |vpiName:pins_o |vpiFullName:work@top2.intf.each_pin_intf[0].pins_o |vpiIndex: \_ref_obj: (work@top2.intf.each_pin_intf[0].i), line:29:44, endln:29:45 |vpiParent: - \_operation: , line:29:24, endln:29:53 + \_bit_select: (work@top2.intf.each_pin_intf[0].pins_o), line:29:37, endln:29:46 |vpiName:i |vpiFullName:work@top2.intf.each_pin_intf[0].i |vpiOperand: @@ -2118,19 +2101,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top2.intf.each_pin_intf[0].pins), line:29:14, endln:29:21 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[0].pins) - |vpiParent: - \_cont_assign: , line:29:14, endln:29:53 - |vpiName:pins - |vpiFullName:work@top2.intf.each_pin_intf[0].pins + \_cont_assign: , line:29:14, endln:29:53 |vpiName:pins |vpiFullName:work@top2.intf.each_pin_intf[0].pins |vpiIndex: - \_ref_obj: (work@top2.intf.each_pin_intf[0].pins.i), line:29:19, endln:29:20 + \_ref_obj: (work@top2.intf.each_pin_intf[0].i), line:29:19, endln:29:20 |vpiParent: \_bit_select: (work@top2.intf.each_pin_intf[0].pins), line:29:14, endln:29:21 |vpiName:i - |vpiFullName:work@top2.intf.each_pin_intf[0].pins.i + |vpiFullName:work@top2.intf.each_pin_intf[0].i |vpiGenScopeArray: \_gen_scope_array: (work@top2.intf.each_pin_intf[1]), line:28:40, endln:30:8 |vpiParent: @@ -2164,33 +2143,25 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top2.intf.each_pin_intf[1].pins_oe), line:29:24, endln:29:34 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[1].pins_oe) - |vpiParent: - \_operation: , line:29:24, endln:29:53 - |vpiName:pins_oe - |vpiFullName:work@top2.intf.each_pin_intf[1].pins_oe + \_operation: , line:29:24, endln:29:53 |vpiName:pins_oe |vpiFullName:work@top2.intf.each_pin_intf[1].pins_oe |vpiIndex: - \_ref_obj: (work@top2.intf.each_pin_intf[1].pins_oe.i), line:29:32, endln:29:33 + \_ref_obj: (work@top2.intf.each_pin_intf[1].i), line:29:32, endln:29:33 |vpiParent: \_bit_select: (work@top2.intf.each_pin_intf[1].pins_oe), line:29:24, endln:29:34 |vpiName:i - |vpiFullName:work@top2.intf.each_pin_intf[1].pins_oe.i + |vpiFullName:work@top2.intf.each_pin_intf[1].i |vpiOperand: \_bit_select: (work@top2.intf.each_pin_intf[1].pins_o), line:29:37, endln:29:46 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[1].pins_o) - |vpiParent: - \_operation: , line:29:24, endln:29:53 - |vpiName:pins_o - |vpiFullName:work@top2.intf.each_pin_intf[1].pins_o + \_operation: , line:29:24, endln:29:53 |vpiName:pins_o |vpiFullName:work@top2.intf.each_pin_intf[1].pins_o |vpiIndex: \_ref_obj: (work@top2.intf.each_pin_intf[1].i), line:29:44, endln:29:45 |vpiParent: - \_operation: , line:29:24, endln:29:53 + \_bit_select: (work@top2.intf.each_pin_intf[1].pins_o), line:29:37, endln:29:46 |vpiName:i |vpiFullName:work@top2.intf.each_pin_intf[1].i |vpiOperand: @@ -2204,19 +2175,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top2.intf.each_pin_intf[1].pins), line:29:14, endln:29:21 |vpiParent: - \_ref_obj: (work@top2.intf.each_pin_intf[1].pins) - |vpiParent: - \_cont_assign: , line:29:14, endln:29:53 - |vpiName:pins - |vpiFullName:work@top2.intf.each_pin_intf[1].pins + \_cont_assign: , line:29:14, endln:29:53 |vpiName:pins |vpiFullName:work@top2.intf.each_pin_intf[1].pins |vpiIndex: - \_ref_obj: (work@top2.intf.each_pin_intf[1].pins.i), line:29:19, endln:29:20 + \_ref_obj: (work@top2.intf.each_pin_intf[1].i), line:29:19, endln:29:20 |vpiParent: \_bit_select: (work@top2.intf.each_pin_intf[1].pins), line:29:14, endln:29:21 |vpiName:i - |vpiFullName:work@top2.intf.each_pin_intf[1].pins.i + |vpiFullName:work@top2.intf.each_pin_intf[1].i |vpiGenScopeArray: \_gen_scope_array: (work@top2.each_pin[0]), line:38:40, endln:40:8 |vpiParent: @@ -2250,33 +2217,25 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top2.each_pin[0].pins_oe), line:39:24, endln:39:34 |vpiParent: - \_ref_obj: (work@top2.each_pin[0].pins_oe) - |vpiParent: - \_operation: , line:39:24, endln:39:53 - |vpiName:pins_oe - |vpiFullName:work@top2.each_pin[0].pins_oe + \_operation: , line:39:24, endln:39:53 |vpiName:pins_oe |vpiFullName:work@top2.each_pin[0].pins_oe |vpiIndex: - \_ref_obj: (work@top2.each_pin[0].pins_oe.i), line:39:32, endln:39:33 + \_ref_obj: (work@top2.each_pin[0].i), line:39:32, endln:39:33 |vpiParent: \_bit_select: (work@top2.each_pin[0].pins_oe), line:39:24, endln:39:34 |vpiName:i - |vpiFullName:work@top2.each_pin[0].pins_oe.i + |vpiFullName:work@top2.each_pin[0].i |vpiOperand: \_bit_select: (work@top2.each_pin[0].pins_o), line:39:37, endln:39:46 |vpiParent: - \_ref_obj: (work@top2.each_pin[0].pins_o) - |vpiParent: - \_operation: , line:39:24, endln:39:53 - |vpiName:pins_o - |vpiFullName:work@top2.each_pin[0].pins_o + \_operation: , line:39:24, endln:39:53 |vpiName:pins_o |vpiFullName:work@top2.each_pin[0].pins_o |vpiIndex: \_ref_obj: (work@top2.each_pin[0].i), line:39:44, endln:39:45 |vpiParent: - \_operation: , line:39:24, endln:39:53 + \_bit_select: (work@top2.each_pin[0].pins_o), line:39:37, endln:39:46 |vpiName:i |vpiFullName:work@top2.each_pin[0].i |vpiOperand: @@ -2290,19 +2249,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top2.each_pin[0].pins), line:39:14, endln:39:21 |vpiParent: - \_ref_obj: (work@top2.each_pin[0].pins) - |vpiParent: - \_cont_assign: , line:39:14, endln:39:53 - |vpiName:pins - |vpiFullName:work@top2.each_pin[0].pins + \_cont_assign: , line:39:14, endln:39:53 |vpiName:pins |vpiFullName:work@top2.each_pin[0].pins |vpiIndex: - \_ref_obj: (work@top2.each_pin[0].pins.i), line:39:19, endln:39:20 + \_ref_obj: (work@top2.each_pin[0].i), line:39:19, endln:39:20 |vpiParent: \_bit_select: (work@top2.each_pin[0].pins), line:39:14, endln:39:21 |vpiName:i - |vpiFullName:work@top2.each_pin[0].pins.i + |vpiFullName:work@top2.each_pin[0].i |vpiGenScopeArray: \_gen_scope_array: (work@top2.each_pin[1]), line:38:40, endln:40:8 |vpiParent: @@ -2336,33 +2291,25 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top2.each_pin[1].pins_oe), line:39:24, endln:39:34 |vpiParent: - \_ref_obj: (work@top2.each_pin[1].pins_oe) - |vpiParent: - \_operation: , line:39:24, endln:39:53 - |vpiName:pins_oe - |vpiFullName:work@top2.each_pin[1].pins_oe + \_operation: , line:39:24, endln:39:53 |vpiName:pins_oe |vpiFullName:work@top2.each_pin[1].pins_oe |vpiIndex: - \_ref_obj: (work@top2.each_pin[1].pins_oe.i), line:39:32, endln:39:33 + \_ref_obj: (work@top2.each_pin[1].i), line:39:32, endln:39:33 |vpiParent: \_bit_select: (work@top2.each_pin[1].pins_oe), line:39:24, endln:39:34 |vpiName:i - |vpiFullName:work@top2.each_pin[1].pins_oe.i + |vpiFullName:work@top2.each_pin[1].i |vpiOperand: \_bit_select: (work@top2.each_pin[1].pins_o), line:39:37, endln:39:46 |vpiParent: - \_ref_obj: (work@top2.each_pin[1].pins_o) - |vpiParent: - \_operation: , line:39:24, endln:39:53 - |vpiName:pins_o - |vpiFullName:work@top2.each_pin[1].pins_o + \_operation: , line:39:24, endln:39:53 |vpiName:pins_o |vpiFullName:work@top2.each_pin[1].pins_o |vpiIndex: \_ref_obj: (work@top2.each_pin[1].i), line:39:44, endln:39:45 |vpiParent: - \_operation: , line:39:24, endln:39:53 + \_bit_select: (work@top2.each_pin[1].pins_o), line:39:37, endln:39:46 |vpiName:i |vpiFullName:work@top2.each_pin[1].i |vpiOperand: @@ -2376,19 +2323,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top2.each_pin[1].pins), line:39:14, endln:39:21 |vpiParent: - \_ref_obj: (work@top2.each_pin[1].pins) - |vpiParent: - \_cont_assign: , line:39:14, endln:39:53 - |vpiName:pins - |vpiFullName:work@top2.each_pin[1].pins + \_cont_assign: , line:39:14, endln:39:53 |vpiName:pins |vpiFullName:work@top2.each_pin[1].pins |vpiIndex: - \_ref_obj: (work@top2.each_pin[1].pins.i), line:39:19, endln:39:20 + \_ref_obj: (work@top2.each_pin[1].i), line:39:19, endln:39:20 |vpiParent: \_bit_select: (work@top2.each_pin[1].pins), line:39:14, endln:39:21 |vpiName:i - |vpiFullName:work@top2.each_pin[1].pins.i + |vpiFullName:work@top2.each_pin[1].i =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/GenerateModule/GenerateModule.log b/tests/GenerateModule/GenerateModule.log index d8703c1c86..5910809e07 100644 --- a/tests/GenerateModule/GenerateModule.log +++ b/tests/GenerateModule/GenerateModule.log @@ -808,7 +808,7 @@ parameter 22 port 4 range 12 ref_module 15 -ref_obj 22 +ref_obj 14 ref_var 1 task 9 unsupported_typespec 1 @@ -1421,10 +1421,7 @@ design: (work@small_test) |vpiRhs: \_bit_select: (a), line:24:21, endln:24:27 |vpiParent: - \_ref_obj: (a) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:a + \_cont_assign: , line:24:14, endln:24:27 |vpiName:a |vpiIndex: \_operation: , line:24:23, endln:24:26 @@ -1448,17 +1445,13 @@ design: (work@small_test) |vpiLhs: \_bit_select: (b), line:24:14, endln:24:18 |vpiParent: - \_ref_obj: (b) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:b + \_cont_assign: , line:24:14, endln:24:27 |vpiName:b |vpiIndex: - \_ref_obj: (b.i), line:24:16, endln:24:17 + \_ref_obj: (i), line:24:16, endln:24:17 |vpiParent: \_bit_select: (b), line:24:14, endln:24:18 |vpiName:i - |vpiFullName:b.i |uhdmtopModules: \_module_inst: work@small_test (work@small_test), file:${SURELOG_DIR}/tests/GenerateModule/top.v, line:1:1, endln:19:10 |vpiName:work@small_test @@ -2172,11 +2165,7 @@ design: (work@small_test) |vpiRhs: \_bit_select: (work@top.genblk1[0].a), line:24:21, endln:24:27 |vpiParent: - \_ref_obj: (work@top.genblk1[0].a) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:a - |vpiFullName:work@top.genblk1[0].a + \_cont_assign: , line:24:14, endln:24:27 |vpiName:a |vpiFullName:work@top.genblk1[0].a |vpiIndex: @@ -2201,19 +2190,15 @@ design: (work@small_test) |vpiLhs: \_bit_select: (work@top.genblk1[0].b), line:24:14, endln:24:18 |vpiParent: - \_ref_obj: (work@top.genblk1[0].b) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:b - |vpiFullName:work@top.genblk1[0].b + \_cont_assign: , line:24:14, endln:24:27 |vpiName:b |vpiFullName:work@top.genblk1[0].b |vpiIndex: - \_ref_obj: (work@top.genblk1[0].b.i), line:24:16, endln:24:17 + \_ref_obj: (work@top.genblk1[0].i), line:24:16, endln:24:17 |vpiParent: \_bit_select: (work@top.genblk1[0].b), line:24:14, endln:24:18 |vpiName:i - |vpiFullName:work@top.genblk1[0].b.i + |vpiFullName:work@top.genblk1[0].i |vpiGenScopeArray: \_gen_scope_array: (work@top.genblk1[1]), line:23:30, endln:25:6 |vpiParent: @@ -2242,11 +2227,7 @@ design: (work@small_test) |vpiRhs: \_bit_select: (work@top.genblk1[1].a), line:24:21, endln:24:27 |vpiParent: - \_ref_obj: (work@top.genblk1[1].a) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:a - |vpiFullName:work@top.genblk1[1].a + \_cont_assign: , line:24:14, endln:24:27 |vpiName:a |vpiFullName:work@top.genblk1[1].a |vpiIndex: @@ -2271,19 +2252,15 @@ design: (work@small_test) |vpiLhs: \_bit_select: (work@top.genblk1[1].b), line:24:14, endln:24:18 |vpiParent: - \_ref_obj: (work@top.genblk1[1].b) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:b - |vpiFullName:work@top.genblk1[1].b + \_cont_assign: , line:24:14, endln:24:27 |vpiName:b |vpiFullName:work@top.genblk1[1].b |vpiIndex: - \_ref_obj: (work@top.genblk1[1].b.i), line:24:16, endln:24:17 + \_ref_obj: (work@top.genblk1[1].i), line:24:16, endln:24:17 |vpiParent: \_bit_select: (work@top.genblk1[1].b), line:24:14, endln:24:18 |vpiName:i - |vpiFullName:work@top.genblk1[1].b.i + |vpiFullName:work@top.genblk1[1].i |vpiGenScopeArray: \_gen_scope_array: (work@top.genblk1[2]), line:23:30, endln:25:6 |vpiParent: @@ -2312,11 +2289,7 @@ design: (work@small_test) |vpiRhs: \_bit_select: (work@top.genblk1[2].a), line:24:21, endln:24:27 |vpiParent: - \_ref_obj: (work@top.genblk1[2].a) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:a - |vpiFullName:work@top.genblk1[2].a + \_cont_assign: , line:24:14, endln:24:27 |vpiName:a |vpiFullName:work@top.genblk1[2].a |vpiIndex: @@ -2341,19 +2314,15 @@ design: (work@small_test) |vpiLhs: \_bit_select: (work@top.genblk1[2].b), line:24:14, endln:24:18 |vpiParent: - \_ref_obj: (work@top.genblk1[2].b) - |vpiParent: - \_cont_assign: , line:24:14, endln:24:27 - |vpiName:b - |vpiFullName:work@top.genblk1[2].b + \_cont_assign: , line:24:14, endln:24:27 |vpiName:b |vpiFullName:work@top.genblk1[2].b |vpiIndex: - \_ref_obj: (work@top.genblk1[2].b.i), line:24:16, endln:24:17 + \_ref_obj: (work@top.genblk1[2].i), line:24:16, endln:24:17 |vpiParent: \_bit_select: (work@top.genblk1[2].b), line:24:14, endln:24:18 |vpiName:i - |vpiFullName:work@top.genblk1[2].b.i + |vpiFullName:work@top.genblk1[2].i =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/GenerateRegion/GenerateRegion.log b/tests/GenerateRegion/GenerateRegion.log index a34a3a49eb..e5295554b8 100644 --- a/tests/GenerateRegion/GenerateRegion.log +++ b/tests/GenerateRegion/GenerateRegion.log @@ -1188,7 +1188,7 @@ part_select 8 port 9 range 27 ref_module 6 -ref_obj 85 +ref_obj 65 string_typespec 4 sys_func_call 1 === UHDM Object Stats End === @@ -1224,7 +1224,7 @@ part_select 12 port 12 range 27 ref_module 6 -ref_obj 125 +ref_obj 92 string_typespec 4 sys_func_call 1 === UHDM Object Stats End === @@ -1442,26 +1442,24 @@ design: (work@oh_delay) \_event_control: , line:12:12, endln:12:27 |vpiOpType:82 |vpiRhs: - \_part_select: , line:13:21, endln:13:30 + \_part_select: in (work@oh_delay.in), line:13:21, endln:13:30 |vpiParent: - \_ref_obj: in (work@oh_delay.in), line:13:21, endln:13:23 - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:in - |vpiFullName:work@oh_delay.in - |vpiDefName:in + \_assignment: , line:13:7, endln:13:30 + |vpiName:in + |vpiFullName:work@oh_delay.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:13:24, endln:13:27 |vpiParent: - \_event_control: , line:12:12, endln:12:27 + \_part_select: in (work@oh_delay.in), line:13:21, endln:13:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_delay.N), line:13:24, endln:13:25 + \_ref_obj: (work@oh_delay.in.N), line:13:24, endln:13:25 |vpiParent: - \_event_control: , line:12:12, endln:12:27 + \_operation: , line:13:24, endln:13:27 |vpiName:N - |vpiFullName:work@oh_delay.N + |vpiFullName:work@oh_delay.in.N |vpiOperand: \_constant: , line:13:26, endln:13:27 |vpiParent: @@ -1479,11 +1477,7 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (work@oh_delay.sync_pipe), line:13:7, endln:13:19 |vpiParent: - \_ref_obj: (work@oh_delay.sync_pipe) - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.sync_pipe + \_assignment: , line:13:7, endln:13:30 |vpiName:sync_pipe |vpiFullName:work@oh_delay.sync_pipe |vpiIndex: @@ -1523,24 +1517,23 @@ design: (work@oh_delay) \_event_control: , line:12:12, endln:12:27 |vpiOpType:82 |vpiRhs: - \_part_select: , line:13:21, endln:13:30 + \_part_select: in (in), line:13:21, endln:13:30 |vpiParent: - \_ref_obj: in (in), line:13:21, endln:13:23 - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:in - |vpiDefName:in + \_assignment: , line:13:7, endln:13:30 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:13:24, endln:13:27 |vpiParent: - \_event_control: , line:12:12, endln:12:27 + \_part_select: in (in), line:13:21, endln:13:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:13:24, endln:13:25 + \_ref_obj: (in.N), line:13:24, endln:13:25 |vpiParent: - \_event_control: , line:12:12, endln:12:27 + \_operation: , line:13:24, endln:13:27 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:13:26, endln:13:27 |vpiParent: @@ -1558,10 +1551,7 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (sync_pipe), line:13:7, endln:13:19 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:sync_pipe + \_assignment: , line:13:7, endln:13:30 |vpiName:sync_pipe |vpiIndex: \_constant: , line:13:17, endln:13:18 @@ -1758,30 +1748,27 @@ design: (work@oh_delay) |vpiOpType:82 |vpiRhs: \_constant: , line:108:36, endln:108:39 - |vpiParent: - \_assignment: , line:108:9, endln:108:39 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:108:9, endln:108:32 + \_part_select: sync_pipe (sync_pipe), line:108:9, endln:108:32 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:108:9, endln:108:39 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:108:9, endln:108:39 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:108:19, endln:108:29 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_part_select: sync_pipe (sync_pipe), line:108:9, endln:108:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:108:19, endln:108:27 + \_ref_obj: (sync_pipe.SYNCPIPE), line:108:19, endln:108:27 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_operation: , line:108:19, endln:108:29 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:108:28, endln:108:29 |vpiParent: @@ -1804,27 +1791,26 @@ design: (work@oh_delay) |vpiRhs: \_operation: , line:110:36, endln:110:66 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_assignment: , line:110:9, endln:110:66 |vpiOpType:33 |vpiOperand: - \_part_select: , line:110:37, endln:110:60 + \_part_select: sync_pipe (sync_pipe), line:110:37, endln:110:60 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe), line:110:37, endln:110:46 - |vpiParent: - \_if_else: , line:107:7, endln:110:67 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:110:9, endln:110:66 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:110:47, endln:110:57 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_part_select: sync_pipe (sync_pipe), line:110:37, endln:110:60 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:110:47, endln:110:55 + \_ref_obj: (sync_pipe.SYNCPIPE), line:110:47, endln:110:55 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_operation: , line:110:47, endln:110:57 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:110:56, endln:110:57 |vpiParent: @@ -1848,24 +1834,23 @@ design: (work@oh_delay) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:110:9, endln:110:32 + \_part_select: sync_pipe (sync_pipe), line:110:9, endln:110:32 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:110:9, endln:110:66 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:110:9, endln:110:66 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:110:19, endln:110:29 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_part_select: sync_pipe (sync_pipe), line:110:9, endln:110:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:110:19, endln:110:27 + \_ref_obj: (sync_pipe.SYNCPIPE), line:110:19, endln:110:27 |vpiParent: - \_if_else: , line:107:7, endln:110:67 + \_operation: , line:110:19, endln:110:29 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:110:28, endln:110:29 |vpiParent: @@ -1886,10 +1871,7 @@ design: (work@oh_delay) |vpiRhs: \_bit_select: (sync_pipe), line:111:23, endln:111:44 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_cont_assign: , line:111:12, endln:111:44 - |vpiName:sync_pipe + \_cont_assign: , line:111:12, endln:111:44 |vpiName:sync_pipe |vpiIndex: \_operation: , line:111:33, endln:111:43 @@ -2208,21 +2190,19 @@ design: (work@oh_delay) |vpiArgument: \_bit_select: (a), line:36:25, endln:36:37 |vpiParent: - \_ref_obj: (a) - |vpiParent: - \_func_call: (fshl_s), line:36:14, endln:36:38 - |vpiName:a + \_func_call: (fshl_s), line:36:14, endln:36:38 |vpiName:a |vpiIndex: \_operation: , line:36:27, endln:36:36 |vpiParent: - \_func_call: (fshl_s), line:36:14, endln:36:38 + \_bit_select: (a), line:36:25, endln:36:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (width_a), line:36:27, endln:36:34 + \_ref_obj: (a.width_a), line:36:27, endln:36:34 |vpiParent: - \_func_call: (fshl_s), line:36:14, endln:36:38 + \_operation: , line:36:27, endln:36:36 |vpiName:width_a + |vpiFullName:a.width_a |vpiOperand: \_constant: , line:36:35, endln:36:36 |vpiParent: @@ -2473,19 +2453,17 @@ design: (work@oh_delay) \_event_control: , line:12:12, endln:12:27 |vpiOpType:82 |vpiRhs: - \_part_select: , line:13:21, endln:13:30 + \_part_select: in (work@oh_delay.in), line:13:21, endln:13:30 |vpiParent: - \_ref_obj: in (work@oh_delay.in), line:13:21, endln:13:23 - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:in - |vpiFullName:work@oh_delay.in - |vpiDefName:in + \_assignment: , line:13:7, endln:13:30 + |vpiName:in + |vpiFullName:work@oh_delay.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:13:24, endln:13:27 |vpiParent: - \_part_select: , line:13:21, endln:13:30 + \_part_select: in (work@oh_delay.in), line:13:21, endln:13:30 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_delay.in.N), line:13:24, endln:13:25 @@ -2502,11 +2480,7 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (work@oh_delay.sync_pipe), line:13:7, endln:13:19 |vpiParent: - \_ref_obj: (work@oh_delay.sync_pipe) - |vpiParent: - \_assignment: , line:13:7, endln:13:30 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.sync_pipe + \_assignment: , line:13:7, endln:13:30 |vpiName:sync_pipe |vpiFullName:work@oh_delay.sync_pipe |vpiIndex: @@ -2562,11 +2536,7 @@ design: (work@oh_delay) |vpiRhs: \_bit_select: (work@oh_delay.gen_pipe[1].sync_pipe), line:16:24, endln:16:38 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[1].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[1].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[1].sync_pipe |vpiIndex: @@ -2593,19 +2563,15 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (work@oh_delay.gen_pipe[1].sync_pipe), line:16:10, endln:16:22 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[1].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[1].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[1].sync_pipe |vpiIndex: - \_ref_obj: (work@oh_delay.gen_pipe[1].sync_pipe.i), line:16:20, endln:16:21 + \_ref_obj: (work@oh_delay.gen_pipe[1].i), line:16:20, endln:16:21 |vpiParent: \_bit_select: (work@oh_delay.gen_pipe[1].sync_pipe), line:16:10, endln:16:22 |vpiName:i - |vpiFullName:work@oh_delay.gen_pipe[1].sync_pipe.i + |vpiFullName:work@oh_delay.gen_pipe[1].i |vpiActual: \_parameter: (work@oh_delay.gen_pipe[1].i), line:14:0 |vpiAlwaysType:1 @@ -2659,11 +2625,7 @@ design: (work@oh_delay) |vpiRhs: \_bit_select: (work@oh_delay.gen_pipe[2].sync_pipe), line:16:24, endln:16:38 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[2].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[2].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[2].sync_pipe |vpiIndex: @@ -2690,19 +2652,15 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (work@oh_delay.gen_pipe[2].sync_pipe), line:16:10, endln:16:22 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[2].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[2].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[2].sync_pipe |vpiIndex: - \_ref_obj: (work@oh_delay.gen_pipe[2].sync_pipe.i), line:16:20, endln:16:21 + \_ref_obj: (work@oh_delay.gen_pipe[2].i), line:16:20, endln:16:21 |vpiParent: \_bit_select: (work@oh_delay.gen_pipe[2].sync_pipe), line:16:10, endln:16:22 |vpiName:i - |vpiFullName:work@oh_delay.gen_pipe[2].sync_pipe.i + |vpiFullName:work@oh_delay.gen_pipe[2].i |vpiActual: \_parameter: (work@oh_delay.gen_pipe[2].i), line:14:0 |vpiAlwaysType:1 @@ -2756,11 +2714,7 @@ design: (work@oh_delay) |vpiRhs: \_bit_select: (work@oh_delay.gen_pipe[3].sync_pipe), line:16:24, endln:16:38 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[3].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[3].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[3].sync_pipe |vpiIndex: @@ -2787,19 +2741,15 @@ design: (work@oh_delay) |vpiLhs: \_bit_select: (work@oh_delay.gen_pipe[3].sync_pipe), line:16:10, endln:16:22 |vpiParent: - \_ref_obj: (work@oh_delay.gen_pipe[3].sync_pipe) - |vpiParent: - \_assignment: , line:16:10, endln:16:38 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.gen_pipe[3].sync_pipe + \_assignment: , line:16:10, endln:16:38 |vpiName:sync_pipe |vpiFullName:work@oh_delay.gen_pipe[3].sync_pipe |vpiIndex: - \_ref_obj: (work@oh_delay.gen_pipe[3].sync_pipe.i), line:16:20, endln:16:21 + \_ref_obj: (work@oh_delay.gen_pipe[3].i), line:16:20, endln:16:21 |vpiParent: \_bit_select: (work@oh_delay.gen_pipe[3].sync_pipe), line:16:10, endln:16:22 |vpiName:i - |vpiFullName:work@oh_delay.gen_pipe[3].sync_pipe.i + |vpiFullName:work@oh_delay.gen_pipe[3].i |vpiActual: \_parameter: (work@oh_delay.gen_pipe[3].i), line:14:0 |vpiAlwaysType:1 @@ -3139,15 +3089,11 @@ design: (work@oh_delay) |vpiArgument: \_bit_select: (work@shift.a), line:36:25, endln:36:37 |vpiParent: - \_ref_obj: (work@shift.SGNED.a) - |vpiParent: - \_func_call: (fshl_s), line:36:14, endln:36:38 - |vpiName:a - |vpiFullName:work@shift.SGNED.a - |vpiActual: - \_logic_net: (work@shift.a), line:24:14, endln:24:15 + \_func_call: (fshl_s), line:36:14, endln:36:38 |vpiName:a |vpiFullName:work@shift.a + |vpiActual: + \_logic_net: (work@shift.a), line:24:14, endln:24:15 |vpiIndex: \_operation: , line:36:27, endln:36:36 |vpiParent: @@ -3169,8 +3115,6 @@ design: (work@oh_delay) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@shift.a), line:24:14, endln:24:15 |vpiName:fshl_s |vpiLhs: \_ref_obj: (work@shift.SGNED.z), line:36:10, endln:36:11 @@ -3278,10 +3222,11 @@ design: (work@oh_delay) |vpiActual: \_gen_scope: (work@gen_test9.A.B) |vpiActual: - \_ref_obj: (y), line:61:38, endln:61:39 + \_ref_obj: (work@gen_test9.A.y), line:61:38, endln:61:39 |vpiParent: \_hier_path: (B.y), line:61:36, endln:61:39 |vpiName:y + |vpiFullName:work@gen_test9.A.y |vpiActual: \_logic_net: (work@gen_test9.A.B.y), line:53:44, endln:53:45 |vpiOperand: @@ -3305,10 +3250,11 @@ design: (work@oh_delay) |vpiActual: \_gen_scope: (work@gen_test9.A.C) |vpiActual: - \_ref_obj: (z), line:61:52, endln:61:53 + \_ref_obj: (work@gen_test9.A.z), line:61:52, endln:61:53 |vpiParent: \_hier_path: (C.z), line:61:50, endln:61:53 |vpiName:z + |vpiFullName:work@gen_test9.A.z |vpiActual: \_logic_net: (work@gen_test9.A.C.z), line:58:44, endln:58:45 |vpiLhs: @@ -3828,27 +3774,23 @@ design: (work@oh_delay) |vpiOpType:82 |vpiRhs: \_constant: , line:108:36, endln:108:39 - |vpiParent: - \_assignment: , line:108:9, endln:108:39 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:108:9, endln:108:32 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:108:9, endln:108:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:108:9, endln:108:39 - |vpiName:sync_pipe - |vpiFullName:work@oh_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 + \_assignment: , line:108:9, endln:108:39 + |vpiName:sync_pipe + |vpiFullName:work@oh_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:108:19, endln:108:29 |vpiParent: - \_part_select: , line:108:9, endln:108:32 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:108:9, endln:108:32 |vpiOpType:11 |vpiOperand: \_constant: , line:108:19, endln:108:27 @@ -3887,21 +3829,19 @@ design: (work@oh_delay) \_assignment: , line:110:9, endln:110:66 |vpiOpType:33 |vpiOperand: - \_part_select: , line:110:37, endln:110:60 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:110:37, endln:110:60 |vpiParent: - \_ref_obj: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:110:37, endln:110:46 - |vpiParent: - \_operation: , line:110:36, endln:110:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 + \_operation: , line:110:36, endln:110:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:110:47, endln:110:57 |vpiParent: - \_part_select: , line:110:37, endln:110:60 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:110:37, endln:110:60 |vpiOpType:11 |vpiOperand: \_constant: , line:110:47, endln:110:55 @@ -3938,21 +3878,19 @@ design: (work@oh_delay) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:110:9, endln:110:32 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:110:9, endln:110:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:110:9, endln:110:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 + \_assignment: , line:110:9, endln:110:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:110:19, endln:110:29 |vpiParent: - \_part_select: , line:110:9, endln:110:32 + \_part_select: sync_pipe (work@oh_rsync.genblk1.sync_pipe), line:110:9, endln:110:32 |vpiOpType:11 |vpiOperand: \_constant: , line:110:19, endln:110:27 @@ -3988,15 +3926,11 @@ design: (work@oh_delay) |vpiRhs: \_bit_select: (work@oh_rsync.genblk1.sync_pipe), line:111:23, endln:111:44 |vpiParent: - \_ref_obj: (work@oh_rsync.genblk1.sync_pipe) - |vpiParent: - \_cont_assign: , line:111:12, endln:111:44 - |vpiName:sync_pipe - |vpiFullName:work@oh_rsync.genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 + \_cont_assign: , line:111:12, endln:111:44 |vpiName:sync_pipe |vpiFullName:work@oh_rsync.genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 |vpiIndex: \_operation: , line:111:33, endln:111:43 |vpiParent: @@ -4022,8 +3956,6 @@ design: (work@oh_delay) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_rsync.genblk1.sync_pipe), line:105:24, endln:105:33 |vpiLhs: \_ref_obj: (work@oh_rsync.genblk1.nrst_out), line:111:12, endln:111:20 |vpiParent: @@ -4038,4 +3970,4 @@ design: (work@oh_delay) [ NOTE] : 11 -[roundtrip]: ${SURELOG_DIR}/tests/GenerateRegion/dut.sv | ${SURELOG_DIR}/build/regression/GenerateRegion/roundtrip/dut_000.sv | 72 | 123 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/GenerateRegion/dut.sv | ${SURELOG_DIR}/build/regression/GenerateRegion/roundtrip/dut_000.sv | 75 | 123 | \ No newline at end of file diff --git a/tests/HierBitSelect/HierBitSelect.log b/tests/HierBitSelect/HierBitSelect.log index 27fe5496fc..503ee33fa6 100644 --- a/tests/HierBitSelect/HierBitSelect.log +++ b/tests/HierBitSelect/HierBitSelect.log @@ -26,7 +26,6 @@ cont_assign 6 design 1 module_inst 3 part_select 4 -ref_obj 4 var_select 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -37,7 +36,6 @@ cont_assign 9 design 1 module_inst 3 part_select 6 -ref_obj 6 var_select 6 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/HierBitSelect/slpp_all/surelog.uhdm ... @@ -143,9 +141,12 @@ design: (work@dut) |UINT:4 |vpiConstType:9 |vpiIndex: - \_part_select: , line:4:25, endln:4:28 + \_part_select: state_d (work@dut.state_d.state_d), line:4:25, endln:4:28 |vpiParent: \_var_select: (work@dut.state_d), line:4:8, endln:4:29 + |vpiName:state_d + |vpiFullName:work@dut.state_d.state_d + |vpiDefName:state_d |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:4:25, endln:4:26 @@ -172,14 +173,12 @@ design: (work@dut) |BIN:10101010 |vpiConstType:3 |vpiLhs: - \_part_select: , line:5:8, endln:5:23 + \_part_select: state_d1 (work@dut.state_d1), line:5:8, endln:5:23 |vpiParent: - \_ref_obj: state_d1 (work@dut.state_d1) - |vpiParent: - \_cont_assign: , line:5:8, endln:5:37 - |vpiName:state_d1 - |vpiFullName:work@dut.state_d1 - |vpiDefName:state_d1 + \_cont_assign: , line:5:8, endln:5:37 + |vpiName:state_d1 + |vpiFullName:work@dut.state_d1 + |vpiDefName:state_d1 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:17, endln:5:19 @@ -272,18 +271,17 @@ design: (work@dut) |UINT:4 |vpiConstType:9 |vpiIndex: - \_part_select: , line:4:25, endln:4:28 + \_part_select: state_d (work@dut.state_d.state_d), line:4:25, endln:4:28 |vpiParent: - \_ref_obj: (work@dut.state_d.state_d) - |vpiParent: - \_var_select: (work@dut.state_d), line:4:8, endln:4:29 - |vpiName:state_d - |vpiFullName:work@dut.state_d.state_d + \_var_select: (work@dut.state_d), line:4:8, endln:4:29 + |vpiName:state_d + |vpiFullName:work@dut.state_d.state_d + |vpiDefName:state_d |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:4:25, endln:4:26 |vpiParent: - \_part_select: , line:4:25, endln:4:28 + \_part_select: state_d (state_d.state_d), line:4:25, endln:4:28 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -291,7 +289,7 @@ design: (work@dut) |vpiRightRange: \_constant: , line:4:27, endln:4:28 |vpiParent: - \_part_select: , line:4:25, endln:4:28 + \_part_select: state_d (state_d.state_d), line:4:25, endln:4:28 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -303,19 +301,17 @@ design: (work@dut) |vpiRhs: \_constant: , line:5:26, endln:5:37 |vpiLhs: - \_part_select: , line:5:8, endln:5:23 + \_part_select: state_d1 (work@dut.state_d1), line:5:8, endln:5:23 |vpiParent: - \_ref_obj: state_d1 (work@dut.state_d1) - |vpiParent: - \_cont_assign: , line:5:8, endln:5:37 - |vpiName:state_d1 - |vpiFullName:work@dut.state_d1 - |vpiDefName:state_d1 + \_cont_assign: , line:5:8, endln:5:37 + |vpiName:state_d1 + |vpiFullName:work@dut.state_d1 + |vpiDefName:state_d1 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:17, endln:5:19 |vpiParent: - \_part_select: , line:5:8, endln:5:23 + \_part_select: state_d1 (state_d1), line:5:8, endln:5:23 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -323,7 +319,7 @@ design: (work@dut) |vpiRightRange: \_constant: , line:5:20, endln:5:22 |vpiParent: - \_part_select: , line:5:8, endln:5:23 + \_part_select: state_d1 (state_d1), line:5:8, endln:5:23 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -336,4 +332,4 @@ design: (work@dut) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/HierBitSelect/dut.sv | ${SURELOG_DIR}/build/regression/HierBitSelect/roundtrip/dut_000.sv | 2 | 6 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/HierBitSelect/dut.sv | ${SURELOG_DIR}/build/regression/HierBitSelect/roundtrip/dut_000.sv | 3 | 6 | \ No newline at end of file diff --git a/tests/HierBitSlice/HierBitSlice.log b/tests/HierBitSlice/HierBitSlice.log index 882863d4d6..90a6105ad3 100644 --- a/tests/HierBitSlice/HierBitSlice.log +++ b/tests/HierBitSlice/HierBitSlice.log @@ -4639,7 +4639,7 @@ part_select 16 port 58 range 72 ref_module 2 -ref_obj 621 +ref_obj 581 struct_net 2 struct_typespec 2 struct_var 2 @@ -4681,7 +4681,7 @@ part_select 28 port 87 range 78 ref_module 2 -ref_obj 1181 +ref_obj 1106 struct_net 2 struct_typespec 2 struct_var 2 @@ -6022,8 +6022,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:287:24, endln:287:25 - |vpiParent: - \_assignment: , line:287:9, endln:287:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6031,7 +6029,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.branch_taken), line:287:9, endln:287:21 |vpiParent: - \_begin: (work@int_execute_stage), line:286:5, endln:320:8 + \_assignment: , line:287:9, endln:287:25 |vpiName:branch_taken |vpiFullName:work@int_execute_stage.branch_taken |vpiActual: @@ -6044,8 +6042,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:288:30, endln:288:31 - |vpiParent: - \_assignment: , line:288:9, endln:288:31 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6053,7 +6049,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.conditional_branch), line:288:9, endln:288:27 |vpiParent: - \_begin: (work@int_execute_stage), line:286:5, endln:320:8 + \_assignment: , line:288:9, endln:288:31 |vpiName:conditional_branch |vpiFullName:work@int_execute_stage.conditional_branch |vpiActual: @@ -6070,12 +6066,12 @@ design: (work@int_execute_stage) |vpiOperand: \_operation: , line:290:13, endln:291:37 |vpiParent: - \_begin: (work@int_execute_stage), line:286:5, endln:320:8 + \_operation: , line:290:13, endln:292:36 |vpiOpType:26 |vpiOperand: \_ref_obj: (work@int_execute_stage.valid_instruction), line:290:13, endln:290:30 |vpiParent: - \_begin: (work@int_execute_stage), line:286:5, endln:320:8 + \_operation: , line:290:13, endln:291:37 |vpiName:valid_instruction |vpiFullName:work@int_execute_stage.valid_instruction |vpiActual: @@ -6091,10 +6087,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.branch), line:291:16, endln:291:37 |vpiName:of_instruction |vpiActual: - \_ref_obj: (branch), line:291:31, endln:291:37 + \_ref_obj: (work@int_execute_stage.branch), line:291:31, endln:291:37 |vpiParent: \_hier_path: (of_instruction.branch), line:291:16, endln:291:37 |vpiName:branch + |vpiFullName:work@int_execute_stage.branch |vpiOperand: \_operation: , line:292:16, endln:292:36 |vpiParent: @@ -6130,10 +6127,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.branch_type), line:294:26, endln:294:52 |vpiName:of_instruction |vpiActual: - \_ref_obj: (branch_type), line:294:41, endln:294:52 + \_ref_obj: (work@int_execute_stage.branch_type), line:294:41, endln:294:52 |vpiParent: \_hier_path: (of_instruction.branch_type), line:294:26, endln:294:52 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiCaseItem: \_case_item: , line:295:17, endln:299:20 |vpiParent: @@ -6160,16 +6158,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:297:36, endln:297:55 |vpiParent: - \_begin: (work@int_execute_stage), line:296:17, endln:299:20 + \_assignment: , line:297:21, endln:297:55 |vpiOpType:14 |vpiOperand: \_bit_select: (work@int_execute_stage.of_operand1), line:297:36, endln:297:50 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_operation: , line:297:36, endln:297:55 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 + \_operation: , line:297:36, endln:297:55 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 |vpiIndex: @@ -6191,7 +6185,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.branch_taken), line:297:21, endln:297:33 |vpiParent: - \_begin: (work@int_execute_stage), line:296:17, endln:299:20 + \_assignment: , line:297:21, endln:297:55 |vpiName:branch_taken |vpiFullName:work@int_execute_stage.branch_taken |vpiActual: @@ -6204,8 +6198,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:298:42, endln:298:43 - |vpiParent: - \_assignment: , line:298:21, endln:298:43 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6213,7 +6205,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.conditional_branch), line:298:21, endln:298:39 |vpiParent: - \_begin: (work@int_execute_stage), line:296:17, endln:299:20 + \_assignment: , line:298:21, endln:298:43 |vpiName:conditional_branch |vpiFullName:work@int_execute_stage.conditional_branch |vpiActual: @@ -6244,16 +6236,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:303:36, endln:303:55 |vpiParent: - \_begin: (work@int_execute_stage), line:302:17, endln:305:20 + \_assignment: , line:303:21, endln:303:55 |vpiOpType:15 |vpiOperand: \_bit_select: (work@int_execute_stage.of_operand1), line:303:36, endln:303:50 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_operation: , line:303:36, endln:303:55 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 + \_operation: , line:303:36, endln:303:55 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 |vpiIndex: @@ -6275,7 +6263,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.branch_taken), line:303:21, endln:303:33 |vpiParent: - \_begin: (work@int_execute_stage), line:302:17, endln:305:20 + \_assignment: , line:303:21, endln:303:55 |vpiName:branch_taken |vpiFullName:work@int_execute_stage.branch_taken |vpiActual: @@ -6288,8 +6276,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:304:42, endln:304:43 - |vpiParent: - \_assignment: , line:304:21, endln:304:43 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6297,7 +6283,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.conditional_branch), line:304:21, endln:304:39 |vpiParent: - \_begin: (work@int_execute_stage), line:302:17, endln:305:20 + \_assignment: , line:304:21, endln:304:43 |vpiName:conditional_branch |vpiFullName:work@int_execute_stage.conditional_branch |vpiActual: @@ -6359,8 +6345,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:313:36, endln:313:37 - |vpiParent: - \_assignment: , line:313:21, endln:313:37 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6368,7 +6352,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.branch_taken), line:313:21, endln:313:33 |vpiParent: - \_begin: (work@int_execute_stage), line:312:17, endln:314:20 + \_assignment: , line:313:21, endln:313:37 |vpiName:branch_taken |vpiFullName:work@int_execute_stage.branch_taken |vpiActual: @@ -6412,7 +6396,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.of_instruction), line:325:27, endln:325:41 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:325:9, endln:325:41 |vpiName:of_instruction |vpiFullName:work@int_execute_stage.of_instruction |vpiActual: @@ -6420,7 +6404,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_instruction), line:325:9, endln:325:23 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:325:9, endln:325:41 |vpiName:ix_instruction |vpiFullName:work@int_execute_stage.ix_instruction |vpiActual: @@ -6433,7 +6417,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.vector_result), line:326:22, endln:326:35 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:326:9, endln:326:35 |vpiName:vector_result |vpiFullName:work@int_execute_stage.vector_result |vpiActual: @@ -6441,7 +6425,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_result), line:326:9, endln:326:18 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:326:9, endln:326:35 |vpiName:ix_result |vpiFullName:work@int_execute_stage.ix_result |vpiActual: @@ -6454,7 +6438,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.of_mask_value), line:327:26, endln:327:39 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:327:9, endln:327:39 |vpiName:of_mask_value |vpiFullName:work@int_execute_stage.of_mask_value |vpiActual: @@ -6462,7 +6446,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_mask_value), line:327:9, endln:327:22 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:327:9, endln:327:39 |vpiName:ix_mask_value |vpiFullName:work@int_execute_stage.ix_mask_value |vpiActual: @@ -6475,7 +6459,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.of_thread_idx), line:328:26, endln:328:39 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:328:9, endln:328:39 |vpiName:of_thread_idx |vpiFullName:work@int_execute_stage.of_thread_idx |vpiActual: @@ -6483,7 +6467,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_thread_idx), line:328:9, endln:328:22 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:328:9, endln:328:39 |vpiName:ix_thread_idx |vpiFullName:work@int_execute_stage.ix_thread_idx |vpiActual: @@ -6496,7 +6480,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.of_subcycle), line:329:24, endln:329:35 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:329:9, endln:329:35 |vpiName:of_subcycle |vpiFullName:work@int_execute_stage.of_subcycle |vpiActual: @@ -6504,7 +6488,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_subcycle), line:329:9, endln:329:20 |vpiParent: - \_begin: (work@int_execute_stage), line:324:5, endln:339:8 + \_assignment: , line:329:9, endln:329:35 |vpiName:ix_subcycle |vpiFullName:work@int_execute_stage.ix_subcycle |vpiActual: @@ -6526,10 +6510,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.branch_type), line:332:22, endln:332:48 |vpiName:of_instruction |vpiActual: - \_ref_obj: (branch_type), line:332:37, endln:332:48 + \_ref_obj: (work@int_execute_stage.branch_type), line:332:37, endln:332:48 |vpiParent: \_hier_path: (of_instruction.branch_type), line:332:22, endln:332:48 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiCaseItem: \_case_item: , line:333:13, endln:334:63 |vpiParent: @@ -6558,11 +6543,7 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.of_operand1), line:334:48, endln:334:62 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_assignment: , line:334:30, endln:334:62 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 + \_assignment: , line:334:30, endln:334:62 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 |vpiIndex: @@ -6576,7 +6557,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:334:30, endln:334:44 |vpiParent: - \_case_item: , line:333:13, endln:334:63 + \_assignment: , line:334:30, endln:334:62 |vpiName:ix_rollback_pc |vpiFullName:work@int_execute_stage.ix_rollback_pc |vpiActual: @@ -6601,17 +6582,13 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.cr_eret_address), line:335:44, endln:335:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.cr_eret_address) - |vpiParent: - \_assignment: , line:335:26, endln:335:74 - |vpiName:cr_eret_address - |vpiFullName:work@int_execute_stage.cr_eret_address + \_assignment: , line:335:26, endln:335:74 |vpiName:cr_eret_address |vpiFullName:work@int_execute_stage.cr_eret_address |vpiIndex: \_ref_obj: (work@int_execute_stage.of_thread_idx), line:335:60, endln:335:73 |vpiParent: - \_case_item: , line:335:13, endln:335:75 + \_bit_select: (work@int_execute_stage.cr_eret_address), line:335:44, endln:335:74 |vpiName:of_thread_idx |vpiFullName:work@int_execute_stage.of_thread_idx |vpiActual: @@ -6619,7 +6596,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:335:26, endln:335:40 |vpiParent: - \_case_item: , line:335:13, endln:335:75 + \_assignment: , line:335:26, endln:335:74 |vpiName:ix_rollback_pc |vpiFullName:work@int_execute_stage.ix_rollback_pc |vpiActual: @@ -6636,12 +6613,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:337:35, endln:337:85 |vpiParent: - \_case_item: , line:336:13, endln:337:86 + \_assignment: , line:337:17, endln:337:85 |vpiOpType:24 |vpiOperand: \_hier_path: (of_instruction.pc), line:337:35, endln:337:52 |vpiParent: - \_case_item: , line:336:13, endln:337:86 + \_operation: , line:337:35, endln:337:85 |vpiName:of_instruction.pc |vpiActual: \_ref_obj: (of_instruction), line:337:35, endln:337:49 @@ -6649,10 +6626,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.pc), line:337:35, endln:337:52 |vpiName:of_instruction |vpiActual: - \_ref_obj: (pc), line:337:50, endln:337:52 + \_ref_obj: (work@int_execute_stage.pc), line:337:50, endln:337:52 |vpiParent: \_hier_path: (of_instruction.pc), line:337:35, endln:337:52 |vpiName:pc + |vpiFullName:work@int_execute_stage.pc |vpiOperand: \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 |vpiParent: @@ -6664,14 +6642,15 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 |vpiName:of_instruction |vpiActual: - \_ref_obj: (immediate_value), line:337:70, endln:337:85 + \_ref_obj: (work@int_execute_stage.immediate_value), line:337:70, endln:337:85 |vpiParent: \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 |vpiName:immediate_value + |vpiFullName:work@int_execute_stage.immediate_value |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:337:17, endln:337:31 |vpiParent: - \_case_item: , line:336:13, endln:337:86 + \_assignment: , line:337:17, endln:337:85 |vpiName:ix_rollback_pc |vpiFullName:work@int_execute_stage.ix_rollback_pc |vpiActual: @@ -6739,8 +6718,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:347:37, endln:347:39 - |vpiParent: - \_assignment: , line:347:13, endln:347:39 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6748,7 +6725,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_instruction_valid), line:347:13, endln:347:33 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:347:13, endln:347:39 |vpiName:ix_instruction_valid |vpiFullName:work@int_execute_stage.ix_instruction_valid |vpiActual: @@ -6760,8 +6737,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:348:46, endln:348:48 - |vpiParent: - \_assignment: , line:348:13, endln:348:48 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6769,7 +6744,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_cond_branch_not_taken), line:348:13, endln:348:42 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:348:13, endln:348:48 |vpiName:ix_perf_cond_branch_not_taken |vpiFullName:work@int_execute_stage.ix_perf_cond_branch_not_taken |vpiActual: @@ -6781,8 +6756,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:349:42, endln:349:44 - |vpiParent: - \_assignment: , line:349:13, endln:349:44 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6790,7 +6763,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_cond_branch_taken), line:349:13, endln:349:38 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:349:13, endln:349:44 |vpiName:ix_perf_cond_branch_taken |vpiFullName:work@int_execute_stage.ix_perf_cond_branch_taken |vpiActual: @@ -6802,8 +6775,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:350:38, endln:350:40 - |vpiParent: - \_assignment: , line:350:13, endln:350:40 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6811,7 +6782,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_uncond_branch), line:350:13, endln:350:34 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:350:13, endln:350:40 |vpiName:ix_perf_uncond_branch |vpiFullName:work@int_execute_stage.ix_perf_uncond_branch |vpiActual: @@ -6823,8 +6794,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:351:39, endln:351:41 - |vpiParent: - \_assignment: , line:351:13, endln:351:41 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6832,7 +6801,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_privileged_op_fault), line:351:13, endln:351:35 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:351:13, endln:351:41 |vpiName:ix_privileged_op_fault |vpiFullName:work@int_execute_stage.ix_privileged_op_fault |vpiActual: @@ -6844,8 +6813,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:352:31, endln:352:33 - |vpiParent: - \_assignment: , line:352:13, endln:352:33 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -6853,7 +6820,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_en), line:352:13, endln:352:27 |vpiParent: - \_begin: (work@int_execute_stage), line:344:9, endln:354:12 + \_assignment: , line:352:13, endln:352:33 |vpiName:ix_rollback_en |vpiFullName:work@int_execute_stage.ix_rollback_en |vpiActual: @@ -6887,8 +6854,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:359:41, endln:359:42 - |vpiParent: - \_assignment: , line:359:17, endln:359:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6896,7 +6861,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_instruction_valid), line:359:17, endln:359:37 |vpiParent: - \_begin: (work@int_execute_stage), line:358:13, endln:362:16 + \_assignment: , line:359:17, endln:359:42 |vpiName:ix_instruction_valid |vpiFullName:work@int_execute_stage.ix_instruction_valid |vpiActual: @@ -6909,7 +6874,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.privileged_op_fault), line:360:43, endln:360:62 |vpiParent: - \_begin: (work@int_execute_stage), line:358:13, endln:362:16 + \_assignment: , line:360:17, endln:360:62 |vpiName:privileged_op_fault |vpiFullName:work@int_execute_stage.privileged_op_fault |vpiActual: @@ -6917,7 +6882,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_privileged_op_fault), line:360:17, endln:360:39 |vpiParent: - \_begin: (work@int_execute_stage), line:358:13, endln:362:16 + \_assignment: , line:360:17, endln:360:62 |vpiName:ix_privileged_op_fault |vpiFullName:work@int_execute_stage.ix_privileged_op_fault |vpiActual: @@ -6930,7 +6895,7 @@ design: (work@int_execute_stage) |vpiRhs: \_ref_obj: (work@int_execute_stage.branch_taken), line:361:35, endln:361:47 |vpiParent: - \_begin: (work@int_execute_stage), line:358:13, endln:362:16 + \_assignment: , line:361:17, endln:361:47 |vpiName:branch_taken |vpiFullName:work@int_execute_stage.branch_taken |vpiActual: @@ -6938,7 +6903,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_en), line:361:17, endln:361:31 |vpiParent: - \_begin: (work@int_execute_stage), line:358:13, endln:362:16 + \_assignment: , line:361:17, endln:361:47 |vpiName:ix_rollback_en |vpiFullName:work@int_execute_stage.ix_rollback_en |vpiActual: @@ -6955,8 +6920,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:365:41, endln:365:42 - |vpiParent: - \_assignment: , line:365:17, endln:365:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6964,7 +6927,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_instruction_valid), line:365:17, endln:365:37 |vpiParent: - \_begin: (work@int_execute_stage), line:364:13, endln:367:16 + \_assignment: , line:365:17, endln:365:42 |vpiName:ix_instruction_valid |vpiFullName:work@int_execute_stage.ix_instruction_valid |vpiActual: @@ -6976,8 +6939,6 @@ design: (work@int_execute_stage) |vpiOpType:82 |vpiRhs: \_constant: , line:366:35, endln:366:36 - |vpiParent: - \_assignment: , line:366:17, endln:366:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6985,7 +6946,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_en), line:366:17, endln:366:31 |vpiParent: - \_begin: (work@int_execute_stage), line:364:13, endln:367:16 + \_assignment: , line:366:17, endln:366:36 |vpiName:ix_rollback_en |vpiFullName:work@int_execute_stage.ix_rollback_en |vpiActual: @@ -6998,12 +6959,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:369:38, endln:369:73 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:369:13, endln:369:73 |vpiOpType:26 |vpiOperand: \_operation: , line:369:38, endln:369:57 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_operation: , line:369:38, endln:369:73 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@int_execute_stage.conditional_branch), line:369:39, endln:369:57 @@ -7024,7 +6985,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_uncond_branch), line:369:13, endln:369:34 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:369:13, endln:369:73 |vpiName:ix_perf_uncond_branch |vpiFullName:work@int_execute_stage.ix_perf_uncond_branch |vpiActual: @@ -7037,12 +6998,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:370:42, endln:370:76 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:370:13, endln:370:76 |vpiOpType:26 |vpiOperand: \_ref_obj: (work@int_execute_stage.conditional_branch), line:370:42, endln:370:60 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_operation: , line:370:42, endln:370:76 |vpiName:conditional_branch |vpiFullName:work@int_execute_stage.conditional_branch |vpiActual: @@ -7058,7 +7019,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_cond_branch_taken), line:370:13, endln:370:38 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:370:13, endln:370:76 |vpiName:ix_perf_cond_branch_taken |vpiFullName:work@int_execute_stage.ix_perf_cond_branch_taken |vpiActual: @@ -7071,12 +7032,12 @@ design: (work@int_execute_stage) |vpiRhs: \_operation: , line:371:46, endln:371:81 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:371:13, endln:371:81 |vpiOpType:26 |vpiOperand: \_ref_obj: (work@int_execute_stage.conditional_branch), line:371:46, endln:371:64 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_operation: , line:371:46, endln:371:81 |vpiName:conditional_branch |vpiFullName:work@int_execute_stage.conditional_branch |vpiActual: @@ -7097,7 +7058,7 @@ design: (work@int_execute_stage) |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_perf_cond_branch_not_taken), line:371:13, endln:371:42 |vpiParent: - \_begin: (work@int_execute_stage), line:356:9, endln:372:12 + \_assignment: , line:371:13, endln:371:81 |vpiName:ix_perf_cond_branch_not_taken |vpiFullName:work@int_execute_stage.ix_perf_cond_branch_not_taken |vpiActual: @@ -7133,7 +7094,7 @@ design: (work@int_execute_stage) |vpiOperand: \_operation: , line:278:13, endln:278:28 |vpiParent: - \_operation: , line:277:32, endln:278:72 + \_operation: , line:278:13, endln:278:71 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@int_execute_stage.wb_rollback_en), line:278:14, endln:278:28 @@ -7151,7 +7112,7 @@ design: (work@int_execute_stage) |vpiOperand: \_ref_obj: (work@int_execute_stage.wb_rollback_thread_idx), line:278:32, endln:278:54 |vpiParent: - \_operation: , line:278:13, endln:278:71 + \_operation: , line:278:32, endln:278:71 |vpiName:wb_rollback_thread_idx |vpiFullName:work@int_execute_stage.wb_rollback_thread_idx |vpiActual: @@ -7172,7 +7133,7 @@ design: (work@int_execute_stage) |vpiOperand: \_hier_path: (of_instruction.pipeline_sel), line:279:12, endln:279:39 |vpiParent: - \_operation: , line:277:32, endln:279:57 + \_operation: , line:279:12, endln:279:57 |vpiName:of_instruction.pipeline_sel |vpiActual: \_ref_obj: (of_instruction), line:279:12, endln:279:26 @@ -7180,10 +7141,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.pipeline_sel), line:279:12, endln:279:39 |vpiName:of_instruction |vpiActual: - \_ref_obj: (pipeline_sel), line:279:27, endln:279:39 + \_ref_obj: (work@int_execute_stage.pipeline_sel), line:279:27, endln:279:39 |vpiParent: \_hier_path: (of_instruction.pipeline_sel), line:279:12, endln:279:39 |vpiName:pipeline_sel + |vpiFullName:work@int_execute_stage.pipeline_sel |vpiOperand: \_ref_obj: (work@int_execute_stage.PIPE_INT_ARITH), line:279:43, endln:279:57 |vpiParent: @@ -7233,10 +7195,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.branch), line:281:12, endln:281:33 |vpiName:of_instruction |vpiActual: - \_ref_obj: (branch), line:281:27, endln:281:33 + \_ref_obj: (work@int_execute_stage.branch), line:281:27, endln:281:33 |vpiParent: \_hier_path: (of_instruction.branch), line:281:12, endln:281:33 |vpiName:branch + |vpiFullName:work@int_execute_stage.branch |vpiOperand: \_operation: , line:282:12, endln:282:53 |vpiParent: @@ -7245,7 +7208,7 @@ design: (work@int_execute_stage) |vpiOperand: \_hier_path: (of_instruction.branch_type), line:282:12, endln:282:38 |vpiParent: - \_operation: , line:280:19, endln:282:53 + \_operation: , line:282:12, endln:282:53 |vpiName:of_instruction.branch_type |vpiActual: \_ref_obj: (of_instruction), line:282:12, endln:282:26 @@ -7253,10 +7216,11 @@ design: (work@int_execute_stage) \_hier_path: (of_instruction.branch_type), line:282:12, endln:282:38 |vpiName:of_instruction |vpiActual: - \_ref_obj: (branch_type), line:282:27, endln:282:38 + \_ref_obj: (work@int_execute_stage.branch_type), line:282:27, endln:282:38 |vpiParent: \_hier_path: (of_instruction.branch_type), line:282:12, endln:282:38 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiOperand: \_ref_obj: (work@int_execute_stage.BRANCH_ERET), line:282:42, endln:282:53 |vpiParent: @@ -7298,17 +7262,13 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.cr_supervisor_en), line:283:43, endln:283:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.cr_supervisor_en) - |vpiParent: - \_operation: , line:283:42, endln:283:74 - |vpiName:cr_supervisor_en - |vpiFullName:work@int_execute_stage.cr_supervisor_en + \_operation: , line:283:42, endln:283:74 |vpiName:cr_supervisor_en |vpiFullName:work@int_execute_stage.cr_supervisor_en |vpiIndex: \_ref_obj: (work@int_execute_stage.of_thread_idx), line:283:60, endln:283:73 |vpiParent: - \_operation: , line:283:42, endln:283:74 + \_bit_select: (work@int_execute_stage.cr_supervisor_en), line:283:43, endln:283:74 |vpiName:of_thread_idx |vpiFullName:work@int_execute_stage.of_thread_idx |vpiActual: @@ -7372,7 +7332,7 @@ design: (work@int_execute_stage) |vpiOperand: \_ref_obj: (float32_t.FLOAT32_EXP_WIDTH), line:4:9, endln:4:26 |vpiParent: - \_struct_typespec: (float32_t), line:2:9, endln:2:15 + \_operation: , line:4:9, endln:4:30 |vpiName:FLOAT32_EXP_WIDTH |vpiFullName:float32_t.FLOAT32_EXP_WIDTH |vpiOperand: @@ -7417,7 +7377,7 @@ design: (work@int_execute_stage) |vpiOperand: \_ref_obj: (float32_t.FLOAT32_SIG_WIDTH), line:5:9, endln:5:26 |vpiParent: - \_struct_typespec: (float32_t), line:2:9, endln:2:15 + \_operation: , line:5:9, endln:5:30 |vpiName:FLOAT32_SIG_WIDTH |vpiFullName:float32_t.FLOAT32_SIG_WIDTH |vpiOperand: @@ -8212,7 +8172,7 @@ design: (work@int_execute_stage) |vpiName:cr_eret_address |vpiFullName:work@int_execute_stage.cr_eret_address |vpiActual: - \_array_net: (work@int_execute_stage.cr_eret_address), line:82:39, endln:82:54 + \_logic_net: (work@int_execute_stage.cr_eret_address.cr_eret_address), line:82:39, endln:82:57 |vpiTypedef: \_logic_typespec: (scalar_t), line:50:9, endln:50:20 |vpiName:scalar_t @@ -8388,10 +8348,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (branch), line:291:31, endln:291:37 + \_ref_obj: (work@int_execute_stage.branch), line:291:31, endln:291:37 |vpiParent: \_hier_path: (of_instruction.branch), line:291:16, endln:291:37 |vpiName:branch + |vpiFullName:work@int_execute_stage.branch |vpiActual: \_typespec_member: (branch), line:36:11, endln:36:17 |vpiOperand: @@ -8431,10 +8392,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (branch_type), line:294:41, endln:294:52 + \_ref_obj: (work@int_execute_stage.branch_type), line:294:41, endln:294:52 |vpiParent: \_hier_path: (of_instruction.branch_type), line:294:26, endln:294:52 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiActual: \_typespec_member: (branch_type), line:37:19, endln:37:30 |vpiCaseItem: @@ -8468,19 +8430,13 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.of_operand1), line:297:36, endln:297:50 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_operation: , line:297:36, endln:297:55 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_operation: , line:297:36, endln:297:55 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 - |vpiIndex: - \_constant: , line:297:48, endln:297:49 |vpiActual: \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + |vpiIndex: + \_constant: , line:297:48, endln:297:49 |vpiOperand: \_constant: , line:297:54, endln:297:55 |vpiLhs: @@ -8538,19 +8494,13 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.of_operand1), line:303:36, endln:303:50 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_operation: , line:303:36, endln:303:55 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_operation: , line:303:36, endln:303:55 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 - |vpiIndex: - \_constant: , line:303:48, endln:303:49 |vpiActual: \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + |vpiIndex: + \_constant: , line:303:48, endln:303:49 |vpiOperand: \_constant: , line:303:54, endln:303:55 |vpiLhs: @@ -8797,10 +8747,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (branch_type), line:332:37, endln:332:48 + \_ref_obj: (work@int_execute_stage.branch_type), line:332:37, endln:332:48 |vpiParent: \_hier_path: (of_instruction.branch_type), line:332:22, endln:332:48 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiActual: \_typespec_member: (branch_type), line:37:19, endln:37:30 |vpiCaseItem: @@ -8831,19 +8782,13 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.of_operand1), line:334:48, endln:334:62 |vpiParent: - \_ref_obj: (work@int_execute_stage.of_operand1) - |vpiParent: - \_assignment: , line:334:30, endln:334:62 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_assignment: , line:334:30, endln:334:62 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.of_operand1 - |vpiIndex: - \_constant: , line:334:60, endln:334:61 |vpiActual: \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + |vpiIndex: + \_constant: , line:334:60, endln:334:61 |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:334:30, endln:334:44 |vpiParent: @@ -8872,25 +8817,19 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.cr_eret_address), line:335:44, endln:335:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.cr_eret_address) - |vpiParent: - \_assignment: , line:335:26, endln:335:74 - |vpiName:cr_eret_address - |vpiFullName:work@int_execute_stage.cr_eret_address - |vpiActual: - \_array_net: (work@int_execute_stage.cr_eret_address), line:82:39, endln:82:54 + \_assignment: , line:335:26, endln:335:74 |vpiName:cr_eret_address |vpiFullName:work@int_execute_stage.cr_eret_address + |vpiActual: + \_array_net: (work@int_execute_stage.cr_eret_address), line:82:39, endln:82:54 |vpiIndex: - \_ref_obj: (work@int_execute_stage.cr_eret_address.of_thread_idx), line:335:60, endln:335:73 + \_ref_obj: (work@int_execute_stage.of_thread_idx), line:335:60, endln:335:73 |vpiParent: \_bit_select: (work@int_execute_stage.cr_eret_address), line:335:44, endln:335:74 |vpiName:of_thread_idx - |vpiFullName:work@int_execute_stage.cr_eret_address.of_thread_idx + |vpiFullName:work@int_execute_stage.of_thread_idx |vpiActual: \_logic_var: (work@int_execute_stage.of_thread_idx), line:63:39, endln:63:52 - |vpiActual: - \_array_net: (work@int_execute_stage.cr_eret_address), line:82:39, endln:82:54 |vpiLhs: \_ref_obj: (work@int_execute_stage.ix_rollback_pc), line:335:26, endln:335:40 |vpiParent: @@ -8926,10 +8865,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (pc), line:337:50, endln:337:52 + \_ref_obj: (work@int_execute_stage.pc), line:337:50, endln:337:52 |vpiParent: \_hier_path: (of_instruction.pc), line:337:35, endln:337:52 |vpiName:pc + |vpiFullName:work@int_execute_stage.pc |vpiActual: \_typespec_member: (pc), line:9:14, endln:9:16 |vpiOperand: @@ -8945,10 +8885,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (immediate_value), line:337:70, endln:337:85 + \_ref_obj: (work@int_execute_stage.immediate_value), line:337:70, endln:337:85 |vpiParent: \_hier_path: (of_instruction.immediate_value), line:337:55, endln:337:85 |vpiName:immediate_value + |vpiFullName:work@int_execute_stage.immediate_value |vpiActual: \_typespec_member: (immediate_value), line:35:14, endln:35:29 |vpiLhs: @@ -9821,8 +9762,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:130:64, endln:130:65 - |vpiParent: - \_assignment: , line:130:59, endln:130:65 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9855,8 +9794,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:131:64, endln:131:65 - |vpiParent: - \_assignment: , line:131:59, endln:131:65 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9889,8 +9826,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:132:64, endln:132:65 - |vpiParent: - \_assignment: , line:132:59, endln:132:65 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -9923,8 +9858,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:133:64, endln:133:65 - |vpiParent: - \_assignment: , line:133:59, endln:133:65 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -9957,8 +9890,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:134:64, endln:134:65 - |vpiParent: - \_assignment: , line:134:59, endln:134:65 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -9991,8 +9922,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:135:64, endln:135:65 - |vpiParent: - \_assignment: , line:135:59, endln:135:65 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -10025,8 +9954,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:136:64, endln:136:65 - |vpiParent: - \_assignment: , line:136:59, endln:136:65 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -10059,8 +9986,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:137:64, endln:137:65 - |vpiParent: - \_assignment: , line:137:59, endln:137:65 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -10093,8 +10018,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:138:64, endln:138:65 - |vpiParent: - \_assignment: , line:138:59, endln:138:65 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -10127,8 +10050,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:139:64, endln:139:65 - |vpiParent: - \_assignment: , line:139:59, endln:139:65 |vpiDecompile:9 |vpiSize:64 |UINT:9 @@ -10161,8 +10082,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:140:64, endln:140:66 - |vpiParent: - \_assignment: , line:140:59, endln:140:66 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -10195,8 +10114,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:141:64, endln:141:66 - |vpiParent: - \_assignment: , line:141:59, endln:141:66 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -10229,8 +10146,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:142:64, endln:142:66 - |vpiParent: - \_assignment: , line:142:59, endln:142:66 |vpiDecompile:12 |vpiSize:64 |UINT:12 @@ -10263,8 +10178,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:143:64, endln:143:66 - |vpiParent: - \_assignment: , line:143:59, endln:143:66 |vpiDecompile:13 |vpiSize:64 |UINT:13 @@ -10297,8 +10210,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:144:64, endln:144:66 - |vpiParent: - \_assignment: , line:144:59, endln:144:66 |vpiDecompile:14 |vpiSize:64 |UINT:14 @@ -10331,8 +10242,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:145:64, endln:145:66 - |vpiParent: - \_assignment: , line:145:59, endln:145:66 |vpiDecompile:15 |vpiSize:64 |UINT:15 @@ -10365,8 +10274,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:146:64, endln:146:66 - |vpiParent: - \_assignment: , line:146:59, endln:146:66 |vpiDecompile:16 |vpiSize:64 |UINT:16 @@ -10399,8 +10306,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:147:64, endln:147:66 - |vpiParent: - \_assignment: , line:147:59, endln:147:66 |vpiDecompile:17 |vpiSize:64 |UINT:17 @@ -10433,8 +10338,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:148:64, endln:148:66 - |vpiParent: - \_assignment: , line:148:59, endln:148:66 |vpiDecompile:18 |vpiSize:64 |UINT:18 @@ -10467,8 +10370,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:149:64, endln:149:66 - |vpiParent: - \_assignment: , line:149:59, endln:149:66 |vpiDecompile:19 |vpiSize:64 |UINT:19 @@ -10501,8 +10402,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:150:64, endln:150:66 - |vpiParent: - \_assignment: , line:150:59, endln:150:66 |vpiDecompile:20 |vpiSize:64 |UINT:20 @@ -10535,8 +10434,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:151:64, endln:151:66 - |vpiParent: - \_assignment: , line:151:59, endln:151:66 |vpiDecompile:21 |vpiSize:64 |UINT:21 @@ -10569,8 +10466,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:152:64, endln:152:66 - |vpiParent: - \_assignment: , line:152:59, endln:152:66 |vpiDecompile:22 |vpiSize:64 |UINT:22 @@ -10603,8 +10498,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:153:64, endln:153:66 - |vpiParent: - \_assignment: , line:153:59, endln:153:66 |vpiDecompile:23 |vpiSize:64 |UINT:23 @@ -10637,8 +10530,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:154:64, endln:154:66 - |vpiParent: - \_assignment: , line:154:59, endln:154:66 |vpiDecompile:24 |vpiSize:64 |UINT:24 @@ -10671,8 +10562,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:155:64, endln:155:66 - |vpiParent: - \_assignment: , line:155:59, endln:155:66 |vpiDecompile:25 |vpiSize:64 |UINT:25 @@ -10705,8 +10594,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:156:64, endln:156:66 - |vpiParent: - \_assignment: , line:156:59, endln:156:66 |vpiDecompile:26 |vpiSize:64 |UINT:26 @@ -10739,8 +10626,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:157:64, endln:157:66 - |vpiParent: - \_assignment: , line:157:59, endln:157:66 |vpiDecompile:27 |vpiSize:64 |UINT:27 @@ -10773,8 +10658,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:158:64, endln:158:66 - |vpiParent: - \_assignment: , line:158:59, endln:158:66 |vpiDecompile:28 |vpiSize:64 |UINT:28 @@ -10807,8 +10690,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:159:64, endln:159:66 - |vpiParent: - \_assignment: , line:159:59, endln:159:66 |vpiDecompile:29 |vpiSize:64 |UINT:29 @@ -10841,8 +10722,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:160:64, endln:160:66 - |vpiParent: - \_assignment: , line:160:59, endln:160:66 |vpiDecompile:30 |vpiSize:64 |UINT:30 @@ -10875,8 +10754,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:161:64, endln:161:66 - |vpiParent: - \_assignment: , line:161:59, endln:161:66 |vpiDecompile:31 |vpiSize:64 |UINT:31 @@ -10909,8 +10786,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:162:64, endln:162:66 - |vpiParent: - \_assignment: , line:162:59, endln:162:66 |vpiDecompile:32 |vpiSize:64 |UINT:32 @@ -10935,8 +10810,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:163:35, endln:163:36 - |vpiParent: - \_assignment: , line:163:30, endln:163:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10993,8 +10866,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:171:64, endln:171:66 - |vpiParent: - \_assignment: , line:171:59, endln:171:66 |vpiDecompile:32 |vpiSize:64 |UINT:32 @@ -11027,8 +10898,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:172:64, endln:172:66 - |vpiParent: - \_assignment: , line:172:59, endln:172:66 |vpiDecompile:31 |vpiSize:64 |UINT:31 @@ -11061,8 +10930,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:173:64, endln:173:66 - |vpiParent: - \_assignment: , line:173:59, endln:173:66 |vpiDecompile:30 |vpiSize:64 |UINT:30 @@ -11095,8 +10962,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:174:64, endln:174:66 - |vpiParent: - \_assignment: , line:174:59, endln:174:66 |vpiDecompile:29 |vpiSize:64 |UINT:29 @@ -11129,8 +10994,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:175:64, endln:175:66 - |vpiParent: - \_assignment: , line:175:59, endln:175:66 |vpiDecompile:28 |vpiSize:64 |UINT:28 @@ -11163,8 +11026,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:176:64, endln:176:66 - |vpiParent: - \_assignment: , line:176:59, endln:176:66 |vpiDecompile:27 |vpiSize:64 |UINT:27 @@ -11197,8 +11058,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:177:64, endln:177:66 - |vpiParent: - \_assignment: , line:177:59, endln:177:66 |vpiDecompile:26 |vpiSize:64 |UINT:26 @@ -11231,8 +11090,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:178:64, endln:178:66 - |vpiParent: - \_assignment: , line:178:59, endln:178:66 |vpiDecompile:25 |vpiSize:64 |UINT:25 @@ -11265,8 +11122,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:179:64, endln:179:66 - |vpiParent: - \_assignment: , line:179:59, endln:179:66 |vpiDecompile:24 |vpiSize:64 |UINT:24 @@ -11299,8 +11154,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:180:64, endln:180:66 - |vpiParent: - \_assignment: , line:180:59, endln:180:66 |vpiDecompile:23 |vpiSize:64 |UINT:23 @@ -11333,8 +11186,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:181:64, endln:181:66 - |vpiParent: - \_assignment: , line:181:59, endln:181:66 |vpiDecompile:22 |vpiSize:64 |UINT:22 @@ -11367,8 +11218,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:182:64, endln:182:66 - |vpiParent: - \_assignment: , line:182:59, endln:182:66 |vpiDecompile:21 |vpiSize:64 |UINT:21 @@ -11401,8 +11250,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:183:64, endln:183:66 - |vpiParent: - \_assignment: , line:183:59, endln:183:66 |vpiDecompile:20 |vpiSize:64 |UINT:20 @@ -11435,8 +11282,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:184:64, endln:184:66 - |vpiParent: - \_assignment: , line:184:59, endln:184:66 |vpiDecompile:19 |vpiSize:64 |UINT:19 @@ -11469,8 +11314,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:185:64, endln:185:66 - |vpiParent: - \_assignment: , line:185:59, endln:185:66 |vpiDecompile:18 |vpiSize:64 |UINT:18 @@ -11503,8 +11346,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:186:64, endln:186:66 - |vpiParent: - \_assignment: , line:186:59, endln:186:66 |vpiDecompile:17 |vpiSize:64 |UINT:17 @@ -11537,8 +11378,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:187:64, endln:187:66 - |vpiParent: - \_assignment: , line:187:59, endln:187:66 |vpiDecompile:16 |vpiSize:64 |UINT:16 @@ -11571,8 +11410,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:188:64, endln:188:66 - |vpiParent: - \_assignment: , line:188:59, endln:188:66 |vpiDecompile:15 |vpiSize:64 |UINT:15 @@ -11605,8 +11442,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:189:64, endln:189:66 - |vpiParent: - \_assignment: , line:189:59, endln:189:66 |vpiDecompile:14 |vpiSize:64 |UINT:14 @@ -11639,8 +11474,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:190:64, endln:190:66 - |vpiParent: - \_assignment: , line:190:59, endln:190:66 |vpiDecompile:13 |vpiSize:64 |UINT:13 @@ -11673,8 +11506,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:191:64, endln:191:66 - |vpiParent: - \_assignment: , line:191:59, endln:191:66 |vpiDecompile:12 |vpiSize:64 |UINT:12 @@ -11707,8 +11538,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:192:64, endln:192:66 - |vpiParent: - \_assignment: , line:192:59, endln:192:66 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -11741,8 +11570,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:193:64, endln:193:66 - |vpiParent: - \_assignment: , line:193:59, endln:193:66 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -11775,8 +11602,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:194:64, endln:194:65 - |vpiParent: - \_assignment: , line:194:59, endln:194:65 |vpiDecompile:9 |vpiSize:64 |UINT:9 @@ -11809,8 +11634,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:195:64, endln:195:65 - |vpiParent: - \_assignment: , line:195:59, endln:195:65 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -11843,8 +11666,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:196:64, endln:196:65 - |vpiParent: - \_assignment: , line:196:59, endln:196:65 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -11877,8 +11698,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:197:64, endln:197:65 - |vpiParent: - \_assignment: , line:197:59, endln:197:65 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -11911,8 +11730,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:198:64, endln:198:65 - |vpiParent: - \_assignment: , line:198:59, endln:198:65 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -11945,8 +11762,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:199:64, endln:199:65 - |vpiParent: - \_assignment: , line:199:59, endln:199:65 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -11979,8 +11794,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:200:64, endln:200:65 - |vpiParent: - \_assignment: , line:200:59, endln:200:65 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -12013,8 +11826,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:201:64, endln:201:65 - |vpiParent: - \_assignment: , line:201:59, endln:201:65 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -12047,8 +11858,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:202:64, endln:202:65 - |vpiParent: - \_assignment: , line:202:59, endln:202:65 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -12081,8 +11890,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:203:64, endln:203:65 - |vpiParent: - \_assignment: , line:203:59, endln:203:65 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12107,8 +11914,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:204:35, endln:204:36 - |vpiParent: - \_assignment: , line:204:30, endln:204:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12153,10 +11958,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:220:32, endln:220:40 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].exponent), line:220:32, endln:220:40 |vpiParent: \_hier_path: (fp_operand.exponent), line:220:21, endln:220:40 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -12196,10 +12002,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:224:46, endln:224:50 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].sign), line:224:46, endln:224:50 |vpiParent: \_hier_path: (fp_operand.sign), line:224:35, endln:224:50 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -12248,10 +12055,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:226:37, endln:226:45 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].exponent), line:226:37, endln:226:45 |vpiParent: \_hier_path: (fp_operand.exponent), line:226:26, endln:226:45 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -12289,10 +12097,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (significand), line:228:36, endln:228:47 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].significand), line:228:36, endln:228:47 |vpiParent: \_hier_path: (fp_operand.significand), line:228:25, endln:228:47 |vpiName:significand + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].significand |vpiActual: \_typespec_member: (significand), line:5:34, endln:5:45 |vpiOperand: @@ -12370,10 +12179,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:231:50, endln:231:54 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].sign), line:231:50, endln:231:54 |vpiParent: \_hier_path: (fp_operand.sign), line:231:39, endln:231:54 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -12429,10 +12239,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:235:46, endln:235:50 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].sign), line:235:46, endln:235:50 |vpiParent: \_hier_path: (fp_operand.sign), line:235:35, endln:235:50 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -12466,10 +12277,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:235:72, endln:235:80 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].exponent), line:235:72, endln:235:80 |vpiParent: \_hier_path: (fp_operand.exponent), line:235:61, endln:235:80 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -12498,13 +12310,13 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_part_select: , line:235:98, endln:235:115 + \_part_select: (fp_operand.significand[22:17]), line:235:98, endln:235:115 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].significand) - |vpiParent: - \_hier_path: (fp_operand.significand[22:17]), line:235:87, endln:235:116 - |vpiName:significand - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].significand + \_hier_path: (fp_operand.significand[22:17]), line:235:87, endln:235:116 + |vpiName:significand + |vpiFullName:fp_operand.significand[22:17] + |vpiActual: + \_typespec_member: (significand), line:5:34, endln:5:45 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:235:110, endln:235:112 @@ -12595,10 +12407,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (alu_op), line:242:45, endln:242:51 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].alu_op), line:242:45, endln:242:51 |vpiParent: \_hier_path: (of_instruction.alu_op), line:242:30, endln:242:51 |vpiName:alu_op + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].alu_op |vpiActual: \_typespec_member: (alu_op), line:30:14, endln:30:20 |vpiCaseItem: @@ -12669,16 +12482,14 @@ design: (work@int_execute_stage) |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiOperand: - \_part_select: , line:245:60, endln:245:78 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:245:60, endln:245:78 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:245:60, endln:245:73 - |vpiParent: - \_operation: , line:245:43, endln:245:78 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:245:43, endln:245:78 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:245:74, endln:245:75 @@ -13878,16 +13689,14 @@ design: (work@int_execute_stage) |vpiParent: \_operation: , line:264:45, endln:264:83 |vpiArgument: - \_part_select: , line:264:63, endln:264:81 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:264:63, endln:264:81 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:264:63, endln:264:76 - |vpiParent: - \_sys_func_call: ($signed), line:264:55, endln:264:62 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_sys_func_call: ($signed), line:264:55, endln:264:62 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:264:77, endln:264:78 @@ -13961,16 +13770,14 @@ design: (work@int_execute_stage) |vpiParent: \_operation: , line:265:46, endln:265:85 |vpiArgument: - \_part_select: , line:265:64, endln:265:83 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:265:64, endln:265:83 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:265:64, endln:265:77 - |vpiParent: - \_sys_func_call: ($signed), line:265:56, endln:265:63 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_sys_func_call: ($signed), line:265:56, endln:265:63 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:265:78, endln:265:80 @@ -14018,15 +13825,11 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].of_operand1), line:267:47, endln:267:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].of_operand1) - |vpiParent: - \_assignment: , line:267:33, endln:267:74 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_assignment: , line:267:33, endln:267:74 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiIndex: \_operation: , line:267:59, endln:267:73 |vpiParent: @@ -14040,8 +13843,6 @@ design: (work@int_execute_stage) |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1.lane_operand2 |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_result), line:267:33, endln:267:44 |vpiParent: @@ -14094,8 +13895,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:269:44, endln:269:45 - |vpiParent: - \_assignment: , line:269:30, endln:269:45 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -14116,25 +13915,19 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].of_operand1), line:118:36, endln:118:53 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].of_operand1) - |vpiParent: - \_cont_assign: , line:118:20, endln:118:53 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_cont_assign: , line:118:20, endln:118:53 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].of_operand1.lane), line:118:48, endln:118:52 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane), line:118:48, endln:118:52 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].of_operand1), line:118:36, endln:118:53 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand1.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[0].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:118:20, endln:118:33 |vpiParent: @@ -14150,25 +13943,19 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].of_operand2), line:119:36, endln:119:53 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].of_operand2) - |vpiParent: - \_cont_assign: , line:119:20, endln:119:53 - |vpiName:of_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 + \_cont_assign: , line:119:20, endln:119:53 |vpiName:of_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].of_operand2.lane), line:119:48, endln:119:52 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane), line:119:48, endln:119:52 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].of_operand2), line:119:36, endln:119:53 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].of_operand2.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[0].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:119:20, endln:119:33 |vpiParent: @@ -14256,15 +14043,11 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].difference), line:121:31, endln:121:45 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].difference) - |vpiParent: - \_cont_assign: , line:121:20, endln:121:45 - |vpiName:difference - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].difference - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].difference), line:104:22, endln:104:32 + \_cont_assign: , line:121:20, endln:121:45 |vpiName:difference |vpiFullName:work@int_execute_stage.lane_alu_gen[0].difference + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].difference), line:104:22, endln:104:32 |vpiIndex: \_constant: , line:121:42, endln:121:44 |vpiParent: @@ -14273,8 +14056,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].difference), line:104:22, endln:104:32 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].negative), line:121:20, endln:121:28 |vpiParent: @@ -14300,15 +14081,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:122:31, endln:122:48 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand2) - |vpiParent: - \_operation: , line:122:31, endln:122:60 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:122:31, endln:122:60 |vpiName:lane_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiIndex: \_constant: , line:122:45, endln:122:47 |vpiParent: @@ -14317,8 +14094,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiOperand: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].negative), line:122:52, endln:122:60 |vpiParent: @@ -14335,15 +14110,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:122:64, endln:122:81 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand1) - |vpiParent: - \_operation: , line:122:64, endln:122:102 - |vpiName:lane_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 + \_operation: , line:122:64, endln:122:102 |vpiName:lane_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiIndex: \_constant: , line:122:78, endln:122:80 |vpiParent: @@ -14352,20 +14123,14 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:122:85, endln:122:102 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand2) - |vpiParent: - \_operation: , line:122:64, endln:122:102 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:122:64, endln:122:102 |vpiName:lane_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiIndex: \_constant: , line:122:99, endln:122:101 |vpiParent: @@ -14374,8 +14139,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].overflow), line:122:20, endln:122:28 |vpiParent: @@ -14477,10 +14240,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (alu_op), line:209:51, endln:209:57 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].alu_op), line:209:51, endln:209:57 |vpiParent: \_hier_path: (of_instruction.alu_op), line:209:36, endln:209:57 |vpiName:alu_op + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].alu_op |vpiActual: \_typespec_member: (alu_op), line:30:14, endln:30:20 |vpiOperand: @@ -14492,15 +14256,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:209:71, endln:209:88 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane_operand1) - |vpiParent: - \_operation: , line:209:36, endln:209:95 - |vpiName:lane_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 + \_operation: , line:209:36, endln:209:95 |vpiName:lane_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiIndex: \_constant: , line:209:85, endln:209:87 |vpiParent: @@ -14509,8 +14269,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiOperand: \_constant: , line:209:91, endln:209:95 |vpiParent: @@ -14633,16 +14391,14 @@ design: (work@int_execute_stage) |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand1), line:101:22, endln:101:35 |vpiOperand: - \_part_select: , line:210:79, endln:210:97 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:210:79, endln:210:97 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:210:79, endln:210:92 - |vpiParent: - \_operation: , line:210:39, endln:210:97 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:210:39, endln:210:97 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[0].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:210:93, endln:210:94 @@ -14699,25 +14455,19 @@ design: (work@int_execute_stage) |vpiLhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].vector_result), line:273:20, endln:273:39 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].vector_result) - |vpiParent: - \_cont_assign: , line:273:20, endln:273:53 - |vpiName:vector_result - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].vector_result - |vpiActual: - \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 + \_cont_assign: , line:273:20, endln:273:53 |vpiName:vector_result |vpiFullName:work@int_execute_stage.lane_alu_gen[0].vector_result + |vpiActual: + \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].vector_result.lane), line:273:34, endln:273:38 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].lane), line:273:34, endln:273:38 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[0].vector_result), line:273:20, endln:273:39 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].vector_result.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[0].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[0].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 |vpiModule: \_module_inst: work@int_execute_stage.lane_alu_gen[0]::reciprocal_rom (work@int_execute_stage.lane_alu_gen[0].rom), file:${SURELOG_DIR}/tests/HierBitSlice/dut.sv, line:214:13, endln:216:39 |vpiParent: @@ -14747,13 +14497,13 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[0].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_part_select: , line:215:41, endln:215:58 + \_part_select: (fp_operand.significand[22:17]), line:215:41, endln:215:58 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[0].rom.significand.significand) - |vpiParent: - \_hier_path: (fp_operand.significand[22:17]), line:215:30, endln:215:59 - |vpiName:significand - |vpiFullName:work@int_execute_stage.lane_alu_gen[0].rom.significand.significand + \_hier_path: (fp_operand.significand[22:17]), line:215:30, endln:215:59 + |vpiName:significand + |vpiFullName:fp_operand.significand[22:17] + |vpiActual: + \_typespec_member: (significand), line:5:34, endln:5:45 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:215:53, endln:215:55 @@ -15233,8 +14983,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:130:64, endln:130:65 - |vpiParent: - \_assignment: , line:130:59, endln:130:65 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -15267,8 +15015,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:131:64, endln:131:65 - |vpiParent: - \_assignment: , line:131:59, endln:131:65 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -15301,8 +15047,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:132:64, endln:132:65 - |vpiParent: - \_assignment: , line:132:59, endln:132:65 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -15335,8 +15079,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:133:64, endln:133:65 - |vpiParent: - \_assignment: , line:133:59, endln:133:65 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -15369,8 +15111,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:134:64, endln:134:65 - |vpiParent: - \_assignment: , line:134:59, endln:134:65 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -15403,8 +15143,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:135:64, endln:135:65 - |vpiParent: - \_assignment: , line:135:59, endln:135:65 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -15437,8 +15175,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:136:64, endln:136:65 - |vpiParent: - \_assignment: , line:136:59, endln:136:65 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -15471,8 +15207,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:137:64, endln:137:65 - |vpiParent: - \_assignment: , line:137:59, endln:137:65 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -15505,8 +15239,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:138:64, endln:138:65 - |vpiParent: - \_assignment: , line:138:59, endln:138:65 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -15539,8 +15271,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:139:64, endln:139:65 - |vpiParent: - \_assignment: , line:139:59, endln:139:65 |vpiDecompile:9 |vpiSize:64 |UINT:9 @@ -15573,8 +15303,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:140:64, endln:140:66 - |vpiParent: - \_assignment: , line:140:59, endln:140:66 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -15607,8 +15335,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:141:64, endln:141:66 - |vpiParent: - \_assignment: , line:141:59, endln:141:66 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -15641,8 +15367,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:142:64, endln:142:66 - |vpiParent: - \_assignment: , line:142:59, endln:142:66 |vpiDecompile:12 |vpiSize:64 |UINT:12 @@ -15675,8 +15399,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:143:64, endln:143:66 - |vpiParent: - \_assignment: , line:143:59, endln:143:66 |vpiDecompile:13 |vpiSize:64 |UINT:13 @@ -15709,8 +15431,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:144:64, endln:144:66 - |vpiParent: - \_assignment: , line:144:59, endln:144:66 |vpiDecompile:14 |vpiSize:64 |UINT:14 @@ -15743,8 +15463,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:145:64, endln:145:66 - |vpiParent: - \_assignment: , line:145:59, endln:145:66 |vpiDecompile:15 |vpiSize:64 |UINT:15 @@ -15777,8 +15495,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:146:64, endln:146:66 - |vpiParent: - \_assignment: , line:146:59, endln:146:66 |vpiDecompile:16 |vpiSize:64 |UINT:16 @@ -15811,8 +15527,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:147:64, endln:147:66 - |vpiParent: - \_assignment: , line:147:59, endln:147:66 |vpiDecompile:17 |vpiSize:64 |UINT:17 @@ -15845,8 +15559,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:148:64, endln:148:66 - |vpiParent: - \_assignment: , line:148:59, endln:148:66 |vpiDecompile:18 |vpiSize:64 |UINT:18 @@ -15879,8 +15591,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:149:64, endln:149:66 - |vpiParent: - \_assignment: , line:149:59, endln:149:66 |vpiDecompile:19 |vpiSize:64 |UINT:19 @@ -15913,8 +15623,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:150:64, endln:150:66 - |vpiParent: - \_assignment: , line:150:59, endln:150:66 |vpiDecompile:20 |vpiSize:64 |UINT:20 @@ -15947,8 +15655,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:151:64, endln:151:66 - |vpiParent: - \_assignment: , line:151:59, endln:151:66 |vpiDecompile:21 |vpiSize:64 |UINT:21 @@ -15981,8 +15687,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:152:64, endln:152:66 - |vpiParent: - \_assignment: , line:152:59, endln:152:66 |vpiDecompile:22 |vpiSize:64 |UINT:22 @@ -16015,8 +15719,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:153:64, endln:153:66 - |vpiParent: - \_assignment: , line:153:59, endln:153:66 |vpiDecompile:23 |vpiSize:64 |UINT:23 @@ -16049,8 +15751,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:154:64, endln:154:66 - |vpiParent: - \_assignment: , line:154:59, endln:154:66 |vpiDecompile:24 |vpiSize:64 |UINT:24 @@ -16083,8 +15783,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:155:64, endln:155:66 - |vpiParent: - \_assignment: , line:155:59, endln:155:66 |vpiDecompile:25 |vpiSize:64 |UINT:25 @@ -16117,8 +15815,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:156:64, endln:156:66 - |vpiParent: - \_assignment: , line:156:59, endln:156:66 |vpiDecompile:26 |vpiSize:64 |UINT:26 @@ -16151,8 +15847,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:157:64, endln:157:66 - |vpiParent: - \_assignment: , line:157:59, endln:157:66 |vpiDecompile:27 |vpiSize:64 |UINT:27 @@ -16185,8 +15879,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:158:64, endln:158:66 - |vpiParent: - \_assignment: , line:158:59, endln:158:66 |vpiDecompile:28 |vpiSize:64 |UINT:28 @@ -16219,8 +15911,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:159:64, endln:159:66 - |vpiParent: - \_assignment: , line:159:59, endln:159:66 |vpiDecompile:29 |vpiSize:64 |UINT:29 @@ -16253,8 +15943,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:160:64, endln:160:66 - |vpiParent: - \_assignment: , line:160:59, endln:160:66 |vpiDecompile:30 |vpiSize:64 |UINT:30 @@ -16287,8 +15975,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:161:64, endln:161:66 - |vpiParent: - \_assignment: , line:161:59, endln:161:66 |vpiDecompile:31 |vpiSize:64 |UINT:31 @@ -16321,8 +16007,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:162:64, endln:162:66 - |vpiParent: - \_assignment: , line:162:59, endln:162:66 |vpiDecompile:32 |vpiSize:64 |UINT:32 @@ -16347,8 +16031,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:163:35, endln:163:36 - |vpiParent: - \_assignment: , line:163:30, endln:163:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -16405,8 +16087,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:171:64, endln:171:66 - |vpiParent: - \_assignment: , line:171:59, endln:171:66 |vpiDecompile:32 |vpiSize:64 |UINT:32 @@ -16439,8 +16119,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:172:64, endln:172:66 - |vpiParent: - \_assignment: , line:172:59, endln:172:66 |vpiDecompile:31 |vpiSize:64 |UINT:31 @@ -16473,8 +16151,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:173:64, endln:173:66 - |vpiParent: - \_assignment: , line:173:59, endln:173:66 |vpiDecompile:30 |vpiSize:64 |UINT:30 @@ -16507,8 +16183,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:174:64, endln:174:66 - |vpiParent: - \_assignment: , line:174:59, endln:174:66 |vpiDecompile:29 |vpiSize:64 |UINT:29 @@ -16541,8 +16215,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:175:64, endln:175:66 - |vpiParent: - \_assignment: , line:175:59, endln:175:66 |vpiDecompile:28 |vpiSize:64 |UINT:28 @@ -16575,8 +16247,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:176:64, endln:176:66 - |vpiParent: - \_assignment: , line:176:59, endln:176:66 |vpiDecompile:27 |vpiSize:64 |UINT:27 @@ -16609,8 +16279,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:177:64, endln:177:66 - |vpiParent: - \_assignment: , line:177:59, endln:177:66 |vpiDecompile:26 |vpiSize:64 |UINT:26 @@ -16643,8 +16311,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:178:64, endln:178:66 - |vpiParent: - \_assignment: , line:178:59, endln:178:66 |vpiDecompile:25 |vpiSize:64 |UINT:25 @@ -16677,8 +16343,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:179:64, endln:179:66 - |vpiParent: - \_assignment: , line:179:59, endln:179:66 |vpiDecompile:24 |vpiSize:64 |UINT:24 @@ -16711,8 +16375,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:180:64, endln:180:66 - |vpiParent: - \_assignment: , line:180:59, endln:180:66 |vpiDecompile:23 |vpiSize:64 |UINT:23 @@ -16745,8 +16407,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:181:64, endln:181:66 - |vpiParent: - \_assignment: , line:181:59, endln:181:66 |vpiDecompile:22 |vpiSize:64 |UINT:22 @@ -16779,8 +16439,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:182:64, endln:182:66 - |vpiParent: - \_assignment: , line:182:59, endln:182:66 |vpiDecompile:21 |vpiSize:64 |UINT:21 @@ -16813,8 +16471,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:183:64, endln:183:66 - |vpiParent: - \_assignment: , line:183:59, endln:183:66 |vpiDecompile:20 |vpiSize:64 |UINT:20 @@ -16847,8 +16503,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:184:64, endln:184:66 - |vpiParent: - \_assignment: , line:184:59, endln:184:66 |vpiDecompile:19 |vpiSize:64 |UINT:19 @@ -16881,8 +16535,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:185:64, endln:185:66 - |vpiParent: - \_assignment: , line:185:59, endln:185:66 |vpiDecompile:18 |vpiSize:64 |UINT:18 @@ -16915,8 +16567,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:186:64, endln:186:66 - |vpiParent: - \_assignment: , line:186:59, endln:186:66 |vpiDecompile:17 |vpiSize:64 |UINT:17 @@ -16949,8 +16599,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:187:64, endln:187:66 - |vpiParent: - \_assignment: , line:187:59, endln:187:66 |vpiDecompile:16 |vpiSize:64 |UINT:16 @@ -16983,8 +16631,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:188:64, endln:188:66 - |vpiParent: - \_assignment: , line:188:59, endln:188:66 |vpiDecompile:15 |vpiSize:64 |UINT:15 @@ -17017,8 +16663,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:189:64, endln:189:66 - |vpiParent: - \_assignment: , line:189:59, endln:189:66 |vpiDecompile:14 |vpiSize:64 |UINT:14 @@ -17051,8 +16695,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:190:64, endln:190:66 - |vpiParent: - \_assignment: , line:190:59, endln:190:66 |vpiDecompile:13 |vpiSize:64 |UINT:13 @@ -17085,8 +16727,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:191:64, endln:191:66 - |vpiParent: - \_assignment: , line:191:59, endln:191:66 |vpiDecompile:12 |vpiSize:64 |UINT:12 @@ -17119,8 +16759,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:192:64, endln:192:66 - |vpiParent: - \_assignment: , line:192:59, endln:192:66 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -17153,8 +16791,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:193:64, endln:193:66 - |vpiParent: - \_assignment: , line:193:59, endln:193:66 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -17187,8 +16823,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:194:64, endln:194:65 - |vpiParent: - \_assignment: , line:194:59, endln:194:65 |vpiDecompile:9 |vpiSize:64 |UINT:9 @@ -17221,8 +16855,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:195:64, endln:195:65 - |vpiParent: - \_assignment: , line:195:59, endln:195:65 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -17255,8 +16887,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:196:64, endln:196:65 - |vpiParent: - \_assignment: , line:196:59, endln:196:65 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -17289,8 +16919,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:197:64, endln:197:65 - |vpiParent: - \_assignment: , line:197:59, endln:197:65 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -17323,8 +16951,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:198:64, endln:198:65 - |vpiParent: - \_assignment: , line:198:59, endln:198:65 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -17357,8 +16983,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:199:64, endln:199:65 - |vpiParent: - \_assignment: , line:199:59, endln:199:65 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -17391,8 +17015,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:200:64, endln:200:65 - |vpiParent: - \_assignment: , line:200:59, endln:200:65 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -17425,8 +17047,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:201:64, endln:201:65 - |vpiParent: - \_assignment: , line:201:59, endln:201:65 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -17459,8 +17079,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:202:64, endln:202:65 - |vpiParent: - \_assignment: , line:202:59, endln:202:65 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -17493,8 +17111,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:203:64, endln:203:65 - |vpiParent: - \_assignment: , line:203:59, endln:203:65 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -17519,8 +17135,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:204:35, endln:204:36 - |vpiParent: - \_assignment: , line:204:30, endln:204:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -17565,10 +17179,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:220:32, endln:220:40 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].exponent), line:220:32, endln:220:40 |vpiParent: \_hier_path: (fp_operand.exponent), line:220:21, endln:220:40 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -17608,10 +17223,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:224:46, endln:224:50 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].sign), line:224:46, endln:224:50 |vpiParent: \_hier_path: (fp_operand.sign), line:224:35, endln:224:50 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -17660,10 +17276,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:226:37, endln:226:45 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].exponent), line:226:37, endln:226:45 |vpiParent: \_hier_path: (fp_operand.exponent), line:226:26, endln:226:45 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -17701,10 +17318,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (significand), line:228:36, endln:228:47 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].significand), line:228:36, endln:228:47 |vpiParent: \_hier_path: (fp_operand.significand), line:228:25, endln:228:47 |vpiName:significand + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].significand |vpiActual: \_typespec_member: (significand), line:5:34, endln:5:45 |vpiOperand: @@ -17782,10 +17400,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:231:50, endln:231:54 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].sign), line:231:50, endln:231:54 |vpiParent: \_hier_path: (fp_operand.sign), line:231:39, endln:231:54 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -17841,10 +17460,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (sign), line:235:46, endln:235:50 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].sign), line:235:46, endln:235:50 |vpiParent: \_hier_path: (fp_operand.sign), line:235:35, endln:235:50 |vpiName:sign + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].sign |vpiActual: \_typespec_member: (sign), line:3:9, endln:3:13 |vpiOperand: @@ -17878,10 +17498,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_ref_obj: (exponent), line:235:72, endln:235:80 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].exponent), line:235:72, endln:235:80 |vpiParent: \_hier_path: (fp_operand.exponent), line:235:61, endln:235:80 |vpiName:exponent + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].exponent |vpiActual: \_typespec_member: (exponent), line:4:34, endln:4:42 |vpiOperand: @@ -17910,13 +17531,13 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_part_select: , line:235:98, endln:235:115 + \_part_select: (fp_operand.significand[22:17]), line:235:98, endln:235:115 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].significand) - |vpiParent: - \_hier_path: (fp_operand.significand[22:17]), line:235:87, endln:235:116 - |vpiName:significand - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].significand + \_hier_path: (fp_operand.significand[22:17]), line:235:87, endln:235:116 + |vpiName:significand + |vpiFullName:fp_operand.significand[22:17] + |vpiActual: + \_typespec_member: (significand), line:5:34, endln:5:45 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:235:110, endln:235:112 @@ -18007,10 +17628,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (alu_op), line:242:45, endln:242:51 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].alu_op), line:242:45, endln:242:51 |vpiParent: \_hier_path: (of_instruction.alu_op), line:242:30, endln:242:51 |vpiName:alu_op + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].alu_op |vpiActual: \_typespec_member: (alu_op), line:30:14, endln:30:20 |vpiCaseItem: @@ -18081,16 +17703,14 @@ design: (work@int_execute_stage) |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiOperand: - \_part_select: , line:245:60, endln:245:78 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:245:60, endln:245:78 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:245:60, endln:245:73 - |vpiParent: - \_operation: , line:245:43, endln:245:78 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:245:43, endln:245:78 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:245:74, endln:245:75 @@ -19290,16 +18910,14 @@ design: (work@int_execute_stage) |vpiParent: \_operation: , line:264:45, endln:264:83 |vpiArgument: - \_part_select: , line:264:63, endln:264:81 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:264:63, endln:264:81 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:264:63, endln:264:76 - |vpiParent: - \_sys_func_call: ($signed), line:264:55, endln:264:62 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_sys_func_call: ($signed), line:264:55, endln:264:62 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:264:77, endln:264:78 @@ -19373,16 +18991,14 @@ design: (work@int_execute_stage) |vpiParent: \_operation: , line:265:46, endln:265:85 |vpiArgument: - \_part_select: , line:265:64, endln:265:83 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:265:64, endln:265:83 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:265:64, endln:265:77 - |vpiParent: - \_sys_func_call: ($signed), line:265:56, endln:265:63 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_sys_func_call: ($signed), line:265:56, endln:265:63 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:265:78, endln:265:80 @@ -19430,15 +19046,11 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].of_operand1), line:267:47, endln:267:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].of_operand1) - |vpiParent: - \_assignment: , line:267:33, endln:267:74 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_assignment: , line:267:33, endln:267:74 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiIndex: \_operation: , line:267:59, endln:267:73 |vpiParent: @@ -19452,8 +19064,6 @@ design: (work@int_execute_stage) |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1.lane_operand2 |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_result), line:267:33, endln:267:44 |vpiParent: @@ -19506,8 +19116,6 @@ design: (work@int_execute_stage) |vpiBlocking:1 |vpiRhs: \_constant: , line:269:44, endln:269:45 - |vpiParent: - \_assignment: , line:269:30, endln:269:45 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -19528,25 +19136,19 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].of_operand1), line:118:36, endln:118:53 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].of_operand1) - |vpiParent: - \_cont_assign: , line:118:20, endln:118:53 - |vpiName:of_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 + \_cont_assign: , line:118:20, endln:118:53 |vpiName:of_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].of_operand1.lane), line:118:48, endln:118:52 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane), line:118:48, endln:118:52 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].of_operand1), line:118:36, endln:118:53 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand1.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[1].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand1), line:58:39, endln:58:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:118:20, endln:118:33 |vpiParent: @@ -19562,25 +19164,19 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].of_operand2), line:119:36, endln:119:53 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].of_operand2) - |vpiParent: - \_cont_assign: , line:119:20, endln:119:53 - |vpiName:of_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 + \_cont_assign: , line:119:20, endln:119:53 |vpiName:of_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].of_operand2.lane), line:119:48, endln:119:52 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane), line:119:48, endln:119:52 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].of_operand2), line:119:36, endln:119:53 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].of_operand2.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[1].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.of_operand2), line:59:39, endln:59:50 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:119:20, endln:119:33 |vpiParent: @@ -19668,15 +19264,11 @@ design: (work@int_execute_stage) |vpiRhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].difference), line:121:31, endln:121:45 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].difference) - |vpiParent: - \_cont_assign: , line:121:20, endln:121:45 - |vpiName:difference - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].difference - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].difference), line:104:22, endln:104:32 + \_cont_assign: , line:121:20, endln:121:45 |vpiName:difference |vpiFullName:work@int_execute_stage.lane_alu_gen[1].difference + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].difference), line:104:22, endln:104:32 |vpiIndex: \_constant: , line:121:42, endln:121:44 |vpiParent: @@ -19685,8 +19277,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].difference), line:104:22, endln:104:32 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].negative), line:121:20, endln:121:28 |vpiParent: @@ -19712,15 +19302,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:122:31, endln:122:48 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand2) - |vpiParent: - \_operation: , line:122:31, endln:122:60 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:122:31, endln:122:60 |vpiName:lane_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiIndex: \_constant: , line:122:45, endln:122:47 |vpiParent: @@ -19729,8 +19315,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiOperand: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].negative), line:122:52, endln:122:60 |vpiParent: @@ -19747,15 +19331,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:122:64, endln:122:81 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand1) - |vpiParent: - \_operation: , line:122:64, endln:122:102 - |vpiName:lane_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 + \_operation: , line:122:64, endln:122:102 |vpiName:lane_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiIndex: \_constant: , line:122:78, endln:122:80 |vpiParent: @@ -19764,20 +19344,14 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:122:85, endln:122:102 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand2) - |vpiParent: - \_operation: , line:122:64, endln:122:102 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:122:64, endln:122:102 |vpiName:lane_operand2 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiIndex: \_constant: , line:122:99, endln:122:101 |vpiParent: @@ -19786,8 +19360,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiLhs: \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].overflow), line:122:20, endln:122:28 |vpiParent: @@ -19889,10 +19461,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (alu_op), line:209:51, endln:209:57 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].alu_op), line:209:51, endln:209:57 |vpiParent: \_hier_path: (of_instruction.alu_op), line:209:36, endln:209:57 |vpiName:alu_op + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].alu_op |vpiActual: \_typespec_member: (alu_op), line:30:14, endln:30:20 |vpiOperand: @@ -19904,15 +19477,11 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:209:71, endln:209:88 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane_operand1) - |vpiParent: - \_operation: , line:209:36, endln:209:95 - |vpiName:lane_operand1 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand1 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 + \_operation: , line:209:36, endln:209:95 |vpiName:lane_operand1 |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand1 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiIndex: \_constant: , line:209:85, endln:209:87 |vpiParent: @@ -19921,8 +19490,6 @@ design: (work@int_execute_stage) |vpiSize:64 |UINT:31 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiOperand: \_constant: , line:209:91, endln:209:95 |vpiParent: @@ -20045,16 +19612,14 @@ design: (work@int_execute_stage) |vpiActual: \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand1), line:101:22, endln:101:35 |vpiOperand: - \_part_select: , line:210:79, endln:210:97 + \_part_select: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:210:79, endln:210:97 |vpiParent: - \_ref_obj: lane_operand2 (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:210:79, endln:210:92 - |vpiParent: - \_operation: , line:210:39, endln:210:97 - |vpiName:lane_operand2 - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 - |vpiDefName:lane_operand2 - |vpiActual: - \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 + \_operation: , line:210:39, endln:210:97 + |vpiName:lane_operand2 + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane_operand2 + |vpiDefName:lane_operand2 + |vpiActual: + \_logic_var: (work@int_execute_stage.lane_alu_gen[1].lane_operand2), line:102:22, endln:102:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:210:93, endln:210:94 @@ -20111,25 +19676,19 @@ design: (work@int_execute_stage) |vpiLhs: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].vector_result), line:273:20, endln:273:39 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].vector_result) - |vpiParent: - \_cont_assign: , line:273:20, endln:273:53 - |vpiName:vector_result - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].vector_result - |vpiActual: - \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 + \_cont_assign: , line:273:20, endln:273:53 |vpiName:vector_result |vpiFullName:work@int_execute_stage.lane_alu_gen[1].vector_result + |vpiActual: + \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 |vpiIndex: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].vector_result.lane), line:273:34, endln:273:38 + \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].lane), line:273:34, endln:273:38 |vpiParent: \_bit_select: (work@int_execute_stage.lane_alu_gen[1].vector_result), line:273:20, endln:273:39 |vpiName:lane - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].vector_result.lane + |vpiFullName:work@int_execute_stage.lane_alu_gen[1].lane |vpiActual: \_parameter: (work@int_execute_stage.lane_alu_gen[1].lane), line:99:0 - |vpiActual: - \_logic_var: (work@int_execute_stage.vector_result), line:90:14, endln:90:27 |vpiModule: \_module_inst: work@int_execute_stage.lane_alu_gen[1]::reciprocal_rom (work@int_execute_stage.lane_alu_gen[1].rom), file:${SURELOG_DIR}/tests/HierBitSlice/dut.sv, line:214:13, endln:216:39 |vpiParent: @@ -20159,13 +19718,13 @@ design: (work@int_execute_stage) |vpiActual: \_struct_net: (work@int_execute_stage.lane_alu_gen[1].fp_operand), line:113:23, endln:113:33 |vpiActual: - \_part_select: , line:215:41, endln:215:58 + \_part_select: (fp_operand.significand[22:17]), line:215:41, endln:215:58 |vpiParent: - \_ref_obj: (work@int_execute_stage.lane_alu_gen[1].rom.significand.significand) - |vpiParent: - \_hier_path: (fp_operand.significand[22:17]), line:215:30, endln:215:59 - |vpiName:significand - |vpiFullName:work@int_execute_stage.lane_alu_gen[1].rom.significand.significand + \_hier_path: (fp_operand.significand[22:17]), line:215:30, endln:215:59 + |vpiName:significand + |vpiFullName:fp_operand.significand[22:17] + |vpiActual: + \_typespec_member: (significand), line:5:34, endln:5:45 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:215:53, endln:215:55 @@ -20277,10 +19836,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (pipeline_sel), line:279:27, endln:279:39 + \_ref_obj: (work@int_execute_stage.pipeline_sel), line:279:27, endln:279:39 |vpiParent: \_hier_path: (of_instruction.pipeline_sel), line:279:12, endln:279:39 |vpiName:pipeline_sel + |vpiFullName:work@int_execute_stage.pipeline_sel |vpiActual: \_typespec_member: (pipeline_sel), line:39:20, endln:39:32 |vpiOperand: @@ -20334,10 +19894,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (branch), line:281:27, endln:281:33 + \_ref_obj: (work@int_execute_stage.branch), line:281:27, endln:281:33 |vpiParent: \_hier_path: (of_instruction.branch), line:281:12, endln:281:33 |vpiName:branch + |vpiFullName:work@int_execute_stage.branch |vpiActual: \_typespec_member: (branch), line:36:11, endln:36:17 |vpiOperand: @@ -20358,10 +19919,11 @@ design: (work@int_execute_stage) |vpiActual: \_struct_var: (work@int_execute_stage.of_instruction), line:62:39, endln:62:53 |vpiActual: - \_ref_obj: (branch_type), line:282:27, endln:282:38 + \_ref_obj: (work@int_execute_stage.branch_type), line:282:27, endln:282:38 |vpiParent: \_hier_path: (of_instruction.branch_type), line:282:12, endln:282:38 |vpiName:branch_type + |vpiFullName:work@int_execute_stage.branch_type |vpiActual: \_typespec_member: (branch_type), line:37:19, endln:37:30 |vpiOperand: @@ -20405,25 +19967,19 @@ design: (work@int_execute_stage) |vpiOperand: \_bit_select: (work@int_execute_stage.cr_supervisor_en), line:283:43, endln:283:74 |vpiParent: - \_ref_obj: (work@int_execute_stage.cr_supervisor_en) - |vpiParent: - \_operation: , line:283:42, endln:283:74 - |vpiName:cr_supervisor_en - |vpiFullName:work@int_execute_stage.cr_supervisor_en - |vpiActual: - \_array_net: (work@int_execute_stage.cr_supervisor_en), line:83:39, endln:83:55 + \_operation: , line:283:42, endln:283:74 |vpiName:cr_supervisor_en |vpiFullName:work@int_execute_stage.cr_supervisor_en + |vpiActual: + \_array_net: (work@int_execute_stage.cr_supervisor_en), line:83:39, endln:83:55 |vpiIndex: - \_ref_obj: (work@int_execute_stage.cr_supervisor_en.of_thread_idx), line:283:60, endln:283:73 + \_ref_obj: (work@int_execute_stage.of_thread_idx), line:283:60, endln:283:73 |vpiParent: \_bit_select: (work@int_execute_stage.cr_supervisor_en), line:283:43, endln:283:74 |vpiName:of_thread_idx - |vpiFullName:work@int_execute_stage.cr_supervisor_en.of_thread_idx + |vpiFullName:work@int_execute_stage.of_thread_idx |vpiActual: \_logic_var: (work@int_execute_stage.of_thread_idx), line:63:39, endln:63:52 - |vpiActual: - \_array_net: (work@int_execute_stage.cr_supervisor_en), line:83:39, endln:83:55 |vpiLhs: \_ref_obj: (work@int_execute_stage.privileged_op_fault), line:283:12, endln:283:31 |vpiParent: diff --git a/tests/HierMultiSelect/HierMultiSelect.log b/tests/HierMultiSelect/HierMultiSelect.log index 9fadd1a76b..30175ca001 100644 --- a/tests/HierMultiSelect/HierMultiSelect.log +++ b/tests/HierMultiSelect/HierMultiSelect.log @@ -246,7 +246,7 @@ logic_var 1 method_func_call 1 module_inst 3 operation 6 -ref_obj 19 +ref_obj 12 var_select 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -266,7 +266,7 @@ logic_var 1 method_func_call 1 module_inst 3 operation 11 -ref_obj 33 +ref_obj 22 var_select 2 === UHDM Object Stats End === [ERR:UH0725] ${SURELOG_DIR}/tests/HierMultiSelect/dut.sv:2:10: Unresolved hierarchical reference "dmi_req_i.addr1". @@ -325,10 +325,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.addr2), line:2:28, endln:2:43 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (addr2), line:2:38, endln:2:43 + \_ref_obj: (work@dm_csrs.addr2), line:2:38, endln:2:43 |vpiParent: \_hier_path: (dmi_req_i.addr2), line:2:28, endln:2:43 |vpiName:addr2 + |vpiFullName:work@dm_csrs.addr2 |vpiLhs: \_hier_path: (dmi_req_i.addr1), line:2:10, endln:2:25 |vpiParent: @@ -376,31 +377,27 @@ design: (work@dm_csrs) |vpiName:keymgr_data_i |vpiActual: \_bit_select: (strb) - |vpiParent: - \_ref_obj: (strb) - |vpiName:strb |vpiName:strb |vpiIndex: - \_ref_obj: (strb.i), line:3:54, endln:3:55 + \_ref_obj: (i), line:3:54, endln:3:55 |vpiParent: \_bit_select: (strb) |vpiName:i - |vpiFullName:strb.i |vpiActual: \_logic_net: (i) |vpiLhs: - \_indexed_part_select: , line:3:10, endln:3:29 + \_indexed_part_select: kmac_mask_o (work@dm_csrs.kmac_mask_o), line:3:10, endln:3:29 |vpiParent: - \_ref_obj: kmac_mask_o (work@dm_csrs.kmac_mask_o) - |vpiParent: - \_cont_assign: , line:3:10, endln:3:58 - |vpiName:kmac_mask_o - |vpiFullName:work@dm_csrs.kmac_mask_o - |vpiDefName:kmac_mask_o + \_cont_assign: , line:3:10, endln:3:58 + |vpiName:kmac_mask_o + |vpiFullName:work@dm_csrs.kmac_mask_o + |vpiDefName:kmac_mask_o |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:3:22, endln:3:25 + |vpiParent: + \_indexed_part_select: kmac_mask_o (work@dm_csrs.kmac_mask_o), line:3:10, endln:3:29 |vpiOpType:25 |vpiOperand: \_constant: , line:3:22, endln:3:23 @@ -411,10 +408,11 @@ design: (work@dm_csrs) |UINT:8 |vpiConstType:9 |vpiOperand: - \_ref_obj: (i), line:3:24, endln:3:25 + \_ref_obj: (work@dm_csrs.kmac_mask_o.i), line:3:24, endln:3:25 |vpiParent: \_operation: , line:3:22, endln:3:25 |vpiName:i + |vpiFullName:work@dm_csrs.kmac_mask_o.i |vpiActual: \_logic_net: (i) |vpiWidthExpr: @@ -449,13 +447,18 @@ design: (work@dm_csrs) |UINT:0 |vpiConstType:9 |vpiIndex: - \_indexed_part_select: , line:4:34, endln:4:46 + \_indexed_part_select: key (key.key), line:4:34, endln:4:46 |vpiParent: \_var_select: (key), line:4:27, endln:4:47 + |vpiName:key + |vpiFullName:key.key + |vpiDefName:key |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:4:34, endln:4:40 + |vpiParent: + \_indexed_part_select: key (key.key), line:4:34, endln:4:46 |vpiOpType:25 |vpiOperand: \_constant: , line:4:34, endln:4:35 @@ -505,14 +508,11 @@ design: (work@dm_csrs) \_cont_assign: , line:5:10, endln:5:39 |vpiName:sram_otp_key_o[2 - 2].nonce |vpiActual: - \_bit_select: (sram_otp_key_o), line:5:10, endln:5:24 + \_bit_select: (sram_otp_key_o[2 - 2]), line:5:10, endln:5:24 |vpiParent: - \_ref_obj: (work@dm_csrs.sram_otp_key_o[2 - 2]) - |vpiParent: - \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 - |vpiName:sram_otp_key_o[2 - 2] - |vpiFullName:work@dm_csrs.sram_otp_key_o[2 - 2] + \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 |vpiName:sram_otp_key_o + |vpiFullName:sram_otp_key_o[2 - 2] |vpiIndex: \_operation: , line:5:25, endln:5:28 |vpiOpType:11 @@ -533,10 +533,11 @@ design: (work@dm_csrs) |UINT:2 |vpiConstType:9 |vpiActual: - \_ref_obj: (nonce) + \_ref_obj: (sram_otp_key_o[2 - 2].nonce) |vpiParent: \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 |vpiName:nonce + |vpiFullName:sram_otp_key_o[2 - 2].nonce |uhdmtopModules: \_module_inst: work@dm_csrs (work@dm_csrs), file:${SURELOG_DIR}/tests/HierMultiSelect/dut.sv, line:1:1, endln:8:10 |vpiName:work@dm_csrs @@ -553,13 +554,11 @@ design: (work@dm_csrs) \_hier_path: (a[0].source[6-:2]), line:6:13, endln:6:32 |vpiName:a[0].source[6-:2] |vpiActual: - \_bit_select: (a), line:6:13, endln:6:14 + \_bit_select: (a[0]), line:6:13, endln:6:14 |vpiParent: - \_ref_obj: (a[0]) - |vpiParent: - \_hier_path: (a[0].source[6-:2]), line:6:13, endln:6:32 - |vpiName:a[0] + \_hier_path: (a[0].source[6-:2]), line:6:13, endln:6:32 |vpiName:a + |vpiFullName:a[0] |vpiIndex: \_constant: , line:6:15, endln:6:16 |vpiDecompile:0 @@ -567,10 +566,9 @@ design: (work@dm_csrs) |UINT:0 |vpiConstType:9 |vpiActual: - \_indexed_part_select: , line:6:18, endln:6:31 - |vpiParent: - \_ref_obj: (source) - |vpiName:source + \_indexed_part_select: (a[0].source[6-:2]), line:6:18, endln:6:31 + |vpiName:source + |vpiFullName:a[0].source[6-:2] |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -628,10 +626,11 @@ design: (work@dm_csrs) \_hier_path: (dmi_req_i.addr2), line:2:28, endln:2:43 |vpiName:dmi_req_i |vpiActual: - \_ref_obj: (addr2), line:2:38, endln:2:43 + \_ref_obj: (work@dm_csrs.addr2), line:2:38, endln:2:43 |vpiParent: \_hier_path: (dmi_req_i.addr2), line:2:28, endln:2:43 |vpiName:addr2 + |vpiFullName:work@dm_csrs.addr2 |vpiLhs: \_hier_path: (dmi_req_i.addr1), line:2:10, endln:2:25 |vpiParent: @@ -674,38 +673,32 @@ design: (work@dm_csrs) \_hier_path: (keymgr_data_i.strb[i]), line:3:35, endln:3:56 |vpiName:keymgr_data_i |vpiActual: - \_bit_select: (work@dm_csrs.strb) + \_bit_select: (work@dm_csrs.keymgr_data_i.strb[i].strb) |vpiParent: - \_ref_obj: (work@dm_csrs.strb) - |vpiParent: - \_hier_path: (keymgr_data_i.strb[i]), line:3:35, endln:3:56 - |vpiName:strb - |vpiFullName:work@dm_csrs.strb + \_hier_path: (keymgr_data_i.strb[i]), line:3:35, endln:3:56 |vpiName:strb - |vpiFullName:work@dm_csrs.strb + |vpiFullName:work@dm_csrs.keymgr_data_i.strb[i].strb |vpiIndex: - \_ref_obj: (work@dm_csrs.strb.i), line:3:54, endln:3:55 + \_ref_obj: (work@dm_csrs.keymgr_data_i.strb[i].i), line:3:54, endln:3:55 |vpiParent: - \_bit_select: (work@dm_csrs.strb) + \_bit_select: (work@dm_csrs.keymgr_data_i.strb[i].strb) |vpiName:i - |vpiFullName:work@dm_csrs.strb.i + |vpiFullName:work@dm_csrs.keymgr_data_i.strb[i].i |vpiActual: \_logic_net: (i) |vpiLhs: - \_indexed_part_select: , line:3:10, endln:3:29 + \_indexed_part_select: kmac_mask_o (work@dm_csrs.kmac_mask_o), line:3:10, endln:3:29 |vpiParent: - \_ref_obj: kmac_mask_o (work@dm_csrs.kmac_mask_o) - |vpiParent: - \_cont_assign: , line:3:10, endln:3:58 - |vpiName:kmac_mask_o - |vpiFullName:work@dm_csrs.kmac_mask_o - |vpiDefName:kmac_mask_o + \_cont_assign: , line:3:10, endln:3:58 + |vpiName:kmac_mask_o + |vpiFullName:work@dm_csrs.kmac_mask_o + |vpiDefName:kmac_mask_o |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:3:22, endln:3:25 |vpiParent: - \_indexed_part_select: , line:3:10, endln:3:29 + \_indexed_part_select: kmac_mask_o (work@dm_csrs.kmac_mask_o), line:3:10, endln:3:29 |vpiOpType:25 |vpiOperand: \_constant: , line:3:22, endln:3:23 @@ -742,19 +735,18 @@ design: (work@dm_csrs) |vpiIndex: \_constant: , line:4:31, endln:4:32 |vpiIndex: - \_indexed_part_select: , line:4:34, endln:4:46 + \_indexed_part_select: key (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key), line:4:34, endln:4:46 |vpiParent: - \_ref_obj: (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key) - |vpiParent: - \_var_select: (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key), line:4:27, endln:4:47 - |vpiName:key - |vpiFullName:work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key + \_var_select: (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key), line:4:27, endln:4:47 + |vpiName:key + |vpiFullName:work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key + |vpiDefName:key |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:4:34, endln:4:40 |vpiParent: - \_indexed_part_select: , line:4:34, endln:4:46 + \_indexed_part_select: key (work@dm_csrs.keymgr_key_i.key[0][1 * 32+:32].key.key), line:4:34, endln:4:46 |vpiOpType:25 |vpiOperand: \_constant: , line:4:34, endln:4:35 @@ -782,18 +774,15 @@ design: (work@dm_csrs) \_cont_assign: , line:5:10, endln:5:39 |vpiName:sram_otp_key_o[2 - 2].nonce |vpiActual: - \_bit_select: (sram_otp_key_o), line:5:10, endln:5:24 + \_bit_select: (sram_otp_key_o[2 - 2]), line:5:10, endln:5:24 |vpiParent: - \_ref_obj: (work@dm_csrs.sram_otp_key_o[2 - 2]) - |vpiParent: - \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 - |vpiName:sram_otp_key_o[2 - 2] - |vpiFullName:work@dm_csrs.sram_otp_key_o[2 - 2] + \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 |vpiName:sram_otp_key_o + |vpiFullName:sram_otp_key_o[2 - 2] |vpiIndex: \_operation: , line:5:25, endln:5:28 |vpiParent: - \_bit_select: (sram_otp_key_o), line:5:10, endln:5:24 + \_bit_select: (sram_otp_key_o[2 - 2]), line:5:10, endln:5:24 |vpiOpType:11 |vpiOperand: \_constant: , line:5:25, endln:5:26 @@ -812,10 +801,11 @@ design: (work@dm_csrs) |UINT:2 |vpiConstType:9 |vpiActual: - \_ref_obj: (nonce) + \_ref_obj: (sram_otp_key_o[2 - 2].nonce) |vpiParent: \_hier_path: (sram_otp_key_o[2 - 2].nonce), line:5:10, endln:5:24 |vpiName:nonce + |vpiFullName:sram_otp_key_o[2 - 2].nonce =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/HierPathBeginBlock/HierPathBeginBlock.log b/tests/HierPathBeginBlock/HierPathBeginBlock.log index bd84d8667d..6fa8d6c4b4 100644 --- a/tests/HierPathBeginBlock/HierPathBeginBlock.log +++ b/tests/HierPathBeginBlock/HierPathBeginBlock.log @@ -556,8 +556,6 @@ design: (work@matching_end_labels_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:17, endln:8:18 - |vpiParent: - \_assignment: , line:8:13, endln:8:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -565,7 +563,7 @@ design: (work@matching_end_labels_top) |vpiLhs: \_ref_obj: (work@matching_end_labels_top.blk1.x), line:8:13, endln:8:14 |vpiParent: - \_named_begin: (work@matching_end_labels_top.blk1), line:6:9, endln:9:12 + \_assignment: , line:8:13, endln:8:18 |vpiName:x |vpiFullName:work@matching_end_labels_top.blk1.x |vpiActual: @@ -579,7 +577,7 @@ design: (work@matching_end_labels_top) |vpiRhs: \_hier_path: (blk1.x), line:10:16, endln:10:22 |vpiParent: - \_begin: (work@matching_end_labels_top), line:5:13, endln:18:8 + \_assignment: , line:10:9, endln:10:22 |vpiName:blk1.x |vpiActual: \_ref_obj: (blk1), line:10:16, endln:10:20 @@ -589,14 +587,15 @@ design: (work@matching_end_labels_top) |vpiActual: \_named_begin: (work@matching_end_labels_top.blk1), line:6:9, endln:9:12 |vpiActual: - \_ref_obj: (x), line:10:21, endln:10:22 + \_ref_obj: (work@matching_end_labels_top.x), line:10:21, endln:10:22 |vpiParent: \_hier_path: (blk1.x), line:10:16, endln:10:22 |vpiName:x + |vpiFullName:work@matching_end_labels_top.x |vpiLhs: \_ref_obj: (work@matching_end_labels_top.out1), line:10:9, endln:10:13 |vpiParent: - \_begin: (work@matching_end_labels_top), line:5:13, endln:18:8 + \_assignment: , line:10:9, endln:10:22 |vpiName:out1 |vpiFullName:work@matching_end_labels_top.out1 |vpiActual: @@ -623,8 +622,6 @@ design: (work@matching_end_labels_top) |vpiBlocking:1 |vpiRhs: \_constant: , line:14:17, endln:14:18 - |vpiParent: - \_assignment: , line:14:13, endln:14:18 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -632,7 +629,7 @@ design: (work@matching_end_labels_top) |vpiLhs: \_ref_obj: (work@matching_end_labels_top.blk2.x), line:14:13, endln:14:14 |vpiParent: - \_named_begin: (work@matching_end_labels_top.blk2), line:12:9, endln:15:19 + \_assignment: , line:14:13, endln:14:18 |vpiName:x |vpiFullName:work@matching_end_labels_top.blk2.x |vpiActual: @@ -646,7 +643,7 @@ design: (work@matching_end_labels_top) |vpiRhs: \_hier_path: (blk2.x), line:16:16, endln:16:22 |vpiParent: - \_begin: (work@matching_end_labels_top), line:5:13, endln:18:8 + \_assignment: , line:16:9, endln:16:22 |vpiName:blk2.x |vpiActual: \_ref_obj: (blk2), line:16:16, endln:16:20 @@ -656,14 +653,15 @@ design: (work@matching_end_labels_top) |vpiActual: \_named_begin: (work@matching_end_labels_top.blk2), line:12:9, endln:15:19 |vpiActual: - \_ref_obj: (x), line:16:21, endln:16:22 + \_ref_obj: (work@matching_end_labels_top.x), line:16:21, endln:16:22 |vpiParent: \_hier_path: (blk2.x), line:16:16, endln:16:22 |vpiName:x + |vpiFullName:work@matching_end_labels_top.x |vpiLhs: \_ref_obj: (work@matching_end_labels_top.out2), line:16:9, endln:16:13 |vpiParent: - \_begin: (work@matching_end_labels_top), line:5:13, endln:18:8 + \_assignment: , line:16:9, endln:16:22 |vpiName:out2 |vpiFullName:work@matching_end_labels_top.out2 |vpiActual: @@ -1008,10 +1006,11 @@ design: (work@matching_end_labels_top) |vpiActual: \_named_begin: (work@matching_end_labels_top.blk1), line:6:9, endln:9:12 |vpiActual: - \_ref_obj: (x), line:10:21, endln:10:22 + \_ref_obj: (work@matching_end_labels_top.x), line:10:21, endln:10:22 |vpiParent: \_hier_path: (blk1.x), line:10:16, endln:10:22 |vpiName:x + |vpiFullName:work@matching_end_labels_top.x |vpiActual: \_logic_var: (work@matching_end_labels_top.blk1.x), line:7:17, endln:7:18 |vpiLhs: @@ -1071,10 +1070,11 @@ design: (work@matching_end_labels_top) |vpiActual: \_named_begin: (work@matching_end_labels_top.blk2), line:12:9, endln:15:19 |vpiActual: - \_ref_obj: (x), line:16:21, endln:16:22 + \_ref_obj: (work@matching_end_labels_top.x), line:16:21, endln:16:22 |vpiParent: \_hier_path: (blk2.x), line:16:16, endln:16:22 |vpiName:x + |vpiFullName:work@matching_end_labels_top.x |vpiActual: \_logic_var: (work@matching_end_labels_top.blk2.x), line:13:17, endln:13:18 |vpiLhs: @@ -1113,10 +1113,11 @@ design: (work@matching_end_labels_top) |vpiActual: \_gen_scope: (work@matching_end_labels_top.genblk2.blk3) |vpiActual: - \_ref_obj: (x), line:25:28, endln:25:29 + \_ref_obj: (work@matching_end_labels_top.genblk2.x), line:25:28, endln:25:29 |vpiParent: \_hier_path: (blk3.x), line:25:23, endln:25:29 |vpiName:x + |vpiFullName:work@matching_end_labels_top.genblk2.x |vpiActual: \_logic_net: (work@matching_end_labels_top.genblk2.blk3.x), line:22:17, endln:22:18 |vpiLhs: @@ -1144,10 +1145,11 @@ design: (work@matching_end_labels_top) |vpiActual: \_gen_scope: (work@matching_end_labels_top.genblk2.blk4) |vpiActual: - \_ref_obj: (x), line:30:28, endln:30:29 + \_ref_obj: (work@matching_end_labels_top.genblk2.x), line:30:28, endln:30:29 |vpiParent: \_hier_path: (blk4.x), line:30:23, endln:30:29 |vpiName:x + |vpiFullName:work@matching_end_labels_top.genblk2.x |vpiActual: \_logic_net: (work@matching_end_labels_top.genblk2.blk4.x), line:27:17, endln:27:18 |vpiLhs: diff --git a/tests/HierPathBind/HierPathBind.log b/tests/HierPathBind/HierPathBind.log index 673c6132f8..08bf27bc15 100644 --- a/tests/HierPathBind/HierPathBind.log +++ b/tests/HierPathBind/HierPathBind.log @@ -300,10 +300,11 @@ design: (work@top) \_hier_path: (alert_rx_i.ping_p), line:14:15, endln:14:32 |vpiName:alert_rx_i |vpiActual: - \_ref_obj: (ping_p), line:14:26, endln:14:32 + \_ref_obj: (work@top.ping_p), line:14:26, endln:14:32 |vpiParent: \_hier_path: (alert_rx_i.ping_p), line:14:15, endln:14:32 |vpiName:ping_p + |vpiFullName:work@top.ping_p |vpiLhs: \_ref_obj: (work@top.o), line:14:11, endln:14:12 |vpiParent: @@ -422,10 +423,11 @@ design: (work@top) |vpiActual: \_struct_net: (work@top.alert_rx_i), line:10:16, endln:10:26 |vpiActual: - \_ref_obj: (ping_p), line:12:24, endln:12:30 + \_ref_obj: (work@top.d.o.ping_p), line:12:24, endln:12:30 |vpiParent: \_hier_path: (alert_rx_i.ping_p), line:12:13, endln:12:30 |vpiName:ping_p + |vpiFullName:work@top.d.o.ping_p |vpiActual: \_typespec_member: (ping_p), line:7:16, endln:7:22 |vpiExpr: @@ -473,10 +475,11 @@ design: (work@top) |vpiActual: \_struct_net: (work@top.alert_rx_i), line:10:16, endln:10:26 |vpiActual: - \_ref_obj: (ping_p), line:14:26, endln:14:32 + \_ref_obj: (work@top.ping_p), line:14:26, endln:14:32 |vpiParent: \_hier_path: (alert_rx_i.ping_p), line:14:15, endln:14:32 |vpiName:ping_p + |vpiFullName:work@top.ping_p |vpiActual: \_typespec_member: (ping_p), line:7:16, endln:7:22 |vpiLhs: diff --git a/tests/HierPathLhs/HierPathLhs.log b/tests/HierPathLhs/HierPathLhs.log index 4445e33a13..d257a3514c 100644 --- a/tests/HierPathLhs/HierPathLhs.log +++ b/tests/HierPathLhs/HierPathLhs.log @@ -198,7 +198,7 @@ packed_array_typespec 1 packed_array_var 1 parameter 1 range 4 -ref_obj 19 +ref_obj 12 ref_var 1 struct_typespec 1 struct_var 1 @@ -226,7 +226,7 @@ packed_array_typespec 1 packed_array_var 1 parameter 1 range 4 -ref_obj 26 +ref_obj 15 ref_var 1 struct_typespec 1 struct_var 1 @@ -328,21 +328,20 @@ design: (work@alert_handler_reg_wrap) \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:hw2reg |vpiActual: - \_bit_select: (alert_cause), line:3:19, endln:3:30 + \_bit_select: (alert_cause[k]), line:3:19, endln:3:30 |vpiParent: - \_ref_obj: (hw2reg.alert_cause[k]) - |vpiParent: - \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 - |vpiName:hw2reg.alert_cause[k] + \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:alert_cause + |vpiFullName:alert_cause[k] |vpiIndex: \_ref_obj: (k), line:3:31, endln:3:32 |vpiName:k |vpiActual: - \_ref_obj: (d) + \_ref_obj: (alert_cause[k].d) |vpiParent: \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:d + |vpiFullName:alert_cause[k].d |uhdmallModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/HierPathLhs/dut.sv, line:8:1, endln:16:10 |vpiParent: @@ -396,14 +395,11 @@ design: (work@alert_handler_reg_wrap) \_cont_assign: , line:15:10, endln:15:26 |vpiName:a[0][0].x[0] |vpiActual: - \_bit_select: (a), line:15:10, endln:15:11 + \_bit_select: (a[0]), line:15:10, endln:15:11 |vpiParent: - \_ref_obj: (work@top.a[0]) - |vpiParent: - \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 - |vpiName:a[0] - |vpiFullName:work@top.a[0] + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 |vpiName:a + |vpiFullName:a[0] |vpiIndex: \_constant: , line:15:12, endln:15:13 |vpiDecompile:0 @@ -411,8 +407,10 @@ design: (work@alert_handler_reg_wrap) |UINT:0 |vpiConstType:9 |vpiActual: - \_bit_select: ([0]), line:15:12, endln:15:13 - |vpiName:[0] + \_bit_select: (a[0][0]), line:15:12, endln:15:13 + |vpiParent: + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 + |vpiFullName:a[0][0] |vpiIndex: \_constant: , line:15:15, endln:15:16 |vpiDecompile:0 @@ -420,17 +418,15 @@ design: (work@alert_handler_reg_wrap) |UINT:0 |vpiConstType:9 |vpiActual: - \_bit_select: (x) + \_bit_select: (a[0][0].x[0]) |vpiParent: - \_ref_obj: (x) - |vpiParent: - \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 - |vpiName:x + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 |vpiName:x + |vpiFullName:a[0][0].x[0] |vpiIndex: \_constant: , line:15:20, endln:15:21 |vpiParent: - \_bit_select: (x) + \_bit_select: (a[0][0].x[0]) |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -489,27 +485,25 @@ design: (work@alert_handler_reg_wrap) \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:hw2reg |vpiActual: - \_bit_select: (alert_cause), line:3:19, endln:3:30 + \_bit_select: (alert_cause[k]), line:3:19, endln:3:30 |vpiParent: - \_ref_obj: (work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k]) - |vpiParent: - \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 - |vpiName:hw2reg.alert_cause[k] - |vpiFullName:work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k] + \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:alert_cause + |vpiFullName:alert_cause[k] |vpiIndex: - \_ref_obj: (work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k].k), line:3:31, endln:3:32 + \_ref_obj: (work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k].d.k), line:3:31, endln:3:32 |vpiParent: - \_bit_select: (alert_cause), line:3:19, endln:3:30 + \_bit_select: (alert_cause[k]), line:3:19, endln:3:30 |vpiName:k - |vpiFullName:work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k].k + |vpiFullName:work@alert_handler_reg_wrap.gen_alert_cause[0].hw2reg.alert_cause[k].d.k |vpiActual: \_parameter: (work@alert_handler_reg_wrap.gen_alert_cause[0].k), line:2:0 |vpiActual: - \_ref_obj: (d) + \_ref_obj: (alert_cause[k].d) |vpiParent: \_hier_path: (hw2reg.alert_cause[k].d), line:3:12, endln:3:35 |vpiName:d + |vpiFullName:alert_cause[k].d |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/HierPathLhs/dut.sv, line:8:1, endln:16:10 |vpiName:work@top @@ -580,61 +574,50 @@ design: (work@alert_handler_reg_wrap) \_cont_assign: , line:15:10, endln:15:26 |vpiName:a[0][0].x[0] |vpiActual: - \_bit_select: (a), line:15:10, endln:15:11 + \_bit_select: (a[0]), line:15:10, endln:15:11 |vpiParent: - \_ref_obj: (work@top.a[0]) - |vpiParent: - \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 - |vpiName:a[0] - |vpiFullName:work@top.a[0] + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 |vpiName:a + |vpiFullName:a[0] + |vpiActual: + \_packed_array_var: (work@top.a), line:13:23, endln:13:24 |vpiIndex: \_constant: , line:15:12, endln:15:13 |vpiParent: - \_bit_select: (a), line:15:10, endln:15:11 + \_bit_select: (a[0]), line:15:10, endln:15:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_packed_array_var: (work@top.a), line:13:23, endln:13:24 |vpiActual: - \_bit_select: ([0]), line:15:12, endln:15:13 + \_bit_select: (a[0][0]), line:15:12, endln:15:13 |vpiParent: - \_ref_obj: (work@top.a[0][0].x[0]) - |vpiParent: - \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 - |vpiName:a[0][0].x[0] - |vpiFullName:work@top.a[0][0].x[0] - |vpiName:[0] + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 + |vpiFullName:a[0][0] |vpiIndex: \_constant: , line:15:15, endln:15:16 |vpiParent: - \_bit_select: ([0]), line:15:12, endln:15:13 + \_bit_select: (a[0][0]), line:15:12, endln:15:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 |vpiActual: - \_bit_select: (x) + \_bit_select: (a[0][0].x[0]) |vpiParent: - \_ref_obj: (x) - |vpiParent: - \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 - |vpiName:x - |vpiActual: - \_typespec_member: (x), line:10:9, endln:10:10 + \_hier_path: (a[0][0].x[0]), line:15:10, endln:15:11 |vpiName:x + |vpiFullName:a[0][0].x[0] + |vpiActual: + \_typespec_member: (x), line:10:9, endln:10:10 |vpiIndex: \_constant: , line:15:20, endln:15:21 |vpiParent: - \_bit_select: (x) + \_bit_select: (a[0][0].x[0]) |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_typespec_member: (x), line:10:9, endln:10:10 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/HierPathOverride/HierPathOverride.log b/tests/HierPathOverride/HierPathOverride.log index 8c4e9eedc0..a0f2d941de 100644 --- a/tests/HierPathOverride/HierPathOverride.log +++ b/tests/HierPathOverride/HierPathOverride.log @@ -405,7 +405,7 @@ param_assign 24 parameter 31 range 28 ref_module 3 -ref_obj 18 +ref_obj 17 string_typespec 12 struct_typespec 13 tagged_pattern 12 @@ -436,7 +436,7 @@ param_assign 26 parameter 31 range 28 ref_module 3 -ref_obj 21 +ref_obj 20 string_typespec 12 struct_typespec 13 tagged_pattern 12 diff --git a/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log b/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log index d22f5adab3..01b1eecd5b 100644 --- a/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log +++ b/tests/HierPathPackedArrayNet/HierPathPackedArrayNet.log @@ -250,7 +250,7 @@ param_assign 10 parameter 10 port 2 range 6 -ref_obj 11 +ref_obj 10 struct_net 1 struct_typespec 2 typespec_member 2 @@ -281,7 +281,7 @@ param_assign 10 parameter 10 port 3 range 6 -ref_obj 19 +ref_obj 17 struct_net 1 struct_typespec 2 typespec_member 2 @@ -383,7 +383,7 @@ design: (work@rvfi_tracer) |vpiOperand: \_ref_obj: (rvfi_pkg::rvfi_pkg::rvfi_instr_t::NRET), line:6:10, endln:6:14 |vpiParent: - \_struct_typespec: (rvfi_pkg::rvfi_instr_t), line:5:9, endln:5:15 + \_operation: , line:6:10, endln:6:16 |vpiName:NRET |vpiFullName:rvfi_pkg::rvfi_pkg::rvfi_instr_t::NRET |vpiActual: @@ -690,14 +690,11 @@ design: (work@rvfi_tracer) \_begin: (work@rvfi_tracer), line:17:45, endln:20:6 |vpiName:rvfi_i[i].trap |vpiActual: - \_bit_select: (rvfi_i), line:18:9, endln:18:15 + \_bit_select: (rvfi_i[i]), line:18:9, endln:18:15 |vpiParent: - \_ref_obj: (work@rvfi_tracer.rvfi_i[i]) - |vpiParent: - \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 - |vpiName:rvfi_i[i] - |vpiFullName:work@rvfi_tracer.rvfi_i[i] + \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 |vpiName:rvfi_i + |vpiFullName:rvfi_i[i] |vpiIndex: \_ref_obj: (work@rvfi_tracer.i), line:18:16, endln:18:17 |vpiParent: @@ -707,10 +704,11 @@ design: (work@rvfi_tracer) |vpiActual: \_int_var: (work@rvfi_tracer.i), line:17:12, endln:17:13 |vpiActual: - \_ref_obj: (trap), line:18:19, endln:18:23 + \_ref_obj: (work@rvfi_tracer.trap), line:18:19, endln:18:23 |vpiParent: \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 |vpiName:trap + |vpiFullName:work@rvfi_tracer.trap |vpiStmt: \_begin: (work@rvfi_tracer), line:18:25, endln:19:8 |vpiParent: @@ -919,28 +917,25 @@ design: (work@rvfi_tracer) |vpiActual: \_bit_select: (work@rvfi_tracer.rvfi_i), line:18:9, endln:18:15 |vpiParent: - \_ref_obj: (work@rvfi_tracer.rvfi_i[i]) - |vpiParent: - \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 - |vpiName:rvfi_i[i] - |vpiFullName:work@rvfi_tracer.rvfi_i[i] + \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 |vpiName:rvfi_i |vpiFullName:work@rvfi_tracer.rvfi_i + |vpiActual: + \_packed_array_net: (work@rvfi_tracer.rvfi_i), line:14:63, endln:14:69 |vpiIndex: - \_ref_obj: (work@rvfi_tracer.rvfi_i[i].i), line:18:16, endln:18:17 + \_ref_obj: (work@rvfi_tracer.rvfi_i[i].trap.i), line:18:16, endln:18:17 |vpiParent: \_bit_select: (work@rvfi_tracer.rvfi_i), line:18:9, endln:18:15 |vpiName:i - |vpiFullName:work@rvfi_tracer.rvfi_i[i].i + |vpiFullName:work@rvfi_tracer.rvfi_i[i].trap.i |vpiActual: \_int_var: (work@rvfi_tracer.i), line:17:12, endln:17:13 - |vpiActual: - \_packed_array_net: (work@rvfi_tracer.rvfi_i), line:14:63, endln:14:69 |vpiActual: - \_ref_obj: (trap), line:18:19, endln:18:23 + \_ref_obj: (work@rvfi_tracer.trap), line:18:19, endln:18:23 |vpiParent: \_hier_path: (rvfi_i[i].trap), line:18:9, endln:18:23 |vpiName:trap + |vpiFullName:work@rvfi_tracer.trap |vpiActual: \_typespec_member: (trap), line:6:36, endln:6:40 |vpiStmt: diff --git a/tests/HierPathPackedVar/HierPathPackedVar.log b/tests/HierPathPackedVar/HierPathPackedVar.log index 4b6fd45f13..612a5074d6 100644 --- a/tests/HierPathPackedVar/HierPathPackedVar.log +++ b/tests/HierPathPackedVar/HierPathPackedVar.log @@ -308,7 +308,7 @@ param_assign 2 parameter 2 port 2 range 14 -ref_obj 10 +ref_obj 9 struct_typespec 2 struct_var 1 type_parameter 1 @@ -337,7 +337,7 @@ param_assign 2 parameter 2 port 3 range 14 -ref_obj 16 +ref_obj 14 struct_typespec 2 struct_var 1 type_parameter 1 @@ -962,17 +962,14 @@ design: (work@axi_adapter_arbiter) |vpiOperand: \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiParent: - \_begin: (work@axi_adapter_arbiter), line:21:17, endln:25:8 + \_operation: , line:22:12, endln:22:32 |vpiName:req_i[i].req |vpiActual: - \_bit_select: (req_i), line:22:12, endln:22:17 + \_bit_select: (req_i[i]), line:22:12, endln:22:17 |vpiParent: - \_ref_obj: (work@axi_adapter_arbiter.req_i[i]) - |vpiParent: - \_hier_path: (req_i[i].req), line:22:12, endln:22:24 - |vpiName:req_i[i] - |vpiFullName:work@axi_adapter_arbiter.req_i[i] + \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiName:req_i + |vpiFullName:req_i[i] |vpiIndex: \_ref_obj: (work@axi_adapter_arbiter.i), line:22:18, endln:22:19 |vpiParent: @@ -982,10 +979,11 @@ design: (work@axi_adapter_arbiter) |vpiActual: \_logic_net: (i) |vpiActual: - \_ref_obj: (req), line:22:21, endln:22:24 + \_ref_obj: (work@axi_adapter_arbiter.req), line:22:21, endln:22:24 |vpiParent: \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiName:req + |vpiFullName:work@axi_adapter_arbiter.req |vpiOperand: \_constant: , line:22:28, endln:22:32 |vpiParent: @@ -1008,7 +1006,7 @@ design: (work@axi_adapter_arbiter) |vpiRhs: \_ref_obj: (work@axi_adapter_arbiter.SERVING), line:23:21, endln:23:28 |vpiParent: - \_begin: (work@axi_adapter_arbiter), line:22:34, endln:24:10 + \_assignment: , line:23:11, endln:23:28 |vpiName:SERVING |vpiFullName:work@axi_adapter_arbiter.SERVING |vpiActual: @@ -1016,7 +1014,7 @@ design: (work@axi_adapter_arbiter) |vpiLhs: \_ref_obj: (work@axi_adapter_arbiter.state_d), line:23:11, endln:23:18 |vpiParent: - \_begin: (work@axi_adapter_arbiter), line:22:34, endln:24:10 + \_assignment: , line:23:11, endln:23:28 |vpiName:state_d |vpiFullName:work@axi_adapter_arbiter.state_d |vpiActual: @@ -1145,29 +1143,27 @@ design: (work@axi_adapter_arbiter) \_operation: , line:22:12, endln:22:32 |vpiName:req_i[i].req |vpiActual: - \_bit_select: (req_i), line:22:12, endln:22:17 + \_bit_select: (req_i[i]), line:22:12, endln:22:17 |vpiParent: - \_ref_obj: (work@axi_adapter_arbiter.req_i[i]) - |vpiParent: - \_hier_path: (req_i[i].req), line:22:12, endln:22:24 - |vpiName:req_i[i] - |vpiFullName:work@axi_adapter_arbiter.req_i[i] + \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiName:req_i + |vpiFullName:req_i[i] + |vpiActual: + \_packed_array_var: (work@axi_adapter_arbiter.req_i), line:19:34, endln:19:39 |vpiIndex: - \_ref_obj: (work@axi_adapter_arbiter.req_i[i].i), line:22:18, endln:22:19 + \_ref_obj: (work@axi_adapter_arbiter.req_i[i].req.i), line:22:18, endln:22:19 |vpiParent: - \_bit_select: (req_i), line:22:12, endln:22:17 + \_bit_select: (req_i[i]), line:22:12, endln:22:17 |vpiName:i - |vpiFullName:work@axi_adapter_arbiter.req_i[i].i + |vpiFullName:work@axi_adapter_arbiter.req_i[i].req.i |vpiActual: \_logic_net: (i) - |vpiActual: - \_packed_array_var: (work@axi_adapter_arbiter.req_i), line:19:34, endln:19:39 |vpiActual: - \_ref_obj: (req), line:22:21, endln:22:24 + \_ref_obj: (work@axi_adapter_arbiter.req), line:22:21, endln:22:24 |vpiParent: \_hier_path: (req_i[i].req), line:22:12, endln:22:24 |vpiName:req + |vpiFullName:work@axi_adapter_arbiter.req |vpiActual: \_typespec_member: (req), line:3:26, endln:3:29 |vpiOperand: diff --git a/tests/HierPathSelect/HierPathSelect.log b/tests/HierPathSelect/HierPathSelect.log index 8bd223a2cd..5d91d6bc56 100644 --- a/tests/HierPathSelect/HierPathSelect.log +++ b/tests/HierPathSelect/HierPathSelect.log @@ -106,7 +106,7 @@ logic_net 1 logic_typespec 1 module_inst 3 range 1 -ref_obj 4 +ref_obj 2 struct_net 1 struct_typespec 1 typespec_member 1 @@ -123,7 +123,7 @@ logic_net 1 logic_typespec 1 module_inst 3 range 1 -ref_obj 6 +ref_obj 3 struct_net 1 struct_typespec 1 typespec_member 1 @@ -217,19 +217,15 @@ design: (work@dut2) \_hier_path: (read_buf.q[1]), line:8:8, endln:8:21 |vpiName:read_buf |vpiActual: - \_bit_select: (work@dut2.read_buf.q[1]), line:8:17, endln:8:18 + \_bit_select: (work@dut2.read_buf.q[1].q), line:8:17, endln:8:18 |vpiParent: - \_ref_obj: (work@dut2.read_buf.q[1]) - |vpiParent: - \_hier_path: (read_buf.q[1]), line:8:8, endln:8:21 - |vpiName:read_buf.q[1] - |vpiFullName:work@dut2.read_buf.q[1] + \_hier_path: (read_buf.q[1]), line:8:8, endln:8:21 |vpiName:q - |vpiFullName:work@dut2.read_buf.q[1] + |vpiFullName:work@dut2.read_buf.q[1].q |vpiIndex: \_constant: , line:8:19, endln:8:20 |vpiParent: - \_bit_select: (work@dut2.read_buf.q[1]), line:8:17, endln:8:18 + \_bit_select: (work@dut2.read_buf.q[1].q), line:8:17, endln:8:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -269,27 +265,21 @@ design: (work@dut2) |vpiActual: \_struct_net: (work@dut2.read_buf), line:6:16, endln:6:24 |vpiActual: - \_bit_select: (work@dut2.read_buf.q[1]), line:8:17, endln:8:18 + \_bit_select: (work@dut2.read_buf.q[1].q), line:8:17, endln:8:18 |vpiParent: - \_ref_obj: (work@dut2.read_buf.q[1]) - |vpiParent: - \_hier_path: (read_buf.q[1]), line:8:8, endln:8:21 - |vpiName:read_buf.q[1] - |vpiFullName:work@dut2.read_buf.q[1] - |vpiActual: - \_typespec_member: (q), line:4:15, endln:4:16 + \_hier_path: (read_buf.q[1]), line:8:8, endln:8:21 |vpiName:q - |vpiFullName:work@dut2.read_buf.q[1] + |vpiFullName:work@dut2.read_buf.q[1].q + |vpiActual: + \_typespec_member: (q), line:4:15, endln:4:16 |vpiIndex: \_constant: , line:8:19, endln:8:20 |vpiParent: - \_bit_select: (read_buf.q[1]), line:8:17, endln:8:18 + \_bit_select: (read_buf.q[1].q), line:8:17, endln:8:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_typespec_member: (q), line:4:15, endln:4:16 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/HighConnPart/HighConnPart.log b/tests/HighConnPart/HighConnPart.log index a65ca11e8f..67be667902 100644 --- a/tests/HighConnPart/HighConnPart.log +++ b/tests/HighConnPart/HighConnPart.log @@ -275,7 +275,7 @@ part_select 6 port 16 range 27 ref_module 1 -ref_obj 31 +ref_obj 25 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -291,7 +291,7 @@ part_select 10 port 24 range 27 ref_module 1 -ref_obj 51 +ref_obj 41 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/HighConnPart/slpp_all/surelog.uhdm ... @@ -404,11 +404,9 @@ design: (work@Device) \_port: (a), line:13:9, endln:13:30 |vpiName:a |vpiHighConn: - \_part_select: , line:13:12, endln:13:29 - |vpiParent: - \_ref_obj: doubleNibble (doubleNibble), line:13:12, endln:13:24 - |vpiName:doubleNibble - |vpiDefName:doubleNibble + \_part_select: doubleNibble (doubleNibble), line:13:12, endln:13:29 + |vpiName:doubleNibble + |vpiDefName:doubleNibble |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:25, endln:13:26 @@ -426,11 +424,9 @@ design: (work@Device) \_port: (b), line:14:9, endln:14:30 |vpiName:b |vpiHighConn: - \_part_select: , line:14:12, endln:14:29 - |vpiParent: - \_ref_obj: doubleNibble (doubleNibble), line:14:12, endln:14:24 - |vpiName:doubleNibble - |vpiDefName:doubleNibble + \_part_select: doubleNibble (doubleNibble), line:14:12, endln:14:29 + |vpiName:doubleNibble + |vpiDefName:doubleNibble |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:14:25, endln:14:26 @@ -846,16 +842,14 @@ design: (work@Device) |vpiName:a |vpiDirection:1 |vpiHighConn: - \_part_select: , line:9:22, endln:9:39 + \_part_select: doubleNibble (work@Device.doubleNibble), line:9:22, endln:9:39 |vpiParent: - \_ref_obj: doubleNibble (work@Device.instance1.a.doubleNibble) - |vpiParent: - \_port: (a), line:22:22, endln:22:23 - |vpiName:doubleNibble - |vpiFullName:work@Device.instance1.a.doubleNibble - |vpiDefName:doubleNibble - |vpiActual: - \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 + \_port: (a), line:22:22, endln:22:23 + |vpiName:doubleNibble + |vpiFullName:work@Device.doubleNibble + |vpiDefName:doubleNibble + |vpiActual: + \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:35, endln:9:36 @@ -908,16 +902,14 @@ design: (work@Device) |vpiName:b |vpiDirection:1 |vpiHighConn: - \_part_select: , line:9:41, endln:9:58 + \_part_select: doubleNibble (work@Device.doubleNibble), line:9:41, endln:9:58 |vpiParent: - \_ref_obj: doubleNibble (work@Device.instance1.b.doubleNibble), line:9:41, endln:9:53 - |vpiParent: - \_port: (b), line:22:25, endln:22:26 - |vpiName:doubleNibble - |vpiFullName:work@Device.instance1.b.doubleNibble - |vpiDefName:doubleNibble - |vpiActual: - \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 + \_port: (b), line:22:25, endln:22:26 + |vpiName:doubleNibble + |vpiFullName:work@Device.doubleNibble + |vpiDefName:doubleNibble + |vpiActual: + \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:54, endln:9:55 @@ -1103,16 +1095,14 @@ design: (work@Device) |vpiName:a |vpiDirection:1 |vpiHighConn: - \_part_select: , line:13:12, endln:13:29 + \_part_select: doubleNibble (work@Device.doubleNibble), line:13:12, endln:13:29 |vpiParent: - \_ref_obj: doubleNibble (work@Device.instance2.a.doubleNibble), line:13:12, endln:13:24 - |vpiParent: - \_port: (a), line:22:22, endln:22:23 - |vpiName:doubleNibble - |vpiFullName:work@Device.instance2.a.doubleNibble - |vpiDefName:doubleNibble - |vpiActual: - \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 + \_port: (a), line:22:22, endln:22:23 + |vpiName:doubleNibble + |vpiFullName:work@Device.doubleNibble + |vpiDefName:doubleNibble + |vpiActual: + \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:25, endln:13:26 @@ -1165,16 +1155,14 @@ design: (work@Device) |vpiName:b |vpiDirection:1 |vpiHighConn: - \_part_select: , line:14:12, endln:14:29 + \_part_select: doubleNibble (work@Device.doubleNibble), line:14:12, endln:14:29 |vpiParent: - \_ref_obj: doubleNibble (work@Device.instance2.b.doubleNibble), line:14:12, endln:14:24 - |vpiParent: - \_port: (b), line:22:25, endln:22:26 - |vpiName:doubleNibble - |vpiFullName:work@Device.instance2.b.doubleNibble - |vpiDefName:doubleNibble - |vpiActual: - \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 + \_port: (b), line:22:25, endln:22:26 + |vpiName:doubleNibble + |vpiFullName:work@Device.doubleNibble + |vpiDefName:doubleNibble + |vpiActual: + \_logic_net: (work@Device.doubleNibble), line:4:22, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:14:25, endln:14:26 @@ -1262,7 +1250,7 @@ design: (work@Device) |vpiName:a |vpiFullName:work@Device.instance2.a |vpiActual: - \_logic_net: (work@Device.instance2.a), line:22:22, endln:22:23 + \_logic_net: (work@Device.instance1.a), line:22:22, endln:22:23 |vpiOperand: \_ref_obj: (work@Device.instance2.b), line:26:25, endln:26:26 |vpiParent: @@ -1270,7 +1258,7 @@ design: (work@Device) |vpiName:b |vpiFullName:work@Device.instance2.b |vpiActual: - \_logic_net: (work@Device.instance2.b), line:22:25, endln:22:26 + \_logic_net: (work@Device.instance1.b), line:22:25, endln:22:26 |vpiLhs: \_ref_obj: (work@Device.instance2.result), line:26:12, endln:26:18 |vpiParent: diff --git a/tests/IOClassStruct/IOClassStruct.log b/tests/IOClassStruct/IOClassStruct.log index dcfbd8a593..aca8b679d0 100644 --- a/tests/IOClassStruct/IOClassStruct.log +++ b/tests/IOClassStruct/IOClassStruct.log @@ -292,8 +292,6 @@ design: (unnamed) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:30, endln:24:31 - |vpiParent: - \_assignment: , line:24:3, endln:24:31 |vpiDecompile:0 |vpiSize:64 |UINT:0 diff --git a/tests/IfElseIf/test1/IfElseIf1.log b/tests/IfElseIf/test1/IfElseIf1.log index 91217f7357..3585de3685 100644 --- a/tests/IfElseIf/test1/IfElseIf1.log +++ b/tests/IfElseIf/test1/IfElseIf1.log @@ -313,7 +313,7 @@ design: (work@axi) |vpiOperand: \_ref_obj: (LOG_MASTER), line:13:25, endln:13:35 |vpiParent: - \_operation: , line:13:21, endln:13:39 + \_operation: , line:13:25, endln:13:39 |vpiName:LOG_MASTER |vpiOperand: \_constant: , line:13:38, endln:13:39 diff --git a/tests/IfElseIf/test2/IfElseIf2.log b/tests/IfElseIf/test2/IfElseIf2.log index a9eaea373d..7bfc3ebd6e 100644 --- a/tests/IfElseIf/test2/IfElseIf2.log +++ b/tests/IfElseIf/test2/IfElseIf2.log @@ -313,7 +313,7 @@ design: (work@axi) |vpiOperand: \_ref_obj: (LOG_MASTER), line:13:25, endln:13:35 |vpiParent: - \_operation: , line:13:21, endln:13:39 + \_operation: , line:13:25, endln:13:39 |vpiName:LOG_MASTER |vpiOperand: \_constant: , line:13:38, endln:13:39 diff --git a/tests/IfElseIf/test3/IfElseIf3.log b/tests/IfElseIf/test3/IfElseIf3.log index d972c04298..e13df8cbd6 100644 --- a/tests/IfElseIf/test3/IfElseIf3.log +++ b/tests/IfElseIf/test3/IfElseIf3.log @@ -317,7 +317,7 @@ design: (work@axi) |vpiOperand: \_ref_obj: (LOG_MASTER), line:13:25, endln:13:35 |vpiParent: - \_operation: , line:13:21, endln:13:39 + \_operation: , line:13:25, endln:13:39 |vpiName:LOG_MASTER |vpiOperand: \_constant: , line:13:38, endln:13:39 diff --git a/tests/IfGenenerate/test1/IfGen1.log b/tests/IfGenenerate/test1/IfGen1.log index ec76406eee..4fec1726e3 100644 --- a/tests/IfGenenerate/test1/IfGen1.log +++ b/tests/IfGenenerate/test1/IfGen1.log @@ -370,7 +370,7 @@ design: (work@lzc) |vpiOperand: \_ref_obj: (NUM_LEVELS), line:10:18, endln:10:28 |vpiParent: - \_operation: , line:10:9, endln:10:30 + \_operation: , line:10:18, endln:10:30 |vpiName:NUM_LEVELS |vpiOperand: \_constant: , line:10:29, endln:10:30 diff --git a/tests/IfGenenerate/test2/IfGen2.log b/tests/IfGenenerate/test2/IfGen2.log index 0dd9262633..5156afc526 100644 --- a/tests/IfGenenerate/test2/IfGen2.log +++ b/tests/IfGenenerate/test2/IfGen2.log @@ -369,7 +369,7 @@ design: (work@lzc) |vpiOperand: \_ref_obj: (NUM_LEVELS), line:10:18, endln:10:28 |vpiParent: - \_operation: , line:10:9, endln:10:30 + \_operation: , line:10:18, endln:10:30 |vpiName:NUM_LEVELS |vpiOperand: \_constant: , line:10:29, endln:10:30 diff --git a/tests/IfGenenerate/test3/IfGen3.log b/tests/IfGenenerate/test3/IfGen3.log index e0970c6be9..c0c82ac76a 100644 --- a/tests/IfGenenerate/test3/IfGen3.log +++ b/tests/IfGenenerate/test3/IfGen3.log @@ -386,7 +386,7 @@ design: (work@lzc) |vpiOperand: \_ref_obj: (NUM_LEVELS), line:12:16, endln:12:26 |vpiParent: - \_operation: , line:12:7, endln:12:28 + \_operation: , line:12:16, endln:12:28 |vpiName:NUM_LEVELS |vpiOperand: \_constant: , line:12:27, endln:12:28 diff --git a/tests/Iff/Iff.log b/tests/Iff/Iff.log index bb809bd210..b77d75466f 100644 --- a/tests/Iff/Iff.log +++ b/tests/Iff/Iff.log @@ -246,7 +246,7 @@ design: (work@block_tb) |vpiOperand: \_ref_obj: (work@block_tb.en), line:6:27, endln:6:29 |vpiParent: - \_operation: + \_operation: , line:6:27, endln:6:34 |vpiName:en |vpiFullName:work@block_tb.en |vpiActual: @@ -267,7 +267,7 @@ design: (work@block_tb) |vpiRhs: \_ref_obj: (work@block_tb.a), line:7:16, endln:7:17 |vpiParent: - \_event_control: , line:6:9, endln:6:35 + \_assignment: , line:7:11, endln:7:17 |vpiName:a |vpiFullName:work@block_tb.a |vpiActual: @@ -275,7 +275,7 @@ design: (work@block_tb) |vpiLhs: \_ref_obj: (work@block_tb.y), line:7:11, endln:7:12 |vpiParent: - \_event_control: , line:6:9, endln:6:35 + \_assignment: , line:7:11, endln:7:17 |vpiName:y |vpiFullName:work@block_tb.y |vpiActual: diff --git a/tests/ImplFuncArg/ImplFuncArg.log b/tests/ImplFuncArg/ImplFuncArg.log index feee247fe5..e72e8fcb0e 100644 --- a/tests/ImplFuncArg/ImplFuncArg.log +++ b/tests/ImplFuncArg/ImplFuncArg.log @@ -892,7 +892,7 @@ design: (work@fsm_2_always_block) |vpiRhs: \_ref_obj: (work@fsm_2_always_block.stateAsmt.next_state), line:5:19, endln:5:29 |vpiParent: - \_function: (work@fsm_2_always_block.stateAsmt), line:4:1, endln:6:12 + \_assignment: , line:5:6, endln:5:29 |vpiName:next_state |vpiFullName:work@fsm_2_always_block.stateAsmt.next_state |vpiActual: @@ -900,7 +900,7 @@ design: (work@fsm_2_always_block) |vpiLhs: \_ref_obj: (work@fsm_2_always_block.stateAsmt.curr_state), line:5:6, endln:5:16 |vpiParent: - \_function: (work@fsm_2_always_block.stateAsmt), line:4:1, endln:6:12 + \_assignment: , line:5:6, endln:5:29 |vpiName:curr_state |vpiFullName:work@fsm_2_always_block.stateAsmt.curr_state |vpiActual: diff --git a/tests/IncompFunc/IncompFunc.log b/tests/IncompFunc/IncompFunc.log index ac01aca659..30a00778e5 100644 --- a/tests/IncompFunc/IncompFunc.log +++ b/tests/IncompFunc/IncompFunc.log @@ -193,7 +193,7 @@ param_assign 2 parameter 2 port 2 range 5 -ref_obj 8 +ref_obj 7 return_stmt 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -222,7 +222,7 @@ param_assign 2 parameter 2 port 3 range 7 -ref_obj 13 +ref_obj 11 return_stmt 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/IncompFunc/slpp_all/surelog.uhdm ... @@ -406,7 +406,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.get_BA.B), line:9:16, endln:9:17 |vpiParent: - \_begin: (work@top.get_BA) + \_assignment: , line:9:7, endln:9:17 |vpiName:B |vpiFullName:work@top.get_BA.B |vpiActual: @@ -414,13 +414,11 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:9:7, endln:9:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:9:7, endln:9:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out + \_assignment: , line:9:7, endln:9:17 |vpiName:out |vpiFullName:work@top.get_BA.out + |vpiActual: + \_packed_array_var: (work@top.get_BA.out), line:8:20, endln:8:23 |vpiIndex: \_constant: , line:9:11, endln:9:12 |vpiParent: @@ -585,19 +583,13 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:9:7, endln:9:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:9:7, endln:9:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out - |vpiActual: - \_packed_array_var: (work@top.get_BA.out), line:8:20, endln:8:23 + \_assignment: , line:9:7, endln:9:17 |vpiName:out |vpiFullName:work@top.get_BA.out - |vpiIndex: - \_constant: , line:9:11, endln:9:12 |vpiActual: \_packed_array_var: (work@top.get_BA.out), line:8:20, endln:8:23 + |vpiIndex: + \_constant: , line:9:11, endln:9:12 |vpiStmt: \_return_stmt: , line:10:7, endln:10:13 |vpiParent: diff --git a/tests/IndexAssign/IndexAssign.log b/tests/IndexAssign/IndexAssign.log index 69919f4755..c311669919 100644 --- a/tests/IndexAssign/IndexAssign.log +++ b/tests/IndexAssign/IndexAssign.log @@ -36,7 +36,7 @@ operation 4 param_assign 2 parameter 2 range 2 -ref_obj 4 +ref_obj 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -54,7 +54,7 @@ operation 5 param_assign 2 parameter 2 range 2 -ref_obj 6 +ref_obj 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/IndexAssign/slpp_unit/surelog.uhdm ... @@ -122,11 +122,7 @@ design: (work@t) |vpiLhs: \_bit_select: (work@t.sig), line:4:10, endln:4:18 |vpiParent: - \_ref_obj: (work@t.sig) - |vpiParent: - \_cont_assign: , line:4:10, endln:4:22 - |vpiName:sig - |vpiFullName:work@t.sig + \_cont_assign: , line:4:10, endln:4:22 |vpiName:sig |vpiFullName:work@t.sig |vpiIndex: @@ -234,15 +230,11 @@ design: (work@t) |vpiLhs: \_bit_select: (work@t.sig), line:4:10, endln:4:18 |vpiParent: - \_ref_obj: (work@t.sig) - |vpiParent: - \_cont_assign: , line:4:10, endln:4:22 - |vpiName:sig - |vpiFullName:work@t.sig - |vpiActual: - \_logic_var: (work@t.sig), line:3:17, endln:3:20 + \_cont_assign: , line:4:10, endln:4:22 |vpiName:sig |vpiFullName:work@t.sig + |vpiActual: + \_logic_var: (work@t.sig), line:3:17, endln:3:20 |vpiIndex: \_operation: , line:4:14, endln:4:17 |vpiParent: @@ -264,8 +256,6 @@ design: (work@t) |vpiSize:64 |UINT:7 |vpiConstType:9 - |vpiActual: - \_logic_var: (work@t.sig), line:3:17, endln:3:20 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/IndexPartSel/IndexPartSel.log b/tests/IndexPartSel/IndexPartSel.log index c68bda0fa4..672c271878 100644 --- a/tests/IndexPartSel/IndexPartSel.log +++ b/tests/IndexPartSel/IndexPartSel.log @@ -182,7 +182,6 @@ logic_typespec 3 module_inst 4 operation 2 range 6 -ref_obj 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -197,7 +196,6 @@ logic_typespec 3 module_inst 4 operation 4 range 6 -ref_obj 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/IndexPartSel/slpp_all/surelog.uhdm ... @@ -245,11 +243,7 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.hw2reg_wrap), line:6:33, endln:6:49 |vpiParent: - \_ref_obj: (work@dut.hw2reg_wrap) - |vpiParent: - \_cont_assign: , line:6:8, endln:6:49 - |vpiName:hw2reg_wrap - |vpiFullName:work@dut.hw2reg_wrap + \_cont_assign: , line:6:8, endln:6:49 |vpiName:hw2reg_wrap |vpiFullName:work@dut.hw2reg_wrap |vpiIndex: @@ -268,11 +262,7 @@ design: (work@dut) |vpiOperand: \_bit_select: (work@dut.working_bitselect), line:6:9, endln:6:29 |vpiParent: - \_ref_obj: (work@dut.working_bitselect) - |vpiParent: - \_operation: , line:6:9, endln:6:29 - |vpiName:working_bitselect - |vpiFullName:work@dut.working_bitselect + \_operation: , line:6:9, endln:6:29 |vpiName:working_bitselect |vpiFullName:work@dut.working_bitselect |vpiIndex: @@ -288,14 +278,12 @@ design: (work@dut) |vpiParent: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/IndexPartSel/dut.sv, line:2:1, endln:8:10 |vpiRhs: - \_indexed_part_select: , line:7:63, endln:7:70 + \_indexed_part_select: hw2reg_wrap (work@dut.hw2reg_wrap), line:7:63, endln:7:70 |vpiParent: - \_ref_obj: hw2reg_wrap (work@dut.hw2reg_wrap) - |vpiParent: - \_cont_assign: , line:7:8, endln:7:71 - |vpiName:hw2reg_wrap - |vpiFullName:work@dut.hw2reg_wrap - |vpiDefName:hw2reg_wrap + \_cont_assign: , line:7:8, endln:7:71 + |vpiName:hw2reg_wrap + |vpiFullName:work@dut.hw2reg_wrap + |vpiDefName:hw2reg_wrap |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -316,14 +304,12 @@ design: (work@dut) \_cont_assign: , line:7:8, endln:7:71 |vpiOpType:33 |vpiOperand: - \_indexed_part_select: , line:7:9, endln:7:47 + \_indexed_part_select: notworking_indexed_part_select (work@dut.notworking_indexed_part_select), line:7:9, endln:7:47 |vpiParent: - \_ref_obj: notworking_indexed_part_select (work@dut.notworking_indexed_part_select) - |vpiParent: - \_operation: , line:7:9, endln:7:47 - |vpiName:notworking_indexed_part_select - |vpiFullName:work@dut.notworking_indexed_part_select - |vpiDefName:notworking_indexed_part_select + \_operation: , line:7:9, endln:7:47 + |vpiName:notworking_indexed_part_select + |vpiFullName:work@dut.notworking_indexed_part_select + |vpiDefName:notworking_indexed_part_select |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -432,19 +418,13 @@ design: (work@dut) |vpiRhs: \_bit_select: (work@dut.hw2reg_wrap), line:6:33, endln:6:49 |vpiParent: - \_ref_obj: (work@dut.hw2reg_wrap) - |vpiParent: - \_cont_assign: , line:6:8, endln:6:49 - |vpiName:hw2reg_wrap - |vpiFullName:work@dut.hw2reg_wrap - |vpiActual: - \_logic_net: (work@dut.hw2reg_wrap), line:3:14, endln:3:25 + \_cont_assign: , line:6:8, endln:6:49 |vpiName:hw2reg_wrap |vpiFullName:work@dut.hw2reg_wrap - |vpiIndex: - \_constant: , line:6:45, endln:6:48 |vpiActual: \_logic_net: (work@dut.hw2reg_wrap), line:3:14, endln:3:25 + |vpiIndex: + \_constant: , line:6:45, endln:6:48 |vpiLhs: \_operation: , line:6:9, endln:6:29 |vpiParent: @@ -453,34 +433,26 @@ design: (work@dut) |vpiOperand: \_bit_select: (work@dut.working_bitselect), line:6:9, endln:6:29 |vpiParent: - \_ref_obj: (work@dut.working_bitselect) - |vpiParent: - \_operation: , line:6:9, endln:6:29 - |vpiName:working_bitselect - |vpiFullName:work@dut.working_bitselect - |vpiActual: - \_logic_net: (work@dut.working_bitselect), line:5:13, endln:5:30 + \_operation: , line:6:9, endln:6:29 |vpiName:working_bitselect |vpiFullName:work@dut.working_bitselect - |vpiIndex: - \_constant: , line:6:27, endln:6:28 |vpiActual: \_logic_net: (work@dut.working_bitselect), line:5:13, endln:5:30 + |vpiIndex: + \_constant: , line:6:27, endln:6:28 |vpiContAssign: \_cont_assign: , line:7:8, endln:7:71 |vpiParent: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/IndexPartSel/dut.sv, line:2:1, endln:8:10 |vpiRhs: - \_indexed_part_select: , line:7:63, endln:7:70 + \_indexed_part_select: hw2reg_wrap (work@dut.hw2reg_wrap), line:7:63, endln:7:70 |vpiParent: - \_ref_obj: hw2reg_wrap (work@dut.hw2reg_wrap) - |vpiParent: - \_cont_assign: , line:7:8, endln:7:71 - |vpiName:hw2reg_wrap - |vpiFullName:work@dut.hw2reg_wrap - |vpiDefName:hw2reg_wrap - |vpiActual: - \_logic_net: (work@dut.hw2reg_wrap), line:3:14, endln:3:25 + \_cont_assign: , line:7:8, endln:7:71 + |vpiName:hw2reg_wrap + |vpiFullName:work@dut.hw2reg_wrap + |vpiDefName:hw2reg_wrap + |vpiActual: + \_logic_net: (work@dut.hw2reg_wrap), line:3:14, endln:3:25 |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -493,16 +465,14 @@ design: (work@dut) \_cont_assign: , line:7:8, endln:7:71 |vpiOpType:33 |vpiOperand: - \_indexed_part_select: , line:7:9, endln:7:47 + \_indexed_part_select: notworking_indexed_part_select (work@dut.notworking_indexed_part_select), line:7:9, endln:7:47 |vpiParent: - \_ref_obj: notworking_indexed_part_select (work@dut.notworking_indexed_part_select) - |vpiParent: - \_operation: , line:7:9, endln:7:47 - |vpiName:notworking_indexed_part_select - |vpiFullName:work@dut.notworking_indexed_part_select - |vpiDefName:notworking_indexed_part_select - |vpiActual: - \_logic_net: (work@dut.notworking_indexed_part_select), line:4:14, endln:4:44 + \_operation: , line:7:9, endln:7:47 + |vpiName:notworking_indexed_part_select + |vpiFullName:work@dut.notworking_indexed_part_select + |vpiDefName:notworking_indexed_part_select + |vpiActual: + \_logic_net: (work@dut.notworking_indexed_part_select), line:4:14, endln:4:44 |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: diff --git a/tests/IndexPartSelectBind/IndexPartSelectBind.log b/tests/IndexPartSelectBind/IndexPartSelectBind.log index 95a41beacf..6fbfbeca65 100644 --- a/tests/IndexPartSelectBind/IndexPartSelectBind.log +++ b/tests/IndexPartSelectBind/IndexPartSelectBind.log @@ -178,7 +178,7 @@ int_var 1 io_decl 1 operation 3 package 3 -ref_obj 10 +ref_obj 8 ref_var 1 return_stmt 1 struct_typespec 2 @@ -204,7 +204,7 @@ int_var 2 io_decl 2 operation 6 package 3 -ref_obj 20 +ref_obj 16 ref_var 1 return_stmt 2 struct_typespec 2 @@ -402,26 +402,26 @@ design: (unnamed) |vpiActual: \_io_decl: (rw), line:10:69, endln:10:71 |vpiActual: - \_indexed_part_select: , line:13:20, endln:13:31 + \_indexed_part_select: (rw.data[i * 8+:8]), line:13:20, endln:13:31 |vpiParent: - \_ref_obj: (pkg::tt::reg2bus::data) - |vpiParent: - \_hier_path: (rw.data[i * 8+:8]), line:13:17, endln:13:32 - |vpiName:data - |vpiFullName:pkg::tt::reg2bus::data + \_hier_path: (rw.data[i * 8+:8]), line:13:17, endln:13:32 + |vpiName:data + |vpiFullName:rw.data[i * 8+:8] + |vpiActual: + \_typespec_member: (data), line:5:18, endln:5:22 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:13:25, endln:13:28 |vpiParent: - \_indexed_part_select: , line:13:20, endln:13:31 + \_indexed_part_select: (rw.data[i * 8+:8]), line:13:20, endln:13:31 |vpiOpType:25 |vpiOperand: - \_ref_obj: (pkg::tt::reg2bus::data::i), line:13:25, endln:13:26 + \_ref_obj: (pkg::tt::reg2bus::rw.data[i * 8+:8]::data::i), line:13:25, endln:13:26 |vpiParent: \_operation: , line:13:25, endln:13:28 |vpiName:i - |vpiFullName:pkg::tt::reg2bus::data::i + |vpiFullName:pkg::tt::reg2bus::rw.data[i * 8+:8]::data::i |vpiActual: \_int_var: (pkg::tt::reg2bus::i), line:12:10, endln:12:11 |vpiOperand: @@ -451,21 +451,17 @@ design: (unnamed) |vpiActual: \_io_decl: (rw), line:10:69, endln:10:71 |vpiActual: - \_bit_select: (pkg::tt::reg2bus::rw.data[i]), line:13:7, endln:13:11 + \_bit_select: (pkg::tt::reg2bus::rw.data[i]::data), line:13:7, endln:13:11 |vpiParent: - \_ref_obj: (pkg::tt::reg2bus::rw.data[i]) - |vpiParent: - \_hier_path: (rw.data[i]), line:13:4, endln:13:14 - |vpiName:rw.data[i] - |vpiFullName:pkg::tt::reg2bus::rw.data[i] - |vpiActual: - \_typespec_member: (data), line:5:18, endln:5:22 + \_hier_path: (rw.data[i]), line:13:4, endln:13:14 |vpiName:data - |vpiFullName:pkg::tt::reg2bus::rw.data[i] + |vpiFullName:pkg::tt::reg2bus::rw.data[i]::data + |vpiActual: + \_typespec_member: (data), line:5:18, endln:5:22 |vpiIndex: \_ref_obj: (pkg::tt::reg2bus::rw.data[i]::i), line:13:12, endln:13:13 |vpiParent: - \_bit_select: (pkg::tt::reg2bus::rw.data[i]), line:13:7, endln:13:11 + \_bit_select: (pkg::tt::reg2bus::rw.data[i]::data), line:13:7, endln:13:11 |vpiName:i |vpiFullName:pkg::tt::reg2bus::rw.data[i]::i |vpiActual: diff --git a/tests/IndexedSelect/IndexedSelect.log b/tests/IndexedSelect/IndexedSelect.log index b5c776e8e9..725baa7f30 100644 --- a/tests/IndexedSelect/IndexedSelect.log +++ b/tests/IndexedSelect/IndexedSelect.log @@ -196,7 +196,7 @@ module_inst 5 operation 9 param_assign 6 parameter 10 -ref_obj 8 +ref_obj 1 sys_task_call 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -214,7 +214,7 @@ module_inst 5 operation 9 param_assign 6 parameter 10 -ref_obj 8 +ref_obj 1 sys_task_call 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/IndexedSelect/slpp_all/surelog.uhdm ... @@ -299,11 +299,9 @@ design: (work@test) |vpiParent: \_module_inst: work@test (work@test), file:${SURELOG_DIR}/tests/IndexedSelect/dut.sv, line:1:1, endln:17:10 |vpiRhs: - \_indexed_part_select: , line:6:19, endln:6:34 - |vpiParent: - \_ref_obj: FOO_REPL (FOO_REPL) - |vpiName:FOO_REPL - |vpiDefName:FOO_REPL + \_indexed_part_select: FOO_REPL (FOO_REPL), line:6:19, endln:6:34 + |vpiName:FOO_REPL + |vpiDefName:FOO_REPL |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -529,4 +527,4 @@ design: (work@test) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/IndexedSelect/dut.sv | ${SURELOG_DIR}/build/regression/IndexedSelect/roundtrip/dut_000.sv | 6 | 17 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/IndexedSelect/dut.sv | ${SURELOG_DIR}/build/regression/IndexedSelect/roundtrip/dut_000.sv | 7 | 17 | \ No newline at end of file diff --git a/tests/InterfAlways/InterfAlways.log b/tests/InterfAlways/InterfAlways.log index 434cfade2c..afacb57355 100644 --- a/tests/InterfAlways/InterfAlways.log +++ b/tests/InterfAlways/InterfAlways.log @@ -176,8 +176,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:3:11, endln:3:13 - |vpiParent: - \_assignment: , line:3:7, endln:3:13 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -185,7 +183,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@sw_test_status_if.x), line:3:7, endln:3:8 |vpiParent: - \_begin: (work@sw_test_status_if), line:2:11, endln:4:7 + \_assignment: , line:3:7, endln:3:13 |vpiName:x |vpiFullName:work@sw_test_status_if.x |vpiActual: diff --git a/tests/InterfArrayBind/InterfArrayBind.log b/tests/InterfArrayBind/InterfArrayBind.log index f9c3bd0284..3d09add849 100644 --- a/tests/InterfArrayBind/InterfArrayBind.log +++ b/tests/InterfArrayBind/InterfArrayBind.log @@ -252,7 +252,7 @@ operation 8 param_assign 2 parameter 4 range 4 -ref_obj 19 +ref_obj 13 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -281,7 +281,7 @@ operation 8 param_assign 2 parameter 4 range 4 -ref_obj 28 +ref_obj 19 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/InterfArrayBind/slpp_all/surelog.uhdm ... @@ -399,24 +399,22 @@ design: (work@soc_tb) \_cont_assign: , line:16:12, endln:16:62 |vpiName:peripheral_io_bus[IO_ONES].write_en |vpiActual: - \_bit_select: (peripheral_io_bus), line:16:12, endln:16:29 + \_bit_select: (peripheral_io_bus[IO_ONES]), line:16:12, endln:16:29 |vpiParent: - \_ref_obj: (work@soc_tb.peripheral_io_bus[IO_ONES]) - |vpiParent: - \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 - |vpiName:peripheral_io_bus[IO_ONES] - |vpiFullName:work@soc_tb.peripheral_io_bus[IO_ONES] + \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 |vpiName:peripheral_io_bus + |vpiFullName:peripheral_io_bus[IO_ONES] |vpiIndex: \_ref_obj: (IO_ONES), line:16:30, endln:16:37 |vpiName:IO_ONES |vpiActual: \_enum_const: (IO_ONES), line:11:7, endln:11:14 |vpiActual: - \_ref_obj: (write_en) + \_ref_obj: (peripheral_io_bus[IO_ONES].write_en) |vpiParent: \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 |vpiName:write_en + |vpiFullName:peripheral_io_bus[IO_ONES].write_en |vpiGenStmt: \_gen_region: |vpiParent: @@ -571,29 +569,27 @@ design: (work@soc_tb) \_cont_assign: , line:22:20, endln:22:58 |vpiName:peripheral_io_bus[io_idx].write_en |vpiActual: - \_bit_select: (peripheral_io_bus), line:22:20, endln:22:37 + \_bit_select: (peripheral_io_bus[io_idx]), line:22:20, endln:22:37 |vpiParent: - \_ref_obj: (work@soc_tb.io_gen[0].peripheral_io_bus[io_idx]) - |vpiParent: - \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 - |vpiName:peripheral_io_bus[io_idx] - |vpiFullName:work@soc_tb.io_gen[0].peripheral_io_bus[io_idx] + \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 |vpiName:peripheral_io_bus + |vpiFullName:peripheral_io_bus[io_idx] + |vpiActual: + \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[0]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiIndex: - \_ref_obj: (work@soc_tb.io_gen[0].peripheral_io_bus[io_idx].io_idx), line:22:38, endln:22:44 + \_ref_obj: (work@soc_tb.io_gen[0].peripheral_io_bus[io_idx].write_en.io_idx), line:22:38, endln:22:44 |vpiParent: - \_bit_select: (peripheral_io_bus), line:22:20, endln:22:37 + \_bit_select: (peripheral_io_bus[io_idx]), line:22:20, endln:22:37 |vpiName:io_idx - |vpiFullName:work@soc_tb.io_gen[0].peripheral_io_bus[io_idx].io_idx + |vpiFullName:work@soc_tb.io_gen[0].peripheral_io_bus[io_idx].write_en.io_idx |vpiActual: \_parameter: (work@soc_tb.io_gen[0].io_idx), line:20:0 - |vpiActual: - \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[0]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiActual: - \_ref_obj: (write_en) + \_ref_obj: (peripheral_io_bus[io_idx].write_en) |vpiParent: \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 |vpiName:write_en + |vpiFullName:peripheral_io_bus[io_idx].write_en |vpiActual: \_logic_var: (work@soc_tb.peripheral_io_bus[0].write_en), line:2:11, endln:2:19 |vpiGenScopeArray: @@ -635,29 +631,27 @@ design: (work@soc_tb) \_cont_assign: , line:22:20, endln:22:58 |vpiName:peripheral_io_bus[io_idx].write_en |vpiActual: - \_bit_select: (peripheral_io_bus), line:22:20, endln:22:37 + \_bit_select: (peripheral_io_bus[io_idx]), line:22:20, endln:22:37 |vpiParent: - \_ref_obj: (work@soc_tb.io_gen[1].peripheral_io_bus[io_idx]) - |vpiParent: - \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 - |vpiName:peripheral_io_bus[io_idx] - |vpiFullName:work@soc_tb.io_gen[1].peripheral_io_bus[io_idx] + \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 |vpiName:peripheral_io_bus + |vpiFullName:peripheral_io_bus[io_idx] + |vpiActual: + \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[1]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiIndex: - \_ref_obj: (work@soc_tb.io_gen[1].peripheral_io_bus[io_idx].io_idx), line:22:38, endln:22:44 + \_ref_obj: (work@soc_tb.io_gen[1].peripheral_io_bus[io_idx].write_en.io_idx), line:22:38, endln:22:44 |vpiParent: - \_bit_select: (peripheral_io_bus), line:22:20, endln:22:37 + \_bit_select: (peripheral_io_bus[io_idx]), line:22:20, endln:22:37 |vpiName:io_idx - |vpiFullName:work@soc_tb.io_gen[1].peripheral_io_bus[io_idx].io_idx + |vpiFullName:work@soc_tb.io_gen[1].peripheral_io_bus[io_idx].write_en.io_idx |vpiActual: \_parameter: (work@soc_tb.io_gen[1].io_idx), line:20:0 - |vpiActual: - \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[1]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiActual: - \_ref_obj: (write_en) + \_ref_obj: (peripheral_io_bus[io_idx].write_en) |vpiParent: \_hier_path: (peripheral_io_bus[io_idx].write_en), line:22:20, endln:22:37 |vpiName:write_en + |vpiFullName:peripheral_io_bus[io_idx].write_en |vpiActual: \_logic_var: (work@soc_tb.peripheral_io_bus[1].write_en), line:2:11, endln:2:19 |vpiContAssign: @@ -672,29 +666,27 @@ design: (work@soc_tb) \_cont_assign: , line:16:12, endln:16:62 |vpiName:peripheral_io_bus[IO_ONES].write_en |vpiActual: - \_bit_select: (peripheral_io_bus), line:16:12, endln:16:29 + \_bit_select: (peripheral_io_bus[IO_ONES]), line:16:12, endln:16:29 |vpiParent: - \_ref_obj: (work@soc_tb.peripheral_io_bus[IO_ONES]) - |vpiParent: - \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 - |vpiName:peripheral_io_bus[IO_ONES] - |vpiFullName:work@soc_tb.peripheral_io_bus[IO_ONES] + \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 |vpiName:peripheral_io_bus + |vpiFullName:peripheral_io_bus[IO_ONES] + |vpiActual: + \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[0]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiIndex: - \_ref_obj: (work@soc_tb.peripheral_io_bus[IO_ONES].IO_ONES), line:16:30, endln:16:37 + \_ref_obj: (work@soc_tb.peripheral_io_bus[IO_ONES].write_en.IO_ONES), line:16:30, endln:16:37 |vpiParent: - \_bit_select: (peripheral_io_bus), line:16:12, endln:16:29 + \_bit_select: (peripheral_io_bus[IO_ONES]), line:16:12, endln:16:29 |vpiName:IO_ONES - |vpiFullName:work@soc_tb.peripheral_io_bus[IO_ONES].IO_ONES + |vpiFullName:work@soc_tb.peripheral_io_bus[IO_ONES].write_en.IO_ONES |vpiActual: \_enum_const: (IO_ONES), line:11:7, endln:11:14 - |vpiActual: - \_interface_inst: work@io_bus_interface (work@soc_tb.peripheral_io_bus[0]), file:${SURELOG_DIR}/tests/InterfArrayBind/dut.sv, line:14:5, endln:14:65 |vpiActual: - \_ref_obj: (write_en) + \_ref_obj: (peripheral_io_bus[IO_ONES].write_en) |vpiParent: \_hier_path: (peripheral_io_bus[IO_ONES].write_en), line:16:12, endln:16:29 |vpiName:write_en + |vpiFullName:peripheral_io_bus[IO_ONES].write_en |vpiActual: \_logic_var: (work@soc_tb.peripheral_io_bus[0].write_en), line:2:11, endln:2:19 =================== diff --git a/tests/InterfBinding/InterfBinding.log b/tests/InterfBinding/InterfBinding.log index 22acec9cfb..d11ca76230 100644 --- a/tests/InterfBinding/InterfBinding.log +++ b/tests/InterfBinding/InterfBinding.log @@ -355,10 +355,11 @@ design: (work@BypassNetwork) \_hier_path: (ctrl.backEnd), line:33:13, endln:33:25 |vpiName:ctrl |vpiActual: - \_ref_obj: (backEnd), line:33:18, endln:33:25 + \_ref_obj: (work@BypassNetwork.backEnd), line:33:18, endln:33:25 |vpiParent: \_hier_path: (ctrl.backEnd), line:33:13, endln:33:25 |vpiName:backEnd + |vpiFullName:work@BypassNetwork.backEnd |vpiLhs: \_ref_obj: (work@BypassNetwork.o), line:33:9, endln:33:10 |vpiParent: @@ -440,10 +441,11 @@ design: (work@BypassNetwork) |vpiActual: \_interface_inst: work@ControllerIF (work@BypassNetwork.ctrl), file:${SURELOG_DIR}/tests/InterfBinding/dut.sv, line:29:0 |vpiActual: - \_ref_obj: (backEnd), line:33:18, endln:33:25 + \_ref_obj: (work@BypassNetwork.backEnd), line:33:18, endln:33:25 |vpiParent: \_hier_path: (ctrl.backEnd), line:33:13, endln:33:25 |vpiName:backEnd + |vpiFullName:work@BypassNetwork.backEnd |vpiActual: \_struct_net: (backEnd), line:18:21, endln:18:28 |vpiLhs: diff --git a/tests/InterfInst/InterfInst.log b/tests/InterfInst/InterfInst.log index 22a38f2311..d4c3d63393 100644 --- a/tests/InterfInst/InterfInst.log +++ b/tests/InterfInst/InterfInst.log @@ -276,10 +276,11 @@ design: (work@top) \_hier_path: (ss_if.start_addr), line:7:15, endln:7:31 |vpiName:ss_if |vpiActual: - \_ref_obj: (start_addr), line:7:21, endln:7:31 + \_ref_obj: (work@dut.start_addr), line:7:21, endln:7:31 |vpiParent: \_hier_path: (ss_if.start_addr), line:7:15, endln:7:31 |vpiName:start_addr + |vpiFullName:work@dut.start_addr |vpiLhs: \_ref_obj: (work@dut.a), line:7:11, endln:7:12 |vpiParent: @@ -464,7 +465,7 @@ design: (work@top) |vpiName:u_sim_sram_if |vpiFullName:work@top.u_sim_sram_if |vpiActual: - \_interface_inst: work@sim_sram_if (work@top.u_sim_sram_if), file:${SURELOG_DIR}/tests/InterfInst/dut.sv, line:11:4, endln:11:32 + \_interface_inst: work@sim_sram_if (work@top.u_sim_sram_if), file:${SURELOG_DIR}/tests/InterfInst/dut.sv, line:11:0 |vpiLowConn: \_ref_obj: (work@top.u_dut.ss_if), line:13:15, endln:13:20 |vpiParent: @@ -530,10 +531,11 @@ design: (work@top) |vpiActual: \_interface_inst: work@sim_sram_if (work@top.u_dut.ss_if), file:${SURELOG_DIR}/tests/InterfInst/dut.sv, line:13:0 |vpiActual: - \_ref_obj: (start_addr), line:7:21, endln:7:31 + \_ref_obj: (work@top.u_dut.start_addr), line:7:21, endln:7:31 |vpiParent: \_hier_path: (ss_if.start_addr), line:7:15, endln:7:31 |vpiName:start_addr + |vpiFullName:work@top.u_dut.start_addr |vpiLhs: \_ref_obj: (work@top.u_dut.a), line:7:11, endln:7:12 |vpiParent: diff --git a/tests/InterfaceElab/InterfaceElab.log b/tests/InterfaceElab/InterfaceElab.log index 03eddab379..4d8c0b3138 100644 --- a/tests/InterfaceElab/InterfaceElab.log +++ b/tests/InterfaceElab/InterfaceElab.log @@ -561,7 +561,7 @@ design: (work@testharness) |vpiName:reg_bus |vpiFullName:work@testharness.i_peripherals.reg_bus |vpiActual: - \_interface_inst: work@REG_BUS (work@testharness.i_peripherals.reg_bus), file:${SURELOG_DIR}/tests/InterfaceElab/dut.sv, line:23:4, endln:25:23 + \_interface_inst: work@REG_BUS (work@testharness.i_peripherals.reg_bus), file:${SURELOG_DIR}/tests/InterfaceElab/dut.sv, line:23:0 |vpiLowConn: \_ref_obj: (work@testharness.i_peripherals.i_apb_to_reg.reg_o), line:27:27, endln:27:32 |vpiParent: diff --git a/tests/InterfaceModExp/InterfaceModExp.log b/tests/InterfaceModExp/InterfaceModExp.log index a0b7a84316..2d26f9b993 100644 --- a/tests/InterfaceModExp/InterfaceModExp.log +++ b/tests/InterfaceModExp/InterfaceModExp.log @@ -288,7 +288,7 @@ part_select 4 port 3 range 8 ref_module 2 -ref_obj 16 +ref_obj 12 sys_func_call 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -316,7 +316,7 @@ part_select 4 port 4 range 8 ref_module 2 -ref_obj 23 +ref_obj 19 sys_func_call 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/InterfaceModExp/slpp_all/surelog.uhdm ... @@ -366,11 +366,9 @@ design: (work@top) |vpiDirection:2 |vpiName:P |vpiExpr: - \_part_select: , line:5:22, endln:5:28 - |vpiParent: - \_ref_obj: r (r), line:5:22, endln:5:23 - |vpiName:r - |vpiDefName:r + \_part_select: r (r), line:5:22, endln:5:28 + |vpiName:r + |vpiDefName:r |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:24, endln:5:25 @@ -407,11 +405,9 @@ design: (work@top) |vpiDirection:2 |vpiName:P |vpiExpr: - \_part_select: , line:6:22, endln:6:28 - |vpiParent: - \_ref_obj: r (r), line:6:22, endln:6:23 - |vpiName:r - |vpiDefName:r + \_part_select: r (r), line:6:22, endln:6:28 + |vpiName:r + |vpiDefName:r |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:24, endln:6:25 @@ -476,8 +472,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:11:17, endln:11:24 - |vpiParent: - \_assignment: , line:11:11, endln:11:24 |vpiDecompile:4'b1010 |vpiSize:4 |BIN:1010 @@ -485,7 +479,7 @@ design: (work@top) |vpiLhs: \_hier_path: (I.P), line:11:11, endln:11:14 |vpiParent: - \_initial: , line:11:3, endln:11:25 + \_assignment: , line:11:11, endln:11:24 |vpiName:I.P |vpiActual: \_ref_obj: (I) @@ -535,10 +529,11 @@ design: (work@top) \_hier_path: (inst.r), line:18:32, endln:18:38 |vpiName:inst |vpiActual: - \_ref_obj: (r), line:18:37, endln:18:38 + \_ref_obj: (work@top.r), line:18:37, endln:18:38 |vpiParent: \_hier_path: (inst.r), line:18:32, endln:18:38 |vpiName:r + |vpiFullName:work@top.r |vpiName:$display |vpiRefModule: \_ref_module: work@I (inst), line:15:5, endln:15:9 @@ -671,11 +666,11 @@ design: (work@top) |vpiDirection:2 |vpiName:P |vpiExpr: - \_part_select: , line:5:22, endln:5:28 - |vpiParent: - \_ref_obj: r (r), line:5:22, endln:5:23 - |vpiName:r - |vpiDefName:r + \_part_select: r (r), line:5:22, endln:5:28 + |vpiName:r + |vpiDefName:r + |vpiActual: + \_logic_var: (work@top.inst.r), line:2:13, endln:2:14 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:24, endln:5:25 @@ -717,11 +712,11 @@ design: (work@top) |vpiDirection:2 |vpiName:P |vpiExpr: - \_part_select: , line:6:22, endln:6:28 - |vpiParent: - \_ref_obj: r (r), line:6:22, endln:6:23 - |vpiName:r - |vpiDefName:r + \_part_select: r (r), line:6:22, endln:6:28 + |vpiName:r + |vpiDefName:r + |vpiActual: + \_logic_var: (work@top.inst.r), line:2:13, endln:2:14 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:24, endln:6:25 @@ -783,10 +778,11 @@ design: (work@top) |vpiActual: \_interface_inst: work@I (work@top.inst), file:${SURELOG_DIR}/tests/InterfaceModExp/dut.sv, line:15:3, endln:15:12 |vpiActual: - \_ref_obj: (r), line:18:37, endln:18:38 + \_ref_obj: (work@top.r), line:18:37, endln:18:38 |vpiParent: \_hier_path: (inst.r), line:18:32, endln:18:38 |vpiName:r + |vpiFullName:work@top.r |vpiActual: \_logic_var: (work@top.inst.r), line:2:13, endln:2:14 |vpiName:$display @@ -820,10 +816,11 @@ design: (work@top) |vpiActual: \_interface_inst: work@I (work@top.inst), file:${SURELOG_DIR}/tests/InterfaceModExp/dut.sv, line:15:3, endln:15:12 |vpiActual: - \_ref_obj: (A), line:16:15, endln:16:16 + \_ref_obj: (work@top.s.I.A), line:16:15, endln:16:16 |vpiParent: \_hier_path: (inst.A), line:16:10, endln:16:16 |vpiName:A + |vpiFullName:work@top.s.I.A |vpiActual: \_modport: (A), line:5:9, endln:5:10 |vpiLowConn: diff --git a/tests/InterfaceModPort/InterfaceModPort.log b/tests/InterfaceModPort/InterfaceModPort.log index 4d24cd654a..06c8cec9ec 100644 --- a/tests/InterfaceModPort/InterfaceModPort.log +++ b/tests/InterfaceModPort/InterfaceModPort.log @@ -1228,7 +1228,7 @@ port 16 program 2 range 43 ref_module 4 -ref_obj 46 +ref_obj 44 sys_func_call 1 task 9 === UHDM Object Stats End === @@ -1998,8 +1998,6 @@ design: (work@interface_modports) |vpiOpType:82 |vpiRhs: \_constant: , line:102:20, endln:102:21 - |vpiParent: - \_assignment: , line:102:7, endln:102:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -2007,7 +2005,7 @@ design: (work@interface_modports) |vpiLhs: \_hier_path: (tif.reset), line:102:7, endln:102:16 |vpiParent: - \_begin: (work@interface_modports.U_test), line:101:12, endln:105:7 + \_assignment: , line:102:7, endln:102:21 |vpiName:tif.reset |vpiActual: \_ref_obj: (tif) @@ -2257,10 +2255,11 @@ design: (work@interface_modports) \_hier_path: (mif.clk), line:69:19, endln:69:26 |vpiName:mif |vpiActual: - \_ref_obj: (clk), line:69:23, endln:69:26 + \_ref_obj: (work@memory_model.clk), line:69:23, endln:69:26 |vpiParent: \_hier_path: (mif.clk), line:69:19, endln:69:26 |vpiName:clk + |vpiFullName:work@memory_model.clk |vpiStmt: \_if_stmt: , line:70:2, endln:72:5 |vpiParent: @@ -2273,7 +2272,7 @@ design: (work@interface_modports) |vpiOperand: \_hier_path: (mif.ce_mem), line:70:6, endln:70:16 |vpiParent: - \_event_control: , line:69:8, endln:69:27 + \_operation: , line:70:6, endln:70:30 |vpiName:mif.ce_mem |vpiActual: \_ref_obj: (mif), line:70:6, endln:70:9 @@ -2281,10 +2280,11 @@ design: (work@interface_modports) \_hier_path: (mif.ce_mem), line:70:6, endln:70:16 |vpiName:mif |vpiActual: - \_ref_obj: (ce_mem), line:70:10, endln:70:16 + \_ref_obj: (work@memory_model.ce_mem), line:70:10, endln:70:16 |vpiParent: \_hier_path: (mif.ce_mem), line:70:6, endln:70:16 |vpiName:ce_mem + |vpiFullName:work@memory_model.ce_mem |vpiOperand: \_hier_path: (mif.we_mem), line:70:20, endln:70:30 |vpiParent: @@ -2296,10 +2296,11 @@ design: (work@interface_modports) \_hier_path: (mif.we_mem), line:70:20, endln:70:30 |vpiName:mif |vpiActual: - \_ref_obj: (we_mem), line:70:24, endln:70:30 + \_ref_obj: (work@memory_model.we_mem), line:70:24, endln:70:30 |vpiParent: \_hier_path: (mif.we_mem), line:70:20, endln:70:30 |vpiName:we_mem + |vpiFullName:work@memory_model.we_mem |vpiStmt: \_begin: (work@memory_model), line:70:32, endln:72:5 |vpiParent: @@ -2313,7 +2314,7 @@ design: (work@interface_modports) |vpiRhs: \_hier_path: (mif.datai_mem), line:71:25, endln:71:38 |vpiParent: - \_begin: (work@memory_model), line:70:32, endln:72:5 + \_assignment: , line:71:4, endln:71:38 |vpiName:mif.datai_mem |vpiActual: \_ref_obj: (mif), line:71:25, endln:71:28 @@ -2321,24 +2322,21 @@ design: (work@interface_modports) \_hier_path: (mif.datai_mem), line:71:25, endln:71:38 |vpiName:mif |vpiActual: - \_ref_obj: (datai_mem), line:71:29, endln:71:38 + \_ref_obj: (work@memory_model.datai_mem), line:71:29, endln:71:38 |vpiParent: \_hier_path: (mif.datai_mem), line:71:25, endln:71:38 |vpiName:datai_mem + |vpiFullName:work@memory_model.datai_mem |vpiLhs: \_bit_select: (work@memory_model.mem), line:71:4, endln:71:21 |vpiParent: - \_ref_obj: (work@memory_model.mem) - |vpiParent: - \_assignment: , line:71:4, endln:71:38 - |vpiName:mem - |vpiFullName:work@memory_model.mem + \_assignment: , line:71:4, endln:71:38 |vpiName:mem |vpiFullName:work@memory_model.mem |vpiIndex: \_hier_path: (mif.addr_mem), line:71:8, endln:71:20 |vpiParent: - \_begin: (work@memory_model), line:70:32, endln:72:5 + \_bit_select: (work@memory_model.mem), line:71:4, endln:71:21 |vpiName:mif.addr_mem |vpiActual: \_ref_obj: (mif), line:71:8, endln:71:11 @@ -2346,10 +2344,11 @@ design: (work@interface_modports) \_hier_path: (mif.addr_mem), line:71:8, endln:71:20 |vpiName:mif |vpiActual: - \_ref_obj: (addr_mem), line:71:12, endln:71:20 + \_ref_obj: (work@memory_model.mem.addr_mem), line:71:12, endln:71:20 |vpiParent: \_hier_path: (mif.addr_mem), line:71:8, endln:71:20 |vpiName:addr_mem + |vpiFullName:work@memory_model.mem.addr_mem |vpiAlwaysType:1 |vpiProcess: \_always: , line:77:1, endln:80:5 @@ -2375,10 +2374,11 @@ design: (work@interface_modports) \_hier_path: (mif.clk), line:77:19, endln:77:26 |vpiName:mif |vpiActual: - \_ref_obj: (clk), line:77:23, endln:77:26 + \_ref_obj: (work@memory_model.clk), line:77:23, endln:77:26 |vpiParent: \_hier_path: (mif.clk), line:77:19, endln:77:26 |vpiName:clk + |vpiFullName:work@memory_model.clk |vpiStmt: \_if_stmt: , line:78:2, endln:80:5 |vpiParent: @@ -2391,7 +2391,7 @@ design: (work@interface_modports) |vpiOperand: \_hier_path: (mif.ce_mem), line:78:6, endln:78:16 |vpiParent: - \_event_control: , line:77:8, endln:77:27 + \_operation: , line:78:6, endln:78:31 |vpiName:mif.ce_mem |vpiActual: \_ref_obj: (mif), line:78:6, endln:78:9 @@ -2399,10 +2399,11 @@ design: (work@interface_modports) \_hier_path: (mif.ce_mem), line:78:6, endln:78:16 |vpiName:mif |vpiActual: - \_ref_obj: (ce_mem), line:78:10, endln:78:16 + \_ref_obj: (work@memory_model.ce_mem), line:78:10, endln:78:16 |vpiParent: \_hier_path: (mif.ce_mem), line:78:6, endln:78:16 |vpiName:ce_mem + |vpiFullName:work@memory_model.ce_mem |vpiOperand: \_operation: , line:78:20, endln:78:31 |vpiParent: @@ -2419,10 +2420,11 @@ design: (work@interface_modports) \_hier_path: (mif.we_mem), line:78:21, endln:78:31 |vpiName:mif |vpiActual: - \_ref_obj: (we_mem), line:78:25, endln:78:31 + \_ref_obj: (work@memory_model.we_mem), line:78:25, endln:78:31 |vpiParent: \_hier_path: (mif.we_mem), line:78:21, endln:78:31 |vpiName:we_mem + |vpiFullName:work@memory_model.we_mem |vpiStmt: \_begin: (work@memory_model), line:78:34, endln:80:5 |vpiParent: @@ -2436,17 +2438,13 @@ design: (work@interface_modports) |vpiRhs: \_bit_select: (work@memory_model.mem), line:79:21, endln:79:38 |vpiParent: - \_ref_obj: (work@memory_model.mem) - |vpiParent: - \_assignment: , line:79:4, endln:79:38 - |vpiName:mem - |vpiFullName:work@memory_model.mem + \_assignment: , line:79:4, endln:79:38 |vpiName:mem |vpiFullName:work@memory_model.mem |vpiIndex: \_hier_path: (mif.addr_mem), line:79:25, endln:79:37 |vpiParent: - \_begin: (work@memory_model), line:78:34, endln:80:5 + \_bit_select: (work@memory_model.mem), line:79:21, endln:79:38 |vpiName:mif.addr_mem |vpiActual: \_ref_obj: (mif), line:79:25, endln:79:28 @@ -2454,14 +2452,15 @@ design: (work@interface_modports) \_hier_path: (mif.addr_mem), line:79:25, endln:79:37 |vpiName:mif |vpiActual: - \_ref_obj: (addr_mem), line:79:29, endln:79:37 + \_ref_obj: (work@memory_model.mem.addr_mem), line:79:29, endln:79:37 |vpiParent: \_hier_path: (mif.addr_mem), line:79:25, endln:79:37 |vpiName:addr_mem + |vpiFullName:work@memory_model.mem.addr_mem |vpiLhs: \_hier_path: (mif.datao_mem), line:79:4, endln:79:17 |vpiParent: - \_begin: (work@memory_model), line:78:34, endln:80:5 + \_assignment: , line:79:4, endln:79:38 |vpiName:mif.datao_mem |vpiActual: \_ref_obj: (mif) diff --git a/tests/InterfaceProcess/InterfaceProcess.log b/tests/InterfaceProcess/InterfaceProcess.log index 576e274e19..ab464b80a0 100644 --- a/tests/InterfaceProcess/InterfaceProcess.log +++ b/tests/InterfaceProcess/InterfaceProcess.log @@ -221,8 +221,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:7:21, endln:7:25 - |vpiParent: - \_assignment: , line:7:6, endln:7:25 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -230,7 +228,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@sw_test_status_if.sw_test_done), line:7:6, endln:7:18 |vpiParent: - \_begin: (work@sw_test_status_if), line:6:11, endln:8:6 + \_assignment: , line:7:6, endln:7:25 |vpiName:sw_test_done |vpiFullName:work@sw_test_status_if.sw_test_done |vpiActual: diff --git a/tests/InterpElab1/InterpElab1.log b/tests/InterpElab1/InterpElab1.log index 749faed5cd..10fa1e6dcf 100644 --- a/tests/InterpElab1/InterpElab1.log +++ b/tests/InterpElab1/InterpElab1.log @@ -713,7 +713,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.lfsr_data_t.OP_W), line:15:14, endln:15:18 |vpiParent: - \_struct_typespec: (lfsr_data_t), line:13:13, endln:13:19 + \_operation: , line:15:14, endln:15:20 |vpiName:OP_W |vpiFullName:work@dut.lfsr_data_t.OP_W |vpiActual: @@ -760,7 +760,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.lfsr_data_t.OP_W), line:16:14, endln:16:18 |vpiParent: - \_struct_typespec: (lfsr_data_t), line:13:13, endln:13:19 + \_operation: , line:16:14, endln:16:20 |vpiName:OP_W |vpiFullName:work@dut.lfsr_data_t.OP_W |vpiActual: @@ -807,7 +807,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@dut.lfsr_data_t.TIMEOUT_CNT_W), line:17:14, endln:17:27 |vpiParent: - \_struct_typespec: (lfsr_data_t), line:13:13, endln:13:19 + \_operation: , line:17:14, endln:17:29 |vpiName:TIMEOUT_CNT_W |vpiFullName:work@dut.lfsr_data_t.TIMEOUT_CNT_W |vpiActual: diff --git a/tests/Inverter/Inverter.log b/tests/Inverter/Inverter.log index d47704bde6..0db3a921ee 100644 --- a/tests/Inverter/Inverter.log +++ b/tests/Inverter/Inverter.log @@ -540,7 +540,7 @@ design: (work@top) |vpiName:a |vpiFullName:work@top.i2.a |vpiActual: - \_logic_net: (work@top.i2.a), line:8:13, endln:8:14 + \_logic_net: (work@top.i1.a), line:8:13, endln:8:14 |vpiLhs: \_ref_obj: (work@top.i2.b), line:11:8, endln:11:9 |vpiParent: diff --git a/tests/JKFlipflop/JKFlipflop.log b/tests/JKFlipflop/JKFlipflop.log index e075bf3780..1463907ef0 100644 --- a/tests/JKFlipflop/JKFlipflop.log +++ b/tests/JKFlipflop/JKFlipflop.log @@ -670,8 +670,6 @@ design: (work@JKFlipflop) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:7, endln:15:11 - |vpiParent: - \_assignment: , line:15:5, endln:15:11 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -679,7 +677,7 @@ design: (work@JKFlipflop) |vpiLhs: \_ref_obj: (work@D_Flipflop.q), line:15:5, endln:15:6 |vpiParent: - \_if_else: , line:14:5, endln:17:11 + \_assignment: , line:15:5, endln:15:11 |vpiName:q |vpiFullName:work@D_Flipflop.q |vpiActual: @@ -693,7 +691,7 @@ design: (work@JKFlipflop) |vpiRhs: \_ref_obj: (work@D_Flipflop.Din), line:17:7, endln:17:10 |vpiParent: - \_if_else: , line:14:5, endln:17:11 + \_assignment: , line:17:5, endln:17:10 |vpiName:Din |vpiFullName:work@D_Flipflop.Din |vpiActual: @@ -701,7 +699,7 @@ design: (work@JKFlipflop) |vpiLhs: \_ref_obj: (work@D_Flipflop.q), line:17:5, endln:17:6 |vpiParent: - \_if_else: , line:14:5, endln:17:11 + \_assignment: , line:17:5, endln:17:10 |vpiName:q |vpiFullName:work@D_Flipflop.q |vpiActual: @@ -853,7 +851,7 @@ design: (work@JKFlipflop) |vpiOperand: \_operation: , line:5:20, endln:5:22 |vpiParent: - \_operation: , line:5:12, endln:5:25 + \_operation: , line:5:20, endln:5:24 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@JKFlipflop.K), line:5:21, endln:5:22 diff --git a/tests/LargeHex/LargeHex.log b/tests/LargeHex/LargeHex.log index 50d784984b..9a9f9676d4 100644 --- a/tests/LargeHex/LargeHex.log +++ b/tests/LargeHex/LargeHex.log @@ -568,7 +568,6 @@ param_assign 8 parameter 8 range 11 ref_module 1 -ref_obj 5 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -598,7 +597,6 @@ param_assign 8 parameter 8 range 11 ref_module 1 -ref_obj 5 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/LargeHex/slpp_all/surelog.uhdm ... @@ -1163,15 +1161,15 @@ design: (work@tlul_socket_1n) |vpiParent: \_module_inst: work@tlul_socket_1n (work@tlul_socket_1n), file:${SURELOG_DIR}/tests/LargeHex/dut.sv, line:6:1, endln:18:10 |vpiRhs: - \_indexed_part_select: , line:8:42, endln:8:59 - |vpiParent: - \_ref_obj: DReqDepth (DReqDepth) - |vpiName:DReqDepth - |vpiDefName:DReqDepth + \_indexed_part_select: DReqDepth (DReqDepth), line:8:42, endln:8:59 + |vpiName:DReqDepth + |vpiDefName:DReqDepth |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:8:52, endln:8:55 + |vpiParent: + \_indexed_part_select: DReqDepth (DReqDepth), line:8:42, endln:8:59 |vpiOpType:25 |vpiOperand: \_constant: , line:8:52, endln:8:53 @@ -1202,11 +1200,9 @@ design: (work@tlul_socket_1n) |vpiParent: \_module_inst: work@tlul_socket_1n (work@tlul_socket_1n), file:${SURELOG_DIR}/tests/LargeHex/dut.sv, line:6:1, endln:18:10 |vpiRhs: - \_indexed_part_select: , line:11:42, endln:11:57 - |vpiParent: - \_ref_obj: DReqDepth (DReqDepth) - |vpiName:DReqDepth - |vpiDefName:DReqDepth + \_indexed_part_select: DReqDepth (DReqDepth), line:11:42, endln:11:57 + |vpiName:DReqDepth + |vpiDefName:DReqDepth |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -1533,4 +1529,4 @@ design: (work@tlul_socket_1n) [ NOTE] : 6 -[roundtrip]: ${SURELOG_DIR}/tests/LargeHex/dut.sv | ${SURELOG_DIR}/build/regression/LargeHex/roundtrip/dut_000.sv | 9 | 18 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/LargeHex/dut.sv | ${SURELOG_DIR}/build/regression/LargeHex/roundtrip/dut_000.sv | 11 | 18 | \ No newline at end of file diff --git a/tests/LateBindingFuncArg/LateBindingFuncArg.log b/tests/LateBindingFuncArg/LateBindingFuncArg.log index b974042f4f..2c38766e30 100644 --- a/tests/LateBindingFuncArg/LateBindingFuncArg.log +++ b/tests/LateBindingFuncArg/LateBindingFuncArg.log @@ -174,7 +174,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.doFoo.doFoo), line:5:9, endln:5:14 |vpiParent: - \_function: (work@top.doFoo), line:4:5, endln:6:16 + \_assignment: , line:5:9, endln:5:37 |vpiName:doFoo |vpiFullName:work@top.doFoo.doFoo |vpiActual: @@ -234,7 +234,7 @@ design: (work@top) |vpiName:doFoo |vpiFullName:work@top.doFoo.doFoo |vpiActual: - \_integer_var: , line:4:14, endln:4:21 + \_integer_var: (doFoo), line:4:14, endln:4:21 |vpiInstance: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/LateBindingFuncArg/dut.sv, line:3:1, endln:7:10 |vpiTopModule:1 diff --git a/tests/LeftPadding/LeftPadding.log b/tests/LeftPadding/LeftPadding.log index cc0c849367..39f6782daf 100644 --- a/tests/LeftPadding/LeftPadding.log +++ b/tests/LeftPadding/LeftPadding.log @@ -595,7 +595,7 @@ design: (work@socket_1n) |vpiOperand: \_ref_obj: (P2), line:7:19, endln:7:21 |vpiParent: - \_operation: , line:7:7, endln:7:27 + \_operation: , line:7:19, endln:7:27 |vpiName:P2 |vpiOperand: \_ref_obj: (P3), line:7:25, endln:7:27 @@ -610,7 +610,7 @@ design: (work@socket_1n) |vpiOperand: \_ref_obj: (P3), line:7:31, endln:7:33 |vpiParent: - \_operation: , line:7:7, endln:7:39 + \_operation: , line:7:31, endln:7:39 |vpiName:P3 |vpiOperand: \_ref_obj: (P4), line:7:37, endln:7:39 @@ -625,7 +625,7 @@ design: (work@socket_1n) |vpiOperand: \_ref_obj: (P4), line:7:43, endln:7:45 |vpiParent: - \_operation: , line:7:7, endln:7:51 + \_operation: , line:7:43, endln:7:51 |vpiName:P4 |vpiOperand: \_constant: , line:7:49, endln:7:51 diff --git a/tests/LhsHierPath/LhsHierPath.log b/tests/LhsHierPath/LhsHierPath.log index ba73cfe4d5..47a779f2dd 100644 --- a/tests/LhsHierPath/LhsHierPath.log +++ b/tests/LhsHierPath/LhsHierPath.log @@ -179,7 +179,7 @@ package 3 packed_array_typespec 2 port 2 range 2 -ref_obj 9 +ref_obj 7 struct_typespec 4 struct_var 1 typespec_member 4 @@ -202,7 +202,7 @@ package 3 packed_array_typespec 2 port 3 range 2 -ref_obj 17 +ref_obj 13 struct_typespec 4 struct_var 1 typespec_member 4 @@ -421,8 +421,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:14:37, endln:14:41 - |vpiParent: - \_assignment: , line:14:7, endln:14:41 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -430,7 +428,7 @@ design: (work@top) |vpiLhs: \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiParent: - \_begin: (work@top), line:13:16, endln:15:7 + \_assignment: , line:14:7, endln:14:41 |vpiName:ast_alert_o.alerts_ack[0].p |vpiActual: \_ref_obj: (ast_alert_o) @@ -438,14 +436,11 @@ design: (work@top) \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiName:ast_alert_o |vpiActual: - \_bit_select: (alerts_ack), line:14:19, endln:14:29 + \_bit_select: (alerts_ack[0]), line:14:19, endln:14:29 |vpiParent: - \_ref_obj: (work@top.ast_alert_o.alerts_ack[0]) - |vpiParent: - \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 - |vpiName:ast_alert_o.alerts_ack[0] - |vpiFullName:work@top.ast_alert_o.alerts_ack[0] + \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiName:alerts_ack + |vpiFullName:alerts_ack[0] |vpiIndex: \_constant: , line:14:30, endln:14:31 |vpiDecompile:0 @@ -453,10 +448,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (p) + \_ref_obj: (alerts_ack[0].p) |vpiParent: \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiName:p + |vpiFullName:alerts_ack[0].p |vpiAlwaysType:2 |vpiContAssign: \_cont_assign: , line:16:11, endln:16:42 @@ -473,14 +469,11 @@ design: (work@top) \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:ast_alert_o |vpiActual: - \_bit_select: (alerts_ack), line:16:27, endln:16:37 + \_bit_select: (ast_alert_o.alerts_ack[0]), line:16:27, endln:16:37 |vpiParent: - \_ref_obj: (work@top.alerts_ack[0]) - |vpiParent: - \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 - |vpiName:alerts_ack[0] - |vpiFullName:work@top.alerts_ack[0] + \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:alerts_ack + |vpiFullName:ast_alert_o.alerts_ack[0] |vpiIndex: \_constant: , line:16:38, endln:16:39 |vpiDecompile:0 @@ -488,10 +481,11 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (p), line:16:41, endln:16:42 + \_ref_obj: (work@top.p), line:16:41, endln:16:42 |vpiParent: \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:p + |vpiFullName:work@top.p |vpiLhs: \_ref_obj: (work@top.o), line:16:11, endln:16:12 |vpiParent: @@ -571,25 +565,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@top.ast_alert_o), line:12:28, endln:12:39 |vpiActual: - \_bit_select: (alerts_ack), line:14:19, endln:14:29 + \_bit_select: (alerts_ack[0]), line:14:19, endln:14:29 |vpiParent: - \_ref_obj: (work@top.ast_alert_o.alerts_ack[0]) - |vpiParent: - \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 - |vpiName:ast_alert_o.alerts_ack[0] - |vpiFullName:work@top.ast_alert_o.alerts_ack[0] - |vpiActual: - \_typespec_member: (alerts_ack), line:7:23, endln:7:33 + \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiName:alerts_ack - |vpiIndex: - \_constant: , line:14:30, endln:14:31 + |vpiFullName:alerts_ack[0] |vpiActual: \_typespec_member: (alerts_ack), line:7:23, endln:7:33 + |vpiIndex: + \_constant: , line:14:30, endln:14:31 |vpiActual: - \_ref_obj: (p) + \_ref_obj: (alerts_ack[0].p) |vpiParent: \_hier_path: (ast_alert_o.alerts_ack[0].p), line:14:7, endln:14:34 |vpiName:p + |vpiFullName:alerts_ack[0].p |vpiActual: \_typespec_member: (p), line:3:13, endln:3:14 |vpiAlwaysType:2 @@ -610,25 +600,21 @@ design: (work@top) |vpiActual: \_struct_var: (work@top.ast_alert_o), line:12:28, endln:12:39 |vpiActual: - \_bit_select: (alerts_ack), line:16:27, endln:16:37 + \_bit_select: (ast_alert_o.alerts_ack[0]), line:16:27, endln:16:37 |vpiParent: - \_ref_obj: (work@top.alerts_ack[0]) - |vpiParent: - \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 - |vpiName:alerts_ack[0] - |vpiFullName:work@top.alerts_ack[0] - |vpiActual: - \_typespec_member: (alerts_ack), line:7:23, endln:7:33 + \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:alerts_ack - |vpiIndex: - \_constant: , line:16:38, endln:16:39 + |vpiFullName:ast_alert_o.alerts_ack[0] |vpiActual: \_typespec_member: (alerts_ack), line:7:23, endln:7:33 + |vpiIndex: + \_constant: , line:16:38, endln:16:39 |vpiActual: - \_ref_obj: (p), line:16:41, endln:16:42 + \_ref_obj: (work@top.p), line:16:41, endln:16:42 |vpiParent: \_hier_path: (ast_alert_o.alerts_ack[0].p), line:16:15, endln:16:42 |vpiName:p + |vpiFullName:work@top.p |vpiActual: \_typespec_member: (p), line:3:13, endln:3:14 |vpiLhs: diff --git a/tests/LhsOp/LhsOp.log b/tests/LhsOp/LhsOp.log index 52391744f6..237d854098 100644 --- a/tests/LhsOp/LhsOp.log +++ b/tests/LhsOp/LhsOp.log @@ -330,10 +330,11 @@ design: (work@top) \_hier_path: (hw2reg_wrap.class_esc_state), line:12:19, endln:12:46 |vpiName:hw2reg_wrap |vpiActual: - \_ref_obj: (class_esc_state), line:12:31, endln:12:46 + \_ref_obj: (work@top.class_esc_state), line:12:31, endln:12:46 |vpiParent: \_hier_path: (hw2reg_wrap.class_esc_state), line:12:19, endln:12:46 |vpiName:class_esc_state + |vpiFullName:work@top.class_esc_state |vpiLhs: \_operation: , line:11:13, endln:11:14 |vpiParent: @@ -462,10 +463,11 @@ design: (work@top) |vpiActual: \_struct_var: (work@top.hw2reg_wrap), line:9:18, endln:9:29 |vpiActual: - \_ref_obj: (class_esc_state), line:12:31, endln:12:46 + \_ref_obj: (work@top.class_esc_state), line:12:31, endln:12:46 |vpiParent: \_hier_path: (hw2reg_wrap.class_esc_state), line:12:19, endln:12:46 |vpiName:class_esc_state + |vpiFullName:work@top.class_esc_state |vpiActual: \_typespec_member: (class_esc_state), line:6:22, endln:6:37 |vpiLhs: diff --git a/tests/LibraryIntercon/LibraryIntercon.log b/tests/LibraryIntercon/LibraryIntercon.log index 31de67a5c6..065d96d464 100644 --- a/tests/LibraryIntercon/LibraryIntercon.log +++ b/tests/LibraryIntercon/LibraryIntercon.log @@ -9,12 +9,12 @@ LIB: work ${SURELOG_DIR}/tests/LibraryIntercon/lib.map LIB: realLib - ${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr ${SURELOG_DIR}/tests/LibraryIntercon/driver.svr + ${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr LIB: logicLib - ${SURELOG_DIR}/tests/LibraryIntercon/driver.sv ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv + ${SURELOG_DIR}/tests/LibraryIntercon/driver.sv ${SURELOG_DIR}/tests/LibraryIntercon/top.sv @@ -22,26 +22,26 @@ LIB: logicLib [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/lib.map". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". - [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". + [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". - [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv". + [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv". [WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: No timescale set for "NetsPkg". @@ -198,7 +198,7 @@ port 25 range 47 real_typespec 34 real_var 16 -ref_obj 75 +ref_obj 65 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/LibraryIntercon/slpp_unit/surelog.uhdm ... diff --git a/tests/LocalScopeHierPath/LocalScopeHierPath.log b/tests/LocalScopeHierPath/LocalScopeHierPath.log index 30659fe0a6..df33c57b2e 100644 --- a/tests/LocalScopeHierPath/LocalScopeHierPath.log +++ b/tests/LocalScopeHierPath/LocalScopeHierPath.log @@ -177,7 +177,7 @@ function 1 hier_path 2 package 3 range 2 -ref_obj 8 +ref_obj 6 ref_var 3 string_typespec 3 string_var 1 @@ -204,7 +204,7 @@ function 2 hier_path 4 package 3 range 2 -ref_obj 16 +ref_obj 12 ref_var 6 string_typespec 3 string_var 3 @@ -437,25 +437,19 @@ design: (unnamed) |vpiRhs: \_bit_select: (pack::uvm_mem_mam::check_reg::paths), line:17:30, endln:17:38 |vpiParent: - \_ref_obj: (pack::uvm_mem_mam::check_reg::paths) - |vpiParent: - \_assign_stmt: , line:17:25, endln:17:38 - |vpiName:paths - |vpiFullName:pack::uvm_mem_mam::check_reg::paths - |vpiActual: - \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 + \_assign_stmt: , line:17:25, endln:17:38 |vpiName:paths |vpiFullName:pack::uvm_mem_mam::check_reg::paths + |vpiActual: + \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 |vpiIndex: - \_ref_obj: (pack::uvm_mem_mam::check_reg::paths::p), line:17:36, endln:17:37 + \_ref_obj: (pack::uvm_mem_mam::check_reg::p), line:17:36, endln:17:37 |vpiParent: \_bit_select: (pack::uvm_mem_mam::check_reg::paths), line:17:30, endln:17:38 |vpiName:p - |vpiFullName:pack::uvm_mem_mam::check_reg::paths::p + |vpiFullName:pack::uvm_mem_mam::check_reg::p |vpiActual: \_ref_var: (pack::uvm_mem_mam::check_reg::p), line:16:17, endln:16:18 - |vpiActual: - \_array_var: (pack::uvm_mem_mam::check_reg::paths), line:14:23, endln:14:28 |vpiLhs: \_class_var: (pack::uvm_mem_mam::check_reg::path), line:17:25, endln:17:29 |vpiParent: @@ -533,29 +527,27 @@ design: (unnamed) |vpiActual: \_class_var: (pack::uvm_mem_mam::check_reg::path), line:17:25, endln:17:29 |vpiActual: - \_bit_select: (slices), line:19:24, endln:19:30 + \_bit_select: (path.slices[j]), line:19:24, endln:19:30 |vpiParent: - \_ref_obj: (pack::uvm_mem_mam::check_reg::slices[j]) - |vpiParent: - \_hier_path: (path.slices[j].spath), line:19:19, endln:19:39 - |vpiName:slices[j] - |vpiFullName:pack::uvm_mem_mam::check_reg::slices[j] - |vpiActual: - \_array_var: (pack::uvm_hdl_path_concat::slices), line:8:23, endln:8:29 + \_hier_path: (path.slices[j].spath), line:19:19, endln:19:39 |vpiName:slices + |vpiFullName:path.slices[j] + |vpiActual: + \_array_var: (pack::uvm_hdl_path_concat::slices), line:8:23, endln:8:29 |vpiIndex: - \_ref_obj: (pack::uvm_mem_mam::check_reg::slices[j]::j), line:19:31, endln:19:32 + \_ref_obj: (pack::uvm_mem_mam::check_reg::path.slices[j].spath::j), line:19:31, endln:19:32 |vpiParent: - \_bit_select: (slices), line:19:24, endln:19:30 + \_bit_select: (path.slices[j]), line:19:24, endln:19:30 |vpiName:j - |vpiFullName:pack::uvm_mem_mam::check_reg::slices[j]::j + |vpiFullName:pack::uvm_mem_mam::check_reg::path.slices[j].spath::j |vpiActual: \_ref_var: (pack::uvm_mem_mam::check_reg::j), line:18:26, endln:18:27 |vpiActual: - \_ref_obj: (spath), line:19:34, endln:19:39 + \_ref_obj: (pack::uvm_mem_mam::check_reg::spath), line:19:34, endln:19:39 |vpiParent: \_hier_path: (path.slices[j].spath), line:19:19, endln:19:39 |vpiName:spath + |vpiFullName:pack::uvm_mem_mam::check_reg::spath |vpiActual: \_typespec_member: (spath), line:4:11, endln:4:16 |vpiLhs: diff --git a/tests/LogicCast/LogicCast.log b/tests/LogicCast/LogicCast.log index 0062f93488..3366dcd5b4 100644 --- a/tests/LogicCast/LogicCast.log +++ b/tests/LogicCast/LogicCast.log @@ -882,8 +882,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_operation: , line:3:29, endln:3:67 - |vpiParent: - \_assignment: , line:3:3, endln:3:67 |vpiTypespec: \_logic_typespec: , line:3:29, endln:3:34 |vpiOpType:67 @@ -901,11 +899,10 @@ design: (work@top) |INT:32 |vpiOpType:67 |vpiOperand: - \_ref_obj: (work@top.csr_read_write.hartsel_o), line:3:40, endln:3:49 + \_ref_obj: (hartsel_o), line:3:40, endln:3:49 |vpiParent: \_operation: , line:3:36, endln:3:50 |vpiName:hartsel_o - |vpiFullName:work@top.csr_read_write.hartsel_o |vpiActual: \_logic_net: (hartsel_o) |vpiOperand: @@ -914,11 +911,10 @@ design: (work@top) \_operation: , line:3:36, endln:3:66 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@top.csr_read_write.NrHarts), line:3:54, endln:3:61 + \_ref_obj: (NrHarts), line:3:54, endln:3:61 |vpiParent: - \_operation: , line:3:36, endln:3:66 + \_operation: , line:3:54, endln:3:65 |vpiName:NrHarts - |vpiFullName:work@top.csr_read_write.NrHarts |vpiActual: \_logic_net: (NrHarts) |vpiOperand: @@ -932,7 +928,7 @@ design: (work@top) |vpiLhs: \_hier_path: (dmstatus.allnonexistent), line:3:3, endln:3:26 |vpiParent: - \_named_begin: (work@top.csr_read_write), line:2:15, endln:4:6 + \_assignment: , line:3:3, endln:3:67 |vpiName:dmstatus.allnonexistent |vpiActual: \_ref_obj: (dmstatus) diff --git a/tests/LongHex/LongHex.log b/tests/LongHex/LongHex.log index a0bae09f4f..0b6801952a 100644 --- a/tests/LongHex/LongHex.log +++ b/tests/LongHex/LongHex.log @@ -187,7 +187,7 @@ parameter 12 part_select 2 range 14 ref_module 1 -ref_obj 4 +ref_obj 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -205,7 +205,7 @@ parameter 12 part_select 2 range 14 ref_module 1 -ref_obj 5 +ref_obj 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/LongHex/slpp_all/surelog.uhdm ... @@ -486,14 +486,12 @@ design: (work@aes_core) |vpiParent: \_module_inst: work@aes_cipher_core (work@aes_cipher_core), file:${SURELOG_DIR}/tests/LongHex/dut.sv, line:6:1, endln:9:10 |vpiRhs: - \_part_select: , line:8:15, endln:8:43 + \_part_select: RndCnstMaskingLfsrSeed (work@aes_cipher_core.RndCnstMaskingLfsrSeed), line:8:15, endln:8:43 |vpiParent: - \_ref_obj: RndCnstMaskingLfsrSeed (work@aes_cipher_core.RndCnstMaskingLfsrSeed), line:8:15, endln:8:37 - |vpiParent: - \_cont_assign: , line:8:11, endln:8:43 - |vpiName:RndCnstMaskingLfsrSeed - |vpiFullName:work@aes_cipher_core.RndCnstMaskingLfsrSeed - |vpiDefName:RndCnstMaskingLfsrSeed + \_cont_assign: , line:8:11, endln:8:43 + |vpiName:RndCnstMaskingLfsrSeed + |vpiFullName:work@aes_cipher_core.RndCnstMaskingLfsrSeed + |vpiDefName:RndCnstMaskingLfsrSeed |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:8:38, endln:8:40 @@ -832,4 +830,4 @@ design: (work@aes_core) [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/tests/LongHex/dut.sv | ${SURELOG_DIR}/build/regression/LongHex/roundtrip/dut_000.sv | 7 | 15 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/LongHex/dut.sv | ${SURELOG_DIR}/build/regression/LongHex/roundtrip/dut_000.sv | 8 | 15 | \ No newline at end of file diff --git a/tests/LoopVar/LoopVar.log b/tests/LoopVar/LoopVar.log index 671a937269..220b934487 100644 --- a/tests/LoopVar/LoopVar.log +++ b/tests/LoopVar/LoopVar.log @@ -105,7 +105,7 @@ logic_net 1 module_inst 4 operation 1 range 1 -ref_obj 4 +ref_obj 3 ref_var 2 unsupported_typespec 2 === UHDM Object Stats End === @@ -128,7 +128,7 @@ logic_net 1 module_inst 4 operation 1 range 1 -ref_obj 7 +ref_obj 5 ref_var 3 unsupported_typespec 2 === UHDM Object Stats End === @@ -193,7 +193,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@dut.i), line:6:24, endln:6:25 |vpiParent: - \_foreach_stmt: (work@dut), line:5:9, endln:5:16 + \_assignment: , line:6:13, endln:6:25 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -201,17 +201,13 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.array), line:6:13, endln:6:21 |vpiParent: - \_ref_obj: (work@dut.array) - |vpiParent: - \_assignment: , line:6:13, endln:6:25 - |vpiName:array - |vpiFullName:work@dut.array + \_assignment: , line:6:13, endln:6:25 |vpiName:array |vpiFullName:work@dut.array |vpiIndex: \_ref_obj: (work@dut.i), line:6:19, endln:6:20 |vpiParent: - \_foreach_stmt: (work@dut), line:5:9, endln:5:16 + \_bit_select: (work@dut.array), line:6:13, endln:6:21 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -317,25 +313,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.array), line:6:13, endln:6:21 |vpiParent: - \_ref_obj: (work@dut.array) - |vpiParent: - \_assignment: , line:6:13, endln:6:25 - |vpiName:array - |vpiFullName:work@dut.array - |vpiActual: - \_array_var: (work@dut.array), line:2:9, endln:2:18 + \_assignment: , line:6:13, endln:6:25 |vpiName:array |vpiFullName:work@dut.array + |vpiActual: + \_array_var: (work@dut.array), line:2:9, endln:2:18 |vpiIndex: - \_ref_obj: (work@dut.array.i), line:6:19, endln:6:20 + \_ref_obj: (work@dut.i), line:6:19, endln:6:20 |vpiParent: \_bit_select: (work@dut.array), line:6:13, endln:6:21 |vpiName:i - |vpiFullName:work@dut.array.i + |vpiFullName:work@dut.i |vpiActual: \_int_var: (i), line:5:23, endln:5:24 - |vpiActual: - \_array_var: (work@dut.array), line:2:9, endln:2:18 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/MacroArgMismatch/MacroArgMismatch.log b/tests/MacroArgMismatch/MacroArgMismatch.log index b44cde5955..7e4dadc28d 100644 --- a/tests/MacroArgMismatch/MacroArgMismatch.log +++ b/tests/MacroArgMismatch/MacroArgMismatch.log @@ -188,7 +188,7 @@ design: (work@test) |vpiRhs: \_operation: , line:5:13, endln:5:15 |vpiParent: - \_event_control: , line:4:8, endln:4:22 + \_assignment: , line:5:5, endln:5:16 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@test.d), line:5:14, endln:5:15 @@ -201,7 +201,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.d), line:5:5, endln:5:6 |vpiParent: - \_event_control: , line:4:8, endln:4:22 + \_assignment: , line:5:5, endln:5:16 |vpiName:d |vpiFullName:work@test.d |vpiActual: diff --git a/tests/ModPortArrayBind/ModPortArrayBind.log b/tests/ModPortArrayBind/ModPortArrayBind.log index f1f95e7ac7..f12cf9ee5a 100644 --- a/tests/ModPortArrayBind/ModPortArrayBind.log +++ b/tests/ModPortArrayBind/ModPortArrayBind.log @@ -215,7 +215,7 @@ param_assign 2 parameter 4 port 2 range 3 -ref_obj 24 +ref_obj 16 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -245,7 +245,7 @@ param_assign 2 parameter 4 port 3 range 3 -ref_obj 35 +ref_obj 23 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ModPortArrayBind/slpp_all/surelog.uhdm ... @@ -572,19 +572,15 @@ design: (work@r5p_bus_dec) |vpiOperand: \_bit_select: (work@r5p_bus_dec.gen_loop[0].s_dec), line:23:21, endln:23:29 |vpiParent: - \_ref_obj: (work@r5p_bus_dec.gen_loop[0].s_dec) - |vpiParent: - \_operation: , line:23:21, endln:23:38 - |vpiName:s_dec - |vpiFullName:work@r5p_bus_dec.gen_loop[0].s_dec + \_operation: , line:23:21, endln:23:38 |vpiName:s_dec |vpiFullName:work@r5p_bus_dec.gen_loop[0].s_dec |vpiIndex: - \_ref_obj: (work@r5p_bus_dec.gen_loop[0].s_dec.i), line:23:27, endln:23:28 + \_ref_obj: (work@r5p_bus_dec.gen_loop[0].i), line:23:27, endln:23:28 |vpiParent: \_bit_select: (work@r5p_bus_dec.gen_loop[0].s_dec), line:23:21, endln:23:29 |vpiName:i - |vpiFullName:work@r5p_bus_dec.gen_loop[0].s_dec.i + |vpiFullName:work@r5p_bus_dec.gen_loop[0].i |vpiActual: \_parameter: (work@r5p_bus_dec.gen_loop[0].i), line:21:0 |vpiOperand: @@ -607,29 +603,27 @@ design: (work@r5p_bus_dec) \_cont_assign: , line:23:10, endln:23:38 |vpiName:m[i].vld |vpiActual: - \_bit_select: (m), line:23:10, endln:23:11 + \_bit_select: (m[i]), line:23:10, endln:23:11 |vpiParent: - \_ref_obj: (work@r5p_bus_dec.gen_loop[0].m[i]) - |vpiParent: - \_hier_path: (m[i].vld), line:23:10, endln:23:11 - |vpiName:m[i] - |vpiFullName:work@r5p_bus_dec.gen_loop[0].m[i] + \_hier_path: (m[i].vld), line:23:10, endln:23:11 |vpiName:m + |vpiFullName:m[i] + |vpiActual: + \_interface_inst: work@r5p_bus_if (work@r5p_bus_dec.m[0]), file:${SURELOG_DIR}/tests/ModPortArrayBind/dut.sv, line:12:0 |vpiIndex: - \_ref_obj: (work@r5p_bus_dec.gen_loop[0].m[i].i), line:23:12, endln:23:13 + \_ref_obj: (work@r5p_bus_dec.gen_loop[0].m[i].vld.i), line:23:12, endln:23:13 |vpiParent: - \_bit_select: (m), line:23:10, endln:23:11 + \_bit_select: (m[i]), line:23:10, endln:23:11 |vpiName:i - |vpiFullName:work@r5p_bus_dec.gen_loop[0].m[i].i + |vpiFullName:work@r5p_bus_dec.gen_loop[0].m[i].vld.i |vpiActual: \_parameter: (work@r5p_bus_dec.gen_loop[0].i), line:21:0 - |vpiActual: - \_interface_inst: work@r5p_bus_if (work@r5p_bus_dec.m[0]), file:${SURELOG_DIR}/tests/ModPortArrayBind/dut.sv, line:12:0 |vpiActual: - \_ref_obj: (vld) + \_ref_obj: (m[i].vld) |vpiParent: \_hier_path: (m[i].vld), line:23:10, endln:23:11 |vpiName:vld + |vpiFullName:m[i].vld |vpiActual: \_logic_var: (vld), line:4:17, endln:4:20 |vpiGenScopeArray: @@ -665,19 +659,15 @@ design: (work@r5p_bus_dec) |vpiOperand: \_bit_select: (work@r5p_bus_dec.gen_loop[1].s_dec), line:23:21, endln:23:29 |vpiParent: - \_ref_obj: (work@r5p_bus_dec.gen_loop[1].s_dec) - |vpiParent: - \_operation: , line:23:21, endln:23:38 - |vpiName:s_dec - |vpiFullName:work@r5p_bus_dec.gen_loop[1].s_dec + \_operation: , line:23:21, endln:23:38 |vpiName:s_dec |vpiFullName:work@r5p_bus_dec.gen_loop[1].s_dec |vpiIndex: - \_ref_obj: (work@r5p_bus_dec.gen_loop[1].s_dec.i), line:23:27, endln:23:28 + \_ref_obj: (work@r5p_bus_dec.gen_loop[1].i), line:23:27, endln:23:28 |vpiParent: \_bit_select: (work@r5p_bus_dec.gen_loop[1].s_dec), line:23:21, endln:23:29 |vpiName:i - |vpiFullName:work@r5p_bus_dec.gen_loop[1].s_dec.i + |vpiFullName:work@r5p_bus_dec.gen_loop[1].i |vpiActual: \_parameter: (work@r5p_bus_dec.gen_loop[1].i), line:21:0 |vpiOperand: @@ -700,29 +690,27 @@ design: (work@r5p_bus_dec) \_cont_assign: , line:23:10, endln:23:38 |vpiName:m[i].vld |vpiActual: - \_bit_select: (m), line:23:10, endln:23:11 + \_bit_select: (m[i]), line:23:10, endln:23:11 |vpiParent: - \_ref_obj: (work@r5p_bus_dec.gen_loop[1].m[i]) - |vpiParent: - \_hier_path: (m[i].vld), line:23:10, endln:23:11 - |vpiName:m[i] - |vpiFullName:work@r5p_bus_dec.gen_loop[1].m[i] + \_hier_path: (m[i].vld), line:23:10, endln:23:11 |vpiName:m + |vpiFullName:m[i] + |vpiActual: + \_interface_inst: work@r5p_bus_if (work@r5p_bus_dec.m[1]), file:${SURELOG_DIR}/tests/ModPortArrayBind/dut.sv, line:12:0 |vpiIndex: - \_ref_obj: (work@r5p_bus_dec.gen_loop[1].m[i].i), line:23:12, endln:23:13 + \_ref_obj: (work@r5p_bus_dec.gen_loop[1].m[i].vld.i), line:23:12, endln:23:13 |vpiParent: - \_bit_select: (m), line:23:10, endln:23:11 + \_bit_select: (m[i]), line:23:10, endln:23:11 |vpiName:i - |vpiFullName:work@r5p_bus_dec.gen_loop[1].m[i].i + |vpiFullName:work@r5p_bus_dec.gen_loop[1].m[i].vld.i |vpiActual: \_parameter: (work@r5p_bus_dec.gen_loop[1].i), line:21:0 - |vpiActual: - \_interface_inst: work@r5p_bus_if (work@r5p_bus_dec.m[1]), file:${SURELOG_DIR}/tests/ModPortArrayBind/dut.sv, line:12:0 |vpiActual: - \_ref_obj: (vld) + \_ref_obj: (m[i].vld) |vpiParent: \_hier_path: (m[i].vld), line:23:10, endln:23:11 |vpiName:vld + |vpiFullName:m[i].vld |vpiActual: \_logic_var: (vld), line:4:17, endln:4:20 =================== diff --git a/tests/ModPortHighConn/ModPortHighConn.log b/tests/ModPortHighConn/ModPortHighConn.log index 7d66533c34..b9b928fa50 100644 --- a/tests/ModPortHighConn/ModPortHighConn.log +++ b/tests/ModPortHighConn/ModPortHighConn.log @@ -57,7 +57,7 @@ operation 3 port 14 range 3 ref_module 2 -ref_obj 25 +ref_obj 10 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ModPortHighConn/slpp_unit/surelog.uhdm ... @@ -145,9 +145,6 @@ design: (work@top) |vpiName:port0 |vpiHighConn: \_bit_select: (topA), line:7:30, endln:7:37 - |vpiParent: - \_ref_obj: (topA) - |vpiName:topA |vpiName:topA |vpiIndex: \_constant: , line:7:35, endln:7:36 @@ -162,9 +159,6 @@ design: (work@top) |vpiName:port1 |vpiHighConn: \_bit_select: (topB), line:7:47, endln:7:54 - |vpiParent: - \_ref_obj: (topB) - |vpiName:topB |vpiName:topB |vpiIndex: \_constant: , line:7:52, endln:7:53 @@ -190,10 +184,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topA), line:10:23, endln:10:30 |vpiParent: - \_ref_obj: (topA) - |vpiParent: - \_operation: , line:10:23, endln:10:39 - |vpiName:topA + \_operation: , line:10:23, endln:10:39 |vpiName:topA |vpiIndex: \_constant: , line:10:28, endln:10:29 @@ -206,10 +197,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topA), line:10:32, endln:10:39 |vpiParent: - \_ref_obj: (topA) - |vpiParent: - \_operation: , line:10:23, endln:10:39 - |vpiName:topA + \_operation: , line:10:23, endln:10:39 |vpiName:topA |vpiIndex: \_constant: , line:10:37, endln:10:38 @@ -223,9 +211,6 @@ design: (work@top) \_port: , line:10:41, endln:10:48 |vpiHighConn: \_bit_select: (topB), line:10:41, endln:10:48 - |vpiParent: - \_ref_obj: (topB) - |vpiName:topB |vpiName:topB |vpiIndex: \_constant: , line:10:46, endln:10:47 @@ -312,9 +297,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topA), line:7:30, endln:7:37 - |vpiParent: - \_ref_obj: (topA) - |vpiName:topA |vpiName:topA |vpiIndex: \_constant: , line:7:35, endln:7:36 @@ -340,9 +322,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topB), line:7:47, endln:7:54 - |vpiParent: - \_ref_obj: (topB) - |vpiName:topB |vpiName:topB |vpiIndex: \_constant: , line:7:52, endln:7:53 @@ -395,9 +374,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topA), line:8:23, endln:8:30 - |vpiParent: - \_ref_obj: (topA) - |vpiName:topA |vpiName:topA |vpiIndex: \_constant: , line:8:28, endln:8:29 @@ -423,9 +399,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topB), line:8:32, endln:8:39 - |vpiParent: - \_ref_obj: (topB) - |vpiName:topB |vpiName:topB |vpiIndex: \_constant: , line:8:37, endln:8:38 @@ -478,9 +451,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topA), line:9:23, endln:9:30 - |vpiParent: - \_ref_obj: (topA) - |vpiName:topA |vpiName:topA |vpiIndex: \_constant: , line:9:28, endln:9:29 @@ -510,10 +480,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topB), line:9:32, endln:9:39 |vpiParent: - \_ref_obj: (topB) - |vpiParent: - \_operation: , line:9:32, endln:9:48 - |vpiName:topB + \_operation: , line:9:32, endln:9:48 |vpiName:topB |vpiIndex: \_constant: , line:9:37, endln:9:38 @@ -526,10 +493,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topB), line:9:41, endln:9:48 |vpiParent: - \_ref_obj: (topB) - |vpiParent: - \_operation: , line:9:32, endln:9:48 - |vpiName:topB + \_operation: , line:9:32, endln:9:48 |vpiName:topB |vpiIndex: \_constant: , line:9:46, endln:9:47 @@ -586,10 +550,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topA), line:10:23, endln:10:30 |vpiParent: - \_ref_obj: (topA) - |vpiParent: - \_operation: , line:10:23, endln:10:39 - |vpiName:topA + \_operation: , line:10:23, endln:10:39 |vpiName:topA |vpiIndex: \_constant: , line:10:28, endln:10:29 @@ -602,10 +563,7 @@ design: (work@top) |vpiOperand: \_bit_select: (topA), line:10:32, endln:10:39 |vpiParent: - \_ref_obj: (topA) - |vpiParent: - \_operation: , line:10:23, endln:10:39 - |vpiName:topA + \_operation: , line:10:23, endln:10:39 |vpiName:topA |vpiIndex: \_constant: , line:10:37, endln:10:38 @@ -631,9 +589,6 @@ design: (work@top) |vpiDirection:3 |vpiHighConn: \_bit_select: (topB), line:10:41, endln:10:48 - |vpiParent: - \_ref_obj: (topB) - |vpiName:topB |vpiName:topB |vpiIndex: \_constant: , line:10:46, endln:10:47 diff --git a/tests/ModPortParam/ModPortParam.log b/tests/ModPortParam/ModPortParam.log index 0f89e0ae76..b839d24afc 100644 --- a/tests/ModPortParam/ModPortParam.log +++ b/tests/ModPortParam/ModPortParam.log @@ -266,7 +266,7 @@ design: (work@Core) |vpiName:perfCounterIF |vpiFullName:work@Core.perfCounterIF |vpiActual: - \_interface_inst: work@PerformanceCounterIF (work@Core.perfCounterIF), file:${SURELOG_DIR}/tests/ModPortParam/dut.sv, line:14:2, endln:14:40 + \_interface_inst: work@PerformanceCounterIF (work@Core.perfCounterIF), file:${SURELOG_DIR}/tests/ModPortParam/dut.sv, line:14:0 |vpiLowConn: \_ref_obj: (work@Core.csrUnit.perfCounter), line:16:19, endln:16:32 |vpiParent: diff --git a/tests/MultContAssign/MultContAssign.log b/tests/MultContAssign/MultContAssign.log index 0c759d50ef..bf391a284a 100644 --- a/tests/MultContAssign/MultContAssign.log +++ b/tests/MultContAssign/MultContAssign.log @@ -581,7 +581,7 @@ operation 10 param_assign 2 parameter 2 port 6 -ref_obj 49 +ref_obj 48 sys_func_call 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -608,7 +608,7 @@ operation 18 param_assign 2 parameter 2 port 9 -ref_obj 81 +ref_obj 80 sys_func_call 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/MultContAssign/slpp_all/surelog.uhdm ... @@ -1070,10 +1070,7 @@ design: (work@top) |vpiOperand: \_bit_select: (lru_flags), line:39:31, endln:39:43 |vpiParent: - \_ref_obj: (lru_flags) - |vpiParent: - \_operation: , line:39:30, endln:39:43 - |vpiName:lru_flags + \_operation: , line:39:30, endln:39:43 |vpiName:lru_flags |vpiIndex: \_constant: , line:39:41, endln:39:42 diff --git a/tests/MultiConcatValueSize/MultiConcatValueSize.log b/tests/MultiConcatValueSize/MultiConcatValueSize.log index 6dbb0c3465..eded549e1e 100644 --- a/tests/MultiConcatValueSize/MultiConcatValueSize.log +++ b/tests/MultiConcatValueSize/MultiConcatValueSize.log @@ -823,7 +823,7 @@ parameter 26 port 13 range 48 ref_module 5 -ref_obj 37 +ref_obj 36 ref_var 1 string_typespec 19 struct_typespec 23 @@ -869,7 +869,7 @@ parameter 26 port 25 range 48 ref_module 5 -ref_obj 67 +ref_obj 66 ref_var 1 string_typespec 19 struct_typespec 23 @@ -1001,7 +1001,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads), line:14:19, endln:14:27 |vpiParent: - \_struct_typespec: (pinmux_pkg::target_cfg_t), line:13:12, endln:13:18 + \_operation: , line:14:19, endln:14:29 |vpiName:NDioPads |vpiFullName:pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads |vpiActual: diff --git a/tests/MultiIndexBind/MultiIndexBind.log b/tests/MultiIndexBind/MultiIndexBind.log index 03bd33e007..ba03b70e1f 100644 --- a/tests/MultiIndexBind/MultiIndexBind.log +++ b/tests/MultiIndexBind/MultiIndexBind.log @@ -200,7 +200,7 @@ module_inst 5 packed_array_typespec 1 packed_array_var 1 range 5 -ref_obj 6 +ref_obj 5 struct_typespec 2 struct_var 1 typespec_member 3 @@ -222,7 +222,7 @@ module_inst 5 packed_array_typespec 1 packed_array_var 1 range 5 -ref_obj 12 +ref_obj 10 struct_typespec 2 struct_var 1 typespec_member 3 @@ -355,30 +355,29 @@ design: (work@PreDecodeStage) \_cont_assign: , line:28:8, endln:28:48 |vpiName:microOps[i][1].operand.intOp.aluCode |vpiActual: - \_bit_select: (microOps), line:28:12, endln:28:20 + \_bit_select: (microOps[i]), line:28:12, endln:28:20 |vpiParent: - \_ref_obj: (work@PreDecodeStage.microOps[i]) - |vpiParent: - \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 - |vpiName:microOps[i] - |vpiFullName:work@PreDecodeStage.microOps[i] + \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:microOps + |vpiFullName:microOps[i] |vpiIndex: \_ref_obj: (i), line:28:21, endln:28:22 |vpiName:i |vpiActual: \_logic_net: (i) |vpiActual: - \_bit_select: ([1]), line:28:21, endln:28:22 - |vpiName:[1] + \_bit_select: (microOps[i][1]), line:28:21, endln:28:22 + |vpiParent: + \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 + |vpiFullName:microOps[i][1] + |vpiActual: + \_packed_array_var: (work@PreDecodeStage.microOps), line:26:19, endln:26:27 |vpiIndex: \_constant: , line:28:24, endln:28:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_packed_array_var: (work@PreDecodeStage.microOps), line:26:19, endln:26:27 |vpiActual: \_ref_obj: (operand), line:28:27, endln:28:34 |vpiParent: @@ -390,10 +389,11 @@ design: (work@PreDecodeStage) \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:intOp |vpiActual: - \_ref_obj: (aluCode), line:28:41, endln:28:48 + \_ref_obj: (work@PreDecodeStage.aluCode), line:28:41, endln:28:48 |vpiParent: \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:aluCode + |vpiFullName:work@PreDecodeStage.aluCode |vpiLhs: \_ref_obj: (work@PreDecodeStage.o), line:28:8, endln:28:9 |vpiParent: @@ -484,29 +484,26 @@ design: (work@PreDecodeStage) \_cont_assign: , line:28:8, endln:28:48 |vpiName:microOps[i][1].operand.intOp.aluCode |vpiActual: - \_bit_select: (microOps), line:28:12, endln:28:20 + \_bit_select: (microOps[i]), line:28:12, endln:28:20 |vpiParent: - \_ref_obj: (work@PreDecodeStage.microOps[i]) - |vpiParent: - \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 - |vpiName:microOps[i] - |vpiFullName:work@PreDecodeStage.microOps[i] + \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:microOps + |vpiFullName:microOps[i] + |vpiActual: + \_packed_array_var: (work@PreDecodeStage.microOps), line:26:19, endln:26:27 |vpiIndex: - \_ref_obj: (work@PreDecodeStage.microOps[i].i), line:28:21, endln:28:22 + \_ref_obj: (work@PreDecodeStage.microOps[i][1].operand.intOp.aluCode.i), line:28:21, endln:28:22 |vpiParent: - \_bit_select: (microOps), line:28:12, endln:28:20 + \_bit_select: (microOps[i]), line:28:12, endln:28:20 |vpiName:i - |vpiFullName:work@PreDecodeStage.microOps[i].i + |vpiFullName:work@PreDecodeStage.microOps[i][1].operand.intOp.aluCode.i |vpiActual: \_logic_net: (i) - |vpiActual: - \_packed_array_var: (work@PreDecodeStage.microOps), line:26:19, endln:26:27 |vpiActual: - \_bit_select: ([1]), line:28:21, endln:28:22 + \_bit_select: (microOps[i][1]), line:28:21, endln:28:22 |vpiParent: \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 - |vpiName:[1] + |vpiFullName:microOps[i][1] |vpiIndex: \_constant: , line:28:24, endln:28:25 |vpiActual: @@ -524,10 +521,11 @@ design: (work@PreDecodeStage) |vpiActual: \_typespec_member: (intOp), line:16:27, endln:16:32 |vpiActual: - \_ref_obj: (aluCode), line:28:41, endln:28:48 + \_ref_obj: (work@PreDecodeStage.aluCode), line:28:41, endln:28:48 |vpiParent: \_hier_path: (microOps[i][1].operand.intOp.aluCode), line:28:12, endln:28:48 |vpiName:aluCode + |vpiFullName:work@PreDecodeStage.aluCode |vpiActual: \_typespec_member: (aluCode), line:11:17, endln:11:24 |vpiLhs: diff --git a/tests/MultiSelect/MultiSelect.log b/tests/MultiSelect/MultiSelect.log index 496256bd63..49e3e6f560 100644 --- a/tests/MultiSelect/MultiSelect.log +++ b/tests/MultiSelect/MultiSelect.log @@ -366,6 +366,8 @@ design: (work@top) \_cont_assign: , line:5:9, endln:5:23 |vpiName:a |vpiFullName:work@top.a + |vpiActual: + \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiIndex: \_constant: , line:5:11, endln:5:12 |vpiParent: @@ -394,6 +396,8 @@ design: (work@top) \_cont_assign: , line:6:9, endln:6:23 |vpiName:a |vpiFullName:work@top.a + |vpiActual: + \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiIndex: \_constant: , line:6:11, endln:6:12 |vpiParent: @@ -422,6 +426,8 @@ design: (work@top) \_cont_assign: , line:7:9, endln:7:23 |vpiName:a |vpiFullName:work@top.a + |vpiActual: + \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiIndex: \_constant: , line:7:11, endln:7:12 |vpiParent: @@ -450,6 +456,8 @@ design: (work@top) \_cont_assign: , line:8:9, endln:8:23 |vpiName:a |vpiFullName:work@top.a + |vpiActual: + \_array_var: (work@top.a), line:2:8, endln:2:15 |vpiIndex: \_constant: , line:8:11, endln:8:12 |vpiParent: diff --git a/tests/NameCollisionBind/NameCollisionBind.log b/tests/NameCollisionBind/NameCollisionBind.log index bf85c27bd8..805d3928a0 100644 --- a/tests/NameCollisionBind/NameCollisionBind.log +++ b/tests/NameCollisionBind/NameCollisionBind.log @@ -233,10 +233,11 @@ design: (work@CSR_Unit) \_hier_path: (perfCounter.perfCounter.numLoadMiss), line:25:18, endln:25:53 |vpiName:perfCounter |vpiActual: - \_ref_obj: (numLoadMiss), line:25:42, endln:25:53 + \_ref_obj: (work@CSR_Unit.numLoadMiss), line:25:42, endln:25:53 |vpiParent: \_hier_path: (perfCounter.perfCounter.numLoadMiss), line:25:18, endln:25:53 |vpiName:numLoadMiss + |vpiFullName:work@CSR_Unit.numLoadMiss |vpiLhs: \_ref_obj: (work@CSR_Unit.mshrID), line:25:9, endln:25:15 |vpiParent: @@ -358,10 +359,11 @@ design: (work@CSR_Unit) |vpiActual: \_struct_var: (perfCounter), line:13:21, endln:13:32 |vpiActual: - \_ref_obj: (numLoadMiss), line:25:42, endln:25:53 + \_ref_obj: (work@CSR_Unit.numLoadMiss), line:25:42, endln:25:53 |vpiParent: \_hier_path: (perfCounter.perfCounter.numLoadMiss), line:25:18, endln:25:53 |vpiName:numLoadMiss + |vpiFullName:work@CSR_Unit.numLoadMiss |vpiActual: \_typespec_member: (numLoadMiss), line:6:10, endln:6:21 |vpiLhs: diff --git a/tests/NamedEventHierPath/NamedEventHierPath.log b/tests/NamedEventHierPath/NamedEventHierPath.log index 8a73012d19..4622de21c2 100644 --- a/tests/NamedEventHierPath/NamedEventHierPath.log +++ b/tests/NamedEventHierPath/NamedEventHierPath.log @@ -226,10 +226,11 @@ design: (unnamed) |vpiActual: \_class_var: (pack::uvm_event_base::do_copy::e), line:7:16, endln:7:17 |vpiActual: - \_ref_obj: (m_event), line:9:13, endln:9:20 + \_ref_obj: (pack::uvm_event_base::do_copy::m_event), line:9:13, endln:9:20 |vpiParent: \_hier_path: (e.m_event), line:9:11, endln:9:20 |vpiName:m_event + |vpiFullName:pack::uvm_event_base::do_copy::m_event |vpiActual: \_named_event: (pack::uvm_event_base::m_event), line:4:23, endln:4:30 |vpiLhs: diff --git a/tests/NegInt/NegInt.log b/tests/NegInt/NegInt.log index 65fcfbb8dc..b5a038853b 100644 --- a/tests/NegInt/NegInt.log +++ b/tests/NegInt/NegInt.log @@ -146,7 +146,7 @@ module_inst 4 operation 8 param_assign 2 parameter 2 -ref_obj 11 +ref_obj 8 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -166,7 +166,7 @@ module_inst 4 operation 8 param_assign 2 parameter 2 -ref_obj 11 +ref_obj 8 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -280,26 +280,24 @@ design: (work@find_first_one) |vpiOperand: \_bit_select: (in_i), line:3:35, endln:3:50 |vpiParent: - \_ref_obj: (in_i) - |vpiParent: - \_operation: , line:3:28, endln:3:60 - |vpiName:in_i + \_operation: , line:3:28, endln:3:60 |vpiName:in_i |vpiIndex: \_operation: , line:3:40, endln:3:49 |vpiParent: - \_operation: , line:3:28, endln:3:60 + \_bit_select: (in_i), line:3:35, endln:3:50 |vpiOpType:11 |vpiOperand: \_operation: , line:3:40, endln:3:47 |vpiParent: - \_operation: , line:3:28, endln:3:60 + \_operation: , line:3:40, endln:3:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (WIDTH), line:3:40, endln:3:45 + \_ref_obj: (in_i.WIDTH), line:3:40, endln:3:45 |vpiParent: - \_operation: , line:3:28, endln:3:60 + \_operation: , line:3:40, endln:3:47 |vpiName:WIDTH + |vpiFullName:in_i.WIDTH |vpiOperand: \_constant: , line:3:46, endln:3:47 |vpiParent: @@ -309,37 +307,31 @@ design: (work@find_first_one) |UINT:1 |vpiConstType:9 |vpiOperand: - \_ref_obj: (i), line:3:48, endln:3:49 + \_ref_obj: (in_i.i), line:3:48, endln:3:49 |vpiParent: \_operation: , line:3:40, endln:3:49 |vpiName:i + |vpiFullName:in_i.i |vpiOperand: \_bit_select: (in_i), line:3:53, endln:3:60 |vpiParent: - \_ref_obj: (in_i) - |vpiParent: - \_operation: , line:3:28, endln:3:60 - |vpiName:in_i + \_operation: , line:3:28, endln:3:60 |vpiName:in_i |vpiIndex: \_ref_obj: (i), line:3:58, endln:3:59 |vpiParent: - \_operation: , line:3:28, endln:3:60 + \_bit_select: (in_i), line:3:53, endln:3:60 |vpiName:i |vpiLhs: \_bit_select: (in_tmp), line:3:16, endln:3:25 |vpiParent: - \_ref_obj: (in_tmp) - |vpiParent: - \_cont_assign: , line:3:16, endln:3:60 - |vpiName:in_tmp + \_cont_assign: , line:3:16, endln:3:60 |vpiName:in_tmp |vpiIndex: - \_ref_obj: (in_tmp.i), line:3:23, endln:3:24 + \_ref_obj: (i), line:3:23, endln:3:24 |vpiParent: \_bit_select: (in_tmp), line:3:16, endln:3:25 |vpiName:i - |vpiFullName:in_tmp.i |uhdmtopModules: \_module_inst: work@find_first_one (work@find_first_one), file:${SURELOG_DIR}/tests/NegInt/dut.sv, line:1:1, endln:5:10 |vpiName:work@find_first_one diff --git a/tests/NegParam/NegParam.log b/tests/NegParam/NegParam.log index 82cde19263..68ce7f2d51 100644 --- a/tests/NegParam/NegParam.log +++ b/tests/NegParam/NegParam.log @@ -592,7 +592,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (ConcatW), line:20:32, endln:20:39 |vpiParent: - \_sys_func_call: ($clog2), line:20:25, endln:20:42 + \_operation: , line:20:32, endln:20:41 |vpiName:ConcatW |vpiOperand: \_constant: , line:20:40, endln:20:41 @@ -629,6 +629,8 @@ design: (work@top) |vpiOpType:8 |vpiOperand: \_sys_func_call: ($clog2), line:21:41, endln:21:52 + |vpiParent: + \_operation: , line:21:39, endln:21:52 |vpiArgument: \_ref_obj: (InW), line:21:48, endln:21:51 |vpiParent: diff --git a/tests/NetLValue/NetLValue.log b/tests/NetLValue/NetLValue.log index 1e1df323c5..0bd79f1908 100644 --- a/tests/NetLValue/NetLValue.log +++ b/tests/NetLValue/NetLValue.log @@ -161,7 +161,7 @@ module_inst 3 packed_array_typespec 1 packed_array_var 1 range 2 -ref_obj 5 +ref_obj 3 struct_typespec 1 struct_var 1 typespec_member 1 @@ -183,7 +183,7 @@ module_inst 3 packed_array_typespec 1 packed_array_var 1 range 2 -ref_obj 10 +ref_obj 6 struct_typespec 1 struct_var 1 typespec_member 1 @@ -258,17 +258,14 @@ design: (work@t) |vpiRhs: \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiParent: - \_begin: (work@t), line:6:16, endln:9:7 + \_assignment: , line:7:6, endln:7:16 |vpiName:s[0].x |vpiActual: - \_bit_select: (s), line:7:10, endln:7:11 + \_bit_select: (s[0]), line:7:10, endln:7:11 |vpiParent: - \_ref_obj: (work@t.s[0]) - |vpiParent: - \_hier_path: (s[0].x), line:7:10, endln:7:16 - |vpiName:s[0] - |vpiFullName:work@t.s[0] + \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiName:s + |vpiFullName:s[0] |vpiIndex: \_constant: , line:7:12, endln:7:13 |vpiDecompile:0 @@ -276,14 +273,15 @@ design: (work@t) |UINT:0 |vpiConstType:9 |vpiActual: - \_ref_obj: (x), line:7:15, endln:7:16 + \_ref_obj: (work@t.x), line:7:15, endln:7:16 |vpiParent: \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiName:x + |vpiFullName:work@t.x |vpiLhs: \_ref_obj: (work@t.y), line:7:6, endln:7:7 |vpiParent: - \_begin: (work@t), line:6:16, endln:9:7 + \_assignment: , line:7:6, endln:7:16 |vpiName:y |vpiFullName:work@t.y |vpiActual: @@ -296,8 +294,6 @@ design: (work@t) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:15, endln:8:16 - |vpiParent: - \_assignment: , line:8:6, endln:8:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -305,17 +301,14 @@ design: (work@t) |vpiLhs: \_hier_path: (s[1].x), line:8:6, endln:8:7 |vpiParent: - \_begin: (work@t), line:6:16, endln:9:7 + \_assignment: , line:8:6, endln:8:16 |vpiName:s[1].x |vpiActual: - \_bit_select: (s), line:8:6, endln:8:7 + \_bit_select: (s[1]), line:8:6, endln:8:7 |vpiParent: - \_ref_obj: (work@t.s[1]) - |vpiParent: - \_hier_path: (s[1].x), line:8:6, endln:8:7 - |vpiName:s[1] - |vpiFullName:work@t.s[1] + \_hier_path: (s[1].x), line:8:6, endln:8:7 |vpiName:s + |vpiFullName:s[1] |vpiIndex: \_constant: , line:8:8, endln:8:9 |vpiDecompile:1 @@ -323,10 +316,11 @@ design: (work@t) |UINT:1 |vpiConstType:9 |vpiActual: - \_ref_obj: (x) + \_ref_obj: (s[1].x) |vpiParent: \_hier_path: (s[1].x), line:8:6, endln:8:7 |vpiName:x + |vpiFullName:s[1].x |vpiAlwaysType:2 |uhdmtopModules: \_module_inst: work@t (work@t), file:${SURELOG_DIR}/tests/NetLValue/dut.sv, line:1:1, endln:10:10 @@ -399,23 +393,21 @@ design: (work@t) \_assignment: , line:7:6, endln:7:16 |vpiName:s[0].x |vpiActual: - \_bit_select: (s), line:7:10, endln:7:11 + \_bit_select: (s[0]), line:7:10, endln:7:11 |vpiParent: - \_ref_obj: (work@t.s[0]) - |vpiParent: - \_hier_path: (s[0].x), line:7:10, endln:7:16 - |vpiName:s[0] - |vpiFullName:work@t.s[0] + \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiName:s - |vpiIndex: - \_constant: , line:7:12, endln:7:13 + |vpiFullName:s[0] |vpiActual: \_packed_array_var: (work@t.s), line:3:11, endln:3:12 + |vpiIndex: + \_constant: , line:7:12, endln:7:13 |vpiActual: - \_ref_obj: (x), line:7:15, endln:7:16 + \_ref_obj: (work@t.x), line:7:15, endln:7:16 |vpiParent: \_hier_path: (s[0].x), line:7:10, endln:7:16 |vpiName:x + |vpiFullName:work@t.x |vpiActual: \_typespec_member: (x), line:2:25, endln:2:26 |vpiLhs: @@ -440,23 +432,21 @@ design: (work@t) \_assignment: , line:8:6, endln:8:16 |vpiName:s[1].x |vpiActual: - \_bit_select: (s), line:8:6, endln:8:7 + \_bit_select: (s[1]), line:8:6, endln:8:7 |vpiParent: - \_ref_obj: (work@t.s[1]) - |vpiParent: - \_hier_path: (s[1].x), line:8:6, endln:8:7 - |vpiName:s[1] - |vpiFullName:work@t.s[1] + \_hier_path: (s[1].x), line:8:6, endln:8:7 |vpiName:s - |vpiIndex: - \_constant: , line:8:8, endln:8:9 + |vpiFullName:s[1] |vpiActual: \_packed_array_var: (work@t.s), line:3:11, endln:3:12 + |vpiIndex: + \_constant: , line:8:8, endln:8:9 |vpiActual: - \_ref_obj: (x) + \_ref_obj: (s[1].x) |vpiParent: \_hier_path: (s[1].x), line:8:6, endln:8:7 |vpiName:x + |vpiFullName:s[1].x |vpiActual: \_typespec_member: (x), line:2:25, endln:2:26 |vpiAlwaysType:2 diff --git a/tests/NetType/NetType.log b/tests/NetType/NetType.log index 3d4df31a9b..7d5a2aa737 100644 --- a/tests/NetType/NetType.log +++ b/tests/NetType/NetType.log @@ -241,7 +241,7 @@ module_inst 3 range 2 real_typespec 8 real_var 2 -ref_obj 9 +ref_obj 8 ref_var 2 struct_typespec 3 struct_var 1 @@ -267,7 +267,7 @@ module_inst 3 range 2 real_typespec 8 real_var 2 -ref_obj 9 +ref_obj 8 ref_var 2 struct_typespec 3 struct_var 1 @@ -488,8 +488,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:29:17, endln:29:20 - |vpiParent: - \_assignment: , line:29:3, endln:29:20 |vpiDecompile:0.0 |vpiSize:64 |REAL:0.000000 @@ -497,7 +495,7 @@ design: (work@dut) |vpiLhs: \_hier_path: (Tsum.field1), line:29:3, endln:29:14 |vpiParent: - \_begin: (Tsum) + \_assignment: , line:29:3, endln:29:20 |vpiName:Tsum.field1 |vpiActual: \_ref_obj: (Tsum) @@ -544,34 +542,34 @@ design: (work@dut) |vpiRhs: \_hier_path: (driver[i].field1), line:31:20, endln:31:36 |vpiParent: - \_foreach_stmt: (Tsum), line:30:3, endln:30:10 + \_assignment: , line:31:5, endln:31:36 |vpiName:driver[i].field1 |vpiActual: - \_bit_select: (driver), line:31:20, endln:31:26 + \_bit_select: (driver[i]), line:31:20, endln:31:26 |vpiParent: - \_ref_obj: (Tsum.driver[i]) - |vpiParent: - \_hier_path: (driver[i].field1), line:31:20, endln:31:36 - |vpiName:driver[i] - |vpiFullName:Tsum.driver[i] + \_hier_path: (driver[i].field1), line:31:20, endln:31:36 |vpiName:driver + |vpiFullName:driver[i] + |vpiActual: + \_io_decl: (driver), line:28:36, endln:28:42 |vpiIndex: \_ref_obj: (Tsum.i), line:31:27, endln:31:28 |vpiParent: - \_foreach_stmt: (Tsum), line:30:3, endln:30:10 + \_assignment: , line:31:5, endln:31:36 |vpiName:i |vpiFullName:Tsum.i |vpiActual: \_ref_var: (Tsum.i), line:30:19, endln:30:20 |vpiActual: - \_ref_obj: (field1), line:31:30, endln:31:36 + \_ref_obj: (Tsum.field1), line:31:30, endln:31:36 |vpiParent: \_hier_path: (driver[i].field1), line:31:20, endln:31:36 |vpiName:field1 + |vpiFullName:Tsum.field1 |vpiLhs: \_hier_path: (Tsum.field1), line:31:5, endln:31:16 |vpiParent: - \_foreach_stmt: (Tsum), line:30:3, endln:30:10 + \_assignment: , line:31:5, endln:31:36 |vpiName:Tsum.field1 |vpiActual: \_ref_obj: (Tsum) diff --git a/tests/OldLibrary/OldLibrary.log b/tests/OldLibrary/OldLibrary.log index 3892e5d00d..8cfb4b5b40 100644 --- a/tests/OldLibrary/OldLibrary.log +++ b/tests/OldLibrary/OldLibrary.log @@ -2,27 +2,27 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/top.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/top.v:1:1: No timescale set for "top". -[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2". +[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3". [WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: No timescale set for "CELL1". -[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3". +[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2". [INF:CP0300] Compilation... diff --git a/tests/OneAnd/OneAnd.log b/tests/OneAnd/OneAnd.log index 51c8a6d935..65ebaf3e43 100644 --- a/tests/OneAnd/OneAnd.log +++ b/tests/OneAnd/OneAnd.log @@ -759,8 +759,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:11:10, endln:11:14 - |vpiParent: - \_assignment: , line:11:6, endln:11:14 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -768,7 +766,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.a), line:11:6, endln:11:7 |vpiParent: - \_begin: (work@and_tb), line:10:3, endln:26:6 + \_assignment: , line:11:6, endln:11:14 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -781,8 +779,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:12:10, endln:12:14 - |vpiParent: - \_assignment: , line:12:6, endln:12:14 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -790,7 +786,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.b), line:12:6, endln:12:7 |vpiParent: - \_begin: (work@and_tb), line:10:3, endln:26:6 + \_assignment: , line:12:6, endln:12:14 |vpiName:b |vpiFullName:work@and_tb.b |vpiActual: @@ -812,7 +808,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.o), line:13:16, endln:13:17 |vpiParent: - \_delay_control: , line:13:6, endln:13:8 + \_operation: , line:13:16, endln:13:28 |vpiName:o |vpiFullName:work@and_tb.o |vpiActual: @@ -825,7 +821,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.a), line:13:22, endln:13:23 |vpiParent: - \_operation: , line:13:16, endln:13:28 + \_operation: , line:13:22, endln:13:27 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -885,8 +881,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:10, endln:15:14 - |vpiParent: - \_assignment: , line:15:6, endln:15:14 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -894,7 +888,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.a), line:15:6, endln:15:7 |vpiParent: - \_delay_control: , line:14:6, endln:14:8 + \_assignment: , line:15:6, endln:15:14 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -907,8 +901,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:10, endln:16:14 - |vpiParent: - \_assignment: , line:16:6, endln:16:14 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -916,7 +908,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.b), line:16:6, endln:16:7 |vpiParent: - \_begin: (work@and_tb), line:10:3, endln:26:6 + \_assignment: , line:16:6, endln:16:14 |vpiName:b |vpiFullName:work@and_tb.b |vpiActual: @@ -938,7 +930,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.o), line:17:16, endln:17:17 |vpiParent: - \_delay_control: , line:17:6, endln:17:8 + \_operation: , line:17:16, endln:17:28 |vpiName:o |vpiFullName:work@and_tb.o |vpiActual: @@ -951,7 +943,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.a), line:17:22, endln:17:23 |vpiParent: - \_operation: , line:17:16, endln:17:28 + \_operation: , line:17:22, endln:17:27 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -1011,8 +1003,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:10, endln:19:14 - |vpiParent: - \_assignment: , line:19:6, endln:19:14 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1020,7 +1010,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.a), line:19:6, endln:19:7 |vpiParent: - \_delay_control: , line:18:6, endln:18:8 + \_assignment: , line:19:6, endln:19:14 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -1033,8 +1023,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:20:10, endln:20:14 - |vpiParent: - \_assignment: , line:20:6, endln:20:14 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -1042,7 +1030,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.b), line:20:6, endln:20:7 |vpiParent: - \_begin: (work@and_tb), line:10:3, endln:26:6 + \_assignment: , line:20:6, endln:20:14 |vpiName:b |vpiFullName:work@and_tb.b |vpiActual: @@ -1064,7 +1052,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.o), line:21:16, endln:21:17 |vpiParent: - \_delay_control: , line:21:6, endln:21:8 + \_operation: , line:21:16, endln:21:28 |vpiName:o |vpiFullName:work@and_tb.o |vpiActual: @@ -1077,7 +1065,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.a), line:21:22, endln:21:23 |vpiParent: - \_operation: , line:21:16, endln:21:28 + \_operation: , line:21:22, endln:21:27 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -1137,8 +1125,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:23:10, endln:23:14 - |vpiParent: - \_assignment: , line:23:6, endln:23:14 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1146,7 +1132,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.a), line:23:6, endln:23:7 |vpiParent: - \_delay_control: , line:22:6, endln:22:8 + \_assignment: , line:23:6, endln:23:14 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: @@ -1159,8 +1145,6 @@ design: (work@and_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:10, endln:24:14 - |vpiParent: - \_assignment: , line:24:6, endln:24:14 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1168,7 +1152,7 @@ design: (work@and_tb) |vpiLhs: \_ref_obj: (work@and_tb.b), line:24:6, endln:24:7 |vpiParent: - \_begin: (work@and_tb), line:10:3, endln:26:6 + \_assignment: , line:24:6, endln:24:14 |vpiName:b |vpiFullName:work@and_tb.b |vpiActual: @@ -1190,7 +1174,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.o), line:25:16, endln:25:17 |vpiParent: - \_delay_control: , line:25:6, endln:25:8 + \_operation: , line:25:16, endln:25:28 |vpiName:o |vpiFullName:work@and_tb.o |vpiActual: @@ -1203,7 +1187,7 @@ design: (work@and_tb) |vpiOperand: \_ref_obj: (work@and_tb.a), line:25:22, endln:25:23 |vpiParent: - \_operation: , line:25:16, endln:25:28 + \_operation: , line:25:22, endln:25:27 |vpiName:a |vpiFullName:work@and_tb.a |vpiActual: diff --git a/tests/OneClock/OneClock.log b/tests/OneClock/OneClock.log index 4b6bf7bec4..fb76f6c71b 100644 --- a/tests/OneClock/OneClock.log +++ b/tests/OneClock/OneClock.log @@ -123,8 +123,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:12:11, endln:12:12 - |vpiParent: - \_assignment: , line:12:5, endln:12:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -132,7 +130,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:12:5, endln:12:8 |vpiParent: - \_begin: (work@tb), line:11:3, endln:13:6 + \_assignment: , line:12:5, endln:12:12 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: @@ -155,7 +153,7 @@ design: (work@tb) |vpiRhs: \_operation: , line:16:14, endln:16:18 |vpiParent: - \_delay_control: , line:16:5, endln:16:7 + \_assignment: , line:16:8, endln:16:18 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@tb.clk), line:16:15, endln:16:18 @@ -168,7 +166,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:16:8, endln:16:11 |vpiParent: - \_delay_control: , line:16:5, endln:16:7 + \_assignment: , line:16:8, endln:16:18 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: diff --git a/tests/OneDivider/OneDivider.log b/tests/OneDivider/OneDivider.log index 967cf7a684..1ded0e17ad 100644 --- a/tests/OneDivider/OneDivider.log +++ b/tests/OneDivider/OneDivider.log @@ -178,8 +178,6 @@ design: (work@tb) |vpiOpType:82 |vpiRhs: \_constant: , line:7:18, endln:7:19 - |vpiParent: - \_assignment: , line:7:11, endln:7:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -187,7 +185,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@dut.div), line:7:11, endln:7:14 |vpiParent: - \_if_else: , line:6:8, endln:9:23 + \_assignment: , line:7:11, endln:7:19 |vpiName:div |vpiFullName:work@dut.div |vpiActual: @@ -200,7 +198,7 @@ design: (work@tb) |vpiRhs: \_operation: , line:9:18, endln:9:22 |vpiParent: - \_if_else: , line:6:8, endln:9:23 + \_assignment: , line:9:11, endln:9:22 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@dut.div), line:9:19, endln:9:22 @@ -213,7 +211,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@dut.div), line:9:11, endln:9:14 |vpiParent: - \_if_else: , line:6:8, endln:9:23 + \_assignment: , line:9:11, endln:9:22 |vpiName:div |vpiFullName:work@dut.div |vpiActual: @@ -382,8 +380,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:14:12, endln:14:13 - |vpiParent: - \_assignment: , line:14:5, endln:14:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -391,7 +387,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.rstn), line:14:5, endln:14:9 |vpiParent: - \_begin: (work@tb), line:13:3, endln:17:6 + \_assignment: , line:14:5, endln:14:13 |vpiName:rstn |vpiFullName:work@tb.rstn |vpiActual: @@ -404,8 +400,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:11, endln:15:12 - |vpiParent: - \_assignment: , line:15:5, endln:15:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -413,7 +407,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:15:5, endln:15:8 |vpiParent: - \_begin: (work@tb), line:13:3, endln:17:6 + \_assignment: , line:15:5, endln:15:12 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: @@ -431,8 +425,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:16:15, endln:16:16 - |vpiParent: - \_assignment: , line:16:8, endln:16:16 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -440,7 +432,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.rstn), line:16:8, endln:16:12 |vpiParent: - \_delay_control: , line:16:5, endln:16:7 + \_assignment: , line:16:8, endln:16:16 |vpiName:rstn |vpiFullName:work@tb.rstn |vpiActual: @@ -463,7 +455,7 @@ design: (work@tb) |vpiRhs: \_operation: , line:20:14, endln:20:18 |vpiParent: - \_delay_control: , line:20:5, endln:20:7 + \_assignment: , line:20:8, endln:20:18 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@tb.clk), line:20:15, endln:20:18 @@ -476,7 +468,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:20:8, endln:20:11 |vpiParent: - \_delay_control: , line:20:5, endln:20:7 + \_assignment: , line:20:8, endln:20:18 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: diff --git a/tests/OneFF/OneFF.log b/tests/OneFF/OneFF.log index a42bd2129f..32f4582be6 100644 --- a/tests/OneFF/OneFF.log +++ b/tests/OneFF/OneFF.log @@ -198,8 +198,6 @@ design: (work@tb) |vpiOpType:82 |vpiRhs: \_constant: , line:10:16, endln:10:17 - |vpiParent: - \_assignment: , line:10:11, endln:10:17 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -207,7 +205,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@dut.q), line:10:11, endln:10:12 |vpiParent: - \_if_else: , line:9:8, endln:12:18 + \_assignment: , line:10:11, endln:10:17 |vpiName:q |vpiFullName:work@dut.q |vpiActual: @@ -220,7 +218,7 @@ design: (work@tb) |vpiRhs: \_ref_obj: (work@dut.d), line:12:16, endln:12:17 |vpiParent: - \_if_else: , line:9:8, endln:12:18 + \_assignment: , line:12:11, endln:12:17 |vpiName:d |vpiFullName:work@dut.d |vpiActual: @@ -228,7 +226,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@dut.q), line:12:11, endln:12:12 |vpiParent: - \_if_else: , line:9:8, endln:12:18 + \_assignment: , line:12:11, endln:12:17 |vpiName:q |vpiFullName:work@dut.q |vpiActual: @@ -356,8 +354,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:12, endln:17:13 - |vpiParent: - \_assignment: , line:17:5, endln:17:13 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -365,7 +361,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.rstn), line:17:5, endln:17:9 |vpiParent: - \_begin: (work@tb), line:16:5, endln:26:6 + \_assignment: , line:17:5, endln:17:13 |vpiName:rstn |vpiFullName:work@tb.rstn |vpiActual: @@ -378,8 +374,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:18:11, endln:18:12 - |vpiParent: - \_assignment: , line:18:5, endln:18:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -387,7 +381,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:18:5, endln:18:8 |vpiParent: - \_begin: (work@tb), line:16:5, endln:26:6 + \_assignment: , line:18:5, endln:18:12 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: @@ -400,8 +394,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:19:9, endln:19:10 - |vpiParent: - \_assignment: , line:19:5, endln:19:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -409,7 +401,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.d), line:19:5, endln:19:6 |vpiParent: - \_begin: (work@tb), line:16:5, endln:26:6 + \_assignment: , line:19:5, endln:19:10 |vpiName:d |vpiFullName:work@tb.d |vpiActual: @@ -427,8 +419,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:20:15, endln:20:16 - |vpiParent: - \_assignment: , line:20:8, endln:20:16 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -436,7 +426,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.rstn), line:20:8, endln:20:12 |vpiParent: - \_delay_control: , line:20:5, endln:20:7 + \_assignment: , line:20:8, endln:20:16 |vpiName:rstn |vpiFullName:work@tb.rstn |vpiActual: @@ -453,7 +443,7 @@ design: (work@tb) |vpiOperand: \_ref_obj: (work@tb.o), line:21:12, endln:21:13 |vpiParent: - \_begin: (work@tb), line:16:5, endln:26:6 + \_operation: , line:21:12, endln:21:18 |vpiName:o |vpiFullName:work@tb.o |vpiActual: @@ -513,8 +503,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:22:13, endln:22:14 - |vpiParent: - \_assignment: , line:22:9, endln:22:14 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -522,7 +510,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.d), line:22:9, endln:22:10 |vpiParent: - \_delay_control: , line:22:5, endln:22:8 + \_assignment: , line:22:9, endln:22:14 |vpiName:d |vpiFullName:work@tb.d |vpiActual: @@ -544,7 +532,7 @@ design: (work@tb) |vpiOperand: \_ref_obj: (work@tb.o), line:23:15, endln:23:16 |vpiParent: - \_delay_control: , line:23:5, endln:23:7 + \_operation: , line:23:15, endln:23:21 |vpiName:o |vpiFullName:work@tb.o |vpiActual: @@ -604,8 +592,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:13, endln:24:14 - |vpiParent: - \_assignment: , line:24:9, endln:24:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -613,7 +599,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.d), line:24:9, endln:24:10 |vpiParent: - \_delay_control: , line:24:5, endln:24:8 + \_assignment: , line:24:9, endln:24:14 |vpiName:d |vpiFullName:work@tb.d |vpiActual: @@ -635,7 +621,7 @@ design: (work@tb) |vpiOperand: \_ref_obj: (work@tb.o), line:25:16, endln:25:17 |vpiParent: - \_delay_control: , line:25:5, endln:25:8 + \_operation: , line:25:16, endln:25:22 |vpiName:o |vpiFullName:work@tb.o |vpiActual: @@ -700,7 +686,7 @@ design: (work@tb) |vpiRhs: \_operation: , line:29:14, endln:29:18 |vpiParent: - \_delay_control: , line:29:5, endln:29:7 + \_assignment: , line:29:8, endln:29:18 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@tb.clk), line:29:15, endln:29:18 @@ -713,7 +699,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.clk), line:29:8, endln:29:11 |vpiParent: - \_delay_control: , line:29:5, endln:29:7 + \_assignment: , line:29:8, endln:29:18 |vpiName:clk |vpiFullName:work@tb.clk |vpiActual: diff --git a/tests/OneNetInterf/OneNetInterf.log b/tests/OneNetInterf/OneNetInterf.log index a8fe7a6529..3ce39211dc 100644 --- a/tests/OneNetInterf/OneNetInterf.log +++ b/tests/OneNetInterf/OneNetInterf.log @@ -210,8 +210,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:13, endln:6:14 - |vpiParent: - \_assignment: , line:6:5, endln:6:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -219,7 +217,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@tb.tb.drive), line:6:5, endln:6:10 |vpiParent: - \_begin: (work@tb.tb), line:2:11, endln:11:6 + \_assignment: , line:6:5, endln:6:14 |vpiName:drive |vpiFullName:work@tb.tb.drive |vpiActual: @@ -241,7 +239,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@tb.tb.drive), line:7:15, endln:7:20 |vpiParent: - \_delay_control: , line:7:5, endln:7:7 + \_operation: , line:7:15, endln:7:31 |vpiName:drive |vpiFullName:work@tb.tb.drive |vpiActual: @@ -301,8 +299,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:16, endln:8:17 - |vpiParent: - \_assignment: , line:8:8, endln:8:17 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -310,7 +306,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@tb.tb.drive), line:8:8, endln:8:13 |vpiParent: - \_delay_control: , line:8:5, endln:8:7 + \_assignment: , line:8:8, endln:8:17 |vpiName:drive |vpiFullName:work@tb.tb.drive |vpiActual: @@ -332,7 +328,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@tb.tb.drive), line:9:15, endln:9:20 |vpiParent: - \_delay_control: , line:9:5, endln:9:7 + \_operation: , line:9:15, endln:9:31 |vpiName:drive |vpiFullName:work@tb.tb.drive |vpiActual: diff --git a/tests/OneNetModPort/OneNetModPort.log b/tests/OneNetModPort/OneNetModPort.log index 7ed6c2abf6..68f2cfa42b 100644 --- a/tests/OneNetModPort/OneNetModPort.log +++ b/tests/OneNetModPort/OneNetModPort.log @@ -187,10 +187,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:5:51, endln:5:56 + \_ref_obj: (work@TOP.tb.drive), line:5:51, endln:5:56 |vpiParent: \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiArgument: \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiParent: @@ -202,10 +203,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:5:63, endln:5:70 + \_ref_obj: (work@TOP.tb.observe), line:5:63, endln:5:70 |vpiParent: \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiName:$monitor |vpiStmt: \_assignment: , line:6:5, endln:6:19 @@ -215,8 +217,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:18, endln:6:19 - |vpiParent: - \_assignment: , line:6:5, endln:6:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -224,7 +224,7 @@ design: (work@TOP) |vpiLhs: \_hier_path: (intf.drive), line:6:5, endln:6:15 |vpiParent: - \_begin: (work@TOP.tb), line:2:11, endln:11:6 + \_assignment: , line:6:5, endln:6:19 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf) @@ -253,7 +253,7 @@ design: (work@TOP) |vpiOperand: \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiParent: - \_delay_control: , line:7:5, endln:7:7 + \_operation: , line:7:15, endln:7:41 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf), line:7:15, endln:7:19 @@ -261,10 +261,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:7:20, endln:7:25 + \_ref_obj: (work@TOP.tb.drive), line:7:20, endln:7:25 |vpiParent: \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiOperand: \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiParent: @@ -276,10 +277,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:7:34, endln:7:41 + \_ref_obj: (work@TOP.tb.observe), line:7:34, endln:7:41 |vpiParent: \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiStmt: \_sys_func_call: ($display), line:7:43, endln:7:58 |vpiParent: @@ -327,8 +329,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:23, endln:8:24 - |vpiParent: - \_assignment: , line:8:10, endln:8:24 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -336,7 +336,7 @@ design: (work@TOP) |vpiLhs: \_hier_path: (intf.drive), line:8:10, endln:8:20 |vpiParent: - \_delay_control: , line:8:5, endln:8:9 + \_assignment: , line:8:10, endln:8:24 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf) @@ -365,7 +365,7 @@ design: (work@TOP) |vpiOperand: \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiParent: - \_delay_control: , line:9:5, endln:9:7 + \_operation: , line:9:15, endln:9:41 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf), line:9:15, endln:9:19 @@ -373,10 +373,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:9:20, endln:9:25 + \_ref_obj: (work@TOP.tb.drive), line:9:20, endln:9:25 |vpiParent: \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiOperand: \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiParent: @@ -388,10 +389,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:9:34, endln:9:41 + \_ref_obj: (work@TOP.tb.observe), line:9:34, endln:9:41 |vpiParent: \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiStmt: \_sys_func_call: ($display), line:9:43, endln:9:58 |vpiParent: @@ -623,10 +625,11 @@ design: (work@TOP) \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:conntb |vpiActual: - \_ref_obj: (observe), line:4:21, endln:4:28 + \_ref_obj: (work@dut.observe), line:4:21, endln:4:28 |vpiParent: \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:observe + |vpiFullName:work@dut.observe |vpiLhs: \_ref_obj: (work@dut.o), line:4:10, endln:4:11 |vpiParent: diff --git a/tests/OneNetModPortGeneric/OneNetModPortGeneric.log b/tests/OneNetModPortGeneric/OneNetModPortGeneric.log index 0c424dec1e..a9b1760d2a 100644 --- a/tests/OneNetModPortGeneric/OneNetModPortGeneric.log +++ b/tests/OneNetModPortGeneric/OneNetModPortGeneric.log @@ -201,10 +201,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:5:51, endln:5:56 + \_ref_obj: (work@TOP.tb.drive), line:5:51, endln:5:56 |vpiParent: \_hier_path: (intf.drive), line:5:46, endln:5:56 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiArgument: \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiParent: @@ -216,10 +217,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:5:63, endln:5:70 + \_ref_obj: (work@TOP.tb.observe), line:5:63, endln:5:70 |vpiParent: \_hier_path: (intf.observe), line:5:58, endln:5:70 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiName:$monitor |vpiStmt: \_assignment: , line:6:5, endln:6:19 @@ -229,8 +231,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:18, endln:6:19 - |vpiParent: - \_assignment: , line:6:5, endln:6:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -238,7 +238,7 @@ design: (work@TOP) |vpiLhs: \_hier_path: (intf.drive), line:6:5, endln:6:15 |vpiParent: - \_begin: (work@TOP.tb), line:2:11, endln:11:6 + \_assignment: , line:6:5, endln:6:19 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf) @@ -267,7 +267,7 @@ design: (work@TOP) |vpiOperand: \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiParent: - \_delay_control: , line:7:5, endln:7:7 + \_operation: , line:7:15, endln:7:41 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf), line:7:15, endln:7:19 @@ -275,10 +275,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:7:20, endln:7:25 + \_ref_obj: (work@TOP.tb.drive), line:7:20, endln:7:25 |vpiParent: \_hier_path: (intf.drive), line:7:15, endln:7:25 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiOperand: \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiParent: @@ -290,10 +291,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:7:34, endln:7:41 + \_ref_obj: (work@TOP.tb.observe), line:7:34, endln:7:41 |vpiParent: \_hier_path: (intf.observe), line:7:29, endln:7:41 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiStmt: \_sys_func_call: ($display), line:7:43, endln:7:58 |vpiParent: @@ -341,8 +343,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:23, endln:8:24 - |vpiParent: - \_assignment: , line:8:10, endln:8:24 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -350,7 +350,7 @@ design: (work@TOP) |vpiLhs: \_hier_path: (intf.drive), line:8:10, endln:8:20 |vpiParent: - \_delay_control: , line:8:5, endln:8:9 + \_assignment: , line:8:10, endln:8:24 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf) @@ -379,7 +379,7 @@ design: (work@TOP) |vpiOperand: \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiParent: - \_delay_control: , line:9:5, endln:9:7 + \_operation: , line:9:15, endln:9:41 |vpiName:intf.drive |vpiActual: \_ref_obj: (intf), line:9:15, endln:9:19 @@ -387,10 +387,11 @@ design: (work@TOP) \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:intf |vpiActual: - \_ref_obj: (drive), line:9:20, endln:9:25 + \_ref_obj: (work@TOP.tb.drive), line:9:20, endln:9:25 |vpiParent: \_hier_path: (intf.drive), line:9:15, endln:9:25 |vpiName:drive + |vpiFullName:work@TOP.tb.drive |vpiOperand: \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiParent: @@ -402,10 +403,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:9:34, endln:9:41 + \_ref_obj: (work@TOP.tb.observe), line:9:34, endln:9:41 |vpiParent: \_hier_path: (intf.observe), line:9:29, endln:9:41 |vpiName:observe + |vpiFullName:work@TOP.tb.observe |vpiStmt: \_sys_func_call: ($display), line:9:43, endln:9:58 |vpiParent: @@ -500,10 +502,11 @@ design: (work@TOP) \_hier_path: (intf.observe), line:31:17, endln:31:29 |vpiName:intf |vpiActual: - \_ref_obj: (observe), line:31:22, endln:31:29 + \_ref_obj: (work@OBSERVER.observe), line:31:22, endln:31:29 |vpiParent: \_hier_path: (intf.observe), line:31:17, endln:31:29 |vpiName:observe + |vpiFullName:work@OBSERVER.observe |vpiLhs: \_ref_obj: (work@OBSERVER.obs), line:31:11, endln:31:14 |vpiParent: @@ -756,10 +759,11 @@ design: (work@TOP) \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:conntb |vpiActual: - \_ref_obj: (observe), line:4:21, endln:4:28 + \_ref_obj: (work@dut.observe), line:4:21, endln:4:28 |vpiParent: \_hier_path: (conntb.observe), line:4:14, endln:4:28 |vpiName:observe + |vpiFullName:work@dut.observe |vpiLhs: \_ref_obj: (work@dut.o), line:4:10, endln:4:11 |vpiParent: diff --git a/tests/OneNetNonAnsi/OneNetNonAnsi.log b/tests/OneNetNonAnsi/OneNetNonAnsi.log index 3331cf2877..3ad7fd7715 100644 --- a/tests/OneNetNonAnsi/OneNetNonAnsi.log +++ b/tests/OneNetNonAnsi/OneNetNonAnsi.log @@ -224,8 +224,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:13:9, endln:13:10 - |vpiParent: - \_assignment: , line:13:5, endln:13:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -233,7 +231,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.i), line:13:5, endln:13:6 |vpiParent: - \_begin: (work@tb), line:12:3, endln:17:6 + \_assignment: , line:13:5, endln:13:10 |vpiName:i |vpiFullName:work@tb.i |vpiActual: @@ -255,7 +253,7 @@ design: (work@tb) |vpiOperand: \_ref_obj: (work@tb.i), line:14:15, endln:14:16 |vpiParent: - \_delay_control: , line:14:5, endln:14:7 + \_operation: , line:14:15, endln:14:21 |vpiName:i |vpiFullName:work@tb.i |vpiActual: @@ -315,8 +313,6 @@ design: (work@tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:15:12, endln:15:13 - |vpiParent: - \_assignment: , line:15:8, endln:15:13 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -324,7 +320,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.i), line:15:8, endln:15:9 |vpiParent: - \_delay_control: , line:15:5, endln:15:7 + \_assignment: , line:15:8, endln:15:13 |vpiName:i |vpiFullName:work@tb.i |vpiActual: @@ -346,7 +342,7 @@ design: (work@tb) |vpiOperand: \_ref_obj: (work@tb.i), line:16:15, endln:16:16 |vpiParent: - \_delay_control: , line:16:5, endln:16:7 + \_operation: , line:16:15, endln:16:21 |vpiName:i |vpiFullName:work@tb.i |vpiActual: diff --git a/tests/OneNetRange/OneNetRange.log b/tests/OneNetRange/OneNetRange.log index 9cfa3ec2b7..f27b8700bb 100644 --- a/tests/OneNetRange/OneNetRange.log +++ b/tests/OneNetRange/OneNetRange.log @@ -256,8 +256,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:6:13, endln:6:16 - |vpiParent: - \_assignment: , line:6:5, endln:6:16 |vpiDecompile:000 |vpiSize:64 |UINT:0 @@ -265,7 +263,7 @@ design: (work@TOP) |vpiLhs: \_ref_obj: (work@TOP.tb.drive), line:6:5, endln:6:10 |vpiParent: - \_begin: (work@TOP.tb), line:2:11, endln:12:6 + \_assignment: , line:6:5, endln:6:16 |vpiName:drive |vpiFullName:work@TOP.tb.drive |vpiActual: @@ -287,7 +285,7 @@ design: (work@TOP) |vpiOperand: \_ref_obj: (work@TOP.tb.drive), line:7:15, endln:7:20 |vpiParent: - \_delay_control: , line:7:5, endln:7:7 + \_operation: , line:7:15, endln:7:31 |vpiName:drive |vpiFullName:work@TOP.tb.drive |vpiActual: @@ -347,8 +345,6 @@ design: (work@TOP) |vpiBlocking:1 |vpiRhs: \_constant: , line:8:16, endln:8:19 - |vpiParent: - \_assignment: , line:8:8, endln:8:19 |vpiDecompile:111 |vpiSize:64 |UINT:111 @@ -356,7 +352,7 @@ design: (work@TOP) |vpiLhs: \_ref_obj: (work@TOP.tb.drive), line:8:8, endln:8:13 |vpiParent: - \_delay_control: , line:8:5, endln:8:7 + \_assignment: , line:8:8, endln:8:19 |vpiName:drive |vpiFullName:work@TOP.tb.drive |vpiActual: @@ -378,7 +374,7 @@ design: (work@TOP) |vpiOperand: \_ref_obj: (work@TOP.tb.drive), line:9:15, endln:9:20 |vpiParent: - \_delay_control: , line:9:5, endln:9:7 + \_operation: , line:9:15, endln:9:31 |vpiName:drive |vpiFullName:work@TOP.tb.drive |vpiActual: diff --git a/tests/OpTypespec/OpTypespec.log b/tests/OpTypespec/OpTypespec.log index 83295a2212..5cdae85f43 100644 --- a/tests/OpTypespec/OpTypespec.log +++ b/tests/OpTypespec/OpTypespec.log @@ -187,7 +187,7 @@ param_assign 4 parameter 6 range 10 ref_module 1 -ref_obj 5 +ref_obj 4 string_typespec 20 struct_typespec 7 tagged_pattern 20 @@ -209,7 +209,7 @@ param_assign 4 parameter 6 range 10 ref_module 1 -ref_obj 5 +ref_obj 4 string_typespec 20 struct_typespec 7 tagged_pattern 20 diff --git a/tests/PackDataType/PackDataType.log b/tests/PackDataType/PackDataType.log index c7d8d5dacf..a50d90dc49 100644 --- a/tests/PackDataType/PackDataType.log +++ b/tests/PackDataType/PackDataType.log @@ -670,7 +670,7 @@ design: (work@kmac_keymgr) |vpiOperand: \_ref_obj: (keymgr_pkg::keymgr_pkg::kmac_data_rsp_t::KeyWidth), line:8:12, endln:8:20 |vpiParent: - \_struct_typespec: (keymgr_pkg::kmac_data_rsp_t), line:5:10, endln:5:16 + \_operation: , line:8:12, endln:8:23 |vpiName:KeyWidth |vpiFullName:keymgr_pkg::keymgr_pkg::kmac_data_rsp_t::KeyWidth |vpiActual: diff --git a/tests/PackFunc/PackFunc.log b/tests/PackFunc/PackFunc.log index 8e5e6852f4..1badd04e34 100644 --- a/tests/PackFunc/PackFunc.log +++ b/tests/PackFunc/PackFunc.log @@ -404,7 +404,7 @@ design: (unnamed) |vpiName:y |vpiFullName:aa::foo_bar::y |vpiActual: - \_struct_var: (aa::foo_bar::y), line:14:5, endln:14:17 + \_struct_var: (y), line:14:5, endln:14:17 |vpiLhs: \_ref_obj: (aa::foo_bar::foo_bar), line:18:7, endln:18:14 |vpiParent: @@ -412,7 +412,7 @@ design: (unnamed) |vpiName:foo_bar |vpiFullName:aa::foo_bar::foo_bar |vpiActual: - \_struct_var: , line:10:22, endln:10:34 + \_struct_var: (foo_bar), line:10:22, endln:10:34 |vpiInstance: \_package: aa (aa::), file:${SURELOG_DIR}/tests/PackFunc/dut.sv, line:8:1, endln:22:11 |uhdmtopPackages: @@ -529,7 +529,7 @@ design: (unnamed) |vpiName:y |vpiFullName:aa::foo_bar::y |vpiActual: - \_struct_var: (aa::foo_bar::y), line:14:5, endln:14:17 + \_struct_var: (y), line:14:5, endln:14:17 |vpiLhs: \_ref_obj: (aa::foo_bar::foo_bar), line:18:7, endln:18:14 |vpiParent: @@ -537,7 +537,7 @@ design: (unnamed) |vpiName:foo_bar |vpiFullName:aa::foo_bar::foo_bar |vpiActual: - \_struct_var: , line:10:22, endln:10:34 + \_struct_var: (foo_bar), line:10:22, endln:10:34 |vpiInstance: \_package: aa (aa::), file:${SURELOG_DIR}/tests/PackFunc/dut.sv, line:8:1, endln:22:11 =================== diff --git a/tests/PackFuncParent/PackFuncParent.log b/tests/PackFuncParent/PackFuncParent.log index 1be7928c59..7d53a612c2 100644 --- a/tests/PackFuncParent/PackFuncParent.log +++ b/tests/PackFuncParent/PackFuncParent.log @@ -260,7 +260,7 @@ param_assign 6 parameter 6 port 2 range 22 -ref_obj 13 +ref_obj 9 return_stmt 4 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -284,7 +284,7 @@ param_assign 6 parameter 6 port 3 range 22 -ref_obj 23 +ref_obj 15 return_stmt 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PackFuncParent/slpp_all/surelog.uhdm ... @@ -494,16 +494,14 @@ design: (work@top) |vpiParent: \_assignment: , line:8:7, endln:8:55 |vpiArgument: - \_indexed_part_select: , line:8:47, endln:8:53 + \_indexed_part_select: state_in (my_pkg::sbox4_16bit::state_in), line:8:47, endln:8:53 |vpiParent: - \_ref_obj: state_in (my_pkg::sbox4_16bit::state_in) - |vpiParent: - \_func_call: (sbox4_8bit), line:8:27, endln:8:55 - |vpiName:state_in - |vpiFullName:my_pkg::sbox4_16bit::state_in - |vpiDefName:state_in - |vpiActual: - \_io_decl: (state_in), line:6:61, endln:6:69 + \_func_call: (sbox4_8bit), line:8:27, endln:8:55 + |vpiName:state_in + |vpiFullName:my_pkg::sbox4_16bit::state_in + |vpiDefName:state_in + |vpiActual: + \_io_decl: (state_in), line:6:61, endln:6:69 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -522,16 +520,14 @@ design: (work@top) |vpiFunction: \_function: (my_pkg::sbox4_8bit), line:2:4, endln:4:28 |vpiLhs: - \_indexed_part_select: , line:8:7, endln:8:24 + \_indexed_part_select: state_out (my_pkg::sbox4_16bit::state_out), line:8:7, endln:8:24 |vpiParent: - \_ref_obj: state_out (my_pkg::sbox4_16bit::state_out) - |vpiParent: - \_assignment: , line:8:7, endln:8:55 - |vpiName:state_out - |vpiFullName:my_pkg::sbox4_16bit::state_out - |vpiDefName:state_out - |vpiActual: - \_logic_var: (my_pkg::sbox4_16bit::state_out), line:7:20, endln:7:29 + \_assignment: , line:8:7, endln:8:55 + |vpiName:state_out + |vpiFullName:my_pkg::sbox4_16bit::state_out + |vpiDefName:state_out + |vpiActual: + \_logic_var: (my_pkg::sbox4_16bit::state_out), line:7:20, endln:7:29 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -756,16 +752,14 @@ design: (work@top) |vpiParent: \_assignment: , line:8:7, endln:8:55 |vpiArgument: - \_indexed_part_select: , line:8:47, endln:8:53 + \_indexed_part_select: state_in (my_pkg::sbox4_16bit::state_in), line:8:47, endln:8:53 |vpiParent: - \_ref_obj: state_in (my_pkg::sbox4_16bit::state_in) - |vpiParent: - \_func_call: (sbox4_8bit), line:8:27, endln:8:55 - |vpiName:state_in - |vpiFullName:my_pkg::sbox4_16bit::state_in - |vpiDefName:state_in - |vpiActual: - \_io_decl: (state_in), line:6:61, endln:6:69 + \_func_call: (sbox4_8bit), line:8:27, endln:8:55 + |vpiName:state_in + |vpiFullName:my_pkg::sbox4_16bit::state_in + |vpiDefName:state_in + |vpiActual: + \_io_decl: (state_in), line:6:61, endln:6:69 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -784,16 +778,14 @@ design: (work@top) |vpiFunction: \_function: (my_pkg::sbox4_8bit), line:2:4, endln:4:28 |vpiLhs: - \_indexed_part_select: , line:8:7, endln:8:24 + \_indexed_part_select: state_out (my_pkg::sbox4_16bit::state_out), line:8:7, endln:8:24 |vpiParent: - \_ref_obj: state_out (my_pkg::sbox4_16bit::state_out) - |vpiParent: - \_assignment: , line:8:7, endln:8:55 - |vpiName:state_out - |vpiFullName:my_pkg::sbox4_16bit::state_out - |vpiDefName:state_out - |vpiActual: - \_logic_var: (my_pkg::sbox4_16bit::state_out), line:7:20, endln:7:29 + \_assignment: , line:8:7, endln:8:55 + |vpiName:state_out + |vpiFullName:my_pkg::sbox4_16bit::state_out + |vpiDefName:state_out + |vpiActual: + \_logic_var: (my_pkg::sbox4_16bit::state_out), line:7:20, endln:7:29 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: diff --git a/tests/PackStructField/PackStructField.log b/tests/PackStructField/PackStructField.log index 6b1ab84d5e..966d4960bb 100644 --- a/tests/PackStructField/PackStructField.log +++ b/tests/PackStructField/PackStructField.log @@ -446,12 +446,17 @@ design: (work@my_module) |vpiFullName:work@my_module |vpiActual: \_ref_obj: (my_package::my_parameter), line:21:12, endln:21:24 + |vpiParent: + \_hier_path: (work@my_module), line:21:12, endln:21:38 |vpiName:my_package::my_parameter |vpiActual: \_parameter: (my_package::my_parameter), line:9:35, endln:9:47 |vpiActual: - \_ref_obj: (a), line:21:37, endln:21:38 + \_ref_obj: (work@my_module.a), line:21:37, endln:21:38 + |vpiParent: + \_hier_path: (work@my_module), line:21:12, endln:21:38 |vpiName:a + |vpiFullName:work@my_module.a |vpiLhs: \_ref_obj: (work@my_module.x), line:21:8, endln:21:9 |vpiParent: @@ -471,12 +476,17 @@ design: (work@my_module) |vpiFullName:work@my_module |vpiActual: \_ref_obj: (my_package::my_parameter), line:22:12, endln:22:24 + |vpiParent: + \_hier_path: (work@my_module), line:22:12, endln:22:38 |vpiName:my_package::my_parameter |vpiActual: \_parameter: (my_package::my_parameter), line:9:35, endln:9:47 |vpiActual: - \_ref_obj: (b), line:22:37, endln:22:38 + \_ref_obj: (work@my_module.b), line:22:37, endln:22:38 + |vpiParent: + \_hier_path: (work@my_module), line:22:12, endln:22:38 |vpiName:b + |vpiFullName:work@my_module.b |vpiLhs: \_ref_obj: (work@my_module.y), line:22:8, endln:22:9 |vpiParent: diff --git a/tests/PackStructVar/PackStructVar.log b/tests/PackStructVar/PackStructVar.log index 412d9a97ac..2492002b7b 100644 --- a/tests/PackStructVar/PackStructVar.log +++ b/tests/PackStructVar/PackStructVar.log @@ -593,7 +593,7 @@ design: (work@flash_ctrl) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_SZW), line:28:12, endln:28:21 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:24:10, endln:24:16 + \_operation: , line:28:12, endln:28:29 |vpiName:top_pkg::TL_SZW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_SZW |vpiActual: @@ -642,7 +642,7 @@ design: (work@flash_ctrl) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AIW), line:29:12, endln:29:21 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:24:10, endln:24:16 + \_operation: , line:29:12, endln:29:29 |vpiName:top_pkg::TL_AIW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_AIW |vpiActual: @@ -691,7 +691,7 @@ design: (work@flash_ctrl) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DIW), line:30:12, endln:30:21 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:24:10, endln:24:16 + \_operation: , line:30:12, endln:30:29 |vpiName:top_pkg::TL_DIW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DIW |vpiActual: @@ -740,7 +740,7 @@ design: (work@flash_ctrl) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DW), line:31:13, endln:31:22 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:24:10, endln:24:16 + \_operation: , line:31:13, endln:31:29 |vpiName:top_pkg::TL_DW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DW |vpiActual: @@ -789,7 +789,7 @@ design: (work@flash_ctrl) |vpiOperand: \_ref_obj: (tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DUW), line:32:12, endln:32:21 |vpiParent: - \_struct_typespec: (tlul_pkg::tl_h2d_t), line:24:10, endln:24:16 + \_operation: , line:32:12, endln:32:29 |vpiName:top_pkg::TL_DUW |vpiFullName:tlul_pkg::tlul_pkg::tl_h2d_t::top_pkg::TL_DUW |vpiActual: diff --git a/tests/PackageEval/PackageEval.log b/tests/PackageEval/PackageEval.log index 86d761cd3b..2e0418e9cc 100644 --- a/tests/PackageEval/PackageEval.log +++ b/tests/PackageEval/PackageEval.log @@ -116,7 +116,7 @@ design: (unnamed) |vpiOperand: \_ref_obj: (test_pkg::MioStrapPos::NStraps), line:4:31, endln:4:38 |vpiParent: - \_parameter: (test_pkg::MioStrapPos), line:4:16, endln:4:27 + \_operation: , line:4:31, endln:4:40 |vpiName:NStraps |vpiFullName:test_pkg::MioStrapPos::NStraps |vpiActual: diff --git a/tests/PackageFuncCall/PackageFuncCall.log b/tests/PackageFuncCall/PackageFuncCall.log index a54fe2ffe2..3efcc77416 100644 --- a/tests/PackageFuncCall/PackageFuncCall.log +++ b/tests/PackageFuncCall/PackageFuncCall.log @@ -809,7 +809,7 @@ param_assign 10 parameter 10 part_select 1 range 30 -ref_obj 27 +ref_obj 20 return_stmt 2 task 9 var_select 1 @@ -855,7 +855,7 @@ param_assign 10 parameter 10 part_select 2 range 30 -ref_obj 55 +ref_obj 40 return_stmt 4 task 18 var_select 2 @@ -1383,32 +1383,26 @@ design: (work@top) |vpiRhs: \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 |vpiParent: - \_ref_obj: (prim_cipher_pkg::sbox4_64bit::sbox4) - |vpiParent: - \_assignment: , line:12:7, endln:12:54 - |vpiName:sbox4 - |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4 - |vpiActual: - \_io_decl: (sbox4), line:8:88, endln:8:93 + \_assignment: , line:12:7, endln:12:54 |vpiName:sbox4 |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4 + |vpiActual: + \_io_decl: (sbox4), line:8:88, endln:8:93 |vpiIndex: - \_indexed_part_select: , line:12:44, endln:12:52 + \_indexed_part_select: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in), line:12:44, endln:12:52 |vpiParent: - \_ref_obj: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in) - |vpiParent: - \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 - |vpiName:state_in - |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4::state_in - |vpiDefName:state_in - |vpiActual: - \_io_decl: (state_in), line:8:60, endln:8:68 + \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 + |vpiName:state_in + |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4::state_in + |vpiDefName:state_in + |vpiActual: + \_io_decl: (state_in), line:8:60, endln:8:68 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:12:44, endln:12:47 |vpiParent: - \_indexed_part_select: , line:12:44, endln:12:52 + \_indexed_part_select: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in), line:12:44, endln:12:52 |vpiOpType:25 |vpiOperand: \_ref_obj: (prim_cipher_pkg::sbox4_64bit::sbox4::state_in::k), line:12:44, endln:12:45 @@ -1432,25 +1426,21 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_io_decl: (sbox4), line:8:88, endln:8:93 |vpiLhs: - \_indexed_part_select: , line:12:7, endln:12:26 + \_indexed_part_select: state_out (prim_cipher_pkg::sbox4_64bit::state_out), line:12:7, endln:12:26 |vpiParent: - \_ref_obj: state_out (prim_cipher_pkg::sbox4_64bit::state_out) - |vpiParent: - \_assignment: , line:12:7, endln:12:54 - |vpiName:state_out - |vpiFullName:prim_cipher_pkg::sbox4_64bit::state_out - |vpiDefName:state_out - |vpiActual: - \_logic_var: (prim_cipher_pkg::sbox4_64bit::state_out), line:9:18, endln:9:27 + \_assignment: , line:12:7, endln:12:54 + |vpiName:state_out + |vpiFullName:prim_cipher_pkg::sbox4_64bit::state_out + |vpiDefName:state_out + |vpiActual: + \_logic_var: (prim_cipher_pkg::sbox4_64bit::state_out), line:9:18, endln:9:27 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:12:17, endln:12:20 |vpiParent: - \_indexed_part_select: , line:12:7, endln:12:26 + \_indexed_part_select: state_out (prim_cipher_pkg::sbox4_64bit::state_out), line:12:7, endln:12:26 |vpiOpType:25 |vpiOperand: \_ref_obj: (prim_cipher_pkg::sbox4_64bit::state_out::k), line:12:17, endln:12:18 @@ -2031,32 +2021,26 @@ design: (work@top) |vpiRhs: \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 |vpiParent: - \_ref_obj: (prim_cipher_pkg::sbox4_64bit::sbox4) - |vpiParent: - \_assignment: , line:12:7, endln:12:54 - |vpiName:sbox4 - |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4 - |vpiActual: - \_io_decl: (sbox4), line:8:88, endln:8:93 + \_assignment: , line:12:7, endln:12:54 |vpiName:sbox4 |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4 + |vpiActual: + \_io_decl: (sbox4), line:8:88, endln:8:93 |vpiIndex: - \_indexed_part_select: , line:12:44, endln:12:52 + \_indexed_part_select: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in), line:12:44, endln:12:52 |vpiParent: - \_ref_obj: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in) - |vpiParent: - \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 - |vpiName:state_in - |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4::state_in - |vpiDefName:state_in - |vpiActual: - \_io_decl: (state_in), line:8:60, endln:8:68 + \_bit_select: (prim_cipher_pkg::sbox4_64bit::sbox4), line:12:29, endln:12:54 + |vpiName:state_in + |vpiFullName:prim_cipher_pkg::sbox4_64bit::sbox4::state_in + |vpiDefName:state_in + |vpiActual: + \_io_decl: (state_in), line:8:60, endln:8:68 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:12:44, endln:12:47 |vpiParent: - \_indexed_part_select: , line:12:44, endln:12:52 + \_indexed_part_select: state_in (prim_cipher_pkg::sbox4_64bit::sbox4::state_in), line:12:44, endln:12:52 |vpiOpType:25 |vpiOperand: \_ref_obj: (prim_cipher_pkg::sbox4_64bit::sbox4::state_in::k), line:12:44, endln:12:45 @@ -2080,25 +2064,21 @@ design: (work@top) |vpiSize:64 |UINT:4 |vpiConstType:9 - |vpiActual: - \_io_decl: (sbox4), line:8:88, endln:8:93 |vpiLhs: - \_indexed_part_select: , line:12:7, endln:12:26 + \_indexed_part_select: state_out (prim_cipher_pkg::sbox4_64bit::state_out), line:12:7, endln:12:26 |vpiParent: - \_ref_obj: state_out (prim_cipher_pkg::sbox4_64bit::state_out) - |vpiParent: - \_assignment: , line:12:7, endln:12:54 - |vpiName:state_out - |vpiFullName:prim_cipher_pkg::sbox4_64bit::state_out - |vpiDefName:state_out - |vpiActual: - \_logic_var: (prim_cipher_pkg::sbox4_64bit::state_out), line:9:18, endln:9:27 + \_assignment: , line:12:7, endln:12:54 + |vpiName:state_out + |vpiFullName:prim_cipher_pkg::sbox4_64bit::state_out + |vpiDefName:state_out + |vpiActual: + \_logic_var: (prim_cipher_pkg::sbox4_64bit::state_out), line:9:18, endln:9:27 |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:12:17, endln:12:20 |vpiParent: - \_indexed_part_select: , line:12:7, endln:12:26 + \_indexed_part_select: state_out (prim_cipher_pkg::sbox4_64bit::state_out), line:12:7, endln:12:26 |vpiOpType:25 |vpiOperand: \_ref_obj: (prim_cipher_pkg::sbox4_64bit::state_out::k), line:12:17, endln:12:18 @@ -2555,27 +2535,23 @@ design: (work@top) |vpiRhs: \_operation: , line:32:22, endln:35:37 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:32:12, endln:35:37 |vpiOpType:30 |vpiOperand: \_bit_select: (work@top.p_post_round_xor.data_state), line:32:22, endln:32:51 |vpiParent: - \_ref_obj: (work@top.p_post_round_xor.data_state) - |vpiParent: - \_operation: , line:32:22, endln:35:37 - |vpiName:data_state - |vpiFullName:work@top.p_post_round_xor.data_state + \_operation: , line:32:22, endln:35:37 |vpiName:data_state |vpiFullName:work@top.p_post_round_xor.data_state |vpiIndex: \_operation: , line:32:33, endln:32:50 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_bit_select: (work@top.p_post_round_xor.data_state), line:32:22, endln:32:51 |vpiOpType:24 |vpiOperand: \_operation: , line:32:33, endln:32:48 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_operation: , line:32:33, endln:32:50 |vpiOpType:25 |vpiOperand: \_constant: , line:32:33, endln:32:34 @@ -2586,11 +2562,11 @@ design: (work@top) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (work@top.p_post_round_xor.NumRoundsHalf), line:32:35, endln:32:48 + \_ref_obj: (work@top.p_post_round_xor.data_state.NumRoundsHalf), line:32:35, endln:32:48 |vpiParent: \_operation: , line:32:33, endln:32:48 |vpiName:NumRoundsHalf - |vpiFullName:work@top.p_post_round_xor.NumRoundsHalf + |vpiFullName:work@top.p_post_round_xor.data_state.NumRoundsHalf |vpiActual: \_logic_net: (NumRoundsHalf) |vpiOperand: @@ -2602,32 +2578,33 @@ design: (work@top) |UINT:1 |vpiConstType:9 |vpiOperand: - \_var_select: (prim_cipher_pkg::PRINCE_ROUND_CONST), line:33:22, endln:35:37 + \_var_select: (work@top.p_post_round_xor), line:33:22, endln:35:37 |vpiParent: - \_parameter: (prim_cipher_pkg::PRINCE_ROUND_CONST), line:18:32, endln:18:50 - |vpiFullName:prim_cipher_pkg::PRINCE_ROUND_CONST + \_operation: , line:32:22, endln:35:37 + |vpiFullName:work@top.p_post_round_xor |vpiIndex: \_constant: , line:34:23, endln:34:25 |vpiParent: - \_var_select: (prim_cipher_pkg::PRINCE_ROUND_CONST), line:33:22, endln:35:37 + \_var_select: (work@top.p_post_round_xor), line:33:22, endln:35:37 |vpiDecompile:11 |vpiSize:64 |UINT:11 |vpiConstType:9 |vpiIndex: - \_part_select: , line:35:23, endln:35:36 + \_part_select: (work@top.p_post_round_xor), line:35:23, endln:35:36 |vpiParent: - \_var_select: (prim_cipher_pkg::PRINCE_ROUND_CONST), line:33:22, endln:35:37 + \_var_select: (work@top.p_post_round_xor), line:33:22, endln:35:37 + |vpiFullName:work@top.p_post_round_xor |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:23, endln:35:34 |vpiParent: - \_operation: , line:32:22, endln:35:37 + \_part_select: (work@top.p_post_round_xor), line:35:23, endln:35:36 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.p_post_round_xor.DataWidth), line:35:23, endln:35:32 |vpiParent: - \_operation: , line:32:22, endln:35:37 + \_operation: , line:35:23, endln:35:34 |vpiName:DataWidth |vpiFullName:work@top.p_post_round_xor.DataWidth |vpiActual: @@ -2649,7 +2626,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.p_post_round_xor.data_o), line:32:12, endln:32:18 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:32:12, endln:35:37 |vpiName:data_o |vpiFullName:work@top.p_post_round_xor.data_o |vpiActual: @@ -2663,7 +2640,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.p_post_round_xor.k1), line:36:21, endln:36:23 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:36:11, endln:36:23 |vpiName:k1 |vpiFullName:work@top.p_post_round_xor.k1 |vpiActual: @@ -2671,7 +2648,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.p_post_round_xor.data_o), line:36:11, endln:36:17 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:36:11, endln:36:23 |vpiName:data_o |vpiFullName:work@top.p_post_round_xor.data_o |vpiActual: @@ -2685,7 +2662,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.p_post_round_xor.k0_prime), line:37:22, endln:37:30 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:37:12, endln:37:30 |vpiName:k0_prime |vpiFullName:work@top.p_post_round_xor.k0_prime |vpiActual: @@ -2693,7 +2670,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.p_post_round_xor.data_o), line:37:12, endln:37:18 |vpiParent: - \_named_begin: (work@top.p_post_round_xor), line:31:14, endln:38:13 + \_assignment: , line:37:12, endln:37:30 |vpiName:data_o |vpiFullName:work@top.p_post_round_xor.data_o |vpiActual: @@ -2793,11 +2770,7 @@ design: (work@top) |vpiOperand: \_bit_select: (work@top.p_post_round_xor.data_state), line:32:22, endln:32:51 |vpiParent: - \_ref_obj: (work@top.p_post_round_xor.data_state) - |vpiParent: - \_operation: , line:32:22, endln:35:37 - |vpiName:data_state - |vpiFullName:work@top.p_post_round_xor.data_state + \_operation: , line:32:22, endln:35:37 |vpiName:data_state |vpiFullName:work@top.p_post_round_xor.data_state |vpiIndex: @@ -2830,17 +2803,15 @@ design: (work@top) |vpiIndex: \_constant: , line:34:23, endln:34:25 |vpiIndex: - \_part_select: , line:35:23, endln:35:36 + \_part_select: (work@top.p_post_round_xor), line:35:23, endln:35:36 |vpiParent: - \_ref_obj: (work@top.p_post_round_xor) - |vpiParent: - \_var_select: (work@top.p_post_round_xor), line:33:22, endln:35:37 - |vpiFullName:work@top.p_post_round_xor + \_var_select: (work@top.p_post_round_xor), line:33:22, endln:35:37 + |vpiFullName:work@top.p_post_round_xor |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:23, endln:35:34 |vpiParent: - \_part_select: , line:35:23, endln:35:36 + \_part_select: (work@top.p_post_round_xor), line:35:23, endln:35:36 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@top.p_post_round_xor.DataWidth), line:35:23, endln:35:32 diff --git a/tests/PackageNet/PackageNet.log b/tests/PackageNet/PackageNet.log index 98f9574456..6005ce8003 100644 --- a/tests/PackageNet/PackageNet.log +++ b/tests/PackageNet/PackageNet.log @@ -479,7 +479,7 @@ design: (work@test) |vpiRhs: \_operation: , line:18:7, endln:18:14 |vpiParent: - \_begin: (work@test), line:17:9, endln:19:4 + \_assignment: , line:18:3, endln:18:14 |vpiOpType:24 |vpiOperand: \_constant: , line:18:7, endln:18:9 @@ -508,7 +508,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.v), line:18:3, endln:18:4 |vpiParent: - \_begin: (work@test), line:17:9, endln:19:4 + \_assignment: , line:18:3, endln:18:14 |vpiName:v |vpiFullName:work@test.v |vpiActual: diff --git a/tests/PackageParam/PackageParam.log b/tests/PackageParam/PackageParam.log index a3cb94fdc7..4258909f4a 100644 --- a/tests/PackageParam/PackageParam.log +++ b/tests/PackageParam/PackageParam.log @@ -1061,7 +1061,7 @@ design: (unnamed) |vpiOperand: \_ref_obj: (OtpWidth), line:35:62, endln:35:70 |vpiParent: - \_sys_func_call: ($clog2), line:35:55, endln:35:73 + \_operation: , line:35:62, endln:35:72 |vpiName:OtpWidth |vpiActual: \_parameter: (otp_ctrl_pkg::OtpWidth), line:34:17, endln:34:25 diff --git a/tests/PackageTypeParam/PackageTypeParam.log b/tests/PackageTypeParam/PackageTypeParam.log index 88aa799429..23d5bc29ed 100644 --- a/tests/PackageTypeParam/PackageTypeParam.log +++ b/tests/PackageTypeParam/PackageTypeParam.log @@ -612,7 +612,7 @@ design: (work@module_a) |vpiRhs: \_ref_obj: (work@module_a.input_struct), line:24:22, endln:24:34 |vpiParent: - \_begin: (work@module_a), line:23:28, endln:25:6 + \_assignment: , line:24:5, endln:24:34 |vpiName:input_struct |vpiFullName:work@module_a.input_struct |vpiActual: @@ -620,7 +620,7 @@ design: (work@module_a) |vpiLhs: \_ref_obj: (work@module_a.output_struct), line:24:5, endln:24:18 |vpiParent: - \_begin: (work@module_a), line:23:28, endln:25:6 + \_assignment: , line:24:5, endln:24:34 |vpiName:output_struct |vpiFullName:work@module_a.output_struct |vpiActual: diff --git a/tests/PackageValue/PackageValue.log b/tests/PackageValue/PackageValue.log index bfbd44c2e6..601f79dcc8 100644 --- a/tests/PackageValue/PackageValue.log +++ b/tests/PackageValue/PackageValue.log @@ -2930,13 +2930,13 @@ design: (work@prim_diff_decode) |vpiRhs: \_ref_obj: (p_diff_fsm.IsStd), line:25:23, endln:25:28 |vpiParent: - \_begin: (p_diff_fsm), line:24:19, endln:26:12 + \_assignment: , line:25:13, endln:25:28 |vpiName:IsStd |vpiFullName:p_diff_fsm.IsStd |vpiLhs: \_ref_obj: (p_diff_fsm.state_d), line:25:13, endln:25:20 |vpiParent: - \_begin: (p_diff_fsm), line:24:19, endln:26:12 + \_assignment: , line:25:13, endln:25:28 |vpiName:state_d |vpiFullName:p_diff_fsm.state_d |vpiCaseItem: diff --git a/tests/PackedArrayAssign/PackedArrayAssign.log b/tests/PackedArrayAssign/PackedArrayAssign.log index 6659733bc5..809fddffb2 100644 --- a/tests/PackedArrayAssign/PackedArrayAssign.log +++ b/tests/PackedArrayAssign/PackedArrayAssign.log @@ -150,7 +150,7 @@ packed_array_typespec 1 packed_array_var 1 port 2 range 7 -ref_obj 4 +ref_obj 3 struct_typespec 1 struct_var 1 typespec_member 1 @@ -170,7 +170,7 @@ packed_array_typespec 1 packed_array_var 1 port 3 range 7 -ref_obj 7 +ref_obj 5 struct_typespec 1 struct_var 1 typespec_member 1 @@ -285,11 +285,7 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.a), line:7:15, endln:7:19 |vpiParent: - \_ref_obj: (work@top.a) - |vpiParent: - \_cont_assign: , line:7:11, endln:7:19 - |vpiName:a - |vpiFullName:work@top.a + \_cont_assign: , line:7:11, endln:7:19 |vpiName:a |vpiFullName:work@top.a |vpiIndex: @@ -437,19 +433,13 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.a), line:7:15, endln:7:19 |vpiParent: - \_ref_obj: (work@top.a) - |vpiParent: - \_cont_assign: , line:7:11, endln:7:19 - |vpiName:a - |vpiFullName:work@top.a - |vpiActual: - \_packed_array_var: (work@top.a), line:6:23, endln:6:43 + \_cont_assign: , line:7:11, endln:7:19 |vpiName:a |vpiFullName:work@top.a - |vpiIndex: - \_constant: , line:7:17, endln:7:18 |vpiActual: \_packed_array_var: (work@top.a), line:6:23, endln:6:43 + |vpiIndex: + \_constant: , line:7:17, endln:7:18 |vpiLhs: \_ref_obj: (work@top.o), line:7:11, endln:7:12 |vpiParent: diff --git a/tests/PackedArrayBind/PackedArrayBind.log b/tests/PackedArrayBind/PackedArrayBind.log index fb2ad5d8e8..6dcac0e235 100644 --- a/tests/PackedArrayBind/PackedArrayBind.log +++ b/tests/PackedArrayBind/PackedArrayBind.log @@ -171,7 +171,7 @@ logic_typespec 2 module_inst 3 packed_array_typespec 2 range 4 -ref_obj 5 +ref_obj 4 struct_typespec 3 struct_var 1 typespec_member 3 @@ -189,7 +189,7 @@ logic_typespec 2 module_inst 3 packed_array_typespec 2 range 4 -ref_obj 10 +ref_obj 8 struct_typespec 3 struct_var 1 typespec_member 3 @@ -367,14 +367,11 @@ design: (work@PreDecodeStage) \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:replayEntryOut |vpiActual: - \_bit_select: (memData), line:24:33, endln:24:40 + \_bit_select: (replayEntryOut.memData[0]), line:24:33, endln:24:40 |vpiParent: - \_ref_obj: (work@PreDecodeStage.memData[0]) - |vpiParent: - \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 - |vpiName:memData[0] - |vpiFullName:work@PreDecodeStage.memData[0] + \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:memData + |vpiFullName:replayEntryOut.memData[0] |vpiIndex: \_constant: , line:24:41, endln:24:42 |vpiDecompile:0 @@ -387,10 +384,11 @@ design: (work@PreDecodeStage) \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:memOpInfo |vpiActual: - \_ref_obj: (mshrID), line:24:54, endln:24:60 + \_ref_obj: (work@PreDecodeStage.mshrID), line:24:54, endln:24:60 |vpiParent: \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:mshrID + |vpiFullName:work@PreDecodeStage.mshrID |vpiLhs: \_ref_obj: (work@PreDecodeStage.mshrID), line:24:9, endln:24:15 |vpiParent: @@ -443,20 +441,15 @@ design: (work@PreDecodeStage) |vpiActual: \_struct_var: (work@PreDecodeStage.replayEntryOut), line:22:18, endln:22:32 |vpiActual: - \_bit_select: (memData), line:24:33, endln:24:40 + \_bit_select: (replayEntryOut.memData[0]), line:24:33, endln:24:40 |vpiParent: - \_ref_obj: (work@PreDecodeStage.memData[0]) - |vpiParent: - \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 - |vpiName:memData[0] - |vpiFullName:work@PreDecodeStage.memData[0] - |vpiActual: - \_typespec_member: (memData), line:17:36, endln:17:43 + \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:memData - |vpiIndex: - \_constant: , line:24:41, endln:24:42 + |vpiFullName:replayEntryOut.memData[0] |vpiActual: \_typespec_member: (memData), line:17:36, endln:17:43 + |vpiIndex: + \_constant: , line:24:41, endln:24:42 |vpiActual: \_ref_obj: (memOpInfo), line:24:44, endln:24:53 |vpiParent: @@ -465,10 +458,11 @@ design: (work@PreDecodeStage) |vpiActual: \_typespec_member: (memOpInfo), line:12:15, endln:12:24 |vpiActual: - \_ref_obj: (mshrID), line:24:54, endln:24:60 + \_ref_obj: (work@PreDecodeStage.mshrID), line:24:54, endln:24:60 |vpiParent: \_hier_path: (replayEntryOut.memData[0].memOpInfo.mshrID), line:24:18, endln:24:60 |vpiName:mshrID + |vpiFullName:work@PreDecodeStage.mshrID |vpiActual: \_typespec_member: (mshrID), line:7:20, endln:7:26 |vpiLhs: diff --git a/tests/PackedArrayHierPath/PackedArrayHierPath.log b/tests/PackedArrayHierPath/PackedArrayHierPath.log index 11ed2ca591..62f3efc24a 100644 --- a/tests/PackedArrayHierPath/PackedArrayHierPath.log +++ b/tests/PackedArrayHierPath/PackedArrayHierPath.log @@ -230,7 +230,7 @@ packed_array_typespec 4 param_assign 8 parameter 8 range 4 -ref_obj 14 +ref_obj 10 return_stmt 2 struct_typespec 4 typespec_member 8 @@ -254,7 +254,7 @@ packed_array_typespec 4 param_assign 8 parameter 8 range 4 -ref_obj 26 +ref_obj 18 return_stmt 4 struct_typespec 4 typespec_member 8 @@ -526,29 +526,27 @@ design: (unnamed) \_operation: , line:18:8, endln:18:63 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:18:8, endln:18:20 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:8, endln:18:20 |vpiParent: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiIndex: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]::fmt), line:18:21, endln:18:24 + \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:18:21, endln:18:24 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:18:8, endln:18:20 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:8, endln:18:20 |vpiName:fmt - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:17:54, endln:17:57 - |vpiActual: - \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiActual: - \_ref_obj: (exp_bits), line:18:26, endln:18:34 + \_ref_obj: (uvm::fp_width::exp_bits), line:18:26, endln:18:34 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 |vpiName:exp_bits + |vpiFullName:uvm::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:3:16, endln:3:24 |vpiOperand: @@ -557,29 +555,27 @@ design: (unnamed) \_operation: , line:18:8, endln:18:63 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:18:37, endln:18:49 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:37, endln:18:49 |vpiParent: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiIndex: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]::fmt), line:18:50, endln:18:53 + \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:18:50, endln:18:53 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:18:37, endln:18:49 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:37, endln:18:49 |vpiName:fmt - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:17:54, endln:17:57 - |vpiActual: - \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiActual: - \_ref_obj: (man_bits), line:18:55, endln:18:63 + \_ref_obj: (uvm::fp_width::man_bits), line:18:55, endln:18:63 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 |vpiName:man_bits + |vpiFullName:uvm::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:4:16, endln:4:24 |vpiOperand: @@ -835,29 +831,27 @@ design: (unnamed) \_operation: , line:18:8, endln:18:63 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:18:8, endln:18:20 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:8, endln:18:20 |vpiParent: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiIndex: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]::fmt), line:18:21, endln:18:24 + \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:18:21, endln:18:24 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:18:8, endln:18:20 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:8, endln:18:20 |vpiName:fmt - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:17:54, endln:17:57 - |vpiActual: - \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiActual: - \_ref_obj: (exp_bits), line:18:26, endln:18:34 + \_ref_obj: (uvm::fp_width::exp_bits), line:18:26, endln:18:34 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:18:8, endln:18:34 |vpiName:exp_bits + |vpiFullName:uvm::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:3:16, endln:3:24 |vpiOperand: @@ -866,29 +860,27 @@ design: (unnamed) \_operation: , line:18:8, endln:18:63 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:18:37, endln:18:49 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:37, endln:18:49 |vpiParent: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiIndex: - \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt]::fmt), line:18:50, endln:18:53 + \_ref_obj: (uvm::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:18:50, endln:18:53 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:18:37, endln:18:49 + \_bit_select: (FP_ENCODINGS[fmt]), line:18:37, endln:18:49 |vpiName:fmt - |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:uvm::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:17:54, endln:17:57 - |vpiActual: - \_parameter: (uvm::FP_ENCODINGS), line:8:47, endln:8:59 |vpiActual: - \_ref_obj: (man_bits), line:18:55, endln:18:63 + \_ref_obj: (uvm::fp_width::man_bits), line:18:55, endln:18:63 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:18:37, endln:18:63 |vpiName:man_bits + |vpiFullName:uvm::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:4:16, endln:4:24 |vpiOperand: diff --git a/tests/PackedEnumPort/PackedEnumPort.log b/tests/PackedEnumPort/PackedEnumPort.log index 49f081ead1..2a9e0ef69b 100644 --- a/tests/PackedEnumPort/PackedEnumPort.log +++ b/tests/PackedEnumPort/PackedEnumPort.log @@ -178,7 +178,7 @@ packed_array_var 1 port 7 range 5 ref_module 1 -ref_obj 8 +ref_obj 6 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -200,7 +200,7 @@ packed_array_var 1 port 10 range 5 ref_module 1 -ref_obj 12 +ref_obj 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PackedEnumPort/slpp_all/surelog.uhdm ... @@ -430,9 +430,6 @@ design: (work@top) |vpiName:lc_clk_byp_ack_i |vpiHighConn: \_bit_select: (lc_clk_byp_ack), line:35:26, endln:35:43 - |vpiParent: - \_ref_obj: (lc_clk_byp_ack) - |vpiName:lc_clk_byp_ack |vpiName:lc_clk_byp_ack |vpiIndex: \_constant: , line:35:41, endln:35:42 @@ -568,17 +565,13 @@ design: (work@top) |vpiName:lc_clk_byp_ack_i |vpiDirection:1 |vpiHighConn: - \_bit_select: (work@top.u_lc_ctrl_fsm.lc_clk_byp_ack_i.lc_clk_byp_ack), line:35:26, endln:35:43 + \_bit_select: (work@top.u_lc_ctrl_fsm.lc_clk_byp_ack), line:35:26, endln:35:43 |vpiParent: - \_ref_obj: (work@top.u_lc_ctrl_fsm.lc_clk_byp_ack_i.lc_clk_byp_ack) - |vpiParent: - \_port: (lc_clk_byp_ack_i), line:13:15, endln:13:31 - |vpiName:lc_clk_byp_ack - |vpiFullName:work@top.u_lc_ctrl_fsm.lc_clk_byp_ack_i.lc_clk_byp_ack - |vpiActual: - \_packed_array_var: (work@top.lc_clk_byp_ack), line:25:30, endln:25:44 + \_port: (lc_clk_byp_ack_i), line:13:15, endln:13:31 |vpiName:lc_clk_byp_ack - |vpiFullName:work@top.u_lc_ctrl_fsm.lc_clk_byp_ack_i.lc_clk_byp_ack + |vpiFullName:work@top.u_lc_ctrl_fsm.lc_clk_byp_ack + |vpiActual: + \_packed_array_var: (work@top.lc_clk_byp_ack), line:25:30, endln:25:44 |vpiIndex: \_constant: , line:35:41, endln:35:42 |vpiParent: @@ -587,8 +580,6 @@ design: (work@top) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_packed_array_var: (work@top.lc_clk_byp_ack), line:25:30, endln:25:44 |vpiLowConn: \_ref_obj: (work@top.u_lc_ctrl_fsm.lc_clk_byp_ack_i), line:35:8, endln:35:24 |vpiParent: diff --git a/tests/PackedEnumVar/PackedEnumVar.log b/tests/PackedEnumVar/PackedEnumVar.log index 8062b6e2a4..aaee42fdbe 100644 --- a/tests/PackedEnumVar/PackedEnumVar.log +++ b/tests/PackedEnumVar/PackedEnumVar.log @@ -214,7 +214,7 @@ packed_array_var 2 param_assign 3 parameter 3 range 5 -ref_obj 8 +ref_obj 6 return_stmt 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -242,7 +242,7 @@ packed_array_var 4 param_assign 3 parameter 3 range 7 -ref_obj 14 +ref_obj 10 return_stmt 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PackedEnumVar/slpp_all/surelog.uhdm ... @@ -426,7 +426,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.get_BA.B), line:11:16, endln:11:17 |vpiParent: - \_begin: (work@top.get_BA) + \_assignment: , line:11:7, endln:11:17 |vpiName:B |vpiFullName:work@top.get_BA.B |vpiActual: @@ -434,13 +434,11 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:11:7, endln:11:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:11:7, endln:11:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out + \_assignment: , line:11:7, endln:11:17 |vpiName:out |vpiFullName:work@top.get_BA.out + |vpiActual: + \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 |vpiIndex: \_constant: , line:11:11, endln:11:12 |vpiParent: @@ -458,7 +456,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.get_BA.A), line:12:16, endln:12:17 |vpiParent: - \_begin: (work@top.get_BA) + \_assignment: , line:12:7, endln:12:17 |vpiName:A |vpiFullName:work@top.get_BA.A |vpiActual: @@ -466,13 +464,11 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:12:7, endln:12:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:12:7, endln:12:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out + \_assignment: , line:12:7, endln:12:17 |vpiName:out |vpiFullName:work@top.get_BA.out + |vpiActual: + \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 |vpiIndex: \_constant: , line:12:11, endln:12:12 |vpiParent: @@ -623,19 +619,13 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:11:7, endln:11:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:11:7, endln:11:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out - |vpiActual: - \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 + \_assignment: , line:11:7, endln:11:17 |vpiName:out |vpiFullName:work@top.get_BA.out - |vpiIndex: - \_constant: , line:11:11, endln:11:12 |vpiActual: \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 + |vpiIndex: + \_constant: , line:11:11, endln:11:12 |vpiStmt: \_assignment: , line:12:7, endln:12:17 |vpiParent: @@ -653,19 +643,13 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.get_BA.out), line:12:7, endln:12:13 |vpiParent: - \_ref_obj: (work@top.get_BA.out) - |vpiParent: - \_assignment: , line:12:7, endln:12:17 - |vpiName:out - |vpiFullName:work@top.get_BA.out - |vpiActual: - \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 + \_assignment: , line:12:7, endln:12:17 |vpiName:out |vpiFullName:work@top.get_BA.out - |vpiIndex: - \_constant: , line:12:11, endln:12:12 |vpiActual: \_packed_array_var: (work@top.get_BA.out), line:10:20, endln:10:23 + |vpiIndex: + \_constant: , line:12:11, endln:12:12 |vpiStmt: \_return_stmt: , line:13:7, endln:13:13 |vpiParent: diff --git a/tests/ParamArray/ParamArray.log b/tests/ParamArray/ParamArray.log index eccb569438..bfe53d05ee 100644 --- a/tests/ParamArray/ParamArray.log +++ b/tests/ParamArray/ParamArray.log @@ -568,7 +568,7 @@ param_assign 20 parameter 27 range 34 ref_module 1 -ref_obj 5 +ref_obj 4 string_typespec 23 struct_typespec 16 tagged_pattern 23 @@ -604,7 +604,7 @@ param_assign 20 parameter 27 range 34 ref_module 1 -ref_obj 5 +ref_obj 4 string_typespec 23 struct_typespec 16 tagged_pattern 23 diff --git a/tests/ParamArraySelect/ParamArraySelect.log b/tests/ParamArraySelect/ParamArraySelect.log index 8a57914c8a..b4c23cf430 100644 --- a/tests/ParamArraySelect/ParamArraySelect.log +++ b/tests/ParamArraySelect/ParamArraySelect.log @@ -842,7 +842,7 @@ param_assign 32 parameter 41 range 64 ref_module 2 -ref_obj 39 +ref_obj 26 ref_var 1 string_typespec 46 struct_typespec 16 @@ -888,7 +888,7 @@ param_assign 36 parameter 41 range 64 ref_module 2 -ref_obj 39 +ref_obj 26 ref_var 1 string_typespec 46 struct_typespec 16 @@ -2767,13 +2767,11 @@ design: (work@top) \_operation: , line:62:53, endln:62:94 |vpiName:PartInfo[k].offset |vpiActual: - \_bit_select: (PartInfo), line:62:75, endln:62:83 + \_bit_select: (PartInfo[k]), line:62:75, endln:62:83 |vpiParent: - \_ref_obj: (PartInfo[k]) - |vpiParent: - \_hier_path: (PartInfo[k].offset), line:62:75, endln:62:83 - |vpiName:PartInfo[k] + \_hier_path: (PartInfo[k].offset), line:62:75, endln:62:83 |vpiName:PartInfo + |vpiFullName:PartInfo[k] |vpiIndex: \_ref_obj: (k), line:62:84, endln:62:85 |vpiName:k @@ -2811,13 +2809,11 @@ design: (work@top) \_operation: , line:63:53, endln:63:92 |vpiName:PartInfo[k].size |vpiActual: - \_bit_select: (PartInfo), line:63:75, endln:63:83 + \_bit_select: (PartInfo[k]), line:63:75, endln:63:83 |vpiParent: - \_ref_obj: (PartInfo[k]) - |vpiParent: - \_hier_path: (PartInfo[k].size), line:63:75, endln:63:83 - |vpiName:PartInfo[k] + \_hier_path: (PartInfo[k].size), line:63:75, endln:63:83 |vpiName:PartInfo + |vpiFullName:PartInfo[k] |vpiIndex: \_ref_obj: (k), line:63:84, endln:63:85 |vpiName:k @@ -2921,7 +2917,7 @@ design: (work@top) |vpiLeftRange: \_constant: , line:20:19, endln:20:21 |vpiParent: - \_range: , line:59:9, endln:59:40 + \_operation: , line:40:33, endln:40:47 |vpiDecompile:56 |vpiSize:64 |UINT:56 diff --git a/tests/ParamBitSelect/ParamBitSelect.log b/tests/ParamBitSelect/ParamBitSelect.log index 4d76b2222e..eca16276e9 100644 --- a/tests/ParamBitSelect/ParamBitSelect.log +++ b/tests/ParamBitSelect/ParamBitSelect.log @@ -217,7 +217,7 @@ param_assign 2 parameter 6 range 6 ref_module 7 -ref_obj 10 +ref_obj 5 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -243,7 +243,7 @@ param_assign 2 parameter 6 range 6 ref_module 7 -ref_obj 10 +ref_obj 5 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -359,16 +359,12 @@ design: (work@dut) \_gen_if: , line:10:3, endln:10:5 |vpiCondition: \_bit_select: (test), line:10:7, endln:10:14 - |vpiParent: - \_ref_obj: (test) - |vpiName:test |vpiName:test |vpiIndex: - \_ref_obj: (test.k), line:10:12, endln:10:13 + \_ref_obj: (k), line:10:12, endln:10:13 |vpiParent: \_bit_select: (test), line:10:7, endln:10:14 |vpiName:k - |vpiFullName:test.k |vpiStmt: \_begin: |vpiStmt: @@ -406,7 +402,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (k), line:12:19, endln:12:20 |vpiParent: - \_operation: , line:12:9, endln:12:25 + \_operation: , line:12:19, endln:12:25 |vpiName:k |vpiOperand: \_constant: , line:12:24, endln:12:25 diff --git a/tests/ParamElabMulti/ParamElabMulti.log b/tests/ParamElabMulti/ParamElabMulti.log index 34187ded14..5c3fb3653e 100644 --- a/tests/ParamElabMulti/ParamElabMulti.log +++ b/tests/ParamElabMulti/ParamElabMulti.log @@ -516,7 +516,7 @@ param_assign 20 parameter 26 range 48 ref_module 5 -ref_obj 21 +ref_obj 20 ref_var 1 string_typespec 19 struct_typespec 23 @@ -552,7 +552,7 @@ param_assign 24 parameter 26 range 48 ref_module 5 -ref_obj 28 +ref_obj 27 ref_var 1 string_typespec 19 struct_typespec 23 @@ -676,7 +676,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads), line:14:19, endln:14:27 |vpiParent: - \_struct_typespec: (pinmux_pkg::target_cfg_t), line:13:12, endln:13:18 + \_operation: , line:14:19, endln:14:29 |vpiName:NDioPads |vpiFullName:pinmux_pkg::pinmux_pkg::target_cfg_t::NDioPads |vpiActual: diff --git a/tests/ParamFile/ParamFile.log b/tests/ParamFile/ParamFile.log index 04fe0161f8..2fc62935fe 100644 --- a/tests/ParamFile/ParamFile.log +++ b/tests/ParamFile/ParamFile.log @@ -393,7 +393,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:19:7, endln:19:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:19:7, endln:19:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: @@ -460,7 +460,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:24:7, endln:24:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:24:7, endln:24:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: diff --git a/tests/ParamFile/ParamFileNoTop.log b/tests/ParamFile/ParamFileNoTop.log index ebd3b19e09..2a7b0c350d 100644 --- a/tests/ParamFile/ParamFileNoTop.log +++ b/tests/ParamFile/ParamFileNoTop.log @@ -395,7 +395,7 @@ design: (unnamed) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:19:7, endln:19:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:19:7, endln:19:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: @@ -460,7 +460,7 @@ design: (unnamed) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:24:7, endln:24:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:24:7, endln:24:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: diff --git a/tests/ParamFile/ParamFileOverr.log b/tests/ParamFile/ParamFileOverr.log index c0ec808880..ff7636e628 100644 --- a/tests/ParamFile/ParamFileOverr.log +++ b/tests/ParamFile/ParamFileOverr.log @@ -391,7 +391,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:19:7, endln:19:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:19:7, endln:19:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: @@ -458,7 +458,7 @@ design: (work@dut) |vpiOperand: \_ref_obj: (work@ram_1p.MemInitFile), line:24:7, endln:24:18 |vpiParent: - \_begin: (work@ram_1p), line:18:9, endln:28:4 + \_operation: , line:24:7, endln:24:24 |vpiName:MemInitFile |vpiFullName:work@ram_1p.MemInitFile |vpiOperand: diff --git a/tests/ParamInFunc/ParamInFunc.log b/tests/ParamInFunc/ParamInFunc.log index 87a32aecae..ec5cfb382b 100644 --- a/tests/ParamInFunc/ParamInFunc.log +++ b/tests/ParamInFunc/ParamInFunc.log @@ -190,7 +190,7 @@ parameter 2 part_select 2 port 8 range 2 -ref_obj 14 +ref_obj 12 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -211,7 +211,7 @@ parameter 6 part_select 4 port 12 range 2 -ref_obj 24 +ref_obj 20 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ParamInFunc/slpp_all/surelog.uhdm ... @@ -341,55 +341,55 @@ design: (work@func_block_top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:8:30, endln:8:38 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiParent: - \_ref_obj: inp (work@func_block_top.func3.inp), line:8:30, endln:8:33 - |vpiParent: - \_assignment: , line:8:17, endln:8:38 - |vpiName:inp - |vpiFullName:work@func_block_top.func3.inp - |vpiDefName:inp + \_assignment: , line:8:17, endln:8:38 + |vpiName:inp + |vpiFullName:work@func_block_top.func3.inp + |vpiDefName:inp + |vpiActual: + \_io_decl: (inp), line:7:30, endln:7:33 |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@func_block_top.func3.A), line:8:34, endln:8:35 + \_ref_obj: (work@func_block_top.func3.inp.A), line:8:34, endln:8:35 |vpiParent: - \_function: (work@func_block_top.func3), line:4:9, endln:9:20 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiName:A - |vpiFullName:work@func_block_top.func3.A + |vpiFullName:work@func_block_top.func3.inp.A |vpiActual: \_parameter: (A), line:5:28, endln:5:29 |vpiRightRange: - \_ref_obj: (work@func_block_top.func3.B), line:8:36, endln:8:37 + \_ref_obj: (work@func_block_top.func3.inp.B), line:8:36, endln:8:37 |vpiParent: - \_function: (work@func_block_top.func3), line:4:9, endln:9:20 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiName:B - |vpiFullName:work@func_block_top.func3.B + |vpiFullName:work@func_block_top.func3.inp.B |vpiActual: \_parameter: (B), line:6:27, endln:6:28 |vpiLhs: - \_part_select: , line:8:17, endln:8:27 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiParent: - \_ref_obj: func3 (work@func_block_top.func3.func3) - |vpiParent: - \_assignment: , line:8:17, endln:8:38 - |vpiName:func3 - |vpiFullName:work@func_block_top.func3.func3 - |vpiDefName:func3 + \_assignment: , line:8:17, endln:8:38 + |vpiName:func3 + |vpiFullName:work@func_block_top.func3.func3 + |vpiDefName:func3 + |vpiActual: + \_logic_var: , line:4:28, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@func_block_top.func3.A), line:8:23, endln:8:24 + \_ref_obj: (work@func_block_top.func3.func3.A), line:8:23, endln:8:24 |vpiParent: - \_function: (work@func_block_top.func3), line:4:9, endln:9:20 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiName:A - |vpiFullName:work@func_block_top.func3.A + |vpiFullName:work@func_block_top.func3.func3.A |vpiActual: \_parameter: (A), line:5:28, endln:5:29 |vpiRightRange: - \_ref_obj: (work@func_block_top.func3.B), line:8:25, endln:8:26 + \_ref_obj: (work@func_block_top.func3.func3.B), line:8:25, endln:8:26 |vpiParent: - \_function: (work@func_block_top.func3), line:4:9, endln:9:20 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiName:B - |vpiFullName:work@func_block_top.func3.B + |vpiFullName:work@func_block_top.func3.func3.B |vpiActual: \_parameter: (B), line:6:27, endln:6:28 |vpiInstance: @@ -539,21 +539,19 @@ design: (work@func_block_top) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:8:30, endln:8:38 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiParent: - \_ref_obj: inp (work@func_block_top.func3.inp), line:8:30, endln:8:33 - |vpiParent: - \_assignment: , line:8:17, endln:8:38 - |vpiName:inp - |vpiFullName:work@func_block_top.func3.inp - |vpiDefName:inp - |vpiActual: - \_io_decl: (inp), line:7:30, endln:7:33 + \_assignment: , line:8:17, endln:8:38 + |vpiName:inp + |vpiFullName:work@func_block_top.func3.inp + |vpiDefName:inp + |vpiActual: + \_io_decl: (inp), line:7:30, endln:7:33 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@func_block_top.func3.inp.A), line:8:34, endln:8:35 |vpiParent: - \_part_select: , line:8:30, endln:8:38 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiName:A |vpiFullName:work@func_block_top.func3.inp.A |vpiActual: @@ -561,27 +559,25 @@ design: (work@func_block_top) |vpiRightRange: \_ref_obj: (work@func_block_top.func3.inp.B), line:8:36, endln:8:37 |vpiParent: - \_part_select: , line:8:30, endln:8:38 + \_part_select: inp (work@func_block_top.func3.inp), line:8:30, endln:8:38 |vpiName:B |vpiFullName:work@func_block_top.func3.inp.B |vpiActual: \_parameter: (B), line:6:27, endln:6:28 |vpiLhs: - \_part_select: , line:8:17, endln:8:27 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiParent: - \_ref_obj: func3 (work@func_block_top.func3.func3) - |vpiParent: - \_assignment: , line:8:17, endln:8:38 - |vpiName:func3 - |vpiFullName:work@func_block_top.func3.func3 - |vpiDefName:func3 - |vpiActual: - \_logic_var: , line:4:28, endln:4:34 + \_assignment: , line:8:17, endln:8:38 + |vpiName:func3 + |vpiFullName:work@func_block_top.func3.func3 + |vpiDefName:func3 + |vpiActual: + \_logic_var: , line:4:28, endln:4:34 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@func_block_top.func3.func3.A), line:8:23, endln:8:24 |vpiParent: - \_part_select: , line:8:17, endln:8:27 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiName:A |vpiFullName:work@func_block_top.func3.func3.A |vpiActual: @@ -589,7 +585,7 @@ design: (work@func_block_top) |vpiRightRange: \_ref_obj: (work@func_block_top.func3.func3.B), line:8:25, endln:8:26 |vpiParent: - \_part_select: , line:8:17, endln:8:27 + \_part_select: func3 (work@func_block_top.func3.func3), line:8:17, endln:8:27 |vpiName:B |vpiFullName:work@func_block_top.func3.func3.B |vpiActual: @@ -693,4 +689,4 @@ design: (work@func_block_top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/ParamInFunc/dut.sv | ${SURELOG_DIR}/build/regression/ParamInFunc/roundtrip/dut_000.sv | 3 | 10 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/ParamInFunc/dut.sv | ${SURELOG_DIR}/build/regression/ParamInFunc/roundtrip/dut_000.sv | 4 | 10 | \ No newline at end of file diff --git a/tests/ParamOverload1/ParamOverload1.log b/tests/ParamOverload1/ParamOverload1.log index 49daf53f4a..f478dc3d8c 100644 --- a/tests/ParamOverload1/ParamOverload1.log +++ b/tests/ParamOverload1/ParamOverload1.log @@ -219,7 +219,7 @@ parameter 6 port 9 range 12 ref_module 3 -ref_obj 18 +ref_obj 15 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -239,7 +239,7 @@ parameter 6 port 13 range 12 ref_module 3 -ref_obj 29 +ref_obj 25 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ParamOverload1/slpp_all/surelog.uhdm ... @@ -369,11 +369,7 @@ design: (work@top) |vpiRhs: \_bit_select: (work@dut.P), line:3:15, endln:3:19 |vpiParent: - \_ref_obj: (work@dut.P) - |vpiParent: - \_cont_assign: , line:3:11, endln:3:19 - |vpiName:P - |vpiFullName:work@dut.P + \_cont_assign: , line:3:11, endln:3:19 |vpiName:P |vpiFullName:work@dut.P |vpiIndex: @@ -666,19 +662,13 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.u_dut1.P), line:3:15, endln:3:19 |vpiParent: - \_ref_obj: (work@top.u_dut1.P) - |vpiParent: - \_cont_assign: , line:3:11, endln:3:19 - |vpiName:P - |vpiFullName:work@top.u_dut1.P - |vpiActual: - \_parameter: (work@top.u_dut1.P), line:2:18, endln:2:19 + \_cont_assign: , line:3:11, endln:3:19 |vpiName:P |vpiFullName:work@top.u_dut1.P - |vpiIndex: - \_constant: , line:3:17, endln:3:18 |vpiActual: \_parameter: (work@top.u_dut1.P), line:2:18, endln:2:19 + |vpiIndex: + \_constant: , line:3:17, endln:3:18 |vpiLhs: \_ref_obj: (work@top.u_dut1.x), line:3:11, endln:3:12 |vpiParent: @@ -928,7 +918,7 @@ design: (work@top) |vpiName:x |vpiFullName:work@top.u_dut2.x |vpiActual: - \_int_var: (work@top.u_dut2.x), line:1:23, endln:1:24 + \_int_var: (work@top.u_dut1.x), line:1:23, endln:1:24 |vpiModule: \_module_inst: work@dut (work@top.u_dut3), file:${SURELOG_DIR}/tests/ParamOverload1/dut.sv, line:9:4, endln:9:34 |vpiParent: @@ -1093,7 +1083,7 @@ design: (work@top) |vpiName:x |vpiFullName:work@top.u_dut3.x |vpiActual: - \_int_var: (work@top.u_dut3.x), line:1:23, endln:1:24 + \_int_var: (work@top.u_dut1.x), line:1:23, endln:1:24 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/ParamOverload3/ParamOverload3.log b/tests/ParamOverload3/ParamOverload3.log index 3d2c40aa98..af5e728f64 100644 --- a/tests/ParamOverload3/ParamOverload3.log +++ b/tests/ParamOverload3/ParamOverload3.log @@ -692,7 +692,7 @@ packed_array_typespec 4 param_assign 53 parameter 59 range 6 -ref_obj 61 +ref_obj 54 ref_var 1 return_stmt 2 string_typespec 50 @@ -732,7 +732,7 @@ packed_array_typespec 4 param_assign 58 parameter 59 range 6 -ref_obj 75 +ref_obj 63 ref_var 1 return_stmt 4 string_typespec 50 @@ -1188,29 +1188,27 @@ design: (work@top) \_operation: , line:38:12, endln:38:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:38:12, endln:38:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:12, endln:38:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:38:25, endln:38:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:38:25, endln:38:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:38:12, endln:38:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:12, endln:38:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:37:56, endln:37:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiActual: - \_ref_obj: (exp_bits), line:38:30, endln:38:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:38:30, endln:38:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:7:18, endln:7:26 |vpiOperand: @@ -1219,29 +1217,27 @@ design: (work@top) \_operation: , line:38:12, endln:38:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:38:41, endln:38:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:41, endln:38:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:38:54, endln:38:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:38:54, endln:38:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:38:41, endln:38:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:41, endln:38:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:37:56, endln:37:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiActual: - \_ref_obj: (man_bits), line:38:59, endln:38:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:38:59, endln:38:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:8:18, endln:8:26 |vpiOperand: @@ -1664,29 +1660,27 @@ design: (work@top) \_operation: , line:38:12, endln:38:67 |vpiName:FP_ENCODINGS[fmt].exp_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:38:12, endln:38:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:12, endln:38:24 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:38:25, endln:38:28 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt), line:38:25, endln:38:28 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:38:12, endln:38:24 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:12, endln:38:24 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].exp_bits::fmt |vpiActual: \_io_decl: (fmt), line:37:56, endln:37:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiActual: - \_ref_obj: (exp_bits), line:38:30, endln:38:38 + \_ref_obj: (fpnew_pkg::fp_width::exp_bits), line:38:30, endln:38:38 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].exp_bits), line:38:12, endln:38:38 |vpiName:exp_bits + |vpiFullName:fpnew_pkg::fp_width::exp_bits |vpiActual: \_typespec_member: (exp_bits), line:7:18, endln:7:26 |vpiOperand: @@ -1695,29 +1689,27 @@ design: (work@top) \_operation: , line:38:12, endln:38:67 |vpiName:FP_ENCODINGS[fmt].man_bits |vpiActual: - \_bit_select: (FP_ENCODINGS), line:38:41, endln:38:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:41, endln:38:53 |vpiParent: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]) - |vpiParent: - \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 - |vpiName:FP_ENCODINGS[fmt] - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt] + \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 |vpiName:FP_ENCODINGS + |vpiFullName:FP_ENCODINGS[fmt] + |vpiActual: + \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiIndex: - \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt), line:38:54, endln:38:57 + \_ref_obj: (fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt), line:38:54, endln:38:57 |vpiParent: - \_bit_select: (FP_ENCODINGS), line:38:41, endln:38:53 + \_bit_select: (FP_ENCODINGS[fmt]), line:38:41, endln:38:53 |vpiName:fmt - |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt]::fmt + |vpiFullName:fpnew_pkg::fp_width::FP_ENCODINGS[fmt].man_bits::fmt |vpiActual: \_io_decl: (fmt), line:37:56, endln:37:59 - |vpiActual: - \_parameter: (fpnew_pkg::FP_ENCODINGS), line:20:49, endln:20:61 |vpiActual: - \_ref_obj: (man_bits), line:38:59, endln:38:67 + \_ref_obj: (fpnew_pkg::fp_width::man_bits), line:38:59, endln:38:67 |vpiParent: \_hier_path: (FP_ENCODINGS[fmt].man_bits), line:38:41, endln:38:67 |vpiName:man_bits + |vpiFullName:fpnew_pkg::fp_width::man_bits |vpiActual: \_typespec_member: (man_bits), line:8:18, endln:8:26 |vpiOperand: @@ -2004,7 +1996,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (FP_WIDTH), line:52:35, endln:52:43 |vpiParent: - \_operation: , line:52:9, endln:52:52 + \_operation: , line:52:35, endln:52:51 |vpiName:FP_WIDTH |vpiOperand: \_ref_obj: (WIDTH), line:52:46, endln:52:51 @@ -2030,17 +2022,13 @@ design: (work@top) |vpiLhs: \_bit_select: (is_boxed), line:59:14, endln:59:27 |vpiParent: - \_ref_obj: (is_boxed) - |vpiParent: - \_cont_assign: , line:59:14, endln:59:32 - |vpiName:is_boxed + \_cont_assign: , line:59:14, endln:59:32 |vpiName:is_boxed |vpiIndex: - \_ref_obj: (is_boxed.fmt), line:59:23, endln:59:26 + \_ref_obj: (fmt), line:59:23, endln:59:26 |vpiParent: \_bit_select: (is_boxed), line:59:14, endln:59:27 |vpiName:fmt - |vpiFullName:is_boxed.fmt |uhdmtopModules: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamOverload3/dut.sv, line:43:1, endln:64:10 |vpiName:work@top @@ -2141,7 +2129,7 @@ design: (work@top) |vpiPattern: \_constant: , line:32:20, endln:32:24 |vpiParent: - \_tagged_pattern: , line:32:20, endln:32:24 + \_operation: , line:52:9, endln:52:52 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -2341,19 +2329,15 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.gen_nanbox_check[1].no_check.is_boxed), line:59:14, endln:59:27 |vpiParent: - \_ref_obj: (work@top.gen_nanbox_check[1].no_check.is_boxed) - |vpiParent: - \_cont_assign: , line:59:14, endln:59:32 - |vpiName:is_boxed - |vpiFullName:work@top.gen_nanbox_check[1].no_check.is_boxed + \_cont_assign: , line:59:14, endln:59:32 |vpiName:is_boxed |vpiFullName:work@top.gen_nanbox_check[1].no_check.is_boxed |vpiIndex: - \_ref_obj: (work@top.gen_nanbox_check[1].no_check.is_boxed.fmt), line:59:23, endln:59:26 + \_ref_obj: (work@top.gen_nanbox_check[1].no_check.fmt), line:59:23, endln:59:26 |vpiParent: \_bit_select: (work@top.gen_nanbox_check[1].no_check.is_boxed), line:59:14, endln:59:27 |vpiName:fmt - |vpiFullName:work@top.gen_nanbox_check[1].no_check.is_boxed.fmt + |vpiFullName:work@top.gen_nanbox_check[1].no_check.fmt |vpiActual: \_parameter: (work@top.gen_nanbox_check[1].fmt), line:49:0 |vpiGenScopeArray: diff --git a/tests/ParamSubstituteComplex/ParamSubstituteComplex.log b/tests/ParamSubstituteComplex/ParamSubstituteComplex.log index 60f8912229..428f382bfe 100644 --- a/tests/ParamSubstituteComplex/ParamSubstituteComplex.log +++ b/tests/ParamSubstituteComplex/ParamSubstituteComplex.log @@ -580,7 +580,7 @@ param_assign 26 parameter 28 range 58 ref_module 4 -ref_obj 37 +ref_obj 35 string_typespec 70 struct_typespec 12 tagged_pattern 70 @@ -607,7 +607,7 @@ param_assign 26 parameter 28 range 58 ref_module 4 -ref_obj 37 +ref_obj 35 string_typespec 70 struct_typespec 12 tagged_pattern 70 @@ -1223,7 +1223,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:38:23, endln:38:28 |vpiParent: - \_operation: , line:33:42, endln:39:6 + \_operation: , line:38:23, endln:38:35 |vpiName:XFVEC |vpiOperand: \_ref_obj: (XF8), line:38:32, endln:38:35 @@ -1238,7 +1238,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XFVEC), line:38:37, endln:38:42 |vpiParent: - \_operation: , line:33:42, endln:39:6 + \_operation: , line:38:37, endln:38:63 |vpiName:XFVEC |vpiOperand: \_operation: , line:38:47, endln:38:62 @@ -1248,7 +1248,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (XF16), line:38:47, endln:38:51 |vpiParent: - \_operation: , line:38:37, endln:38:63 + \_operation: , line:38:47, endln:38:62 |vpiName:XF16 |vpiOperand: \_ref_obj: (XF16ALT), line:38:55, endln:38:62 @@ -1310,9 +1310,6 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ParamSubstituteComplex/dut.sv, line:4:1, endln:53:10 |vpiRhs: \_bit_select: (FpFmtMask), line:43:22, endln:43:34 - |vpiParent: - \_ref_obj: (FpFmtMask) - |vpiName:FpFmtMask |vpiName:FpFmtMask |vpiIndex: \_constant: , line:43:32, endln:43:33 diff --git a/tests/PartSelect3/PartSelect3.log b/tests/PartSelect3/PartSelect3.log index 9ac8016a73..718b469a62 100644 --- a/tests/PartSelect3/PartSelect3.log +++ b/tests/PartSelect3/PartSelect3.log @@ -123,7 +123,6 @@ logic_var 1 module_inst 4 part_select 2 range 6 -ref_obj 2 var_select 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -138,7 +137,6 @@ logic_var 1 module_inst 4 part_select 3 range 6 -ref_obj 3 var_select 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PartSelect3/slpp_all/surelog.uhdm ... @@ -201,9 +199,12 @@ design: (work@t) |UINT:3 |vpiConstType:9 |vpiIndex: - \_part_select: , line:3:22, endln:3:25 + \_part_select: state_d (work@t.state_d.state_d), line:3:22, endln:3:25 |vpiParent: \_var_select: (work@t.state_d), line:3:8, endln:3:26 + |vpiName:state_d + |vpiFullName:work@t.state_d.state_d + |vpiDefName:state_d |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:3:22, endln:3:23 @@ -352,6 +353,8 @@ design: (work@t) \_cont_assign: , line:3:8, endln:3:40 |vpiName:state_d |vpiFullName:work@t.state_d + |vpiActual: + \_logic_var: (work@t.state_d), line:2:23, endln:2:30 |vpiIndex: \_constant: , line:3:16, endln:3:17 |vpiParent: @@ -369,20 +372,19 @@ design: (work@t) |UINT:3 |vpiConstType:9 |vpiIndex: - \_part_select: , line:3:22, endln:3:25 + \_part_select: state_d (work@t.state_d.state_d), line:3:22, endln:3:25 |vpiParent: - \_ref_obj: (work@t.state_d.state_d) - |vpiParent: - \_var_select: (work@t.state_d), line:3:8, endln:3:26 - |vpiName:state_d - |vpiFullName:work@t.state_d.state_d - |vpiActual: - \_logic_var: (work@t.state_d), line:2:23, endln:2:30 + \_var_select: (work@t.state_d), line:3:8, endln:3:26 + |vpiName:state_d + |vpiFullName:work@t.state_d.state_d + |vpiDefName:state_d + |vpiActual: + \_logic_var: (work@t.state_d), line:2:23, endln:2:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:3:22, endln:3:23 |vpiParent: - \_part_select: , line:3:22, endln:3:25 + \_part_select: state_d (state_d.state_d), line:3:22, endln:3:25 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -390,7 +392,7 @@ design: (work@t) |vpiRightRange: \_constant: , line:3:24, endln:3:25 |vpiParent: - \_part_select: , line:3:22, endln:3:25 + \_part_select: state_d (state_d.state_d), line:3:22, endln:3:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 diff --git a/tests/PartSelect4/PartSelect4.log b/tests/PartSelect4/PartSelect4.log index c16772c564..cb36329f48 100644 --- a/tests/PartSelect4/PartSelect4.log +++ b/tests/PartSelect4/PartSelect4.log @@ -304,7 +304,7 @@ param_assign 17 parameter 25 range 5 ref_module 10 -ref_obj 15 +ref_obj 5 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -329,7 +329,7 @@ param_assign 25 parameter 25 range 5 ref_module 10 -ref_obj 15 +ref_obj 5 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -550,15 +550,15 @@ design: (work@xbar_main) |vpiParent: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/PartSelect4/dut.sv, line:16:1, endln:21:10 |vpiRhs: - \_indexed_part_select: , line:19:16, endln:19:25 - |vpiParent: - \_ref_obj: A (A) - |vpiName:A - |vpiDefName:A + \_indexed_part_select: A (A), line:19:16, endln:19:25 + |vpiName:A + |vpiDefName:A |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:19:18, endln:19:21 + |vpiParent: + \_indexed_part_select: A (A), line:19:16, endln:19:25 |vpiOpType:25 |vpiOperand: \_constant: , line:19:18, endln:19:19 @@ -1227,4 +1227,4 @@ design: (work@xbar_main) [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/tests/PartSelect4/dut.sv | ${SURELOG_DIR}/build/regression/PartSelect4/roundtrip/dut_000.sv | 6 | 21 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/PartSelect4/dut.sv | ${SURELOG_DIR}/build/regression/PartSelect4/roundtrip/dut_000.sv | 7 | 21 | \ No newline at end of file diff --git a/tests/PartSelectElab/PartSelectElab.log b/tests/PartSelectElab/PartSelectElab.log index 792a1649fb..8f0cc0e8ff 100644 --- a/tests/PartSelectElab/PartSelectElab.log +++ b/tests/PartSelectElab/PartSelectElab.log @@ -36,7 +36,7 @@ operation 2 part_select 2 port 4 range 2 -ref_obj 7 +ref_obj 5 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -54,7 +54,7 @@ operation 4 part_select 4 port 6 range 2 -ref_obj 12 +ref_obj 8 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PartSelectElab/slpp_unit/surelog.uhdm ... @@ -152,17 +152,15 @@ design: (work@test) |vpiRhs: \_operation: , line:5:16, endln:5:29 |vpiParent: - \_begin: (work@test), line:4:23, endln:6:4 + \_assignment: , line:5:3, endln:5:29 |vpiOpType:24 |vpiOperand: - \_part_select: , line:5:16, endln:5:25 + \_part_select: data (work@test.data), line:5:16, endln:5:25 |vpiParent: - \_ref_obj: data (work@test.data), line:5:16, endln:5:20 - |vpiParent: - \_operation: , line:5:16, endln:5:29 - |vpiName:data - |vpiFullName:work@test.data - |vpiDefName:data + \_operation: , line:5:16, endln:5:29 + |vpiName:data + |vpiFullName:work@test.data + |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:21, endln:5:22 @@ -185,14 +183,12 @@ design: (work@test) |UINT:2 |vpiConstType:9 |vpiLhs: - \_part_select: , line:5:3, endln:5:12 + \_part_select: data (work@test.data), line:5:3, endln:5:12 |vpiParent: - \_ref_obj: data (work@test.data) - |vpiParent: - \_assignment: , line:5:3, endln:5:29 - |vpiName:data - |vpiFullName:work@test.data - |vpiDefName:data + \_assignment: , line:5:3, endln:5:29 + |vpiName:data + |vpiFullName:work@test.data + |vpiDefName:data |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:8, endln:5:9 @@ -330,16 +326,14 @@ design: (work@test) \_assignment: , line:5:3, endln:5:29 |vpiOpType:24 |vpiOperand: - \_part_select: , line:5:16, endln:5:25 + \_part_select: data (work@test.data), line:5:16, endln:5:25 |vpiParent: - \_ref_obj: data (work@test.data), line:5:16, endln:5:20 - |vpiParent: - \_operation: , line:5:16, endln:5:29 - |vpiName:data - |vpiFullName:work@test.data - |vpiDefName:data - |vpiActual: - \_logic_net: (work@test.data), line:2:12, endln:2:16 + \_operation: , line:5:16, endln:5:29 + |vpiName:data + |vpiFullName:work@test.data + |vpiDefName:data + |vpiActual: + \_logic_net: (work@test.data), line:2:12, endln:2:16 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:21, endln:5:22 @@ -348,16 +342,14 @@ design: (work@test) |vpiOperand: \_constant: , line:5:28, endln:5:29 |vpiLhs: - \_part_select: , line:5:3, endln:5:12 + \_part_select: data (work@test.data), line:5:3, endln:5:12 |vpiParent: - \_ref_obj: data (work@test.data) - |vpiParent: - \_assignment: , line:5:3, endln:5:29 - |vpiName:data - |vpiFullName:work@test.data - |vpiDefName:data - |vpiActual: - \_logic_net: (work@test.data), line:2:12, endln:2:16 + \_assignment: , line:5:3, endln:5:29 + |vpiName:data + |vpiFullName:work@test.data + |vpiDefName:data + |vpiActual: + \_logic_net: (work@test.data), line:2:12, endln:2:16 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:8, endln:5:9 @@ -372,4 +364,4 @@ design: (work@test) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/PartSelectElab/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectElab/roundtrip/dut_000.sv | 2 | 8 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/PartSelectElab/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectElab/roundtrip/dut_000.sv | 3 | 8 | \ No newline at end of file diff --git a/tests/PartSelectHier/PartSelectHier.log b/tests/PartSelectHier/PartSelectHier.log index 17d80c44e9..48a30e0452 100644 --- a/tests/PartSelectHier/PartSelectHier.log +++ b/tests/PartSelectHier/PartSelectHier.log @@ -151,7 +151,7 @@ module_inst 5 package 3 part_select 1 range 4 -ref_obj 3 +ref_obj 2 struct_net 1 struct_typespec 2 typespec_member 2 @@ -170,7 +170,7 @@ module_inst 5 package 3 part_select 2 range 4 -ref_obj 6 +ref_obj 4 struct_net 1 struct_typespec 2 typespec_member 2 @@ -325,10 +325,9 @@ design: (work@dut) \_hier_path: (drsp_fifo_o.d_source[8:3]), line:9:24, endln:9:49 |vpiName:drsp_fifo_o |vpiActual: - \_part_select: , line:9:36, endln:9:48 - |vpiParent: - \_ref_obj: (d_source) - |vpiName:d_source + \_part_select: (drsp_fifo_o.d_source[8:3]), line:9:36, endln:9:48 + |vpiName:d_source + |vpiFullName:drsp_fifo_o.d_source[8:3] |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:45, endln:9:46 @@ -427,13 +426,13 @@ design: (work@dut) |vpiActual: \_struct_net: (work@dut.drsp_fifo_o), line:7:22, endln:7:33 |vpiActual: - \_part_select: , line:9:36, endln:9:48 + \_part_select: (drsp_fifo_o.d_source[8:3]), line:9:36, endln:9:48 |vpiParent: - \_ref_obj: (work@dut.d_source) - |vpiParent: - \_hier_path: (drsp_fifo_o.d_source[8:3]), line:9:24, endln:9:49 - |vpiName:d_source - |vpiFullName:work@dut.d_source + \_hier_path: (drsp_fifo_o.d_source[8:3]), line:9:24, endln:9:49 + |vpiName:d_source + |vpiFullName:drsp_fifo_o.d_source[8:3] + |vpiActual: + \_typespec_member: (d_source), line:3:20, endln:3:28 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:9:45, endln:9:46 @@ -455,4 +454,4 @@ design: (work@dut) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/PartSelectHier/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectHier/roundtrip/dut_000.sv | 2 | 10 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/PartSelectHier/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectHier/roundtrip/dut_000.sv | 3 | 10 | \ No newline at end of file diff --git a/tests/PartSelectHierPath/PartSelectHierPath.log b/tests/PartSelectHierPath/PartSelectHierPath.log index 55e24620c6..b0dd6e8827 100644 --- a/tests/PartSelectHierPath/PartSelectHierPath.log +++ b/tests/PartSelectHierPath/PartSelectHierPath.log @@ -157,7 +157,7 @@ module_inst 4 package 3 part_select 2 range 4 -ref_obj 3 +ref_obj 1 struct_net 1 struct_typespec 2 typespec_member 4 @@ -176,7 +176,7 @@ module_inst 4 package 3 part_select 4 range 4 -ref_obj 6 +ref_obj 2 struct_net 1 struct_typespec 2 typespec_member 4 @@ -399,10 +399,9 @@ design: (work@top) \_hier_path: (trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0]), line:13:41, endln:13:84 |vpiName:trace_rv_trace_pkt |vpiActual: - \_part_select: , line:13:60, endln:13:83 - |vpiParent: - \_ref_obj: (trace_rv_i_insn_ip) - |vpiName:trace_rv_i_insn_ip + \_part_select: (trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0]), line:13:60, endln:13:83 + |vpiName:trace_rv_i_insn_ip + |vpiFullName:trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0] |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:79, endln:13:81 @@ -417,14 +416,12 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:13:10, endln:13:34 + \_part_select: trace_rv_i_insn_ip (work@top.trace_rv_i_insn_ip), line:13:10, endln:13:34 |vpiParent: - \_ref_obj: trace_rv_i_insn_ip (work@top.trace_rv_i_insn_ip) - |vpiParent: - \_cont_assign: , line:13:10, endln:13:84 - |vpiName:trace_rv_i_insn_ip - |vpiFullName:work@top.trace_rv_i_insn_ip - |vpiDefName:trace_rv_i_insn_ip + \_cont_assign: , line:13:10, endln:13:84 + |vpiName:trace_rv_i_insn_ip + |vpiFullName:work@top.trace_rv_i_insn_ip + |vpiDefName:trace_rv_i_insn_ip |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:29, endln:13:31 @@ -473,27 +470,25 @@ design: (work@top) |vpiActual: \_struct_net: (work@top.trace_rv_trace_pkt), line:12:16, endln:12:34 |vpiActual: - \_part_select: , line:13:60, endln:13:83 + \_part_select: (trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0]), line:13:60, endln:13:83 |vpiParent: - \_ref_obj: (work@top.trace_rv_i_insn_ip) - |vpiParent: - \_hier_path: (trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0]), line:13:41, endln:13:84 - |vpiName:trace_rv_i_insn_ip - |vpiFullName:work@top.trace_rv_i_insn_ip + \_hier_path: (trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0]), line:13:41, endln:13:84 + |vpiName:trace_rv_i_insn_ip + |vpiFullName:trace_rv_trace_pkt.trace_rv_i_insn_ip[63:0] + |vpiActual: + \_typespec_member: (trace_rv_i_insn_ip), line:5:37, endln:5:55 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:79, endln:13:81 |vpiRightRange: \_constant: , line:13:82, endln:13:83 |vpiLhs: - \_part_select: , line:13:10, endln:13:34 + \_part_select: trace_rv_i_insn_ip (work@top.trace_rv_i_insn_ip), line:13:10, endln:13:34 |vpiParent: - \_ref_obj: trace_rv_i_insn_ip (work@top.trace_rv_i_insn_ip) - |vpiParent: - \_cont_assign: , line:13:10, endln:13:84 - |vpiName:trace_rv_i_insn_ip - |vpiFullName:work@top.trace_rv_i_insn_ip - |vpiDefName:trace_rv_i_insn_ip + \_cont_assign: , line:13:10, endln:13:84 + |vpiName:trace_rv_i_insn_ip + |vpiFullName:work@top.trace_rv_i_insn_ip + |vpiDefName:trace_rv_i_insn_ip |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:13:29, endln:13:31 @@ -507,4 +502,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/PartSelectHierPath/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectHierPath/roundtrip/dut_000.sv | 1 | 14 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/PartSelectHierPath/dut.sv | ${SURELOG_DIR}/build/regression/PartSelectHierPath/roundtrip/dut_000.sv | 2 | 14 | \ No newline at end of file diff --git a/tests/PartSelectNoParent/PartSelectNoParent.log b/tests/PartSelectNoParent/PartSelectNoParent.log index 455998b4d7..e3b814341d 100644 --- a/tests/PartSelectNoParent/PartSelectNoParent.log +++ b/tests/PartSelectNoParent/PartSelectNoParent.log @@ -272,7 +272,7 @@ parameter 21 part_select 1 port 2 range 6 -ref_obj 9 +ref_obj 8 struct_net 2 struct_typespec 3 typespec_member 3 @@ -304,7 +304,7 @@ parameter 21 part_select 2 port 3 range 6 -ref_obj 15 +ref_obj 13 struct_net 2 struct_typespec 3 typespec_member 3 @@ -446,7 +446,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (my_pkg::my_pkg::hw_key_req_t::Shares), line:7:14, endln:7:20 |vpiParent: - \_struct_typespec: (my_pkg::hw_key_req_t), line:6:12, endln:6:18 + \_operation: , line:7:14, endln:7:22 |vpiName:Shares |vpiFullName:my_pkg::my_pkg::hw_key_req_t::Shares |vpiActual: @@ -479,7 +479,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (my_pkg::my_pkg::hw_key_req_t::KeyWidth), line:7:26, endln:7:34 |vpiParent: - \_struct_typespec: (my_pkg::hw_key_req_t), line:6:12, endln:6:18 + \_operation: , line:7:26, endln:7:36 |vpiName:KeyWidth |vpiFullName:my_pkg::my_pkg::hw_key_req_t::KeyWidth |vpiActual: @@ -945,7 +945,7 @@ design: (work@top) |vpiRhs: \_hier_path: (keymgr_key_i.key[0][31:0]), line:16:14, endln:16:41 |vpiParent: - \_begin: (work@top.key_sideload_get), line:15:44, endln:17:10 + \_assignment: , line:16:10, endln:16:41 |vpiName:keymgr_key_i.key[0][31:0] |vpiActual: \_ref_obj: (keymgr_key_i), line:16:14, endln:16:26 @@ -953,20 +953,26 @@ design: (work@top) \_hier_path: (keymgr_key_i.key[0][31:0]), line:16:14, endln:16:41 |vpiName:keymgr_key_i |vpiActual: - \_var_select: (key), line:16:27, endln:16:41 + \_var_select: (work@top.key_sideload_get.key), line:16:27, endln:16:41 + |vpiParent: + \_assignment: , line:16:10, endln:16:41 |vpiName:key + |vpiFullName:work@top.key_sideload_get.key |vpiIndex: \_constant: , line:16:31, endln:16:32 |vpiParent: - \_var_select: (key), line:16:27, endln:16:41 + \_var_select: (work@top.key_sideload_get.key), line:16:27, endln:16:41 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 |vpiIndex: - \_part_select: , line:16:34, endln:16:40 + \_part_select: key (work@top.key_sideload_get.key.key), line:16:34, endln:16:40 |vpiParent: - \_var_select: (key), line:16:27, endln:16:41 + \_var_select: (work@top.key_sideload_get.key), line:16:27, endln:16:41 + |vpiName:key + |vpiFullName:work@top.key_sideload_get.key.key + |vpiDefName:key |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:16:34, endln:16:36 @@ -983,7 +989,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.key_sideload_get.o), line:16:10, endln:16:11 |vpiParent: - \_begin: (work@top.key_sideload_get), line:15:44, endln:17:10 + \_assignment: , line:16:10, endln:16:41 |vpiName:o |vpiFullName:work@top.key_sideload_get.o |vpiActual: @@ -1214,16 +1220,17 @@ design: (work@top) \_hier_path: (keymgr_key_i.key[0][31:0]), line:16:14, endln:16:41 |vpiName:key |vpiFullName:work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key + |vpiActual: + \_typespec_member: (key), line:7:40, endln:7:43 |vpiIndex: \_constant: , line:16:31, endln:16:32 |vpiIndex: - \_part_select: , line:16:34, endln:16:40 + \_part_select: key (work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key.key), line:16:34, endln:16:40 |vpiParent: - \_ref_obj: (work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key.key) - |vpiParent: - \_var_select: (work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key), line:16:27, endln:16:41 - |vpiName:key - |vpiFullName:work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key.key + \_var_select: (work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key), line:16:27, endln:16:41 + |vpiName:key + |vpiFullName:work@top.key_sideload_get.keymgr_key_i.key[0][31:0].key.key + |vpiDefName:key |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:16:34, endln:16:36 diff --git a/tests/PartSelectParent/PartSelectParent.log b/tests/PartSelectParent/PartSelectParent.log index e2322a2d1a..dd781ccba6 100644 --- a/tests/PartSelectParent/PartSelectParent.log +++ b/tests/PartSelectParent/PartSelectParent.log @@ -133,7 +133,7 @@ module_inst 3 operation 3 part_select 3 port 2 -ref_obj 6 +ref_obj 3 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -151,7 +151,7 @@ module_inst 3 operation 5 part_select 5 port 3 -ref_obj 10 +ref_obj 5 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PartSelectParent/slpp_all/surelog.uhdm ... @@ -207,8 +207,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:3:11, endln:3:12 - |vpiParent: - \_assignment: , line:3:7, endln:3:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -216,7 +214,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:3:7, endln:3:8 |vpiParent: - \_begin: (work@top), line:2:12, endln:5:7 + \_assignment: , line:3:7, endln:3:12 |vpiName:o |vpiFullName:work@top.o |vpiActual: @@ -229,8 +227,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:4:18, endln:4:23 - |vpiParent: - \_assignment: , line:4:7, endln:4:23 |vpiDecompile:2'b11 |vpiSize:2 |BIN:11 @@ -238,17 +234,15 @@ design: (work@top) |vpiLhs: \_operation: , line:4:8, endln:4:14 |vpiParent: - \_begin: (work@top), line:2:12, endln:5:7 + \_assignment: , line:4:7, endln:4:23 |vpiOpType:33 |vpiOperand: - \_part_select: , line:4:8, endln:4:14 + \_part_select: o (work@top.o), line:4:8, endln:4:14 |vpiParent: - \_ref_obj: o (work@top.o) - |vpiParent: - \_begin: (work@top), line:2:12, endln:5:7 - |vpiName:o - |vpiFullName:work@top.o - |vpiDefName:o + \_assignment: , line:4:7, endln:4:23 + |vpiName:o + |vpiFullName:work@top.o + |vpiDefName:o |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:4:10, endln:4:11 @@ -280,14 +274,12 @@ design: (work@top) \_cont_assign: , line:7:13, endln:7:29 |vpiOpType:33 |vpiOperand: - \_part_select: , line:7:14, endln:7:20 + \_part_select: o (work@top.o), line:7:14, endln:7:20 |vpiParent: - \_ref_obj: o (work@top.o) - |vpiParent: - \_operation: , line:7:14, endln:7:20 - |vpiName:o - |vpiFullName:work@top.o - |vpiDefName:o + \_operation: , line:7:14, endln:7:20 + |vpiName:o + |vpiFullName:work@top.o + |vpiDefName:o |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:7:16, endln:7:17 @@ -376,16 +368,14 @@ design: (work@top) \_assignment: , line:4:7, endln:4:23 |vpiOpType:33 |vpiOperand: - \_part_select: , line:4:8, endln:4:14 + \_part_select: o (work@top.o), line:4:8, endln:4:14 |vpiParent: - \_ref_obj: o (work@top.o) - |vpiParent: - \_operation: , line:4:8, endln:4:14 - |vpiName:o - |vpiFullName:work@top.o - |vpiDefName:o - |vpiActual: - \_int_var: (work@top.o), line:1:23, endln:1:24 + \_operation: , line:4:8, endln:4:14 + |vpiName:o + |vpiFullName:work@top.o + |vpiDefName:o + |vpiActual: + \_int_var: (work@top.o), line:1:23, endln:1:24 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:4:10, endln:4:11 @@ -403,21 +393,19 @@ design: (work@top) \_cont_assign: , line:7:13, endln:7:29 |vpiOpType:33 |vpiOperand: - \_part_select: , line:7:14, endln:7:20 + \_part_select: o (work@top.o), line:7:14, endln:7:20 |vpiParent: - \_ref_obj: o (work@top.o) - |vpiParent: - \_operation: , line:7:14, endln:7:20 - |vpiName:o - |vpiFullName:work@top.o - |vpiDefName:o - |vpiActual: - \_int_var: (work@top.o), line:1:23, endln:1:24 + \_operation: , line:7:14, endln:7:20 + |vpiName:o + |vpiFullName:work@top.o + |vpiDefName:o + |vpiActual: + \_int_var: (work@top.o), line:1:23, endln:1:24 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:7:16, endln:7:17 |vpiParent: - \_part_select: , line:7:14, endln:7:20 + \_part_select: o (o), line:7:14, endln:7:20 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -425,7 +413,7 @@ design: (work@top) |vpiRightRange: \_constant: , line:7:18, endln:7:19 |vpiParent: - \_part_select: , line:7:14, endln:7:20 + \_part_select: o (o), line:7:14, endln:7:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 diff --git a/tests/PartSelectRange/PartSelectRange.log b/tests/PartSelectRange/PartSelectRange.log index 724f11051a..13b563040f 100644 --- a/tests/PartSelectRange/PartSelectRange.log +++ b/tests/PartSelectRange/PartSelectRange.log @@ -282,7 +282,7 @@ parameter 6 part_select 5 range 5 ref_module 4 -ref_obj 19 +ref_obj 14 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -310,7 +310,7 @@ parameter 6 part_select 5 range 5 ref_module 4 -ref_obj 19 +ref_obj 14 ref_var 1 unsupported_typespec 1 === UHDM Object Stats End === @@ -475,16 +475,16 @@ design: (work@test) \_operation: , line:9:6, endln:9:29 |vpiOpType:14 |vpiOperand: - \_part_select: , line:9:6, endln:9:20 + \_part_select: MAP (MAP), line:9:6, endln:9:20 |vpiParent: - \_ref_obj: MAP (MAP) - |vpiParent: - \_operation: , line:9:6, endln:9:29 - |vpiName:MAP - |vpiDefName:MAP + \_operation: , line:9:6, endln:9:29 + |vpiName:MAP + |vpiDefName:MAP |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:9:10, endln:9:15 + |vpiParent: + \_part_select: MAP (MAP), line:9:6, endln:9:20 |vpiOpType:24 |vpiOperand: \_operation: , line:9:10, endln:9:13 @@ -492,10 +492,11 @@ design: (work@test) \_operation: , line:9:10, endln:9:15 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:9:10, endln:9:11 + \_ref_obj: (MAP.i), line:9:10, endln:9:11 |vpiParent: \_operation: , line:9:10, endln:9:13 |vpiName:i + |vpiFullName:MAP.i |vpiOperand: \_constant: , line:9:12, endln:9:13 |vpiParent: @@ -514,12 +515,15 @@ design: (work@test) |vpiConstType:9 |vpiRightRange: \_operation: , line:9:16, endln:9:19 + |vpiParent: + \_part_select: MAP (MAP), line:9:6, endln:9:20 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:9:16, endln:9:17 + \_ref_obj: (MAP.i), line:9:16, endln:9:17 |vpiParent: \_operation: , line:9:16, endln:9:19 |vpiName:i + |vpiFullName:MAP.i |vpiOperand: \_constant: , line:9:18, endln:9:19 |vpiParent: @@ -551,16 +555,16 @@ design: (work@test) \_operation: , line:13:11, endln:13:34 |vpiOpType:14 |vpiOperand: - \_part_select: , line:13:11, endln:13:25 + \_part_select: MAP (MAP), line:13:11, endln:13:25 |vpiParent: - \_ref_obj: MAP (MAP) - |vpiParent: - \_operation: , line:13:11, endln:13:34 - |vpiName:MAP - |vpiDefName:MAP + \_operation: , line:13:11, endln:13:34 + |vpiName:MAP + |vpiDefName:MAP |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:13:15, endln:13:20 + |vpiParent: + \_part_select: MAP (MAP), line:13:11, endln:13:25 |vpiOpType:24 |vpiOperand: \_operation: , line:13:15, endln:13:18 @@ -568,10 +572,11 @@ design: (work@test) \_operation: , line:13:15, endln:13:20 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:13:15, endln:13:16 + \_ref_obj: (MAP.i), line:13:15, endln:13:16 |vpiParent: \_operation: , line:13:15, endln:13:18 |vpiName:i + |vpiFullName:MAP.i |vpiOperand: \_constant: , line:13:17, endln:13:18 |vpiParent: @@ -590,12 +595,15 @@ design: (work@test) |vpiConstType:9 |vpiRightRange: \_operation: , line:13:21, endln:13:24 + |vpiParent: + \_part_select: MAP (MAP), line:13:11, endln:13:25 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:13:21, endln:13:22 + \_ref_obj: (MAP.i), line:13:21, endln:13:22 |vpiParent: \_operation: , line:13:21, endln:13:24 |vpiName:i + |vpiFullName:MAP.i |vpiOperand: \_constant: , line:13:23, endln:13:24 |vpiParent: diff --git a/tests/PatAssignOp/PatAssignOp.log b/tests/PatAssignOp/PatAssignOp.log index 8b04c5c93d..4171aea1b4 100644 --- a/tests/PatAssignOp/PatAssignOp.log +++ b/tests/PatAssignOp/PatAssignOp.log @@ -555,7 +555,7 @@ param_assign 12 parameter 13 range 5 ref_module 3 -ref_obj 25 +ref_obj 23 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -587,7 +587,7 @@ param_assign 12 parameter 13 range 5 ref_module 3 -ref_obj 25 +ref_obj 23 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PatAssignOp/slpp_all/surelog.uhdm ... @@ -1210,7 +1210,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:7:85, endln:7:107 |vpiParent: - \_operation: , line:7:83, endln:7:158 + \_operation: , line:7:85, endln:7:130 |vpiName:coh_noc_x_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:7:108, endln:7:130 @@ -1241,7 +1241,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (coh_noc_y_cord_width_p), line:8:11, endln:8:33 |vpiParent: - \_operation: , line:8:9, endln:8:84 + \_operation: , line:8:11, endln:8:56 |vpiName:coh_noc_y_cord_width_p |vpiOperand: \_ref_obj: (coh_noc_x_cord_width_p), line:8:34, endln:8:56 @@ -1267,16 +1267,12 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/PatAssignOp/dut.sv, line:2:1, endln:16:10 |vpiRhs: \_bit_select: (coh_noc_cord_markers_pos_p), line:9:39, endln:9:81 - |vpiParent: - \_ref_obj: (coh_noc_cord_markers_pos_p) - |vpiName:coh_noc_cord_markers_pos_p |vpiName:coh_noc_cord_markers_pos_p |vpiIndex: - \_ref_obj: (coh_noc_cord_markers_pos_p.coh_noc_dims_p), line:9:66, endln:9:80 + \_ref_obj: (coh_noc_dims_p), line:9:66, endln:9:80 |vpiParent: \_bit_select: (coh_noc_cord_markers_pos_p), line:9:39, endln:9:81 |vpiName:coh_noc_dims_p - |vpiFullName:coh_noc_cord_markers_pos_p.coh_noc_dims_p |vpiLhs: \_parameter: (work@top.coh_noc_cord_width_p), line:9:14, endln:9:34 |vpiDefName:work@top diff --git a/tests/PatternAssignment/PatternAssignment.log b/tests/PatternAssignment/PatternAssignment.log index 0a805ba05c..b7a5362070 100644 --- a/tests/PatternAssignment/PatternAssignment.log +++ b/tests/PatternAssignment/PatternAssignment.log @@ -262,12 +262,12 @@ design: (work@dut) |vpiOperand: \_operation: , line:11:7, endln:11:19 |vpiParent: - \_operation: , line:10:12, endln:13:2 + \_operation: , line:11:7, endln:11:33 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@dut.test), line:11:7, endln:11:11 |vpiParent: - \_operation: , line:10:12, endln:13:2 + \_operation: , line:11:7, endln:11:19 |vpiName:test |vpiFullName:work@dut.test |vpiActual: diff --git a/tests/PkgImportFunc/PkgImportFunc.log b/tests/PkgImportFunc/PkgImportFunc.log index 95b71cf40d..ade1f5858f 100644 --- a/tests/PkgImportFunc/PkgImportFunc.log +++ b/tests/PkgImportFunc/PkgImportFunc.log @@ -355,7 +355,7 @@ design: (work@top) |vpiName:result |vpiFullName:lc_ctrl_state_pkg::get_5::result |vpiActual: - \_int_var: (lc_ctrl_state_pkg::get_5::result), line:3:11, endln:3:17 + \_int_var: (prim_util_pkg::get_5::result), line:3:11, endln:3:17 |vpiInstance: \_package: lc_ctrl_state_pkg (lc_ctrl_state_pkg::), file:${SURELOG_DIR}/tests/PkgImportFunc/dut.sv, line:8:1, endln:10:11 |uhdmtopPackages: @@ -527,7 +527,7 @@ design: (work@top) |vpiName:result |vpiFullName:lc_ctrl_state_pkg::get_5::result |vpiActual: - \_int_var: (lc_ctrl_state_pkg::get_5::result), line:3:11, endln:3:17 + \_int_var: (prim_util_pkg::get_5::result), line:3:11, endln:3:17 |vpiInstance: \_package: lc_ctrl_state_pkg (lc_ctrl_state_pkg::), file:${SURELOG_DIR}/tests/PkgImportFunc/dut.sv, line:8:1, endln:10:11 |uhdmallModules: diff --git a/tests/PortInitVal/PortInitVal.log b/tests/PortInitVal/PortInitVal.log index 172c05beb4..e063df1b06 100644 --- a/tests/PortInitVal/PortInitVal.log +++ b/tests/PortInitVal/PortInitVal.log @@ -242,8 +242,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:5:27, endln:5:28 - |vpiParent: - \_assignment: , line:5:23, endln:5:28 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -251,7 +249,7 @@ design: (work@dut) |vpiLhs: \_ref_obj: (work@dut.b), line:5:23, endln:5:24 |vpiParent: - \_if_stmt: , line:5:17, endln:5:29 + \_assignment: , line:5:23, endln:5:28 |vpiName:b |vpiFullName:work@dut.b |vpiActual: diff --git a/tests/PortMultiDim/PortMultiDim.log b/tests/PortMultiDim/PortMultiDim.log index 1652e89a23..f9f2a3a825 100644 --- a/tests/PortMultiDim/PortMultiDim.log +++ b/tests/PortMultiDim/PortMultiDim.log @@ -36,7 +36,7 @@ operation 3 part_select 1 port 2 range 9 -ref_obj 4 +ref_obj 3 var_select 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -55,7 +55,7 @@ operation 3 part_select 2 port 3 range 9 -ref_obj 7 +ref_obj 5 var_select 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PortMultiDim/slpp_unit/surelog.uhdm ... @@ -170,9 +170,12 @@ design: (work@ibex_multdiv_fast) |UINT:1 |vpiConstType:9 |vpiIndex: - \_part_select: , line:6:44, endln:6:48 + \_part_select: imd_val_q_i (work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i), line:6:44, endln:6:48 |vpiParent: \_var_select: (work@ibex_multdiv_fast.imd_val_q_i), line:6:29, endln:6:49 + |vpiName:imd_val_q_i + |vpiFullName:work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i + |vpiDefName:imd_val_q_i |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:44, endln:6:46 @@ -352,18 +355,19 @@ design: (work@ibex_multdiv_fast) \_cont_assign: , line:6:10, endln:6:49 |vpiName:imd_val_q_i |vpiFullName:work@ibex_multdiv_fast.imd_val_q_i + |vpiActual: + \_array_net: (work@ibex_multdiv_fast.imd_val_q_i), line:2:24, endln:2:35 |vpiIndex: \_constant: , line:6:41, endln:6:42 |vpiIndex: - \_part_select: , line:6:44, endln:6:48 + \_part_select: imd_val_q_i (work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i), line:6:44, endln:6:48 |vpiParent: - \_ref_obj: (work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i) - |vpiParent: - \_var_select: (work@ibex_multdiv_fast.imd_val_q_i), line:6:29, endln:6:49 - |vpiName:imd_val_q_i - |vpiFullName:work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i - |vpiActual: - \_array_net: (work@ibex_multdiv_fast.imd_val_q_i), line:2:24, endln:2:35 + \_var_select: (work@ibex_multdiv_fast.imd_val_q_i), line:6:29, endln:6:49 + |vpiName:imd_val_q_i + |vpiFullName:work@ibex_multdiv_fast.imd_val_q_i.imd_val_q_i + |vpiDefName:imd_val_q_i + |vpiActual: + \_array_net: (work@ibex_multdiv_fast.imd_val_q_i), line:2:24, endln:2:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:6:44, endln:6:46 diff --git a/tests/PoundParam/PoundParam.log b/tests/PoundParam/PoundParam.log index 2c8ebeaa37..7b6b649ad6 100644 --- a/tests/PoundParam/PoundParam.log +++ b/tests/PoundParam/PoundParam.log @@ -662,7 +662,7 @@ part_select 9 port 47 range 36 ref_module 2 -ref_obj 62 +ref_obj 53 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -684,7 +684,7 @@ part_select 19 port 67 range 36 ref_module 2 -ref_obj 110 +ref_obj 91 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PoundParam/slpp_all/surelog.uhdm ... @@ -995,37 +995,35 @@ design: (work@test) |vpiRhs: \_operation: , line:28:18, endln:28:78 |vpiParent: - \_event_control: , line:26:8, endln:26:23 + \_assignment: , line:28:2, endln:28:78 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@dffr.se), line:28:18, endln:28:20 |vpiParent: - \_event_control: , line:26:8, endln:26:23 + \_operation: , line:28:18, endln:28:78 |vpiName:se |vpiFullName:work@dffr.se |vpiActual: \_logic_net: (work@test.park_reg.se), line:2:32, endln:2:34 |vpiOperand: - \_part_select: , line:28:23, endln:28:35 + \_part_select: si (work@dffr.si), line:28:23, endln:28:35 |vpiParent: - \_ref_obj: si (work@dffr.si), line:28:23, endln:28:25 - |vpiParent: - \_operation: , line:28:18, endln:28:78 - |vpiName:si - |vpiFullName:work@dffr.si - |vpiDefName:si + \_operation: , line:28:18, endln:28:78 + |vpiName:si + |vpiFullName:work@dffr.si + |vpiDefName:si |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:26, endln:28:32 |vpiParent: - \_operation: , line:28:18, endln:28:78 + \_part_select: si (work@dffr.si), line:28:23, endln:28:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@dffr.SIZE), line:28:26, endln:28:30 + \_ref_obj: (work@dffr.si.SIZE), line:28:26, endln:28:30 |vpiParent: - \_operation: , line:28:18, endln:28:78 + \_operation: , line:28:26, endln:28:32 |vpiName:SIZE - |vpiFullName:work@dffr.SIZE + |vpiFullName:work@dffr.si.SIZE |vpiOperand: \_constant: , line:28:31, endln:28:32 |vpiParent: @@ -1048,7 +1046,7 @@ design: (work@test) |vpiOperand: \_ref_obj: (work@dffr.rst), line:28:40, endln:28:43 |vpiParent: - \_operation: , line:28:18, endln:28:78 + \_operation: , line:28:39, endln:28:76 |vpiName:rst |vpiFullName:work@dffr.rst |vpiActual: @@ -1076,26 +1074,24 @@ design: (work@test) |BIN:0 |vpiConstType:3 |vpiOperand: - \_part_select: , line:28:63, endln:28:76 + \_part_select: din (work@dffr.din), line:28:63, endln:28:76 |vpiParent: - \_ref_obj: din (work@dffr.din), line:28:63, endln:28:66 - |vpiParent: - \_operation: , line:28:39, endln:28:76 - |vpiName:din - |vpiFullName:work@dffr.din - |vpiDefName:din + \_operation: , line:28:39, endln:28:76 + |vpiName:din + |vpiFullName:work@dffr.din + |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:67, endln:28:73 |vpiParent: - \_operation: , line:28:39, endln:28:76 + \_part_select: din (work@dffr.din), line:28:63, endln:28:76 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@dffr.SIZE), line:28:67, endln:28:71 + \_ref_obj: (work@dffr.din.SIZE), line:28:67, endln:28:71 |vpiParent: - \_operation: , line:28:39, endln:28:76 + \_operation: , line:28:67, endln:28:73 |vpiName:SIZE - |vpiFullName:work@dffr.SIZE + |vpiFullName:work@dffr.din.SIZE |vpiOperand: \_constant: , line:28:72, endln:28:73 |vpiParent: @@ -1111,26 +1107,24 @@ design: (work@test) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:28:2, endln:28:13 + \_part_select: q (work@dffr.q), line:28:2, endln:28:13 |vpiParent: - \_ref_obj: q (work@dffr.q) - |vpiParent: - \_assignment: , line:28:2, endln:28:78 - |vpiName:q - |vpiFullName:work@dffr.q - |vpiDefName:q + \_assignment: , line:28:2, endln:28:78 + |vpiName:q + |vpiFullName:work@dffr.q + |vpiDefName:q |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:4, endln:28:10 |vpiParent: - \_event_control: , line:26:8, endln:26:23 + \_part_select: q (work@dffr.q), line:28:2, endln:28:13 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@dffr.SIZE), line:28:4, endln:28:8 + \_ref_obj: (work@dffr.q.SIZE), line:28:4, endln:28:8 |vpiParent: - \_event_control: , line:26:8, endln:26:23 + \_operation: , line:28:4, endln:28:10 |vpiName:SIZE - |vpiFullName:work@dffr.SIZE + |vpiFullName:work@dffr.q.SIZE |vpiOperand: \_constant: , line:28:9, endln:28:10 |vpiParent: @@ -1151,23 +1145,24 @@ design: (work@test) |vpiParent: \_module_inst: work@dffr (work@dffr), file:${SURELOG_DIR}/tests/PoundParam/dut.v, line:2:1, endln:33:10 |vpiRhs: - \_part_select: , line:30:23, endln:30:34 + \_part_select: q (work@dffr.q), line:30:23, endln:30:34 |vpiParent: - \_ref_obj: q (work@dffr.q), line:30:23, endln:30:24 - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:q - |vpiFullName:work@dffr.q - |vpiDefName:q + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:q + |vpiFullName:work@dffr.q + |vpiDefName:q |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:25, endln:30:31 + |vpiParent: + \_part_select: q (work@dffr.q), line:30:23, endln:30:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SIZE), line:30:25, endln:30:29 + \_ref_obj: (work@dffr.q.SIZE), line:30:25, endln:30:29 |vpiParent: \_operation: , line:30:25, endln:30:31 |vpiName:SIZE + |vpiFullName:work@dffr.q.SIZE |vpiOperand: \_constant: , line:30:30, endln:30:31 |vpiParent: @@ -1183,23 +1178,24 @@ design: (work@test) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:30:8, endln:30:20 + \_part_select: so (work@dffr.so), line:30:8, endln:30:20 |vpiParent: - \_ref_obj: so (work@dffr.so) - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:so - |vpiFullName:work@dffr.so - |vpiDefName:so + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:so + |vpiFullName:work@dffr.so + |vpiDefName:so |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:11, endln:30:17 + |vpiParent: + \_part_select: so (work@dffr.so), line:30:8, endln:30:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SIZE), line:30:11, endln:30:15 + \_ref_obj: (work@dffr.so.SIZE), line:30:11, endln:30:15 |vpiParent: \_operation: , line:30:11, endln:30:17 |vpiName:SIZE + |vpiFullName:work@dffr.so.SIZE |vpiOperand: \_constant: , line:30:16, endln:30:17 |vpiParent: @@ -1394,11 +1390,9 @@ design: (work@test) \_port: (din), line:39:20, endln:39:40 |vpiName:din |vpiHighConn: - \_part_select: , line:39:27, endln:39:39 - |vpiParent: - \_ref_obj: next_pv (next_pv), line:39:27, endln:39:34 - |vpiName:next_pv - |vpiDefName:next_pv + \_part_select: next_pv (next_pv), line:39:27, endln:39:39 + |vpiName:next_pv + |vpiDefName:next_pv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:39:35, endln:39:36 @@ -1424,11 +1418,9 @@ design: (work@test) \_port: (q), line:41:21, endln:41:37 |vpiName:q |vpiHighConn: - \_part_select: , line:41:28, endln:41:36 - |vpiParent: - \_ref_obj: pv1 (pv1), line:41:28, endln:41:31 - |vpiName:pv1 - |vpiDefName:pv1 + \_part_select: pv1 (pv1), line:41:28, endln:41:36 + |vpiName:pv1 + |vpiDefName:pv1 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:41:32, endln:41:33 @@ -1474,11 +1466,9 @@ design: (work@test) \_port: (din), line:45:16, endln:45:36 |vpiName:din |vpiHighConn: - \_part_select: , line:45:23, endln:45:35 - |vpiParent: - \_ref_obj: next_pv (next_pv), line:45:23, endln:45:30 - |vpiName:next_pv - |vpiDefName:next_pv + \_part_select: next_pv (next_pv), line:45:23, endln:45:35 + |vpiName:next_pv + |vpiDefName:next_pv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:45:31, endln:45:32 @@ -1504,11 +1494,9 @@ design: (work@test) \_port: (q), line:47:21, endln:47:37 |vpiName:q |vpiHighConn: - \_part_select: , line:47:28, endln:47:36 - |vpiParent: - \_ref_obj: pv2 (pv2), line:47:28, endln:47:31 - |vpiName:pv2 - |vpiDefName:pv2 + \_part_select: pv2 (pv2), line:47:28, endln:47:36 + |vpiName:pv2 + |vpiDefName:pv2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:47:32, endln:47:33 @@ -2154,21 +2142,19 @@ design: (work@test) |vpiActual: \_logic_net: (work@test.park_reg.se), line:2:32, endln:2:34 |vpiOperand: - \_part_select: , line:28:23, endln:28:35 + \_part_select: si (work@test.park_reg.si), line:28:23, endln:28:35 |vpiParent: - \_ref_obj: si (work@test.park_reg.si), line:28:23, endln:28:25 - |vpiParent: - \_operation: , line:28:18, endln:28:78 - |vpiName:si - |vpiFullName:work@test.park_reg.si - |vpiDefName:si - |vpiActual: - \_logic_net: (work@test.park_reg.si), line:2:36, endln:2:38 + \_operation: , line:28:18, endln:28:78 + |vpiName:si + |vpiFullName:work@test.park_reg.si + |vpiDefName:si + |vpiActual: + \_logic_net: (work@test.park_reg.si), line:2:36, endln:2:38 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:26, endln:28:32 |vpiParent: - \_part_select: , line:28:23, endln:28:35 + \_part_select: si (work@test.park_reg.si), line:28:23, endln:28:35 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.park_reg.si.SIZE), line:28:26, endln:28:30 @@ -2216,21 +2202,19 @@ design: (work@test) |vpiOperand: \_constant: , line:28:53, endln:28:57 |vpiOperand: - \_part_select: , line:28:63, endln:28:76 + \_part_select: din (work@test.park_reg.din), line:28:63, endln:28:76 |vpiParent: - \_ref_obj: din (work@test.park_reg.din), line:28:63, endln:28:66 - |vpiParent: - \_operation: , line:28:39, endln:28:76 - |vpiName:din - |vpiFullName:work@test.park_reg.din - |vpiDefName:din - |vpiActual: - \_logic_net: (work@test.park_reg.din), line:2:14, endln:2:17 + \_operation: , line:28:39, endln:28:76 + |vpiName:din + |vpiFullName:work@test.park_reg.din + |vpiDefName:din + |vpiActual: + \_logic_net: (work@test.park_reg.din), line:2:14, endln:2:17 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:67, endln:28:73 |vpiParent: - \_part_select: , line:28:63, endln:28:76 + \_part_select: din (work@test.park_reg.din), line:28:63, endln:28:76 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.park_reg.din.SIZE), line:28:67, endln:28:71 @@ -2245,21 +2229,19 @@ design: (work@test) |vpiRightRange: \_constant: , line:28:74, endln:28:75 |vpiLhs: - \_part_select: , line:28:2, endln:28:13 + \_part_select: q (work@test.park_reg.q), line:28:2, endln:28:13 |vpiParent: - \_ref_obj: q (work@test.park_reg.q) - |vpiParent: - \_assignment: , line:28:2, endln:28:78 - |vpiName:q - |vpiFullName:work@test.park_reg.q - |vpiDefName:q - |vpiActual: - \_logic_net: (work@test.park_reg.q), line:18:17, endln:18:18 + \_assignment: , line:28:2, endln:28:78 + |vpiName:q + |vpiFullName:work@test.park_reg.q + |vpiDefName:q + |vpiActual: + \_logic_net: (work@test.park_reg.q), line:18:17, endln:18:18 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:4, endln:28:10 |vpiParent: - \_part_select: , line:28:2, endln:28:13 + \_part_select: q (work@test.park_reg.q), line:28:2, endln:28:13 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.park_reg.q.SIZE), line:28:4, endln:28:8 @@ -2279,21 +2261,19 @@ design: (work@test) |vpiParent: \_module_inst: work@dffr (work@test.park_reg), file:${SURELOG_DIR}/tests/PoundParam/dut.v, line:39:2, endln:43:47 |vpiRhs: - \_part_select: , line:30:23, endln:30:34 + \_part_select: q (work@test.park_reg.q), line:30:23, endln:30:34 |vpiParent: - \_ref_obj: q (work@test.park_reg.q), line:30:23, endln:30:24 - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:q - |vpiFullName:work@test.park_reg.q - |vpiDefName:q - |vpiActual: - \_logic_net: (work@test.park_reg.q), line:18:17, endln:18:18 + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:q + |vpiFullName:work@test.park_reg.q + |vpiDefName:q + |vpiActual: + \_logic_net: (work@test.park_reg.q), line:18:17, endln:18:18 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:25, endln:30:31 |vpiParent: - \_part_select: , line:30:23, endln:30:34 + \_part_select: q (work@test.park_reg.q), line:30:23, endln:30:34 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.park_reg.q.SIZE), line:30:25, endln:30:29 @@ -2308,21 +2288,19 @@ design: (work@test) |vpiRightRange: \_constant: , line:30:32, endln:30:33 |vpiLhs: - \_part_select: , line:30:8, endln:30:20 + \_part_select: so (work@test.park_reg.so), line:30:8, endln:30:20 |vpiParent: - \_ref_obj: so (work@test.park_reg.so) - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:so - |vpiFullName:work@test.park_reg.so - |vpiDefName:so - |vpiActual: - \_logic_net: (work@test.park_reg.so), line:2:40, endln:2:42 + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:so + |vpiFullName:work@test.park_reg.so + |vpiDefName:so + |vpiActual: + \_logic_net: (work@test.park_reg.so), line:2:40, endln:2:42 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:11, endln:30:17 |vpiParent: - \_part_select: , line:30:8, endln:30:20 + \_part_select: so (work@test.park_reg.so), line:30:8, endln:30:20 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.park_reg.so.SIZE), line:30:11, endln:30:15 @@ -2728,7 +2706,7 @@ design: (work@test) |vpiName:clk |vpiFullName:work@test.logic.clk |vpiActual: - \_logic_net: (work@test.logic.clk), line:2:19, endln:2:22 + \_logic_net: (work@test.park_reg.clk), line:2:19, endln:2:22 |vpiStmt: \_assignment: , line:28:2, endln:28:78 |vpiParent: @@ -2746,23 +2724,21 @@ design: (work@test) |vpiName:se |vpiFullName:work@test.logic.se |vpiActual: - \_logic_net: (work@test.logic.se), line:2:32, endln:2:34 + \_logic_net: (work@test.park_reg.se), line:2:32, endln:2:34 |vpiOperand: - \_part_select: , line:28:23, endln:28:35 + \_part_select: si (work@test.logic.si), line:28:23, endln:28:35 |vpiParent: - \_ref_obj: si (work@test.logic.si), line:28:23, endln:28:25 - |vpiParent: - \_operation: , line:28:18, endln:28:78 - |vpiName:si - |vpiFullName:work@test.logic.si - |vpiDefName:si - |vpiActual: - \_logic_net: (work@test.logic.si), line:2:36, endln:2:38 + \_operation: , line:28:18, endln:28:78 + |vpiName:si + |vpiFullName:work@test.logic.si + |vpiDefName:si + |vpiActual: + \_logic_net: (work@test.logic.si), line:2:36, endln:2:38 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:26, endln:28:32 |vpiParent: - \_part_select: , line:28:23, endln:28:35 + \_part_select: si (work@test.logic.si), line:28:23, endln:28:35 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.logic.si.SIZE), line:28:26, endln:28:30 @@ -2788,7 +2764,7 @@ design: (work@test) |vpiName:rst |vpiFullName:work@test.logic.rst |vpiActual: - \_logic_net: (work@test.logic.rst), line:2:24, endln:2:27 + \_logic_net: (work@test.park_reg.rst), line:2:24, endln:2:27 |vpiOperand: \_operation: , line:28:47, endln:28:59 |vpiParent: @@ -2810,21 +2786,19 @@ design: (work@test) |vpiOperand: \_constant: , line:28:53, endln:28:57 |vpiOperand: - \_part_select: , line:28:63, endln:28:76 + \_part_select: din (work@test.logic.din), line:28:63, endln:28:76 |vpiParent: - \_ref_obj: din (work@test.logic.din), line:28:63, endln:28:66 - |vpiParent: - \_operation: , line:28:39, endln:28:76 - |vpiName:din - |vpiFullName:work@test.logic.din - |vpiDefName:din - |vpiActual: - \_logic_net: (work@test.logic.din), line:2:14, endln:2:17 + \_operation: , line:28:39, endln:28:76 + |vpiName:din + |vpiFullName:work@test.logic.din + |vpiDefName:din + |vpiActual: + \_logic_net: (work@test.logic.din), line:2:14, endln:2:17 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:67, endln:28:73 |vpiParent: - \_part_select: , line:28:63, endln:28:76 + \_part_select: din (work@test.logic.din), line:28:63, endln:28:76 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.logic.din.SIZE), line:28:67, endln:28:71 @@ -2839,21 +2813,19 @@ design: (work@test) |vpiRightRange: \_constant: , line:28:74, endln:28:75 |vpiLhs: - \_part_select: , line:28:2, endln:28:13 + \_part_select: q (work@test.logic.q), line:28:2, endln:28:13 |vpiParent: - \_ref_obj: q (work@test.logic.q) - |vpiParent: - \_assignment: , line:28:2, endln:28:78 - |vpiName:q - |vpiFullName:work@test.logic.q - |vpiDefName:q - |vpiActual: - \_logic_net: (work@test.logic.q), line:18:17, endln:18:18 + \_assignment: , line:28:2, endln:28:78 + |vpiName:q + |vpiFullName:work@test.logic.q + |vpiDefName:q + |vpiActual: + \_logic_net: (work@test.logic.q), line:18:17, endln:18:18 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:4, endln:28:10 |vpiParent: - \_part_select: , line:28:2, endln:28:13 + \_part_select: q (work@test.logic.q), line:28:2, endln:28:13 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.logic.q.SIZE), line:28:4, endln:28:8 @@ -2873,21 +2845,19 @@ design: (work@test) |vpiParent: \_module_inst: work@dffr (work@test.logic), file:${SURELOG_DIR}/tests/PoundParam/dut.v, line:45:2, endln:49:47 |vpiRhs: - \_part_select: , line:30:23, endln:30:34 + \_part_select: q (work@test.logic.q), line:30:23, endln:30:34 |vpiParent: - \_ref_obj: q (work@test.logic.q), line:30:23, endln:30:24 - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:q - |vpiFullName:work@test.logic.q - |vpiDefName:q - |vpiActual: - \_logic_net: (work@test.logic.q), line:18:17, endln:18:18 + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:q + |vpiFullName:work@test.logic.q + |vpiDefName:q + |vpiActual: + \_logic_net: (work@test.logic.q), line:18:17, endln:18:18 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:25, endln:30:31 |vpiParent: - \_part_select: , line:30:23, endln:30:34 + \_part_select: q (work@test.logic.q), line:30:23, endln:30:34 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.logic.q.SIZE), line:30:25, endln:30:29 @@ -2902,21 +2872,19 @@ design: (work@test) |vpiRightRange: \_constant: , line:30:32, endln:30:33 |vpiLhs: - \_part_select: , line:30:8, endln:30:20 + \_part_select: so (work@test.logic.so), line:30:8, endln:30:20 |vpiParent: - \_ref_obj: so (work@test.logic.so) - |vpiParent: - \_cont_assign: , line:30:8, endln:30:34 - |vpiName:so - |vpiFullName:work@test.logic.so - |vpiDefName:so - |vpiActual: - \_logic_net: (work@test.logic.so), line:2:40, endln:2:42 + \_cont_assign: , line:30:8, endln:30:34 + |vpiName:so + |vpiFullName:work@test.logic.so + |vpiDefName:so + |vpiActual: + \_logic_net: (work@test.logic.so), line:2:40, endln:2:42 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:11, endln:30:17 |vpiParent: - \_part_select: , line:30:8, endln:30:20 + \_part_select: so (work@test.logic.so), line:30:8, endln:30:20 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@test.logic.so.SIZE), line:30:11, endln:30:15 @@ -2938,4 +2906,4 @@ design: (work@test) [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/tests/PoundParam/dut.v | ${SURELOG_DIR}/build/regression/PoundParam/roundtrip/dut_000.v | 26 | 51 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/PoundParam/dut.v | ${SURELOG_DIR}/build/regression/PoundParam/roundtrip/dut_000.v | 27 | 51 | \ No newline at end of file diff --git a/tests/PpLppdr/PpLppdr.log b/tests/PpLppdr/PpLppdr.log index 8b8ccf1699..c9eb005f73 100644 --- a/tests/PpLppdr/PpLppdr.log +++ b/tests/PpLppdr/PpLppdr.log @@ -122,7 +122,7 @@ design 1 func_call 2 logic_net 3 module_inst 2 -ref_obj 6 +ref_obj 5 task 1 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -136,7 +136,7 @@ design 1 func_call 4 logic_net 3 module_inst 2 -ref_obj 12 +ref_obj 10 task 2 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PpLppdr/slpp_all/surelog.uhdm ... @@ -208,7 +208,7 @@ design: (work@top) |vpiRhs: \_ref_obj: (work@top.set_refgen_en.en), line:12:49, endln:12:51 |vpiParent: - \_begin: (work@top.set_refgen_en), line:19:5, endln:21:8 + \_assignment: , line:12:36, endln:12:51 |vpiName:en |vpiFullName:work@top.set_refgen_en.en |vpiActual: @@ -216,11 +216,7 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.set_refgen_en.wdata), line:12:36, endln:12:46 |vpiParent: - \_ref_obj: (work@top.set_refgen_en.wdata) - |vpiParent: - \_assignment: , line:12:36, endln:12:51 - |vpiName:wdata - |vpiFullName:work@top.set_refgen_en.wdata + \_assignment: , line:12:36, endln:12:51 |vpiName:wdata |vpiFullName:work@top.set_refgen_en.wdata |vpiIndex: @@ -320,18 +316,12 @@ design: (work@top) |vpiLhs: \_bit_select: (wdata), line:12:36, endln:12:46 |vpiParent: - \_ref_obj: (work@top.set_refgen_en.wdata) - |vpiParent: - \_assignment: , line:12:36, endln:12:51 - |vpiName:wdata - |vpiFullName:work@top.set_refgen_en.wdata - |vpiActual: - \_logic_net: (wdata) + \_assignment: , line:12:36, endln:12:51 |vpiName:wdata - |vpiIndex: - \_constant: , line:12:42, endln:12:43 |vpiActual: \_logic_net: (wdata) + |vpiIndex: + \_constant: , line:12:42, endln:12:43 |vpiStmt: \_func_call: (csr_write), line:13:36, endln:13:81 |vpiParent: diff --git a/tests/PragmaProtect/PragmaProtect.log b/tests/PragmaProtect/PragmaProtect.log index 3777651289..ccc8597ee5 100644 --- a/tests/PragmaProtect/PragmaProtect.log +++ b/tests/PragmaProtect/PragmaProtect.log @@ -65,7 +65,7 @@ operation 10 package 2 port 8 range 13 -ref_obj 36 +ref_obj 33 ref_var 1 sys_func_call 4 task 9 diff --git a/tests/PreprocFunc/PreprocFunc.log b/tests/PreprocFunc/PreprocFunc.log index d48916118a..6dc040ed44 100644 --- a/tests/PreprocFunc/PreprocFunc.log +++ b/tests/PreprocFunc/PreprocFunc.log @@ -1445,7 +1445,7 @@ design: (work@asym_ram) |vpiOperand: \_ref_obj: (work@asym_ram.log2.value), line:18:6, endln:18:11 |vpiParent: - \_begin: (work@asym_ram.log2), line:17:1, endln:27:4 + \_operation: , line:18:6, endln:18:15 |vpiName:value |vpiFullName:work@asym_ram.log2.value |vpiActual: @@ -1467,7 +1467,7 @@ design: (work@asym_ram) |vpiRhs: \_ref_obj: (work@asym_ram.log2.value), line:19:10, endln:19:15 |vpiParent: - \_if_else: , line:18:2, endln:26:5 + \_assignment: , line:19:3, endln:19:15 |vpiName:value |vpiFullName:work@asym_ram.log2.value |vpiActual: @@ -1475,7 +1475,7 @@ design: (work@asym_ram) |vpiLhs: \_ref_obj: (work@asym_ram.log2.log2), line:19:3, endln:19:7 |vpiParent: - \_if_else: , line:18:2, endln:26:5 + \_assignment: , line:19:3, endln:19:15 |vpiName:log2 |vpiFullName:work@asym_ram.log2.log2 |vpiActual: @@ -1494,12 +1494,12 @@ design: (work@asym_ram) |vpiRhs: \_operation: , line:22:13, endln:22:20 |vpiParent: - \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 + \_assignment: , line:22:3, endln:22:20 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@asym_ram.log2.value), line:22:13, endln:22:18 |vpiParent: - \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 + \_operation: , line:22:13, endln:22:20 |vpiName:value |vpiFullName:work@asym_ram.log2.value |vpiActual: @@ -1515,7 +1515,7 @@ design: (work@asym_ram) |vpiLhs: \_ref_obj: (work@asym_ram.log2.shifted), line:22:3, endln:22:10 |vpiParent: - \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 + \_assignment: , line:22:3, endln:22:20 |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: @@ -1552,12 +1552,12 @@ design: (work@asym_ram) |vpiRhs: \_operation: , line:23:30, endln:23:35 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_assignment: , line:23:26, endln:23:35 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@asym_ram.log2.res), line:23:30, endln:23:33 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_operation: , line:23:30, endln:23:35 |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: @@ -1573,7 +1573,7 @@ design: (work@asym_ram) |vpiLhs: \_ref_obj: (work@asym_ram.log2.res), line:23:26, endln:23:29 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_assignment: , line:23:26, endln:23:35 |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: @@ -1608,12 +1608,12 @@ design: (work@asym_ram) |vpiRhs: \_operation: , line:24:14, endln:24:24 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_assignment: , line:24:4, endln:24:24 |vpiOpType:23 |vpiOperand: \_ref_obj: (work@asym_ram.log2.shifted), line:24:14, endln:24:21 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_operation: , line:24:14, endln:24:24 |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: @@ -1629,7 +1629,7 @@ design: (work@asym_ram) |vpiLhs: \_ref_obj: (work@asym_ram.log2.shifted), line:24:4, endln:24:11 |vpiParent: - \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 + \_assignment: , line:24:4, endln:24:24 |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: @@ -1643,7 +1643,7 @@ design: (work@asym_ram) |vpiRhs: \_ref_obj: (work@asym_ram.log2.res), line:25:10, endln:25:13 |vpiParent: - \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 + \_assignment: , line:25:3, endln:25:13 |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: @@ -1651,7 +1651,7 @@ design: (work@asym_ram) |vpiLhs: \_ref_obj: (work@asym_ram.log2.log2), line:25:3, endln:25:7 |vpiParent: - \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 + \_assignment: , line:25:3, endln:25:13 |vpiName:log2 |vpiFullName:work@asym_ram.log2.log2 |vpiActual: @@ -1872,7 +1872,7 @@ design: (work@asym_ram) |vpiName:log2 |vpiFullName:work@asym_ram.log2.log2 |vpiActual: - \_integer_var: , line:13:10, endln:13:17 + \_integer_var: (log2), line:13:10, endln:13:17 |vpiElseStmt: \_begin: (work@asym_ram.log2), line:21:2, endln:26:5 |vpiParent: @@ -1906,7 +1906,7 @@ design: (work@asym_ram) |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: - \_logic_var: (work@asym_ram.log2.shifted), line:15:1, endln:15:11 + \_logic_var: (shifted), line:15:1, endln:15:11 |vpiStmt: \_for_stmt: (work@asym_ram.log2), line:23:3, endln:23:6 |vpiParent: @@ -1944,7 +1944,7 @@ design: (work@asym_ram) |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: - \_integer_var: (work@asym_ram.log2.res), line:16:1, endln:16:8 + \_integer_var: (res), line:16:1, endln:16:8 |vpiOperand: \_constant: , line:23:34, endln:23:35 |vpiLhs: @@ -1954,7 +1954,7 @@ design: (work@asym_ram) |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: - \_integer_var: (work@asym_ram.log2.res), line:16:1, endln:16:8 + \_integer_var: (res), line:16:1, endln:16:8 |vpiCondition: \_operation: , line:23:15, endln:23:24 |vpiParent: @@ -1967,7 +1967,7 @@ design: (work@asym_ram) |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: - \_logic_var: (work@asym_ram.log2.shifted), line:15:1, endln:15:11 + \_logic_var: (shifted), line:15:1, endln:15:11 |vpiOperand: \_constant: , line:23:23, endln:23:24 |vpiStmt: @@ -1988,7 +1988,7 @@ design: (work@asym_ram) |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: - \_logic_var: (work@asym_ram.log2.shifted), line:15:1, endln:15:11 + \_logic_var: (shifted), line:15:1, endln:15:11 |vpiOperand: \_constant: , line:24:23, endln:24:24 |vpiLhs: @@ -1998,7 +1998,7 @@ design: (work@asym_ram) |vpiName:shifted |vpiFullName:work@asym_ram.log2.shifted |vpiActual: - \_logic_var: (work@asym_ram.log2.shifted), line:15:1, endln:15:11 + \_logic_var: (shifted), line:15:1, endln:15:11 |vpiStmt: \_assignment: , line:25:3, endln:25:13 |vpiParent: @@ -2012,7 +2012,7 @@ design: (work@asym_ram) |vpiName:res |vpiFullName:work@asym_ram.log2.res |vpiActual: - \_integer_var: (work@asym_ram.log2.res), line:16:1, endln:16:8 + \_integer_var: (res), line:16:1, endln:16:8 |vpiLhs: \_ref_obj: (work@asym_ram.log2.log2), line:25:3, endln:25:7 |vpiParent: @@ -2020,7 +2020,7 @@ design: (work@asym_ram) |vpiName:log2 |vpiFullName:work@asym_ram.log2.log2 |vpiActual: - \_integer_var: , line:13:10, endln:13:17 + \_integer_var: (log2), line:13:10, endln:13:17 |vpiInstance: \_module_inst: work@asym_ram (work@asym_ram), file:${SURELOG_DIR}/tests/PreprocFunc/dut.sv, line:5:1, endln:45:10 |vpiTopModule:1 diff --git a/tests/PreprocLine/PreprocLine.log b/tests/PreprocLine/PreprocLine.log index 372563fdd9..6630146474 100644 --- a/tests/PreprocLine/PreprocLine.log +++ b/tests/PreprocLine/PreprocLine.log @@ -16,38 +16,38 @@ n u<3> t p<4> l<1:8> el<1:11> n<> u<4> t p<66> c<2> s<64> l<1:1> el<1:12> n<> u<5> t p<17> s<6> l<3:9> el<3:10> n u<6> t p<17> s<16> l<3:10> el<3:17> -n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:64> -n<> u<8> t p<9> c<7> l<3:18> el<3:64> -n<> u<9> t p<10> c<8> l<3:18> el<3:64> -n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:64> -n<3> u<11> t p<12> l<3:66> el<3:67> -n<> u<12> t p<13> c<11> l<3:66> el<3:67> -n<> u<13> t p<14> c<12> l<3:66> el<3:67> -n<> u<14> t p<15> c<13> l<3:66> el<3:67> -n<> u<15> t p<16> c<14> l<3:66> el<3:67> -n<> u<16> t p<17> c<10> l<3:18> el<3:67> -n<> u<17> t p<18> c<5> l<3:9> el<3:68> -n<> u<18> t p<19> c<17> l<3:9> el<3:69> -n<> u<19> t p<20> c<18> l<3:9> el<3:69> -n<> u<20> t p<21> c<19> l<3:9> el<3:69> -n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:69> +n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t p<8> l<3:18> el<3:78> +n<> u<8> t p<9> c<7> l<3:18> el<3:78> +n<> u<9> t p<10> c<8> l<3:18> el<3:78> +n<> u<10> t p<16> c<9> s<15> l<3:18> el<3:78> +n<3> u<11> t p<12> l<3:80> el<3:81> +n<> u<12> t p<13> c<11> l<3:80> el<3:81> +n<> u<13> t p<14> c<12> l<3:80> el<3:81> +n<> u<14> t p<15> c<13> l<3:80> el<3:81> +n<> u<15> t p<16> c<14> l<3:80> el<3:81> +n<> u<16> t p<17> c<10> l<3:18> el<3:81> +n<> u<17> t p<18> c<5> l<3:9> el<3:82> +n<> u<18> t p<19> c<17> l<3:9> el<3:83> +n<> u<19> t p<20> c<18> l<3:9> el<3:83> +n<> u<20> t p<21> c<19> l<3:9> el<3:83> +n<> u<21> t p<57> c<20> s<38> l<3:9> el<3:83> n<> u<22> t p<34> s<23> l<5:9> el<5:10> n u<23> t p<34> s<33> l<5:10> el<5:17> -n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:64> -n<> u<25> t p<26> c<24> l<5:18> el<5:64> -n<> u<26> t p<27> c<25> l<5:18> el<5:64> -n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:64> -n<102> u<28> t p<29> l<5:66> el<5:69> -n<> u<29> t p<30> c<28> l<5:66> el<5:69> -n<> u<30> t p<31> c<29> l<5:66> el<5:69> -n<> u<31> t p<32> c<30> l<5:66> el<5:69> -n<> u<32> t p<33> c<31> l<5:66> el<5:69> -n<> u<33> t p<34> c<27> l<5:18> el<5:69> -n<> u<34> t p<35> c<22> l<5:9> el<5:70> -n<> u<35> t p<36> c<34> l<5:9> el<5:71> -n<> u<36> t p<37> c<35> l<5:9> el<5:71> -n<> u<37> t p<38> c<36> l<5:9> el<5:71> -n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:71> +n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t p<25> l<5:18> el<5:78> +n<> u<25> t p<26> c<24> l<5:18> el<5:78> +n<> u<26> t p<27> c<25> l<5:18> el<5:78> +n<> u<27> t p<33> c<26> s<32> l<5:18> el<5:78> +n<102> u<28> t p<29> l<5:80> el<5:83> +n<> u<29> t p<30> c<28> l<5:80> el<5:83> +n<> u<30> t p<31> c<29> l<5:80> el<5:83> +n<> u<31> t p<32> c<30> l<5:80> el<5:83> +n<> u<32> t p<33> c<31> l<5:80> el<5:83> +n<> u<33> t p<34> c<27> l<5:18> el<5:83> +n<> u<34> t p<35> c<22> l<5:9> el<5:84> +n<> u<35> t p<36> c<34> l<5:9> el<5:85> +n<> u<36> t p<37> c<35> l<5:9> el<5:85> +n<> u<37> t p<38> c<36> l<5:9> el<5:85> +n<> u<38> t p<57> c<37> s<55> l<5:9> el<5:85> n<> u<39> t p<51> s<40> f<0> l<10:9> el<10:10> n u<40> t p<51> s<50> f<0> l<10:10> el<10:17> n<""> u<41> t p<42> f<0> l<10:18> el<10:20> diff --git a/tests/PrimTermExpr/PrimTermExpr.log b/tests/PrimTermExpr/PrimTermExpr.log index 751fb5cec9..080193103c 100644 --- a/tests/PrimTermExpr/PrimTermExpr.log +++ b/tests/PrimTermExpr/PrimTermExpr.log @@ -155,7 +155,7 @@ module_inst 5 port 16 prim_term 12 range 4 -ref_obj 22 +ref_obj 18 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -170,7 +170,7 @@ module_inst 5 port 21 prim_term 18 range 4 -ref_obj 33 +ref_obj 27 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/PrimTermExpr/slpp_all/surelog.uhdm ... @@ -598,13 +598,11 @@ design: (work@encoder_4to2_gates) |vpiExpr: \_bit_select: (work@encoder_4to2_gates.y), line:5:8, endln:5:12 |vpiParent: - \_ref_obj: (work@encoder_4to2_gates.o1.o1) - |vpiParent: - \_prim_term: , line:5:8, endln:5:12 - |vpiName:o1 - |vpiFullName:work@encoder_4to2_gates.o1.o1 + \_prim_term: , line:5:8, endln:5:12 |vpiName:y |vpiFullName:work@encoder_4to2_gates.y + |vpiActual: + \_logic_net: (work@encoder_4to2_gates.y), line:1:40, endln:1:41 |vpiIndex: \_constant: , line:5:10, endln:5:11 |vpiParent: @@ -613,8 +611,6 @@ design: (work@encoder_4to2_gates) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@encoder_4to2_gates.y), line:1:40, endln:1:41 |vpiPrimTerm: \_prim_term: , line:5:13, endln:5:15 |vpiParent: @@ -659,13 +655,11 @@ design: (work@encoder_4to2_gates) |vpiExpr: \_bit_select: (work@encoder_4to2_gates.y), line:6:8, endln:6:12 |vpiParent: - \_ref_obj: (work@encoder_4to2_gates.o2.o2) - |vpiParent: - \_prim_term: , line:6:8, endln:6:12 - |vpiName:o2 - |vpiFullName:work@encoder_4to2_gates.o2.o2 + \_prim_term: , line:6:8, endln:6:12 |vpiName:y |vpiFullName:work@encoder_4to2_gates.y + |vpiActual: + \_logic_net: (work@encoder_4to2_gates.y), line:1:40, endln:1:41 |vpiIndex: \_constant: , line:6:10, endln:6:11 |vpiParent: @@ -674,8 +668,6 @@ design: (work@encoder_4to2_gates) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@encoder_4to2_gates.y), line:1:40, endln:1:41 |vpiPrimTerm: \_prim_term: , line:6:13, endln:6:15 |vpiParent: diff --git a/tests/ProcForLoop/ProcForLoop.log b/tests/ProcForLoop/ProcForLoop.log index b21121282c..54613aecbe 100644 --- a/tests/ProcForLoop/ProcForLoop.log +++ b/tests/ProcForLoop/ProcForLoop.log @@ -984,12 +984,12 @@ design: (work@top) |vpiRhs: \_operation: , line:3:30, endln:3:33 |vpiParent: - \_for_stmt: (work@top.foo), line:3:7, endln:3:10 + \_assignment: , line:3:26, endln:3:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@top.foo.i), line:3:30, endln:3:31 |vpiParent: - \_for_stmt: (work@top.foo), line:3:7, endln:3:10 + \_operation: , line:3:30, endln:3:33 |vpiName:i |vpiFullName:work@top.foo.i |vpiActual: @@ -1005,7 +1005,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.foo.i), line:3:26, endln:3:27 |vpiParent: - \_for_stmt: (work@top.foo), line:3:7, endln:3:10 + \_assignment: , line:3:26, endln:3:33 |vpiName:i |vpiFullName:work@top.foo.i |vpiActual: diff --git a/tests/RangeInf/RangeInf.log b/tests/RangeInf/RangeInf.log index e5ec135a4e..1d72f3ef97 100644 --- a/tests/RangeInf/RangeInf.log +++ b/tests/RangeInf/RangeInf.log @@ -500,7 +500,7 @@ package 2 part_select 1 port 10 range 12 -ref_obj 22 +ref_obj 20 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -529,7 +529,7 @@ package 2 part_select 2 port 15 range 12 -ref_obj 35 +ref_obj 31 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/RangeInf/slpp_all/surelog.uhdm ... @@ -1193,14 +1193,12 @@ design: (work@FullAdder) |vpiParent: \_module_inst: work@FullAdder (work@FullAdder), file:${SURELOG_DIR}/tests/RangeInf/dut.sv, line:1:1, endln:10:10 |vpiRhs: - \_part_select: , line:8:15, endln:8:24 + \_part_select: temp (work@FullAdder.temp), line:8:15, endln:8:24 |vpiParent: - \_ref_obj: temp (work@FullAdder.temp), line:8:15, endln:8:19 - |vpiParent: - \_cont_assign: , line:8:11, endln:8:24 - |vpiName:temp - |vpiFullName:work@FullAdder.temp - |vpiDefName:temp + \_cont_assign: , line:8:11, endln:8:24 + |vpiName:temp + |vpiFullName:work@FullAdder.temp + |vpiDefName:temp |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:8:20, endln:8:21 @@ -1229,11 +1227,7 @@ design: (work@FullAdder) |vpiRhs: \_bit_select: (work@FullAdder.temp), line:9:16, endln:9:23 |vpiParent: - \_ref_obj: (work@FullAdder.temp) - |vpiParent: - \_cont_assign: , line:9:11, endln:9:23 - |vpiName:temp - |vpiFullName:work@FullAdder.temp + \_cont_assign: , line:9:11, endln:9:23 |vpiName:temp |vpiFullName:work@FullAdder.temp |vpiIndex: @@ -1544,16 +1538,14 @@ design: (work@FullAdder) |vpiParent: \_module_inst: work@FullAdder (work@FullAdder), file:${SURELOG_DIR}/tests/RangeInf/dut.sv, line:1:1, endln:10:10 |vpiRhs: - \_part_select: , line:8:15, endln:8:24 + \_part_select: temp (work@FullAdder.temp), line:8:15, endln:8:24 |vpiParent: - \_ref_obj: temp (work@FullAdder.temp), line:8:15, endln:8:19 - |vpiParent: - \_cont_assign: , line:8:11, endln:8:24 - |vpiName:temp - |vpiFullName:work@FullAdder.temp - |vpiDefName:temp - |vpiActual: - \_logic_net: (work@FullAdder.temp), line:6:14, endln:6:18 + \_cont_assign: , line:8:11, endln:8:24 + |vpiName:temp + |vpiFullName:work@FullAdder.temp + |vpiDefName:temp + |vpiActual: + \_logic_net: (work@FullAdder.temp), line:6:14, endln:6:18 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:8:20, endln:8:21 @@ -1574,19 +1566,13 @@ design: (work@FullAdder) |vpiRhs: \_bit_select: (work@FullAdder.temp), line:9:16, endln:9:23 |vpiParent: - \_ref_obj: (work@FullAdder.temp) - |vpiParent: - \_cont_assign: , line:9:11, endln:9:23 - |vpiName:temp - |vpiFullName:work@FullAdder.temp - |vpiActual: - \_logic_net: (work@FullAdder.temp), line:6:14, endln:6:18 + \_cont_assign: , line:9:11, endln:9:23 |vpiName:temp |vpiFullName:work@FullAdder.temp - |vpiIndex: - \_constant: , line:9:21, endln:9:22 |vpiActual: \_logic_net: (work@FullAdder.temp), line:6:14, endln:6:18 + |vpiIndex: + \_constant: , line:9:21, endln:9:22 |vpiLhs: \_ref_obj: (work@FullAdder.Cout), line:9:11, endln:9:15 |vpiParent: @@ -1603,4 +1589,4 @@ design: (work@FullAdder) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/RangeInf/dut.sv | ${SURELOG_DIR}/build/regression/RangeInf/roundtrip/dut_000.sv | 5 | 10 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/RangeInf/dut.sv | ${SURELOG_DIR}/build/regression/RangeInf/roundtrip/dut_000.sv | 6 | 10 | \ No newline at end of file diff --git a/tests/RangeSelect/RangeSelect.log b/tests/RangeSelect/RangeSelect.log index 30e2c82414..b9dc9150d1 100644 --- a/tests/RangeSelect/RangeSelect.log +++ b/tests/RangeSelect/RangeSelect.log @@ -39,7 +39,7 @@ logic_var 2 module_inst 3 operation 1 range 4 -ref_obj 4 +ref_obj 1 struct_net 2 struct_typespec 1 typespec_member 1 @@ -59,7 +59,7 @@ logic_var 2 module_inst 3 operation 1 range 4 -ref_obj 4 +ref_obj 1 struct_net 2 struct_typespec 1 typespec_member 1 @@ -166,13 +166,13 @@ design: (work@top) \_hier_path: (a[0].source[6-:2]), line:8:14, endln:8:33 |vpiName:a[0].source[6-:2] |vpiActual: - \_bit_select: (a), line:8:14, endln:8:15 + \_bit_select: (a[0]), line:8:14, endln:8:15 |vpiParent: - \_ref_obj: (a[0]) - |vpiParent: - \_hier_path: (a[0].source[6-:2]), line:8:14, endln:8:33 - |vpiName:a[0] + \_hier_path: (a[0].source[6-:2]), line:8:14, endln:8:33 |vpiName:a + |vpiFullName:a[0] + |vpiActual: + \_array_net: (work@top.a), line:6:13, endln:6:14 |vpiIndex: \_constant: , line:8:16, endln:8:17 |vpiDecompile:0 @@ -180,10 +180,9 @@ design: (work@top) |UINT:0 |vpiConstType:9 |vpiActual: - \_indexed_part_select: , line:8:19, endln:8:32 - |vpiParent: - \_ref_obj: (source) - |vpiName:source + \_indexed_part_select: (a[0].source[6-:2]), line:8:19, endln:8:32 + |vpiName:source + |vpiFullName:a[0].source[6-:2] |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -236,10 +235,9 @@ design: (work@top) |vpiActual: \_struct_net: (work@top.b), line:7:13, endln:7:14 |vpiActual: - \_indexed_part_select: , line:9:22, endln:9:35 - |vpiParent: - \_ref_obj: (source) - |vpiName:source + \_indexed_part_select: (b.source[6-:2]), line:9:22, endln:9:35 + |vpiName:source + |vpiFullName:b.source[6-:2] |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: diff --git a/tests/ReorderPatt/ReorderPatt.log b/tests/ReorderPatt/ReorderPatt.log index 4cb4f0eefa..cc52f16591 100644 --- a/tests/ReorderPatt/ReorderPatt.log +++ b/tests/ReorderPatt/ReorderPatt.log @@ -131,7 +131,7 @@ operation 4 param_assign 4 parameter 5 range 6 -ref_obj 6 +ref_obj 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -148,7 +148,7 @@ operation 4 param_assign 4 parameter 5 range 6 -ref_obj 7 +ref_obj 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/ReorderPatt/slpp_all/surelog.uhdm ... @@ -237,9 +237,6 @@ design: (work@top) \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/ReorderPatt/dut.sv, line:1:1, endln:5:10 |vpiRhs: \_bit_select: (x), line:3:18, endln:3:22 - |vpiParent: - \_ref_obj: (x) - |vpiName:x |vpiName:x |vpiIndex: \_constant: , line:3:20, endln:3:21 @@ -259,11 +256,7 @@ design: (work@top) |vpiRhs: \_bit_select: (work@top.x), line:4:15, endln:4:19 |vpiParent: - \_ref_obj: (work@top.x) - |vpiParent: - \_cont_assign: , line:4:11, endln:4:19 - |vpiName:x - |vpiFullName:work@top.x + \_cont_assign: , line:4:11, endln:4:19 |vpiName:x |vpiFullName:work@top.x |vpiIndex: diff --git a/tests/RepeatStmt/RepeatStmt.log b/tests/RepeatStmt/RepeatStmt.log index 4600b756c0..49126078a2 100644 --- a/tests/RepeatStmt/RepeatStmt.log +++ b/tests/RepeatStmt/RepeatStmt.log @@ -358,8 +358,6 @@ design: (work@constfunc11) |vpiBlocking:1 |vpiRhs: \_constant: , line:9:10, endln:9:11 - |vpiParent: - \_assignment: , line:9:3, endln:9:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -367,7 +365,7 @@ design: (work@constfunc11) |vpiLhs: \_ref_obj: (work@constfunc11.pow2.body.pow2), line:9:3, endln:9:7 |vpiParent: - \_named_begin: (work@constfunc11.pow2.body), line:8:1, endln:13:4 + \_assignment: , line:9:3, endln:9:11 |vpiName:pow2 |vpiFullName:work@constfunc11.pow2.body.pow2 |vpiActual: @@ -398,7 +396,7 @@ design: (work@constfunc11) |vpiRhs: \_operation: , line:11:12, endln:11:20 |vpiParent: - \_begin: (work@constfunc11.pow2.body), line:10:14, endln:12:6 + \_assignment: , line:11:5, endln:11:20 |vpiOpType:25 |vpiOperand: \_constant: , line:11:12, endln:11:13 @@ -419,7 +417,7 @@ design: (work@constfunc11) |vpiLhs: \_ref_obj: (work@constfunc11.pow2.body.pow2), line:11:5, endln:11:9 |vpiParent: - \_begin: (work@constfunc11.pow2.body), line:10:14, endln:12:6 + \_assignment: , line:11:5, endln:11:20 |vpiName:pow2 |vpiFullName:work@constfunc11.pow2.body.pow2 |vpiActual: @@ -514,7 +512,7 @@ design: (work@constfunc11) |vpiName:pow2 |vpiFullName:work@constfunc11.pow2.body.pow2 |vpiActual: - \_logic_var: , line:6:10, endln:6:16 + \_logic_var: (pow2), line:6:10, endln:6:16 |vpiStmt: \_repeat: , line:10:3, endln:10:9 |vpiParent: @@ -552,7 +550,7 @@ design: (work@constfunc11) |vpiName:pow2 |vpiFullName:work@constfunc11.pow2.body.pow2 |vpiActual: - \_logic_var: , line:6:10, endln:6:16 + \_logic_var: (pow2), line:6:10, endln:6:16 |vpiLhs: \_ref_obj: (work@constfunc11.pow2.body.pow2), line:11:5, endln:11:9 |vpiParent: @@ -560,7 +558,7 @@ design: (work@constfunc11) |vpiName:pow2 |vpiFullName:work@constfunc11.pow2.body.pow2 |vpiActual: - \_logic_var: , line:6:10, endln:6:16 + \_logic_var: (pow2), line:6:10, endln:6:16 |vpiInstance: \_module_inst: work@constfunc11 (work@constfunc11), file:${SURELOG_DIR}/tests/RepeatStmt/dut.sv, line:4:1, endln:23:10 |vpiTopModule:1 diff --git a/tests/SelectHierPath/SelectHierPath.log b/tests/SelectHierPath/SelectHierPath.log index dc501124c8..5a40354434 100644 --- a/tests/SelectHierPath/SelectHierPath.log +++ b/tests/SelectHierPath/SelectHierPath.log @@ -119,7 +119,7 @@ logic_net 2 module_inst 4 operation 1 range 1 -ref_obj 4 +ref_obj 3 struct_net 1 struct_typespec 2 typespec_member 2 @@ -138,7 +138,7 @@ logic_net 2 module_inst 4 operation 1 range 1 -ref_obj 8 +ref_obj 6 struct_net 1 struct_typespec 2 typespec_member 2 @@ -177,14 +177,11 @@ design: (work@IntegerRegisterWriteStage) \_cont_assign: , line:14:8, endln:14:40 |vpiName:pipeReg[1].brResult.nextAddr |vpiActual: - \_bit_select: (pipeReg), line:14:12, endln:14:19 + \_bit_select: (pipeReg[1]), line:14:12, endln:14:19 |vpiParent: - \_ref_obj: (work@IntegerRegisterWriteStage.pipeReg[1]) - |vpiParent: - \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 - |vpiName:pipeReg[1] - |vpiFullName:work@IntegerRegisterWriteStage.pipeReg[1] + \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:pipeReg + |vpiFullName:pipeReg[1] |vpiIndex: \_constant: , line:14:20, endln:14:21 |vpiDecompile:1 @@ -197,10 +194,11 @@ design: (work@IntegerRegisterWriteStage) \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:brResult |vpiActual: - \_ref_obj: (nextAddr), line:14:32, endln:14:40 + \_ref_obj: (work@IntegerRegisterWriteStage.nextAddr), line:14:32, endln:14:40 |vpiParent: \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:nextAddr + |vpiFullName:work@IntegerRegisterWriteStage.nextAddr |vpiLhs: \_ref_obj: (work@IntegerRegisterWriteStage.o), line:14:8, endln:14:9 |vpiParent: @@ -313,18 +311,15 @@ design: (work@IntegerRegisterWriteStage) \_cont_assign: , line:14:8, endln:14:40 |vpiName:pipeReg[1].brResult.nextAddr |vpiActual: - \_bit_select: (pipeReg), line:14:12, endln:14:19 + \_bit_select: (pipeReg[1]), line:14:12, endln:14:19 |vpiParent: - \_ref_obj: (work@IntegerRegisterWriteStage.pipeReg[1]) - |vpiParent: - \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 - |vpiName:pipeReg[1] - |vpiFullName:work@IntegerRegisterWriteStage.pipeReg[1] + \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:pipeReg - |vpiIndex: - \_constant: , line:14:20, endln:14:21 + |vpiFullName:pipeReg[1] |vpiActual: \_array_net: (work@IntegerRegisterWriteStage.pipeReg), line:12:34, endln:12:41 + |vpiIndex: + \_constant: , line:14:20, endln:14:21 |vpiActual: \_ref_obj: (brResult), line:14:23, endln:14:31 |vpiParent: @@ -333,10 +328,11 @@ design: (work@IntegerRegisterWriteStage) |vpiActual: \_typespec_member: (brResult), line:6:18, endln:6:26 |vpiActual: - \_ref_obj: (nextAddr), line:14:32, endln:14:40 + \_ref_obj: (work@IntegerRegisterWriteStage.nextAddr), line:14:32, endln:14:40 |vpiParent: \_hier_path: (pipeReg[1].brResult.nextAddr), line:14:12, endln:14:40 |vpiName:nextAddr + |vpiFullName:work@IntegerRegisterWriteStage.nextAddr |vpiActual: \_typespec_member: (nextAddr), line:2:9, endln:2:17 |vpiLhs: diff --git a/tests/SelectSelect/SelectSelect.log b/tests/SelectSelect/SelectSelect.log index 665eefb263..e0ec2ec437 100644 --- a/tests/SelectSelect/SelectSelect.log +++ b/tests/SelectSelect/SelectSelect.log @@ -415,7 +415,7 @@ package 2 packed_array_typespec 1 packed_array_var 1 range 7 -ref_obj 2 +ref_obj 1 struct_typespec 1 struct_var 1 task 9 @@ -446,7 +446,7 @@ package 2 packed_array_typespec 1 packed_array_var 1 range 7 -ref_obj 2 +ref_obj 1 struct_typespec 1 struct_var 1 task 18 @@ -1048,13 +1048,13 @@ design: (work@adc_ctrl_core) \_hier_path: (a[0][0].min_v), line:7:20, endln:7:33 |vpiName:a[0][0].min_v |vpiActual: - \_bit_select: (a), line:7:20, endln:7:21 + \_bit_select: (a[0]), line:7:20, endln:7:21 |vpiParent: - \_ref_obj: (a[0]) - |vpiParent: - \_hier_path: (a[0][0].min_v), line:7:20, endln:7:33 - |vpiName:a[0] + \_hier_path: (a[0][0].min_v), line:7:20, endln:7:33 |vpiName:a + |vpiFullName:a[0] + |vpiActual: + \_packed_array_var: (work@adc_ctrl_core.a), line:6:28, endln:6:29 |vpiIndex: \_constant: , line:7:22, endln:7:23 |vpiDecompile:0 @@ -1062,8 +1062,10 @@ design: (work@adc_ctrl_core) |UINT:0 |vpiConstType:9 |vpiActual: - \_bit_select: ([0]), line:7:22, endln:7:23 - |vpiName:[0] + \_bit_select: (a[0][0]), line:7:22, endln:7:23 + |vpiParent: + \_hier_path: (a[0][0].min_v), line:7:20, endln:7:33 + |vpiFullName:a[0][0] |vpiIndex: \_constant: , line:7:25, endln:7:26 |vpiDecompile:0 diff --git a/tests/Selects/Selects.log b/tests/Selects/Selects.log index 3e72124468..369a0263b8 100644 --- a/tests/Selects/Selects.log +++ b/tests/Selects/Selects.log @@ -176,7 +176,7 @@ module_inst 3 packed_array_typespec 2 packed_array_var 1 range 3 -ref_obj 5 +ref_obj 3 struct_typespec 2 struct_var 2 typespec_member 2 @@ -195,7 +195,7 @@ module_inst 3 packed_array_typespec 2 packed_array_var 1 range 3 -ref_obj 5 +ref_obj 3 struct_typespec 2 struct_var 2 typespec_member 2 @@ -374,13 +374,13 @@ design: (work@t) |vpiActual: \_struct_var: (work@t.reg2hw), line:11:19, endln:11:25 |vpiActual: - \_bit_select: (sw_rst_ctrl_n), line:14:20, endln:14:33 + \_bit_select: (reg2hw.sw_rst_ctrl_n[0]), line:14:20, endln:14:33 |vpiParent: - \_ref_obj: (sw_rst_ctrl_n[0]) - |vpiParent: - \_hier_path: (reg2hw.sw_rst_ctrl_n[0].q), line:14:13, endln:14:38 - |vpiName:sw_rst_ctrl_n[0] + \_hier_path: (reg2hw.sw_rst_ctrl_n[0].q), line:14:13, endln:14:38 |vpiName:sw_rst_ctrl_n + |vpiFullName:reg2hw.sw_rst_ctrl_n[0] + |vpiActual: + \_packed_array_var: (work@t.sw_rst_ctrl_n), line:12:44, endln:12:57 |vpiIndex: \_constant: , line:14:34, endln:14:35 |vpiDecompile:0 @@ -405,13 +405,13 @@ design: (work@t) \_hier_path: (sw_rst_ctrl_n[0].q), line:15:13, endln:15:31 |vpiName:sw_rst_ctrl_n[0].q |vpiActual: - \_bit_select: (sw_rst_ctrl_n), line:15:13, endln:15:26 + \_bit_select: (sw_rst_ctrl_n[0]), line:15:13, endln:15:26 |vpiParent: - \_ref_obj: (sw_rst_ctrl_n[0]) - |vpiParent: - \_hier_path: (sw_rst_ctrl_n[0].q), line:15:13, endln:15:31 - |vpiName:sw_rst_ctrl_n[0] + \_hier_path: (sw_rst_ctrl_n[0].q), line:15:13, endln:15:31 |vpiName:sw_rst_ctrl_n + |vpiFullName:sw_rst_ctrl_n[0] + |vpiActual: + \_packed_array_var: (work@t.sw_rst_ctrl_n), line:12:44, endln:12:57 |vpiIndex: \_constant: , line:15:27, endln:15:28 |vpiDecompile:0 diff --git a/tests/SimpleClass1/SimpleClass1.log b/tests/SimpleClass1/SimpleClass1.log index 75647fb663..57481978f4 100644 --- a/tests/SimpleClass1/SimpleClass1.log +++ b/tests/SimpleClass1/SimpleClass1.log @@ -806,8 +806,8 @@ case_stmt 211 chandle_typespec 14 chandle_var 2 class_defn 640 -class_typespec 16237 -class_var 8582 +class_typespec 16250 +class_var 8595 constant 79265 constraint 12 continue_stmt 124 @@ -837,7 +837,7 @@ indexed_part_select 121 int_typespec 6540 int_var 2626 io_decl 12883 -logic_net 346 +logic_net 349 logic_typespec 202 logic_var 71 long_int_typespec 179 @@ -856,7 +856,7 @@ part_select 123 range 12073 real_typespec 41 real_var 8 -ref_obj 106730 +ref_obj 101131 ref_var 4425 repeat 70 return_stmt 6760 diff --git a/tests/SimpleConstraint/SimpleConstraint.log b/tests/SimpleConstraint/SimpleConstraint.log index f2a6b7022d..3aefa7f729 100644 --- a/tests/SimpleConstraint/SimpleConstraint.log +++ b/tests/SimpleConstraint/SimpleConstraint.log @@ -1061,7 +1061,7 @@ operation 6 package 2 program 1 range 3 -ref_obj 27 +ref_obj 26 ref_var 1 string_typespec 1 string_var 1 diff --git a/tests/SimpleInterface/SimpleInterface.log b/tests/SimpleInterface/SimpleInterface.log index c79884d618..ae0f84de44 100644 --- a/tests/SimpleInterface/SimpleInterface.log +++ b/tests/SimpleInterface/SimpleInterface.log @@ -2193,8 +2193,8 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8561 -class_var 3402 +class_typespec 8562 +class_var 3403 clocking_block 2 clocking_io_decl 6 constant 29447 @@ -2229,7 +2229,7 @@ int_var 1171 interface_inst 5 interface_typespec 3 io_decl 6913 -logic_net 474 +logic_net 477 logic_typespec 106 logic_var 42 long_int_typespec 99 @@ -2251,7 +2251,7 @@ range 3225 real_typespec 33 real_var 8 ref_module 2 -ref_obj 44209 +ref_obj 42012 ref_var 1789 repeat 26 return_stmt 3272 diff --git a/tests/SimpleTask/SimpleTask.log b/tests/SimpleTask/SimpleTask.log index fc516b3f0d..4f9d99e506 100644 --- a/tests/SimpleTask/SimpleTask.log +++ b/tests/SimpleTask/SimpleTask.log @@ -103,7 +103,7 @@ module_inst 3 operation 10 package 2 range 13 -ref_obj 54 +ref_obj 52 sys_func_call 14 task 11 task_call 6 diff --git a/tests/SplitFile/SplitFile.log b/tests/SplitFile/SplitFile.log index 0b17ad5391..84cf1e8e90 100644 --- a/tests/SplitFile/SplitFile.log +++ b/tests/SplitFile/SplitFile.log @@ -240,7 +240,7 @@ port 25 prim_term 3 range 3 ref_module 3 -ref_obj 34 +ref_obj 33 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/SplitFile/slpp_unit/surelog.uhdm ... diff --git a/tests/StaticTask/StaticTask.log b/tests/StaticTask/StaticTask.log index 26ae399a8c..cb272e8afa 100644 --- a/tests/StaticTask/StaticTask.log +++ b/tests/StaticTask/StaticTask.log @@ -203,12 +203,12 @@ design: (work@tb) |vpiRhs: \_operation: , line:7:6, endln:7:11 |vpiParent: - \_begin: (work@tb.display) + \_assignment: , line:7:2, endln:7:11 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@tb.display.i), line:7:6, endln:7:7 |vpiParent: - \_begin: (work@tb.display) + \_operation: , line:7:6, endln:7:11 |vpiName:i |vpiFullName:work@tb.display.i |vpiActual: @@ -224,7 +224,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.display.i), line:7:2, endln:7:3 |vpiParent: - \_begin: (work@tb.display) + \_assignment: , line:7:2, endln:7:11 |vpiName:i |vpiFullName:work@tb.display.i |vpiActual: diff --git a/tests/StringPort/StringPort.log b/tests/StringPort/StringPort.log index ed4fec998e..cb27fe3d84 100644 --- a/tests/StringPort/StringPort.log +++ b/tests/StringPort/StringPort.log @@ -873,8 +873,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:4:11, endln:4:17 - |vpiParent: - \_assignment: , line:4:7, endln:4:17 |vpiDecompile:"abcd" |vpiSize:32 |STRING:abcd @@ -882,7 +880,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.o), line:4:7, endln:4:8 |vpiParent: - \_begin: (work@top), line:3:12, endln:5:7 + \_assignment: , line:4:7, endln:4:17 |vpiName:o |vpiFullName:work@top.o |vpiActual: diff --git a/tests/StringRange/StringRange.log b/tests/StringRange/StringRange.log index 94d45e7e59..a0ab9f8721 100644 --- a/tests/StringRange/StringRange.log +++ b/tests/StringRange/StringRange.log @@ -2112,7 +2112,7 @@ parameter 2707 part_select 293 port 22 range 46 -ref_obj 423 +ref_obj 130 ref_var 1 string_typespec 11 sys_func_call 6 @@ -2152,7 +2152,7 @@ parameter 2707 part_select 297 port 39 range 46 -ref_obj 555 +ref_obj 258 ref_var 5 string_typespec 11 sys_func_call 6 @@ -2265,7 +2265,7 @@ design: (work@top) |vpiRhs: \_operation: , line:8:16, endln:8:20 |vpiParent: - \_function: (work@Example.flip), line:6:5, endln:9:16 + \_assignment: , line:8:9, endln:8:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@Example.flip.inp), line:8:17, endln:8:20 @@ -2278,7 +2278,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.flip.flip), line:8:9, endln:8:13 |vpiParent: - \_function: (work@Example.flip), line:6:5, endln:9:16 + \_assignment: , line:8:9, endln:8:20 |vpiName:flip |vpiFullName:work@Example.flip.flip |vpiActual: @@ -2420,8 +2420,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:32:16, endln:32:17 - |vpiParent: - \_assignment: , line:32:9, endln:32:17 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -2429,7 +2427,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outD), line:32:9, endln:32:13 |vpiParent: - \_begin: (work@Example), line:31:13, endln:36:8 + \_assignment: , line:32:9, endln:32:17 |vpiName:outD |vpiFullName:work@Example.outD |vpiActual: @@ -2466,12 +2464,12 @@ design: (work@top) |vpiRhs: \_operation: , line:33:56, endln:33:61 |vpiParent: - \_for_stmt: (work@Example), line:33:9, endln:33:12 + \_assignment: , line:33:52, endln:33:61 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@Example.j), line:33:56, endln:33:57 |vpiParent: - \_for_stmt: (work@Example), line:33:9, endln:33:12 + \_operation: , line:33:56, endln:33:61 |vpiName:j |vpiFullName:work@Example.j |vpiActual: @@ -2487,7 +2485,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.j), line:33:52, endln:33:53 |vpiParent: - \_for_stmt: (work@Example), line:33:9, endln:33:12 + \_assignment: , line:33:52, endln:33:61 |vpiName:j |vpiFullName:work@Example.j |vpiActual: @@ -2514,14 +2512,12 @@ design: (work@top) |vpiParent: \_func_call: (flip), line:33:26, endln:33:50 |vpiArgument: - \_part_select: , line:33:36, endln:33:48 + \_part_select: OUTPUT (work@Example.OUTPUT), line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (work@Example.OUTPUT), line:33:36, endln:33:42 - |vpiParent: - \_func_call: (flip), line:33:31, endln:33:49 - |vpiName:OUTPUT - |vpiFullName:work@Example.OUTPUT - |vpiDefName:OUTPUT + \_func_call: (flip), line:33:31, endln:33:49 + |vpiName:OUTPUT + |vpiFullName:work@Example.OUTPUT + |vpiDefName:OUTPUT |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:43, endln:33:45 @@ -2553,12 +2549,12 @@ design: (work@top) |vpiOperand: \_operation: , line:34:17, endln:34:22 |vpiParent: - \_for_stmt: (work@Example), line:33:9, endln:33:12 + \_operation: , line:34:17, endln:34:41 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@Example.j), line:34:17, endln:34:18 |vpiParent: - \_for_stmt: (work@Example), line:33:9, endln:33:12 + \_operation: , line:34:17, endln:34:22 |vpiName:j |vpiFullName:work@Example.j |vpiActual: @@ -2601,8 +2597,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:35:24, endln:35:25 - |vpiParent: - \_assignment: , line:35:17, endln:35:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2610,7 +2604,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outD), line:35:17, endln:35:21 |vpiParent: - \_if_stmt: , line:34:13, endln:35:26 + \_assignment: , line:35:17, endln:35:25 |vpiName:outD |vpiFullName:work@Example.outD |vpiActual: @@ -2627,8 +2621,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:24, endln:24:25 - |vpiParent: - \_assignment: , line:24:17, endln:24:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2636,7 +2628,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outC), line:24:17, endln:24:21 |vpiParent: - \_initial: , line:24:9, endln:24:26 + \_assignment: , line:24:17, endln:24:25 |vpiName:outC |vpiFullName:work@Example.outC |vpiActual: @@ -2653,8 +2645,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:24, endln:24:25 - |vpiParent: - \_assignment: , line:24:17, endln:24:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2662,7 +2652,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outC), line:24:17, endln:24:21 |vpiParent: - \_initial: , line:24:9, endln:24:26 + \_assignment: , line:24:17, endln:24:25 |vpiName:outC |vpiFullName:work@Example.outC |vpiActual: @@ -2679,8 +2669,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:24, endln:24:25 - |vpiParent: - \_assignment: , line:24:17, endln:24:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2688,7 +2676,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outC), line:24:17, endln:24:21 |vpiParent: - \_initial: , line:24:9, endln:24:26 + \_assignment: , line:24:17, endln:24:25 |vpiName:outC |vpiFullName:work@Example.outC |vpiActual: @@ -2705,8 +2693,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:24, endln:24:25 - |vpiParent: - \_assignment: , line:24:17, endln:24:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2714,7 +2700,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@Example.outC), line:24:17, endln:24:21 |vpiParent: - \_initial: , line:24:9, endln:24:26 + \_assignment: , line:24:17, endln:24:25 |vpiName:outC |vpiFullName:work@Example.outC |vpiActual: @@ -2873,7 +2859,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (W), line:62:34, endln:62:35 |vpiParent: - \_sys_func_call: ($floor), line:62:27, endln:62:40 + \_operation: , line:62:34, endln:62:39 |vpiName:W |vpiOperand: \_ref_obj: (X), line:62:38, endln:62:39 @@ -2901,7 +2887,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (W), line:63:41, endln:63:42 |vpiParent: - \_sys_func_call: ($floor), line:63:34, endln:63:47 + \_operation: , line:63:41, endln:63:46 |vpiName:W |vpiOperand: \_ref_obj: (X), line:63:45, endln:63:46 @@ -2964,7 +2950,7 @@ design: (work@top) |vpiRhs: \_operation: , line:58:18, endln:58:22 |vpiParent: - \_function: (work@top.negate), line:56:5, endln:59:16 + \_assignment: , line:58:9, endln:58:22 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.negate.inp), line:58:19, endln:58:22 @@ -2977,7 +2963,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.negate.negate), line:58:9, endln:58:15 |vpiParent: - \_function: (work@top.negate), line:56:5, endln:59:16 + \_assignment: , line:58:9, endln:58:22 |vpiName:negate |vpiFullName:work@top.negate.negate |vpiActual: @@ -3193,7 +3179,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.a1), line:66:16, endln:66:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:66:16, endln:66:23 |vpiName:a1 |vpiFullName:work@top.a1 |vpiActual: @@ -3218,7 +3204,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.a2), line:67:16, endln:67:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:67:16, endln:67:23 |vpiName:a2 |vpiFullName:work@top.a2 |vpiActual: @@ -3243,7 +3229,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.a3), line:68:16, endln:68:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:68:16, endln:68:27 |vpiName:a3 |vpiFullName:work@top.a3 |vpiActual: @@ -3268,7 +3254,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.a4), line:69:16, endln:69:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:69:16, endln:69:23 |vpiName:a4 |vpiFullName:work@top.a4 |vpiActual: @@ -3293,7 +3279,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.b1), line:70:16, endln:70:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:70:16, endln:70:27 |vpiName:b1 |vpiFullName:work@top.b1 |vpiActual: @@ -3318,7 +3304,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.b2), line:71:16, endln:71:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:71:16, endln:71:27 |vpiName:b2 |vpiFullName:work@top.b2 |vpiActual: @@ -3343,7 +3329,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.b3), line:72:16, endln:72:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:72:16, endln:72:23 |vpiName:b3 |vpiFullName:work@top.b3 |vpiActual: @@ -3368,7 +3354,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.b4), line:73:16, endln:73:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:73:16, endln:73:26 |vpiName:b4 |vpiFullName:work@top.b4 |vpiActual: @@ -3393,7 +3379,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.c1), line:74:16, endln:74:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:74:16, endln:74:23 |vpiName:c1 |vpiFullName:work@top.c1 |vpiActual: @@ -3418,7 +3404,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.c2), line:75:16, endln:75:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:75:16, endln:75:23 |vpiName:c2 |vpiFullName:work@top.c2 |vpiActual: @@ -3443,7 +3429,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.c3), line:76:16, endln:76:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:76:16, endln:76:23 |vpiName:c3 |vpiFullName:work@top.c3 |vpiActual: @@ -3468,7 +3454,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.c4), line:77:16, endln:77:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:77:16, endln:77:23 |vpiName:c4 |vpiFullName:work@top.c4 |vpiActual: @@ -3493,7 +3479,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.d1), line:78:16, endln:78:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:78:16, endln:78:23 |vpiName:d1 |vpiFullName:work@top.d1 |vpiActual: @@ -3518,7 +3504,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.d2), line:79:16, endln:79:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:79:16, endln:79:23 |vpiName:d2 |vpiFullName:work@top.d2 |vpiActual: @@ -3543,7 +3529,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.d3), line:80:16, endln:80:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:80:16, endln:80:23 |vpiName:d3 |vpiFullName:work@top.d3 |vpiActual: @@ -3568,7 +3554,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.d4), line:81:16, endln:81:18 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:81:16, endln:81:23 |vpiName:d4 |vpiFullName:work@top.d4 |vpiActual: @@ -3593,7 +3579,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.Y), line:83:16, endln:83:17 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:83:16, endln:83:22 |vpiName:Y |vpiFullName:work@top.Y |vpiOperand: @@ -3616,7 +3602,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.Z), line:84:16, endln:84:17 |vpiParent: - \_begin: (work@top), line:65:17, endln:85:8 + \_operation: , line:84:16, endln:84:23 |vpiName:Z |vpiFullName:work@top.Z |vpiOperand: @@ -3941,7 +3927,7 @@ design: (work@top) |vpiName:negate |vpiFullName:work@top.negate.negate |vpiActual: - \_int_var: , line:56:14, endln:56:20 + \_int_var: (negate), line:56:14, endln:56:20 |vpiInstance: \_module_inst: work@top (work@top), file:${SURELOG_DIR}/tests/StringRange/dut.sv, line:39:1, endln:86:10 |vpiNet: @@ -4635,7 +4621,7 @@ design: (work@top) |vpiName:flip |vpiFullName:work@top.e1.flip.flip |vpiActual: - \_logic_var: , line:6:24, endln:6:30 + \_logic_var: (flip), line:6:24, endln:6:30 |vpiInstance: \_module_inst: work@Example (work@top.e1), file:${SURELOG_DIR}/tests/StringRange/dut.sv, line:44:5, endln:44:41 |vpiNet: @@ -4951,16 +4937,14 @@ design: (work@top) |vpiParent: \_func_call: (flip), line:33:26, endln:33:50 |vpiArgument: - \_part_select: , line:33:36, endln:33:48 + \_part_select: OUTPUT (work@top.e1.OUTPUT), line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (work@top.e1.OUTPUT), line:33:36, endln:33:42 - |vpiParent: - \_func_call: (flip), line:33:31, endln:33:49 - |vpiName:OUTPUT - |vpiFullName:work@top.e1.OUTPUT - |vpiDefName:OUTPUT - |vpiActual: - \_parameter: (work@top.e1.OUTPUT), line:2:15, endln:2:21 + \_func_call: (flip), line:33:31, endln:33:49 + |vpiName:OUTPUT + |vpiFullName:work@top.e1.OUTPUT + |vpiDefName:OUTPUT + |vpiActual: + \_parameter: (work@top.e1.OUTPUT), line:2:15, endln:2:21 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:43, endln:33:45 @@ -6856,8 +6840,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:32, endln:27:33 - |vpiParent: - \_assignment: , line:27:25, endln:27:33 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6959,7 +6941,7 @@ design: (work@top) |vpiName:flip |vpiFullName:work@top.e2.flip.flip |vpiActual: - \_logic_var: , line:6:24, endln:6:30 + \_logic_var: (flip), line:6:24, endln:6:30 |vpiInstance: \_module_inst: work@Example (work@top.e2), file:${SURELOG_DIR}/tests/StringRange/dut.sv, line:45:5, endln:45:41 |vpiNet: @@ -7204,7 +7186,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e2.outD |vpiActual: - \_logic_net: (work@top.e2.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiStmt: \_for_stmt: (work@top.e2), line:33:9, endln:33:12 |vpiParent: @@ -7242,7 +7224,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e2.j |vpiActual: - \_integer_var: (work@top.e2.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:33:60, endln:33:61 |vpiLhs: @@ -7252,7 +7234,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e2.j |vpiActual: - \_integer_var: (work@top.e2.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiCondition: \_operation: , line:33:21, endln:33:50 |vpiParent: @@ -7265,7 +7247,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e2.j |vpiActual: - \_integer_var: (work@top.e2.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_func_call: (flip), line:33:26, endln:33:50 |vpiParent: @@ -7275,16 +7257,14 @@ design: (work@top) |vpiParent: \_func_call: (flip), line:33:26, endln:33:50 |vpiArgument: - \_part_select: , line:33:36, endln:33:48 + \_part_select: OUTPUT (work@top.e2.OUTPUT), line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (work@top.e2.OUTPUT), line:33:36, endln:33:42 - |vpiParent: - \_func_call: (flip), line:33:31, endln:33:49 - |vpiName:OUTPUT - |vpiFullName:work@top.e2.OUTPUT - |vpiDefName:OUTPUT - |vpiActual: - \_parameter: (work@top.e2.OUTPUT), line:2:15, endln:2:21 + \_func_call: (flip), line:33:31, endln:33:49 + |vpiName:OUTPUT + |vpiFullName:work@top.e2.OUTPUT + |vpiDefName:OUTPUT + |vpiActual: + \_parameter: (work@top.e2.OUTPUT), line:2:15, endln:2:21 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:43, endln:33:45 @@ -7317,7 +7297,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e2.j |vpiActual: - \_integer_var: (work@top.e2.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:34:21, endln:34:22 |vpiOperand: @@ -7351,7 +7331,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e2.outD |vpiActual: - \_logic_net: (work@top.e2.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -7371,7 +7351,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e2.outC |vpiActual: - \_logic_net: (work@top.e2.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -7391,7 +7371,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e2.outC |vpiActual: - \_logic_net: (work@top.e2.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -7411,7 +7391,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e2.outC |vpiActual: - \_logic_net: (work@top.e2.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -7431,7 +7411,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e2.outC |vpiActual: - \_logic_net: (work@top.e2.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiGenScopeArray: \_gen_scope_array: (work@top.e2.genblk1), line:12:9, endln:15:29 |vpiParent: @@ -9180,8 +9160,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:32, endln:27:33 - |vpiParent: - \_assignment: , line:27:25, endln:27:33 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9283,7 +9261,7 @@ design: (work@top) |vpiName:flip |vpiFullName:work@top.e3.flip.flip |vpiActual: - \_logic_var: , line:6:24, endln:6:30 + \_logic_var: (flip), line:6:24, endln:6:30 |vpiInstance: \_module_inst: work@Example (work@top.e3), file:${SURELOG_DIR}/tests/StringRange/dut.sv, line:46:5, endln:46:41 |vpiNet: @@ -9528,7 +9506,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e3.outD |vpiActual: - \_logic_net: (work@top.e3.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiStmt: \_for_stmt: (work@top.e3), line:33:9, endln:33:12 |vpiParent: @@ -9566,7 +9544,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e3.j |vpiActual: - \_integer_var: (work@top.e3.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:33:60, endln:33:61 |vpiLhs: @@ -9576,7 +9554,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e3.j |vpiActual: - \_integer_var: (work@top.e3.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiCondition: \_operation: , line:33:21, endln:33:50 |vpiParent: @@ -9589,7 +9567,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e3.j |vpiActual: - \_integer_var: (work@top.e3.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_func_call: (flip), line:33:26, endln:33:50 |vpiParent: @@ -9599,16 +9577,14 @@ design: (work@top) |vpiParent: \_func_call: (flip), line:33:26, endln:33:50 |vpiArgument: - \_part_select: , line:33:36, endln:33:48 + \_part_select: OUTPUT (work@top.e3.OUTPUT), line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (work@top.e3.OUTPUT), line:33:36, endln:33:42 - |vpiParent: - \_func_call: (flip), line:33:31, endln:33:49 - |vpiName:OUTPUT - |vpiFullName:work@top.e3.OUTPUT - |vpiDefName:OUTPUT - |vpiActual: - \_parameter: (work@top.e3.OUTPUT), line:2:15, endln:2:21 + \_func_call: (flip), line:33:31, endln:33:49 + |vpiName:OUTPUT + |vpiFullName:work@top.e3.OUTPUT + |vpiDefName:OUTPUT + |vpiActual: + \_parameter: (work@top.e3.OUTPUT), line:2:15, endln:2:21 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:43, endln:33:45 @@ -9641,7 +9617,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e3.j |vpiActual: - \_integer_var: (work@top.e3.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:34:21, endln:34:22 |vpiOperand: @@ -9675,7 +9651,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e3.outD |vpiActual: - \_logic_net: (work@top.e3.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -9695,7 +9671,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e3.outC |vpiActual: - \_logic_net: (work@top.e3.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -9715,7 +9691,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e3.outC |vpiActual: - \_logic_net: (work@top.e3.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -9735,7 +9711,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e3.outC |vpiActual: - \_logic_net: (work@top.e3.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -9755,7 +9731,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e3.outC |vpiActual: - \_logic_net: (work@top.e3.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiGenScopeArray: \_gen_scope_array: (work@top.e3.genblk1), line:12:9, endln:15:29 |vpiParent: @@ -11276,7 +11252,7 @@ design: (work@top) |vpiName:flip |vpiFullName:work@top.e4.flip.flip |vpiActual: - \_logic_var: , line:6:24, endln:6:30 + \_logic_var: (flip), line:6:24, endln:6:30 |vpiInstance: \_module_inst: work@Example (work@top.e4), file:${SURELOG_DIR}/tests/StringRange/dut.sv, line:47:5, endln:47:41 |vpiNet: @@ -11521,7 +11497,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e4.outD |vpiActual: - \_logic_net: (work@top.e4.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiStmt: \_for_stmt: (work@top.e4), line:33:9, endln:33:12 |vpiParent: @@ -11559,7 +11535,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e4.j |vpiActual: - \_integer_var: (work@top.e4.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:33:60, endln:33:61 |vpiLhs: @@ -11569,7 +11545,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e4.j |vpiActual: - \_integer_var: (work@top.e4.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiCondition: \_operation: , line:33:21, endln:33:50 |vpiParent: @@ -11582,7 +11558,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e4.j |vpiActual: - \_integer_var: (work@top.e4.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_func_call: (flip), line:33:26, endln:33:50 |vpiParent: @@ -11592,16 +11568,14 @@ design: (work@top) |vpiParent: \_func_call: (flip), line:33:26, endln:33:50 |vpiArgument: - \_part_select: , line:33:36, endln:33:48 + \_part_select: OUTPUT (work@top.e4.OUTPUT), line:33:36, endln:33:48 |vpiParent: - \_ref_obj: OUTPUT (work@top.e4.OUTPUT), line:33:36, endln:33:42 - |vpiParent: - \_func_call: (flip), line:33:31, endln:33:49 - |vpiName:OUTPUT - |vpiFullName:work@top.e4.OUTPUT - |vpiDefName:OUTPUT - |vpiActual: - \_parameter: (work@top.e4.OUTPUT), line:2:15, endln:2:21 + \_func_call: (flip), line:33:31, endln:33:49 + |vpiName:OUTPUT + |vpiFullName:work@top.e4.OUTPUT + |vpiDefName:OUTPUT + |vpiActual: + \_parameter: (work@top.e4.OUTPUT), line:2:15, endln:2:21 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:43, endln:33:45 @@ -11634,7 +11608,7 @@ design: (work@top) |vpiName:j |vpiFullName:work@top.e4.j |vpiActual: - \_integer_var: (work@top.e4.j), line:30:13, endln:30:14 + \_integer_var: (work@top.e1.j), line:30:13, endln:30:14 |vpiOperand: \_constant: , line:34:21, endln:34:22 |vpiOperand: @@ -11668,7 +11642,7 @@ design: (work@top) |vpiName:outD |vpiFullName:work@top.e4.outD |vpiActual: - \_logic_net: (work@top.e4.outD), line:1:34, endln:1:38 + \_logic_net: (work@top.e1.outD), line:1:34, endln:1:38 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -11688,7 +11662,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e4.outC |vpiActual: - \_logic_net: (work@top.e4.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -11708,7 +11682,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e4.outC |vpiActual: - \_logic_net: (work@top.e4.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -11728,7 +11702,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e4.outC |vpiActual: - \_logic_net: (work@top.e4.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiProcess: \_initial: , line:24:9, endln:24:26 |vpiParent: @@ -11748,7 +11722,7 @@ design: (work@top) |vpiName:outC |vpiFullName:work@top.e4.outC |vpiActual: - \_logic_net: (work@top.e4.outC), line:1:28, endln:1:32 + \_logic_net: (work@top.e1.outC), line:1:28, endln:1:32 |vpiGenScopeArray: \_gen_scope_array: (work@top.e4.genblk1), line:12:9, endln:15:29 |vpiParent: @@ -13329,4 +13303,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/StringRange/dut.sv | ${SURELOG_DIR}/build/regression/StringRange/roundtrip/dut_000.sv | 33 | 86 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/StringRange/dut.sv | ${SURELOG_DIR}/build/regression/StringRange/roundtrip/dut_000.sv | 34 | 86 | \ No newline at end of file diff --git a/tests/StructAccess/StructAccess.log b/tests/StructAccess/StructAccess.log index f979d9fdce..a72bef22ee 100644 --- a/tests/StructAccess/StructAccess.log +++ b/tests/StructAccess/StructAccess.log @@ -548,7 +548,7 @@ module_inst 5 operation 1 package 2 range 2 -ref_obj 18 +ref_obj 15 struct_typespec 2 struct_var 2 task 9 @@ -581,7 +581,7 @@ module_inst 5 operation 1 package 2 range 2 -ref_obj 21 +ref_obj 18 struct_typespec 2 struct_var 2 task 18 @@ -1300,10 +1300,9 @@ design: (work@top) |vpiVisibility:1 |vpiExpr: \_bit_select: (enum_test), line:22:12, endln:22:24 - |vpiParent: - \_ref_obj: (enum_test) - |vpiName:enum_test |vpiName:enum_test + |vpiActual: + \_enum_var: (work@top.enum_test), line:18:15, endln:18:24 |vpiIndex: \_constant: , line:22:22, endln:22:23 |vpiParent: @@ -1325,13 +1324,13 @@ design: (work@top) \_hier_path: (csr_pmp_cfg_i[0].mode), line:24:23, endln:24:44 |vpiName:csr_pmp_cfg_i[0].mode |vpiActual: - \_bit_select: (csr_pmp_cfg_i), line:24:23, endln:24:36 + \_bit_select: (csr_pmp_cfg_i[0]), line:24:23, endln:24:36 |vpiParent: - \_ref_obj: (csr_pmp_cfg_i[0]) - |vpiParent: - \_hier_path: (csr_pmp_cfg_i[0].mode), line:24:23, endln:24:44 - |vpiName:csr_pmp_cfg_i[0] + \_hier_path: (csr_pmp_cfg_i[0].mode), line:24:23, endln:24:44 |vpiName:csr_pmp_cfg_i + |vpiFullName:csr_pmp_cfg_i[0] + |vpiActual: + \_array_var: (work@top.csr_pmp_cfg_i), line:16:17, endln:16:35 |vpiIndex: \_constant: , line:24:37, endln:24:38 |vpiDecompile:0 @@ -1364,9 +1363,6 @@ design: (work@top) \_struct_var: (work@top.csr_pmp_cfg_ie), line:17:17, endln:17:31 |vpiActual: \_bit_select: (mode) - |vpiParent: - \_ref_obj: (mode) - |vpiName:mode |vpiName:mode |vpiIndex: \_constant: , line:25:37, endln:25:38 diff --git a/tests/StructArrayNet/StructArrayNet.log b/tests/StructArrayNet/StructArrayNet.log index f0162b5181..7f9b5ec593 100644 --- a/tests/StructArrayNet/StructArrayNet.log +++ b/tests/StructArrayNet/StructArrayNet.log @@ -182,7 +182,7 @@ parameter 4 port 5 range 2 ref_module 1 -ref_obj 8 +ref_obj 6 struct_net 2 struct_typespec 2 typespec_member 2 @@ -207,7 +207,7 @@ parameter 4 port 7 range 2 ref_module 1 -ref_obj 12 +ref_obj 9 struct_net 2 struct_typespec 2 typespec_member 2 @@ -390,16 +390,12 @@ design: (work@dut) |vpiName:struct_i |vpiHighConn: \_bit_select: (struct_array), line:12:20, endln:12:37 - |vpiParent: - \_ref_obj: (struct_array) - |vpiName:struct_array |vpiName:struct_array |vpiIndex: - \_ref_obj: (struct_array.sel), line:12:33, endln:12:36 + \_ref_obj: (sel), line:12:33, endln:12:36 |vpiParent: \_bit_select: (struct_array), line:12:20, endln:12:37 |vpiName:sel - |vpiFullName:struct_array.sel |vpiActual: \_int_var: (work@dut.sel), line:9:22, endln:9:25 |uhdmallModules: @@ -522,25 +518,19 @@ design: (work@dut) |vpiHighConn: \_bit_select: (work@dut.struct_array), line:12:20, endln:12:37 |vpiParent: - \_ref_obj: (work@dut.m.struct_i.struct_array) - |vpiParent: - \_port: (struct_i), line:6:30, endln:6:38 - |vpiName:struct_array - |vpiFullName:work@dut.m.struct_i.struct_array - |vpiActual: - \_packed_array_net: (work@dut.struct_array), line:10:32, endln:10:44 + \_port: (struct_i), line:6:30, endln:6:38 |vpiName:struct_array |vpiFullName:work@dut.struct_array + |vpiActual: + \_packed_array_net: (work@dut.struct_array), line:10:32, endln:10:44 |vpiIndex: - \_ref_obj: (work@dut.m.struct_i.struct_array.sel), line:12:33, endln:12:36 + \_ref_obj: (work@dut.m.sel), line:12:33, endln:12:36 |vpiParent: \_bit_select: (work@dut.struct_array), line:12:20, endln:12:37 |vpiName:sel - |vpiFullName:work@dut.m.struct_i.struct_array.sel + |vpiFullName:work@dut.m.sel |vpiActual: \_int_var: (work@dut.sel), line:9:22, endln:9:25 - |vpiActual: - \_packed_array_net: (work@dut.struct_array), line:10:32, endln:10:44 |vpiLowConn: \_ref_obj: (work@dut.m.struct_i), line:12:11, endln:12:19 |vpiParent: diff --git a/tests/StructStructHierPath/StructStructHierPath.log b/tests/StructStructHierPath/StructStructHierPath.log index c35dd9f248..6501573d02 100644 --- a/tests/StructStructHierPath/StructStructHierPath.log +++ b/tests/StructStructHierPath/StructStructHierPath.log @@ -887,7 +887,7 @@ design: (work@r5p_wbu) |vpiRhs: \_hier_path: (ctl.gpr.e.rd), line:33:12, endln:33:24 |vpiParent: - \_begin: (work@r5p_wbu), line:32:12, endln:34:6 + \_assignment: , line:33:5, endln:33:24 |vpiName:ctl.gpr.e.rd |vpiActual: \_ref_obj: (ctl), line:33:12, endln:33:15 @@ -905,14 +905,15 @@ design: (work@r5p_wbu) \_hier_path: (ctl.gpr.e.rd), line:33:12, endln:33:24 |vpiName:e |vpiActual: - \_ref_obj: (rd), line:33:22, endln:33:24 + \_ref_obj: (work@r5p_wbu.rd), line:33:22, endln:33:24 |vpiParent: \_hier_path: (ctl.gpr.e.rd), line:33:12, endln:33:24 |vpiName:rd + |vpiFullName:work@r5p_wbu.rd |vpiLhs: \_ref_obj: (work@r5p_wbu.wen), line:33:5, endln:33:8 |vpiParent: - \_begin: (work@r5p_wbu), line:32:12, endln:34:6 + \_assignment: , line:33:5, endln:33:24 |vpiName:wen |vpiFullName:work@r5p_wbu.wen |vpiActual: @@ -1043,10 +1044,11 @@ design: (work@r5p_wbu) |vpiActual: \_typespec_member: (e), line:9:5, endln:9:6 |vpiActual: - \_ref_obj: (rd), line:33:22, endln:33:24 + \_ref_obj: (work@r5p_wbu.rd), line:33:22, endln:33:24 |vpiParent: \_hier_path: (ctl.gpr.e.rd), line:33:12, endln:33:24 |vpiName:rd + |vpiFullName:work@r5p_wbu.rd |vpiActual: \_typespec_member: (rd), line:8:19, endln:8:21 |vpiLhs: diff --git a/tests/StructVar/StructVar.log b/tests/StructVar/StructVar.log index 867eab634b..f2e3a6cd65 100644 --- a/tests/StructVar/StructVar.log +++ b/tests/StructVar/StructVar.log @@ -65,7 +65,7 @@ operation 29 parameter 2 range 21 ref_module 3 -ref_obj 27 +ref_obj 21 ref_var 1 struct_net 3 struct_typespec 4 @@ -103,7 +103,7 @@ operation 37 parameter 2 range 21 ref_module 3 -ref_obj 44 +ref_obj 34 ref_var 1 struct_net 3 struct_typespec 4 @@ -614,13 +614,11 @@ design: (work@test) \_operation: , line:61:24, endln:61:40 |vpiName:pmp_cfg[i].lock |vpiActual: - \_bit_select: (pmp_cfg), line:61:25, endln:61:32 + \_bit_select: (pmp_cfg[i]), line:61:25, endln:61:32 |vpiParent: - \_ref_obj: (pmp_cfg[i]) - |vpiParent: - \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 - |vpiName:pmp_cfg[i] + \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i] |vpiIndex: \_ref_obj: (i), line:61:33, endln:61:34 |vpiParent: @@ -639,16 +637,14 @@ design: (work@test) |vpiOperand: \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiParent: - \_operation: , line:61:24, endln:62:38 + \_operation: , line:62:4, endln:62:37 |vpiName:pmp_cfg[i + 1].mode |vpiActual: - \_bit_select: (pmp_cfg), line:62:4, endln:62:11 + \_bit_select: (pmp_cfg[i + 1]), line:62:4, endln:62:11 |vpiParent: - \_ref_obj: (pmp_cfg[i + 1]) - |vpiParent: - \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 - |vpiName:pmp_cfg[i + 1] + \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i + 1] |vpiIndex: \_operation: , line:62:12, endln:62:15 |vpiParent: @@ -657,7 +653,7 @@ design: (work@test) |vpiOperand: \_ref_obj: (i), line:62:12, endln:62:13 |vpiParent: - \_operation: , line:61:24, endln:62:38 + \_operation: , line:62:12, endln:62:15 |vpiName:i |vpiOperand: \_constant: , line:62:14, endln:62:15 @@ -1384,29 +1380,27 @@ design: (work@test) \_operation: , line:61:24, endln:61:40 |vpiName:pmp_cfg[i].lock |vpiActual: - \_bit_select: (pmp_cfg), line:61:25, endln:61:32 + \_bit_select: (pmp_cfg[i]), line:61:25, endln:61:32 |vpiParent: - \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i]) - |vpiParent: - \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 - |vpiName:pmp_cfg[i] - |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i] + \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i] + |vpiActual: + \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiIndex: - \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i].i), line:61:33, endln:61:34 + \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i].lock.i), line:61:33, endln:61:34 |vpiParent: - \_bit_select: (pmp_cfg), line:61:25, endln:61:32 + \_bit_select: (pmp_cfg[i]), line:61:25, endln:61:32 |vpiName:i - |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i].i + |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i].lock.i |vpiActual: \_parameter: (work@test.u3.g_pmp_csrs[0].i), line:59:0 - |vpiActual: - \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiActual: - \_ref_obj: (lock), line:61:36, endln:61:40 + \_ref_obj: (work@test.u3.g_pmp_csrs[0].lock), line:61:36, endln:61:40 |vpiParent: \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 |vpiName:lock + |vpiFullName:work@test.u3.g_pmp_csrs[0].lock |vpiActual: \_typespec_member: (lock), line:53:20, endln:53:24 |vpiOperand: @@ -1420,25 +1414,24 @@ design: (work@test) \_operation: , line:62:4, endln:62:37 |vpiName:pmp_cfg[i + 1].mode |vpiActual: - \_bit_select: (pmp_cfg), line:62:4, endln:62:11 + \_bit_select: (pmp_cfg[i + 1]), line:62:4, endln:62:11 |vpiParent: - \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1]) - |vpiParent: - \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 - |vpiName:pmp_cfg[i + 1] - |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1] + \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i + 1] + |vpiActual: + \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiIndex: \_operation: , line:62:12, endln:62:15 |vpiParent: - \_bit_select: (pmp_cfg), line:62:4, endln:62:11 + \_bit_select: (pmp_cfg[i + 1]), line:62:4, endln:62:11 |vpiOpType:24 |vpiOperand: - \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1].i), line:62:12, endln:62:13 + \_ref_obj: (work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1].mode.pmp_cfg.i), line:62:12, endln:62:13 |vpiParent: \_operation: , line:62:12, endln:62:15 |vpiName:i - |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1].i + |vpiFullName:work@test.u3.g_pmp_csrs[0].pmp_cfg[i + 1].mode.pmp_cfg.i |vpiActual: \_parameter: (work@test.u3.g_pmp_csrs[0].i), line:59:0 |vpiOperand: @@ -1449,13 +1442,12 @@ design: (work@test) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiActual: - \_ref_obj: (mode), line:62:17, endln:62:21 + \_ref_obj: (work@test.u3.g_pmp_csrs[0].mode), line:62:17, endln:62:21 |vpiParent: \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiName:mode + |vpiFullName:work@test.u3.g_pmp_csrs[0].mode |vpiActual: \_typespec_member: (mode), line:54:20, endln:54:24 |vpiOperand: @@ -1513,29 +1505,27 @@ design: (work@test) \_operation: , line:61:24, endln:61:40 |vpiName:pmp_cfg[i].lock |vpiActual: - \_bit_select: (pmp_cfg), line:61:25, endln:61:32 + \_bit_select: (pmp_cfg[i]), line:61:25, endln:61:32 |vpiParent: - \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i]) - |vpiParent: - \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 - |vpiName:pmp_cfg[i] - |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i] + \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i] + |vpiActual: + \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiIndex: - \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i].i), line:61:33, endln:61:34 + \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i].lock.i), line:61:33, endln:61:34 |vpiParent: - \_bit_select: (pmp_cfg), line:61:25, endln:61:32 + \_bit_select: (pmp_cfg[i]), line:61:25, endln:61:32 |vpiName:i - |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i].i + |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i].lock.i |vpiActual: \_parameter: (work@test.u3.g_pmp_csrs[1].i), line:59:0 - |vpiActual: - \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiActual: - \_ref_obj: (lock), line:61:36, endln:61:40 + \_ref_obj: (work@test.u3.g_pmp_csrs[1].lock), line:61:36, endln:61:40 |vpiParent: \_hier_path: (pmp_cfg[i].lock), line:61:25, endln:61:40 |vpiName:lock + |vpiFullName:work@test.u3.g_pmp_csrs[1].lock |vpiActual: \_typespec_member: (lock), line:53:20, endln:53:24 |vpiOperand: @@ -1549,25 +1539,24 @@ design: (work@test) \_operation: , line:62:4, endln:62:37 |vpiName:pmp_cfg[i + 1].mode |vpiActual: - \_bit_select: (pmp_cfg), line:62:4, endln:62:11 + \_bit_select: (pmp_cfg[i + 1]), line:62:4, endln:62:11 |vpiParent: - \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1]) - |vpiParent: - \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 - |vpiName:pmp_cfg[i + 1] - |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1] + \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiName:pmp_cfg + |vpiFullName:pmp_cfg[i + 1] + |vpiActual: + \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiIndex: \_operation: , line:62:12, endln:62:15 |vpiParent: - \_bit_select: (pmp_cfg), line:62:4, endln:62:11 + \_bit_select: (pmp_cfg[i + 1]), line:62:4, endln:62:11 |vpiOpType:24 |vpiOperand: - \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1].i), line:62:12, endln:62:13 + \_ref_obj: (work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1].mode.pmp_cfg.i), line:62:12, endln:62:13 |vpiParent: \_operation: , line:62:12, endln:62:15 |vpiName:i - |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1].i + |vpiFullName:work@test.u3.g_pmp_csrs[1].pmp_cfg[i + 1].mode.pmp_cfg.i |vpiActual: \_parameter: (work@test.u3.g_pmp_csrs[1].i), line:59:0 |vpiOperand: @@ -1578,13 +1567,12 @@ design: (work@test) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_array_var: (work@test.u3.pmp_cfg), line:57:17, endln:57:29 |vpiActual: - \_ref_obj: (mode), line:62:17, endln:62:21 + \_ref_obj: (work@test.u3.g_pmp_csrs[1].mode), line:62:17, endln:62:21 |vpiParent: \_hier_path: (pmp_cfg[i + 1].mode), line:62:4, endln:62:21 |vpiName:mode + |vpiFullName:work@test.u3.g_pmp_csrs[1].mode |vpiActual: \_typespec_member: (mode), line:54:20, endln:54:24 |vpiOperand: diff --git a/tests/SynthForeach/SynthForeach.log b/tests/SynthForeach/SynthForeach.log index 414bfd2423..0ac501332e 100644 --- a/tests/SynthForeach/SynthForeach.log +++ b/tests/SynthForeach/SynthForeach.log @@ -600,12 +600,12 @@ design: (work@dut) |vpiRhs: \_operation: , line:5:30, endln:5:35 |vpiParent: - \_foreach_stmt: (work@dut), line:4:13, endln:4:20 + \_assignment: , line:5:17, endln:5:35 |vpiOpType:25 |vpiOperand: \_ref_obj: (work@dut.i), line:5:30, endln:5:31 |vpiParent: - \_foreach_stmt: (work@dut), line:4:13, endln:4:20 + \_operation: , line:5:30, endln:5:35 |vpiName:i |vpiFullName:work@dut.i |vpiActual: @@ -625,19 +625,19 @@ design: (work@dut) |vpiName:data |vpiFullName:work@dut.data |vpiIndex: - \_ref_obj: (work@dut.i), line:5:22, endln:5:23 + \_ref_obj: (work@dut.data.i), line:5:22, endln:5:23 |vpiParent: - \_foreach_stmt: (work@dut), line:4:13, endln:4:20 + \_var_select: (work@dut.data), line:5:17, endln:5:27 |vpiName:i - |vpiFullName:work@dut.i + |vpiFullName:work@dut.data.i |vpiActual: \_logic_var: (i), line:3:22, endln:3:23 |vpiIndex: - \_ref_obj: (work@dut.j), line:5:25, endln:5:26 + \_ref_obj: (work@dut.data.j), line:5:25, endln:5:26 |vpiParent: - \_foreach_stmt: (work@dut), line:4:13, endln:4:20 + \_var_select: (work@dut.data), line:5:17, endln:5:27 |vpiName:j - |vpiFullName:work@dut.j + |vpiFullName:work@dut.data.j |vpiActual: \_logic_var: (j), line:4:29, endln:4:30 |vpiAlwaysType:1 @@ -947,7 +947,7 @@ design: (work@dut) |vpiRhs: \_ref_obj: (work@top.r), line:12:29, endln:12:30 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_assignment: , line:12:13, endln:12:30 |vpiName:r |vpiFullName:work@top.r |vpiActual: @@ -959,19 +959,19 @@ design: (work@dut) |vpiName:B |vpiFullName:work@top.B |vpiIndex: - \_ref_obj: (work@top.q), line:12:15, endln:12:16 + \_ref_obj: (work@top.B.q), line:12:15, endln:12:16 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:12:13, endln:12:26 |vpiName:q - |vpiFullName:work@top.q + |vpiFullName:work@top.B.q |vpiActual: \_bit_var: (q), line:11:19, endln:11:20 |vpiIndex: - \_ref_obj: (work@top.r), line:12:18, endln:12:19 + \_ref_obj: (work@top.B.r), line:12:18, endln:12:19 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:12:13, endln:12:26 |vpiName:r - |vpiFullName:work@top.r + |vpiFullName:work@top.B.r |vpiActual: \_bit_var: (r), line:11:22, endln:11:23 |vpiIndex: @@ -983,11 +983,11 @@ design: (work@dut) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (work@top.s), line:12:24, endln:12:25 + \_ref_obj: (work@top.B.s), line:12:24, endln:12:25 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:12:13, endln:12:26 |vpiName:s - |vpiFullName:work@top.s + |vpiFullName:work@top.B.s |vpiActual: \_bit_var: (s), line:11:27, endln:11:28 |vpiStmt: @@ -998,8 +998,6 @@ design: (work@dut) |vpiBlocking:1 |vpiRhs: \_constant: , line:13:29, endln:13:30 - |vpiParent: - \_assignment: , line:13:13, endln:13:30 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1011,19 +1009,19 @@ design: (work@dut) |vpiName:B |vpiFullName:work@top.B |vpiIndex: - \_ref_obj: (work@top.q), line:13:15, endln:13:16 + \_ref_obj: (work@top.B.q), line:13:15, endln:13:16 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:13:13, endln:13:26 |vpiName:q - |vpiFullName:work@top.q + |vpiFullName:work@top.B.q |vpiActual: \_bit_var: (q), line:11:19, endln:11:20 |vpiIndex: - \_ref_obj: (work@top.r), line:13:18, endln:13:19 + \_ref_obj: (work@top.B.r), line:13:18, endln:13:19 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:13:13, endln:13:26 |vpiName:r - |vpiFullName:work@top.r + |vpiFullName:work@top.B.r |vpiActual: \_bit_var: (r), line:11:22, endln:11:23 |vpiIndex: @@ -1035,11 +1033,11 @@ design: (work@dut) |UINT:1 |vpiConstType:9 |vpiIndex: - \_ref_obj: (work@top.s), line:13:24, endln:13:25 + \_ref_obj: (work@top.B.s), line:13:24, endln:13:25 |vpiParent: - \_begin: (work@top), line:11:31, endln:14:12 + \_var_select: (work@top.B), line:13:13, endln:13:26 |vpiName:s - |vpiFullName:work@top.s + |vpiFullName:work@top.B.s |vpiActual: \_bit_var: (s), line:11:27, endln:11:28 |vpiAlwaysType:1 @@ -1298,7 +1296,7 @@ design: (work@dut) |vpiName:i |vpiFullName:work@dut.i |vpiActual: - \_ref_var: (work@dut.i), line:4:26, endln:4:27 + \_logic_var: (i), line:3:22, endln:3:23 |vpiOperand: \_ref_obj: (work@dut.j), line:5:34, endln:5:35 |vpiParent: @@ -1313,6 +1311,8 @@ design: (work@dut) \_assignment: , line:5:17, endln:5:35 |vpiName:data |vpiFullName:work@dut.data + |vpiActual: + \_array_net: (work@dut.data), line:1:43, endln:1:47 |vpiIndex: \_ref_obj: (work@dut.data.i), line:5:22, endln:5:23 |vpiParent: @@ -1320,7 +1320,7 @@ design: (work@dut) |vpiName:i |vpiFullName:work@dut.data.i |vpiActual: - \_ref_var: (work@dut.i), line:4:26, endln:4:27 + \_logic_var: (i), line:3:22, endln:3:23 |vpiIndex: \_ref_obj: (work@dut.data.j), line:5:25, endln:5:26 |vpiParent: @@ -1618,6 +1618,8 @@ design: (work@dut) \_assignment: , line:12:13, endln:12:30 |vpiName:B |vpiFullName:work@top.B + |vpiActual: + \_array_var: (work@top.B), line:9:45, endln:9:52 |vpiIndex: \_ref_obj: (work@top.B.q), line:12:15, endln:12:16 |vpiParent: @@ -1658,6 +1660,8 @@ design: (work@dut) \_assignment: , line:13:13, endln:13:30 |vpiName:B |vpiFullName:work@top.B + |vpiActual: + \_array_var: (work@top.B), line:9:45, endln:9:52 |vpiIndex: \_ref_obj: (work@top.B.q), line:13:15, endln:13:16 |vpiParent: diff --git a/tests/TaggedPattern/TaggedPattern.log b/tests/TaggedPattern/TaggedPattern.log index 6f99f5ebb6..aa50a96c01 100644 --- a/tests/TaggedPattern/TaggedPattern.log +++ b/tests/TaggedPattern/TaggedPattern.log @@ -953,8 +953,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_tagged_pattern: (v2), line:9:8, endln:9:14 - |vpiParent: - \_assignment: , line:9:3, endln:9:22 |vpiName:v2 |vpiPattern: \_constant: , line:9:19, endln:9:21 @@ -965,7 +963,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.un), line:9:3, endln:9:5 |vpiParent: - \_begin: (work@top), line:8:10, endln:12:5 + \_assignment: , line:9:3, endln:9:22 |vpiName:un |vpiFullName:work@top.un |vpiActual: @@ -978,8 +976,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_tagged_pattern: (v1), line:10:8, endln:10:14 - |vpiParent: - \_assignment: , line:10:3, endln:10:22 |vpiName:v1 |vpiPattern: \_constant: , line:10:19, endln:10:21 @@ -990,7 +986,7 @@ design: (work@top) |vpiLhs: \_ref_obj: (work@top.un), line:10:3, endln:10:5 |vpiParent: - \_begin: (work@top), line:8:10, endln:12:5 + \_assignment: , line:10:3, endln:10:22 |vpiName:un |vpiFullName:work@top.un |vpiActual: diff --git a/tests/TaskBind/TaskBind.log b/tests/TaskBind/TaskBind.log index dc88a5fd96..d0f6f35089 100644 --- a/tests/TaskBind/TaskBind.log +++ b/tests/TaskBind/TaskBind.log @@ -205,12 +205,12 @@ design: (work@tb) |vpiRhs: \_operation: , line:6:6, endln:6:11 |vpiParent: - \_begin: (work@tb.display) + \_assignment: , line:6:2, endln:6:11 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@tb.display.i), line:6:6, endln:6:7 |vpiParent: - \_begin: (work@tb.display) + \_operation: , line:6:6, endln:6:11 |vpiName:i |vpiFullName:work@tb.display.i |vpiActual: @@ -226,7 +226,7 @@ design: (work@tb) |vpiLhs: \_ref_obj: (work@tb.display.i), line:6:2, endln:6:3 |vpiParent: - \_begin: (work@tb.display) + \_assignment: , line:6:2, endln:6:11 |vpiName:i |vpiFullName:work@tb.display.i |vpiActual: diff --git a/tests/TaskDecls/TaskDecls.log b/tests/TaskDecls/TaskDecls.log index ea76bd4029..130a460f44 100644 --- a/tests/TaskDecls/TaskDecls.log +++ b/tests/TaskDecls/TaskDecls.log @@ -1321,7 +1321,7 @@ design: (work@gen_errors) |vpiOperand: \_ref_obj: (work@gen_errors.A.width_a), line:21:13, endln:21:20 |vpiParent: - \_task: (work@gen_errors.A), line:20:4, endln:35:11 + \_operation: , line:21:13, endln:21:22 |vpiName:width_a |vpiFullName:work@gen_errors.A.width_a |vpiActual: @@ -1407,7 +1407,7 @@ design: (work@gen_errors) |vpiRhs: \_ref_obj: (work@gen_errors.A.B), line:32:12, endln:32:13 |vpiParent: - \_begin: (work@gen_errors.A), line:31:6, endln:33:9 + \_assignment: , line:32:8, endln:32:13 |vpiName:B |vpiFullName:work@gen_errors.A.B |vpiActual: @@ -1415,7 +1415,7 @@ design: (work@gen_errors) |vpiLhs: \_ref_obj: (work@gen_errors.A.C), line:32:8, endln:32:9 |vpiParent: - \_begin: (work@gen_errors.A), line:31:6, endln:33:9 + \_assignment: , line:32:8, endln:32:13 |vpiName:C |vpiFullName:work@gen_errors.A.C |vpiActual: diff --git a/tests/Ternary/Ternary.log b/tests/Ternary/Ternary.log index f9b6f0a80f..bad8577dc2 100644 --- a/tests/Ternary/Ternary.log +++ b/tests/Ternary/Ternary.log @@ -1190,7 +1190,7 @@ parameter 26 part_select 2 port 2 range 40 -ref_obj 40 +ref_obj 37 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -1228,7 +1228,7 @@ parameter 26 part_select 4 port 3 range 40 -ref_obj 79 +ref_obj 73 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/Ternary/slpp_unit/surelog.uhdm ... @@ -2234,7 +2234,7 @@ design: (work@test) |vpiOperand: \_ref_obj: (work@test.RAMRST), line:38:13, endln:38:19 |vpiParent: - \_begin: (work@test), line:37:46, endln:83:8 + \_operation: , line:38:13, endln:38:22 |vpiName:RAMRST |vpiFullName:work@test.RAMRST |vpiActual: @@ -2260,13 +2260,13 @@ design: (work@test) |vpiRhs: \_ref_obj: (work@test.USER_DELAY_INIT), line:39:26, endln:39:41 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:39:13, endln:39:41 |vpiName:USER_DELAY_INIT |vpiFullName:work@test.USER_DELAY_INIT |vpiLhs: \_ref_obj: (work@test.UserState), line:39:13, endln:39:22 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:39:13, endln:39:41 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -2278,8 +2278,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:40:22, endln:40:23 - |vpiParent: - \_assignment: , line:40:13, endln:40:23 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2287,7 +2285,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.Delay), line:40:13, endln:40:18 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:40:13, endln:40:23 |vpiName:Delay |vpiFullName:work@test.Delay |vpiActual: @@ -2299,8 +2297,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:41:31, endln:41:32 - |vpiParent: - \_assignment: , line:41:13, endln:41:32 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2308,7 +2304,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.UserValidCount), line:41:13, endln:41:27 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:41:13, endln:41:32 |vpiName:UserValidCount |vpiFullName:work@test.UserValidCount |vpiActual: @@ -2320,8 +2316,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:42:32, endln:42:33 - |vpiParent: - \_assignment: , line:42:13, endln:42:33 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2329,7 +2323,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.ConnectionState), line:42:13, endln:42:28 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:42:13, endln:42:33 |vpiName:ConnectionState |vpiFullName:work@test.ConnectionState |vpiActual: @@ -2341,8 +2335,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:43:32, endln:43:33 - |vpiParent: - \_assignment: , line:43:13, endln:43:33 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2350,7 +2342,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.InterruptStatus), line:43:13, endln:43:28 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:43:13, endln:43:33 |vpiName:InterruptStatus |vpiFullName:work@test.InterruptStatus |vpiActual: @@ -2362,8 +2354,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:44:28, endln:44:29 - |vpiParent: - \_assignment: , line:44:13, endln:44:29 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2371,7 +2361,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.FrameLength), line:44:13, endln:44:24 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:44:13, endln:44:29 |vpiName:FrameLength |vpiFullName:work@test.FrameLength |vpiActual: @@ -2383,8 +2373,6 @@ design: (work@test) |vpiOpType:82 |vpiRhs: \_constant: , line:45:29, endln:45:30 - |vpiParent: - \_assignment: , line:45:13, endln:45:30 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2392,7 +2380,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.LatencyDelay), line:45:13, endln:45:25 |vpiParent: - \_begin: (work@test), line:38:24, endln:46:12 + \_assignment: , line:45:13, endln:45:30 |vpiName:LatencyDelay |vpiFullName:work@test.LatencyDelay |vpiActual: @@ -2438,12 +2426,12 @@ design: (work@test) |vpiRhs: \_operation: , line:51:30, endln:51:39 |vpiParent: - \_begin: (work@test), line:50:34, endln:55:20 + \_assignment: , line:51:21, endln:51:39 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@test.Delay), line:51:30, endln:51:35 |vpiParent: - \_begin: (work@test), line:50:34, endln:55:20 + \_operation: , line:51:30, endln:51:39 |vpiName:Delay |vpiFullName:work@test.Delay |vpiActual: @@ -2459,7 +2447,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.Delay), line:51:21, endln:51:26 |vpiParent: - \_begin: (work@test), line:50:34, endln:55:20 + \_assignment: , line:51:21, endln:51:39 |vpiName:Delay |vpiFullName:work@test.Delay |vpiActual: @@ -2476,7 +2464,7 @@ design: (work@test) |vpiOperand: \_ref_obj: (work@test.Delay), line:52:25, endln:52:30 |vpiParent: - \_begin: (work@test), line:50:34, endln:55:20 + \_operation: , line:52:25, endln:52:42 |vpiName:Delay |vpiFullName:work@test.Delay |vpiActual: @@ -2502,13 +2490,13 @@ design: (work@test) |vpiRhs: \_ref_obj: (work@test.USER_CHECK_STATE), line:53:38, endln:53:54 |vpiParent: - \_begin: (work@test), line:52:44, endln:54:24 + \_assignment: , line:53:25, endln:53:54 |vpiName:USER_CHECK_STATE |vpiFullName:work@test.USER_CHECK_STATE |vpiLhs: \_ref_obj: (work@test.UserState), line:53:25, endln:53:34 |vpiParent: - \_begin: (work@test), line:52:44, endln:54:24 + \_assignment: , line:53:25, endln:53:54 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -2540,12 +2528,12 @@ design: (work@test) |vpiOperand: \_operation: , line:59:25, endln:59:45 |vpiParent: - \_begin: (work@test), line:57:35, endln:70:20 + \_operation: , line:59:25, endln:59:66 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@test.UserReadDataValid), line:59:25, endln:59:42 |vpiParent: - \_begin: (work@test), line:57:35, endln:70:20 + \_operation: , line:59:25, endln:59:45 |vpiName:UserReadDataValid |vpiFullName:work@test.UserReadDataValid |vpiActual: @@ -2566,7 +2554,7 @@ design: (work@test) |vpiOperand: \_ref_obj: (work@test.UserValidCount), line:59:49, endln:59:63 |vpiParent: - \_operation: , line:59:25, endln:59:66 + \_operation: , line:59:49, endln:59:66 |vpiName:UserValidCount |vpiFullName:work@test.UserValidCount |vpiActual: @@ -2590,14 +2578,12 @@ design: (work@test) \_begin: (work@test), line:59:68, endln:69:24 |vpiOpType:82 |vpiRhs: - \_part_select: , line:61:44, endln:61:61 + \_part_select: UserReadData (work@test.UserReadData), line:61:44, endln:61:61 |vpiParent: - \_ref_obj: UserReadData (work@test.UserReadData), line:61:44, endln:61:56 - |vpiParent: - \_assignment: , line:61:25, endln:61:61 - |vpiName:UserReadData - |vpiFullName:work@test.UserReadData - |vpiDefName:UserReadData + \_assignment: , line:61:25, endln:61:61 + |vpiName:UserReadData + |vpiFullName:work@test.UserReadData + |vpiDefName:UserReadData |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:61:57, endln:61:58 @@ -2614,7 +2600,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.ConnectionState), line:61:25, endln:61:40 |vpiParent: - \_begin: (work@test), line:59:68, endln:69:24 + \_assignment: , line:61:25, endln:61:61 |vpiName:ConnectionState |vpiFullName:work@test.ConnectionState |vpiActual: @@ -2631,12 +2617,12 @@ design: (work@test) |vpiOperand: \_operation: , line:63:29, endln:63:44 |vpiParent: - \_begin: (work@test), line:59:68, endln:69:24 + \_operation: , line:63:29, endln:63:69 |vpiOpType:15 |vpiOperand: \_ref_obj: (work@test.LatencyDelay), line:63:29, endln:63:41 |vpiParent: - \_begin: (work@test), line:59:68, endln:69:24 + \_operation: , line:63:29, endln:63:44 |vpiName:LatencyDelay |vpiFullName:work@test.LatencyDelay |vpiActual: @@ -2657,11 +2643,7 @@ design: (work@test) |vpiOperand: \_bit_select: (work@test.InterruptStatus), line:63:48, endln:63:66 |vpiParent: - \_ref_obj: (work@test.InterruptStatus) - |vpiParent: - \_operation: , line:63:48, endln:63:69 - |vpiName:InterruptStatus - |vpiFullName:work@test.InterruptStatus + \_operation: , line:63:48, endln:63:69 |vpiName:InterruptStatus |vpiFullName:work@test.InterruptStatus |vpiIndex: @@ -2693,13 +2675,13 @@ design: (work@test) |vpiRhs: \_ref_obj: (work@test.USER_CHECK_SPACE), line:64:42, endln:64:58 |vpiParent: - \_begin: (work@test), line:63:71, endln:65:28 + \_assignment: , line:64:29, endln:64:58 |vpiName:USER_CHECK_SPACE |vpiFullName:work@test.USER_CHECK_SPACE |vpiLhs: \_ref_obj: (work@test.UserState), line:64:29, endln:64:38 |vpiParent: - \_begin: (work@test), line:63:71, endln:65:28 + \_assignment: , line:64:29, endln:64:58 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -2717,17 +2699,17 @@ design: (work@test) |vpiRhs: \_operation: , line:66:42, endln:67:77 |vpiParent: - \_begin: (work@test), line:65:34, endln:68:28 + \_assignment: , line:66:29, endln:67:77 |vpiOpType:32 |vpiOperand: \_operation: , line:66:42, endln:66:56 |vpiParent: - \_begin: (work@test), line:65:34, endln:68:28 + \_operation: , line:66:42, endln:67:77 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@test.FrameLength), line:66:42, endln:66:53 |vpiParent: - \_begin: (work@test), line:65:34, endln:68:28 + \_operation: , line:66:42, endln:66:56 |vpiName:FrameLength |vpiFullName:work@test.FrameLength |vpiActual: @@ -2755,7 +2737,7 @@ design: (work@test) |vpiLhs: \_ref_obj: (work@test.UserState), line:66:29, endln:66:38 |vpiParent: - \_begin: (work@test), line:65:34, endln:68:28 + \_assignment: , line:66:29, endln:67:77 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -2785,14 +2767,12 @@ design: (work@test) \_begin: (work@test), line:72:35, endln:79:20 |vpiOpType:15 |vpiOperand: - \_part_select: , line:73:25, endln:73:45 + \_part_select: ConnectionState (work@test.ConnectionState), line:73:25, endln:73:45 |vpiParent: - \_ref_obj: ConnectionState (work@test.ConnectionState), line:73:25, endln:73:40 - |vpiParent: - \_operation: , line:73:25, endln:73:58 - |vpiName:ConnectionState - |vpiFullName:work@test.ConnectionState - |vpiDefName:ConnectionState + \_operation: , line:73:25, endln:73:58 + |vpiName:ConnectionState + |vpiFullName:work@test.ConnectionState + |vpiDefName:ConnectionState |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:73:41, endln:73:42 @@ -2825,13 +2805,13 @@ design: (work@test) |vpiRhs: \_ref_obj: (work@test.USER_IDLE), line:74:38, endln:74:47 |vpiParent: - \_begin: (work@test), line:73:60, endln:75:24 + \_assignment: , line:74:25, endln:74:47 |vpiName:USER_IDLE |vpiFullName:work@test.USER_IDLE |vpiLhs: \_ref_obj: (work@test.UserState), line:74:25, endln:74:34 |vpiParent: - \_begin: (work@test), line:73:60, endln:75:24 + \_assignment: , line:74:25, endln:74:47 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -2849,13 +2829,13 @@ design: (work@test) |vpiRhs: \_ref_obj: (work@test.USER_WRITE_DATA), line:77:38, endln:77:53 |vpiParent: - \_begin: (work@test), line:75:30, endln:78:24 + \_assignment: , line:77:25, endln:77:53 |vpiName:USER_WRITE_DATA |vpiFullName:work@test.USER_WRITE_DATA |vpiLhs: \_ref_obj: (work@test.UserState), line:77:25, endln:77:34 |vpiParent: - \_begin: (work@test), line:75:30, endln:78:24 + \_assignment: , line:77:25, endln:77:53 |vpiName:UserState |vpiFullName:work@test.UserState |vpiActual: @@ -3987,16 +3967,14 @@ design: (work@test) \_begin: (work@test), line:59:68, endln:69:24 |vpiOpType:82 |vpiRhs: - \_part_select: , line:61:44, endln:61:61 + \_part_select: UserReadData (work@test.UserReadData), line:61:44, endln:61:61 |vpiParent: - \_ref_obj: UserReadData (work@test.UserReadData), line:61:44, endln:61:56 - |vpiParent: - \_assignment: , line:61:25, endln:61:61 - |vpiName:UserReadData - |vpiFullName:work@test.UserReadData - |vpiDefName:UserReadData - |vpiActual: - \_logic_net: (work@test.UserReadData), line:13:17, endln:13:29 + \_assignment: , line:61:25, endln:61:61 + |vpiName:UserReadData + |vpiFullName:work@test.UserReadData + |vpiDefName:UserReadData + |vpiActual: + \_logic_net: (work@test.UserReadData), line:13:17, endln:13:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:61:57, endln:61:58 @@ -4042,19 +4020,13 @@ design: (work@test) |vpiOperand: \_bit_select: (work@test.InterruptStatus), line:63:48, endln:63:66 |vpiParent: - \_ref_obj: (work@test.InterruptStatus) - |vpiParent: - \_operation: , line:63:48, endln:63:69 - |vpiName:InterruptStatus - |vpiFullName:work@test.InterruptStatus - |vpiActual: - \_logic_net: (work@test.InterruptStatus), line:20:16, endln:20:31 + \_operation: , line:63:48, endln:63:69 |vpiName:InterruptStatus |vpiFullName:work@test.InterruptStatus - |vpiIndex: - \_constant: , line:63:64, endln:63:65 |vpiActual: \_logic_net: (work@test.InterruptStatus), line:20:16, endln:20:31 + |vpiIndex: + \_constant: , line:63:64, endln:63:65 |vpiOperand: \_constant: , line:63:68, endln:63:69 |vpiStmt: @@ -4164,16 +4136,14 @@ design: (work@test) \_if_else: , line:73:21, endln:78:24 |vpiOpType:15 |vpiOperand: - \_part_select: , line:73:25, endln:73:45 + \_part_select: ConnectionState (work@test.ConnectionState), line:73:25, endln:73:45 |vpiParent: - \_ref_obj: ConnectionState (work@test.ConnectionState), line:73:25, endln:73:40 - |vpiParent: - \_operation: , line:73:25, endln:73:58 - |vpiName:ConnectionState - |vpiFullName:work@test.ConnectionState - |vpiDefName:ConnectionState - |vpiActual: - \_logic_net: (work@test.ConnectionState), line:19:15, endln:19:30 + \_operation: , line:73:25, endln:73:58 + |vpiName:ConnectionState + |vpiFullName:work@test.ConnectionState + |vpiDefName:ConnectionState + |vpiActual: + \_logic_net: (work@test.ConnectionState), line:19:15, endln:19:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:73:41, endln:73:42 @@ -4248,4 +4218,4 @@ design: (work@test) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/Ternary/top.sv | ${SURELOG_DIR}/build/regression/Ternary/roundtrip/top_000.sv | 17 | 85 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/Ternary/top.sv | ${SURELOG_DIR}/build/regression/Ternary/roundtrip/top_000.sv | 19 | 85 | \ No newline at end of file diff --git a/tests/TernaryAssoc/TernaryAssoc.log b/tests/TernaryAssoc/TernaryAssoc.log index c10b7bd258..7f341fcdd7 100644 --- a/tests/TernaryAssoc/TernaryAssoc.log +++ b/tests/TernaryAssoc/TernaryAssoc.log @@ -141,7 +141,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.first_condition_false), line:5:17, endln:5:38 |vpiParent: - \_operation: , line:4:17, endln:6:63 + \_operation: , line:5:17, endln:6:63 |vpiName:first_condition_false |vpiFullName:work@top.first_condition_false |vpiActual: diff --git a/tests/TestSepCompNoHash/TestSepCompNoHash.log b/tests/TestSepCompNoHash/TestSepCompNoHash.log index a5790f032e..2c3f8d74a7 100644 --- a/tests/TestSepCompNoHash/TestSepCompNoHash.log +++ b/tests/TestSepCompNoHash/TestSepCompNoHash.log @@ -27,18 +27,18 @@ [ NOTE] : 0 [INF:CM0023] Creating log file ${SURELOG_DIR}/tests/TestSepCompNoHash/slpp_all/surelog.log. +PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv -PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv +PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv -PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv +[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv:1:1: No timescale set for "top". + [WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv:1:1: No timescale set for "pkg1". [WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv:1:1: No timescale set for "pkg2". -[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv:1:1: No timescale set for "top". - [INF:CP0300] Compilation... [INF:CP0301] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv:1:1: Compile package "pkg1". diff --git a/tests/TimeUnit/TimeUnit.log b/tests/TimeUnit/TimeUnit.log index a9061fffc7..e2b6a2cff1 100644 --- a/tests/TimeUnit/TimeUnit.log +++ b/tests/TimeUnit/TimeUnit.log @@ -127,7 +127,7 @@ port 23 prim_term 3 range 3 ref_module 5 -ref_obj 32 +ref_obj 31 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/TimeUnit/slpp_unit/surelog.uhdm ... diff --git a/tests/TypeParam2/TypeParam2.log b/tests/TypeParam2/TypeParam2.log index ec5ac2ac58..8ef44742c5 100644 --- a/tests/TypeParam2/TypeParam2.log +++ b/tests/TypeParam2/TypeParam2.log @@ -91,7 +91,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@rr_arb_tree.DataType.DataWidth), line:2:46, endln:2:55 |vpiParent: - \_type_parameter: (work@rr_arb_tree.DataType), line:2:26, endln:2:34 + \_operation: , line:2:46, endln:2:57 |vpiName:DataWidth |vpiFullName:work@rr_arb_tree.DataType.DataWidth |vpiActual: diff --git a/tests/TypeParamElab/TypeParamElab.log b/tests/TypeParamElab/TypeParamElab.log index e38011720f..7a9964f615 100644 --- a/tests/TypeParamElab/TypeParamElab.log +++ b/tests/TypeParamElab/TypeParamElab.log @@ -475,7 +475,7 @@ design: (work@axi_node_arbiter) |vpiOperand: \_ref_obj: (work@axi_node_arbiter.axi_meta_t.AUX_WIDTH), line:28:12, endln:28:21 |vpiParent: - \_struct_typespec: (axi_meta_t), line:27:11, endln:27:17 + \_operation: , line:28:12, endln:28:23 |vpiName:AUX_WIDTH |vpiFullName:work@axi_node_arbiter.axi_meta_t.AUX_WIDTH |vpiActual: @@ -522,7 +522,7 @@ design: (work@axi_node_arbiter) |vpiOperand: \_ref_obj: (work@axi_node_arbiter.axi_meta_t.ID_WIDTH), line:29:12, endln:29:20 |vpiParent: - \_struct_typespec: (axi_meta_t), line:27:11, endln:27:17 + \_operation: , line:29:12, endln:29:22 |vpiName:ID_WIDTH |vpiFullName:work@axi_node_arbiter.axi_meta_t.ID_WIDTH |vpiActual: diff --git a/tests/TypeParamOverride/TypeParamOverride.log b/tests/TypeParamOverride/TypeParamOverride.log index e7a2917003..caecebc81a 100644 --- a/tests/TypeParamOverride/TypeParamOverride.log +++ b/tests/TypeParamOverride/TypeParamOverride.log @@ -348,8 +348,6 @@ design: (work@ariane_testharness) |vpiBlocking:1 |vpiRhs: \_constant: , line:17:25, endln:17:29 - |vpiParent: - \_assignment: , line:17:5, endln:17:29 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -357,7 +355,7 @@ design: (work@ariane_testharness) |vpiLhs: \_hier_path: (err_resp.w_ready), line:17:5, endln:17:21 |vpiParent: - \_named_begin: (work@axi_err_slv.proc_w_channel), line:16:15, endln:19:6 + \_assignment: , line:17:5, endln:17:29 |vpiName:err_resp.w_ready |vpiActual: \_ref_obj: (err_resp) diff --git a/tests/TypedefUnpacked/TypedefUnpacked.log b/tests/TypedefUnpacked/TypedefUnpacked.log index 7cb490f0e6..51b90b3f37 100644 --- a/tests/TypedefUnpacked/TypedefUnpacked.log +++ b/tests/TypedefUnpacked/TypedefUnpacked.log @@ -51,7 +51,7 @@ module_inst 4 package 3 port 2 range 2 -ref_obj 9 +ref_obj 6 struct_typespec 3 typespec_member 3 === UHDM Object Stats End === @@ -226,14 +226,11 @@ design: (work@dut) \_cont_assign: , line:10:11, endln:10:21 |vpiName:c[1].x |vpiActual: - \_bit_select: (c), line:10:11, endln:10:12 + \_bit_select: (c[1]), line:10:11, endln:10:12 |vpiParent: - \_ref_obj: (work@dut.c[1]) - |vpiParent: - \_hier_path: (c[1].x), line:10:11, endln:10:12 - |vpiName:c[1] - |vpiFullName:work@dut.c[1] + \_hier_path: (c[1].x), line:10:11, endln:10:12 |vpiName:c + |vpiFullName:c[1] |vpiIndex: \_constant: , line:10:13, endln:10:14 |vpiDecompile:1 @@ -241,10 +238,11 @@ design: (work@dut) |UINT:1 |vpiConstType:9 |vpiActual: - \_ref_obj: (x) + \_ref_obj: (c[1].x) |vpiParent: \_hier_path: (c[1].x), line:10:11, endln:10:12 |vpiName:x + |vpiFullName:c[1].x |vpiContAssign: \_cont_assign: , line:11:11, endln:11:21 |vpiParent: @@ -255,14 +253,11 @@ design: (work@dut) \_cont_assign: , line:11:11, endln:11:21 |vpiName:c[1].x |vpiActual: - \_bit_select: (c), line:11:15, endln:11:16 + \_bit_select: (c[1]), line:11:15, endln:11:16 |vpiParent: - \_ref_obj: (work@dut.c[1]) - |vpiParent: - \_hier_path: (c[1].x), line:11:15, endln:11:21 - |vpiName:c[1] - |vpiFullName:work@dut.c[1] + \_hier_path: (c[1].x), line:11:15, endln:11:21 |vpiName:c + |vpiFullName:c[1] |vpiIndex: \_constant: , line:11:17, endln:11:18 |vpiDecompile:1 @@ -270,10 +265,11 @@ design: (work@dut) |UINT:1 |vpiConstType:9 |vpiActual: - \_ref_obj: (x), line:11:20, endln:11:21 + \_ref_obj: (work@dut.x), line:11:20, endln:11:21 |vpiParent: \_hier_path: (c[1].x), line:11:15, endln:11:21 |vpiName:x + |vpiFullName:work@dut.x |vpiLhs: \_ref_obj: (work@dut.o), line:11:11, endln:11:12 |vpiParent: @@ -329,26 +325,25 @@ design: (work@dut) \_cont_assign: , line:10:11, endln:10:21 |vpiName:c[1].x |vpiActual: - \_bit_select: (c), line:10:11, endln:10:12 + \_bit_select: (c[1]), line:10:11, endln:10:12 |vpiParent: - \_ref_obj: (c[1]) - |vpiParent: - \_hier_path: (c[1].x), line:10:11, endln:10:12 - |vpiName:c[1] + \_hier_path: (c[1].x), line:10:11, endln:10:12 |vpiName:c + |vpiFullName:c[1] |vpiIndex: \_constant: , line:10:13, endln:10:14 |vpiParent: - \_bit_select: (c), line:10:11, endln:10:12 + \_bit_select: (c[1]), line:10:11, endln:10:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 |vpiConstType:9 |vpiActual: - \_ref_obj: (x) + \_ref_obj: (c[1].x) |vpiParent: \_hier_path: (c[1].x), line:10:11, endln:10:12 |vpiName:x + |vpiFullName:c[1].x |vpiContAssign: \_cont_assign: , line:11:11, endln:11:21 =================== diff --git a/tests/Udp/Udp.log b/tests/Udp/Udp.log index 4e38c95120..dc677f2075 100644 --- a/tests/Udp/Udp.log +++ b/tests/Udp/Udp.log @@ -1858,8 +1858,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:93:7, endln:93:8 - |vpiParent: - \_assignment: , line:93:3, endln:93:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1867,7 +1865,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:93:3, endln:93:4 |vpiParent: - \_begin: (work@udp_body_tb), line:91:9, endln:104:4 + \_assignment: , line:93:3, endln:93:8 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: @@ -1880,8 +1878,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:94:7, endln:94:8 - |vpiParent: - \_assignment: , line:94:3, endln:94:8 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1889,7 +1885,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.c), line:94:3, endln:94:4 |vpiParent: - \_begin: (work@udp_body_tb), line:91:9, endln:104:4 + \_assignment: , line:94:3, endln:94:8 |vpiName:c |vpiFullName:work@udp_body_tb.c |vpiActual: @@ -1907,8 +1903,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:95:10, endln:95:11 - |vpiParent: - \_assignment: , line:95:6, endln:95:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1916,7 +1910,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:95:6, endln:95:7 |vpiParent: - \_delay_control: , line:95:3, endln:95:5 + \_assignment: , line:95:6, endln:95:11 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: @@ -1934,8 +1928,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:96:10, endln:96:11 - |vpiParent: - \_assignment: , line:96:6, endln:96:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -1943,7 +1935,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:96:6, endln:96:7 |vpiParent: - \_delay_control: , line:96:3, endln:96:5 + \_assignment: , line:96:6, endln:96:11 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: @@ -1961,8 +1953,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:97:10, endln:97:11 - |vpiParent: - \_assignment: , line:97:6, endln:97:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -1970,7 +1960,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.c), line:97:6, endln:97:7 |vpiParent: - \_delay_control: , line:97:3, endln:97:5 + \_assignment: , line:97:6, endln:97:11 |vpiName:c |vpiFullName:work@udp_body_tb.c |vpiActual: @@ -1988,8 +1978,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:98:10, endln:98:14 - |vpiParent: - \_assignment: , line:98:6, endln:98:14 |vpiDecompile:1'bX |vpiSize:1 |BIN:X @@ -1997,7 +1985,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:98:6, endln:98:7 |vpiParent: - \_delay_control: , line:98:3, endln:98:5 + \_assignment: , line:98:6, endln:98:14 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: @@ -2015,8 +2003,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:99:10, endln:99:11 - |vpiParent: - \_assignment: , line:99:6, endln:99:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2024,7 +2010,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.c), line:99:6, endln:99:7 |vpiParent: - \_delay_control: , line:99:3, endln:99:5 + \_assignment: , line:99:6, endln:99:11 |vpiName:c |vpiFullName:work@udp_body_tb.c |vpiActual: @@ -2042,8 +2028,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:100:10, endln:100:11 - |vpiParent: - \_assignment: , line:100:6, endln:100:11 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -2051,7 +2035,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:100:6, endln:100:7 |vpiParent: - \_delay_control: , line:100:3, endln:100:5 + \_assignment: , line:100:6, endln:100:11 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: @@ -2069,8 +2053,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:101:10, endln:101:14 - |vpiParent: - \_assignment: , line:101:6, endln:101:14 |vpiDecompile:1'bX |vpiSize:1 |BIN:X @@ -2078,7 +2060,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.c), line:101:6, endln:101:7 |vpiParent: - \_delay_control: , line:101:3, endln:101:5 + \_assignment: , line:101:6, endln:101:14 |vpiName:c |vpiFullName:work@udp_body_tb.c |vpiActual: @@ -2096,8 +2078,6 @@ design: (work@udp_body_tb) |vpiBlocking:1 |vpiRhs: \_constant: , line:102:10, endln:102:11 - |vpiParent: - \_assignment: , line:102:6, endln:102:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2105,7 +2085,7 @@ design: (work@udp_body_tb) |vpiLhs: \_ref_obj: (work@udp_body_tb.b), line:102:6, endln:102:7 |vpiParent: - \_delay_control: , line:102:3, endln:102:5 + \_assignment: , line:102:6, endln:102:11 |vpiName:b |vpiFullName:work@udp_body_tb.b |vpiActual: diff --git a/tests/UhdmCoverage/UhdmCoverage.log b/tests/UhdmCoverage/UhdmCoverage.log index 3475d3c3fd..947a495fa2 100644 --- a/tests/UhdmCoverage/UhdmCoverage.log +++ b/tests/UhdmCoverage/UhdmCoverage.log @@ -984,7 +984,7 @@ part_select 2 port 13 range 13 ref_module 5 -ref_obj 79 +ref_obj 65 string_typespec 3 tagged_pattern 3 === UHDM Object Stats End === @@ -1017,7 +1017,7 @@ part_select 3 port 18 range 13 ref_module 5 -ref_obj 99 +ref_obj 80 string_typespec 3 tagged_pattern 3 === UHDM Object Stats End === @@ -1578,7 +1578,7 @@ design: (work@divSqrtRecFNToRaw_small) |vpiOperand: \_ref_obj: (i), line:127:34, endln:127:35 |vpiParent: - \_operation: , line:127:17, endln:127:45 + \_operation: , line:127:34, endln:127:44 |vpiName:i |vpiActual: \_logic_net: (i) @@ -1616,13 +1616,11 @@ design: (work@divSqrtRecFNToRaw_small) \_hier_path: (decode_tv_r.amo_op), line:129:37, endln:129:55 |vpiName:amo_op |vpiOperand: - \_indexed_part_select: , line:130:34, endln:130:51 + \_indexed_part_select: atomic_result (atomic_result), line:130:34, endln:130:51 |vpiParent: - \_ref_obj: atomic_result (atomic_result) - |vpiParent: - \_operation: , line:129:37, endln:131:51 - |vpiName:atomic_result - |vpiDefName:atomic_result + \_operation: , line:129:37, endln:131:51 + |vpiName:atomic_result + |vpiDefName:atomic_result |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -1634,16 +1632,14 @@ design: (work@divSqrtRecFNToRaw_small) |vpiWidthExpr: \_ref_obj: (slice_width_lp), line:130:37, endln:130:51 |vpiParent: - \_operation: , line:129:37, endln:131:51 + \_indexed_part_select: atomic_result (atomic_result), line:130:34, endln:130:51 |vpiName:slice_width_lp |vpiOperand: - \_indexed_part_select: , line:131:33, endln:131:50 + \_indexed_part_select: st_data_tv_r (st_data_tv_r), line:131:33, endln:131:50 |vpiParent: - \_ref_obj: st_data_tv_r (st_data_tv_r) - |vpiParent: - \_operation: , line:129:37, endln:131:51 - |vpiName:st_data_tv_r - |vpiDefName:st_data_tv_r + \_operation: , line:129:37, endln:131:51 + |vpiName:st_data_tv_r + |vpiDefName:st_data_tv_r |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -1655,7 +1651,7 @@ design: (work@divSqrtRecFNToRaw_small) |vpiWidthExpr: \_ref_obj: (slice_width_lp), line:131:36, endln:131:50 |vpiParent: - \_operation: , line:129:37, endln:131:51 + \_indexed_part_select: st_data_tv_r (st_data_tv_r), line:131:33, endln:131:50 |vpiName:slice_width_lp |vpiLhs: \_ref_obj: (slice_data), line:129:24, endln:129:34 @@ -1668,13 +1664,11 @@ design: (work@divSqrtRecFNToRaw_small) |vpiStmt: \_cont_assign: , line:135:24, endln:135:68 |vpiRhs: - \_indexed_part_select: , line:135:50, endln:135:67 + \_indexed_part_select: st_data_tv_r (st_data_tv_r), line:135:50, endln:135:67 |vpiParent: - \_ref_obj: st_data_tv_r (st_data_tv_r) - |vpiParent: - \_cont_assign: , line:135:24, endln:135:68 - |vpiName:st_data_tv_r - |vpiDefName:st_data_tv_r + \_cont_assign: , line:135:24, endln:135:68 + |vpiName:st_data_tv_r + |vpiDefName:st_data_tv_r |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -1685,6 +1679,8 @@ design: (work@divSqrtRecFNToRaw_small) |vpiConstType:9 |vpiWidthExpr: \_ref_obj: (slice_width_lp), line:135:53, endln:135:67 + |vpiParent: + \_indexed_part_select: st_data_tv_r (st_data_tv_r), line:135:50, endln:135:67 |vpiName:slice_width_lp |vpiLhs: \_ref_obj: (slice_data), line:135:24, endln:135:34 @@ -1748,17 +1744,13 @@ design: (work@divSqrtRecFNToRaw_small) |vpiLhs: \_bit_select: (lce_req_link_lo), line:149:26, endln:149:44 |vpiParent: - \_ref_obj: (lce_req_link_lo) - |vpiParent: - \_cont_assign: , line:149:26, endln:149:50 - |vpiName:lce_req_link_lo + \_cont_assign: , line:149:26, endln:149:50 |vpiName:lce_req_link_lo |vpiIndex: - \_ref_obj: (lce_req_link_lo.i), line:149:42, endln:149:43 + \_ref_obj: (i), line:149:42, endln:149:43 |vpiParent: \_bit_select: (lce_req_link_lo), line:149:26, endln:149:44 |vpiName:i - |vpiFullName:lce_req_link_lo.i |vpiStmt: \_cont_assign: , line:150:27, endln:150:51 |vpiRhs: @@ -1772,17 +1764,13 @@ design: (work@divSqrtRecFNToRaw_small) |vpiLhs: \_bit_select: (lce_cmd_link_lo), line:150:27, endln:150:45 |vpiParent: - \_ref_obj: (lce_cmd_link_lo) - |vpiParent: - \_cont_assign: , line:150:27, endln:150:51 - |vpiName:lce_cmd_link_lo + \_cont_assign: , line:150:27, endln:150:51 |vpiName:lce_cmd_link_lo |vpiIndex: - \_ref_obj: (lce_cmd_link_lo.i), line:150:43, endln:150:44 + \_ref_obj: (i), line:150:43, endln:150:44 |vpiParent: \_bit_select: (lce_cmd_link_lo), line:150:27, endln:150:45 |vpiName:i - |vpiFullName:lce_cmd_link_lo.i |uhdmallModules: \_module_inst: work@e (work@e), file:${SURELOG_DIR}/tests/UhdmCoverage/dut.sv, line:99:1, endln:115:10 |vpiParent: @@ -1811,10 +1799,11 @@ design: (work@divSqrtRecFNToRaw_small) \_hier_path: (resp_concentrated_link_lo.data), line:102:51, endln:102:81 |vpiName:resp_concentrated_link_lo |vpiActual: - \_ref_obj: (data), line:102:77, endln:102:81 + \_ref_obj: (work@e.data), line:102:77, endln:102:81 |vpiParent: \_hier_path: (resp_concentrated_link_lo.data), line:102:51, endln:102:81 |vpiName:data + |vpiFullName:work@e.data |vpiTypespec: \_string_typespec: (data), line:102:35, endln:102:39 |vpiName:data @@ -1831,10 +1820,11 @@ design: (work@divSqrtRecFNToRaw_small) \_hier_path: (resp_concentrated_link_lo.v), line:103:57, endln:103:84 |vpiName:resp_concentrated_link_lo |vpiActual: - \_ref_obj: (v), line:103:83, endln:103:84 + \_ref_obj: (work@e.v), line:103:83, endln:103:84 |vpiParent: \_hier_path: (resp_concentrated_link_lo.v), line:103:57, endln:103:84 |vpiName:v + |vpiFullName:work@e.v |vpiTypespec: \_string_typespec: (v), line:103:42, endln:103:43 |vpiName:v @@ -1851,10 +1841,11 @@ design: (work@divSqrtRecFNToRaw_small) \_hier_path: (cce_lce_resp_link_lo.ready_and_rev), line:104:53, endln:104:87 |vpiName:cce_lce_resp_link_lo |vpiActual: - \_ref_obj: (ready_and_rev), line:104:74, endln:104:87 + \_ref_obj: (work@e.ready_and_rev), line:104:74, endln:104:87 |vpiParent: \_hier_path: (cce_lce_resp_link_lo.ready_and_rev), line:104:53, endln:104:87 |vpiName:ready_and_rev + |vpiFullName:work@e.ready_and_rev |vpiTypespec: \_string_typespec: (ready_and_rev), line:104:38, endln:104:51 |vpiName:ready_and_rev @@ -2041,24 +2032,20 @@ design: (work@divSqrtRecFNToRaw_small) |vpiOperand: \_bit_select: (work@isSigNaNRecFN.in), line:67:36, endln:67:52 |vpiParent: - \_ref_obj: (work@isSigNaNRecFN.in) - |vpiParent: - \_operation: , line:67:35, endln:67:52 - |vpiName:in - |vpiFullName:work@isSigNaNRecFN.in + \_operation: , line:67:35, endln:67:52 |vpiName:in |vpiFullName:work@isSigNaNRecFN.in |vpiIndex: \_operation: , line:67:39, endln:67:51 |vpiParent: - \_operation: , line:67:35, endln:67:52 + \_bit_select: (work@isSigNaNRecFN.in), line:67:36, endln:67:52 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@isSigNaNRecFN.sigWidth), line:67:39, endln:67:47 + \_ref_obj: (work@isSigNaNRecFN.in.sigWidth), line:67:39, endln:67:47 |vpiParent: - \_operation: , line:67:35, endln:67:52 + \_operation: , line:67:39, endln:67:51 |vpiName:sigWidth - |vpiFullName:work@isSigNaNRecFN.sigWidth + |vpiFullName:work@isSigNaNRecFN.in.sigWidth |vpiOperand: \_constant: , line:67:50, endln:67:51 |vpiParent: @@ -2681,21 +2668,19 @@ design: (work@divSqrtRecFNToRaw_small) \_cont_assign: , line:65:13, endln:65:18 |vpiOpType:14 |vpiOperand: - \_part_select: , line:66:13, endln:66:68 + \_part_select: in (work@isSigNaNRecFN.in), line:66:13, endln:66:68 |vpiParent: - \_ref_obj: in (work@isSigNaNRecFN.in), line:66:13, endln:66:15 - |vpiParent: - \_operation: , line:66:13, endln:66:77 - |vpiName:in - |vpiFullName:work@isSigNaNRecFN.in - |vpiDefName:in - |vpiActual: - \_logic_net: (work@isSigNaNRecFN.in), line:62:44, endln:62:46 + \_operation: , line:66:13, endln:66:77 + |vpiName:in + |vpiFullName:work@isSigNaNRecFN.in + |vpiDefName:in + |vpiActual: + \_logic_net: (work@isSigNaNRecFN.in), line:62:44, endln:62:46 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:66:17, endln:66:40 |vpiParent: - \_part_select: , line:66:13, endln:66:68 + \_part_select: in (work@isSigNaNRecFN.in), line:66:13, endln:66:68 |vpiOpType:11 |vpiOperand: \_constant: , line:66:17, endln:66:40 @@ -2714,7 +2699,7 @@ design: (work@divSqrtRecFNToRaw_small) |vpiRightRange: \_operation: , line:66:43, endln:66:66 |vpiParent: - \_part_select: , line:66:13, endln:66:68 + \_part_select: in (work@isSigNaNRecFN.in), line:66:13, endln:66:68 |vpiOpType:11 |vpiOperand: \_constant: , line:66:43, endln:66:66 @@ -2763,15 +2748,11 @@ design: (work@divSqrtRecFNToRaw_small) |vpiOperand: \_bit_select: (work@isSigNaNRecFN.in), line:67:36, endln:67:52 |vpiParent: - \_ref_obj: (work@isSigNaNRecFN.in) - |vpiParent: - \_operation: , line:67:35, endln:67:52 - |vpiName:in - |vpiFullName:work@isSigNaNRecFN.in - |vpiActual: - \_logic_net: (work@isSigNaNRecFN.in), line:62:44, endln:62:46 + \_operation: , line:67:35, endln:67:52 |vpiName:in |vpiFullName:work@isSigNaNRecFN.in + |vpiActual: + \_logic_net: (work@isSigNaNRecFN.in), line:62:44, endln:62:46 |vpiIndex: \_operation: , line:67:39, endln:67:51 |vpiParent: @@ -2793,8 +2774,6 @@ design: (work@divSqrtRecFNToRaw_small) |vpiSize:64 |UINT:2 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@isSigNaNRecFN.in), line:62:44, endln:62:46 |vpiLhs: \_ref_obj: (work@isSigNaNRecFN.isSigNaN), line:67:15, endln:67:23 |vpiParent: @@ -3032,14 +3011,12 @@ design: (work@divSqrtRecFNToRaw_small) |vpiParent: \_gen_scope: (work@divSqrtRecFN_small.non_atomic) |vpiRhs: - \_indexed_part_select: , line:135:50, endln:135:67 + \_indexed_part_select: st_data_tv_r (work@divSqrtRecFN_small.non_atomic.st_data_tv_r), line:135:50, endln:135:67 |vpiParent: - \_ref_obj: st_data_tv_r (work@divSqrtRecFN_small.non_atomic.st_data_tv_r) - |vpiParent: - \_cont_assign: , line:135:24, endln:135:68 - |vpiName:st_data_tv_r - |vpiFullName:work@divSqrtRecFN_small.non_atomic.st_data_tv_r - |vpiDefName:st_data_tv_r + \_cont_assign: , line:135:24, endln:135:68 + |vpiName:st_data_tv_r + |vpiFullName:work@divSqrtRecFN_small.non_atomic.st_data_tv_r + |vpiDefName:st_data_tv_r |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: @@ -3049,11 +3026,11 @@ design: (work@divSqrtRecFNToRaw_small) |UINT:0 |vpiConstType:9 |vpiWidthExpr: - \_ref_obj: (work@divSqrtRecFN_small.non_atomic.st_data_tv_r.slice_width_lp), line:135:53, endln:135:67 + \_ref_obj: (work@divSqrtRecFN_small.non_atomic.slice_width_lp), line:135:53, endln:135:67 |vpiParent: - \_indexed_part_select: , line:135:50, endln:135:67 + \_indexed_part_select: st_data_tv_r (work@divSqrtRecFN_small.non_atomic.st_data_tv_r), line:135:50, endln:135:67 |vpiName:slice_width_lp - |vpiFullName:work@divSqrtRecFN_small.non_atomic.st_data_tv_r.slice_width_lp + |vpiFullName:work@divSqrtRecFN_small.non_atomic.slice_width_lp |vpiLhs: \_ref_obj: (work@divSqrtRecFN_small.non_atomic.slice_data), line:135:24, endln:135:34 |vpiParent: @@ -3086,19 +3063,15 @@ design: (work@divSqrtRecFNToRaw_small) |vpiLhs: \_bit_select: (work@divSqrtRecFN_small.stub.lce_req_link_lo), line:149:26, endln:149:44 |vpiParent: - \_ref_obj: (work@divSqrtRecFN_small.stub.lce_req_link_lo) - |vpiParent: - \_cont_assign: , line:149:26, endln:149:50 - |vpiName:lce_req_link_lo - |vpiFullName:work@divSqrtRecFN_small.stub.lce_req_link_lo + \_cont_assign: , line:149:26, endln:149:50 |vpiName:lce_req_link_lo |vpiFullName:work@divSqrtRecFN_small.stub.lce_req_link_lo |vpiIndex: - \_ref_obj: (work@divSqrtRecFN_small.stub.lce_req_link_lo.i), line:149:42, endln:149:43 + \_ref_obj: (work@divSqrtRecFN_small.stub.i), line:149:42, endln:149:43 |vpiParent: \_bit_select: (work@divSqrtRecFN_small.stub.lce_req_link_lo), line:149:26, endln:149:44 |vpiName:i - |vpiFullName:work@divSqrtRecFN_small.stub.lce_req_link_lo.i + |vpiFullName:work@divSqrtRecFN_small.stub.i |vpiActual: \_logic_net: (i) |vpiContAssign: @@ -3116,19 +3089,15 @@ design: (work@divSqrtRecFNToRaw_small) |vpiLhs: \_bit_select: (work@divSqrtRecFN_small.stub.lce_cmd_link_lo), line:150:27, endln:150:45 |vpiParent: - \_ref_obj: (work@divSqrtRecFN_small.stub.lce_cmd_link_lo) - |vpiParent: - \_cont_assign: , line:150:27, endln:150:51 - |vpiName:lce_cmd_link_lo - |vpiFullName:work@divSqrtRecFN_small.stub.lce_cmd_link_lo + \_cont_assign: , line:150:27, endln:150:51 |vpiName:lce_cmd_link_lo |vpiFullName:work@divSqrtRecFN_small.stub.lce_cmd_link_lo |vpiIndex: - \_ref_obj: (work@divSqrtRecFN_small.stub.lce_cmd_link_lo.i), line:150:43, endln:150:44 + \_ref_obj: (work@divSqrtRecFN_small.stub.i), line:150:43, endln:150:44 |vpiParent: \_bit_select: (work@divSqrtRecFN_small.stub.lce_cmd_link_lo), line:150:27, endln:150:45 |vpiName:i - |vpiFullName:work@divSqrtRecFN_small.stub.lce_cmd_link_lo.i + |vpiFullName:work@divSqrtRecFN_small.stub.i |vpiActual: \_logic_net: (i) =================== diff --git a/tests/UnionCast/UnionCast.log b/tests/UnionCast/UnionCast.log index ad3ef86506..2886a58ea6 100644 --- a/tests/UnionCast/UnionCast.log +++ b/tests/UnionCast/UnionCast.log @@ -3956,8 +3956,6 @@ design: (work@r5p_lsu) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:36, endln:31:37 - |vpiParent: - \_assignment: , line:31:28, endln:31:37 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -3969,7 +3967,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiCaseItem: \_case_item: , line:32:3, endln:32:38 |vpiParent: @@ -3982,8 +3980,6 @@ design: (work@r5p_lsu) |vpiBlocking:1 |vpiRhs: \_constant: , line:32:36, endln:32:37 - |vpiParent: - \_assignment: , line:32:28, endln:32:37 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -3995,7 +3991,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiInstance: \_package: riscv_isa_pkg (riscv_isa_pkg::), file:${SURELOG_DIR}/tests/UnionCast/dut.sv, line:19:1, endln:125:26 |uhdmtopPackages: @@ -6146,8 +6142,6 @@ design: (work@r5p_lsu) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:36, endln:31:37 - |vpiParent: - \_assignment: , line:31:28, endln:31:37 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -6159,7 +6153,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiCaseItem: \_case_item: , line:32:3, endln:32:38 |vpiParent: @@ -6172,8 +6166,6 @@ design: (work@r5p_lsu) |vpiBlocking:1 |vpiRhs: \_constant: , line:32:36, endln:32:37 - |vpiParent: - \_assignment: , line:32:28, endln:32:37 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -6185,7 +6177,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiInstance: \_package: riscv_isa_pkg (riscv_isa_pkg::), file:${SURELOG_DIR}/tests/UnionCast/dut.sv, line:19:1, endln:125:26 |uhdmallModules: @@ -6273,7 +6265,7 @@ design: (work@r5p_lsu) |vpiLhs: \_ref_obj: (riscv_isa_pkg::opsiz::opsiz), line:31:28, endln:31:33 |vpiParent: - \_case_item: , line:31:3, endln:31:38 + \_assignment: , line:31:28, endln:31:37 |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: @@ -6293,7 +6285,7 @@ design: (work@r5p_lsu) |vpiLhs: \_ref_obj: (riscv_isa_pkg::opsiz::opsiz), line:32:28, endln:32:33 |vpiParent: - \_case_item: , line:32:3, endln:32:38 + \_assignment: , line:32:28, endln:32:37 |vpiName:opsiz |vpiFullName:riscv_isa_pkg::opsiz::opsiz |vpiActual: @@ -6603,10 +6595,11 @@ design: (work@r5p_lsu) \_hier_path: (dec.r.rd), line:161:14, endln:161:22 |vpiName:r |vpiActual: - \_ref_obj: (rd), line:161:20, endln:161:22 + \_ref_obj: (work@r5p_lsu.rd), line:161:20, endln:161:22 |vpiParent: \_hier_path: (dec.r.rd), line:161:14, endln:161:22 |vpiName:rd + |vpiFullName:work@r5p_lsu.rd |vpiLhs: \_ref_obj: (work@r5p_lsu.rd), line:161:8, endln:161:10 |vpiParent: @@ -6635,10 +6628,11 @@ design: (work@r5p_lsu) \_hier_path: (dec.r.rs1), line:162:14, endln:162:23 |vpiName:r |vpiActual: - \_ref_obj: (rs1), line:162:20, endln:162:23 + \_ref_obj: (work@r5p_lsu.rs1), line:162:20, endln:162:23 |vpiParent: \_hier_path: (dec.r.rs1), line:162:14, endln:162:23 |vpiName:rs1 + |vpiFullName:work@r5p_lsu.rs1 |vpiLhs: \_ref_obj: (work@r5p_lsu.rs1), line:162:8, endln:162:11 |vpiParent: @@ -6667,10 +6661,11 @@ design: (work@r5p_lsu) \_hier_path: (dec.r.rs2), line:163:14, endln:163:23 |vpiName:r |vpiActual: - \_ref_obj: (rs2), line:163:20, endln:163:23 + \_ref_obj: (work@r5p_lsu.rs2), line:163:20, endln:163:23 |vpiParent: \_hier_path: (dec.r.rs2), line:163:14, endln:163:23 |vpiName:rs2 + |vpiFullName:work@r5p_lsu.rs2 |vpiLhs: \_ref_obj: (work@r5p_lsu.rs2), line:163:8, endln:163:11 |vpiParent: @@ -6699,10 +6694,11 @@ design: (work@r5p_lsu) \_hier_path: (dec.i.imm_11_0), line:164:14, endln:164:28 |vpiName:i |vpiActual: - \_ref_obj: (imm_11_0), line:164:20, endln:164:28 + \_ref_obj: (work@r5p_lsu.imm_11_0), line:164:20, endln:164:28 |vpiParent: \_hier_path: (dec.i.imm_11_0), line:164:14, endln:164:28 |vpiName:imm_11_0 + |vpiFullName:work@r5p_lsu.imm_11_0 |vpiLhs: \_ref_obj: (work@r5p_lsu.imm), line:164:8, endln:164:11 |vpiParent: @@ -6810,7 +6806,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:work@r5p_lsu.opsiz.opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiCaseItem: \_case_item: , line:32:3, endln:32:38 |vpiParent: @@ -6830,7 +6826,7 @@ design: (work@r5p_lsu) |vpiName:opsiz |vpiFullName:work@r5p_lsu.opsiz.opsiz |vpiActual: - \_int_var: , line:25:20, endln:25:32 + \_int_var: (opsiz), line:25:20, endln:25:32 |vpiInstance: \_module_inst: work@r5p_lsu (work@r5p_lsu), file:${SURELOG_DIR}/tests/UnionCast/dut.sv, line:145:1, endln:166:19 |vpiNet: @@ -11177,10 +11173,11 @@ design: (work@r5p_lsu) |vpiActual: \_typespec_member: (r), line:117:13, endln:117:14 |vpiActual: - \_ref_obj: (rd), line:161:20, endln:161:22 + \_ref_obj: (work@r5p_lsu.rd), line:161:20, endln:161:22 |vpiParent: \_hier_path: (dec.r.rd), line:161:14, endln:161:22 |vpiName:rd + |vpiFullName:work@r5p_lsu.rd |vpiActual: \_typespec_member: (rd), line:107:128, endln:107:130 |vpiLhs: @@ -11215,10 +11212,11 @@ design: (work@r5p_lsu) |vpiActual: \_typespec_member: (r), line:117:13, endln:117:14 |vpiActual: - \_ref_obj: (rs1), line:162:20, endln:162:23 + \_ref_obj: (work@r5p_lsu.rs1), line:162:20, endln:162:23 |vpiParent: \_hier_path: (dec.r.rs1), line:162:14, endln:162:23 |vpiName:rs1 + |vpiFullName:work@r5p_lsu.rs1 |vpiActual: \_typespec_member: (rs1), line:107:98, endln:107:101 |vpiLhs: @@ -11253,10 +11251,11 @@ design: (work@r5p_lsu) |vpiActual: \_typespec_member: (r), line:117:13, endln:117:14 |vpiActual: - \_ref_obj: (rs2), line:163:20, endln:163:23 + \_ref_obj: (work@r5p_lsu.rs2), line:163:20, endln:163:23 |vpiParent: \_hier_path: (dec.r.rs2), line:163:14, endln:163:23 |vpiName:rs2 + |vpiFullName:work@r5p_lsu.rs2 |vpiActual: \_typespec_member: (rs2), line:107:81, endln:107:84 |vpiLhs: @@ -11291,10 +11290,11 @@ design: (work@r5p_lsu) |vpiActual: \_typespec_member: (i), line:118:13, endln:118:14 |vpiActual: - \_ref_obj: (imm_11_0), line:164:20, endln:164:28 + \_ref_obj: (work@r5p_lsu.imm_11_0), line:164:20, endln:164:28 |vpiParent: \_hier_path: (dec.i.imm_11_0), line:164:14, endln:164:28 |vpiName:imm_11_0 + |vpiFullName:work@r5p_lsu.imm_11_0 |vpiActual: \_typespec_member: (imm_11_0), line:108:38, endln:108:46 |vpiLhs: diff --git a/tests/UnitElab/UnitElab.log b/tests/UnitElab/UnitElab.log index 4ed5fba508..a60345266f 100644 --- a/tests/UnitElab/UnitElab.log +++ b/tests/UnitElab/UnitElab.log @@ -15314,13 +15314,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][0].a), line:20:19, endln:20:20 |vpiName:a @@ -15338,13 +15338,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][0].b), line:20:22, endln:20:23 |vpiName:b @@ -15362,13 +15362,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][0].c), line:20:25, endln:20:26 |vpiName:c @@ -15445,13 +15445,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][1].a), line:20:19, endln:20:20 |vpiName:a @@ -15469,13 +15469,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][1].b), line:20:22, endln:20:23 |vpiName:b @@ -15493,13 +15493,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][0][1].c), line:20:25, endln:20:26 |vpiName:c @@ -15580,13 +15580,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][0].a), line:20:19, endln:20:20 |vpiName:a @@ -15604,13 +15604,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][0].b), line:20:22, endln:20:23 |vpiName:b @@ -15628,13 +15628,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][0].c), line:20:25, endln:20:26 |vpiName:c @@ -15715,13 +15715,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][1].a), line:20:19, endln:20:20 |vpiName:a @@ -15739,13 +15739,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][1].b), line:20:22, endln:20:23 |vpiName:b @@ -15763,13 +15763,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][1][1].c), line:20:25, endln:20:26 |vpiName:c @@ -15850,13 +15850,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][0].a), line:20:19, endln:20:20 |vpiName:a @@ -15874,13 +15874,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][0].b), line:20:22, endln:20:23 |vpiName:b @@ -15898,13 +15898,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][0].c), line:20:25, endln:20:26 |vpiName:c @@ -15985,13 +15985,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][1].a), line:20:19, endln:20:20 |vpiName:a @@ -16009,13 +16009,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][1].b), line:20:22, endln:20:23 |vpiName:b @@ -16033,13 +16033,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[0][2][1].c), line:20:25, endln:20:26 |vpiName:c @@ -16120,13 +16120,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][0].a), line:20:19, endln:20:20 |vpiName:a @@ -16144,13 +16144,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][0].b), line:20:22, endln:20:23 |vpiName:b @@ -16168,13 +16168,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][0].c), line:20:25, endln:20:26 |vpiName:c @@ -16255,13 +16255,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][1].a), line:20:19, endln:20:20 |vpiName:a @@ -16279,13 +16279,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][1].b), line:20:22, endln:20:23 |vpiName:b @@ -16303,13 +16303,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][0][1].c), line:20:25, endln:20:26 |vpiName:c @@ -16390,13 +16390,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][0].a), line:20:19, endln:20:20 |vpiName:a @@ -16414,13 +16414,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][0].b), line:20:22, endln:20:23 |vpiName:b @@ -16438,13 +16438,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][0].c), line:20:25, endln:20:26 |vpiName:c @@ -16525,13 +16525,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][1].a), line:20:19, endln:20:20 |vpiName:a @@ -16549,13 +16549,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][1].b), line:20:22, endln:20:23 |vpiName:b @@ -16573,13 +16573,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][1][1].c), line:20:25, endln:20:26 |vpiName:c @@ -16660,13 +16660,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][0].a), line:20:19, endln:20:20 |vpiName:a @@ -16684,13 +16684,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][0].b), line:20:22, endln:20:23 |vpiName:b @@ -16708,13 +16708,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][0].c), line:20:25, endln:20:26 |vpiName:c @@ -16795,13 +16795,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][1].a), line:20:19, endln:20:20 |vpiName:a @@ -16819,13 +16819,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][1].b), line:20:22, endln:20:23 |vpiName:b @@ -16843,13 +16843,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[1][2][1].c), line:20:25, endln:20:26 |vpiName:c @@ -16930,13 +16930,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][0].a), line:20:19, endln:20:20 |vpiName:a @@ -16954,13 +16954,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][0].b), line:20:22, endln:20:23 |vpiName:b @@ -16978,13 +16978,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][0].c), line:20:25, endln:20:26 |vpiName:c @@ -17065,13 +17065,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][1].a), line:20:19, endln:20:20 |vpiName:a @@ -17089,13 +17089,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][1].b), line:20:22, endln:20:23 |vpiName:b @@ -17113,13 +17113,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][0][1].c), line:20:25, endln:20:26 |vpiName:c @@ -17200,13 +17200,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][0].a), line:20:19, endln:20:20 |vpiName:a @@ -17224,13 +17224,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][0].b), line:20:22, endln:20:23 |vpiName:b @@ -17248,13 +17248,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][0].c), line:20:25, endln:20:26 |vpiName:c @@ -17335,13 +17335,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][1].a), line:20:19, endln:20:20 |vpiName:a @@ -17359,13 +17359,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][1].b), line:20:22, endln:20:23 |vpiName:b @@ -17383,13 +17383,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][1][1].c), line:20:25, endln:20:26 |vpiName:c @@ -17470,13 +17470,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][0].a), line:20:19, endln:20:20 |vpiName:a @@ -17494,13 +17494,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][0].b), line:20:22, endln:20:23 |vpiName:b @@ -17518,13 +17518,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][0].c), line:20:25, endln:20:26 |vpiName:c @@ -17605,13 +17605,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][1].a), line:20:19, endln:20:20 |vpiName:a @@ -17629,13 +17629,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][1].b), line:20:22, endln:20:23 |vpiName:b @@ -17653,13 +17653,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[2][2][1].c), line:20:25, endln:20:26 |vpiName:c @@ -17740,13 +17740,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][0].a), line:20:19, endln:20:20 |vpiName:a @@ -17764,13 +17764,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][0].b), line:20:22, endln:20:23 |vpiName:b @@ -17788,13 +17788,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][0].c), line:20:25, endln:20:26 |vpiName:c @@ -17875,13 +17875,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][1].a), line:20:19, endln:20:20 |vpiName:a @@ -17899,13 +17899,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][1].b), line:20:22, endln:20:23 |vpiName:b @@ -17923,13 +17923,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][0][1].c), line:20:25, endln:20:26 |vpiName:c @@ -18010,13 +18010,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][0].a), line:20:19, endln:20:20 |vpiName:a @@ -18034,13 +18034,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][0].b), line:20:22, endln:20:23 |vpiName:b @@ -18058,13 +18058,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][0].c), line:20:25, endln:20:26 |vpiName:c @@ -18145,13 +18145,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][1].a), line:20:19, endln:20:20 |vpiName:a @@ -18169,13 +18169,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][1].b), line:20:22, endln:20:23 |vpiName:b @@ -18193,13 +18193,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][1][1].c), line:20:25, endln:20:26 |vpiName:c @@ -18280,13 +18280,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][0].a), line:20:19, endln:20:20 |vpiName:a @@ -18304,13 +18304,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][0].b), line:20:22, endln:20:23 |vpiName:b @@ -18328,13 +18328,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][0].c), line:20:25, endln:20:26 |vpiName:c @@ -18415,13 +18415,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (a), line:29:35, endln:29:36 |vpiName:a + |vpiActual: + \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiIndex: \_constant: , line:29:35, endln:29:36 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.a), line:26:13, endln:26:14 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][1].a), line:20:19, endln:20:20 |vpiName:a @@ -18439,13 +18439,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (b), line:29:38, endln:29:39 |vpiName:b + |vpiActual: + \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiIndex: \_constant: , line:29:38, endln:29:39 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.b), line:26:16, endln:26:17 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][1].b), line:20:22, endln:20:23 |vpiName:b @@ -18463,13 +18463,13 @@ design: (work@bottom1) |vpiHighConn: \_bit_select: (c), line:29:41, endln:29:42 |vpiName:c + |vpiActual: + \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiIndex: \_constant: , line:29:41, endln:29:42 |vpiDecompile:1 |vpiSize:64 |UINT:1 - |vpiActual: - \_logic_net: (work@top.c), line:26:19, endln:26:20 |vpiLowConn: \_ref_obj: (work@top.inst[3][2][1].c), line:20:25, endln:20:26 |vpiName:c diff --git a/tests/UnitElabExternNested/UnitElabExternNested.log b/tests/UnitElabExternNested/UnitElabExternNested.log index 28531d23e9..d1e9c0c9a0 100644 --- a/tests/UnitElabExternNested/UnitElabExternNested.log +++ b/tests/UnitElabExternNested/UnitElabExternNested.log @@ -96,7 +96,7 @@ port 50 prim_term 48 range 8 ref_module 5 -ref_obj 82 +ref_obj 79 task 9 unsupported_typespec 2 void_typespec 2 diff --git a/tests/UnitForeach/UnitForeach.log b/tests/UnitForeach/UnitForeach.log index e5c1de7d29..68df279f90 100644 --- a/tests/UnitForeach/UnitForeach.log +++ b/tests/UnitForeach/UnitForeach.log @@ -767,7 +767,7 @@ module_inst 2 operation 1 package 5 range 5 -ref_obj 39 +ref_obj 35 ref_var 12 string_typespec 1 string_var 1 @@ -940,14 +940,11 @@ design: (unnamed) \_sys_func_call: ($sformatf), line:10:10, endln:10:97 |vpiName:arb_sequence_q[i].request.name |vpiActual: - \_bit_select: (arb_sequence_q), line:10:34, endln:10:48 + \_bit_select: (arb_sequence_q[i]), line:10:34, endln:10:48 |vpiParent: - \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i]) - |vpiParent: - \_hier_path: (arb_sequence_q[i].request.name), line:10:34, endln:10:66 - |vpiName:arb_sequence_q[i] - |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i] + \_hier_path: (arb_sequence_q[i].request.name), line:10:34, endln:10:66 |vpiName:arb_sequence_q + |vpiFullName:arb_sequence_q[i] |vpiIndex: \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::i), line:10:49, endln:10:50 |vpiParent: @@ -968,14 +965,11 @@ design: (unnamed) \_sys_func_call: ($sformatf), line:10:10, endln:10:97 |vpiName:arb_sequence_q[i].sequence_id |vpiActual: - \_bit_select: (arb_sequence_q), line:10:67, endln:10:81 + \_bit_select: (arb_sequence_q[i]), line:10:67, endln:10:81 |vpiParent: - \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i]) - |vpiParent: - \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 - |vpiName:arb_sequence_q[i] - |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i] + \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:arb_sequence_q + |vpiFullName:arb_sequence_q[i] |vpiIndex: \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::i), line:10:82, endln:10:83 |vpiParent: @@ -983,10 +977,11 @@ design: (unnamed) |vpiName:i |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::i |vpiActual: - \_ref_obj: (sequence_id), line:10:85, endln:10:96 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::sequence_id), line:10:85, endln:10:96 |vpiParent: \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:sequence_id + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::sequence_id |vpiName:$sformatf |vpiArgument: \_constant: , line:10:99, endln:10:102 @@ -1187,14 +1182,11 @@ design: (unnamed) \_sys_func_call: ($sformatf), line:10:10, endln:10:97 |vpiName:arb_sequence_q[i].request.name |vpiActual: - \_bit_select: (arb_sequence_q), line:10:34, endln:10:48 + \_bit_select: (arb_sequence_q[i]), line:10:34, endln:10:48 |vpiParent: - \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i]) - |vpiParent: - \_hier_path: (arb_sequence_q[i].request.name), line:10:34, endln:10:66 - |vpiName:arb_sequence_q[i] - |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i] + \_hier_path: (arb_sequence_q[i].request.name), line:10:34, endln:10:66 |vpiName:arb_sequence_q + |vpiFullName:arb_sequence_q[i] |vpiIndex: \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::i), line:10:49, endln:10:50 |vpiParent: @@ -1217,14 +1209,11 @@ design: (unnamed) \_sys_func_call: ($sformatf), line:10:10, endln:10:97 |vpiName:arb_sequence_q[i].sequence_id |vpiActual: - \_bit_select: (arb_sequence_q), line:10:67, endln:10:81 + \_bit_select: (arb_sequence_q[i]), line:10:67, endln:10:81 |vpiParent: - \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i]) - |vpiParent: - \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 - |vpiName:arb_sequence_q[i] - |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::arb_sequence_q[i] + \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:arb_sequence_q + |vpiFullName:arb_sequence_q[i] |vpiIndex: \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::i), line:10:82, endln:10:83 |vpiParent: @@ -1234,10 +1223,11 @@ design: (unnamed) |vpiActual: \_int_var: (i), line:8:29, endln:8:30 |vpiActual: - \_ref_obj: (sequence_id), line:10:85, endln:10:96 + \_ref_obj: (uvm_pkg::uvm_sequencer_base::do_print::sequence_id), line:10:85, endln:10:96 |vpiParent: \_hier_path: (arb_sequence_q[i].sequence_id), line:10:67, endln:10:96 |vpiName:sequence_id + |vpiFullName:uvm_pkg::uvm_sequencer_base::do_print::sequence_id |vpiName:$sformatf |vpiArgument: \_constant: , line:10:99, endln:10:102 @@ -1764,6 +1754,8 @@ design: (unnamed) \_method_func_call: (push_back), line:52:17, endln:52:26 |vpiName:an_obj |vpiFullName:work@uvm_reg_map::set_check_on_read::an_obj + |vpiActual: + \_class_var: (work@uvm_reg_map::set_check_on_read::an_obj), line:51:14, endln:51:20 |vpiName:push_back |vpiPrefix: \_ref_obj: (work@uvm_reg_map::set_check_on_read::m_submaps3), line:52:6, endln:52:16 diff --git a/tests/UnitPackage/UnitPackage.log b/tests/UnitPackage/UnitPackage.log index 3c16e98f9e..dce0d3e136 100644 --- a/tests/UnitPackage/UnitPackage.log +++ b/tests/UnitPackage/UnitPackage.log @@ -1753,7 +1753,7 @@ design: (work@simple_package) |vpiName:getErrCnt |vpiFullName:msgPkg::getErrCnt::getErrCnt |vpiActual: - \_integer_var: , line:47:12, endln:47:19 + \_integer_var: (getErrCnt), line:47:12, endln:47:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |vpiTaskFunc: @@ -1792,7 +1792,7 @@ design: (work@simple_package) |vpiName:getWarnCnt |vpiFullName:msgPkg::getWarnCnt::getWarnCnt |vpiActual: - \_integer_var: , line:53:12, endln:53:19 + \_integer_var: (getWarnCnt), line:53:12, endln:53:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |uhdmtopPackages: @@ -2448,7 +2448,7 @@ design: (work@simple_package) |vpiName:getErrCnt |vpiFullName:msgPkg::getErrCnt::getErrCnt |vpiActual: - \_integer_var: , line:47:12, endln:47:19 + \_integer_var: (getErrCnt), line:47:12, endln:47:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |vpiTaskFunc: @@ -2487,7 +2487,7 @@ design: (work@simple_package) |vpiName:getWarnCnt |vpiFullName:msgPkg::getWarnCnt::getWarnCnt |vpiActual: - \_integer_var: , line:53:12, endln:53:19 + \_integer_var: (getWarnCnt), line:53:12, endln:53:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |uhdmallClasses: @@ -2925,7 +2925,7 @@ design: (work@simple_package) |vpiRhs: \_ref_obj: (msgPkg::initMsgPkg::term), line:13:26, endln:13:30 |vpiParent: - \_begin: (msgPkg::initMsgPkg) + \_assignment: , line:13:5, endln:13:30 |vpiName:term |vpiFullName:msgPkg::initMsgPkg::term |vpiActual: @@ -2933,7 +2933,7 @@ design: (work@simple_package) |vpiLhs: \_ref_obj: (msgPkg::initMsgPkg::terminate_on_error), line:13:5, endln:13:23 |vpiParent: - \_begin: (msgPkg::initMsgPkg) + \_assignment: , line:13:5, endln:13:30 |vpiName:terminate_on_error |vpiFullName:msgPkg::initMsgPkg::terminate_on_error |vpiActual: @@ -2947,7 +2947,7 @@ design: (work@simple_package) |vpiRhs: \_ref_obj: (msgPkg::initMsgPkg::mName), line:14:15, endln:14:20 |vpiParent: - \_begin: (msgPkg::initMsgPkg) + \_assignment: , line:14:5, endln:14:20 |vpiName:mName |vpiFullName:msgPkg::initMsgPkg::mName |vpiActual: @@ -2955,7 +2955,7 @@ design: (work@simple_package) |vpiLhs: \_ref_obj: (msgPkg::initMsgPkg::msgName), line:14:5, endln:14:12 |vpiParent: - \_begin: (msgPkg::initMsgPkg) + \_assignment: , line:14:5, endln:14:20 |vpiName:msgName |vpiFullName:msgPkg::initMsgPkg::msgName |vpiActual: @@ -3215,7 +3215,7 @@ design: (work@simple_package) |vpiRhs: \_ref_obj: (msgPkg::getErrCnt::errCnt), line:48:17, endln:48:23 |vpiParent: - \_function: (msgPkg::getErrCnt), line:47:3, endln:49:14 + \_assignment: , line:48:5, endln:48:23 |vpiName:errCnt |vpiFullName:msgPkg::getErrCnt::errCnt |vpiActual: @@ -3223,7 +3223,7 @@ design: (work@simple_package) |vpiLhs: \_ref_obj: (msgPkg::getErrCnt::getErrCnt), line:48:5, endln:48:14 |vpiParent: - \_function: (msgPkg::getErrCnt), line:47:3, endln:49:14 + \_assignment: , line:48:5, endln:48:23 |vpiName:getErrCnt |vpiFullName:msgPkg::getErrCnt::getErrCnt |vpiActual: @@ -3248,7 +3248,7 @@ design: (work@simple_package) |vpiRhs: \_ref_obj: (msgPkg::getWarnCnt::warnCnt), line:54:18, endln:54:25 |vpiParent: - \_function: (msgPkg::getWarnCnt), line:53:3, endln:55:14 + \_assignment: , line:54:5, endln:54:25 |vpiName:warnCnt |vpiFullName:msgPkg::getWarnCnt::warnCnt |vpiActual: @@ -3256,7 +3256,7 @@ design: (work@simple_package) |vpiLhs: \_ref_obj: (msgPkg::getWarnCnt::getWarnCnt), line:54:5, endln:54:15 |vpiParent: - \_function: (msgPkg::getWarnCnt), line:53:3, endln:55:14 + \_assignment: , line:54:5, endln:54:25 |vpiName:getWarnCnt |vpiFullName:msgPkg::getWarnCnt::getWarnCnt |vpiActual: @@ -3426,7 +3426,7 @@ design: (work@simple_package) |vpiOperand: \_ref_obj: (work@simple_package.value), line:26:7, endln:26:12 |vpiParent: - \_begin: (work@simple_package), line:19:9, endln:28:4 + \_operation: , line:26:7, endln:26:32 |vpiName:value |vpiFullName:work@simple_package.value |vpiActual: @@ -3623,7 +3623,7 @@ design: (work@simple_package) |vpiName:terminate_on_error |vpiFullName:work@simple_package.initMsgPkg.terminate_on_error |vpiActual: - \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + \_bit_var: (msgPkg::terminate_on_error), line:7:12, endln:7:30 |vpiStmt: \_assignment: , line:14:5, endln:14:20 |vpiParent: @@ -3645,7 +3645,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.initMsgPkg.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiInstance: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 |vpiTaskFunc: @@ -3681,7 +3681,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.msg_info.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.msg_info.msg), line:20:51, endln:20:54 |vpiParent: @@ -3731,7 +3731,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.msg_warn.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.msg_warn.msg), line:26:51, endln:26:54 |vpiParent: @@ -3753,7 +3753,7 @@ design: (work@simple_package) |vpiName:warnCnt |vpiFullName:work@simple_package.msg_warn.warnCnt |vpiActual: - \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + \_integer_var: (msgPkg::warnCnt), line:6:12, endln:6:23 |vpiInstance: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 |vpiTaskFunc: @@ -3794,7 +3794,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.msg_error.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.msg_error.msg), line:33:52, endln:33:55 |vpiParent: @@ -3816,7 +3816,7 @@ design: (work@simple_package) |vpiName:errCnt |vpiFullName:work@simple_package.msg_error.errCnt |vpiActual: - \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + \_integer_var: (msgPkg::errCnt), line:5:12, endln:5:23 |vpiStmt: \_if_stmt: , line:35:5, endln:35:37 |vpiParent: @@ -3828,7 +3828,7 @@ design: (work@simple_package) |vpiName:terminate_on_error |vpiFullName:work@simple_package.msg_error.terminate_on_error |vpiActual: - \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + \_bit_var: (msgPkg::terminate_on_error), line:7:12, endln:7:30 |vpiStmt: \_sys_func_call: ($finish), line:35:29, endln:35:36 |vpiParent: @@ -3874,7 +3874,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.msg_fatal.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.msg_fatal.msg), line:41:52, endln:41:55 |vpiParent: @@ -3913,7 +3913,7 @@ design: (work@simple_package) |vpiName:errCnt |vpiFullName:work@simple_package.getErrCnt.errCnt |vpiActual: - \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + \_integer_var: (msgPkg::errCnt), line:5:12, endln:5:23 |vpiLhs: \_ref_obj: (work@simple_package.getErrCnt.getErrCnt), line:48:5, endln:48:14 |vpiParent: @@ -3921,7 +3921,7 @@ design: (work@simple_package) |vpiName:getErrCnt |vpiFullName:work@simple_package.getErrCnt.getErrCnt |vpiActual: - \_integer_var: , line:47:12, endln:47:19 + \_integer_var: (getErrCnt), line:47:12, endln:47:19 |vpiInstance: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 |vpiTaskFunc: @@ -3946,7 +3946,7 @@ design: (work@simple_package) |vpiName:warnCnt |vpiFullName:work@simple_package.getWarnCnt.warnCnt |vpiActual: - \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + \_integer_var: (msgPkg::warnCnt), line:6:12, endln:6:23 |vpiLhs: \_ref_obj: (work@simple_package.getWarnCnt.getWarnCnt), line:54:5, endln:54:15 |vpiParent: @@ -3954,7 +3954,7 @@ design: (work@simple_package) |vpiName:getWarnCnt |vpiFullName:work@simple_package.getWarnCnt.getWarnCnt |vpiActual: - \_integer_var: , line:53:12, endln:53:19 + \_integer_var: (getWarnCnt), line:53:12, endln:53:19 |vpiInstance: \_module_inst: work@simple_package (work@simple_package), file:${SURELOG_DIR}/tests/UnitPackage/simple_pkg.sv, line:11:1, endln:30:10 |vpiNet: @@ -4167,7 +4167,7 @@ design: (work@simple_package) |vpiName:terminate_on_error |vpiFullName:work@simple_package.inst.initMsgPkg.terminate_on_error |vpiActual: - \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + \_bit_var: (msgPkg::terminate_on_error), line:7:12, endln:7:30 |vpiStmt: \_assignment: , line:14:5, endln:14:20 |vpiParent: @@ -4189,7 +4189,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.inst.initMsgPkg.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |vpiTaskFunc: @@ -4225,7 +4225,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.inst.msg_info.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.inst.msg_info.msg), line:20:51, endln:20:54 |vpiParent: @@ -4275,7 +4275,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.inst.msg_warn.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.inst.msg_warn.msg), line:26:51, endln:26:54 |vpiParent: @@ -4297,7 +4297,7 @@ design: (work@simple_package) |vpiName:warnCnt |vpiFullName:work@simple_package.inst.msg_warn.warnCnt |vpiActual: - \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + \_integer_var: (msgPkg::warnCnt), line:6:12, endln:6:23 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |vpiTaskFunc: @@ -4338,7 +4338,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.inst.msg_error.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.inst.msg_error.msg), line:33:52, endln:33:55 |vpiParent: @@ -4360,7 +4360,7 @@ design: (work@simple_package) |vpiName:errCnt |vpiFullName:work@simple_package.inst.msg_error.errCnt |vpiActual: - \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + \_integer_var: (msgPkg::errCnt), line:5:12, endln:5:23 |vpiStmt: \_if_stmt: , line:35:5, endln:35:37 |vpiParent: @@ -4372,7 +4372,7 @@ design: (work@simple_package) |vpiName:terminate_on_error |vpiFullName:work@simple_package.inst.msg_error.terminate_on_error |vpiActual: - \_bit_var: (work@simple_package.terminate_on_error), line:7:12, endln:7:30 + \_bit_var: (msgPkg::terminate_on_error), line:7:12, endln:7:30 |vpiStmt: \_sys_func_call: ($finish), line:35:29, endln:35:36 |vpiParent: @@ -4418,7 +4418,7 @@ design: (work@simple_package) |vpiName:msgName |vpiFullName:work@simple_package.inst.msg_fatal.msgName |vpiActual: - \_string_var: (work@simple_package.msgName), line:8:12, endln:8:28 + \_string_var: (msgPkg::msgName), line:8:12, endln:8:28 |vpiArgument: \_ref_obj: (work@simple_package.inst.msg_fatal.msg), line:41:52, endln:41:55 |vpiParent: @@ -4457,7 +4457,7 @@ design: (work@simple_package) |vpiName:errCnt |vpiFullName:work@simple_package.inst.getErrCnt.errCnt |vpiActual: - \_integer_var: (work@simple_package.errCnt), line:5:12, endln:5:23 + \_integer_var: (msgPkg::errCnt), line:5:12, endln:5:23 |vpiLhs: \_ref_obj: (work@simple_package.inst.getErrCnt.getErrCnt), line:48:5, endln:48:14 |vpiParent: @@ -4465,7 +4465,7 @@ design: (work@simple_package) |vpiName:getErrCnt |vpiFullName:work@simple_package.inst.getErrCnt.getErrCnt |vpiActual: - \_integer_var: , line:47:12, endln:47:19 + \_integer_var: (getErrCnt), line:47:12, endln:47:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 |vpiTaskFunc: @@ -4490,7 +4490,7 @@ design: (work@simple_package) |vpiName:warnCnt |vpiFullName:work@simple_package.inst.getWarnCnt.warnCnt |vpiActual: - \_integer_var: (work@simple_package.warnCnt), line:6:12, endln:6:23 + \_integer_var: (msgPkg::warnCnt), line:6:12, endln:6:23 |vpiLhs: \_ref_obj: (work@simple_package.inst.getWarnCnt.getWarnCnt), line:54:5, endln:54:15 |vpiParent: @@ -4498,7 +4498,7 @@ design: (work@simple_package) |vpiName:getWarnCnt |vpiFullName:work@simple_package.inst.getWarnCnt.getWarnCnt |vpiActual: - \_integer_var: , line:53:12, endln:53:19 + \_integer_var: (getWarnCnt), line:53:12, endln:53:19 |vpiInstance: \_package: msgPkg (msgPkg::), file:${SURELOG_DIR}/tests/UnitPackage/msgPkg.pkg, line:4:1, endln:57:11 =================== diff --git a/tests/UnitPartSelect/UnitPartSelect.log b/tests/UnitPartSelect/UnitPartSelect.log index b332288b2a..1b303aa80a 100644 --- a/tests/UnitPartSelect/UnitPartSelect.log +++ b/tests/UnitPartSelect/UnitPartSelect.log @@ -863,7 +863,7 @@ parameter 2 part_select 6 port 12 range 31 -ref_obj 32 +ref_obj 20 task 9 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -899,7 +899,7 @@ parameter 2 part_select 12 port 18 range 31 -ref_obj 54 +ref_obj 30 task 18 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/UnitPartSelect/slpp_unit/surelog.uhdm ... @@ -1438,14 +1438,12 @@ design: (work@toto) |vpiParent: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:21:1, endln:27:10 |vpiRhs: - \_part_select: , line:26:14, endln:26:20 + \_part_select: a (work@dut.a), line:26:14, endln:26:20 |vpiParent: - \_ref_obj: a (work@dut.a), line:26:14, endln:26:15 - |vpiParent: - \_cont_assign: , line:26:10, endln:26:20 - |vpiName:a - |vpiFullName:work@dut.a - |vpiDefName:a + \_cont_assign: , line:26:10, endln:26:20 + |vpiName:a + |vpiFullName:work@dut.a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:16, endln:26:17 @@ -1552,11 +1550,7 @@ design: (work@toto) |vpiRhs: \_bit_select: (work@dut_no_decl.a), line:39:17, endln:39:21 |vpiParent: - \_ref_obj: (work@dut_no_decl.a) - |vpiParent: - \_cont_assign: , line:39:10, endln:39:21 - |vpiName:a - |vpiFullName:work@dut_no_decl.a + \_cont_assign: , line:39:10, endln:39:21 |vpiName:a |vpiFullName:work@dut_no_decl.a |vpiIndex: @@ -1570,11 +1564,7 @@ design: (work@toto) |vpiLhs: \_bit_select: (work@dut_no_decl.b), line:39:10, endln:39:14 |vpiParent: - \_ref_obj: (work@dut_no_decl.b) - |vpiParent: - \_cont_assign: , line:39:10, endln:39:21 - |vpiName:b - |vpiFullName:work@dut_no_decl.b + \_cont_assign: , line:39:10, endln:39:21 |vpiName:b |vpiFullName:work@dut_no_decl.b |vpiIndex: @@ -1590,14 +1580,12 @@ design: (work@toto) |vpiParent: \_module_inst: work@dut_no_decl (work@dut_no_decl), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:38:1, endln:41:10 |vpiRhs: - \_part_select: , line:40:19, endln:40:25 + \_part_select: a (work@dut_no_decl.a), line:40:19, endln:40:25 |vpiParent: - \_ref_obj: a (work@dut_no_decl.a), line:40:19, endln:40:20 - |vpiParent: - \_cont_assign: , line:40:10, endln:40:25 - |vpiName:a - |vpiFullName:work@dut_no_decl.a - |vpiDefName:a + \_cont_assign: , line:40:10, endln:40:25 + |vpiName:a + |vpiFullName:work@dut_no_decl.a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:40:21, endln:40:22 @@ -1612,14 +1600,12 @@ design: (work@toto) |UINT:1 |vpiConstType:9 |vpiLhs: - \_part_select: , line:40:10, endln:40:16 + \_part_select: b (work@dut_no_decl.b), line:40:10, endln:40:16 |vpiParent: - \_ref_obj: b (work@dut_no_decl.b) - |vpiParent: - \_cont_assign: , line:40:10, endln:40:25 - |vpiName:b - |vpiFullName:work@dut_no_decl.b - |vpiDefName:b + \_cont_assign: , line:40:10, endln:40:25 + |vpiName:b + |vpiFullName:work@dut_no_decl.b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:40:12, endln:40:13 @@ -1732,11 +1718,7 @@ design: (work@toto) |vpiRhs: \_bit_select: (work@dut_part_select.a), line:33:17, endln:33:21 |vpiParent: - \_ref_obj: (work@dut_part_select.a) - |vpiParent: - \_cont_assign: , line:33:10, endln:33:21 - |vpiName:a - |vpiFullName:work@dut_part_select.a + \_cont_assign: , line:33:10, endln:33:21 |vpiName:a |vpiFullName:work@dut_part_select.a |vpiIndex: @@ -1750,11 +1732,7 @@ design: (work@toto) |vpiLhs: \_bit_select: (work@dut_part_select.b), line:33:10, endln:33:14 |vpiParent: - \_ref_obj: (work@dut_part_select.b) - |vpiParent: - \_cont_assign: , line:33:10, endln:33:21 - |vpiName:b - |vpiFullName:work@dut_part_select.b + \_cont_assign: , line:33:10, endln:33:21 |vpiName:b |vpiFullName:work@dut_part_select.b |vpiIndex: @@ -1770,14 +1748,12 @@ design: (work@toto) |vpiParent: \_module_inst: work@dut_part_select (work@dut_part_select), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:30:1, endln:35:10 |vpiRhs: - \_part_select: , line:34:19, endln:34:25 + \_part_select: a (work@dut_part_select.a), line:34:19, endln:34:25 |vpiParent: - \_ref_obj: a (work@dut_part_select.a), line:34:19, endln:34:20 - |vpiParent: - \_cont_assign: , line:34:10, endln:34:25 - |vpiName:a - |vpiFullName:work@dut_part_select.a - |vpiDefName:a + \_cont_assign: , line:34:10, endln:34:25 + |vpiName:a + |vpiFullName:work@dut_part_select.a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:21, endln:34:22 @@ -1792,14 +1768,12 @@ design: (work@toto) |UINT:1 |vpiConstType:9 |vpiLhs: - \_part_select: , line:34:10, endln:34:16 + \_part_select: b (work@dut_part_select.b), line:34:10, endln:34:16 |vpiParent: - \_ref_obj: b (work@dut_part_select.b) - |vpiParent: - \_cont_assign: , line:34:10, endln:34:25 - |vpiName:b - |vpiFullName:work@dut_part_select.b - |vpiDefName:b + \_cont_assign: , line:34:10, endln:34:25 + |vpiName:b + |vpiFullName:work@dut_part_select.b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:12, endln:34:13 @@ -1889,8 +1863,6 @@ design: (work@toto) |vpiOpType:82 |vpiRhs: \_constant: , line:9:20, endln:9:24 - |vpiParent: - \_assignment: , line:9:5, endln:9:24 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1898,17 +1870,13 @@ design: (work@toto) |vpiLhs: \_bit_select: (work@toto.state), line:9:5, endln:9:16 |vpiParent: - \_ref_obj: (work@toto.state) - |vpiParent: - \_assignment: , line:9:5, endln:9:24 - |vpiName:state - |vpiFullName:work@toto.state + \_assignment: , line:9:5, endln:9:24 |vpiName:state |vpiFullName:work@toto.state |vpiIndex: \_ref_obj: (work@toto.IDLE), line:9:11, endln:9:15 |vpiParent: - \_begin: (work@toto), line:7:26, endln:17:6 + \_bit_select: (work@toto.state), line:9:5, endln:9:16 |vpiName:IDLE |vpiFullName:work@toto.IDLE |vpiStmt: @@ -1923,11 +1891,7 @@ design: (work@toto) |vpiOperand: \_bit_select: (work@toto.InterruptStatus), line:11:9, endln:11:27 |vpiParent: - \_ref_obj: (work@toto.InterruptStatus) - |vpiParent: - \_operation: , line:11:9, endln:11:30 - |vpiName:InterruptStatus - |vpiFullName:work@toto.InterruptStatus + \_operation: , line:11:9, endln:11:30 |vpiName:InterruptStatus |vpiFullName:work@toto.InterruptStatus |vpiIndex: @@ -1961,14 +1925,12 @@ design: (work@toto) \_begin: (work@toto), line:7:26, endln:17:6 |vpiOpType:15 |vpiOperand: - \_part_select: , line:14:9, endln:14:29 + \_part_select: ConnectionState (work@toto.ConnectionState), line:14:9, endln:14:29 |vpiParent: - \_ref_obj: ConnectionState (work@toto.ConnectionState), line:14:9, endln:14:24 - |vpiParent: - \_operation: , line:14:9, endln:14:42 - |vpiName:ConnectionState - |vpiFullName:work@toto.ConnectionState - |vpiDefName:ConnectionState + \_operation: , line:14:9, endln:14:42 + |vpiName:ConnectionState + |vpiFullName:work@toto.ConnectionState + |vpiDefName:ConnectionState |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:14:25, endln:14:26 @@ -2107,25 +2069,19 @@ design: (work@toto) |vpiLhs: \_bit_select: (work@toto.state), line:9:5, endln:9:16 |vpiParent: - \_ref_obj: (work@toto.state) - |vpiParent: - \_assignment: , line:9:5, endln:9:24 - |vpiName:state - |vpiFullName:work@toto.state - |vpiActual: - \_logic_net: (work@toto.state), line:5:13, endln:5:18 + \_assignment: , line:9:5, endln:9:24 |vpiName:state |vpiFullName:work@toto.state + |vpiActual: + \_logic_net: (work@toto.state), line:5:13, endln:5:18 |vpiIndex: - \_ref_obj: (work@toto.state.IDLE), line:9:11, endln:9:15 + \_ref_obj: (work@toto.IDLE), line:9:11, endln:9:15 |vpiParent: \_bit_select: (work@toto.state), line:9:5, endln:9:16 |vpiName:IDLE - |vpiFullName:work@toto.state.IDLE + |vpiFullName:work@toto.IDLE |vpiActual: \_parameter: (work@toto.IDLE), line:3:13, endln:3:17 - |vpiActual: - \_logic_net: (work@toto.state), line:5:13, endln:5:18 |vpiStmt: \_if_stmt: , line:11:5, endln:12:8 |vpiParent: @@ -2138,11 +2094,7 @@ design: (work@toto) |vpiOperand: \_bit_select: (work@toto.InterruptStatus), line:11:9, endln:11:27 |vpiParent: - \_ref_obj: (work@toto.InterruptStatus) - |vpiParent: - \_operation: , line:11:9, endln:11:30 - |vpiName:InterruptStatus - |vpiFullName:work@toto.InterruptStatus + \_operation: , line:11:9, endln:11:30 |vpiName:InterruptStatus |vpiFullName:work@toto.InterruptStatus |vpiIndex: @@ -2164,14 +2116,12 @@ design: (work@toto) \_if_stmt: , line:14:5, endln:15:8 |vpiOpType:15 |vpiOperand: - \_part_select: , line:14:9, endln:14:29 + \_part_select: ConnectionState (work@toto.ConnectionState), line:14:9, endln:14:29 |vpiParent: - \_ref_obj: ConnectionState (work@toto.ConnectionState), line:14:9, endln:14:24 - |vpiParent: - \_operation: , line:14:9, endln:14:42 - |vpiName:ConnectionState - |vpiFullName:work@toto.ConnectionState - |vpiDefName:ConnectionState + \_operation: , line:14:9, endln:14:42 + |vpiName:ConnectionState + |vpiFullName:work@toto.ConnectionState + |vpiDefName:ConnectionState |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:14:25, endln:14:26 @@ -2332,16 +2282,14 @@ design: (work@toto) |vpiParent: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:21:1, endln:27:10 |vpiRhs: - \_part_select: , line:26:14, endln:26:20 + \_part_select: a (work@dut.a), line:26:14, endln:26:20 |vpiParent: - \_ref_obj: a (work@dut.a), line:26:14, endln:26:15 - |vpiParent: - \_cont_assign: , line:26:10, endln:26:20 - |vpiName:a - |vpiFullName:work@dut.a - |vpiDefName:a - |vpiActual: - \_logic_net: (work@dut.a), line:24:16, endln:24:17 + \_cont_assign: , line:26:10, endln:26:20 + |vpiName:a + |vpiFullName:work@dut.a + |vpiDefName:a + |vpiActual: + \_logic_net: (work@dut.a), line:24:16, endln:24:17 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:16, endln:26:17 @@ -2550,66 +2498,50 @@ design: (work@toto) |vpiRhs: \_bit_select: (work@dut_part_select.a), line:33:17, endln:33:21 |vpiParent: - \_ref_obj: (work@dut_part_select.a) - |vpiParent: - \_cont_assign: , line:33:10, endln:33:21 - |vpiName:a - |vpiFullName:work@dut_part_select.a - |vpiActual: - \_logic_net: (work@dut_part_select.a), line:30:36, endln:30:37 + \_cont_assign: , line:33:10, endln:33:21 |vpiName:a |vpiFullName:work@dut_part_select.a - |vpiIndex: - \_constant: , line:33:19, endln:33:20 |vpiActual: \_logic_net: (work@dut_part_select.a), line:30:36, endln:30:37 + |vpiIndex: + \_constant: , line:33:19, endln:33:20 |vpiLhs: \_bit_select: (work@dut_part_select.b), line:33:10, endln:33:14 |vpiParent: - \_ref_obj: (work@dut_part_select.b) - |vpiParent: - \_cont_assign: , line:33:10, endln:33:21 - |vpiName:b - |vpiFullName:work@dut_part_select.b - |vpiActual: - \_logic_net: (work@dut_part_select.b), line:30:52, endln:30:53 + \_cont_assign: , line:33:10, endln:33:21 |vpiName:b |vpiFullName:work@dut_part_select.b - |vpiIndex: - \_constant: , line:33:12, endln:33:13 |vpiActual: \_logic_net: (work@dut_part_select.b), line:30:52, endln:30:53 + |vpiIndex: + \_constant: , line:33:12, endln:33:13 |vpiContAssign: \_cont_assign: , line:34:10, endln:34:25 |vpiParent: \_module_inst: work@dut_part_select (work@dut_part_select), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:30:1, endln:35:10 |vpiRhs: - \_part_select: , line:34:19, endln:34:25 + \_part_select: a (work@dut_part_select.a), line:34:19, endln:34:25 |vpiParent: - \_ref_obj: a (work@dut_part_select.a), line:34:19, endln:34:20 - |vpiParent: - \_cont_assign: , line:34:10, endln:34:25 - |vpiName:a - |vpiFullName:work@dut_part_select.a - |vpiDefName:a - |vpiActual: - \_logic_net: (work@dut_part_select.a), line:30:36, endln:30:37 + \_cont_assign: , line:34:10, endln:34:25 + |vpiName:a + |vpiFullName:work@dut_part_select.a + |vpiDefName:a + |vpiActual: + \_logic_net: (work@dut_part_select.a), line:30:36, endln:30:37 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:21, endln:34:22 |vpiRightRange: \_constant: , line:34:23, endln:34:24 |vpiLhs: - \_part_select: , line:34:10, endln:34:16 + \_part_select: b (work@dut_part_select.b), line:34:10, endln:34:16 |vpiParent: - \_ref_obj: b (work@dut_part_select.b) - |vpiParent: - \_cont_assign: , line:34:10, endln:34:25 - |vpiName:b - |vpiFullName:work@dut_part_select.b - |vpiDefName:b - |vpiActual: - \_logic_net: (work@dut_part_select.b), line:30:52, endln:30:53 + \_cont_assign: , line:34:10, endln:34:25 + |vpiName:b + |vpiFullName:work@dut_part_select.b + |vpiDefName:b + |vpiActual: + \_logic_net: (work@dut_part_select.b), line:30:52, endln:30:53 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:12, endln:34:13 @@ -2756,66 +2688,50 @@ design: (work@toto) |vpiRhs: \_bit_select: (work@dut_no_decl.a), line:39:17, endln:39:21 |vpiParent: - \_ref_obj: (work@dut_no_decl.a) - |vpiParent: - \_cont_assign: , line:39:10, endln:39:21 - |vpiName:a - |vpiFullName:work@dut_no_decl.a - |vpiActual: - \_logic_net: (work@dut_no_decl.a), line:38:32, endln:38:33 + \_cont_assign: , line:39:10, endln:39:21 |vpiName:a |vpiFullName:work@dut_no_decl.a - |vpiIndex: - \_constant: , line:39:19, endln:39:20 |vpiActual: \_logic_net: (work@dut_no_decl.a), line:38:32, endln:38:33 + |vpiIndex: + \_constant: , line:39:19, endln:39:20 |vpiLhs: \_bit_select: (work@dut_no_decl.b), line:39:10, endln:39:14 |vpiParent: - \_ref_obj: (work@dut_no_decl.b) - |vpiParent: - \_cont_assign: , line:39:10, endln:39:21 - |vpiName:b - |vpiFullName:work@dut_no_decl.b - |vpiActual: - \_logic_net: (work@dut_no_decl.b), line:38:48, endln:38:49 + \_cont_assign: , line:39:10, endln:39:21 |vpiName:b |vpiFullName:work@dut_no_decl.b - |vpiIndex: - \_constant: , line:39:12, endln:39:13 |vpiActual: \_logic_net: (work@dut_no_decl.b), line:38:48, endln:38:49 + |vpiIndex: + \_constant: , line:39:12, endln:39:13 |vpiContAssign: \_cont_assign: , line:40:10, endln:40:25 |vpiParent: \_module_inst: work@dut_no_decl (work@dut_no_decl), file:${SURELOG_DIR}/tests/UnitPartSelect/top.sv, line:38:1, endln:41:10 |vpiRhs: - \_part_select: , line:40:19, endln:40:25 + \_part_select: a (work@dut_no_decl.a), line:40:19, endln:40:25 |vpiParent: - \_ref_obj: a (work@dut_no_decl.a), line:40:19, endln:40:20 - |vpiParent: - \_cont_assign: , line:40:10, endln:40:25 - |vpiName:a - |vpiFullName:work@dut_no_decl.a - |vpiDefName:a - |vpiActual: - \_logic_net: (work@dut_no_decl.a), line:38:32, endln:38:33 + \_cont_assign: , line:40:10, endln:40:25 + |vpiName:a + |vpiFullName:work@dut_no_decl.a + |vpiDefName:a + |vpiActual: + \_logic_net: (work@dut_no_decl.a), line:38:32, endln:38:33 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:40:21, endln:40:22 |vpiRightRange: \_constant: , line:40:23, endln:40:24 |vpiLhs: - \_part_select: , line:40:10, endln:40:16 + \_part_select: b (work@dut_no_decl.b), line:40:10, endln:40:16 |vpiParent: - \_ref_obj: b (work@dut_no_decl.b) - |vpiParent: - \_cont_assign: , line:40:10, endln:40:25 - |vpiName:b - |vpiFullName:work@dut_no_decl.b - |vpiDefName:b - |vpiActual: - \_logic_net: (work@dut_no_decl.b), line:38:48, endln:38:49 + \_cont_assign: , line:40:10, endln:40:25 + |vpiName:b + |vpiFullName:work@dut_no_decl.b + |vpiDefName:b + |vpiActual: + \_logic_net: (work@dut_no_decl.b), line:38:48, endln:38:49 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:40:12, endln:40:13 @@ -2829,4 +2745,4 @@ design: (work@toto) [ NOTE] : 10 -[roundtrip]: ${SURELOG_DIR}/tests/UnitPartSelect/top.sv | ${SURELOG_DIR}/build/regression/UnitPartSelect/roundtrip/top_000.sv | 9 | 41 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/UnitPartSelect/top.sv | ${SURELOG_DIR}/build/regression/UnitPartSelect/roundtrip/top_000.sv | 13 | 41 | \ No newline at end of file diff --git a/tests/UnitTest/UnitTest.log b/tests/UnitTest/UnitTest.log index eace14c3fd..8158e9bedb 100644 --- a/tests/UnitTest/UnitTest.log +++ b/tests/UnitTest/UnitTest.log @@ -893,8 +893,6 @@ design: (work@tb_operators) |vpiBlocking:1 |vpiRhs: \_constant: , line:11:15, endln:11:20 - |vpiParent: - \_assignment: , line:11:5, endln:11:20 |vpiDecompile:32'b1 |vpiSize:32 |BIN:1 @@ -902,7 +900,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.shifter), line:11:5, endln:11:12 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:11:5, endln:11:20 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -916,12 +914,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:13:14, endln:13:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:13:5, endln:13:26 |vpiOpType:22 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:13:14, endln:13:21 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:13:14, endln:13:26 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -937,7 +935,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:13:5, endln:13:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:13:5, endln:13:26 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -951,12 +949,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:14:14, endln:14:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:14:5, endln:14:26 |vpiOpType:23 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:14:14, endln:14:21 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:14:14, endln:14:26 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -972,7 +970,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:14:5, endln:14:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:14:5, endln:14:26 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -986,12 +984,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:15:14, endln:15:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:15:5, endln:15:26 |vpiOpType:22 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:15:14, endln:15:21 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:15:14, endln:15:26 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1007,7 +1005,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:15:5, endln:15:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:15:5, endln:15:26 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1021,12 +1019,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:16:14, endln:16:33 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:16:5, endln:16:33 |vpiOpType:42 |vpiOperand: \_operation: , line:16:14, endln:16:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:16:14, endln:16:33 |vpiOpType:33 |vpiOperand: \_constant: , line:16:15, endln:16:19 @@ -1055,7 +1053,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:16:5, endln:16:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:16:5, endln:16:33 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1069,12 +1067,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:17:14, endln:17:33 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:17:5, endln:17:33 |vpiOpType:41 |vpiOperand: \_operation: , line:17:14, endln:17:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:17:14, endln:17:33 |vpiOpType:33 |vpiOperand: \_constant: , line:17:15, endln:17:19 @@ -1103,7 +1101,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:17:5, endln:17:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:17:5, endln:17:33 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1117,12 +1115,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:19:14, endln:19:26 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:19:5, endln:19:26 |vpiOpType:43 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:19:14, endln:19:21 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:19:14, endln:19:26 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1138,7 +1136,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:19:5, endln:19:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:19:5, endln:19:26 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1152,12 +1150,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:20:14, endln:20:24 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:20:5, endln:20:24 |vpiOpType:13 |vpiOperand: \_ref_obj: (work@tb_operators.result), line:20:14, endln:20:20 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:20:14, endln:20:24 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1173,7 +1171,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:20:5, endln:20:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:20:5, endln:20:24 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1190,7 +1188,7 @@ design: (work@tb_operators) |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:22:8, endln:22:15 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:22:8, endln:22:25 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1233,7 +1231,7 @@ design: (work@tb_operators) |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:24:17, endln:24:24 |vpiParent: - \_if_else: , line:22:5, endln:30:8 + \_operation: , line:24:17, endln:24:34 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1276,7 +1274,7 @@ design: (work@tb_operators) |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:26:17, endln:26:24 |vpiParent: - \_if_else: , line:24:14, endln:30:8 + \_operation: , line:26:17, endln:26:35 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1319,7 +1317,7 @@ design: (work@tb_operators) |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:28:17, endln:28:24 |vpiParent: - \_if_else: , line:26:14, endln:30:8 + \_operation: , line:28:17, endln:28:35 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1359,12 +1357,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:32:15, endln:32:34 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:32:5, endln:32:34 |vpiOpType:17 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:32:15, endln:32:22 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:32:15, endln:32:34 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1380,7 +1378,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.result), line:32:5, endln:32:11 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:32:5, endln:32:34 |vpiName:result |vpiFullName:work@tb_operators.result |vpiActual: @@ -1394,12 +1392,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:34:15, endln:34:32 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:34:5, endln:34:32 |vpiOpType:6 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:34:15, endln:34:22 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:34:15, endln:34:32 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1415,7 +1413,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.shifter), line:34:5, endln:34:12 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:34:5, endln:34:32 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1429,12 +1427,12 @@ design: (work@tb_operators) |vpiRhs: \_operation: , line:35:15, endln:35:32 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:35:5, endln:35:32 |vpiOpType:8 |vpiOperand: \_ref_obj: (work@tb_operators.shifter), line:35:15, endln:35:22 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_operation: , line:35:15, endln:35:32 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: @@ -1450,7 +1448,7 @@ design: (work@tb_operators) |vpiLhs: \_ref_obj: (work@tb_operators.shifter), line:35:5, endln:35:12 |vpiParent: - \_begin: (work@tb_operators), line:8:9, endln:36:4 + \_assignment: , line:35:5, endln:35:32 |vpiName:shifter |vpiFullName:work@tb_operators.shifter |vpiActual: diff --git a/tests/UnitThisNew/UnitThisNew.log b/tests/UnitThisNew/UnitThisNew.log index a9a5695530..ce020a551c 100644 --- a/tests/UnitThisNew/UnitThisNew.log +++ b/tests/UnitThisNew/UnitThisNew.log @@ -897,10 +897,11 @@ design: (unnamed) \_assignment: , line:18:6, endln:18:20 |vpiName:new |vpiLhs: - \_ref_obj: (m_b_inst), line:18:6, endln:18:14 + \_ref_obj: (toto::m_initialize::m_b_inst), line:18:6, endln:18:14 |vpiParent: \_assignment: , line:18:6, endln:18:20 |vpiName:m_b_inst + |vpiFullName:toto::m_initialize::m_b_inst |vpiStmt: \_assignment: , line:19:6, endln:19:22 |vpiParent: @@ -921,10 +922,11 @@ design: (unnamed) |vpiConstType:9 |vpiName:new |vpiLhs: - \_ref_obj: (m_pool), line:19:6, endln:19:12 + \_ref_obj: (toto::m_initialize::m_pool), line:19:6, endln:19:12 |vpiParent: \_assignment: , line:19:6, endln:19:22 |vpiName:m_pool + |vpiFullName:toto::m_initialize::m_pool |vpiStmt: \_return_stmt: , line:21:4, endln:21:10 |vpiParent: @@ -1378,10 +1380,11 @@ design: (unnamed) \_assignment: , line:18:6, endln:18:20 |vpiName:new |vpiLhs: - \_ref_obj: (m_b_inst), line:18:6, endln:18:14 + \_ref_obj: (toto::m_initialize::m_b_inst), line:18:6, endln:18:14 |vpiParent: \_assignment: , line:18:6, endln:18:20 |vpiName:m_b_inst + |vpiFullName:toto::m_initialize::m_b_inst |vpiStmt: \_assignment: , line:19:6, endln:19:22 |vpiParent: @@ -1402,10 +1405,11 @@ design: (unnamed) |vpiConstType:9 |vpiName:new |vpiLhs: - \_ref_obj: (m_pool), line:19:6, endln:19:12 + \_ref_obj: (toto::m_initialize::m_pool), line:19:6, endln:19:12 |vpiParent: \_assignment: , line:19:6, endln:19:22 |vpiName:m_pool + |vpiFullName:toto::m_initialize::m_pool |vpiStmt: \_return_stmt: , line:21:4, endln:21:10 |vpiParent: diff --git a/tests/UnpackPort/UnpackPort.log b/tests/UnpackPort/UnpackPort.log index 26495dc712..14972ae883 100644 --- a/tests/UnpackPort/UnpackPort.log +++ b/tests/UnpackPort/UnpackPort.log @@ -447,7 +447,7 @@ package 2 parameter 7 port 2 range 11 -ref_obj 34 +ref_obj 19 ref_var 1 struct_net 1 struct_typespec 8 @@ -488,7 +488,7 @@ package 2 parameter 7 port 3 range 11 -ref_obj 49 +ref_obj 27 ref_var 1 struct_net 1 struct_typespec 8 @@ -1119,17 +1119,13 @@ design: (work@dut) |vpiLhs: \_bit_select: (var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiIndex: - \_ref_obj: (var3.i), line:9:19, endln:9:20 + \_ref_obj: (i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:var3.i |uhdmtopModules: \_module_inst: work@dut (work@dut), file:${SURELOG_DIR}/tests/UnpackPort/dut.sv, line:1:1, endln:11:10 |vpiName:work@dut @@ -1196,7 +1192,7 @@ design: (work@dut) |vpiName:var3 |vpiFullName:work@dut.var3 |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_struct_net: (work@dut.var3.var3), line:1:12, endln:6:26 |vpiTypedef: \_struct_typespec: (struct2), line:2:11, endln:2:17 |vpiInstance: @@ -1284,25 +1280,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[0].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[0].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[0].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[0].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[0].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[0].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[0].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[0].var3.i + |vpiFullName:work@dut.g_fill[0].i |vpiActual: \_parameter: (work@dut.g_fill[0].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[1]), line:8:30, endln:10:6 |vpiParent: @@ -1386,25 +1376,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[1].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[1].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[1].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[1].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[1].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[1].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[1].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[1].var3.i + |vpiFullName:work@dut.g_fill[1].i |vpiActual: \_parameter: (work@dut.g_fill[1].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[2]), line:8:30, endln:10:6 |vpiParent: @@ -1488,25 +1472,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[2].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[2].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[2].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[2].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[2].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[2].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[2].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[2].var3.i + |vpiFullName:work@dut.g_fill[2].i |vpiActual: \_parameter: (work@dut.g_fill[2].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[3]), line:8:30, endln:10:6 |vpiParent: @@ -1590,25 +1568,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[3].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[3].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[3].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[3].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[3].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[3].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[3].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[3].var3.i + |vpiFullName:work@dut.g_fill[3].i |vpiActual: \_parameter: (work@dut.g_fill[3].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[4]), line:8:30, endln:10:6 |vpiParent: @@ -1692,25 +1664,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[4].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[4].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[4].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[4].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[4].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[4].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[4].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[4].var3.i + |vpiFullName:work@dut.g_fill[4].i |vpiActual: \_parameter: (work@dut.g_fill[4].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[5]), line:8:30, endln:10:6 |vpiParent: @@ -1794,25 +1760,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[5].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[5].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[5].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[5].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[5].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[5].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[5].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[5].var3.i + |vpiFullName:work@dut.g_fill[5].i |vpiActual: \_parameter: (work@dut.g_fill[5].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiGenScopeArray: \_gen_scope_array: (work@dut.g_fill[6]), line:8:30, endln:10:6 |vpiParent: @@ -1896,25 +1856,19 @@ design: (work@dut) |vpiLhs: \_bit_select: (work@dut.g_fill[6].var3), line:9:14, endln:9:21 |vpiParent: - \_ref_obj: (work@dut.g_fill[6].var3) - |vpiParent: - \_cont_assign: , line:9:14, endln:9:37 - |vpiName:var3 - |vpiFullName:work@dut.g_fill[6].var3 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 + \_cont_assign: , line:9:14, endln:9:37 |vpiName:var3 |vpiFullName:work@dut.g_fill[6].var3 + |vpiActual: + \_array_net: (work@dut.var3), line:1:12, endln:1:16 |vpiIndex: - \_ref_obj: (work@dut.g_fill[6].var3.i), line:9:19, endln:9:20 + \_ref_obj: (work@dut.g_fill[6].i), line:9:19, endln:9:20 |vpiParent: \_bit_select: (work@dut.g_fill[6].var3), line:9:14, endln:9:21 |vpiName:i - |vpiFullName:work@dut.g_fill[6].var3.i + |vpiFullName:work@dut.g_fill[6].i |vpiActual: \_parameter: (work@dut.g_fill[6].i), line:8:0 - |vpiActual: - \_array_net: (work@dut.var3), line:1:12, endln:1:16 =================== [ FATAL] : 0 [ SYNTAX] : 0 diff --git a/tests/UnsizeConstExpr/UnsizeConstExpr.log b/tests/UnsizeConstExpr/UnsizeConstExpr.log index 04d56d78ef..10e9aba4c9 100644 --- a/tests/UnsizeConstExpr/UnsizeConstExpr.log +++ b/tests/UnsizeConstExpr/UnsizeConstExpr.log @@ -104,7 +104,7 @@ module_inst 4 operation 2 part_select 2 range 2 -ref_obj 4 +ref_obj 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -119,7 +119,7 @@ module_inst 4 operation 3 part_select 3 range 2 -ref_obj 6 +ref_obj 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/UnsizeConstExpr/slpp_all/surelog.uhdm ... @@ -156,14 +156,12 @@ design: (work@top) \_cont_assign: , line:5:8, endln:5:39 |vpiOpType:14 |vpiOperand: - \_part_select: , line:5:12, endln:5:33 + \_part_select: product_exponent (work@top.product_exponent), line:5:12, endln:5:33 |vpiParent: - \_ref_obj: product_exponent (work@top.product_exponent), line:5:12, endln:5:28 - |vpiParent: - \_operation: , line:5:12, endln:5:39 - |vpiName:product_exponent - |vpiFullName:work@top.product_exponent - |vpiDefName:product_exponent + \_operation: , line:5:12, endln:5:39 + |vpiName:product_exponent + |vpiFullName:work@top.product_exponent + |vpiDefName:product_exponent |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:29, endln:5:30 @@ -258,21 +256,19 @@ design: (work@top) \_cont_assign: , line:5:8, endln:5:39 |vpiOpType:14 |vpiOperand: - \_part_select: , line:5:12, endln:5:33 + \_part_select: product_exponent (work@top.product_exponent), line:5:12, endln:5:33 |vpiParent: - \_ref_obj: product_exponent (work@top.product_exponent), line:5:12, endln:5:28 - |vpiParent: - \_operation: , line:5:12, endln:5:39 - |vpiName:product_exponent - |vpiFullName:work@top.product_exponent - |vpiDefName:product_exponent - |vpiActual: - \_logic_var: (work@top.product_exponent), line:3:14, endln:3:30 + \_operation: , line:5:12, endln:5:39 + |vpiName:product_exponent + |vpiFullName:work@top.product_exponent + |vpiDefName:product_exponent + |vpiActual: + \_logic_var: (work@top.product_exponent), line:3:14, endln:3:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:5:29, endln:5:30 |vpiParent: - \_part_select: , line:5:12, endln:5:33 + \_part_select: product_exponent (product_exponent), line:5:12, endln:5:33 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -280,7 +276,7 @@ design: (work@top) |vpiRightRange: \_constant: , line:5:31, endln:5:32 |vpiParent: - \_part_select: , line:5:12, endln:5:33 + \_part_select: product_exponent (product_exponent), line:5:12, endln:5:33 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -307,4 +303,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/UnsizeConstExpr/dut.sv | ${SURELOG_DIR}/build/regression/UnsizeConstExpr/roundtrip/dut_000.sv | 1 | 7 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/UnsizeConstExpr/dut.sv | ${SURELOG_DIR}/build/regression/UnsizeConstExpr/roundtrip/dut_000.sv | 2 | 7 | \ No newline at end of file diff --git a/tests/UnsizedConstInst/UnsizedConstInst.log b/tests/UnsizedConstInst/UnsizedConstInst.log index ba0c918568..e781054959 100644 --- a/tests/UnsizedConstInst/UnsizedConstInst.log +++ b/tests/UnsizedConstInst/UnsizedConstInst.log @@ -180,7 +180,7 @@ parameter 3 part_select 3 range 2 ref_module 2 -ref_obj 9 +ref_obj 6 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -201,7 +201,7 @@ parameter 3 part_select 5 range 2 ref_module 2 -ref_obj 15 +ref_obj 10 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/UnsizedConstInst/slpp_all/surelog.uhdm ... @@ -261,18 +261,19 @@ design: (work@top) \_cont_assign: , line:5:10, endln:5:41 |vpiOpType:14 |vpiOperand: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (work@bottom.product_exponent), line:5:14, endln:5:35 |vpiParent: - \_ref_obj: product_exponent (work@bottom.product_exponent), line:5:14, endln:5:30 - |vpiParent: - \_operation: , line:5:14, endln:5:41 - |vpiName:product_exponent - |vpiFullName:work@bottom.product_exponent - |vpiDefName:product_exponent + \_operation: , line:5:14, endln:5:41 + |vpiName:product_exponent + |vpiFullName:work@bottom.product_exponent + |vpiDefName:product_exponent |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (P), line:5:31, endln:5:32 + \_ref_obj: (work@bottom.product_exponent.P), line:5:31, endln:5:32 + |vpiParent: + \_part_select: product_exponent (work@bottom.product_exponent), line:5:14, endln:5:35 |vpiName:P + |vpiFullName:work@bottom.product_exponent.P |vpiRightRange: \_constant: , line:5:33, endln:5:34 |vpiDecompile:0 @@ -411,21 +412,19 @@ design: (work@top) \_cont_assign: , line:5:10, endln:5:41 |vpiOpType:14 |vpiOperand: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (work@top.u1.product_exponent), line:5:14, endln:5:35 |vpiParent: - \_ref_obj: product_exponent (work@top.u1.product_exponent), line:5:14, endln:5:30 - |vpiParent: - \_operation: , line:5:14, endln:5:41 - |vpiName:product_exponent - |vpiFullName:work@top.u1.product_exponent - |vpiDefName:product_exponent - |vpiActual: - \_array_var: (work@top.u1.product_exponent), line:3:9, endln:3:31 + \_operation: , line:5:14, endln:5:41 + |vpiName:product_exponent + |vpiFullName:work@top.u1.product_exponent + |vpiDefName:product_exponent + |vpiActual: + \_array_var: (work@top.u1.product_exponent), line:3:9, endln:3:31 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@top.u1.product_exponent.P), line:5:31, endln:5:32 |vpiParent: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (work@top.u1.product_exponent), line:5:14, endln:5:35 |vpiName:P |vpiFullName:work@top.u1.product_exponent.P |vpiActual: @@ -433,7 +432,7 @@ design: (work@top) |vpiRightRange: \_constant: , line:5:33, endln:5:34 |vpiParent: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (product_exponent), line:5:14, endln:5:35 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -536,21 +535,19 @@ design: (work@top) \_cont_assign: , line:5:10, endln:5:41 |vpiOpType:14 |vpiOperand: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (work@top.u2.product_exponent), line:5:14, endln:5:35 |vpiParent: - \_ref_obj: product_exponent (work@top.u2.product_exponent), line:5:14, endln:5:30 - |vpiParent: - \_operation: , line:5:14, endln:5:41 - |vpiName:product_exponent - |vpiFullName:work@top.u2.product_exponent - |vpiDefName:product_exponent - |vpiActual: - \_array_var: (work@top.u2.product_exponent), line:3:9, endln:3:31 + \_operation: , line:5:14, endln:5:41 + |vpiName:product_exponent + |vpiFullName:work@top.u2.product_exponent + |vpiDefName:product_exponent + |vpiActual: + \_array_var: (work@top.u2.product_exponent), line:3:9, endln:3:31 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@top.u2.product_exponent.P), line:5:31, endln:5:32 |vpiParent: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (work@top.u2.product_exponent), line:5:14, endln:5:35 |vpiName:P |vpiFullName:work@top.u2.product_exponent.P |vpiActual: @@ -558,7 +555,7 @@ design: (work@top) |vpiRightRange: \_constant: , line:5:33, endln:5:34 |vpiParent: - \_part_select: , line:5:14, endln:5:35 + \_part_select: product_exponent (product_exponent), line:5:14, endln:5:35 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -585,4 +582,4 @@ design: (work@top) [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/tests/UnsizedConstInst/dut.sv | ${SURELOG_DIR}/build/regression/UnsizedConstInst/roundtrip/dut_000.sv | 3 | 12 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/tests/UnsizedConstInst/dut.sv | ${SURELOG_DIR}/build/regression/UnsizedConstInst/roundtrip/dut_000.sv | 4 | 12 | \ No newline at end of file diff --git a/tests/VarSelect/VarSelect.log b/tests/VarSelect/VarSelect.log index 4a3ae7a21e..e3c5e6db51 100644 --- a/tests/VarSelect/VarSelect.log +++ b/tests/VarSelect/VarSelect.log @@ -476,7 +476,7 @@ module_inst 4 operation 2 package 2 range 4 -ref_obj 6 +ref_obj 5 task 9 var_select 3 === UHDM Object Stats End === @@ -509,7 +509,7 @@ module_inst 4 operation 4 package 2 range 4 -ref_obj 12 +ref_obj 10 task 18 var_select 5 === UHDM Object Stats End === @@ -1060,8 +1060,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:9:22, endln:9:24 - |vpiParent: - \_assignment: , line:9:3, endln:9:24 |vpiDecompile:'0 |vpiSize:-1 |BIN:0 @@ -1069,17 +1067,13 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.test_net), line:9:3, endln:9:14 |vpiParent: - \_ref_obj: (work@top.test_net) - |vpiParent: - \_assignment: , line:9:3, endln:9:24 - |vpiName:test_net - |vpiFullName:work@top.test_net + \_assignment: , line:9:3, endln:9:24 |vpiName:test_net |vpiFullName:work@top.test_net |vpiIndex: \_ref_obj: (work@top.i), line:9:12, endln:9:13 |vpiParent: - \_begin: (work@top), line:8:30, endln:11:9 + \_bit_select: (work@top.test_net), line:9:3, endln:9:14 |vpiName:i |vpiFullName:work@top.i |vpiActual: @@ -1092,8 +1086,6 @@ design: (work@top) |vpiBlocking:1 |vpiRhs: \_constant: , line:10:20, endln:10:24 - |vpiParent: - \_assignment: , line:10:3, endln:10:24 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -1105,19 +1097,19 @@ design: (work@top) |vpiName:test_net |vpiFullName:work@top.test_net |vpiIndex: - \_ref_obj: (work@top.i), line:10:12, endln:10:13 + \_ref_obj: (work@top.test_net.i), line:10:12, endln:10:13 |vpiParent: - \_begin: (work@top), line:8:30, endln:11:9 + \_var_select: (work@top.test_net), line:10:3, endln:10:17 |vpiName:i - |vpiFullName:work@top.i + |vpiFullName:work@top.test_net.i |vpiActual: \_int_var: (work@top.i), line:8:14, endln:8:15 |vpiIndex: - \_ref_obj: (work@top.i), line:10:15, endln:10:16 + \_ref_obj: (work@top.test_net.i), line:10:15, endln:10:16 |vpiParent: - \_begin: (work@top), line:8:30, endln:11:9 + \_var_select: (work@top.test_net), line:10:3, endln:10:17 |vpiName:i - |vpiFullName:work@top.i + |vpiFullName:work@top.test_net.i |vpiActual: \_int_var: (work@top.i), line:8:14, endln:8:15 |vpiContAssign: @@ -1320,25 +1312,19 @@ design: (work@top) |vpiLhs: \_bit_select: (work@top.test_net), line:9:3, endln:9:14 |vpiParent: - \_ref_obj: (work@top.test_net) - |vpiParent: - \_assignment: , line:9:3, endln:9:24 - |vpiName:test_net - |vpiFullName:work@top.test_net - |vpiActual: - \_logic_var: (work@top.test_net), line:6:22, endln:6:30 + \_assignment: , line:9:3, endln:9:24 |vpiName:test_net |vpiFullName:work@top.test_net + |vpiActual: + \_logic_var: (work@top.test_net), line:6:22, endln:6:30 |vpiIndex: - \_ref_obj: (work@top.test_net.i), line:9:12, endln:9:13 + \_ref_obj: (work@top.i), line:9:12, endln:9:13 |vpiParent: \_bit_select: (work@top.test_net), line:9:3, endln:9:14 |vpiName:i - |vpiFullName:work@top.test_net.i + |vpiFullName:work@top.i |vpiActual: \_int_var: (work@top.i), line:8:14, endln:8:15 - |vpiActual: - \_logic_var: (work@top.test_net), line:6:22, endln:6:30 |vpiStmt: \_assignment: , line:10:3, endln:10:24 |vpiParent: @@ -1353,6 +1339,8 @@ design: (work@top) \_assignment: , line:10:3, endln:10:24 |vpiName:test_net |vpiFullName:work@top.test_net + |vpiActual: + \_logic_var: (work@top.test_net), line:6:22, endln:6:30 |vpiIndex: \_ref_obj: (work@top.test_net.i), line:10:12, endln:10:13 |vpiParent: diff --git a/tests/VarSelectGenStmt/VarSelectGenStmt.log b/tests/VarSelectGenStmt/VarSelectGenStmt.log index 7ab281b1f5..f43f5a5dfa 100644 --- a/tests/VarSelectGenStmt/VarSelectGenStmt.log +++ b/tests/VarSelectGenStmt/VarSelectGenStmt.log @@ -758,11 +758,13 @@ design: (work@aes_sub_bytes) |vpiName:data_i |vpiDirection:1 |vpiHighConn: - \_var_select: (work@aes_sub_bytes.gen_sbox_j[0].gen_sbox_i[0].aes_sbox_ij.data_i.data_i), line:18:19, endln:18:31 + \_var_select: (work@aes_sub_bytes.data_i), line:18:19, endln:18:31 |vpiParent: \_port: (data_i), line:3:32, endln:3:38 |vpiName:data_i - |vpiFullName:work@aes_sub_bytes.gen_sbox_j[0].gen_sbox_i[0].aes_sbox_ij.data_i.data_i + |vpiFullName:work@aes_sub_bytes.data_i + |vpiActual: + \_logic_net: (work@aes_sub_bytes.data_i), line:10:32, endln:10:38 |vpiIndex: \_constant: , line:18:26, endln:18:27 |vpiParent: @@ -951,11 +953,13 @@ design: (work@aes_sub_bytes) |vpiName:data_i |vpiDirection:1 |vpiHighConn: - \_var_select: (work@aes_sub_bytes.gen_sbox_j[0].gen_sbox_i[1].aes_sbox_ij.data_i.data_i), line:18:19, endln:18:31 + \_var_select: (work@aes_sub_bytes.data_i), line:18:19, endln:18:31 |vpiParent: \_port: (data_i), line:3:32, endln:3:38 |vpiName:data_i - |vpiFullName:work@aes_sub_bytes.gen_sbox_j[0].gen_sbox_i[1].aes_sbox_ij.data_i.data_i + |vpiFullName:work@aes_sub_bytes.data_i + |vpiActual: + \_logic_net: (work@aes_sub_bytes.data_i), line:10:32, endln:10:38 |vpiIndex: \_constant: , line:18:26, endln:18:27 |vpiParent: @@ -1165,11 +1169,13 @@ design: (work@aes_sub_bytes) |vpiName:data_i |vpiDirection:1 |vpiHighConn: - \_var_select: (work@aes_sub_bytes.gen_sbox_j[1].gen_sbox_i[0].aes_sbox_ij.data_i.data_i), line:18:19, endln:18:31 + \_var_select: (work@aes_sub_bytes.data_i), line:18:19, endln:18:31 |vpiParent: \_port: (data_i), line:3:32, endln:3:38 |vpiName:data_i - |vpiFullName:work@aes_sub_bytes.gen_sbox_j[1].gen_sbox_i[0].aes_sbox_ij.data_i.data_i + |vpiFullName:work@aes_sub_bytes.data_i + |vpiActual: + \_logic_net: (work@aes_sub_bytes.data_i), line:10:32, endln:10:38 |vpiIndex: \_constant: , line:18:26, endln:18:27 |vpiParent: @@ -1358,11 +1364,13 @@ design: (work@aes_sub_bytes) |vpiName:data_i |vpiDirection:1 |vpiHighConn: - \_var_select: (work@aes_sub_bytes.gen_sbox_j[1].gen_sbox_i[1].aes_sbox_ij.data_i.data_i), line:18:19, endln:18:31 + \_var_select: (work@aes_sub_bytes.data_i), line:18:19, endln:18:31 |vpiParent: \_port: (data_i), line:3:32, endln:3:38 |vpiName:data_i - |vpiFullName:work@aes_sub_bytes.gen_sbox_j[1].gen_sbox_i[1].aes_sbox_ij.data_i.data_i + |vpiFullName:work@aes_sub_bytes.data_i + |vpiActual: + \_logic_net: (work@aes_sub_bytes.data_i), line:10:32, endln:10:38 |vpiIndex: \_constant: , line:18:26, endln:18:27 |vpiParent: diff --git a/tests/VoidFuncReturn/VoidFuncReturn.log b/tests/VoidFuncReturn/VoidFuncReturn.log index 8558b3ad5c..3c795a7623 100644 --- a/tests/VoidFuncReturn/VoidFuncReturn.log +++ b/tests/VoidFuncReturn/VoidFuncReturn.log @@ -247,7 +247,7 @@ design: (work@top) |vpiOperand: \_ref_obj: (work@top.add.a), line:5:8, endln:5:9 |vpiParent: - \_begin: (work@top.add) + \_operation: , line:5:8, endln:5:13 |vpiName:a |vpiFullName:work@top.add.a |vpiActual: diff --git a/tests/WireUnpacked/WireUnpacked.log b/tests/WireUnpacked/WireUnpacked.log index 601379dd6c..c6fcaa8fba 100644 --- a/tests/WireUnpacked/WireUnpacked.log +++ b/tests/WireUnpacked/WireUnpacked.log @@ -110,7 +110,6 @@ logic_net 2 logic_typespec 1 module_inst 4 range 3 -ref_obj 2 var_select 2 === UHDM Object Stats End === [INF:UH0707] Elaborating UHDM... @@ -125,7 +124,6 @@ logic_net 2 logic_typespec 1 module_inst 4 range 3 -ref_obj 3 var_select 3 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/WireUnpacked/slpp_all/surelog.uhdm ... @@ -180,9 +178,12 @@ design: (work@dut) |UINT:0 |vpiConstType:9 |vpiIndex: - \_indexed_part_select: , line:3:20, endln:3:24 + \_indexed_part_select: read_buf (work@dut.read_buf.read_buf), line:3:20, endln:3:24 |vpiParent: \_var_select: (work@dut.read_buf), line:3:8, endln:3:25 + |vpiName:read_buf + |vpiFullName:work@dut.read_buf.read_buf + |vpiDefName:read_buf |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: @@ -266,6 +267,8 @@ design: (work@dut) \_cont_assign: , line:3:8, endln:3:32 |vpiName:read_buf |vpiFullName:work@dut.read_buf + |vpiActual: + \_array_net: (work@dut.read_buf), line:2:12, endln:2:20 |vpiIndex: \_constant: , line:3:17, endln:3:18 |vpiParent: @@ -275,21 +278,20 @@ design: (work@dut) |UINT:0 |vpiConstType:9 |vpiIndex: - \_indexed_part_select: , line:3:20, endln:3:24 + \_indexed_part_select: read_buf (work@dut.read_buf.read_buf), line:3:20, endln:3:24 |vpiParent: - \_ref_obj: (work@dut.read_buf.read_buf) - |vpiParent: - \_var_select: (work@dut.read_buf), line:3:8, endln:3:25 - |vpiName:read_buf - |vpiFullName:work@dut.read_buf.read_buf - |vpiActual: - \_array_net: (work@dut.read_buf), line:2:12, endln:2:20 + \_var_select: (work@dut.read_buf), line:3:8, endln:3:25 + |vpiName:read_buf + |vpiFullName:work@dut.read_buf.read_buf + |vpiDefName:read_buf + |vpiActual: + \_array_net: (work@dut.read_buf), line:2:12, endln:2:20 |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: \_constant: , line:3:20, endln:3:21 |vpiParent: - \_indexed_part_select: , line:3:20, endln:3:24 + \_indexed_part_select: read_buf (read_buf.read_buf), line:3:20, endln:3:24 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -297,7 +299,7 @@ design: (work@dut) |vpiWidthExpr: \_constant: , line:3:23, endln:3:24 |vpiParent: - \_indexed_part_select: , line:3:20, endln:3:24 + \_indexed_part_select: read_buf (read_buf.read_buf), line:3:20, endln:3:24 |vpiDecompile:2 |vpiSize:64 |UINT:2 diff --git a/third_party/UHDM b/third_party/UHDM index 95859775aa..7edd262458 160000 --- a/third_party/UHDM +++ b/third_party/UHDM @@ -1 +1 @@ -Subproject commit 95859775aa95f61ee99080c6b262b80a45d3a8e8 +Subproject commit 7edd262458ddf0638882f1cb9fb6bd3196cd46fa diff --git a/third_party/tests/AVLMM/AVLMM.log b/third_party/tests/AVLMM/AVLMM.log index 5e0ceee7b0..93bf190822 100644 --- a/third_party/tests/AVLMM/AVLMM.log +++ b/third_party/tests/AVLMM/AVLMM.log @@ -102,7 +102,7 @@ parameter 24 port 4 range 41 ref_module 2 -ref_obj 617 +ref_obj 576 ref_var 6 repeat 1 return_stmt 11 diff --git a/third_party/tests/AmiqEth/AmiqEth.log b/third_party/tests/AmiqEth/AmiqEth.log index a021847303..ee2a101dc2 100644 --- a/third_party/tests/AmiqEth/AmiqEth.log +++ b/third_party/tests/AmiqEth/AmiqEth.log @@ -1628,8 +1628,8 @@ case_stmt 393 chandle_typespec 18 chandle_var 2 class_defn 1256 -class_typespec 42165 -class_var 30815 +class_typespec 42186 +class_var 30836 constant 418506 constraint 19 continue_stmt 161 @@ -1664,7 +1664,7 @@ int_var 6809 integer_typespec 190 integer_var 107 io_decl 22344 -logic_net 987 +logic_net 992 logic_typespec 439 logic_var 129 long_int_typespec 256 @@ -1683,7 +1683,7 @@ part_select 181 range 140794 real_typespec 71 real_var 11 -ref_obj 182521 +ref_obj 173229 ref_var 6599 repeat 94 return_stmt 11549 diff --git a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log index 9ebce0fe5d..5177a3f79c 100644 --- a/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log +++ b/third_party/tests/AmiqSimpleTestSuite/AmiqSimpleTestSuite.log @@ -887,8 +887,8 @@ case_stmt 211 chandle_typespec 14 chandle_var 2 class_defn 645 -class_typespec 16736 -class_var 8807 +class_typespec 16749 +class_var 8820 constant 84877 constraint 13 continue_stmt 124 @@ -926,7 +926,7 @@ int_var 2761 interface_inst 14 interface_typespec 3 io_decl 13178 -logic_net 734 +logic_net 736 logic_typespec 229 logic_var 92 long_int_typespec 179 @@ -948,7 +948,7 @@ range 13791 real_typespec 41 real_var 8 ref_module 5 -ref_obj 110062 +ref_obj 104262 ref_var 4662 repeat 76 return_stmt 6983 diff --git a/third_party/tests/ApbSlave/ApbSlave.log b/third_party/tests/ApbSlave/ApbSlave.log index 3f50c36b4c..a429492e4e 100644 --- a/third_party/tests/ApbSlave/ApbSlave.log +++ b/third_party/tests/ApbSlave/ApbSlave.log @@ -120,7 +120,7 @@ parameter 4 port 17 range 44 ref_module 1 -ref_obj 400 +ref_obj 398 ref_var 4 repeat 1 return_stmt 12 diff --git a/third_party/tests/AzadiRTL/AzadiRTL.log b/third_party/tests/AzadiRTL/AzadiRTL.log index 02563d3480..5692171b82 100644 --- a/third_party/tests/AzadiRTL/AzadiRTL.log +++ b/third_party/tests/AzadiRTL/AzadiRTL.log @@ -23952,7 +23952,7 @@ port 13121 property_spec 31 range 88252 ref_module 476 -ref_obj 73747 +ref_obj 62230 ref_var 67 return_stmt 118 string_typespec 18806 diff --git a/third_party/tests/BuildOVMPkg/BuildOVMPkg.log b/third_party/tests/BuildOVMPkg/BuildOVMPkg.log index 9f133789a3..54ab1a1857 100644 --- a/third_party/tests/BuildOVMPkg/BuildOVMPkg.log +++ b/third_party/tests/BuildOVMPkg/BuildOVMPkg.log @@ -878,7 +878,7 @@ part_select 8 range 420 real_typespec 18 real_var 3 -ref_obj 18217 +ref_obj 17333 ref_var 359 repeat 2 return_stmt 1573 @@ -912,10 +912,10 @@ while_stmt 61 [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_factory_000.sv | 217 | 1058 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_factory_000.svh | 225 | 753 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_globals_000.svh | 84 | 408 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_misc_000.sv | 86 | 517 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_misc_000.sv | 87 | 517 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_object_000.sv | 298 | 1320 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_object_globals_000.svh | 89 | 388 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_packer_000.sv | 92 | 491 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_packer_000.sv | 98 | 491 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_packer_000.svh | 11 | 42 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_port_base_000.svh | 7 | 22 | [roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/BuildOVMPkg/roundtrip/ovm_printer_000.sv | 184 | 1086 | diff --git a/third_party/tests/BuildUVMPkg/BuildUVMPkg.log b/third_party/tests/BuildUVMPkg/BuildUVMPkg.log index 5ec4aea635..e0ec3d84aa 100644 --- a/third_party/tests/BuildUVMPkg/BuildUVMPkg.log +++ b/third_party/tests/BuildUVMPkg/BuildUVMPkg.log @@ -701,8 +701,8 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8459 -class_var 3301 +class_typespec 8460 +class_var 3302 constant 26458 constraint 4 continue_stmt 52 @@ -748,7 +748,7 @@ part_select 43 range 1979 real_typespec 33 real_var 8 -ref_obj 43866 +ref_obj 41671 ref_var 1788 repeat 26 return_stmt 3272 diff --git a/third_party/tests/CoresSweRV/CoresSweRV.log b/third_party/tests/CoresSweRV/CoresSweRV.log index dafa5102c0..997f90feaa 100644 --- a/third_party/tests/CoresSweRV/CoresSweRV.log +++ b/third_party/tests/CoresSweRV/CoresSweRV.log @@ -4823,8 +4823,8 @@ case_stmt 122 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8459 -class_var 3301 +class_typespec 8460 +class_var 3302 constant 213559 constraint 4 cont_assign 7074 @@ -4864,7 +4864,7 @@ integer_typespec 25 integer_var 3 io_decl 6982 logic_net 29268 -logic_typespec 50506 +logic_typespec 50507 logic_var 4307 long_int_typespec 99 long_int_var 7 @@ -4879,13 +4879,13 @@ packed_array_typespec 28 packed_array_var 10 param_assign 5466 parameter 6806 -part_select 15590 +part_select 15589 port 35086 -range 32897 +range 32898 real_typespec 33 real_var 8 ref_module 2139 -ref_obj 173008 +ref_obj 137172 ref_var 1830 repeat 26 return_stmt 3379 @@ -4930,8 +4930,8 @@ case_stmt 298 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 9907 -class_var 21106 +class_typespec 9909 +class_var 21164 constant 213678 constraint 10 cont_assign 7123 @@ -4951,7 +4951,7 @@ for_stmt 2317 foreach_stmt 5307 forever_stmt 34 fork_stmt 88 -func_call 31522 +func_call 31520 function 29579 gen_for 40 gen_if 1 @@ -4971,12 +4971,12 @@ integer_typespec 25 integer_var 3 io_decl 55673 logic_net 29268 -logic_typespec 50506 -logic_var 4414 +logic_typespec 50507 +logic_var 4432 long_int_typespec 99 long_int_var 139 -method_func_call 45468 -method_task_call 3554 +method_func_call 45424 +method_task_call 3598 module_inst 7783 named_begin 81 named_event 50 @@ -4987,25 +4987,25 @@ packed_array_typespec 28 packed_array_var 10 param_assign 5479 parameter 6806 -part_select 15854 +part_select 15853 port 35389 -range 34689 +range 34690 real_typespec 33 real_var 10 ref_module 2139 -ref_obj 426073 -ref_var 8940 +ref_obj 384149 +ref_var 8944 repeat 207 return_stmt 19618 string_typespec 3206 -string_var 4926 +string_var 4930 struct_net 199 struct_typespec 66 -struct_var 172 +struct_var 178 sys_func_call 10529 tagged_pattern 3 task 4747 -task_call 293 +task_call 294 time_typespec 107 time_var 203 type_parameter 273 diff --git a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log index 92bcbfc3e5..0bc79f2711 100644 --- a/third_party/tests/CoresSweRVMP/CoresSweRVMP.log +++ b/third_party/tests/CoresSweRVMP/CoresSweRVMP.log @@ -2,7 +2,7 @@ [WRN:CM0010] Command line argument "-Wno-UNOPTFLAT" ignored. -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 16 +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 2 -- Configuring done (0.0s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser @@ -114,26 +114,12 @@ PP CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/axi4_to_ahb.sv". -Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 16 --- Configuring done (0.1s) +Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 2 +-- Configuring done (0.0s) -- Generating done (0.0s) -- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess -[ 6%] Generating 11_ifu_bp_ctl.sv -[ 12%] Generating 10_lsu_bus_intf.sv -[ 18%] Generating 12_beh_lib.sv -[ 25%] Generating 13_ifu_mem_ctl.sv -[ 31%] Generating 14_mem_lib.sv -[ 37%] Generating 15_exu.sv -[ 43%] Generating 16_dec_decode_ctl.sv -[ 50%] Generating 1_lsu_stbuf.sv -[ 56%] Generating 2_ahb_to_axi4.sv -[ 62%] Generating 3_rvjtag_tap.sv -[ 68%] Generating 4_dec_tlu_ctl.sv -[ 75%] Generating 5_lsu_bus_buffer.sv -[ 81%] Generating 6_dbg.sv -[ 87%] Generating 7_axi4_to_ahb.sv -[ 93%] Generating 8_ifu_aln_ctl.sv -[100%] Generating 9_tb_top.sv +[ 50%] Generating 1_axi4_to_ahb.sv +[100%] Generating 2_mem_lib.sv [100%] Built target Parse Surelog parsing status: 0 [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv". @@ -4898,8 +4884,8 @@ case_stmt 122 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8459 -class_var 3301 +class_typespec 8460 +class_var 3302 constant 213559 constraint 4 cont_assign 7074 @@ -4939,7 +4925,7 @@ integer_typespec 25 integer_var 3 io_decl 6982 logic_net 29268 -logic_typespec 50506 +logic_typespec 50507 logic_var 4307 long_int_typespec 99 long_int_var 7 @@ -4954,13 +4940,13 @@ packed_array_typespec 28 packed_array_var 10 param_assign 5466 parameter 6806 -part_select 15590 +part_select 15589 port 35086 -range 32897 +range 32898 real_typespec 33 real_var 8 ref_module 2139 -ref_obj 173008 +ref_obj 137172 ref_var 1830 repeat 26 return_stmt 3379 @@ -5005,8 +4991,8 @@ case_stmt 298 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 9907 -class_var 21106 +class_typespec 9909 +class_var 21164 constant 213678 constraint 10 cont_assign 7123 @@ -5026,7 +5012,7 @@ for_stmt 2317 foreach_stmt 5307 forever_stmt 34 fork_stmt 88 -func_call 31522 +func_call 31520 function 29579 gen_for 40 gen_if 1 @@ -5046,12 +5032,12 @@ integer_typespec 25 integer_var 3 io_decl 55673 logic_net 29268 -logic_typespec 50506 -logic_var 4414 +logic_typespec 50507 +logic_var 4432 long_int_typespec 99 long_int_var 139 -method_func_call 45468 -method_task_call 3554 +method_func_call 45424 +method_task_call 3598 module_inst 7783 named_begin 81 named_event 50 @@ -5062,25 +5048,25 @@ packed_array_typespec 28 packed_array_var 10 param_assign 5479 parameter 6806 -part_select 15854 +part_select 15853 port 35389 -range 34689 +range 34690 real_typespec 33 real_var 10 ref_module 2139 -ref_obj 426073 -ref_var 8940 +ref_obj 384149 +ref_var 8944 repeat 207 return_stmt 19618 string_typespec 3206 -string_var 4926 +string_var 4930 struct_net 199 struct_typespec 66 -struct_var 172 +struct_var 178 sys_func_call 10529 tagged_pattern 3 task 4747 -task_call 293 +task_call 294 time_typespec 107 time_var 203 type_parameter 273 diff --git a/third_party/tests/Driver/Driver.log b/third_party/tests/Driver/Driver.log index 29204e1a72..4f162f27e0 100644 --- a/third_party/tests/Driver/Driver.log +++ b/third_party/tests/Driver/Driver.log @@ -809,8 +809,8 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 628 -class_typespec 8627 -class_var 3444 +class_typespec 8628 +class_var 3445 clocking_block 1 clocking_io_decl 2 constant 29134 @@ -847,7 +847,7 @@ integer_var 5 interface_inst 3 interface_typespec 1 io_decl 6955 -logic_net 342 +logic_net 345 logic_typespec 87 logic_var 42 long_int_typespec 99 @@ -868,7 +868,7 @@ range 3066 real_typespec 33 real_var 8 ref_module 1 -ref_obj 44353 +ref_obj 42156 ref_var 1795 repeat 30 return_stmt 3301 diff --git a/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log b/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log index 5f4c6e4691..462328980b 100644 --- a/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log +++ b/third_party/tests/Earlgrey_0_1/sim-icarus/Earlgrey_0_1.log @@ -12487,7 +12487,7 @@ port 38152 property_spec 2 range 45806 ref_module 1917 -ref_obj 182397 +ref_obj 155139 ref_var 80 return_stmt 111 string_typespec 3809 diff --git a/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log b/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log index 87e854e2f9..ae9c9b85db 100644 --- a/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log +++ b/third_party/tests/Earlgrey_Verilator_01_05_21/sim-icarus/Earlgrey_Verilator_01_05_21.log @@ -28823,7 +28823,7 @@ integer_var 8 interface_inst 10 interface_typespec 1 io_decl 433 -logic_net 68730 +logic_net 68731 logic_typespec 216315 logic_var 28072 method_func_call 1 @@ -28840,7 +28840,7 @@ part_select 5297 port 91788 range 162120 ref_module 5040 -ref_obj 394188 +ref_obj 340346 ref_var 174 return_stmt 429 string_typespec 36709 diff --git a/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log b/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log index e50fb68f85..7e533ef918 100644 --- a/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log +++ b/third_party/tests/Earlgrey_Verilator_0_1/sim-verilator/Earlgrey_Verilator_0_1.log @@ -11654,7 +11654,7 @@ integer_typespec 435 integer_var 1 interface_inst 1 io_decl 357 -logic_net 26840 +logic_net 26841 logic_typespec 62369 logic_var 12425 module_inst 5813 @@ -11670,7 +11670,7 @@ part_select 3296 port 37447 range 46887 ref_module 1821 -ref_obj 181333 +ref_obj 154700 ref_var 82 return_stmt 369 string_typespec 3865 diff --git a/third_party/tests/Ibex/Ibex.log b/third_party/tests/Ibex/Ibex.log index 7cb83e6594..eb4aee17d4 100644 --- a/third_party/tests/Ibex/Ibex.log +++ b/third_party/tests/Ibex/Ibex.log @@ -1578,8 +1578,8 @@ case_stmt 591 chandle_typespec 30 chandle_var 2 class_defn 707 -class_typespec 35590 -class_var 22849 +class_typespec 35627 +class_var 22886 clocking_block 10 clocking_io_decl 66 constant 274528 @@ -1624,7 +1624,7 @@ integer_typespec 46 interface_inst 24 interface_typespec 15 io_decl 25099 -logic_net 3468 +logic_net 3471 logic_typespec 5410 logic_var 1094 long_int_typespec 339 @@ -1646,7 +1646,7 @@ range 62559 real_typespec 58 real_var 9 ref_module 55 -ref_obj 254261 +ref_obj 238445 ref_var 9779 repeat 164 return_stmt 14242 diff --git a/third_party/tests/IbexGoogle/IbexGoogle.log b/third_party/tests/IbexGoogle/IbexGoogle.log index a72b278bf1..f48d908146 100644 --- a/third_party/tests/IbexGoogle/IbexGoogle.log +++ b/third_party/tests/IbexGoogle/IbexGoogle.log @@ -947,8 +947,8 @@ case_stmt 237 chandle_typespec 14 chandle_var 2 class_defn 706 -class_typespec 17564 -class_var 9350 +class_typespec 17577 +class_var 9363 constant 95277 constraint 40 continue_stmt 133 @@ -979,7 +979,7 @@ initial 1 int_typespec 8214 int_var 2868 io_decl 13340 -logic_net 409 +logic_net 412 logic_typespec 202 logic_var 71 long_int_typespec 179 @@ -998,7 +998,7 @@ part_select 189 range 16623 real_typespec 41 real_var 8 -ref_obj 117891 +ref_obj 111577 ref_var 4638 repeat 73 return_stmt 7108 diff --git a/third_party/tests/IncompTitan/IncompTitan.log b/third_party/tests/IncompTitan/IncompTitan.log index df0f15a18e..55e735ba61 100644 --- a/third_party/tests/IncompTitan/IncompTitan.log +++ b/third_party/tests/IncompTitan/IncompTitan.log @@ -10688,7 +10688,7 @@ int_var 309 integer_typespec 226 integer_var 8 io_decl 273 -logic_net 35501 +logic_net 35502 logic_typespec 93326 logic_var 12330 module_inst 10376 @@ -10706,7 +10706,7 @@ property_inst 4 property_spec 478 range 73197 ref_module 2376 -ref_obj 190323 +ref_obj 166026 ref_var 74 return_stmt 137 string_typespec 10655 diff --git a/third_party/tests/MiniAmiq/MiniAmiq.log b/third_party/tests/MiniAmiq/MiniAmiq.log index 6dca11d139..0a471a9253 100644 --- a/third_party/tests/MiniAmiq/MiniAmiq.log +++ b/third_party/tests/MiniAmiq/MiniAmiq.log @@ -817,8 +817,8 @@ case_stmt 147 chandle_typespec 10 chandle_var 2 class_defn 637 -class_typespec 12807 -class_var 5994 +class_typespec 12814 +class_var 6001 constant 52760 constraint 8 continue_stmt 88 @@ -871,7 +871,7 @@ part_select 83 range 6589 real_typespec 37 real_var 8 -ref_obj 77402 +ref_obj 73318 ref_var 3339 repeat 48 return_stmt 5223 diff --git a/third_party/tests/Monitor/Monitor.log b/third_party/tests/Monitor/Monitor.log index 3f07c67830..76d7dfc832 100644 --- a/third_party/tests/Monitor/Monitor.log +++ b/third_party/tests/Monitor/Monitor.log @@ -877,8 +877,8 @@ case_stmt 147 chandle_typespec 10 chandle_var 2 class_defn 648 -class_typespec 12922 -class_var 6113 +class_typespec 12929 +class_var 6120 clocking_block 1 clocking_io_decl 2 constant 55536 @@ -917,7 +917,7 @@ integer_var 5 interface_inst 4 interface_typespec 2 io_decl 10201 -logic_net 424 +logic_net 427 logic_typespec 149 logic_var 61 long_int_typespec 139 @@ -938,7 +938,7 @@ range 7718 real_typespec 37 real_var 8 ref_module 1 -ref_obj 77706 +ref_obj 73622 ref_var 3345 repeat 50 return_stmt 5240 diff --git a/third_party/tests/NyuziProcessor/NyuziProcessor.log b/third_party/tests/NyuziProcessor/NyuziProcessor.log index cbe6c36a2c..43cfdcac8a 100644 --- a/third_party/tests/NyuziProcessor/NyuziProcessor.log +++ b/third_party/tests/NyuziProcessor/NyuziProcessor.log @@ -22,125 +22,125 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". + +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv". @@ -159,125 +159,125 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/ [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". - -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv". [INF:CM0029] Using global timescale: "10ps/10ps". @@ -536,127 +536,121 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/ ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv:22:1: previous definition. - -[ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage3.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage2.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv:22:1: previous definition. - -[ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv:22:1: previous definition. @@ -664,14 +658,20 @@ PARSER CACHE USED FOR: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/ [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv:22:1: previous definition. +[ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. + [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv:22:1: previous definition. [ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", - ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv:22:1: previous definition. + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv:22:1: previous definition. + +[ERR:CP0329] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv:22:1: Multiply defined package: "defines", + ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:22:1: previous definition. [NTE:CP0309] ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv:37:29: Implicit port type (wire) for "read_data". @@ -1763,7 +1763,7 @@ interface_array 4 interface_inst 48 interface_typespec 118 io_decl 831 -logic_net 3873 +logic_net 3876 logic_typespec 19346 logic_var 2684 modport 77 @@ -1780,7 +1780,7 @@ part_select 435 port 3931 range 17163 ref_module 187 -ref_obj 37169 +ref_obj 30677 string_typespec 83 string_var 1 struct_net 81 @@ -1842,7 +1842,7 @@ interface_array 4 interface_inst 48 interface_typespec 118 io_decl 845 -logic_net 3873 +logic_net 3876 logic_typespec 19346 logic_var 6026 modport 77 @@ -1859,7 +1859,7 @@ part_select 1179 port 7513 range 18225 ref_module 187 -ref_obj 105951 +ref_obj 87585 string_typespec 83 string_var 1 struct_net 81 @@ -1883,11 +1883,11 @@ var_select 961 [ NOTE] : 12 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/cache_lru_000.sv | 81 | 236 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cache_lru.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/cache_lru_000.sv | 89 | 236 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/cam.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/cam_000.sv | 43 | 107 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/control_registers_000.sv | 140 | 312 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/control_registers.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/control_registers_000.sv | 148 | 312 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/core.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/core_000.sv | 357 | 425 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/dcache_data_stage_000.sv | 231 | 621 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_data_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/dcache_data_stage_000.sv | 234 | 621 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/dcache_tag_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/dcache_tag_stage_000.sv | 173 | 314 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/defines.svh | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/defines_000.svh | 162 | 480 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage1.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/fp_execute_stage1_000.sv | 196 | 302 | @@ -1896,58 +1896,58 @@ var_select 961 [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage4.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/fp_execute_stage4_000.sv | 111 | 169 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/fp_execute_stage5.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/fp_execute_stage5_000.sv | 155 | 223 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/idx_to_oh.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/idx_to_oh_000.sv | 14 | 39 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/ifetch_data_stage_000.sv | 112 | 257 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_data_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/ifetch_data_stage_000.sv | 113 | 257 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/ifetch_tag_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/ifetch_tag_stage_000.sv | 192 | 333 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/instruction_decode_stage_000.sv | 143 | 462 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/instruction_decode_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/instruction_decode_stage_000.sv | 152 | 462 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/int_execute_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/int_execute_stage_000.sv | 209 | 352 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/io_interconnect_000.sv | 61 | 120 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_interconnect.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/io_interconnect_000.sv | 62 | 120 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/io_request_queue.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/io_request_queue_000.sv | 100 | 164 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/jtag_tap_controller_000.sv | 37 | 215 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/jtag_tap_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/jtag_tap_controller_000.sv | 38 | 215 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_l2_interface.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l1_l2_interface_000.sv | 214 | 459 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_load_miss_queue.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l1_load_miss_queue_000.sv | 101 | 163 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l1_store_queue.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l1_store_queue_000.sv | 226 | 363 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_axi_bus_interface.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_axi_bus_interface_000.sv | 151 | 374 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_000.sv | 70 | 121 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_arb_stage_000.sv | 54 | 137 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_arb_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_arb_stage_000.sv | 55 | 137 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_pending_miss_cam.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_pending_miss_cam_000.sv | 45 | 90 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_read_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_read_stage_000.sv | 130 | 299 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_tag_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_tag_stage_000.sv | 103 | 153 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/l2_cache_update_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/l2_cache_update_stage_000.sv | 55 | 146 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/nyuzi.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/nyuzi_000.sv | 91 | 140 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/oh_to_idx_000.sv | 14 | 46 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/oh_to_idx.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/oh_to_idx_000.sv | 15 | 46 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/on_chip_debugger.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/on_chip_debugger_000.sv | 50 | 189 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/operand_fetch_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/operand_fetch_stage_000.sv | 85 | 140 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/performance_counters.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/performance_counters_000.sv | 18 | 50 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/reciprocal_rom.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/reciprocal_rom_000.sv | 9 | 95 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/rr_arbiter_000.sv | 18 | 76 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/rr_arbiter.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/rr_arbiter_000.sv | 20 | 76 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/scoreboard.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/scoreboard_000.sv | 37 | 177 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_1r1w.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sram_1r1w_000.sv | 125 | 210 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sram_2r1w.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sram_2r1w_000.sv | 192 | 299 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/sync_fifo.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sync_fifo_000.sv | 60 | 143 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/synchronizer.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/synchronizer_000.sv | 20 | 49 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/thread_select_stage_000.sv | 156 | 300 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/tlb_000.sv | 124 | 243 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/writeback_stage_000.sv | 178 | 548 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/thread_select_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/thread_select_stage_000.sv | 157 | 300 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/tlb.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/tlb_000.sv | 127 | 243 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/core/writeback_stage.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/writeback_stage_000.sv | 189 | 548 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/async_fifo.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/async_fifo_000.sv | 65 | 141 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_async_bridge.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_async_bridge_000.sv | 95 | 138 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_interconnect_000.sv | 85 | 247 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_rom_000.sv | 27 | 87 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_interconnect.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_interconnect_000.sv | 86 | 247 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_rom.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_rom_000.sv | 28 | 87 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/axi_sram.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_sram_000.sv | 50 | 201 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/gpio_controller_000.sv | 43 | 82 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/gpio_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/gpio_controller_000.sv | 45 | 82 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/logic_analyzer.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/logic_analyzer_000.sv | 42 | 168 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/ps2_controller_000.sv | 45 | 140 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/ps2_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/ps2_controller_000.sv | 46 | 140 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/sdram_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sdram_controller_000.sv | 153 | 532 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/spi_controller_000.sv | 30 | 123 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/spi_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/spi_controller_000.sv | 32 | 123 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/timer.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/timer_000.sv | 16 | 57 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_000.sv | 53 | 128 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_receive_000.sv | 33 | 132 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_transmit_000.sv | 22 | 75 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_000.sv | 54 | 128 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_receive.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_receive_000.sv | 35 | 132 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/uart_transmit.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/uart_transmit_000.sv | 23 | 75 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_controller.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/vga_controller_000.sv | 75 | 228 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/fpga/common/vga_sequencer.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/vga_sequencer_000.sv | 45 | 136 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/axi_protocol_checker.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/axi_protocol_checker_000.sv | 25 | 209 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_jtag.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_jtag_000.sv | 54 | 432 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_ps2.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_ps2_000.sv | 16 | 72 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdmmc.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_sdmmc_000.sv | 56 | 424 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_sdram_000.sv | 103 | 287 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/soc_tb_000.sv | 313 | 546 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdmmc.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_sdmmc_000.sv | 58 | 424 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/sim_sdram.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/sim_sdram_000.sv | 108 | 287 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/soc_tb.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/soc_tb_000.sv | 315 | 546 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/NyuziProcessor/hardware/testbench/trace_logger.sv | ${SURELOG_DIR}/build/regression/NyuziProcessor/roundtrip/trace_logger_000.sv | 74 | 244 | \ No newline at end of file diff --git a/third_party/tests/OVMSwitch/OVMSwitch.log b/third_party/tests/OVMSwitch/OVMSwitch.log index 232881f8a3..16df38a6a4 100644 --- a/third_party/tests/OVMSwitch/OVMSwitch.log +++ b/third_party/tests/OVMSwitch/OVMSwitch.log @@ -773,7 +773,7 @@ integer_var 75 interface_inst 17 interface_typespec 6 io_decl 3594 -logic_net 481 +logic_net 487 logic_typespec 255 logic_var 35 method_func_call 3512 @@ -795,7 +795,7 @@ range 821 real_typespec 18 real_var 3 ref_module 3 -ref_obj 20052 +ref_obj 19049 ref_var 388 repeat 6 return_stmt 1617 @@ -822,50 +822,50 @@ while_stmt 62 [ NOTE] : 9 -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_component_000.sv | 356 | 1548 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_config_000.sv | 88 | 258 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_extern_report_server_000.svh | 37 | 166 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.sv | 217 | 1058 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.svh | 225 | 753 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_globals_000.svh | 86 | 408 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_misc_000.sv | 86 | 517 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_000.sv | 298 | 1320 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_globals_000.svh | 99 | 388 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.sv | 92 | 491 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.svh | 11 | 42 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_port_base_000.svh | 7 | 22 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.sv | 184 | 1086 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.svh | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_report_handler.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_report_handler_000.svh | 148 | 257 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_root_000.svh | 318 | 1352 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_transaction_000.sv | 70 | 333 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_version_000.svh | 7 | 30 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/avm_compatibility_000.svh | 169 | 284 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.sv | 342 | 1065 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.svh | 381 | 604 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_defines_000.svh | 76 | 109 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_meth_compatibility_000.svh | 14 | 50 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_scenario_controller_000.svh | 3 | 21 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_meth_defines_000.svh | 5 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequencer_base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_macros_000.svh | 15 | 35 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_000.sv | 6 | 28 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_object_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_defines_000.svh | 2268 | 3171 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_printer_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_defines_000.svh | 77 | 115 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_sequence_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequence_defines_000.svh | 141 | 314 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/tlm_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_defines_000.svh | 238 | 454 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_001.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/tlm/tlm_imps.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_imps_000.svh | 172 | 227 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Configuration.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Configuration_000.sv | 21 | 39 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Driver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Driver_000.sv | 63 | 126 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Environment.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Environment_000.sv | 30 | 62 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Packet.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Packet_000.sv | 43 | 91 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Receiver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Receiver_000.sv | 25 | 75 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Scoreboard.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Scoreboard_000.sv | 26 | 58 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequence.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequence_000.sv | 17 | 46 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequencer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequencer_000.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/interface.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/interface_000.sv | 36 | 87 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/rtl.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/rtl_000.sv | 25 | 38 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/test.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/test_000.sv | 15 | 41 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/top.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/top_000.sv | 46 | 130 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_component_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_config_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_extern_report_server_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_factory_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_misc_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_packer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_port_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_report_handler.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_report_handler_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_root_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_transaction_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_version_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/avm_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_message_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/urm_meth_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_scenario_controller_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_meth_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequencer_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_macros_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_object_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_object_defines_000.svh | 2268 | 3171 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_printer_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_printer_defines_000.svh | 77 | 115 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/ovm_sequence_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_sequence_defines_000.svh | 141 | 314 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/macros/tlm_defines.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_defines_000.svh | 238 | 454 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/ovm_pkg_001.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/tlm/tlm_imps.svh | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/tlm_imps_000.svh | 172 | 227 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Configuration.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Configuration_000.sv | 21 | 39 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Driver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Driver_000.sv | 63 | 126 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Environment.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Environment_000.sv | 30 | 62 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Packet.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Packet_000.sv | 43 | 91 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Receiver.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Receiver_000.sv | 25 | 75 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Scoreboard.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Scoreboard_000.sv | 26 | 58 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequence.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequence_000.sv | 17 | 46 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/Sequencer.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/Sequencer_000.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/interface.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/interface_000.sv | 36 | 87 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/rtl.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/rtl_000.sv | 25 | 38 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/test.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/test_000.sv | 15 | 41 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/OVMSwitch/top.sv | ${SURELOG_DIR}/build/regression/OVMSwitch/roundtrip/top_000.sv | 46 | 130 | \ No newline at end of file diff --git a/third_party/tests/Opentitan/Earlgrey.log b/third_party/tests/Opentitan/Earlgrey.log index 2692ea8d8b..46cb3050b1 100644 --- a/third_party/tests/Opentitan/Earlgrey.log +++ b/third_party/tests/Opentitan/Earlgrey.log @@ -39331,7 +39331,7 @@ port 29628 property_spec 2 range 33848 ref_module 1426 -ref_obj 128586 +ref_obj 112149 ref_var 51 return_stmt 46 string_typespec 2488 diff --git a/third_party/tests/Opentitan/Opentitan.log b/third_party/tests/Opentitan/Opentitan.log index ea5cc49f1a..bfd01562ee 100644 --- a/third_party/tests/Opentitan/Opentitan.log +++ b/third_party/tests/Opentitan/Opentitan.log @@ -8330,8 +8330,8 @@ case_stmt 215 chandle_typespec 6 chandle_var 2 class_defn 613 -class_typespec 8459 -class_var 3301 +class_typespec 8460 +class_var 3302 constant 243117 constraint 4 cont_assign 13810 @@ -8374,7 +8374,7 @@ integer_typespec 325 integer_var 2 interface_inst 5 io_decl 7058 -logic_net 20864 +logic_net 20865 logic_typespec 44467 logic_var 9369 long_int_typespec 99 @@ -8399,7 +8399,7 @@ range 35893 real_typespec 33 real_var 8 ref_module 1427 -ref_obj 175212 +ref_obj 156029 ref_var 1842 repeat 26 return_stmt 3321 diff --git a/third_party/tests/RiscV/RiscV.log b/third_party/tests/RiscV/RiscV.log index 6f73a24422..0a6a575dec 100644 --- a/third_party/tests/RiscV/RiscV.log +++ b/third_party/tests/RiscV/RiscV.log @@ -151,7 +151,7 @@ part_select 55 port 740 range 865 ref_module 15 -ref_obj 2564 +ref_obj 2413 ref_var 3 sys_func_call 22 task 9 diff --git a/third_party/tests/Rp32/rp32.log b/third_party/tests/Rp32/rp32.log index ffd6a97608..1f6d5b8d0f 100644 --- a/third_party/tests/Rp32/rp32.log +++ b/third_party/tests/Rp32/rp32.log @@ -451,7 +451,7 @@ part_select 80 port 438 range 1003 ref_module 25 -ref_obj 6125 +ref_obj 5887 return_stmt 2 string_typespec 752 struct_net 52 @@ -523,7 +523,7 @@ part_select 217 port 542 range 1007 ref_module 25 -ref_obj 20947 +ref_obj 20515 return_stmt 16 string_typespec 752 struct_net 52 diff --git a/third_party/tests/SVSwitch/SVSwitch.log b/third_party/tests/SVSwitch/SVSwitch.log index 48914570c5..d4bb1b9a79 100644 --- a/third_party/tests/SVSwitch/SVSwitch.log +++ b/third_party/tests/SVSwitch/SVSwitch.log @@ -401,7 +401,7 @@ port 85 program 2 range 166 ref_module 3 -ref_obj 1021 +ref_obj 916 ref_var 13 repeat 6 return_stmt 1 diff --git a/third_party/tests/Scoreboard/Scoreboard.log b/third_party/tests/Scoreboard/Scoreboard.log index 80d703a7c9..aba42bb239 100644 --- a/third_party/tests/Scoreboard/Scoreboard.log +++ b/third_party/tests/Scoreboard/Scoreboard.log @@ -797,8 +797,8 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 622 -class_typespec 8519 -class_var 3344 +class_typespec 8520 +class_var 3345 constant 26970 constraint 4 continue_stmt 52 @@ -848,7 +848,7 @@ part_select 43 range 2146 real_typespec 33 real_var 8 -ref_obj 44136 +ref_obj 41941 ref_var 1793 repeat 26 return_stmt 3287 diff --git a/third_party/tests/Scr1/Scr1.log b/third_party/tests/Scr1/Scr1.log index eb504499cb..9ba0984d04 100644 --- a/third_party/tests/Scr1/Scr1.log +++ b/third_party/tests/Scr1/Scr1.log @@ -480,7 +480,7 @@ int_var 40 integer_typespec 57 integer_var 3 io_decl 27 -logic_net 2849 +logic_net 2848 logic_typespec 3425 logic_var 822 method_func_call 5 @@ -497,7 +497,7 @@ port 2564 property_spec 38 range 2552 ref_module 42 -ref_obj 13121 +ref_obj 12149 return_stmt 8 string_typespec 13 string_var 10 @@ -525,12 +525,12 @@ while_stmt 1 [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/primitives/scr1_reset_cells.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_reset_cells_000.sv | 73 | 166 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_clk_ctrl.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_clk_ctrl_000.sv | 1 | 6 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_core_top.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_core_top_000.sv | 397 | 540 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_dm.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dm_000.sv | 327 | 1255 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_dmi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dmi_000.sv | 34 | 160 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_scu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_scu_000.sv | 155 | 415 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_000.sv | 140 | 423 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc_shift_reg.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_shift_reg_000.sv | 44 | 112 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc_synchronizer.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_synchronizer_000.sv | 48 | 180 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_dm.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dm_000.sv | 362 | 1255 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_dmi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dmi_000.sv | 46 | 160 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_scu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_scu_000.sv | 156 | 415 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_000.sv | 141 | 423 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc_shift_reg.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_shift_reg_000.sv | 45 | 112 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/core/scr1_tapc_synchronizer.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_synchronizer_000.sv | 55 | 180 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_arch_description.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_arch_description_000.svh | 93 | 163 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_arch_types.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_arch_types_000.svh | 11 | 45 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_csr.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_csr_000.svh | 91 | 190 | @@ -542,24 +542,24 @@ while_stmt 1 [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_search_ms1.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_search_ms1_000.svh | 40 | 91 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_tapc.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tapc_000.svh | 7 | 56 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/includes/scr1_tdu.svh | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tdu_000.svh | 46 | 119 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_ipic.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_ipic_000.sv | 101 | 452 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_csr.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_csr_000.sv | 393 | 1010 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_exu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_exu_000.sv | 415 | 814 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_ipic.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_ipic_000.sv | 108 | 452 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_csr.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_csr_000.sv | 420 | 1010 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_exu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_exu_000.sv | 420 | 814 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_hdu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_hdu_000.sv | 267 | 893 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_ialu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_ialu_000.sv | 268 | 602 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_idu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_idu_000.sv | 432 | 864 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_ifu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_ifu_000.sv | 248 | 625 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_lsu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_lsu_000.sv | 117 | 303 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_ialu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_ialu_000.sv | 271 | 602 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_idu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_idu_000.sv | 448 | 864 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_ifu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_ifu_000.sv | 254 | 625 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_lsu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_lsu_000.sv | 123 | 303 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_mprf.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_mprf_000.sv | 41 | 83 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_tdu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_tdu_000.sv | 198 | 477 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_tdu.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_tdu_000.sv | 209 | 477 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_pipe_top.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_pipe_top_000.sv | 584 | 746 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/pipeline/scr1_tracelog.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tracelog_000.sv | 214 | 422 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/tb/scr1_memory_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_memory_tb_axi_000.sv | 227 | 348 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/tb/scr1_memory_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_memory_tb_axi_000.sv | 230 | 348 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/tb/scr1_top_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_top_tb_axi_000.sv | 401 | 611 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_dmem_router.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dmem_router_000.sv | 82 | 259 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_dp_memory.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_dp_memory_000.sv | 50 | 102 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_imem_router.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_imem_router_000.sv | 54 | 177 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_mem_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_mem_axi_000.sv | 157 | 362 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_tcm.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tcm_000.sv | 59 | 129 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_timer.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_timer_000.sv | 54 | 271 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_mem_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_mem_axi_000.sv | 163 | 362 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_tcm.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_tcm_000.sv | 61 | 129 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_timer.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_timer_000.sv | 68 | 271 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1/src/top/scr1_top_axi.sv | ${SURELOG_DIR}/build/regression/Scr1/roundtrip/scr1_top_axi_000.sv | 531 | 652 | \ No newline at end of file diff --git a/third_party/tests/Scr1SvTests/Scr1SvTests.log b/third_party/tests/Scr1SvTests/Scr1SvTests.log index 7aaaa0c22e..899890bcb7 100644 --- a/third_party/tests/Scr1SvTests/Scr1SvTests.log +++ b/third_party/tests/Scr1SvTests/Scr1SvTests.log @@ -344,7 +344,7 @@ int_var 32 integer_typespec 72 integer_var 3 io_decl 27 -logic_net 3126 +logic_net 3125 logic_typespec 3686 logic_var 1052 method_func_call 4 @@ -361,7 +361,7 @@ port 2646 property_spec 32 range 2530 ref_module 43 -ref_obj 14405 +ref_obj 13482 return_stmt 8 string_typespec 12 string_var 8 @@ -385,28 +385,28 @@ while_stmt 1 [ NOTE] : 49 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_ipic.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_ipic_000.sv | 149 | 603 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_csr.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_csr_000.sv | 408 | 1167 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_exu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_exu_000.sv | 468 | 1061 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_ipic.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_ipic_000.sv | 154 | 603 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_csr.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_csr_000.sv | 430 | 1167 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_exu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_exu_000.sv | 472 | 1061 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_hdu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_hdu_000.sv | 340 | 904 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_ialu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_ialu_000.sv | 328 | 720 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_idu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_idu_000.sv | 434 | 876 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_ifu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_ifu_000.sv | 326 | 826 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_lsu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_lsu_000.sv | 169 | 351 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_ialu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_ialu_000.sv | 330 | 720 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_idu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_idu_000.sv | 450 | 876 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_ifu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_ifu_000.sv | 330 | 826 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_lsu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_lsu_000.sv | 173 | 351 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_mprf.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_mprf_000.sv | 96 | 167 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_tdu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_tdu_000.sv | 278 | 610 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_tdu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_tdu_000.sv | 287 | 610 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_pipe_top.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_pipe_top_000.sv | 591 | 809 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/pipeline/scr1_tracelog.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tracelog_000.sv | 222 | 295 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/primitives/scr1_cg.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_cg_000.sv | 10 | 30 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/primitives/scr1_reset_cells.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_reset_cells_000.sv | 105 | 231 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/primitives/scr1_reset_cells.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_reset_cells_000.sv | 107 | 231 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_clk_ctrl.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_clk_ctrl_000.sv | 23 | 53 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_core_top.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_core_top_000.sv | 371 | 519 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_dm.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dm_000.sv | 343 | 1425 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_dmi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dmi_000.sv | 43 | 182 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_dm.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dm_000.sv | 370 | 1425 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_dmi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dmi_000.sv | 54 | 182 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_scu.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_scu_000.sv | 202 | 514 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_tapc.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_000.sv | 142 | 457 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_tapc_shift_reg.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_shift_reg_000.sv | 42 | 110 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_tapc_synchronizer.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_synchronizer_000.sv | 49 | 183 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_tapc_shift_reg.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_shift_reg_000.sv | 43 | 110 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/core/scr1_tapc_synchronizer.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_synchronizer_000.sv | 56 | 183 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_arch_description.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_arch_description_000.svh | 100 | 213 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_arch_types.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_arch_types_000.svh | 26 | 70 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_csr.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_csr_000.svh | 94 | 194 | @@ -419,13 +419,13 @@ while_stmt 1 [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_search_ms1.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_search_ms1_000.svh | 40 | 92 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_tapc.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tapc_000.svh | 15 | 63 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/includes/scr1_tdu.svh | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tdu_000.svh | 43 | 117 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/tb/scr1_memory_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_memory_tb_axi_000.sv | 249 | 393 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/tb/scr1_memory_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_memory_tb_axi_000.sv | 254 | 393 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/tb/scr1_top_tb_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_top_tb_axi_000.sv | 397 | 509 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/tb/scr1_top_tb_runtests.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_top_tb_runtests_000.sv | 65 | 184 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_dmem_router.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dmem_router_000.sv | 89 | 278 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_dp_memory.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_dp_memory_000.sv | 58 | 109 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_imem_router.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_imem_router_000.sv | 58 | 185 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_mem_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_mem_axi_000.sv | 155 | 363 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_tcm.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tcm_000.sv | 60 | 129 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_timer.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_timer_000.sv | 55 | 271 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_mem_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_mem_axi_000.sv | 161 | 363 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_tcm.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_tcm_000.sv | 62 | 129 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_timer.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_timer_000.sv | 69 | 271 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/Scr1SvTests/src/top/scr1_top_axi.sv | ${SURELOG_DIR}/build/regression/Scr1SvTests/roundtrip/scr1_top_axi_000.sv | 548 | 701 | \ No newline at end of file diff --git a/third_party/tests/SeqDriver/SeqDriver.log b/third_party/tests/SeqDriver/SeqDriver.log index d47e1b42d8..9484caf64b 100644 --- a/third_party/tests/SeqDriver/SeqDriver.log +++ b/third_party/tests/SeqDriver/SeqDriver.log @@ -781,8 +781,8 @@ case_stmt 147 chandle_typespec 10 chandle_var 2 class_defn 623 -class_typespec 12460 -class_var 5801 +class_typespec 12467 +class_var 5808 clocking_block 1 clocking_io_decl 2 constant 49413 @@ -817,7 +817,7 @@ int_var 1874 interface_inst 3 interface_typespec 1 io_decl 9911 -logic_net 324 +logic_net 327 logic_typespec 145 logic_var 60 long_int_typespec 139 @@ -837,7 +837,7 @@ range 5474 real_typespec 37 real_var 8 ref_module 1 -ref_obj 75481 +ref_obj 71583 ref_var 3111 repeat 49 return_stmt 5036 diff --git a/third_party/tests/SimpleOVM/SimpleOVM.log b/third_party/tests/SimpleOVM/SimpleOVM.log index 0d0ac00faa..7f28a017db 100644 --- a/third_party/tests/SimpleOVM/SimpleOVM.log +++ b/third_party/tests/SimpleOVM/SimpleOVM.log @@ -707,7 +707,7 @@ part_select 8 range 420 real_typespec 18 real_var 3 -ref_obj 18217 +ref_obj 17333 ref_var 359 repeat 2 return_stmt 1573 @@ -734,33 +734,33 @@ while_stmt 61 [ NOTE] : 4 -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_component_000.sv | 356 | 1548 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_config_000.sv | 88 | 258 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_extern_report_server_000.svh | 37 | 166 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.sv | 217 | 1058 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.svh | 225 | 753 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_globals_000.svh | 84 | 408 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_misc_000.sv | 86 | 517 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_000.sv | 298 | 1320 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_globals_000.svh | 89 | 388 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.sv | 92 | 491 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.svh | 11 | 42 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_port_base_000.svh | 7 | 22 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.sv | 184 | 1086 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.svh | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_root_000.svh | 318 | 1352 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_transaction_000.sv | 70 | 333 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_version_000.svh | 7 | 30 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/avm_compatibility_000.svh | 169 | 284 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.sv | 342 | 1065 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.svh | 381 | 604 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_defines_000.svh | 76 | 109 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_meth_compatibility_000.svh | 14 | 50 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_scenario_controller_000.svh | 3 | 21 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_meth_defines_000.svh | 5 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_sequencer_base_000.svh | 6 | 25 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_macros_000.svh | 15 | 35 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_000.sv | 6 | 28 | -[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_001.sv | 9 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleOVM/top.v | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/top_000.v | 2 | 2 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_component.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_component_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_config.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_config_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_extern_report_server.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_extern_report_server_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_factory.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_factory_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_misc.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_misc_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_object_globals.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_object_globals_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_packer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_packer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_port_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_port_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_printer.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_printer_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_root.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_root_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_transaction.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_transaction_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/base/ovm_version.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_version_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/avm_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/avm_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_message_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_message_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/compatibility/urm_meth_compatibility.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/urm_meth_compatibility_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/layered_stimulus/ovm_scenario_controller.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_scenario_controller_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/ovm_meth_defines.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_meth_defines_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/methodology/sequences/ovm_sequencer_base.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_sequencer_base_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_macros.svh | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_macros_000.svh | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/build/bin/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_000.sv | 0 | 0 | +[roundtrip]: ${SURELOG_DIR}/third_party/UVM/ovm-2.1.2/src/ovm_pkg.sv | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/ovm_pkg_001.sv | 9 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleOVM/top.v | ${SURELOG_DIR}/build/regression/SimpleOVM/roundtrip/top_000.v | 2 | 2 | \ No newline at end of file diff --git a/third_party/tests/SimpleParserTest/SimpleParserTest.log b/third_party/tests/SimpleParserTest/SimpleParserTest.log index be3c28d51b..2c3552bafe 100644 --- a/third_party/tests/SimpleParserTest/SimpleParserTest.log +++ b/third_party/tests/SimpleParserTest/SimpleParserTest.log @@ -153,7 +153,7 @@ port 173 prim_term 48 range 133 ref_module 1 -ref_obj 678 +ref_obj 572 ref_var 11 repeat 8 switch_tran 4 @@ -957,16 +957,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:17:11, endln:17:27 |vpiParent: - \_begin: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:16:2, endln:24:5 + \_assignment: , line:17:2, endln:17:27 |vpiOpType:30 |vpiOperand: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:17:11, endln:17:15 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.A) - |vpiParent: - \_operation: , line:17:11, endln:17:27 - |vpiName:A - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A + \_operation: , line:17:11, endln:17:27 |vpiName:A |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A |vpiIndex: @@ -983,14 +979,12 @@ design: (work@dff_async_reset) \_operation: , line:17:11, endln:17:27 |vpiOpType:8 |vpiOperand: - \_part_select: , line:17:21, endln:17:27 + \_part_select: A (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:17:21, endln:17:27 |vpiParent: - \_ref_obj: A (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:17:21, endln:17:22 - |vpiParent: - \_operation: , line:17:18, endln:17:27 - |vpiName:A - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A - |vpiDefName:A + \_operation: , line:17:18, endln:17:27 + |vpiName:A + |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A + |vpiDefName:A |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:17:23, endln:17:24 @@ -1007,7 +1001,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.XorNor), line:17:2, endln:17:8 |vpiParent: - \_begin: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:16:2, endln:24:5 + \_assignment: , line:17:2, endln:17:27 |vpiName:XorNor |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.XorNor |vpiActual: @@ -1044,12 +1038,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:18:20, endln:18:23 |vpiParent: - \_for_stmt: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:18:2, endln:18:5 + \_assignment: , line:18:18, endln:18:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.I), line:18:20, endln:18:21 |vpiParent: - \_for_stmt: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:18:2, endln:18:5 + \_operation: , line:18:20, endln:18:23 |vpiName:I |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.I |vpiActual: @@ -1065,7 +1059,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:18:18, endln:18:19 |vpiParent: - \_for_stmt: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:18:2, endln:18:5 + \_assignment: , line:18:18, endln:18:23 |vpiName:i |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i |vpiActual: @@ -1103,24 +1097,20 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Chain), line:19:6, endln:19:16 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.Chain) - |vpiParent: - \_operation: , line:19:6, endln:19:21 - |vpiName:Chain - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Chain + \_operation: , line:19:6, endln:19:21 |vpiName:Chain |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Chain |vpiIndex: \_operation: , line:19:12, endln:19:15 |vpiParent: - \_for_stmt: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:18:2, endln:18:5 + \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Chain), line:19:6, endln:19:16 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:19:12, endln:19:13 + \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.Chain.i), line:19:12, endln:19:13 |vpiParent: - \_for_stmt: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:18:2, endln:18:5 + \_operation: , line:19:12, endln:19:15 |vpiName:i - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i + |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Chain.i |vpiActual: \_integer_var: (i), line:13:2, endln:13:9 |vpiOperand: @@ -1148,29 +1138,25 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:20:21, endln:20:36 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_assignment: , line:20:2, endln:20:36 |vpiOpType:30 |vpiOperand: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:20:21, endln:20:27 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.A) - |vpiParent: - \_operation: , line:20:21, endln:20:36 - |vpiName:A - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A + \_operation: , line:20:21, endln:20:36 |vpiName:A |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A |vpiIndex: \_operation: , line:20:23, endln:20:26 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:20:21, endln:20:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:20:23, endln:20:24 + \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.A.i), line:20:23, endln:20:24 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_operation: , line:20:23, endln:20:26 |vpiName:i - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i + |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A.i |vpiActual: \_integer_var: (i), line:13:2, endln:13:9 |vpiOperand: @@ -1192,17 +1178,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg), line:20:2, endln:20:18 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg) - |vpiParent: - \_assignment: , line:20:2, endln:20:36 - |vpiName:Next_LFSR_Reg - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg + \_assignment: , line:20:2, endln:20:36 |vpiName:Next_LFSR_Reg |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg |vpiIndex: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:20:16, endln:20:17 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg), line:20:2, endln:20:18 |vpiName:i |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i |vpiActual: @@ -1216,24 +1198,20 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:22:21, endln:22:27 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.A) - |vpiParent: - \_assignment: , line:22:2, endln:22:27 - |vpiName:A - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A + \_assignment: , line:22:2, endln:22:27 |vpiName:A |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A |vpiIndex: \_operation: , line:22:23, endln:22:26 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.A), line:22:21, endln:22:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:22:23, endln:22:24 + \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.A.i), line:22:23, endln:22:24 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_operation: , line:22:23, endln:22:26 |vpiName:i - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i + |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.A.i |vpiActual: \_integer_var: (i), line:13:2, endln:13:9 |vpiOperand: @@ -1247,17 +1225,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg), line:22:2, endln:22:18 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg) - |vpiParent: - \_assignment: , line:22:2, endln:22:27 - |vpiName:Next_LFSR_Reg - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg + \_assignment: , line:22:2, endln:22:27 |vpiName:Next_LFSR_Reg |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg |vpiIndex: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.i), line:22:16, endln:22:17 |vpiParent: - \_if_else: , line:19:2, endln:22:28 + \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg), line:22:2, endln:22:18 |vpiName:i |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.i |vpiActual: @@ -1271,7 +1245,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.XorNor), line:23:21, endln:23:27 |vpiParent: - \_begin: (work@LFSR_TASK.LFSR_TAPS8_TASK), line:16:2, endln:24:5 + \_assignment: , line:23:2, endln:23:27 |vpiName:XorNor |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.XorNor |vpiActual: @@ -1279,11 +1253,7 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg), line:23:2, endln:23:18 |vpiParent: - \_ref_obj: (work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg) - |vpiParent: - \_assignment: , line:23:2, endln:23:27 - |vpiName:Next_LFSR_Reg - |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg + \_assignment: , line:23:2, endln:23:27 |vpiName:Next_LFSR_Reg |vpiFullName:work@LFSR_TASK.LFSR_TAPS8_TASK.Next_LFSR_Reg |vpiIndex: @@ -1515,7 +1485,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@LFSR_TASK.seed1), line:29:12, endln:29:17 |vpiParent: - \_if_else: , line:28:2, endln:31:39 + \_assignment: , line:29:2, endln:29:17 |vpiName:seed1 |vpiFullName:work@LFSR_TASK.seed1 |vpiActual: @@ -1523,7 +1493,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@LFSR_TASK.random1), line:29:2, endln:29:9 |vpiParent: - \_if_else: , line:28:2, endln:31:39 + \_assignment: , line:29:2, endln:29:17 |vpiName:random1 |vpiFullName:work@LFSR_TASK.random1 |vpiActual: @@ -1615,7 +1585,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@LFSR_TASK.seed2), line:34:12, endln:34:17 |vpiParent: - \_if_else: , line:33:2, endln:36:39 + \_assignment: , line:34:2, endln:34:17 |vpiName:seed2 |vpiFullName:work@LFSR_TASK.seed2 |vpiActual: @@ -1623,7 +1593,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@LFSR_TASK.random2), line:34:2, endln:34:9 |vpiParent: - \_if_else: , line:33:2, endln:36:39 + \_assignment: , line:34:2, endln:34:17 |vpiName:random2 |vpiFullName:work@LFSR_TASK.random2 |vpiActual: @@ -2108,12 +2078,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:23:26, endln:23:29 |vpiParent: - \_for_stmt: (work@arbiter), line:23:2, endln:23:5 + \_assignment: , line:23:24, endln:23:29 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.i), line:23:26, endln:23:27 |vpiParent: - \_for_stmt: (work@arbiter), line:23:2, endln:23:5 + \_operation: , line:23:26, endln:23:29 |vpiName:i |vpiFullName:work@arbiter.i |vpiActual: @@ -2129,7 +2099,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.i), line:23:24, endln:23:25 |vpiParent: - \_for_stmt: (work@arbiter), line:23:2, endln:23:5 + \_assignment: , line:23:24, endln:23:29 |vpiName:i |vpiFullName:work@arbiter.i |vpiActual: @@ -2190,12 +2160,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:25:30, endln:25:33 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_assignment: , line:25:28, endln:25:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.j), line:25:30, endln:25:31 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_operation: , line:25:30, endln:25:33 |vpiName:j |vpiFullName:work@arbiter.j |vpiActual: @@ -2211,7 +2181,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.j), line:25:28, endln:25:29 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_assignment: , line:25:28, endln:25:33 |vpiName:j |vpiFullName:work@arbiter.j |vpiActual: @@ -2244,59 +2214,51 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@arbiter.tpriority), line:26:16, endln:26:45 |vpiParent: - \_ref_obj: (work@arbiter.tpriority) - |vpiParent: - \_assignment: , line:26:2, endln:26:45 - |vpiName:tpriority - |vpiFullName:work@arbiter.tpriority + \_assignment: , line:26:2, endln:26:45 |vpiName:tpriority |vpiFullName:work@arbiter.tpriority |vpiIndex: \_operation: , line:26:26, endln:26:44 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_bit_select: (work@arbiter.tpriority), line:26:16, endln:26:45 |vpiOpType:24 |vpiOperand: \_operation: , line:26:26, endln:26:40 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_operation: , line:26:26, endln:26:44 |vpiOpType:25 |vpiOperand: - \_ref_obj: (work@arbiter.i), line:26:26, endln:26:27 + \_ref_obj: (work@arbiter.tpriority.i), line:26:26, endln:26:27 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_operation: , line:26:26, endln:26:40 |vpiName:i - |vpiFullName:work@arbiter.i + |vpiFullName:work@arbiter.tpriority.i |vpiActual: \_integer_var: (work@top.U.i), line:3:10, endln:3:11 |vpiOperand: - \_ref_obj: (work@arbiter.ADDRESSWIDTH), line:26:28, endln:26:40 + \_ref_obj: (work@arbiter.tpriority.ADDRESSWIDTH), line:26:28, endln:26:40 |vpiParent: \_operation: , line:26:26, endln:26:40 |vpiName:ADDRESSWIDTH - |vpiFullName:work@arbiter.ADDRESSWIDTH + |vpiFullName:work@arbiter.tpriority.ADDRESSWIDTH |vpiOperand: - \_ref_obj: (work@arbiter.j), line:26:43, endln:26:44 + \_ref_obj: (work@arbiter.tpriority.j), line:26:43, endln:26:44 |vpiParent: \_operation: , line:26:26, endln:26:44 |vpiName:j - |vpiFullName:work@arbiter.j + |vpiFullName:work@arbiter.tpriority.j |vpiActual: \_integer_var: (work@top.U.j), line:3:12, endln:3:13 |vpiLhs: \_bit_select: (work@arbiter.tmp_prio), line:26:2, endln:26:13 |vpiParent: - \_ref_obj: (work@arbiter.tmp_prio) - |vpiParent: - \_assignment: , line:26:2, endln:26:45 - |vpiName:tmp_prio - |vpiFullName:work@arbiter.tmp_prio + \_assignment: , line:26:2, endln:26:45 |vpiName:tmp_prio |vpiFullName:work@arbiter.tmp_prio |vpiIndex: \_ref_obj: (work@arbiter.j), line:26:11, endln:26:12 |vpiParent: - \_for_stmt: (work@arbiter), line:25:2, endln:25:5 + \_bit_select: (work@arbiter.tmp_prio), line:26:2, endln:26:13 |vpiName:j |vpiFullName:work@arbiter.j |vpiActual: @@ -2310,7 +2272,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@arbiter.tmp_prio), line:27:12, endln:27:20 |vpiParent: - \_begin: (work@arbiter), line:24:2, endln:28:5 + \_assignment: , line:27:2, endln:27:20 |vpiName:tmp_prio |vpiFullName:work@arbiter.tmp_prio |vpiActual: @@ -2318,17 +2280,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.prio), line:27:2, endln:27:9 |vpiParent: - \_ref_obj: (work@arbiter.prio) - |vpiParent: - \_assignment: , line:27:2, endln:27:20 - |vpiName:prio - |vpiFullName:work@arbiter.prio + \_assignment: , line:27:2, endln:27:20 |vpiName:prio |vpiFullName:work@arbiter.prio |vpiIndex: \_ref_obj: (work@arbiter.i), line:27:7, endln:27:8 |vpiParent: - \_begin: (work@arbiter), line:24:2, endln:28:5 + \_bit_select: (work@arbiter.prio), line:27:2, endln:27:9 |vpiName:i |vpiFullName:work@arbiter.i |vpiActual: @@ -2384,8 +2342,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:51:22, endln:51:23 - |vpiParent: - \_assignment: , line:51:13, endln:51:23 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2393,7 +2349,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.grant), line:51:13, endln:51:18 |vpiParent: - \_if_else: , line:51:2, endln:52:23 + \_assignment: , line:51:13, endln:51:23 |vpiName:grant |vpiFullName:work@arbiter.grant |vpiActual: @@ -2406,7 +2362,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@arbiter.grantD), line:52:16, endln:52:22 |vpiParent: - \_if_else: , line:51:2, endln:52:23 + \_assignment: , line:52:7, endln:52:22 |vpiName:grantD |vpiFullName:work@arbiter.grantD |vpiActual: @@ -2414,7 +2370,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.grant), line:52:7, endln:52:12 |vpiParent: - \_if_else: , line:51:2, endln:52:23 + \_assignment: , line:52:7, endln:52:22 |vpiName:grant |vpiFullName:work@arbiter.grant |vpiActual: @@ -2470,8 +2426,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:57:21, endln:57:22 - |vpiParent: - \_assignment: , line:57:13, endln:57:22 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -2479,7 +2433,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.next), line:57:13, endln:57:17 |vpiParent: - \_if_else: , line:57:2, endln:58:24 + \_assignment: , line:57:13, endln:57:22 |vpiName:next |vpiFullName:work@arbiter.next |vpiActual: @@ -2492,7 +2446,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@arbiter.nextNext), line:58:15, endln:58:23 |vpiParent: - \_if_else: , line:57:2, endln:58:24 + \_assignment: , line:58:7, endln:58:23 |vpiName:nextNext |vpiFullName:work@arbiter.nextNext |vpiActual: @@ -2500,7 +2454,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.next), line:58:7, endln:58:11 |vpiParent: - \_if_else: , line:57:2, endln:58:24 + \_assignment: , line:58:7, endln:58:23 |vpiName:next |vpiFullName:work@arbiter.next |vpiActual: @@ -2547,9 +2501,6 @@ design: (work@dff_async_reset) \_logic_net: (work@top.U.request), line:2:47, endln:2:54 |vpiOperand: \_bit_select: (prio), line:61:21, endln:61:28 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:61:26, endln:61:27 @@ -2561,9 +2512,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:61:32, endln:61:39 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:61:37, endln:61:38 @@ -2575,9 +2523,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:61:43, endln:61:50 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:61:48, endln:61:49 @@ -2589,9 +2534,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:61:54, endln:61:61 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:61:59, endln:61:60 @@ -2603,9 +2545,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:62:2, endln:62:9 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:62:7, endln:62:8 @@ -2617,9 +2556,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:62:13, endln:62:20 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:62:18, endln:62:19 @@ -2631,9 +2567,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:62:24, endln:62:31 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:62:29, endln:62:30 @@ -2645,9 +2578,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:62:35, endln:62:42 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:62:40, endln:62:41 @@ -2694,12 +2624,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:64:25, endln:64:28 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_assignment: , line:64:23, endln:64:28 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.k), line:64:25, endln:64:26 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_operation: , line:64:25, endln:64:28 |vpiName:k |vpiFullName:work@arbiter.k |vpiActual: @@ -2715,7 +2645,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.k), line:64:23, endln:64:24 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_assignment: , line:64:23, endln:64:28 |vpiName:k |vpiFullName:work@arbiter.k |vpiActual: @@ -2748,22 +2678,18 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:65:18, endln:65:51 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_assignment: , line:65:2, endln:65:51 |vpiOpType:32 |vpiOperand: \_bit_select: (work@arbiter.request), line:65:18, endln:65:28 |vpiParent: - \_ref_obj: (work@arbiter.request) - |vpiParent: - \_operation: , line:65:18, endln:65:51 - |vpiName:request - |vpiFullName:work@arbiter.request + \_operation: , line:65:18, endln:65:51 |vpiName:request |vpiFullName:work@arbiter.request |vpiIndex: \_ref_obj: (work@arbiter.k), line:65:26, endln:65:27 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_bit_select: (work@arbiter.request), line:65:18, endln:65:28 |vpiName:k |vpiFullName:work@arbiter.k |vpiActual: @@ -2771,17 +2697,13 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.prio), line:65:31, endln:65:38 |vpiParent: - \_ref_obj: (work@arbiter.prio) - |vpiParent: - \_operation: , line:65:18, endln:65:51 - |vpiName:prio - |vpiFullName:work@arbiter.prio + \_operation: , line:65:18, endln:65:51 |vpiName:prio |vpiFullName:work@arbiter.prio |vpiIndex: \_ref_obj: (work@arbiter.k), line:65:36, endln:65:37 |vpiParent: - \_operation: , line:65:18, endln:65:51 + \_bit_select: (work@arbiter.prio), line:65:31, endln:65:38 |vpiName:k |vpiFullName:work@arbiter.k |vpiActual: @@ -2794,7 +2716,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@arbiter.NUMUNITS), line:65:41, endln:65:49 |vpiParent: - \_operation: , line:65:18, endln:65:51 + \_operation: , line:65:41, endln:65:51 |vpiName:NUMUNITS |vpiFullName:work@arbiter.NUMUNITS |vpiOperand: @@ -2808,17 +2730,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.selectPrio), line:65:2, endln:65:15 |vpiParent: - \_ref_obj: (work@arbiter.selectPrio) - |vpiParent: - \_assignment: , line:65:2, endln:65:51 - |vpiName:selectPrio - |vpiFullName:work@arbiter.selectPrio + \_assignment: , line:65:2, endln:65:51 |vpiName:selectPrio |vpiFullName:work@arbiter.selectPrio |vpiIndex: \_ref_obj: (work@arbiter.k), line:65:13, endln:65:14 |vpiParent: - \_for_stmt: (work@arbiter), line:64:2, endln:64:5 + \_bit_select: (work@arbiter.selectPrio), line:65:2, endln:65:15 |vpiName:k |vpiFullName:work@arbiter.k |vpiActual: @@ -2892,12 +2810,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:70:25, endln:70:28 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_assignment: , line:70:23, endln:70:28 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.r), line:70:25, endln:70:26 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_operation: , line:70:25, endln:70:28 |vpiName:r |vpiFullName:work@arbiter.r |vpiActual: @@ -2913,7 +2831,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.r), line:70:23, endln:70:24 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_assignment: , line:70:23, endln:70:28 |vpiName:r |vpiFullName:work@arbiter.r |vpiActual: @@ -2946,12 +2864,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:71:20, endln:72:12 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_assignment: , line:71:2, endln:72:12 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@arbiter.roundORpriority), line:71:20, endln:71:35 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_operation: , line:71:20, endln:72:12 |vpiName:roundORpriority |vpiFullName:work@arbiter.roundORpriority |vpiActual: @@ -2959,17 +2877,13 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.prioRequest), line:71:38, endln:71:52 |vpiParent: - \_ref_obj: (work@arbiter.prioRequest) - |vpiParent: - \_operation: , line:71:20, endln:72:12 - |vpiName:prioRequest - |vpiFullName:work@arbiter.prioRequest + \_operation: , line:71:20, endln:72:12 |vpiName:prioRequest |vpiFullName:work@arbiter.prioRequest |vpiIndex: \_ref_obj: (work@arbiter.r), line:71:50, endln:71:51 |vpiParent: - \_operation: , line:71:20, endln:72:12 + \_bit_select: (work@arbiter.prioRequest), line:71:38, endln:71:52 |vpiName:r |vpiFullName:work@arbiter.r |vpiActual: @@ -2977,17 +2891,13 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.request), line:72:2, endln:72:12 |vpiParent: - \_ref_obj: (work@arbiter.request) - |vpiParent: - \_operation: , line:71:20, endln:72:12 - |vpiName:request - |vpiFullName:work@arbiter.request + \_operation: , line:71:20, endln:72:12 |vpiName:request |vpiFullName:work@arbiter.request |vpiIndex: \_ref_obj: (work@arbiter.r), line:72:10, endln:72:11 |vpiParent: - \_operation: , line:71:20, endln:72:12 + \_bit_select: (work@arbiter.request), line:72:2, endln:72:12 |vpiName:r |vpiFullName:work@arbiter.r |vpiActual: @@ -2995,17 +2905,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.finalRequest), line:71:2, endln:71:17 |vpiParent: - \_ref_obj: (work@arbiter.finalRequest) - |vpiParent: - \_assignment: , line:71:2, endln:72:12 - |vpiName:finalRequest - |vpiFullName:work@arbiter.finalRequest + \_assignment: , line:71:2, endln:72:12 |vpiName:finalRequest |vpiFullName:work@arbiter.finalRequest |vpiIndex: \_ref_obj: (work@arbiter.r), line:71:15, endln:71:16 |vpiParent: - \_for_stmt: (work@arbiter), line:70:2, endln:70:5 + \_bit_select: (work@arbiter.finalRequest), line:71:2, endln:71:17 |vpiName:r |vpiFullName:work@arbiter.r |vpiActual: @@ -3044,9 +2950,6 @@ design: (work@dff_async_reset) |vpiOpType:35 |vpiOperand: \_bit_select: (selectPrio), line:76:10, endln:76:23 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:76:21, endln:76:22 @@ -3058,9 +2961,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:76:27, endln:76:40 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:76:38, endln:76:39 @@ -3072,9 +2972,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:76:44, endln:76:57 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:76:55, endln:76:56 @@ -3086,9 +2983,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:77:2, endln:77:15 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:77:13, endln:77:14 @@ -3100,9 +2994,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:77:19, endln:77:32 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:77:30, endln:77:31 @@ -3114,9 +3005,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:77:36, endln:77:49 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:77:47, endln:77:48 @@ -3128,9 +3016,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:78:2, endln:78:15 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:78:13, endln:78:14 @@ -3142,9 +3027,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (selectPrio), line:78:19, endln:78:32 - |vpiParent: - \_ref_obj: (selectPrio) - |vpiName:selectPrio |vpiName:selectPrio |vpiIndex: \_constant: , line:78:30, endln:78:31 @@ -3168,11 +3050,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@arbiter.selectPrio), line:80:8, endln:80:21 |vpiParent: - \_ref_obj: (work@arbiter.selectPrio) - |vpiParent: - \_assignment: , line:80:2, endln:80:21 - |vpiName:selectPrio - |vpiFullName:work@arbiter.selectPrio + \_assignment: , line:80:2, endln:80:21 |vpiName:selectPrio |vpiFullName:work@arbiter.selectPrio |vpiIndex: @@ -3186,7 +3064,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.min), line:80:2, endln:80:5 |vpiParent: - \_begin: (work@arbiter), line:79:2, endln:83:5 + \_assignment: , line:80:2, endln:80:21 |vpiName:min |vpiFullName:work@arbiter.min |vpiActual: @@ -3223,12 +3101,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:81:26, endln:81:29 |vpiParent: - \_for_stmt: (work@arbiter), line:81:2, endln:81:5 + \_assignment: , line:81:24, endln:81:29 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.p), line:81:26, endln:81:27 |vpiParent: - \_for_stmt: (work@arbiter), line:81:2, endln:81:5 + \_operation: , line:81:26, endln:81:29 |vpiName:p |vpiFullName:work@arbiter.p |vpiActual: @@ -3244,7 +3122,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.p), line:81:24, endln:81:25 |vpiParent: - \_for_stmt: (work@arbiter), line:81:2, endln:81:5 + \_assignment: , line:81:24, endln:81:29 |vpiName:p |vpiFullName:work@arbiter.p |vpiActual: @@ -3280,17 +3158,13 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.selectPrio), line:82:6, endln:82:19 |vpiParent: - \_ref_obj: (work@arbiter.selectPrio) - |vpiParent: - \_operation: , line:82:6, endln:82:25 - |vpiName:selectPrio - |vpiFullName:work@arbiter.selectPrio + \_operation: , line:82:6, endln:82:25 |vpiName:selectPrio |vpiFullName:work@arbiter.selectPrio |vpiIndex: \_ref_obj: (work@arbiter.p), line:82:17, endln:82:18 |vpiParent: - \_for_stmt: (work@arbiter), line:81:2, endln:81:5 + \_bit_select: (work@arbiter.selectPrio), line:82:6, endln:82:19 |vpiName:p |vpiFullName:work@arbiter.p |vpiActual: @@ -3312,17 +3186,13 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@arbiter.selectPrio), line:82:33, endln:82:46 |vpiParent: - \_ref_obj: (work@arbiter.selectPrio) - |vpiParent: - \_assignment: , line:82:27, endln:82:46 - |vpiName:selectPrio - |vpiFullName:work@arbiter.selectPrio + \_assignment: , line:82:27, endln:82:46 |vpiName:selectPrio |vpiFullName:work@arbiter.selectPrio |vpiIndex: \_ref_obj: (work@arbiter.p), line:82:44, endln:82:45 |vpiParent: - \_if_stmt: , line:82:2, endln:82:47 + \_bit_select: (work@arbiter.selectPrio), line:82:33, endln:82:46 |vpiName:p |vpiFullName:work@arbiter.p |vpiActual: @@ -3330,7 +3200,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.min), line:82:27, endln:82:30 |vpiParent: - \_if_stmt: , line:82:2, endln:82:47 + \_assignment: , line:82:27, endln:82:46 |vpiName:min |vpiFullName:work@arbiter.min |vpiActual: @@ -3385,9 +3255,6 @@ design: (work@dff_async_reset) \_logic_net: (work@top.U.minPrio), line:42:23, endln:42:30 |vpiOperand: \_bit_select: (prio), line:85:28, endln:85:35 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:85:33, endln:85:34 @@ -3399,9 +3266,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:85:39, endln:85:46 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:85:44, endln:85:45 @@ -3413,9 +3277,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:85:50, endln:85:57 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:85:55, endln:85:56 @@ -3427,9 +3288,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:85:61, endln:85:68 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:85:66, endln:85:67 @@ -3441,9 +3299,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:86:5, endln:86:12 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:86:10, endln:86:11 @@ -3455,9 +3310,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:86:16, endln:86:23 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:86:21, endln:86:22 @@ -3469,9 +3321,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:86:27, endln:86:34 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:86:32, endln:86:33 @@ -3483,9 +3332,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (prio), line:86:38, endln:86:45 - |vpiParent: - \_ref_obj: (prio) - |vpiName:prio |vpiName:prio |vpiIndex: \_constant: , line:86:43, endln:86:44 @@ -3532,12 +3378,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:88:25, endln:88:28 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_assignment: , line:88:23, endln:88:28 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.q), line:88:25, endln:88:26 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_operation: , line:88:25, endln:88:28 |vpiName:q |vpiFullName:work@arbiter.q |vpiActual: @@ -3553,7 +3399,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.q), line:88:23, endln:88:24 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_assignment: , line:88:23, endln:88:28 |vpiName:q |vpiFullName:work@arbiter.q |vpiActual: @@ -3586,27 +3432,23 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:89:15, endln:89:35 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_assignment: , line:89:2, endln:89:35 |vpiOpType:32 |vpiOperand: \_operation: , line:89:16, endln:89:28 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_operation: , line:89:15, endln:89:35 |vpiOpType:14 |vpiOperand: \_bit_select: (work@arbiter.prio), line:89:16, endln:89:23 |vpiParent: - \_ref_obj: (work@arbiter.prio) - |vpiParent: - \_operation: , line:89:16, endln:89:28 - |vpiName:prio - |vpiFullName:work@arbiter.prio + \_operation: , line:89:16, endln:89:28 |vpiName:prio |vpiFullName:work@arbiter.prio |vpiIndex: \_ref_obj: (work@arbiter.q), line:89:21, endln:89:22 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_bit_select: (work@arbiter.prio), line:89:16, endln:89:23 |vpiName:q |vpiFullName:work@arbiter.q |vpiActual: @@ -3638,17 +3480,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.minPrio), line:89:2, endln:89:12 |vpiParent: - \_ref_obj: (work@arbiter.minPrio) - |vpiParent: - \_assignment: , line:89:2, endln:89:35 - |vpiName:minPrio - |vpiFullName:work@arbiter.minPrio + \_assignment: , line:89:2, endln:89:35 |vpiName:minPrio |vpiFullName:work@arbiter.minPrio |vpiIndex: \_ref_obj: (work@arbiter.q), line:89:10, endln:89:11 |vpiParent: - \_for_stmt: (work@arbiter), line:88:2, endln:88:5 + \_bit_select: (work@arbiter.minPrio), line:89:2, endln:89:12 |vpiName:q |vpiFullName:work@arbiter.q |vpiActual: @@ -3707,12 +3545,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:96:25, endln:96:28 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_assignment: , line:96:23, endln:96:28 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.s), line:96:25, endln:96:26 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_operation: , line:96:25, endln:96:28 |vpiName:s |vpiFullName:work@arbiter.s |vpiActual: @@ -3728,7 +3566,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.s), line:96:23, endln:96:24 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_assignment: , line:96:23, endln:96:28 |vpiName:s |vpiFullName:work@arbiter.s |vpiActual: @@ -3761,22 +3599,22 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:97:12, endln:97:58 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_assignment: , line:97:2, endln:97:58 |vpiOpType:32 |vpiOperand: \_operation: , line:97:13, endln:97:30 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_operation: , line:97:12, endln:97:58 |vpiOpType:20 |vpiOperand: \_operation: , line:97:13, endln:97:19 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_operation: , line:97:13, endln:97:30 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.next), line:97:13, endln:97:17 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_operation: , line:97:13, endln:97:19 |vpiName:next |vpiFullName:work@arbiter.next |vpiActual: @@ -3803,7 +3641,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@arbiter.next), line:97:34, endln:97:38 |vpiParent: - \_operation: , line:97:12, endln:97:58 + \_operation: , line:97:34, endln:97:40 |vpiName:next |vpiFullName:work@arbiter.next |vpiActual: @@ -3824,12 +3662,12 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:97:43, endln:97:49 |vpiParent: - \_operation: , line:97:12, endln:97:58 + \_operation: , line:97:43, endln:97:58 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.next), line:97:43, endln:97:47 |vpiParent: - \_operation: , line:97:12, endln:97:58 + \_operation: , line:97:43, endln:97:49 |vpiName:next |vpiFullName:work@arbiter.next |vpiActual: @@ -3851,17 +3689,13 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.scan), line:97:2, endln:97:9 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_assignment: , line:97:2, endln:97:58 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_assignment: , line:97:2, endln:97:58 |vpiName:scan |vpiFullName:work@arbiter.scan |vpiIndex: \_ref_obj: (work@arbiter.s), line:97:7, endln:97:8 |vpiParent: - \_for_stmt: (work@arbiter), line:96:2, endln:96:5 + \_bit_select: (work@arbiter.scan), line:97:2, endln:97:9 |vpiName:s |vpiFullName:work@arbiter.s |vpiActual: @@ -3908,9 +3742,6 @@ design: (work@dff_async_reset) \_logic_net: (work@top.U.finalRequest), line:46:23, endln:46:35 |vpiOperand: \_bit_select: (scan), line:100:26, endln:100:33 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:100:31, endln:100:32 @@ -3922,9 +3753,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:100:37, endln:100:44 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:100:42, endln:100:43 @@ -3936,9 +3764,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:100:48, endln:100:55 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:100:53, endln:100:54 @@ -3950,9 +3775,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:100:59, endln:100:66 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:100:64, endln:100:65 @@ -3964,9 +3786,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:101:2, endln:101:9 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:101:7, endln:101:8 @@ -3978,9 +3797,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:101:13, endln:101:20 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:101:18, endln:101:19 @@ -3992,9 +3808,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:101:24, endln:101:31 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:101:29, endln:101:30 @@ -4006,9 +3819,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:101:35, endln:101:42 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:101:40, endln:101:41 @@ -4032,27 +3842,19 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@arbiter.finalRequest), line:103:13, endln:103:34 |vpiParent: - \_ref_obj: (work@arbiter.finalRequest) - |vpiParent: - \_assignment: , line:103:2, endln:103:34 - |vpiName:finalRequest - |vpiFullName:work@arbiter.finalRequest + \_assignment: , line:103:2, endln:103:34 |vpiName:finalRequest |vpiFullName:work@arbiter.finalRequest |vpiIndex: - \_bit_select: (work@arbiter.scan), line:103:26, endln:103:33 + \_bit_select: (work@arbiter.finalRequest.scan), line:103:26, endln:103:33 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_begin: (work@arbiter), line:102:2, endln:106:5 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.finalRequest), line:103:13, endln:103:34 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.finalRequest.scan |vpiIndex: \_constant: , line:103:31, endln:103:32 |vpiParent: - \_bit_select: (work@arbiter.scan), line:103:26, endln:103:33 + \_bit_select: (work@arbiter.finalRequest.scan), line:103:26, endln:103:33 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4060,11 +3862,7 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.found), line:103:2, endln:103:10 |vpiParent: - \_ref_obj: (work@arbiter.found) - |vpiParent: - \_assignment: , line:103:2, endln:103:34 - |vpiName:found - |vpiFullName:work@arbiter.found + \_assignment: , line:103:2, endln:103:34 |vpiName:found |vpiFullName:work@arbiter.found |vpiIndex: @@ -4107,12 +3905,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:104:27, endln:104:30 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_assignment: , line:104:25, endln:104:30 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.t), line:104:27, endln:104:28 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_operation: , line:104:27, endln:104:30 |vpiName:t |vpiFullName:work@arbiter.t |vpiActual: @@ -4128,7 +3926,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.t), line:104:25, endln:104:26 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_assignment: , line:104:25, endln:104:30 |vpiName:t |vpiFullName:work@arbiter.t |vpiActual: @@ -4154,7 +3952,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@arbiter.NUMUNITS), line:104:13, endln:104:21 |vpiParent: - \_operation: , line:104:11, endln:104:23 + \_operation: , line:104:13, endln:104:23 |vpiName:NUMUNITS |vpiFullName:work@arbiter.NUMUNITS |vpiOperand: @@ -4174,29 +3972,25 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:105:13, endln:105:48 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_assignment: , line:105:2, endln:105:48 |vpiOpType:27 |vpiOperand: \_bit_select: (work@arbiter.found), line:105:13, endln:105:23 |vpiParent: - \_ref_obj: (work@arbiter.found) - |vpiParent: - \_operation: , line:105:13, endln:105:48 - |vpiName:found - |vpiFullName:work@arbiter.found + \_operation: , line:105:13, endln:105:48 |vpiName:found |vpiFullName:work@arbiter.found |vpiIndex: \_operation: , line:105:19, endln:105:22 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_bit_select: (work@arbiter.found), line:105:13, endln:105:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@arbiter.t), line:105:19, endln:105:20 + \_ref_obj: (work@arbiter.found.t), line:105:19, endln:105:20 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_operation: , line:105:19, endln:105:22 |vpiName:t - |vpiFullName:work@arbiter.t + |vpiFullName:work@arbiter.found.t |vpiActual: \_integer_var: (work@top.U.t), line:3:24, endln:3:25 |vpiOperand: @@ -4210,45 +4004,33 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.finalRequest), line:105:27, endln:105:48 |vpiParent: - \_ref_obj: (work@arbiter.finalRequest) - |vpiParent: - \_operation: , line:105:13, endln:105:48 - |vpiName:finalRequest - |vpiFullName:work@arbiter.finalRequest + \_operation: , line:105:13, endln:105:48 |vpiName:finalRequest |vpiFullName:work@arbiter.finalRequest |vpiIndex: - \_bit_select: (work@arbiter.scan), line:105:40, endln:105:47 + \_bit_select: (work@arbiter.finalRequest.scan), line:105:40, endln:105:47 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_operation: , line:105:13, endln:105:48 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.finalRequest), line:105:27, endln:105:48 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.finalRequest.scan |vpiIndex: - \_ref_obj: (work@arbiter.t), line:105:45, endln:105:46 + \_ref_obj: (work@arbiter.finalRequest.t), line:105:45, endln:105:46 |vpiParent: - \_operation: , line:105:13, endln:105:48 + \_bit_select: (work@arbiter.finalRequest.scan), line:105:40, endln:105:47 |vpiName:t - |vpiFullName:work@arbiter.t + |vpiFullName:work@arbiter.finalRequest.t |vpiActual: \_integer_var: (work@top.U.t), line:3:24, endln:3:25 |vpiLhs: \_bit_select: (work@arbiter.found), line:105:2, endln:105:10 |vpiParent: - \_ref_obj: (work@arbiter.found) - |vpiParent: - \_assignment: , line:105:2, endln:105:48 - |vpiName:found - |vpiFullName:work@arbiter.found + \_assignment: , line:105:2, endln:105:48 |vpiName:found |vpiFullName:work@arbiter.found |vpiIndex: \_ref_obj: (work@arbiter.t), line:105:8, endln:105:9 |vpiParent: - \_for_stmt: (work@arbiter), line:104:2, endln:104:5 + \_bit_select: (work@arbiter.found), line:105:2, endln:105:10 |vpiName:t |vpiFullName:work@arbiter.t |vpiActual: @@ -4303,9 +4085,6 @@ design: (work@dff_async_reset) \_logic_net: (work@top.U.found), line:36:23, endln:36:28 |vpiOperand: \_bit_select: (scan), line:108:35, endln:108:42 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:108:40, endln:108:41 @@ -4317,9 +4096,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:108:46, endln:108:53 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:108:51, endln:108:52 @@ -4331,9 +4107,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:108:57, endln:108:64 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:108:62, endln:108:63 @@ -4345,9 +4118,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:109:2, endln:109:9 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:109:7, endln:109:8 @@ -4359,9 +4129,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:109:13, endln:109:20 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:109:18, endln:109:19 @@ -4373,9 +4140,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:109:24, endln:109:31 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:109:29, endln:109:30 @@ -4387,9 +4151,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:109:35, endln:109:42 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:109:40, endln:109:41 @@ -4401,9 +4162,6 @@ design: (work@dff_async_reset) |vpiConstType:9 |vpiOperand: \_bit_select: (scan), line:109:46, endln:109:53 - |vpiParent: - \_ref_obj: (scan) - |vpiName:scan |vpiName:scan |vpiIndex: \_constant: , line:109:51, endln:109:52 @@ -4427,27 +4185,19 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@arbiter.finalRequest), line:111:20, endln:111:41 |vpiParent: - \_ref_obj: (work@arbiter.finalRequest) - |vpiParent: - \_assignment: , line:111:2, endln:111:41 - |vpiName:finalRequest - |vpiFullName:work@arbiter.finalRequest + \_assignment: , line:111:2, endln:111:41 |vpiName:finalRequest |vpiFullName:work@arbiter.finalRequest |vpiIndex: - \_bit_select: (work@arbiter.scan), line:111:33, endln:111:40 + \_bit_select: (work@arbiter.finalRequest.scan), line:111:33, endln:111:40 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_begin: (work@arbiter), line:110:2, endln:114:5 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.finalRequest), line:111:20, endln:111:41 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.finalRequest.scan |vpiIndex: \_constant: , line:111:38, endln:111:39 |vpiParent: - \_bit_select: (work@arbiter.scan), line:111:33, endln:111:40 + \_bit_select: (work@arbiter.finalRequest.scan), line:111:33, endln:111:40 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4455,27 +4205,19 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.grantD), line:111:2, endln:111:17 |vpiParent: - \_ref_obj: (work@arbiter.grantD) - |vpiParent: - \_assignment: , line:111:2, endln:111:41 - |vpiName:grantD - |vpiFullName:work@arbiter.grantD + \_assignment: , line:111:2, endln:111:41 |vpiName:grantD |vpiFullName:work@arbiter.grantD |vpiIndex: - \_bit_select: (work@arbiter.scan), line:111:9, endln:111:16 + \_bit_select: (work@arbiter.grantD.scan), line:111:9, endln:111:16 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_begin: (work@arbiter), line:110:2, endln:114:5 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.grantD), line:111:2, endln:111:17 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.grantD.scan |vpiIndex: \_constant: , line:111:14, endln:111:15 |vpiParent: - \_bit_select: (work@arbiter.scan), line:111:9, endln:111:16 + \_bit_select: (work@arbiter.grantD.scan), line:111:9, endln:111:16 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4512,12 +4254,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:112:25, endln:112:28 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_assignment: , line:112:23, endln:112:28 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.u), line:112:25, endln:112:26 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_operation: , line:112:25, endln:112:28 |vpiName:u |vpiFullName:work@arbiter.u |vpiActual: @@ -4533,7 +4275,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.u), line:112:23, endln:112:24 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_assignment: , line:112:23, endln:112:28 |vpiName:u |vpiFullName:work@arbiter.u |vpiActual: @@ -4566,34 +4308,26 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:113:20, endln:113:56 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_assignment: , line:113:2, endln:113:56 |vpiOpType:26 |vpiOperand: \_bit_select: (work@arbiter.finalRequest), line:113:20, endln:113:41 |vpiParent: - \_ref_obj: (work@arbiter.finalRequest) - |vpiParent: - \_operation: , line:113:20, endln:113:56 - |vpiName:finalRequest - |vpiFullName:work@arbiter.finalRequest + \_operation: , line:113:20, endln:113:56 |vpiName:finalRequest |vpiFullName:work@arbiter.finalRequest |vpiIndex: - \_bit_select: (work@arbiter.scan), line:113:33, endln:113:40 + \_bit_select: (work@arbiter.finalRequest.scan), line:113:33, endln:113:40 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.finalRequest), line:113:20, endln:113:41 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.finalRequest.scan |vpiIndex: - \_ref_obj: (work@arbiter.u), line:113:38, endln:113:39 + \_ref_obj: (work@arbiter.finalRequest.u), line:113:38, endln:113:39 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_bit_select: (work@arbiter.finalRequest.scan), line:113:33, endln:113:40 |vpiName:u - |vpiFullName:work@arbiter.u + |vpiFullName:work@arbiter.finalRequest.u |vpiActual: \_integer_var: (work@top.U.u), line:3:26, endln:3:27 |vpiOperand: @@ -4604,24 +4338,20 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@arbiter.found), line:113:46, endln:113:56 |vpiParent: - \_ref_obj: (work@arbiter.found) - |vpiParent: - \_operation: , line:113:45, endln:113:56 - |vpiName:found - |vpiFullName:work@arbiter.found + \_operation: , line:113:45, endln:113:56 |vpiName:found |vpiFullName:work@arbiter.found |vpiIndex: \_operation: , line:113:52, endln:113:55 |vpiParent: - \_operation: , line:113:45, endln:113:56 + \_bit_select: (work@arbiter.found), line:113:46, endln:113:56 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@arbiter.u), line:113:52, endln:113:53 + \_ref_obj: (work@arbiter.found.u), line:113:52, endln:113:53 |vpiParent: - \_operation: , line:113:45, endln:113:56 + \_operation: , line:113:52, endln:113:55 |vpiName:u - |vpiFullName:work@arbiter.u + |vpiFullName:work@arbiter.found.u |vpiActual: \_integer_var: (work@top.U.u), line:3:26, endln:3:27 |vpiOperand: @@ -4635,29 +4365,21 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@arbiter.grantD), line:113:2, endln:113:17 |vpiParent: - \_ref_obj: (work@arbiter.grantD) - |vpiParent: - \_assignment: , line:113:2, endln:113:56 - |vpiName:grantD - |vpiFullName:work@arbiter.grantD + \_assignment: , line:113:2, endln:113:56 |vpiName:grantD |vpiFullName:work@arbiter.grantD |vpiIndex: - \_bit_select: (work@arbiter.scan), line:113:9, endln:113:16 + \_bit_select: (work@arbiter.grantD.scan), line:113:9, endln:113:16 |vpiParent: - \_ref_obj: (work@arbiter.scan) - |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 - |vpiName:scan - |vpiFullName:work@arbiter.scan + \_bit_select: (work@arbiter.grantD), line:113:2, endln:113:17 |vpiName:scan - |vpiFullName:work@arbiter.scan + |vpiFullName:work@arbiter.grantD.scan |vpiIndex: - \_ref_obj: (work@arbiter.u), line:113:14, endln:113:15 + \_ref_obj: (work@arbiter.grantD.u), line:113:14, endln:113:15 |vpiParent: - \_for_stmt: (work@arbiter), line:112:2, endln:112:5 + \_bit_select: (work@arbiter.grantD.scan), line:113:9, endln:113:16 |vpiName:u - |vpiFullName:work@arbiter.u + |vpiFullName:work@arbiter.grantD.u |vpiActual: \_integer_var: (work@top.U.u), line:3:26, endln:3:27 |vpiAlwaysType:1 @@ -4690,8 +4412,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:117:13, endln:117:14 - |vpiParent: - \_assignment: , line:117:2, endln:117:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -4699,7 +4419,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.nextNext), line:117:2, endln:117:10 |vpiParent: - \_begin: (work@arbiter), line:116:2, endln:120:5 + \_assignment: , line:117:2, endln:117:14 |vpiName:nextNext |vpiFullName:work@arbiter.nextNext |vpiActual: @@ -4736,12 +4456,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:118:27, endln:118:30 |vpiParent: - \_for_stmt: (work@arbiter), line:118:2, endln:118:5 + \_assignment: , line:118:25, endln:118:30 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.v), line:118:27, endln:118:28 |vpiParent: - \_for_stmt: (work@arbiter), line:118:2, endln:118:5 + \_operation: , line:118:27, endln:118:30 |vpiName:v |vpiFullName:work@arbiter.v |vpiActual: @@ -4757,7 +4477,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.v), line:118:25, endln:118:26 |vpiParent: - \_for_stmt: (work@arbiter), line:118:2, endln:118:5 + \_assignment: , line:118:25, endln:118:30 |vpiName:v |vpiFullName:work@arbiter.v |vpiActual: @@ -4783,7 +4503,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@arbiter.NUMUNITS), line:118:13, endln:118:21 |vpiParent: - \_operation: , line:118:11, endln:118:23 + \_operation: , line:118:13, endln:118:23 |vpiName:NUMUNITS |vpiFullName:work@arbiter.NUMUNITS |vpiOperand: @@ -4801,17 +4521,13 @@ design: (work@dff_async_reset) |vpiCondition: \_bit_select: (work@arbiter.grantD), line:119:5, endln:119:14 |vpiParent: - \_ref_obj: (work@arbiter.grantD) - |vpiParent: - \_for_stmt: (work@arbiter), line:118:2, endln:118:5 - |vpiName:grantD - |vpiFullName:work@arbiter.grantD + \_for_stmt: (work@arbiter), line:118:2, endln:118:5 |vpiName:grantD |vpiFullName:work@arbiter.grantD |vpiIndex: \_ref_obj: (work@arbiter.v), line:119:12, endln:119:13 |vpiParent: - \_for_stmt: (work@arbiter), line:118:2, endln:118:5 + \_bit_select: (work@arbiter.grantD), line:119:5, endln:119:14 |vpiName:v |vpiFullName:work@arbiter.v |vpiActual: @@ -4825,12 +4541,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:119:27, endln:119:30 |vpiParent: - \_if_stmt: , line:119:2, endln:119:31 + \_assignment: , line:119:16, endln:119:30 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@arbiter.v), line:119:27, endln:119:28 |vpiParent: - \_if_stmt: , line:119:2, endln:119:31 + \_operation: , line:119:27, endln:119:30 |vpiName:v |vpiFullName:work@arbiter.v |vpiActual: @@ -4846,7 +4562,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@arbiter.nextNext), line:119:16, endln:119:24 |vpiParent: - \_if_stmt: , line:119:2, endln:119:31 + \_assignment: , line:119:16, endln:119:30 |vpiName:nextNext |vpiFullName:work@arbiter.nextNext |vpiActual: @@ -5038,11 +4754,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:8:18, endln:8:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:8:11, endln:8:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:8:11, endln:8:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5056,7 +4768,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:8:11, endln:8:15 |vpiParent: - \_case_item: , line:8:2, endln:8:25 + \_assignment: , line:8:11, endln:8:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5082,11 +4794,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:9:18, endln:9:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:9:11, endln:9:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:9:11, endln:9:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5100,7 +4808,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:9:11, endln:9:15 |vpiParent: - \_case_item: , line:9:2, endln:9:25 + \_assignment: , line:9:11, endln:9:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5126,11 +4834,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:10:18, endln:10:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:10:11, endln:10:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:10:11, endln:10:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5144,7 +4848,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:10:11, endln:10:15 |vpiParent: - \_case_item: , line:10:2, endln:10:25 + \_assignment: , line:10:11, endln:10:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5170,11 +4874,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:11:18, endln:11:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:11:11, endln:11:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:11:11, endln:11:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5188,7 +4888,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:11:11, endln:11:15 |vpiParent: - \_case_item: , line:11:2, endln:11:25 + \_assignment: , line:11:11, endln:11:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5214,11 +4914,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:12:18, endln:12:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:12:11, endln:12:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:12:11, endln:12:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5232,7 +4928,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:12:11, endln:12:15 |vpiParent: - \_case_item: , line:12:2, endln:12:25 + \_assignment: , line:12:11, endln:12:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5258,11 +4954,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:13:18, endln:13:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:13:11, endln:13:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:13:11, endln:13:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5276,7 +4968,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:13:11, endln:13:15 |vpiParent: - \_case_item: , line:13:2, endln:13:25 + \_assignment: , line:13:11, endln:13:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5302,11 +4994,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:14:18, endln:14:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:14:11, endln:14:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:14:11, endln:14:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5320,7 +5008,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:14:11, endln:14:15 |vpiParent: - \_case_item: , line:14:2, endln:14:25 + \_assignment: , line:14:11, endln:14:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5346,11 +5034,7 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@case1.in1), line:15:18, endln:15:24 |vpiParent: - \_ref_obj: (work@case1.in1) - |vpiParent: - \_assignment: , line:15:11, endln:15:24 - |vpiName:in1 - |vpiFullName:work@case1.in1 + \_assignment: , line:15:11, endln:15:24 |vpiName:in1 |vpiFullName:work@case1.in1 |vpiIndex: @@ -5364,7 +5048,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case1.out2), line:15:11, endln:15:15 |vpiParent: - \_case_item: , line:15:2, endln:15:25 + \_assignment: , line:15:11, endln:15:24 |vpiName:out2 |vpiFullName:work@case1.out2 |vpiActual: @@ -5540,8 +5224,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:29:20, endln:29:31 - |vpiParent: - \_assignment: , line:29:11, endln:29:31 |vpiDecompile:8'b00000001 |vpiSize:8 |BIN:00000001 @@ -5549,7 +5231,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:29:11, endln:29:17 |vpiParent: - \_case_item: , line:29:2, endln:29:32 + \_assignment: , line:29:11, endln:29:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5574,8 +5256,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:30:20, endln:30:31 - |vpiParent: - \_assignment: , line:30:11, endln:30:31 |vpiDecompile:8'b00000010 |vpiSize:8 |BIN:00000010 @@ -5583,7 +5263,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:30:11, endln:30:17 |vpiParent: - \_case_item: , line:30:2, endln:30:32 + \_assignment: , line:30:11, endln:30:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5608,8 +5288,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:20, endln:31:31 - |vpiParent: - \_assignment: , line:31:11, endln:31:31 |vpiDecompile:8'b00000100 |vpiSize:8 |BIN:00000100 @@ -5617,7 +5295,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:31:11, endln:31:17 |vpiParent: - \_case_item: , line:31:2, endln:31:32 + \_assignment: , line:31:11, endln:31:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5642,8 +5320,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:32:20, endln:32:31 - |vpiParent: - \_assignment: , line:32:11, endln:32:31 |vpiDecompile:8'b00001000 |vpiSize:8 |BIN:00001000 @@ -5651,7 +5327,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:32:11, endln:32:17 |vpiParent: - \_case_item: , line:32:2, endln:32:32 + \_assignment: , line:32:11, endln:32:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5676,8 +5352,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:33:20, endln:33:31 - |vpiParent: - \_assignment: , line:33:11, endln:33:31 |vpiDecompile:8'b00010000 |vpiSize:8 |BIN:00010000 @@ -5685,7 +5359,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:33:11, endln:33:17 |vpiParent: - \_case_item: , line:33:2, endln:33:32 + \_assignment: , line:33:11, endln:33:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5710,8 +5384,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:34:20, endln:34:31 - |vpiParent: - \_assignment: , line:34:11, endln:34:31 |vpiDecompile:8'b00100000 |vpiSize:8 |BIN:00100000 @@ -5719,7 +5391,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:34:11, endln:34:17 |vpiParent: - \_case_item: , line:34:2, endln:34:32 + \_assignment: , line:34:11, endln:34:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5744,8 +5416,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:35:20, endln:35:31 - |vpiParent: - \_assignment: , line:35:11, endln:35:31 |vpiDecompile:8'b01000000 |vpiSize:8 |BIN:01000000 @@ -5753,7 +5423,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:35:11, endln:35:17 |vpiParent: - \_case_item: , line:35:2, endln:35:32 + \_assignment: , line:35:11, endln:35:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5778,8 +5448,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:36:20, endln:36:31 - |vpiParent: - \_assignment: , line:36:11, endln:36:31 |vpiDecompile:8'b10000000 |vpiSize:8 |BIN:10000000 @@ -5787,7 +5455,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@case2.select), line:36:11, endln:36:17 |vpiParent: - \_case_item: , line:36:2, endln:36:32 + \_assignment: , line:36:11, endln:36:31 |vpiName:select |vpiFullName:work@case2.select |vpiActual: @@ -5813,11 +5481,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:38:27, endln:38:36 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:38:21, endln:38:36 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:38:21, endln:38:36 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -5829,14 +5493,12 @@ design: (work@dff_async_reset) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:38:9, endln:38:18 + \_part_select: out2 (work@case2.out2), line:38:9, endln:38:18 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:38:9, endln:38:36 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:38:9, endln:38:36 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:38:14, endln:38:15 @@ -5870,11 +5532,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:39:27, endln:39:36 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:39:21, endln:39:36 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:39:21, endln:39:36 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -5886,14 +5544,12 @@ design: (work@dff_async_reset) |UINT:1 |vpiConstType:9 |vpiLhs: - \_part_select: , line:39:9, endln:39:18 + \_part_select: out2 (work@case2.out2), line:39:9, endln:39:18 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:39:9, endln:39:36 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:39:9, endln:39:36 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:39:14, endln:39:15 @@ -5927,11 +5583,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:40:27, endln:40:36 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:40:21, endln:40:36 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:40:21, endln:40:36 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -5943,14 +5595,12 @@ design: (work@dff_async_reset) |UINT:2 |vpiConstType:9 |vpiLhs: - \_part_select: , line:40:9, endln:40:18 + \_part_select: out2 (work@case2.out2), line:40:9, endln:40:18 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:40:9, endln:40:36 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:40:9, endln:40:36 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:40:14, endln:40:15 @@ -5984,11 +5634,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:41:27, endln:41:36 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:41:21, endln:41:36 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:41:21, endln:41:36 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -6000,14 +5646,12 @@ design: (work@dff_async_reset) |UINT:3 |vpiConstType:9 |vpiLhs: - \_part_select: , line:41:9, endln:41:18 + \_part_select: out2 (work@case2.out2), line:41:9, endln:41:18 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:41:9, endln:41:36 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:41:9, endln:41:36 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:41:14, endln:41:15 @@ -6041,11 +5685,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:42:27, endln:42:36 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:42:21, endln:42:36 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:42:21, endln:42:36 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -6057,14 +5697,12 @@ design: (work@dff_async_reset) |UINT:4 |vpiConstType:9 |vpiLhs: - \_part_select: , line:42:9, endln:42:18 + \_part_select: out2 (work@case2.out2), line:42:9, endln:42:18 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:42:9, endln:42:36 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:42:9, endln:42:36 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:42:14, endln:42:15 @@ -6098,11 +5736,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:43:29, endln:43:38 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:43:23, endln:43:38 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:43:23, endln:43:38 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -6114,14 +5748,12 @@ design: (work@dff_async_reset) |UINT:5 |vpiConstType:9 |vpiLhs: - \_part_select: , line:43:9, endln:43:20 + \_part_select: out2 (work@case2.out2), line:43:9, endln:43:20 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:43:9, endln:43:38 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:43:9, endln:43:38 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:43:14, endln:43:16 @@ -6155,11 +5787,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:44:29, endln:44:38 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:44:23, endln:44:38 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:44:23, endln:44:38 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -6171,14 +5799,12 @@ design: (work@dff_async_reset) |UINT:6 |vpiConstType:9 |vpiLhs: - \_part_select: , line:44:9, endln:44:20 + \_part_select: out2 (work@case2.out2), line:44:9, endln:44:20 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:44:9, endln:44:38 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:44:9, endln:44:38 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:44:14, endln:44:16 @@ -6212,11 +5838,7 @@ design: (work@dff_async_reset) |vpiOperand: \_bit_select: (work@case2.select), line:45:29, endln:45:38 |vpiParent: - \_ref_obj: (work@case2.select) - |vpiParent: - \_operation: , line:45:23, endln:45:38 - |vpiName:select - |vpiFullName:work@case2.select + \_operation: , line:45:23, endln:45:38 |vpiName:select |vpiFullName:work@case2.select |vpiIndex: @@ -6228,14 +5850,12 @@ design: (work@dff_async_reset) |UINT:7 |vpiConstType:9 |vpiLhs: - \_part_select: , line:45:9, endln:45:20 + \_part_select: out2 (work@case2.out2), line:45:9, endln:45:20 |vpiParent: - \_ref_obj: out2 (work@case2.out2) - |vpiParent: - \_cont_assign: , line:45:9, endln:45:38 - |vpiName:out2 - |vpiFullName:work@case2.out2 - |vpiDefName:out2 + \_cont_assign: , line:45:9, endln:45:38 + |vpiName:out2 + |vpiFullName:work@case2.out2 + |vpiDefName:out2 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:45:14, endln:45:16 @@ -6390,8 +6010,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:26:8, endln:26:12 - |vpiParent: - \_assignment: , line:26:3, endln:26:12 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -6399,7 +6017,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@dff_async_reset.q), line:26:3, endln:26:4 |vpiParent: - \_begin: (work@dff_async_reset), line:25:13, endln:27:4 + \_assignment: , line:26:3, endln:26:12 |vpiName:q |vpiFullName:work@dff_async_reset.q |vpiActual: @@ -6417,7 +6035,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@dff_async_reset.data), line:28:8, endln:28:12 |vpiParent: - \_begin: (work@dff_async_reset), line:27:11, endln:29:4 + \_assignment: , line:28:3, endln:28:12 |vpiName:data |vpiFullName:work@dff_async_reset.data |vpiActual: @@ -6425,7 +6043,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@dff_async_reset.q), line:28:3, endln:28:4 |vpiParent: - \_begin: (work@dff_async_reset), line:27:11, endln:29:4 + \_assignment: , line:28:3, endln:28:12 |vpiName:q |vpiFullName:work@dff_async_reset.q |vpiActual: @@ -6564,8 +6182,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:21:16, endln:21:17 - |vpiParent: - \_assignment: , line:21:3, endln:21:17 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -6573,7 +6189,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:21:3, endln:21:13 |vpiParent: - \_begin: (work@encoder_using_case), line:20:1, endln:41:4 + \_assignment: , line:21:3, endln:21:17 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6628,8 +6244,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:31, endln:24:32 - |vpiParent: - \_assignment: , line:24:18, endln:24:32 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -6637,7 +6251,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:24:18, endln:24:28 |vpiParent: - \_case_item: , line:24:7, endln:24:33 + \_assignment: , line:24:18, endln:24:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6662,8 +6276,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:25:31, endln:25:32 - |vpiParent: - \_assignment: , line:25:18, endln:25:32 |vpiDecompile:2 |vpiSize:64 |UINT:2 @@ -6671,7 +6283,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:25:18, endln:25:28 |vpiParent: - \_case_item: , line:25:7, endln:25:33 + \_assignment: , line:25:18, endln:25:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6696,8 +6308,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:26:31, endln:26:32 - |vpiParent: - \_assignment: , line:26:18, endln:26:32 |vpiDecompile:3 |vpiSize:64 |UINT:3 @@ -6705,7 +6315,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:26:18, endln:26:28 |vpiParent: - \_case_item: , line:26:7, endln:26:33 + \_assignment: , line:26:18, endln:26:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6730,8 +6340,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:31, endln:27:32 - |vpiParent: - \_assignment: , line:27:18, endln:27:32 |vpiDecompile:4 |vpiSize:64 |UINT:4 @@ -6739,7 +6347,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:27:18, endln:27:28 |vpiParent: - \_case_item: , line:27:7, endln:27:33 + \_assignment: , line:27:18, endln:27:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6764,8 +6372,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:28:31, endln:28:32 - |vpiParent: - \_assignment: , line:28:18, endln:28:32 |vpiDecompile:5 |vpiSize:64 |UINT:5 @@ -6773,7 +6379,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:28:18, endln:28:28 |vpiParent: - \_case_item: , line:28:7, endln:28:33 + \_assignment: , line:28:18, endln:28:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6798,8 +6404,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:29:31, endln:29:32 - |vpiParent: - \_assignment: , line:29:18, endln:29:32 |vpiDecompile:6 |vpiSize:64 |UINT:6 @@ -6807,7 +6411,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:29:18, endln:29:28 |vpiParent: - \_case_item: , line:29:7, endln:29:33 + \_assignment: , line:29:18, endln:29:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6832,8 +6436,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:30:31, endln:30:32 - |vpiParent: - \_assignment: , line:30:18, endln:30:32 |vpiDecompile:7 |vpiSize:64 |UINT:7 @@ -6841,7 +6443,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:30:18, endln:30:28 |vpiParent: - \_case_item: , line:30:7, endln:30:33 + \_assignment: , line:30:18, endln:30:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6866,8 +6468,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:31:31, endln:31:32 - |vpiParent: - \_assignment: , line:31:18, endln:31:32 |vpiDecompile:8 |vpiSize:64 |UINT:8 @@ -6875,7 +6475,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:31:18, endln:31:28 |vpiParent: - \_case_item: , line:31:7, endln:31:33 + \_assignment: , line:31:18, endln:31:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6899,9 +6499,7 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_constant: , line:32:31, endln:32:32 - |vpiParent: - \_assignment: , line:32:18, endln:32:32 + \_constant: , line:32:31, endln:32:32 |vpiDecompile:9 |vpiSize:64 |UINT:9 @@ -6909,7 +6507,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:32:18, endln:32:28 |vpiParent: - \_case_item: , line:32:7, endln:32:33 + \_assignment: , line:32:18, endln:32:32 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6934,8 +6532,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:33:31, endln:33:33 - |vpiParent: - \_assignment: , line:33:18, endln:33:33 |vpiDecompile:10 |vpiSize:64 |UINT:10 @@ -6943,7 +6539,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:33:18, endln:33:28 |vpiParent: - \_case_item: , line:33:7, endln:33:34 + \_assignment: , line:33:18, endln:33:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -6968,8 +6564,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:34:31, endln:34:33 - |vpiParent: - \_assignment: , line:34:18, endln:34:33 |vpiDecompile:11 |vpiSize:64 |UINT:11 @@ -6977,7 +6571,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:34:18, endln:34:28 |vpiParent: - \_case_item: , line:34:7, endln:34:34 + \_assignment: , line:34:18, endln:34:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -7002,8 +6596,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:35:31, endln:35:33 - |vpiParent: - \_assignment: , line:35:18, endln:35:33 |vpiDecompile:12 |vpiSize:64 |UINT:12 @@ -7011,7 +6603,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:35:18, endln:35:28 |vpiParent: - \_case_item: , line:35:7, endln:35:34 + \_assignment: , line:35:18, endln:35:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -7036,8 +6628,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:36:31, endln:36:33 - |vpiParent: - \_assignment: , line:36:18, endln:36:33 |vpiDecompile:13 |vpiSize:64 |UINT:13 @@ -7045,7 +6635,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:36:18, endln:36:28 |vpiParent: - \_case_item: , line:36:7, endln:36:34 + \_assignment: , line:36:18, endln:36:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -7070,8 +6660,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:37:31, endln:37:33 - |vpiParent: - \_assignment: , line:37:18, endln:37:33 |vpiDecompile:14 |vpiSize:64 |UINT:14 @@ -7079,7 +6667,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:37:18, endln:37:28 |vpiParent: - \_case_item: , line:37:7, endln:37:34 + \_assignment: , line:37:18, endln:37:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -7104,8 +6692,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:38:31, endln:38:33 - |vpiParent: - \_assignment: , line:38:18, endln:38:33 |vpiDecompile:15 |vpiSize:64 |UINT:15 @@ -7113,7 +6699,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@encoder_using_case.binary_out), line:38:18, endln:38:28 |vpiParent: - \_case_item: , line:38:7, endln:38:34 + \_assignment: , line:38:18, endln:38:33 |vpiName:binary_out |vpiFullName:work@encoder_using_case.binary_out |vpiActual: @@ -7834,8 +7420,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:57:8, endln:57:13 - |vpiParent: - \_assignment: , line:57:2, endln:57:13 |vpiDecompile:2'b11 |vpiSize:2 |BIN:11 @@ -7843,7 +7427,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.Sel), line:57:2, endln:57:5 |vpiParent: - \_begin: (work@pri_encooder), line:56:18, endln:59:5 + \_assignment: , line:57:2, endln:57:13 |vpiName:Sel |vpiFullName:work@pri_encooder.Sel |vpiActual: @@ -7856,8 +7440,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:58:6, endln:58:10 - |vpiParent: - \_assignment: , line:58:2, endln:58:10 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -7865,7 +7447,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.B), line:58:2, endln:58:3 |vpiParent: - \_begin: (work@pri_encooder), line:56:18, endln:59:5 + \_assignment: , line:58:2, endln:58:10 |vpiName:B |vpiFullName:work@pri_encooder.B |vpiActual: @@ -7908,8 +7490,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:61:8, endln:61:13 - |vpiParent: - \_assignment: , line:61:2, endln:61:13 |vpiDecompile:2'b01 |vpiSize:2 |BIN:01 @@ -7917,7 +7497,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.Sel), line:61:2, endln:61:5 |vpiParent: - \_begin: (work@pri_encooder), line:60:22, endln:63:5 + \_assignment: , line:61:2, endln:61:13 |vpiName:Sel |vpiFullName:work@pri_encooder.Sel |vpiActual: @@ -7930,8 +7510,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:62:6, endln:62:10 - |vpiParent: - \_assignment: , line:62:2, endln:62:10 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -7939,7 +7517,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.B), line:62:2, endln:62:3 |vpiParent: - \_begin: (work@pri_encooder), line:60:22, endln:63:5 + \_assignment: , line:62:2, endln:62:10 |vpiName:B |vpiFullName:work@pri_encooder.B |vpiActual: @@ -7982,8 +7560,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:65:8, endln:65:13 - |vpiParent: - \_assignment: , line:65:2, endln:65:13 |vpiDecompile:2'b10 |vpiSize:2 |BIN:10 @@ -7991,7 +7567,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.Sel), line:65:2, endln:65:5 |vpiParent: - \_begin: (work@pri_encooder), line:64:22, endln:67:5 + \_assignment: , line:65:2, endln:65:13 |vpiName:Sel |vpiFullName:work@pri_encooder.Sel |vpiActual: @@ -8004,8 +7580,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:66:6, endln:66:10 - |vpiParent: - \_assignment: , line:66:2, endln:66:10 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -8013,7 +7587,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.B), line:66:2, endln:66:3 |vpiParent: - \_begin: (work@pri_encooder), line:64:22, endln:67:5 + \_assignment: , line:66:2, endln:66:10 |vpiName:B |vpiFullName:work@pri_encooder.B |vpiActual: @@ -8035,8 +7609,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:69:8, endln:69:13 - |vpiParent: - \_assignment: , line:69:2, endln:69:13 |vpiDecompile:2'bxx |vpiSize:2 |BIN:xx @@ -8044,7 +7616,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.Sel), line:69:2, endln:69:5 |vpiParent: - \_begin: (work@pri_encooder), line:68:12, endln:71:5 + \_assignment: , line:69:2, endln:69:13 |vpiName:Sel |vpiFullName:work@pri_encooder.Sel |vpiActual: @@ -8057,8 +7629,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:70:6, endln:70:10 - |vpiParent: - \_assignment: , line:70:2, endln:70:10 |vpiDecompile:1'bX |vpiSize:1 |BIN:X @@ -8066,7 +7636,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@pri_encooder.B), line:70:2, endln:70:3 |vpiParent: - \_begin: (work@pri_encooder), line:68:12, endln:71:5 + \_assignment: , line:70:2, endln:70:10 |vpiName:B |vpiFullName:work@pri_encooder.B |vpiActual: @@ -8480,8 +8050,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:52:19, endln:52:20 - |vpiParent: - \_assignment: , line:52:5, endln:52:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8489,7 +8057,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.WRITE_POINTER.wr_pointer), line:52:5, endln:52:15 |vpiParent: - \_begin: (work@syn_fifo.WRITE_POINTER), line:51:12, endln:53:6 + \_assignment: , line:52:5, endln:52:20 |vpiName:wr_pointer |vpiFullName:work@syn_fifo.WRITE_POINTER.wr_pointer |vpiActual: @@ -8506,7 +8074,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.WRITE_POINTER.wr_cs), line:53:16, endln:53:21 |vpiParent: - \_if_else: , line:51:3, endln:55:6 + \_operation: , line:53:16, endln:53:30 |vpiName:wr_cs |vpiFullName:work@syn_fifo.WRITE_POINTER.wr_cs |vpiActual: @@ -8532,12 +8100,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:54:19, endln:54:33 |vpiParent: - \_begin: (work@syn_fifo.WRITE_POINTER), line:53:33, endln:55:6 + \_assignment: , line:54:5, endln:54:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@syn_fifo.WRITE_POINTER.wr_pointer), line:54:19, endln:54:29 |vpiParent: - \_begin: (work@syn_fifo.WRITE_POINTER), line:53:33, endln:55:6 + \_operation: , line:54:19, endln:54:33 |vpiName:wr_pointer |vpiFullName:work@syn_fifo.WRITE_POINTER.wr_pointer |vpiActual: @@ -8553,7 +8121,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.WRITE_POINTER.wr_pointer), line:54:5, endln:54:15 |vpiParent: - \_begin: (work@syn_fifo.WRITE_POINTER), line:53:33, endln:55:6 + \_assignment: , line:54:5, endln:54:33 |vpiName:wr_pointer |vpiFullName:work@syn_fifo.WRITE_POINTER.wr_pointer |vpiActual: @@ -8622,8 +8190,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:61:19, endln:61:20 - |vpiParent: - \_assignment: , line:61:5, endln:61:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8631,7 +8197,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.READ_POINTER.rd_pointer), line:61:5, endln:61:15 |vpiParent: - \_begin: (work@syn_fifo.READ_POINTER), line:60:12, endln:62:6 + \_assignment: , line:61:5, endln:61:20 |vpiName:rd_pointer |vpiFullName:work@syn_fifo.READ_POINTER.rd_pointer |vpiActual: @@ -8648,7 +8214,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.READ_POINTER.rd_cs), line:62:16, endln:62:21 |vpiParent: - \_if_else: , line:60:3, endln:64:6 + \_operation: , line:62:16, endln:62:30 |vpiName:rd_cs |vpiFullName:work@syn_fifo.READ_POINTER.rd_cs |vpiActual: @@ -8674,12 +8240,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:63:19, endln:63:33 |vpiParent: - \_begin: (work@syn_fifo.READ_POINTER), line:62:33, endln:64:6 + \_assignment: , line:63:5, endln:63:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@syn_fifo.READ_POINTER.rd_pointer), line:63:19, endln:63:29 |vpiParent: - \_begin: (work@syn_fifo.READ_POINTER), line:62:33, endln:64:6 + \_operation: , line:63:19, endln:63:33 |vpiName:rd_pointer |vpiFullName:work@syn_fifo.READ_POINTER.rd_pointer |vpiActual: @@ -8695,7 +8261,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.READ_POINTER.rd_pointer), line:63:5, endln:63:15 |vpiParent: - \_begin: (work@syn_fifo.READ_POINTER), line:62:33, endln:64:6 + \_assignment: , line:63:5, endln:63:33 |vpiName:rd_pointer |vpiFullName:work@syn_fifo.READ_POINTER.rd_pointer |vpiActual: @@ -8764,8 +8330,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:70:17, endln:70:18 - |vpiParent: - \_assignment: , line:70:5, endln:70:18 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8773,7 +8337,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.READ_DATA.data_out), line:70:5, endln:70:13 |vpiParent: - \_begin: (work@syn_fifo.READ_DATA), line:69:12, endln:71:6 + \_assignment: , line:70:5, endln:70:18 |vpiName:data_out |vpiFullName:work@syn_fifo.READ_DATA.data_out |vpiActual: @@ -8790,7 +8354,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.READ_DATA.rd_cs), line:71:16, endln:71:21 |vpiParent: - \_if_else: , line:69:3, endln:73:6 + \_operation: , line:71:16, endln:71:30 |vpiName:rd_cs |vpiFullName:work@syn_fifo.READ_DATA.rd_cs |vpiActual: @@ -8816,7 +8380,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@syn_fifo.READ_DATA.data_ram), line:72:17, endln:72:25 |vpiParent: - \_begin: (work@syn_fifo.READ_DATA), line:71:33, endln:73:6 + \_assignment: , line:72:5, endln:72:25 |vpiName:data_ram |vpiFullName:work@syn_fifo.READ_DATA.data_ram |vpiActual: @@ -8824,7 +8388,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.READ_DATA.data_out), line:72:5, endln:72:13 |vpiParent: - \_begin: (work@syn_fifo.READ_DATA), line:71:33, endln:73:6 + \_assignment: , line:72:5, endln:72:25 |vpiName:data_out |vpiFullName:work@syn_fifo.READ_DATA.data_out |vpiActual: @@ -8893,8 +8457,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:79:19, endln:79:20 - |vpiParent: - \_assignment: , line:79:5, endln:79:20 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -8902,7 +8464,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:79:5, endln:79:15 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:78:12, endln:81:6 + \_assignment: , line:79:5, endln:79:20 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -8919,17 +8481,17 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:81:16, endln:81:53 |vpiParent: - \_if_else: , line:78:3, endln:88:6 + \_operation: , line:81:16, endln:82:37 |vpiOpType:26 |vpiOperand: \_operation: , line:81:17, endln:81:31 |vpiParent: - \_if_else: , line:78:3, endln:88:6 + \_operation: , line:81:16, endln:81:53 |vpiOpType:26 |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.rd_cs), line:81:17, endln:81:22 |vpiParent: - \_if_else: , line:78:3, endln:88:6 + \_operation: , line:81:17, endln:81:31 |vpiName:rd_cs |vpiFullName:work@syn_fifo.STATUS_COUNTER.rd_cs |vpiActual: @@ -8955,7 +8517,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.wr_cs), line:81:38, endln:81:43 |vpiParent: - \_operation: , line:81:36, endln:81:53 + \_operation: , line:81:38, endln:81:52 |vpiName:wr_cs |vpiFullName:work@syn_fifo.STATUS_COUNTER.wr_cs |vpiActual: @@ -8976,7 +8538,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:82:21, endln:82:31 |vpiParent: - \_operation: , line:81:16, endln:82:37 + \_operation: , line:82:21, endln:82:36 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9002,12 +8564,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:83:19, endln:83:33 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:82:39, endln:85:6 + \_assignment: , line:83:5, endln:83:33 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:83:19, endln:83:29 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:82:39, endln:85:6 + \_operation: , line:83:19, endln:83:33 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9023,7 +8585,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:83:5, endln:83:15 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:82:39, endln:85:6 + \_assignment: , line:83:5, endln:83:33 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9040,17 +8602,17 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:85:16, endln:85:53 |vpiParent: - \_if_else: , line:81:12, endln:88:6 + \_operation: , line:85:16, endln:86:44 |vpiOpType:26 |vpiOperand: \_operation: , line:85:17, endln:85:31 |vpiParent: - \_if_else: , line:81:12, endln:88:6 + \_operation: , line:85:16, endln:85:53 |vpiOpType:26 |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.wr_cs), line:85:17, endln:85:22 |vpiParent: - \_if_else: , line:81:12, endln:88:6 + \_operation: , line:85:17, endln:85:31 |vpiName:wr_cs |vpiFullName:work@syn_fifo.STATUS_COUNTER.wr_cs |vpiActual: @@ -9076,7 +8638,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.rd_cs), line:85:38, endln:85:43 |vpiParent: - \_operation: , line:85:36, endln:85:53 + \_operation: , line:85:38, endln:85:52 |vpiName:rd_cs |vpiFullName:work@syn_fifo.STATUS_COUNTER.rd_cs |vpiActual: @@ -9097,7 +8659,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:86:20, endln:86:30 |vpiParent: - \_operation: , line:85:16, endln:86:44 + \_operation: , line:86:20, endln:86:43 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9121,12 +8683,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:87:19, endln:87:33 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:86:46, endln:88:6 + \_assignment: , line:87:5, endln:87:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:87:19, endln:87:29 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:86:46, endln:88:6 + \_operation: , line:87:19, endln:87:33 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9142,7 +8704,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@syn_fifo.STATUS_COUNTER.status_cnt), line:87:5, endln:87:15 |vpiParent: - \_begin: (work@syn_fifo.STATUS_COUNTER), line:86:46, endln:88:6 + \_assignment: , line:87:5, endln:87:33 |vpiName:status_cnt |vpiFullName:work@syn_fifo.STATUS_COUNTER.status_cnt |vpiActual: @@ -9173,7 +8735,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@syn_fifo.RAM_DEPTH), line:45:31, endln:45:40 |vpiParent: - \_operation: , line:45:16, endln:45:43 + \_operation: , line:45:31, endln:45:42 |vpiName:RAM_DEPTH |vpiFullName:work@syn_fifo.RAM_DEPTH |vpiOperand: @@ -9407,7 +8969,7 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:17:17, endln:17:21 |vpiParent: - \_delay_control: , line:17:8, endln:17:10 + \_assignment: , line:17:11, endln:17:21 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@top.clk), line:17:18, endln:17:21 @@ -9420,7 +8982,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.clk), line:17:11, endln:17:14 |vpiParent: - \_delay_control: , line:17:8, endln:17:10 + \_assignment: , line:17:11, endln:17:21 |vpiName:clk |vpiFullName:work@top.clk |vpiActual: @@ -9461,8 +9023,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:22:9, endln:22:10 - |vpiParent: - \_assignment: , line:22:3, endln:22:10 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9470,7 +9030,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.clk), line:22:3, endln:22:6 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:22:3, endln:22:10 |vpiName:clk |vpiFullName:work@top.clk |vpiActual: @@ -9483,8 +9043,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:23:9, endln:23:10 - |vpiParent: - \_assignment: , line:23:3, endln:23:10 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9492,7 +9050,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.rst), line:23:3, endln:23:6 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:23:3, endln:23:10 |vpiName:rst |vpiFullName:work@top.rst |vpiActual: @@ -9505,8 +9063,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:24:10, endln:24:11 - |vpiParent: - \_assignment: , line:24:3, endln:24:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9514,7 +9070,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req0), line:24:3, endln:24:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:24:3, endln:24:11 |vpiName:req0 |vpiFullName:work@top.req0 |vpiActual: @@ -9527,8 +9083,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:25:10, endln:25:11 - |vpiParent: - \_assignment: , line:25:3, endln:25:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9536,7 +9090,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req1), line:25:3, endln:25:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:25:3, endln:25:11 |vpiName:req1 |vpiFullName:work@top.req1 |vpiActual: @@ -9549,8 +9103,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:26:10, endln:26:11 - |vpiParent: - \_assignment: , line:26:3, endln:26:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9558,7 +9110,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req2), line:26:3, endln:26:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:26:3, endln:26:11 |vpiName:req2 |vpiFullName:work@top.req2 |vpiActual: @@ -9571,8 +9123,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:10, endln:27:11 - |vpiParent: - \_assignment: , line:27:3, endln:27:11 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9580,7 +9130,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req3), line:27:3, endln:27:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:27:3, endln:27:11 |vpiName:req3 |vpiFullName:work@top.req3 |vpiActual: @@ -9598,8 +9148,6 @@ design: (work@dff_async_reset) |vpiBlocking:1 |vpiRhs: \_constant: , line:28:13, endln:28:14 - |vpiParent: - \_assignment: , line:28:7, endln:28:14 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9607,7 +9155,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.rst), line:28:7, endln:28:10 |vpiParent: - \_delay_control: , line:28:3, endln:28:6 + \_assignment: , line:28:7, endln:28:14 |vpiName:rst |vpiFullName:work@top.rst |vpiActual: @@ -9648,8 +9196,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:30:11, endln:30:12 - |vpiParent: - \_assignment: , line:30:3, endln:30:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9657,7 +9203,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req0), line:30:3, endln:30:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:30:3, endln:30:12 |vpiName:req0 |vpiFullName:work@top.req0 |vpiActual: @@ -9698,8 +9244,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:32:11, endln:32:12 - |vpiParent: - \_assignment: , line:32:3, endln:32:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9707,7 +9251,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req0), line:32:3, endln:32:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:32:3, endln:32:12 |vpiName:req0 |vpiFullName:work@top.req0 |vpiActual: @@ -9748,8 +9292,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:34:11, endln:34:12 - |vpiParent: - \_assignment: , line:34:3, endln:34:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9757,7 +9299,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req0), line:34:3, endln:34:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:34:3, endln:34:12 |vpiName:req0 |vpiFullName:work@top.req0 |vpiActual: @@ -9769,8 +9311,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:35:11, endln:35:12 - |vpiParent: - \_assignment: , line:35:3, endln:35:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9778,7 +9318,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req1), line:35:3, endln:35:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:35:3, endln:35:12 |vpiName:req1 |vpiFullName:work@top.req1 |vpiActual: @@ -9819,8 +9359,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:37:11, endln:37:12 - |vpiParent: - \_assignment: , line:37:3, endln:37:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9828,7 +9366,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req2), line:37:3, endln:37:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:37:3, endln:37:12 |vpiName:req2 |vpiFullName:work@top.req2 |vpiActual: @@ -9840,8 +9378,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:38:11, endln:38:12 - |vpiParent: - \_assignment: , line:38:3, endln:38:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9849,7 +9385,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req1), line:38:3, endln:38:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:38:3, endln:38:12 |vpiName:req1 |vpiFullName:work@top.req1 |vpiActual: @@ -9890,8 +9426,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:40:11, endln:40:12 - |vpiParent: - \_assignment: , line:40:3, endln:40:12 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -9899,7 +9433,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req3), line:40:3, endln:40:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:40:3, endln:40:12 |vpiName:req3 |vpiFullName:work@top.req3 |vpiActual: @@ -9911,8 +9445,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:41:11, endln:41:12 - |vpiParent: - \_assignment: , line:41:3, endln:41:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9920,7 +9452,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req2), line:41:3, endln:41:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:41:3, endln:41:12 |vpiName:req2 |vpiFullName:work@top.req2 |vpiActual: @@ -9961,8 +9493,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:43:11, endln:43:12 - |vpiParent: - \_assignment: , line:43:3, endln:43:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -9970,7 +9500,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req3), line:43:3, endln:43:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:43:3, endln:43:12 |vpiName:req3 |vpiFullName:work@top.req3 |vpiActual: @@ -10011,8 +9541,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:45:11, endln:45:12 - |vpiParent: - \_assignment: , line:45:3, endln:45:12 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10020,7 +9548,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@top.req0), line:45:3, endln:45:7 |vpiParent: - \_begin: (work@top), line:19:9, endln:48:4 + \_assignment: , line:45:3, endln:45:12 |vpiName:req0 |vpiFullName:work@top.req0 |vpiActual: @@ -10478,8 +10006,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:58:20, endln:58:21 - |vpiParent: - \_assignment: , line:58:3, endln:58:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10487,7 +10013,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_reg), line:58:3, endln:58:9 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:58:3, endln:58:21 |vpiName:rx_reg |vpiFullName:work@uart.rx_reg |vpiActual: @@ -10499,8 +10025,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:59:20, endln:59:21 - |vpiParent: - \_assignment: , line:59:3, endln:59:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10508,7 +10032,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_data), line:59:3, endln:59:10 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:59:3, endln:59:21 |vpiName:rx_data |vpiFullName:work@uart.rx_data |vpiActual: @@ -10520,8 +10044,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:60:20, endln:60:21 - |vpiParent: - \_assignment: , line:60:3, endln:60:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10529,7 +10051,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_sample_cnt), line:60:3, endln:60:16 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:60:3, endln:60:21 |vpiName:rx_sample_cnt |vpiFullName:work@uart.rx_sample_cnt |vpiActual: @@ -10541,8 +10063,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:61:20, endln:61:21 - |vpiParent: - \_assignment: , line:61:3, endln:61:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10550,7 +10070,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_cnt), line:61:3, endln:61:9 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:61:3, endln:61:21 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -10562,8 +10082,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:62:20, endln:62:21 - |vpiParent: - \_assignment: , line:62:3, endln:62:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10571,7 +10089,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_frame_err), line:62:3, endln:62:15 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:62:3, endln:62:21 |vpiName:rx_frame_err |vpiFullName:work@uart.rx_frame_err |vpiActual: @@ -10583,8 +10101,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:63:20, endln:63:21 - |vpiParent: - \_assignment: , line:63:3, endln:63:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10592,7 +10108,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_over_run), line:63:3, endln:63:14 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:63:3, endln:63:21 |vpiName:rx_over_run |vpiFullName:work@uart.rx_over_run |vpiActual: @@ -10604,8 +10120,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:64:20, endln:64:21 - |vpiParent: - \_assignment: , line:64:3, endln:64:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10613,7 +10127,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_empty), line:64:3, endln:64:11 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:64:3, endln:64:21 |vpiName:rx_empty |vpiFullName:work@uart.rx_empty |vpiActual: @@ -10625,8 +10139,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:65:20, endln:65:21 - |vpiParent: - \_assignment: , line:65:3, endln:65:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10634,7 +10146,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_d1), line:65:3, endln:65:8 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:65:3, endln:65:21 |vpiName:rx_d1 |vpiFullName:work@uart.rx_d1 |vpiActual: @@ -10646,8 +10158,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:66:20, endln:66:21 - |vpiParent: - \_assignment: , line:66:3, endln:66:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10655,7 +10165,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_d2), line:66:3, endln:66:8 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:66:3, endln:66:21 |vpiName:rx_d2 |vpiFullName:work@uart.rx_d2 |vpiActual: @@ -10667,8 +10177,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:67:20, endln:67:21 - |vpiParent: - \_assignment: , line:67:3, endln:67:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10676,7 +10184,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_busy), line:67:3, endln:67:10 |vpiParent: - \_begin: (work@uart), line:57:12, endln:68:4 + \_assignment: , line:67:3, endln:67:21 |vpiName:rx_busy |vpiFullName:work@uart.rx_busy |vpiActual: @@ -10694,7 +10202,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@uart.rx_in), line:70:12, endln:70:17 |vpiParent: - \_begin: (work@uart), line:68:10, endln:117:4 + \_assignment: , line:70:3, endln:70:17 |vpiName:rx_in |vpiFullName:work@uart.rx_in |vpiActual: @@ -10702,7 +10210,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_d1), line:70:3, endln:70:8 |vpiParent: - \_begin: (work@uart), line:68:10, endln:117:4 + \_assignment: , line:70:3, endln:70:17 |vpiName:rx_d1 |vpiFullName:work@uart.rx_d1 |vpiActual: @@ -10715,7 +10223,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@uart.rx_d1), line:71:12, endln:71:17 |vpiParent: - \_begin: (work@uart), line:68:10, endln:117:4 + \_assignment: , line:71:3, endln:71:17 |vpiName:rx_d1 |vpiFullName:work@uart.rx_d1 |vpiActual: @@ -10723,7 +10231,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_d2), line:71:3, endln:71:8 |vpiParent: - \_begin: (work@uart), line:68:10, endln:117:4 + \_assignment: , line:71:3, endln:71:17 |vpiName:rx_d2 |vpiFullName:work@uart.rx_d2 |vpiActual: @@ -10753,7 +10261,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@uart.rx_reg), line:74:17, endln:74:23 |vpiParent: - \_begin: (work@uart), line:73:20, endln:76:6 + \_assignment: , line:74:5, endln:74:23 |vpiName:rx_reg |vpiFullName:work@uart.rx_reg |vpiActual: @@ -10761,7 +10269,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_data), line:74:5, endln:74:12 |vpiParent: - \_begin: (work@uart), line:73:20, endln:76:6 + \_assignment: , line:74:5, endln:74:23 |vpiName:rx_data |vpiFullName:work@uart.rx_data |vpiActual: @@ -10773,8 +10281,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:75:17, endln:75:18 - |vpiParent: - \_assignment: , line:75:5, endln:75:18 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10782,7 +10288,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_empty), line:75:5, endln:75:13 |vpiParent: - \_begin: (work@uart), line:73:20, endln:76:6 + \_assignment: , line:75:5, endln:75:18 |vpiName:rx_empty |vpiFullName:work@uart.rx_empty |vpiActual: @@ -10816,7 +10322,7 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:80:9, endln:80:17 |vpiParent: - \_begin: (work@uart), line:78:18, endln:113:6 + \_operation: , line:80:9, endln:80:27 |vpiOpType:3 |vpiOperand: \_ref_obj: (work@uart.rx_busy), line:80:10, endln:80:17 @@ -10851,8 +10357,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:81:24, endln:81:25 - |vpiParent: - \_assignment: , line:81:7, endln:81:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10860,7 +10364,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_busy), line:81:7, endln:81:14 |vpiParent: - \_begin: (work@uart), line:80:29, endln:84:8 + \_assignment: , line:81:7, endln:81:25 |vpiName:rx_busy |vpiFullName:work@uart.rx_busy |vpiActual: @@ -10872,8 +10376,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:82:24, endln:82:25 - |vpiParent: - \_assignment: , line:82:7, endln:82:25 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -10881,7 +10383,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_sample_cnt), line:82:7, endln:82:20 |vpiParent: - \_begin: (work@uart), line:80:29, endln:84:8 + \_assignment: , line:82:7, endln:82:25 |vpiName:rx_sample_cnt |vpiFullName:work@uart.rx_sample_cnt |vpiActual: @@ -10893,8 +10395,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:83:24, endln:83:25 - |vpiParent: - \_assignment: , line:83:7, endln:83:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -10902,7 +10402,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_cnt), line:83:7, endln:83:13 |vpiParent: - \_begin: (work@uart), line:80:29, endln:84:8 + \_assignment: , line:83:7, endln:83:25 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -10932,12 +10432,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:87:25, endln:87:42 |vpiParent: - \_begin: (work@uart), line:86:18, endln:112:8 + \_assignment: , line:87:8, endln:87:42 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@uart.rx_sample_cnt), line:87:25, endln:87:38 |vpiParent: - \_begin: (work@uart), line:86:18, endln:112:8 + \_operation: , line:87:25, endln:87:42 |vpiName:rx_sample_cnt |vpiFullName:work@uart.rx_sample_cnt |vpiActual: @@ -10953,7 +10453,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_sample_cnt), line:87:8, endln:87:21 |vpiParent: - \_begin: (work@uart), line:86:18, endln:112:8 + \_assignment: , line:87:8, endln:87:42 |vpiName:rx_sample_cnt |vpiFullName:work@uart.rx_sample_cnt |vpiActual: @@ -10970,7 +10470,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.rx_sample_cnt), line:89:12, endln:89:25 |vpiParent: - \_begin: (work@uart), line:86:18, endln:112:8 + \_operation: , line:89:12, endln:89:30 |vpiName:rx_sample_cnt |vpiFullName:work@uart.rx_sample_cnt |vpiActual: @@ -11000,12 +10500,12 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:90:16, endln:90:26 |vpiParent: - \_begin: (work@uart), line:89:32, endln:111:11 + \_operation: , line:90:15, endln:90:44 |vpiOpType:14 |vpiOperand: \_ref_obj: (work@uart.rx_d2), line:90:16, endln:90:21 |vpiParent: - \_begin: (work@uart), line:89:32, endln:111:11 + \_operation: , line:90:16, endln:90:26 |vpiName:rx_d2 |vpiFullName:work@uart.rx_d2 |vpiActual: @@ -11026,7 +10526,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.rx_cnt), line:90:32, endln:90:38 |vpiParent: - \_operation: , line:90:15, endln:90:44 + \_operation: , line:90:32, endln:90:43 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11051,8 +10551,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:91:24, endln:91:25 - |vpiParent: - \_assignment: , line:91:13, endln:91:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11060,7 +10558,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_busy), line:91:13, endln:91:20 |vpiParent: - \_begin: (work@uart), line:90:46, endln:92:14 + \_assignment: , line:91:13, endln:91:25 |vpiName:rx_busy |vpiFullName:work@uart.rx_busy |vpiActual: @@ -11078,12 +10576,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:93:23, endln:93:33 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_assignment: , line:93:13, endln:93:33 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@uart.rx_cnt), line:93:23, endln:93:29 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_operation: , line:93:23, endln:93:33 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11099,7 +10597,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_cnt), line:93:13, endln:93:19 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_assignment: , line:93:13, endln:93:33 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11116,12 +10614,12 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:95:17, endln:95:27 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_operation: , line:95:17, endln:95:41 |vpiOpType:18 |vpiOperand: \_ref_obj: (work@uart.rx_cnt), line:95:17, endln:95:23 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_operation: , line:95:17, endln:95:27 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11142,7 +10640,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.rx_cnt), line:95:31, endln:95:37 |vpiParent: - \_operation: , line:95:17, endln:95:41 + \_operation: , line:95:31, endln:95:41 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11168,7 +10666,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@uart.rx_d2), line:96:37, endln:96:42 |vpiParent: - \_begin: (work@uart), line:95:43, endln:97:16 + \_assignment: , line:96:15, endln:96:42 |vpiName:rx_d2 |vpiFullName:work@uart.rx_d2 |vpiActual: @@ -11176,24 +10674,20 @@ design: (work@dff_async_reset) |vpiLhs: \_bit_select: (work@uart.rx_reg), line:96:15, endln:96:33 |vpiParent: - \_ref_obj: (work@uart.rx_reg) - |vpiParent: - \_assignment: , line:96:15, endln:96:42 - |vpiName:rx_reg - |vpiFullName:work@uart.rx_reg + \_assignment: , line:96:15, endln:96:42 |vpiName:rx_reg |vpiFullName:work@uart.rx_reg |vpiIndex: \_operation: , line:96:22, endln:96:32 |vpiParent: - \_begin: (work@uart), line:95:43, endln:97:16 + \_bit_select: (work@uart.rx_reg), line:96:15, endln:96:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@uart.rx_cnt), line:96:22, endln:96:28 + \_ref_obj: (work@uart.rx_reg.rx_cnt), line:96:22, endln:96:28 |vpiParent: - \_begin: (work@uart), line:95:43, endln:97:16 + \_operation: , line:96:22, endln:96:32 |vpiName:rx_cnt - |vpiFullName:work@uart.rx_cnt + |vpiFullName:work@uart.rx_reg.rx_cnt |vpiActual: \_logic_net: (work@uart.rx_cnt), line:47:14, endln:47:20 |vpiOperand: @@ -11216,7 +10710,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.rx_cnt), line:98:17, endln:98:23 |vpiParent: - \_begin: (work@uart), line:92:20, endln:110:14 + \_operation: , line:98:17, endln:98:28 |vpiName:rx_cnt |vpiFullName:work@uart.rx_cnt |vpiActual: @@ -11241,8 +10735,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:99:27, endln:99:28 - |vpiParent: - \_assignment: , line:99:16, endln:99:28 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11250,7 +10742,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_busy), line:99:16, endln:99:23 |vpiParent: - \_begin: (work@uart), line:98:30, endln:109:16 + \_assignment: , line:99:16, endln:99:28 |vpiName:rx_busy |vpiFullName:work@uart.rx_busy |vpiActual: @@ -11267,7 +10759,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.rx_d2), line:101:20, endln:101:25 |vpiParent: - \_begin: (work@uart), line:98:30, endln:109:16 + \_operation: , line:101:20, endln:101:30 |vpiName:rx_d2 |vpiFullName:work@uart.rx_d2 |vpiActual: @@ -11292,8 +10784,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:102:34, endln:102:35 - |vpiParent: - \_assignment: , line:102:18, endln:102:35 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11301,7 +10791,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_frame_err), line:102:18, endln:102:30 |vpiParent: - \_begin: (work@uart), line:101:32, endln:103:19 + \_assignment: , line:102:18, endln:102:35 |vpiName:rx_frame_err |vpiFullName:work@uart.rx_frame_err |vpiActual: @@ -11318,8 +10808,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:104:34, endln:104:35 - |vpiParent: - \_assignment: , line:104:18, endln:104:35 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11327,7 +10815,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_empty), line:104:18, endln:104:26 |vpiParent: - \_begin: (work@uart), line:103:25, endln:108:19 + \_assignment: , line:104:18, endln:104:35 |vpiName:rx_empty |vpiFullName:work@uart.rx_empty |vpiActual: @@ -11339,8 +10827,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:105:34, endln:105:35 - |vpiParent: - \_assignment: , line:105:18, endln:105:35 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11348,7 +10834,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_frame_err), line:105:18, endln:105:30 |vpiParent: - \_begin: (work@uart), line:103:25, endln:108:19 + \_assignment: , line:105:18, endln:105:35 |vpiName:rx_frame_err |vpiFullName:work@uart.rx_frame_err |vpiActual: @@ -11361,12 +10847,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:107:34, endln:107:52 |vpiParent: - \_begin: (work@uart), line:103:25, endln:108:19 + \_assignment: , line:107:18, endln:107:52 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@uart.rx_empty), line:107:35, endln:107:43 |vpiParent: - \_begin: (work@uart), line:103:25, endln:108:19 + \_operation: , line:107:34, endln:107:52 |vpiName:rx_empty |vpiFullName:work@uart.rx_empty |vpiActual: @@ -11390,7 +10876,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_over_run), line:107:18, endln:107:29 |vpiParent: - \_begin: (work@uart), line:103:25, endln:108:19 + \_assignment: , line:107:18, endln:107:52 |vpiName:rx_over_run |vpiFullName:work@uart.rx_over_run |vpiActual: @@ -11424,8 +10910,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:115:16, endln:115:17 - |vpiParent: - \_assignment: , line:115:5, endln:115:17 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11433,7 +10917,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.rx_busy), line:115:5, endln:115:12 |vpiParent: - \_begin: (work@uart), line:114:19, endln:116:6 + \_assignment: , line:115:5, endln:115:17 |vpiName:rx_busy |vpiFullName:work@uart.rx_busy |vpiActual: @@ -11496,8 +10980,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:122:20, endln:122:21 - |vpiParent: - \_assignment: , line:122:3, endln:122:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11505,7 +10987,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_reg), line:122:3, endln:122:9 |vpiParent: - \_begin: (work@uart), line:121:12, endln:127:4 + \_assignment: , line:122:3, endln:122:21 |vpiName:tx_reg |vpiFullName:work@uart.tx_reg |vpiActual: @@ -11517,8 +10999,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:123:20, endln:123:21 - |vpiParent: - \_assignment: , line:123:3, endln:123:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11526,7 +11006,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_empty), line:123:3, endln:123:11 |vpiParent: - \_begin: (work@uart), line:121:12, endln:127:4 + \_assignment: , line:123:3, endln:123:21 |vpiName:tx_empty |vpiFullName:work@uart.tx_empty |vpiActual: @@ -11538,8 +11018,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:124:20, endln:124:21 - |vpiParent: - \_assignment: , line:124:3, endln:124:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11547,7 +11025,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_over_run), line:124:3, endln:124:14 |vpiParent: - \_begin: (work@uart), line:121:12, endln:127:4 + \_assignment: , line:124:3, endln:124:21 |vpiName:tx_over_run |vpiFullName:work@uart.tx_over_run |vpiActual: @@ -11559,8 +11037,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:125:20, endln:125:21 - |vpiParent: - \_assignment: , line:125:3, endln:125:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11568,7 +11044,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_out), line:125:3, endln:125:9 |vpiParent: - \_begin: (work@uart), line:121:12, endln:127:4 + \_assignment: , line:125:3, endln:125:21 |vpiName:tx_out |vpiFullName:work@uart.tx_out |vpiActual: @@ -11580,8 +11056,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:126:20, endln:126:21 - |vpiParent: - \_assignment: , line:126:3, endln:126:21 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11589,7 +11063,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_cnt), line:126:3, endln:126:9 |vpiParent: - \_begin: (work@uart), line:121:12, endln:127:4 + \_assignment: , line:126:3, endln:126:21 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11645,8 +11119,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:130:24, endln:130:25 - |vpiParent: - \_assignment: , line:130:9, endln:130:25 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11654,7 +11126,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_over_run), line:130:9, endln:130:20 |vpiParent: - \_begin: (work@uart), line:129:22, endln:131:10 + \_assignment: , line:130:9, endln:130:25 |vpiName:tx_over_run |vpiFullName:work@uart.tx_over_run |vpiActual: @@ -11672,7 +11144,7 @@ design: (work@dff_async_reset) |vpiRhs: \_ref_obj: (work@uart.tx_data), line:132:21, endln:132:28 |vpiParent: - \_begin: (work@uart), line:131:16, endln:134:10 + \_assignment: , line:132:9, endln:132:28 |vpiName:tx_data |vpiFullName:work@uart.tx_data |vpiActual: @@ -11680,7 +11152,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_reg), line:132:9, endln:132:15 |vpiParent: - \_begin: (work@uart), line:131:16, endln:134:10 + \_assignment: , line:132:9, endln:132:28 |vpiName:tx_reg |vpiFullName:work@uart.tx_reg |vpiActual: @@ -11692,8 +11164,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:133:21, endln:133:22 - |vpiParent: - \_assignment: , line:133:9, endln:133:22 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11701,7 +11171,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_empty), line:133:9, endln:133:17 |vpiParent: - \_begin: (work@uart), line:131:16, endln:134:10 + \_assignment: , line:133:9, endln:133:22 |vpiName:tx_empty |vpiFullName:work@uart.tx_empty |vpiActual: @@ -11718,7 +11188,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.tx_enable), line:136:8, endln:136:17 |vpiParent: - \_begin: (work@uart), line:127:10, endln:153:4 + \_operation: , line:136:8, endln:136:30 |vpiName:tx_enable |vpiFullName:work@uart.tx_enable |vpiActual: @@ -11749,12 +11219,12 @@ design: (work@dff_async_reset) |vpiRhs: \_operation: , line:137:16, endln:137:26 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_assignment: , line:137:6, endln:137:26 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@uart.tx_cnt), line:137:16, endln:137:22 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_operation: , line:137:16, endln:137:26 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11770,7 +11240,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_cnt), line:137:6, endln:137:12 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_assignment: , line:137:6, endln:137:26 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11787,7 +11257,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.tx_cnt), line:138:10, endln:138:16 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_operation: , line:138:10, endln:138:21 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11812,8 +11282,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:139:18, endln:139:19 - |vpiParent: - \_assignment: , line:139:8, endln:139:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11821,7 +11289,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_out), line:139:8, endln:139:14 |vpiParent: - \_begin: (work@uart), line:138:23, endln:140:9 + \_assignment: , line:139:8, endln:139:19 |vpiName:tx_out |vpiFullName:work@uart.tx_out |vpiActual: @@ -11838,12 +11306,12 @@ design: (work@dff_async_reset) |vpiOperand: \_operation: , line:141:10, endln:141:20 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_operation: , line:141:10, endln:141:34 |vpiOpType:18 |vpiOperand: \_ref_obj: (work@uart.tx_cnt), line:141:10, endln:141:16 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_operation: , line:141:10, endln:141:20 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11864,7 +11332,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.tx_cnt), line:141:24, endln:141:30 |vpiParent: - \_operation: , line:141:10, endln:141:34 + \_operation: , line:141:24, endln:141:34 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11890,24 +11358,20 @@ design: (work@dff_async_reset) |vpiRhs: \_bit_select: (work@uart.tx_reg), line:142:19, endln:142:36 |vpiParent: - \_ref_obj: (work@uart.tx_reg) - |vpiParent: - \_assignment: , line:142:9, endln:142:36 - |vpiName:tx_reg - |vpiFullName:work@uart.tx_reg + \_assignment: , line:142:9, endln:142:36 |vpiName:tx_reg |vpiFullName:work@uart.tx_reg |vpiIndex: \_operation: , line:142:26, endln:142:35 |vpiParent: - \_begin: (work@uart), line:141:36, endln:143:9 + \_bit_select: (work@uart.tx_reg), line:142:19, endln:142:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@uart.tx_cnt), line:142:26, endln:142:32 + \_ref_obj: (work@uart.tx_reg.tx_cnt), line:142:26, endln:142:32 |vpiParent: - \_begin: (work@uart), line:141:36, endln:143:9 + \_operation: , line:142:26, endln:142:35 |vpiName:tx_cnt - |vpiFullName:work@uart.tx_cnt + |vpiFullName:work@uart.tx_reg.tx_cnt |vpiActual: \_logic_net: (work@uart.tx_cnt), line:42:14, endln:42:20 |vpiOperand: @@ -11921,7 +11385,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_out), line:142:9, endln:142:15 |vpiParent: - \_begin: (work@uart), line:141:36, endln:143:9 + \_assignment: , line:142:9, endln:142:36 |vpiName:tx_out |vpiFullName:work@uart.tx_out |vpiActual: @@ -11938,7 +11402,7 @@ design: (work@dff_async_reset) |vpiOperand: \_ref_obj: (work@uart.tx_cnt), line:144:10, endln:144:16 |vpiParent: - \_begin: (work@uart), line:136:32, endln:149:7 + \_operation: , line:144:10, endln:144:21 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -11963,8 +11427,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:145:18, endln:145:19 - |vpiParent: - \_assignment: , line:145:8, endln:145:19 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -11972,7 +11434,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_out), line:145:8, endln:145:14 |vpiParent: - \_begin: (work@uart), line:144:23, endln:148:9 + \_assignment: , line:145:8, endln:145:19 |vpiName:tx_out |vpiFullName:work@uart.tx_out |vpiActual: @@ -11984,8 +11446,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:146:18, endln:146:19 - |vpiParent: - \_assignment: , line:146:8, endln:146:19 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -11993,7 +11453,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_cnt), line:146:8, endln:146:14 |vpiParent: - \_begin: (work@uart), line:144:23, endln:148:9 + \_assignment: , line:146:8, endln:146:19 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -12005,8 +11465,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:147:20, endln:147:21 - |vpiParent: - \_assignment: , line:147:8, endln:147:21 |vpiDecompile:1 |vpiSize:64 |UINT:1 @@ -12014,7 +11472,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_empty), line:147:8, endln:147:16 |vpiParent: - \_begin: (work@uart), line:144:23, endln:148:9 + \_assignment: , line:147:8, endln:147:21 |vpiName:tx_empty |vpiFullName:work@uart.tx_empty |vpiActual: @@ -12048,8 +11506,6 @@ design: (work@dff_async_reset) |vpiOpType:82 |vpiRhs: \_constant: , line:151:16, endln:151:17 - |vpiParent: - \_assignment: , line:151:6, endln:151:17 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -12057,7 +11513,7 @@ design: (work@dff_async_reset) |vpiLhs: \_ref_obj: (work@uart.tx_cnt), line:151:6, endln:151:12 |vpiParent: - \_begin: (work@uart), line:150:20, endln:152:7 + \_assignment: , line:151:6, endln:151:17 |vpiName:tx_cnt |vpiFullName:work@uart.tx_cnt |vpiActual: @@ -16213,8 +15669,8 @@ design: (work@dff_async_reset) [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/encoder.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/encoder_000.v | 6 | 43 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/full_adder.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/full_adder_000.v | 6 | 18 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/jkff_udp.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/jkff_udp_000.v | 9 | 38 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/lfsr_task.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/lfsr_task_000.v | 13 | 37 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/m_input_mult.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/m_input_mult_000.v | 12 | 73 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/lfsr_task.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/lfsr_task_000.v | 14 | 37 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/m_input_mult.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/m_input_mult_000.v | 20 | 73 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/mux21.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/mux21_000.v | 9 | 22 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/synfifo.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/synfifo_000.v | 36 | 104 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/SimpleParserTest/uart.v | ${SURELOG_DIR}/build/regression/SimpleParserTest/roundtrip/uart_000.v | 32 | 155 | \ No newline at end of file diff --git a/third_party/tests/SimpleUVM/SimpleUVM.log b/third_party/tests/SimpleUVM/SimpleUVM.log index e7f1157570..6c2c1d7e08 100644 --- a/third_party/tests/SimpleUVM/SimpleUVM.log +++ b/third_party/tests/SimpleUVM/SimpleUVM.log @@ -774,8 +774,8 @@ case_stmt 83 chandle_typespec 6 chandle_var 2 class_defn 615 -class_typespec 8499 -class_var 3337 +class_typespec 8500 +class_var 3338 clocking_block 1 clocking_io_decl 4 constant 27405 @@ -810,7 +810,7 @@ int_var 1163 interface_inst 1 interface_typespec 1 io_decl 6908 -logic_net 310 +logic_net 313 logic_typespec 93 logic_var 39 long_int_typespec 99 @@ -831,7 +831,7 @@ range 2366 real_typespec 33 real_var 8 ref_module 1 -ref_obj 43987 +ref_obj 41792 ref_var 1788 repeat 27 return_stmt 3272 diff --git a/third_party/tests/SimpleVMM/SimpleVMM.log b/third_party/tests/SimpleVMM/SimpleVMM.log index 8e8362c706..87d19a73c1 100644 --- a/third_party/tests/SimpleVMM/SimpleVMM.log +++ b/third_party/tests/SimpleVMM/SimpleVMM.log @@ -248,7 +248,7 @@ operation 861 package 2 part_select 14 range 184 -ref_obj 4596 +ref_obj 4484 ref_var 317 return_stmt 278 string_typespec 568 diff --git a/third_party/tests/Tnoc/Tnoc.log b/third_party/tests/Tnoc/Tnoc.log index 747207cd72..5b02110a5b 100644 --- a/third_party/tests/Tnoc/Tnoc.log +++ b/third_party/tests/Tnoc/Tnoc.log @@ -5764,7 +5764,7 @@ part_select 380 port 5100 range 36855 ref_module 296 -ref_obj 110255 +ref_obj 102741 ref_var 60 return_stmt 169 short_int_typespec 667760 diff --git a/third_party/tests/UVMNestedSeq/UVMNestedSeq.log b/third_party/tests/UVMNestedSeq/UVMNestedSeq.log index 6c803f8542..5de76fb143 100644 --- a/third_party/tests/UVMNestedSeq/UVMNestedSeq.log +++ b/third_party/tests/UVMNestedSeq/UVMNestedSeq.log @@ -876,8 +876,8 @@ case_stmt 339 chandle_typespec 22 chandle_var 2 class_defn 685 -class_typespec 24253 -class_var 13564 +class_typespec 24278 +class_var 13589 constant 121655 constraint 32 continue_stmt 196 @@ -910,7 +910,7 @@ int_var 4059 interface_inst 4 interface_typespec 7 io_decl 18988 -logic_net 352 +logic_net 355 logic_typespec 334 logic_var 116 long_int_typespec 259 @@ -931,7 +931,7 @@ range 17473 real_typespec 49 real_var 8 ref_module 2 -ref_obj 170417 +ref_obj 161414 ref_var 7096 repeat 118 return_stmt 10392 diff --git a/third_party/tests/UVMSwitch/UVMSwitch.log b/third_party/tests/UVMSwitch/UVMSwitch.log index a0dd809e29..9658c2c747 100644 --- a/third_party/tests/UVMSwitch/UVMSwitch.log +++ b/third_party/tests/UVMSwitch/UVMSwitch.log @@ -6931,8 +6931,8 @@ case_stmt 90 chandle_typespec 6 chandle_var 2 class_defn 637 -class_typespec 9002 -class_var 3795 +class_typespec 9003 +class_var 3796 clocking_block 3 clocking_io_decl 9 constant 37559 @@ -6970,7 +6970,7 @@ integer_var 9 interface_inst 17 interface_typespec 6 io_decl 6968 -logic_net 562 +logic_net 565 logic_typespec 250 logic_var 44 long_int_typespec 99 @@ -6994,7 +6994,7 @@ range 6572 real_typespec 33 real_var 8 ref_module 3 -ref_obj 45583 +ref_obj 43270 ref_var 1821 repeat 30 return_stmt 3331 diff --git a/third_party/tests/UnitAmiqEth/UnitAmiqEth.log b/third_party/tests/UnitAmiqEth/UnitAmiqEth.log index 06d112e53f..0698d2cca5 100644 --- a/third_party/tests/UnitAmiqEth/UnitAmiqEth.log +++ b/third_party/tests/UnitAmiqEth/UnitAmiqEth.log @@ -1299,8 +1299,8 @@ case_stmt 206 chandle_typespec 10 chandle_var 2 class_defn 1147 -class_typespec 15489 -class_var 7154 +class_typespec 15496 +class_var 7161 constant 65850 constraint 11 continue_stmt 88 @@ -1353,7 +1353,7 @@ part_select 91 range 8687 real_typespec 55 real_var 11 -ref_obj 94354 +ref_obj 89542 ref_var 3474 repeat 50 return_stmt 6655 diff --git a/third_party/tests/YosysBigSim/aes_5cycle_2stage/YosysBigSimAes.log b/third_party/tests/YosysBigSim/aes_5cycle_2stage/YosysBigSimAes.log index 97130a7bd3..8058f878d1 100644 --- a/third_party/tests/YosysBigSim/aes_5cycle_2stage/YosysBigSimAes.log +++ b/third_party/tests/YosysBigSim/aes_5cycle_2stage/YosysBigSimAes.log @@ -63,7 +63,7 @@ part_select 212 port 228 range 532 ref_module 43 -ref_obj 1491 +ref_obj 992 ref_var 1 repeat 3 sys_func_call 20 @@ -78,8 +78,8 @@ while_stmt 1 [ NOTE] : 5 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_cipher_top_000.v | 235 | 479 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_key_expand_128.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_key_expand_128_000.v | 37 | 109 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_cipher_top_000.v | 303 | 479 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_key_expand_128.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_key_expand_128_000.v | 41 | 109 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_rcon.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_rcon_000.v | 12 | 90 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/rtl/aes_sbox.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/aes_sbox_000.v | 4 | 308 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/bench_000.v | 65 | 511 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/aes_5cycle_2stage/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimAes/roundtrip/bench_000.v | 69 | 511 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/amber23/YosysBigSimAmber23.log b/third_party/tests/YosysBigSim/amber23/YosysBigSimAmber23.log index a32fbf018b..91198f8f89 100644 --- a/third_party/tests/YosysBigSim/amber23/YosysBigSimAmber23.log +++ b/third_party/tests/YosysBigSim/amber23/YosysBigSimAmber23.log @@ -532,7 +532,7 @@ int_typespec 1363 integer_typespec 41 integer_var 25 io_decl 75 -logic_net 1795 +logic_net 1794 logic_typespec 1843 logic_var 202 module_inst 108 @@ -545,7 +545,7 @@ part_select 1027 port 939 range 2862 ref_module 18 -ref_obj 10040 +ref_obj 7224 ref_var 15 repeat 4 sys_func_call 28 @@ -560,25 +560,25 @@ var_select 45 [ NOTE] : 22 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_alu.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_alu_000.v | 49 | 172 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_barrel_shift.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_barrel_shift_000.v | 52 | 249 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_barrel_shift_fpga.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_barrel_shift_fpga_000.v | 89 | 301 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_cache.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_cache_000.v | 365 | 907 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_coprocessor.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_coprocessor_000.v | 62 | 196 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_alu.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_alu_000.v | 54 | 172 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_barrel_shift.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_barrel_shift_000.v | 156 | 249 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_barrel_shift_fpga.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_barrel_shift_fpga_000.v | 96 | 301 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_cache.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_cache_000.v | 393 | 907 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_coprocessor.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_coprocessor_000.v | 66 | 196 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_core.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_core_000.v | 263 | 357 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_decode.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_decode_000.v | 335 | 1697 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_decode.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_decode_000.v | 421 | 1697 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_decompile.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_decompile_000.v | 687 | 904 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_execute.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_execute_000.v | 269 | 615 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_fetch.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_fetch_000.v | 77 | 172 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_functions.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_functions_000.v | 35 | 174 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_execute.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_execute_000.v | 283 | 615 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_fetch.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_fetch_000.v | 78 | 172 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_functions.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_functions_000.v | 36 | 174 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_localparams.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_localparams_000.v | 55 | 115 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_multiply.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_multiply_000.v | 58 | 198 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_ram_register_bank.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_ram_register_bank_000.v | 108 | 324 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_multiply.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_multiply_000.v | 66 | 198 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_ram_register_bank.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_ram_register_bank_000.v | 115 | 324 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_register_bank.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_register_bank_000.v | 120 | 372 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_wishbone.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_wishbone_000.v | 66 | 305 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/debug_functions.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/debug_functions_000.v | 8 | 227 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/a23_wishbone.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/a23_wishbone_000.v | 71 | 305 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/debug_functions.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/debug_functions_000.v | 138 | 227 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/generic_sram_byte_en.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/generic_sram_byte_en_000.v | 22 | 81 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/generic_sram_line_en.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/generic_sram_line_en_000.v | 17 | 83 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/memory_configuration.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/memory_configuration_000.v | 30 | 158 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/bench_000.v | 160 | 267 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/rtl/memory_configuration.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/memory_configuration_000.v | 36 | 158 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/bench_000.v | 164 | 267 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/amber23/sim/sieve.vh | ${SURELOG_DIR}/build/regression/YosysBigSimAmber23/roundtrip/sieve_000.vh | 0 | 49 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/elliptic_curve_group/YosysBigSimEllip.log b/third_party/tests/YosysBigSim/elliptic_curve_group/YosysBigSimEllip.log index 116b012ee8..7d4c85ba77 100644 --- a/third_party/tests/YosysBigSim/elliptic_curve_group/YosysBigSimEllip.log +++ b/third_party/tests/YosysBigSim/elliptic_curve_group/YosysBigSimEllip.log @@ -203,7 +203,7 @@ package 2 part_select 249 port 147 range 104 -ref_obj 959 +ref_obj 681 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysBigSimEllip/slpp_all/surelog.uhdm ... @@ -217,5 +217,5 @@ task 9 [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/elliptic_curve_group/rtl/ecg.v | ${SURELOG_DIR}/build/regression/YosysBigSimEllip/roundtrip/ecg_000.v | 150 | 269 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/elliptic_curve_group/rtl/f3.v | ${SURELOG_DIR}/build/regression/YosysBigSimEllip/roundtrip/f3_000.v | 45 | 70 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/elliptic_curve_group/rtl/f3m.v | ${SURELOG_DIR}/build/regression/YosysBigSimEllip/roundtrip/f3m_000.v | 849 | 1227 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/elliptic_curve_group/rtl/f3m.v | ${SURELOG_DIR}/build/regression/YosysBigSimEllip/roundtrip/f3m_000.v | 1057 | 1227 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/elliptic_curve_group/rtl/fun.v | ${SURELOG_DIR}/build/regression/YosysBigSimEllip/roundtrip/fun_000.v | 21 | 39 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/lm32/YosysBigSimLm32.log b/third_party/tests/YosysBigSim/lm32/YosysBigSimLm32.log index 76932b132f..587c2eefca 100644 --- a/third_party/tests/YosysBigSim/lm32/YosysBigSimLm32.log +++ b/third_party/tests/YosysBigSim/lm32/YosysBigSimLm32.log @@ -216,7 +216,7 @@ part_select 258 port 1290 range 1082 ref_module 25 -ref_obj 5558 +ref_obj 5033 ref_var 5 repeat 2 string_typespec 11 @@ -234,23 +234,23 @@ var_select 8 [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_adder.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_adder_000.v | 43 | 135 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_addsub.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_addsub_000.v | 25 | 95 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_cpu.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_cpu_000.v | 2283 | 3123 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_cpu.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_cpu_000.v | 2289 | 3123 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_dcache.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_dcache_000.v | 282 | 537 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_debug.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_debug_000.v | 197 | 365 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_decoder.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_decoder_000.v | 390 | 601 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_decoder.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_decoder_000.v | 399 | 601 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_dp_ram.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_dp_ram_000.v | 59 | 145 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_dtlb.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_dtlb_000.v | 156 | 296 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_icache.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_icache_000.v | 271 | 516 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_icache.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_icache_000.v | 272 | 516 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_include.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_include_000.v | 16 | 61 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_instruction_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_instruction_unit_000.v | 635 | 955 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_interrupt.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_interrupt_000.v | 182 | 388 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_instruction_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_instruction_unit_000.v | 637 | 955 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_interrupt.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_interrupt_000.v | 185 | 388 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_itlb.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_itlb_000.v | 141 | 275 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_jtag.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_jtag_000.v | 58 | 110 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_load_store_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_load_store_unit_000.v | 540 | 895 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_load_store_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_load_store_unit_000.v | 543 | 895 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_logic_op.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_logic_op_000.v | 20 | 97 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_mc_arithmetic.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_mc_arithmetic_000.v | 171 | 309 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_mc_arithmetic.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_mc_arithmetic_000.v | 173 | 309 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_multiplier.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_multiplier_000.v | 33 | 120 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_ram.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_ram_000.v | 53 | 138 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_shifter.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_shifter_000.v | 47 | 155 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/rtl/lm32_top.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/lm32_top_000.v | 220 | 353 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/sim/tb_lm32_system.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/tb_lm32_system_000.v | 217 | 390 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/lm32/sim/tb_lm32_system.v | ${SURELOG_DIR}/build/regression/YosysBigSimLm32/roundtrip/tb_lm32_system_000.v | 237 | 390 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/openmsp430/YosysBigSimOpenMsp.log b/third_party/tests/YosysBigSim/openmsp430/YosysBigSimOpenMsp.log index 7efc6c6a45..c7bbd73bec 100644 --- a/third_party/tests/YosysBigSim/openmsp430/YosysBigSimOpenMsp.log +++ b/third_party/tests/YosysBigSim/openmsp430/YosysBigSimOpenMsp.log @@ -173,7 +173,7 @@ part_select 223 port 994 range 1644 ref_module 16 -ref_obj 5706 +ref_obj 4405 ref_var 2 sys_func_call 12 task 9 @@ -188,19 +188,19 @@ while_stmt 1 [ NOTE] : 16 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_alu.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_alu_000.v | 100 | 258 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_alu.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_alu_000.v | 102 | 258 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_clock_module.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_clock_module_000.v | 598 | 1058 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_dbg.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_dbg_000.v | 413 | 864 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_dbg_uart.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_dbg_uart_000.v | 109 | 298 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_execution_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_execution_unit_000.v | 209 | 423 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_frontend.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_frontend_000.v | 383 | 966 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_dbg.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_dbg_000.v | 416 | 864 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_dbg_uart.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_dbg_uart_000.v | 111 | 298 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_execution_unit.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_execution_unit_000.v | 212 | 423 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_frontend.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_frontend_000.v | 388 | 966 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_mem_backbone.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_mem_backbone_000.v | 105 | 275 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_multiplier.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_multiplier_000.v | 186 | 422 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_register_file.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_register_file_000.v | 359 | 618 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_multiplier.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_multiplier_000.v | 188 | 422 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_register_file.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_register_file_000.v | 360 | 618 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_sfr.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_sfr_000.v | 159 | 373 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_sync_cell.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_sync_cell_000.v | 14 | 79 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_sync_reset.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_sync_reset_000.v | 13 | 77 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_watchdog.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_watchdog_000.v | 267 | 556 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/omsp_watchdog.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/omsp_watchdog_000.v | 268 | 556 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/rtl/openMSP430.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/openMSP430_000.v | 412 | 607 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/bench_000.v | 113 | 230 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/bench_000.v | 119 | 230 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/openmsp430/sim/sieve.v | ${SURELOG_DIR}/build/regression/YosysBigSimOpenMsp/roundtrip/sieve_000.v | 0 | 118 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/reed_solomon_decoder/YosysBigSimReed.log b/third_party/tests/YosysBigSim/reed_solomon_decoder/YosysBigSimReed.log index e203bda2d7..6b5c3a7bc6 100644 --- a/third_party/tests/YosysBigSim/reed_solomon_decoder/YosysBigSimReed.log +++ b/third_party/tests/YosysBigSim/reed_solomon_decoder/YosysBigSimReed.log @@ -116,7 +116,7 @@ part_select 63 port 876 range 1245 ref_module 24 -ref_obj 4561 +ref_obj 3464 ref_var 11 sys_func_call 14 === UHDM Object Stats End === @@ -129,16 +129,16 @@ sys_func_call 14 [ NOTE] : 10 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/BM_lamda.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/BM_lamda_000.v | 82 | 327 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/BM_lamda.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/BM_lamda_000.v | 83 | 327 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/DP_RAM.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/DP_RAM_000.v | 21 | 51 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/GF_matrix_ascending_binary.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/GF_matrix_ascending_binary_000.v | 19 | 295 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/GF_matrix_dec.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/GF_matrix_dec_000.v | 19 | 296 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/GF_mult_add_syndromes.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/GF_mult_add_syndromes_000.v | 46 | 266 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/GF_mult_add_syndromes.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/GF_mult_add_syndromes_000.v | 47 | 266 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/Omega_Phy.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/Omega_Phy_000.v | 68 | 772 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/RS_dec.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/RS_dec_000.v | 390 | 868 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/error_correction.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/error_correction_000.v | 106 | 455 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/input_syndromes.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/input_syndromes_000.v | 143 | 487 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/lamda_roots.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/lamda_roots_000.v | 105 | 325 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/error_correction.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/error_correction_000.v | 114 | 455 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/input_syndromes.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/input_syndromes_000.v | 158 | 487 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/lamda_roots.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/lamda_roots_000.v | 111 | 325 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/out_stage.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/out_stage_000.v | 30 | 131 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/rtl/transport_in2out.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/transport_in2out_000.v | 24 | 98 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/reed_solomon_decoder/sim/RS_dec_tb.v | ${SURELOG_DIR}/build/regression/YosysBigSimReed/roundtrip/RS_dec_tb_000.v | 32 | 166 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/softusb_navre/YosysBigSimSoft.log b/third_party/tests/YosysBigSim/softusb_navre/YosysBigSimSoft.log index a7706cf3b3..ca292c9c01 100644 --- a/third_party/tests/YosysBigSim/softusb_navre/YosysBigSimSoft.log +++ b/third_party/tests/YosysBigSim/softusb_navre/YosysBigSimSoft.log @@ -64,7 +64,7 @@ parameter 96 part_select 89 port 34 range 157 -ref_obj 1216 +ref_obj 912 ref_var 4 sys_func_call 12 while_stmt 1 @@ -78,6 +78,6 @@ while_stmt 1 [ NOTE] : 6 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/softusb_navre/rtl/softusb_navre.v | ${SURELOG_DIR}/build/regression/YosysBigSimSoft/roundtrip/softusb_navre_000.v | 192 | 1032 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/softusb_navre/rtl/softusb_navre.v | ${SURELOG_DIR}/build/regression/YosysBigSimSoft/roundtrip/softusb_navre_000.v | 238 | 1032 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/softusb_navre/sim/bench.v | ${SURELOG_DIR}/build/regression/YosysBigSimSoft/roundtrip/bench_000.v | 52 | 139 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBigSim/softusb_navre/sim/sieve.vh | ${SURELOG_DIR}/build/regression/YosysBigSimSoft/roundtrip/sieve_000.vh | 0 | 120 | \ No newline at end of file diff --git a/third_party/tests/YosysBigSim/verilog-pong/YosysBigSimPong.log b/third_party/tests/YosysBigSim/verilog-pong/YosysBigSimPong.log index 9aeea9bae1..a7acdbd8eb 100644 --- a/third_party/tests/YosysBigSim/verilog-pong/YosysBigSimPong.log +++ b/third_party/tests/YosysBigSim/verilog-pong/YosysBigSimPong.log @@ -77,7 +77,7 @@ part_select 37 port 131 range 173 ref_module 4 -ref_obj 2850 +ref_obj 2795 ref_var 3 repeat 2 sys_func_call 7 diff --git a/third_party/tests/YosysBoom/YosysSmallBoom.log b/third_party/tests/YosysBoom/YosysSmallBoom.log index f5407926ad..d186465a56 100644 --- a/third_party/tests/YosysBoom/YosysSmallBoom.log +++ b/third_party/tests/YosysBoom/YosysSmallBoom.log @@ -2063,7 +2063,7 @@ part_select 2387 port 50466 range 101278 ref_module 622 -ref_obj 339097 +ref_obj 332388 string_typespec 2 sys_func_call 3121 task 9 @@ -2077,4 +2077,4 @@ task 9 [ NOTE] : 296 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBoom/SmallBoom.v | ${SURELOG_DIR}/build/regression/YosysSmallBoom/roundtrip/SmallBoom_000.v | 130714 | 228458 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysBoom/SmallBoom.v | ${SURELOG_DIR}/build/regression/YosysSmallBoom/roundtrip/SmallBoom_000.v | 133101 | 228458 | \ No newline at end of file diff --git a/third_party/tests/YosysCam/YosysCam.log b/third_party/tests/YosysCam/YosysCam.log index 6859c85255..b9f3112f78 100644 --- a/third_party/tests/YosysCam/YosysCam.log +++ b/third_party/tests/YosysCam/YosysCam.log @@ -1462,7 +1462,7 @@ part_select 634 port 944 range 2883 ref_module 86 -ref_obj 11572 +ref_obj 8732 ref_var 6 string_typespec 67 sys_func_call 2 diff --git a/third_party/tests/YosysDsp/YosysDsp.log b/third_party/tests/YosysDsp/YosysDsp.log index 44aff19a11..62a7cf8320 100644 --- a/third_party/tests/YosysDsp/YosysDsp.log +++ b/third_party/tests/YosysDsp/YosysDsp.log @@ -2907,7 +2907,7 @@ part_select 71 port 7967 range 11016 ref_module 388 -ref_obj 20774 +ref_obj 14917 string_typespec 8 sys_func_call 13 task 9 diff --git a/third_party/tests/YosysIce40/YosysIce40.log b/third_party/tests/YosysIce40/YosysIce40.log index 54587f317a..76fb89c556 100644 --- a/third_party/tests/YosysIce40/YosysIce40.log +++ b/third_party/tests/YosysIce40/YosysIce40.log @@ -661,7 +661,7 @@ part_select 1050 port 2253 range 2728 ref_module 54 -ref_obj 14153 +ref_obj 9357 ref_var 2 sys_func_call 101 task 10 diff --git a/third_party/tests/YosysMarlann/YosysMarlann.log b/third_party/tests/YosysMarlann/YosysMarlann.log index 4340a9c533..e6b457ed48 100644 --- a/third_party/tests/YosysMarlann/YosysMarlann.log +++ b/third_party/tests/YosysMarlann/YosysMarlann.log @@ -77,7 +77,7 @@ parameter 6 part_select 62 port 66 range 267 -ref_obj 584 +ref_obj 421 sys_func_call 54 task 9 var_select 2 @@ -91,4 +91,4 @@ var_select 2 [ NOTE] : 7 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysMarlann/marlann_compute.v | ${SURELOG_DIR}/build/regression/YosysMarlann/roundtrip/marlann_compute_000.v | 160 | 563 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysMarlann/marlann_compute.v | ${SURELOG_DIR}/build/regression/YosysMarlann/roundtrip/marlann_compute_000.v | 190 | 563 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/aes_core/YosysOldAes.log b/third_party/tests/YosysOldTests/aes_core/YosysOldAes.log index c8ec66660b..1576d5188a 100644 --- a/third_party/tests/YosysOldTests/aes_core/YosysOldAes.log +++ b/third_party/tests/YosysOldTests/aes_core/YosysOldAes.log @@ -82,7 +82,7 @@ part_select 215 port 233 range 624 ref_module 39 -ref_obj 1704 +ref_obj 1465 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldAes/slpp_unit/surelog.uhdm ... @@ -94,9 +94,9 @@ task 9 [ NOTE] : 8 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_cipher_top_000.v | 106 | 254 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_inv_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_inv_cipher_top_000.v | 115 | 326 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_cipher_top_000.v | 142 | 254 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_inv_cipher_top.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_inv_cipher_top_000.v | 167 | 326 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_inv_sbox.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_inv_sbox_000.v | 13 | 326 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_key_expand_128.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_key_expand_128_000.v | 23 | 86 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_key_expand_128.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_key_expand_128_000.v | 27 | 86 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_rcon.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_rcon_000.v | 19 | 96 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/aes_core/rtl/aes_sbox.v | ${SURELOG_DIR}/build/regression/YosysOldAes/roundtrip/aes_sbox_000.v | 13 | 327 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/i2c/YosysOldI2c.log b/third_party/tests/YosysOldTests/i2c/YosysOldI2c.log index 1a2313a6b3..968de514ff 100644 --- a/third_party/tests/YosysOldTests/i2c/YosysOldI2c.log +++ b/third_party/tests/YosysOldTests/i2c/YosysOldI2c.log @@ -76,7 +76,7 @@ part_select 9 port 151 range 108 ref_module 2 -ref_obj 711 +ref_obj 687 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldI2c/slpp_unit/surelog.uhdm ... @@ -89,5 +89,5 @@ task 9 [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/i2c/rtl/i2c_master_bit_ctrl.v | ${SURELOG_DIR}/build/regression/YosysOldI2c/roundtrip/i2c_master_bit_ctrl_000.v | 94 | 535 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/i2c/rtl/i2c_master_byte_ctrl.v | ${SURELOG_DIR}/build/regression/YosysOldI2c/roundtrip/i2c_master_byte_ctrl_000.v | 95 | 344 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/i2c/rtl/i2c_master_top.v | ${SURELOG_DIR}/build/regression/YosysOldI2c/roundtrip/i2c_master_top_000.v | 92 | 301 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/i2c/rtl/i2c_master_byte_ctrl.v | ${SURELOG_DIR}/build/regression/YosysOldI2c/roundtrip/i2c_master_byte_ctrl_000.v | 96 | 344 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/i2c/rtl/i2c_master_top.v | ${SURELOG_DIR}/build/regression/YosysOldI2c/roundtrip/i2c_master_top_000.v | 99 | 301 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/openmsp430/YosysOldOpen.log b/third_party/tests/YosysOldTests/openmsp430/YosysOldOpen.log index c31f37259b..302960c86d 100644 --- a/third_party/tests/YosysOldTests/openmsp430/YosysOldOpen.log +++ b/third_party/tests/YosysOldTests/openmsp430/YosysOldOpen.log @@ -196,7 +196,7 @@ part_select 218 port 1047 range 1601 ref_module 16 -ref_obj 5780 +ref_obj 4570 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldOpen/slpp_unit/surelog.uhdm ... @@ -208,24 +208,24 @@ task 9 [ NOTE] : 28 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_alu.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_alu_000.v | 100 | 258 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_alu.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_alu_000.v | 102 | 258 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_and_gate.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_and_gate_000.v | 16 | 86 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_clock_gate.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_clock_gate_000.v | 16 | 84 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_clock_module.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_clock_module_000.v | 598 | 1058 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_clock_mux.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_clock_mux_000.v | 32 | 189 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_dbg.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_dbg_000.v | 396 | 827 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_dbg.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_dbg_000.v | 399 | 827 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_dbg_hwbrk.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_dbg_hwbrk_000.v | 104 | 282 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_dbg_uart.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_dbg_uart_000.v | 109 | 298 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_execution_unit.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_execution_unit_000.v | 211 | 420 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_frontend.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_frontend_000.v | 383 | 966 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_dbg_uart.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_dbg_uart_000.v | 111 | 298 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_execution_unit.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_execution_unit_000.v | 214 | 420 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_frontend.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_frontend_000.v | 388 | 966 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_mem_backbone.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_mem_backbone_000.v | 105 | 275 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_multiplier.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_multiplier_000.v | 185 | 420 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_register_file.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_register_file_000.v | 359 | 618 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_multiplier.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_multiplier_000.v | 187 | 420 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_register_file.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_register_file_000.v | 360 | 618 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_scan_mux.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_scan_mux_000.v | 13 | 73 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_sfr.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_sfr_000.v | 151 | 353 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_sync_cell.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_sync_cell_000.v | 14 | 79 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_sync_reset.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_sync_reset_000.v | 13 | 77 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_wakeup_cell.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_wakeup_cell_000.v | 35 | 104 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_watchdog.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_watchdog_000.v | 267 | 556 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/omsp_watchdog.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/omsp_watchdog_000.v | 268 | 556 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/openMSP430.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/openMSP430_000.v | 399 | 584 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/openmsp430/rtl/openMSP430_defines.v | ${SURELOG_DIR}/build/regression/YosysOldOpen/roundtrip/openMSP430_defines_000.v | 10 | 46 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/or1200/YosysOldOr.log b/third_party/tests/YosysOldTests/or1200/YosysOldOr.log index 8c827a95f5..d3c9652ff0 100644 --- a/third_party/tests/YosysOldTests/or1200/YosysOldOr.log +++ b/third_party/tests/YosysOldTests/or1200/YosysOldOr.log @@ -539,7 +539,7 @@ part_select 604 port 23225 range 3553 ref_module 1334 -ref_obj 58606 +ref_obj 38447 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldOr/slpp_all/surelog.uhdm ... diff --git a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log index ed18851227..8f20efcb76 100644 --- a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log +++ b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log @@ -64,7 +64,7 @@ part_select 2 port 85 range 104 ref_module 2 -ref_obj 1877 +ref_obj 1267 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldSasc/slpp_unit/surelog.uhdm ... diff --git a/third_party/tests/YosysOldTests/simple_spi/YosysOldSimpleSpi.log b/third_party/tests/YosysOldTests/simple_spi/YosysOldSimpleSpi.log index b473c26d66..dd7555b6b0 100644 --- a/third_party/tests/YosysOldTests/simple_spi/YosysOldSimpleSpi.log +++ b/third_party/tests/YosysOldTests/simple_spi/YosysOldSimpleSpi.log @@ -68,7 +68,7 @@ part_select 6 port 71 range 82 ref_module 2 -ref_obj 360 +ref_obj 337 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldSimpleSpi/slpp_unit/surelog.uhdm ... @@ -81,4 +81,4 @@ task 9 [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/simple_spi/rtl/fifo4.v | ${SURELOG_DIR}/build/regression/YosysOldSimpleSpi/roundtrip/fifo4_000.v | 28 | 134 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/simple_spi/rtl/simple_spi_top.v | ${SURELOG_DIR}/build/regression/YosysOldSimpleSpi/roundtrip/simple_spi_top_000.v | 97 | 328 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/simple_spi/rtl/simple_spi_top.v | ${SURELOG_DIR}/build/regression/YosysOldSimpleSpi/roundtrip/simple_spi_top_000.v | 99 | 328 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/spi/YosysOldSpi.log b/third_party/tests/YosysOldTests/spi/YosysOldSpi.log index bba71e6162..c9a09cfdd8 100644 --- a/third_party/tests/YosysOldTests/spi/YosysOldSpi.log +++ b/third_party/tests/YosysOldTests/spi/YosysOldSpi.log @@ -79,7 +79,7 @@ part_select 64 port 113 range 68 ref_module 2 -ref_obj 514 +ref_obj 410 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldSpi/slpp_unit/surelog.uhdm ... diff --git a/third_party/tests/YosysOldTests/ss_pcm/YosysOldSsPcm.log b/third_party/tests/YosysOldTests/ss_pcm/YosysOldSsPcm.log index 0cc9fa702a..fa452e7f56 100644 --- a/third_party/tests/YosysOldTests/ss_pcm/YosysOldSsPcm.log +++ b/third_party/tests/YosysOldTests/ss_pcm/YosysOldSsPcm.log @@ -42,7 +42,7 @@ operation 54 part_select 7 port 22 range 28 -ref_obj 154 +ref_obj 143 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldSsPcm/slpp_unit/surelog.uhdm ... @@ -53,4 +53,4 @@ ref_obj 154 [ NOTE] : 6 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/ss_pcm/rtl/pcm_slv_top.v | ${SURELOG_DIR}/build/regression/YosysOldSsPcm/roundtrip/pcm_slv_top_000.v | 56 | 221 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/ss_pcm/rtl/pcm_slv_top.v | ${SURELOG_DIR}/build/regression/YosysOldSsPcm/roundtrip/pcm_slv_top_000.v | 60 | 221 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/systemcaes/YosysOldSystem.log b/third_party/tests/YosysOldTests/systemcaes/YosysOldSystem.log index 55f41abe35..0530bfd2b7 100644 --- a/third_party/tests/YosysOldTests/systemcaes/YosysOldSystem.log +++ b/third_party/tests/YosysOldTests/systemcaes/YosysOldSystem.log @@ -396,7 +396,7 @@ part_select 123 port 178 range 382 ref_module 9 -ref_obj 1439 +ref_obj 907 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldSystem/slpp_all/surelog.uhdm ... @@ -409,9 +409,9 @@ task 9 [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/aes.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/aes_000.v | 141 | 358 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/byte_mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/byte_mixcolum_000.v | 10 | 92 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/keysched.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/keysched_000.v | 78 | 248 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/mixcolum_000.v | 55 | 188 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/byte_mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/byte_mixcolum_000.v | 12 | 92 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/keysched.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/keysched_000.v | 86 | 248 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/mixcolum_000.v | 63 | 188 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/sbox.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/sbox_000.v | 93 | 392 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/subbytes.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/subbytes_000.v | 100 | 259 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/word_mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/word_mixcolum_000.v | 32 | 124 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/subbytes.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/subbytes_000.v | 135 | 259 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysOldTests/systemcaes/rtl/word_mixcolum.v | ${SURELOG_DIR}/build/regression/YosysOldSystem/roundtrip/word_mixcolum_000.v | 40 | 124 | \ No newline at end of file diff --git a/third_party/tests/YosysOldTests/usb_phy/YosysOldUsb.log b/third_party/tests/YosysOldTests/usb_phy/YosysOldUsb.log index 368c0fdcbf..2357153daa 100644 --- a/third_party/tests/YosysOldTests/usb_phy/YosysOldUsb.log +++ b/third_party/tests/YosysOldTests/usb_phy/YosysOldUsb.log @@ -70,7 +70,7 @@ part_select 2 port 102 range 75 ref_module 2 -ref_obj 706 +ref_obj 696 task 9 === UHDM Object Stats End === [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/YosysOldUsb/slpp_all/surelog.uhdm ... diff --git a/third_party/tests/YosysRiscv/YosysRiscv.log b/third_party/tests/YosysRiscv/YosysRiscv.log index a1ee1623ed..c2685408dc 100644 --- a/third_party/tests/YosysRiscv/YosysRiscv.log +++ b/third_party/tests/YosysRiscv/YosysRiscv.log @@ -186,7 +186,7 @@ part_select 74 port 251 range 648 ref_module 37 -ref_obj 1151 +ref_obj 774 ref_var 10 task 9 === UHDM Object Stats End === @@ -199,5 +199,5 @@ task 9 [ NOTE] : 15 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysRiscv/shifter64.v | ${SURELOG_DIR}/build/regression/YosysRiscv/roundtrip/shifter64_000.v | 53 | 121 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysRiscv/smartbextdep.v | ${SURELOG_DIR}/build/regression/YosysRiscv/roundtrip/smartbextdep_000.v | 254 | 373 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysRiscv/shifter64.v | ${SURELOG_DIR}/build/regression/YosysRiscv/roundtrip/shifter64_000.v | 66 | 121 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysRiscv/smartbextdep.v | ${SURELOG_DIR}/build/regression/YosysRiscv/roundtrip/smartbextdep_000.v | 289 | 373 | \ No newline at end of file diff --git a/third_party/tests/YosysSmall/YosysSmall.log b/third_party/tests/YosysSmall/YosysSmall.log index dab7cc3a4f..b6960800f7 100644 --- a/third_party/tests/YosysSmall/YosysSmall.log +++ b/third_party/tests/YosysSmall/YosysSmall.log @@ -95,7 +95,7 @@ package 2 part_select 1 port 28 range 48 -ref_obj 370 +ref_obj 94 ref_var 3 sys_func_call 3 task 9 diff --git a/third_party/tests/YosysVerx/YosysVerx.log b/third_party/tests/YosysVerx/YosysVerx.log index 45688af0c1..07b0ca6960 100644 --- a/third_party/tests/YosysVerx/YosysVerx.log +++ b/third_party/tests/YosysVerx/YosysVerx.log @@ -79,7 +79,7 @@ part_select 281 port 219 range 38 ref_module 2 -ref_obj 6265 +ref_obj 5434 sys_func_call 24 task 9 === UHDM Object Stats End === @@ -92,4 +92,4 @@ task 9 [ NOTE] : 8 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysVerx/vexriscv.demo.GenFull.v | ${SURELOG_DIR}/build/regression/YosysVerx/roundtrip/vexriscv.demo.GenFull_000.v | 2946 | 7202 | \ No newline at end of file +[roundtrip]: ${SURELOG_DIR}/third_party/tests/YosysVerx/vexriscv.demo.GenFull.v | ${SURELOG_DIR}/build/regression/YosysVerx/roundtrip/vexriscv.demo.GenFull_000.v | 3117 | 7202 | \ No newline at end of file diff --git a/third_party/tests/oh/BasicOh.log b/third_party/tests/oh/BasicOh.log index f4cf2a9469..7dcac1b90a 100644 --- a/third_party/tests/oh/BasicOh.log +++ b/third_party/tests/oh/BasicOh.log @@ -2,563 +2,563 @@ [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". - -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". [INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". +[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux9.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux7.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao222.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao211.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa21.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi211.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mxi4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx4.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_nand3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux5.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xor2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux8.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa22.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao21.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mx2.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai221.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ao221.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa311.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai31.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai222.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux6.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v". [INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v". -[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v". +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v". + +[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v". [INF:CM0029] Using global timescale: "1ns/1ns". @@ -1310,7 +1310,7 @@ part_select 551 port 1224 range 801 ref_module 47 -ref_obj 3922 +ref_obj 3254 ref_var 12 string_typespec 114 sys_func_call 14 @@ -1370,7 +1370,7 @@ part_select 716 port 1375 range 801 ref_module 47 -ref_obj 4558 +ref_obj 3660 ref_var 15 string_typespec 114 sys_func_call 14 @@ -2013,14 +2013,12 @@ design: (work@oh_fifo_async) \_operation: , line:20:15, endln:20:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:20:16, endln:20:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:20:16, endln:20:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:20:16, endln:20:19 - |vpiParent: - \_operation: , line:20:16, endln:20:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:20:16, endln:20:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:20:20, endln:20:21 @@ -2048,14 +2046,12 @@ design: (work@oh_fifo_async) \_operation: , line:20:15, endln:20:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:20:37, endln:20:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:20:37, endln:20:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:20:37, endln:20:40 - |vpiParent: - \_operation: , line:20:37, endln:20:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:20:37, endln:20:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:20:41, endln:20:42 @@ -2098,14 +2094,12 @@ design: (work@oh_fifo_async) \_operation: , line:22:15, endln:22:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:22:16, endln:22:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:22:16, endln:22:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:22:16, endln:22:19 - |vpiParent: - \_operation: , line:22:16, endln:22:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:22:16, endln:22:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:22:20, endln:22:21 @@ -2133,14 +2127,12 @@ design: (work@oh_fifo_async) \_operation: , line:22:15, endln:22:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:22:37, endln:22:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:22:37, endln:22:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:22:37, endln:22:40 - |vpiParent: - \_operation: , line:22:37, endln:22:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:22:37, endln:22:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:22:41, endln:22:42 @@ -2178,14 +2170,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:24:11, endln:24:33 |vpiOpType:14 |vpiOperand: - \_part_select: , line:24:16, endln:24:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:24:16, endln:24:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:24:16, endln:24:19 - |vpiParent: - \_operation: , line:24:16, endln:24:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:24:16, endln:24:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:24:20, endln:24:21 @@ -2238,14 +2228,12 @@ design: (work@oh_fifo_async) \_operation: , line:26:15, endln:26:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:26:16, endln:26:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:26:16, endln:26:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:26:16, endln:26:19 - |vpiParent: - \_operation: , line:26:16, endln:26:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:26:16, endln:26:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:20, endln:26:21 @@ -2273,14 +2261,12 @@ design: (work@oh_fifo_async) \_operation: , line:26:15, endln:26:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:26:37, endln:26:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:26:37, endln:26:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:26:37, endln:26:40 - |vpiParent: - \_operation: , line:26:37, endln:26:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:26:37, endln:26:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:41, endln:26:42 @@ -2308,14 +2294,12 @@ design: (work@oh_fifo_async) \_operation: , line:26:15, endln:27:33 |vpiOpType:14 |vpiOperand: - \_part_select: , line:27:16, endln:27:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:27:16, endln:27:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:27:16, endln:27:19 - |vpiParent: - \_operation: , line:27:16, endln:27:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:27:16, endln:27:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:27:20, endln:27:21 @@ -2343,14 +2327,12 @@ design: (work@oh_fifo_async) \_operation: , line:26:15, endln:27:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:27:37, endln:27:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:27:37, endln:27:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:27:37, endln:27:40 - |vpiParent: - \_operation: , line:27:37, endln:27:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:27:37, endln:27:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:27:41, endln:27:42 @@ -2413,14 +2395,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:29:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:29:16, endln:29:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:29:16, endln:29:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:29:16, endln:29:19 - |vpiParent: - \_operation: , line:29:16, endln:29:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:29:16, endln:29:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:29:20, endln:29:21 @@ -2448,14 +2428,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:29:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:29:37, endln:29:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:29:37, endln:29:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:29:37, endln:29:40 - |vpiParent: - \_operation: , line:29:37, endln:29:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:29:37, endln:29:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:29:41, endln:29:42 @@ -2483,14 +2461,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:30:26 |vpiOpType:14 |vpiOperand: - \_part_select: , line:30:9, endln:30:17 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:30:9, endln:30:17 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:30:9, endln:30:12 - |vpiParent: - \_operation: , line:30:9, endln:30:25 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:30:9, endln:30:25 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:30:13, endln:30:14 @@ -2518,14 +2494,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:30:47 |vpiOpType:14 |vpiOperand: - \_part_select: , line:30:30, endln:30:38 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:30:30, endln:30:38 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:30:30, endln:30:33 - |vpiParent: - \_operation: , line:30:30, endln:30:46 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:30:30, endln:30:46 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:30:34, endln:30:35 @@ -2553,14 +2527,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:31:26 |vpiOpType:14 |vpiOperand: - \_part_select: , line:31:9, endln:31:17 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:31:9, endln:31:17 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:31:9, endln:31:12 - |vpiParent: - \_operation: , line:31:9, endln:31:25 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:31:9, endln:31:25 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:31:13, endln:31:14 @@ -2588,14 +2560,12 @@ design: (work@oh_fifo_async) \_operation: , line:29:15, endln:31:47 |vpiOpType:14 |vpiOperand: - \_part_select: , line:31:30, endln:31:38 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:31:30, endln:31:38 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:31:30, endln:31:33 - |vpiParent: - \_operation: , line:31:30, endln:31:46 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:31:30, endln:31:46 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:31:34, endln:31:35 @@ -2648,14 +2618,12 @@ design: (work@oh_fifo_async) \_operation: , line:33:15, endln:33:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:33:16, endln:33:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:33:16, endln:33:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:33:16, endln:33:19 - |vpiParent: - \_operation: , line:33:16, endln:33:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:33:16, endln:33:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:20, endln:33:21 @@ -2683,14 +2651,12 @@ design: (work@oh_fifo_async) \_operation: , line:33:15, endln:33:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:33:37, endln:33:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:33:37, endln:33:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:33:37, endln:33:40 - |vpiParent: - \_operation: , line:33:37, endln:33:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:33:37, endln:33:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:33:41, endln:33:42 @@ -2718,14 +2684,12 @@ design: (work@oh_fifo_async) \_operation: , line:33:15, endln:34:26 |vpiOpType:14 |vpiOperand: - \_part_select: , line:34:9, endln:34:17 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:34:9, endln:34:17 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:34:9, endln:34:12 - |vpiParent: - \_operation: , line:34:9, endln:34:25 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:34:9, endln:34:25 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:13, endln:34:14 @@ -2753,14 +2717,12 @@ design: (work@oh_fifo_async) \_operation: , line:33:15, endln:34:47 |vpiOpType:14 |vpiOperand: - \_part_select: , line:34:30, endln:34:38 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:34:30, endln:34:38 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:34:30, endln:34:33 - |vpiParent: - \_operation: , line:34:30, endln:34:46 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:34:30, endln:34:46 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:34:34, endln:34:35 @@ -2808,14 +2770,12 @@ design: (work@oh_fifo_async) \_operation: , line:37:15, endln:37:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:37:16, endln:37:24 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:37:16, endln:37:24 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:37:16, endln:37:19 - |vpiParent: - \_operation: , line:37:16, endln:37:32 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:37:16, endln:37:32 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:37:20, endln:37:21 @@ -2843,14 +2803,12 @@ design: (work@oh_fifo_async) \_operation: , line:37:15, endln:37:54 |vpiOpType:14 |vpiOperand: - \_part_select: , line:37:37, endln:37:45 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:37:37, endln:37:45 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:37:37, endln:37:40 - |vpiParent: - \_operation: , line:37:37, endln:37:53 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:37:37, endln:37:53 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:37:41, endln:37:42 @@ -2878,14 +2836,12 @@ design: (work@oh_fifo_async) \_operation: , line:37:15, endln:38:26 |vpiOpType:14 |vpiOperand: - \_part_select: , line:38:9, endln:38:17 + \_part_select: bcd (work@oh_7seg_decode.bcd), line:38:9, endln:38:17 |vpiParent: - \_ref_obj: bcd (work@oh_7seg_decode.bcd), line:38:9, endln:38:12 - |vpiParent: - \_operation: , line:38:9, endln:38:25 - |vpiName:bcd - |vpiFullName:work@oh_7seg_decode.bcd - |vpiDefName:bcd + \_operation: , line:38:9, endln:38:25 + |vpiName:bcd + |vpiFullName:work@oh_7seg_decode.bcd + |vpiDefName:bcd |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:38:13, endln:38:14 @@ -3135,10 +3091,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (in), line:21:23, endln:21:30 |vpiParent: - \_ref_obj: (in) - |vpiParent: - \_operation: , line:21:23, endln:21:62 - |vpiName:in + \_operation: , line:21:23, endln:21:62 |vpiName:in |vpiIndex: \_operation: , line:21:26, endln:21:29 @@ -3167,27 +3120,26 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:21:33, endln:21:43 |vpiParent: - \_operation: , line:21:23, endln:21:62 + \_operation: , line:21:33, endln:21:50 |vpiOpType:4 |vpiOperand: - \_part_select: , line:21:34, endln:21:43 + \_part_select: in (in), line:21:34, endln:21:43 |vpiParent: - \_ref_obj: in (in), line:21:34, endln:21:36 - |vpiParent: - \_operation: , line:21:33, endln:21:43 - |vpiName:in - |vpiDefName:in + \_operation: , line:21:33, endln:21:43 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:37, endln:21:40 |vpiParent: - \_operation: , line:21:33, endln:21:43 + \_part_select: in (in), line:21:34, endln:21:43 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:37, endln:21:38 + \_ref_obj: (in.N), line:21:37, endln:21:38 |vpiParent: - \_operation: , line:21:33, endln:21:43 + \_operation: , line:21:37, endln:21:40 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:21:39, endln:21:40 |vpiParent: @@ -3211,24 +3163,23 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiOperand: - \_part_select: , line:21:53, endln:21:62 + \_part_select: in (in), line:21:53, endln:21:62 |vpiParent: - \_ref_obj: in (in), line:21:53, endln:21:55 - |vpiParent: - \_operation: , line:21:23, endln:21:62 - |vpiName:in - |vpiDefName:in + \_operation: , line:21:23, endln:21:62 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:56, endln:21:59 |vpiParent: - \_operation: , line:21:23, endln:21:62 + \_part_select: in (in), line:21:53, endln:21:62 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:56, endln:21:57 + \_ref_obj: (in.N), line:21:56, endln:21:57 |vpiParent: - \_operation: , line:21:23, endln:21:62 + \_operation: , line:21:56, endln:21:59 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:21:58, endln:21:59 |vpiParent: @@ -3244,22 +3195,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:21:10, endln:21:20 + \_part_select: out (out), line:21:10, endln:21:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:21:10, endln:21:62 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:21:10, endln:21:62 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:14, endln:21:17 + |vpiParent: + \_part_select: out (out), line:21:10, endln:21:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:14, endln:21:15 + \_ref_obj: (out.N), line:21:14, endln:21:15 |vpiParent: \_operation: , line:21:14, endln:21:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:21:16, endln:21:17 |vpiParent: @@ -3284,10 +3236,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (in), line:22:23, endln:22:30 |vpiParent: - \_ref_obj: (in) - |vpiParent: - \_operation: , line:22:23, endln:22:46 - |vpiName:in + \_operation: , line:22:23, endln:22:46 |vpiName:in |vpiIndex: \_operation: , line:22:26, endln:22:29 @@ -3319,24 +3268,23 @@ design: (work@oh_fifo_async) \_operation: , line:22:33, endln:22:46 |vpiOpType:7 |vpiOperand: - \_part_select: , line:22:36, endln:22:45 + \_part_select: in (in), line:22:36, endln:22:45 |vpiParent: - \_ref_obj: in (in), line:22:36, endln:22:38 - |vpiParent: - \_operation: , line:22:35, endln:22:45 - |vpiName:in - |vpiDefName:in + \_operation: , line:22:35, endln:22:45 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:39, endln:22:42 |vpiParent: - \_operation: , line:22:35, endln:22:45 + \_part_select: in (in), line:22:36, endln:22:45 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:39, endln:22:40 + \_ref_obj: (in.N), line:22:39, endln:22:40 |vpiParent: - \_operation: , line:22:35, endln:22:45 + \_operation: , line:22:39, endln:22:42 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:22:41, endln:22:42 |vpiParent: @@ -3366,20 +3314,21 @@ design: (work@oh_fifo_async) \_port: (out), line:28:5, endln:28:26 |vpiName:out |vpiHighConn: - \_part_select: , line:28:15, endln:28:25 - |vpiParent: - \_ref_obj: out (out), line:28:15, endln:28:18 - |vpiName:out - |vpiDefName:out + \_part_select: out (out), line:28:15, endln:28:25 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:19, endln:28:22 + |vpiParent: + \_part_select: out (out), line:28:15, endln:28:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:19, endln:28:20 + \_ref_obj: (out.N), line:28:19, endln:28:20 |vpiParent: \_operation: , line:28:19, endln:28:22 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:28:21, endln:28:22 |vpiParent: @@ -3404,20 +3353,21 @@ design: (work@oh_fifo_async) \_port: (in), line:31:5, endln:31:24 |vpiName:in |vpiHighConn: - \_part_select: , line:31:14, endln:31:23 - |vpiParent: - \_ref_obj: in (in), line:31:14, endln:31:16 - |vpiName:in - |vpiDefName:in + \_part_select: in (in), line:31:14, endln:31:23 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:17, endln:31:20 + |vpiParent: + \_part_select: in (in), line:31:14, endln:31:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:17, endln:31:18 + \_ref_obj: (in.N), line:31:17, endln:31:18 |vpiParent: \_operation: , line:31:17, endln:31:20 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:31:19, endln:31:20 |vpiParent: @@ -3813,22 +3763,23 @@ design: (work@oh_fifo_async) \_operation: , line:26:30, endln:26:55 |vpiOpType:24 |vpiOperand: - \_part_select: , line:26:30, endln:26:38 + \_part_select: a (a), line:26:30, endln:26:38 |vpiParent: - \_ref_obj: a (a), line:26:30, endln:26:31 - |vpiParent: - \_operation: , line:26:30, endln:26:49 - |vpiName:a - |vpiDefName:a + \_operation: , line:26:30, endln:26:49 + |vpiName:a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:32, endln:26:35 + |vpiParent: + \_part_select: a (a), line:26:30, endln:26:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:32, endln:26:33 + \_ref_obj: (a.N), line:26:32, endln:26:33 |vpiParent: \_operation: , line:26:32, endln:26:35 |vpiName:N + |vpiFullName:a.N |vpiOperand: \_constant: , line:26:34, endln:26:35 |vpiParent: @@ -3844,24 +3795,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:26:41, endln:26:49 + \_part_select: b (b), line:26:41, endln:26:49 |vpiParent: - \_ref_obj: b (b), line:26:41, endln:26:42 - |vpiParent: - \_operation: , line:26:30, endln:26:49 - |vpiName:b - |vpiDefName:b + \_operation: , line:26:30, endln:26:49 + |vpiName:b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:43, endln:26:46 |vpiParent: - \_operation: , line:26:30, endln:26:49 + \_part_select: b (b), line:26:41, endln:26:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:43, endln:26:44 + \_ref_obj: (b.N), line:26:43, endln:26:44 |vpiParent: - \_operation: , line:26:30, endln:26:49 + \_operation: , line:26:43, endln:26:46 |vpiName:N + |vpiFullName:b.N |vpiOperand: \_constant: , line:26:45, endln:26:46 |vpiParent: @@ -3892,22 +3842,23 @@ design: (work@oh_fifo_async) \_operation: , line:26:11, endln:26:15 |vpiName:cout |vpiOperand: - \_part_select: , line:26:16, endln:26:26 + \_part_select: sum (sum), line:26:16, endln:26:26 |vpiParent: - \_ref_obj: sum (sum) - |vpiParent: - \_operation: , line:26:11, endln:26:15 - |vpiName:sum - |vpiDefName:sum + \_operation: , line:26:11, endln:26:15 + |vpiName:sum + |vpiDefName:sum |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:20, endln:26:23 + |vpiParent: + \_part_select: sum (sum), line:26:16, endln:26:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:20, endln:26:21 + \_ref_obj: (sum.N), line:26:20, endln:26:21 |vpiParent: \_operation: , line:26:20, endln:26:23 |vpiName:N + |vpiFullName:sum.N |vpiOperand: \_constant: , line:26:22, endln:26:23 |vpiParent: @@ -3946,20 +3897,21 @@ design: (work@oh_fifo_async) \_port: (sum), line:34:6, endln:34:24 |vpiName:sum |vpiHighConn: - \_part_select: , line:34:13, endln:34:23 - |vpiParent: - \_ref_obj: sum (sum), line:34:13, endln:34:16 - |vpiName:sum - |vpiDefName:sum + \_part_select: sum (sum), line:34:13, endln:34:23 + |vpiName:sum + |vpiDefName:sum |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:17, endln:34:20 + |vpiParent: + \_part_select: sum (sum), line:34:13, endln:34:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:34:17, endln:34:18 + \_ref_obj: (sum.N), line:34:17, endln:34:18 |vpiParent: \_operation: , line:34:17, endln:34:20 |vpiName:N + |vpiFullName:sum.N |vpiOperand: \_constant: , line:34:19, endln:34:20 |vpiParent: @@ -3978,20 +3930,21 @@ design: (work@oh_fifo_async) \_port: (carry), line:35:6, endln:35:27 |vpiName:carry |vpiHighConn: - \_part_select: , line:35:14, endln:35:26 - |vpiParent: - \_ref_obj: carry (carry), line:35:14, endln:35:19 - |vpiName:carry - |vpiDefName:carry + \_part_select: carry (carry), line:35:14, endln:35:26 + |vpiName:carry + |vpiDefName:carry |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:20, endln:35:23 + |vpiParent: + \_part_select: carry (carry), line:35:14, endln:35:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:35:20, endln:35:21 + \_ref_obj: (carry.N), line:35:20, endln:35:21 |vpiParent: \_operation: , line:35:20, endln:35:23 |vpiName:N + |vpiFullName:carry.N |vpiOperand: \_constant: , line:35:22, endln:35:23 |vpiParent: @@ -4016,20 +3969,21 @@ design: (work@oh_fifo_async) \_port: (a), line:38:6, endln:38:20 |vpiName:a |vpiHighConn: - \_part_select: , line:38:11, endln:38:19 - |vpiParent: - \_ref_obj: a (a), line:38:11, endln:38:12 - |vpiName:a - |vpiDefName:a + \_part_select: a (a), line:38:11, endln:38:19 + |vpiName:a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:13, endln:38:16 + |vpiParent: + \_part_select: a (a), line:38:11, endln:38:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:38:13, endln:38:14 + \_ref_obj: (a.N), line:38:13, endln:38:14 |vpiParent: \_operation: , line:38:13, endln:38:16 |vpiName:N + |vpiFullName:a.N |vpiOperand: \_constant: , line:38:15, endln:38:16 |vpiParent: @@ -4048,20 +4002,21 @@ design: (work@oh_fifo_async) \_port: (b), line:39:6, endln:39:20 |vpiName:b |vpiHighConn: - \_part_select: , line:39:11, endln:39:19 - |vpiParent: - \_ref_obj: b (b), line:39:11, endln:39:12 - |vpiName:b - |vpiDefName:b + \_part_select: b (b), line:39:11, endln:39:19 + |vpiName:b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:13, endln:39:16 + |vpiParent: + \_part_select: b (b), line:39:11, endln:39:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:39:13, endln:39:14 + \_ref_obj: (b.N), line:39:13, endln:39:14 |vpiParent: \_operation: , line:39:13, endln:39:16 |vpiName:N + |vpiFullName:b.N |vpiOperand: \_constant: , line:39:15, endln:39:16 |vpiParent: @@ -4080,20 +4035,21 @@ design: (work@oh_fifo_async) \_port: (k), line:40:6, endln:40:20 |vpiName:k |vpiHighConn: - \_part_select: , line:40:11, endln:40:19 - |vpiParent: - \_ref_obj: k (k), line:40:11, endln:40:12 - |vpiName:k - |vpiDefName:k + \_part_select: k (k), line:40:11, endln:40:19 + |vpiName:k + |vpiDefName:k |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:40:13, endln:40:16 + |vpiParent: + \_part_select: k (k), line:40:11, endln:40:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:40:13, endln:40:14 + \_ref_obj: (k.N), line:40:13, endln:40:14 |vpiParent: \_operation: , line:40:13, endln:40:16 |vpiName:N + |vpiFullName:k.N |vpiOperand: \_constant: , line:40:15, endln:40:16 |vpiParent: @@ -4386,20 +4342,21 @@ design: (work@oh_fifo_async) \_port: (z), line:27:5, endln:27:20 |vpiName:z |vpiHighConn: - \_part_select: , line:27:11, endln:27:19 - |vpiParent: - \_ref_obj: z (z), line:27:11, endln:27:12 - |vpiName:z - |vpiDefName:z + \_part_select: z (z), line:27:11, endln:27:19 + |vpiName:z + |vpiDefName:z |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:13, endln:27:16 + |vpiParent: + \_part_select: z (z), line:27:11, endln:27:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:27:13, endln:27:14 + \_ref_obj: (z.N), line:27:13, endln:27:14 |vpiParent: \_operation: , line:27:13, endln:27:16 |vpiName:N + |vpiFullName:z.N |vpiOperand: \_constant: , line:27:15, endln:27:16 |vpiParent: @@ -4418,20 +4375,21 @@ design: (work@oh_fifo_async) \_port: (a), line:29:5, endln:29:20 |vpiName:a |vpiHighConn: - \_part_select: , line:29:11, endln:29:19 - |vpiParent: - \_ref_obj: a (a), line:29:11, endln:29:12 - |vpiName:a - |vpiDefName:a + \_part_select: a (a), line:29:11, endln:29:19 + |vpiName:a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:13, endln:29:16 + |vpiParent: + \_part_select: a (a), line:29:11, endln:29:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:13, endln:29:14 + \_ref_obj: (a.N), line:29:13, endln:29:14 |vpiParent: \_operation: , line:29:13, endln:29:16 |vpiName:N + |vpiFullName:a.N |vpiOperand: \_constant: , line:29:15, endln:29:16 |vpiParent: @@ -4450,20 +4408,21 @@ design: (work@oh_fifo_async) \_port: (b), line:30:5, endln:30:20 |vpiName:b |vpiHighConn: - \_part_select: , line:30:11, endln:30:19 - |vpiParent: - \_ref_obj: b (b), line:30:11, endln:30:12 - |vpiName:b - |vpiDefName:b + \_part_select: b (b), line:30:11, endln:30:19 + |vpiName:b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:13, endln:30:16 + |vpiParent: + \_part_select: b (b), line:30:11, endln:30:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:13, endln:30:14 + \_ref_obj: (b.N), line:30:13, endln:30:14 |vpiParent: \_operation: , line:30:13, endln:30:16 |vpiName:N + |vpiFullName:b.N |vpiOperand: \_constant: , line:30:15, endln:30:16 |vpiParent: @@ -5894,7 +5853,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ao22.b0), line:17:28, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:36 + \_operation: , line:17:28, endln:17:35 |vpiName:b0 |vpiFullName:work@oh_ao22.b0 |vpiOperand: @@ -6254,7 +6213,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ao221.b0), line:18:28, endln:18:30 |vpiParent: - \_operation: , line:18:15, endln:18:36 + \_operation: , line:18:28, endln:18:35 |vpiName:b0 |vpiFullName:work@oh_ao221.b0 |vpiOperand: @@ -6666,7 +6625,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ao222.b0), line:19:28, endln:19:30 |vpiParent: - \_operation: , line:19:15, endln:19:36 + \_operation: , line:19:28, endln:19:35 |vpiName:b0 |vpiFullName:work@oh_ao222.b0 |vpiOperand: @@ -6683,7 +6642,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ao222.c0), line:19:40, endln:19:42 |vpiParent: - \_operation: , line:19:15, endln:19:48 + \_operation: , line:19:40, endln:19:47 |vpiName:c0 |vpiFullName:work@oh_ao222.c0 |vpiOperand: @@ -7724,7 +7683,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ao32.b0), line:17:33, endln:17:35 |vpiParent: - \_operation: , line:17:15, endln:17:41 + \_operation: , line:17:33, endln:17:40 |vpiName:b0 |vpiFullName:work@oh_ao32.b0 |vpiOperand: @@ -8136,12 +8095,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:33, endln:18:40 |vpiParent: - \_operation: , line:18:15, endln:18:46 + \_operation: , line:18:33, endln:18:45 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_ao33.b0), line:18:33, endln:18:35 |vpiParent: - \_operation: , line:18:15, endln:18:46 + \_operation: , line:18:33, endln:18:40 |vpiName:b0 |vpiFullName:work@oh_ao33.b0 |vpiOperand: @@ -8393,12 +8352,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:32 + \_operation: , line:16:17, endln:16:31 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi21.a0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:32 + \_operation: , line:16:18, endln:16:25 |vpiName:a0 |vpiFullName:work@oh_aoi21.a0 |vpiOperand: @@ -8696,17 +8655,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:17, endln:17:31 |vpiParent: - \_operation: , line:17:15, endln:17:37 + \_operation: , line:17:17, endln:17:36 |vpiOpType:29 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:37 + \_operation: , line:17:17, endln:17:31 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi211.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:37 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_aoi211.a0 |vpiOperand: @@ -9010,12 +8969,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:39 + \_operation: , line:16:17, endln:16:38 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi22.a0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:39 + \_operation: , line:16:18, endln:16:25 |vpiName:a0 |vpiFullName:work@oh_aoi22.a0 |vpiOperand: @@ -9032,7 +8991,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_aoi22.b0), line:16:30, endln:16:32 |vpiParent: - \_operation: , line:16:17, endln:16:38 + \_operation: , line:16:30, endln:16:37 |vpiName:b0 |vpiFullName:work@oh_aoi22.b0 |vpiOperand: @@ -9370,17 +9329,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:17, endln:18:38 |vpiParent: - \_operation: , line:18:15, endln:18:44 + \_operation: , line:18:17, endln:18:43 |vpiOpType:29 |vpiOperand: \_operation: , line:18:18, endln:18:25 |vpiParent: - \_operation: , line:18:15, endln:18:44 + \_operation: , line:18:17, endln:18:38 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi221.a0), line:18:18, endln:18:20 |vpiParent: - \_operation: , line:18:15, endln:18:44 + \_operation: , line:18:18, endln:18:25 |vpiName:a0 |vpiFullName:work@oh_aoi221.a0 |vpiOperand: @@ -9397,7 +9356,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_aoi221.b0), line:18:30, endln:18:32 |vpiParent: - \_operation: , line:18:17, endln:18:38 + \_operation: , line:18:30, endln:18:37 |vpiName:b0 |vpiFullName:work@oh_aoi221.b0 |vpiOperand: @@ -9787,17 +9746,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:19:17, endln:19:38 |vpiParent: - \_operation: , line:19:15, endln:19:51 + \_operation: , line:19:17, endln:19:50 |vpiOpType:29 |vpiOperand: \_operation: , line:19:18, endln:19:25 |vpiParent: - \_operation: , line:19:15, endln:19:51 + \_operation: , line:19:17, endln:19:38 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi222.a0), line:19:18, endln:19:20 |vpiParent: - \_operation: , line:19:15, endln:19:51 + \_operation: , line:19:18, endln:19:25 |vpiName:a0 |vpiFullName:work@oh_aoi222.a0 |vpiOperand: @@ -9814,7 +9773,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_aoi222.b0), line:19:30, endln:19:32 |vpiParent: - \_operation: , line:19:17, endln:19:38 + \_operation: , line:19:30, endln:19:37 |vpiName:b0 |vpiFullName:work@oh_aoi222.b0 |vpiOperand: @@ -9831,7 +9790,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_aoi222.c0), line:19:42, endln:19:44 |vpiParent: - \_operation: , line:19:17, endln:19:50 + \_operation: , line:19:42, endln:19:49 |vpiName:c0 |vpiFullName:work@oh_aoi222.c0 |vpiOperand: @@ -10123,17 +10082,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:30 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:17, endln:16:36 |vpiOpType:28 |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:18, endln:16:30 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi31.a0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:18, endln:16:25 |vpiName:a0 |vpiFullName:work@oh_aoi31.a0 |vpiOperand: @@ -10483,22 +10442,22 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:17, endln:17:36 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:17, endln:17:41 |vpiOpType:29 |vpiOperand: \_operation: , line:17:18, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:17, endln:17:36 |vpiOpType:28 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:18, endln:17:30 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi311.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_aoi311.a0 |vpiOperand: @@ -10854,17 +10813,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:18, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:17, endln:17:43 |vpiOpType:28 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:18, endln:17:30 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi32.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_aoi32.a0 |vpiOperand: @@ -10887,7 +10846,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_aoi32.b0), line:17:35, endln:17:37 |vpiParent: - \_operation: , line:17:17, endln:17:43 + \_operation: , line:17:35, endln:17:42 |vpiName:b0 |vpiFullName:work@oh_aoi32.b0 |vpiOperand: @@ -11271,17 +11230,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:18, endln:18:30 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:17, endln:18:48 |vpiOpType:28 |vpiOperand: \_operation: , line:18:18, endln:18:25 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:18, endln:18:30 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi33.a0), line:18:18, endln:18:20 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:18, endln:18:25 |vpiName:a0 |vpiFullName:work@oh_aoi33.a0 |vpiOperand: @@ -11304,12 +11263,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:35, endln:18:42 |vpiParent: - \_operation: , line:18:17, endln:18:48 + \_operation: , line:18:35, endln:18:47 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_aoi33.b0), line:18:35, endln:18:37 |vpiParent: - \_operation: , line:18:17, endln:18:48 + \_operation: , line:18:35, endln:18:42 |vpiName:b0 |vpiFullName:work@oh_aoi33.b0 |vpiOperand: @@ -11492,23 +11451,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:31:11, endln:31:61 |vpiOpType:28 |vpiOperand: - \_part_select: , line:31:27, endln:31:42 + \_part_select: requests (work@oh_arbiter.requests), line:31:27, endln:31:42 |vpiParent: - \_ref_obj: requests (work@oh_arbiter.requests), line:31:27, endln:31:35 - |vpiParent: - \_operation: , line:31:27, endln:31:61 - |vpiName:requests - |vpiFullName:work@oh_arbiter.requests - |vpiDefName:requests + \_operation: , line:31:27, endln:31:61 + |vpiName:requests + |vpiFullName:work@oh_arbiter.requests + |vpiDefName:requests |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:36, endln:31:39 + |vpiParent: + \_part_select: requests (work@oh_arbiter.requests), line:31:27, endln:31:42 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:36, endln:31:37 + \_ref_obj: (work@oh_arbiter.requests.N), line:31:36, endln:31:37 |vpiParent: \_operation: , line:31:36, endln:31:39 |vpiName:N + |vpiFullName:work@oh_arbiter.requests.N |vpiOperand: \_constant: , line:31:38, endln:31:39 |vpiParent: @@ -11529,26 +11489,24 @@ design: (work@oh_fifo_async) \_operation: , line:31:27, endln:31:61 |vpiOpType:4 |vpiOperand: - \_part_select: , line:31:46, endln:31:61 + \_part_select: waitmask (work@oh_arbiter.waitmask), line:31:46, endln:31:61 |vpiParent: - \_ref_obj: waitmask (work@oh_arbiter.waitmask), line:31:46, endln:31:54 - |vpiParent: - \_operation: , line:31:45, endln:31:61 - |vpiName:waitmask - |vpiFullName:work@oh_arbiter.waitmask - |vpiDefName:waitmask + \_operation: , line:31:45, endln:31:61 + |vpiName:waitmask + |vpiFullName:work@oh_arbiter.waitmask + |vpiDefName:waitmask |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:55, endln:31:58 |vpiParent: - \_operation: , line:31:45, endln:31:61 + \_part_select: waitmask (work@oh_arbiter.waitmask), line:31:46, endln:31:61 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_arbiter.N), line:31:55, endln:31:56 + \_ref_obj: (work@oh_arbiter.waitmask.N), line:31:55, endln:31:56 |vpiParent: - \_operation: , line:31:45, endln:31:61 + \_operation: , line:31:55, endln:31:58 |vpiName:N - |vpiFullName:work@oh_arbiter.N + |vpiFullName:work@oh_arbiter.waitmask.N |vpiOperand: \_constant: , line:31:57, endln:31:58 |vpiParent: @@ -11564,23 +11522,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:31:11, endln:31:24 + \_part_select: grants (work@oh_arbiter.grants), line:31:11, endln:31:24 |vpiParent: - \_ref_obj: grants (work@oh_arbiter.grants) - |vpiParent: - \_cont_assign: , line:31:11, endln:31:61 - |vpiName:grants - |vpiFullName:work@oh_arbiter.grants - |vpiDefName:grants + \_cont_assign: , line:31:11, endln:31:61 + |vpiName:grants + |vpiFullName:work@oh_arbiter.grants + |vpiDefName:grants |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:18, endln:31:21 + |vpiParent: + \_part_select: grants (work@oh_arbiter.grants), line:31:11, endln:31:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:18, endln:31:19 + \_ref_obj: (work@oh_arbiter.grants.N), line:31:18, endln:31:19 |vpiParent: \_operation: , line:31:18, endln:31:21 |vpiName:N + |vpiFullName:work@oh_arbiter.grants.N |vpiOperand: \_constant: , line:31:20, endln:31:21 |vpiParent: @@ -11635,10 +11594,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (waitmask), line:22:12, endln:22:23 |vpiParent: - \_ref_obj: (waitmask) - |vpiParent: - \_cont_assign: , line:22:12, endln:22:32 - |vpiName:waitmask + \_cont_assign: , line:22:12, endln:22:32 |vpiName:waitmask |vpiIndex: \_constant: , line:22:21, endln:22:22 @@ -11812,24 +11768,20 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_bin2gray.bin), line:26:14, endln:26:22 |vpiParent: - \_ref_obj: (work@oh_bin2gray.bin) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:bin - |vpiFullName:work@oh_bin2gray.bin + \_assignment: , line:26:2, endln:26:22 |vpiName:bin |vpiFullName:work@oh_bin2gray.bin |vpiIndex: \_operation: , line:26:18, endln:26:21 |vpiParent: - \_begin: (work@oh_bin2gray), line:25:6, endln:29:9 + \_bit_select: (work@oh_bin2gray.bin), line:26:14, endln:26:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_bin2gray.N), line:26:18, endln:26:19 + \_ref_obj: (work@oh_bin2gray.bin.N), line:26:18, endln:26:19 |vpiParent: - \_begin: (work@oh_bin2gray), line:25:6, endln:29:9 + \_operation: , line:26:18, endln:26:21 |vpiName:N - |vpiFullName:work@oh_bin2gray.N + |vpiFullName:work@oh_bin2gray.bin.N |vpiOperand: \_constant: , line:26:20, endln:26:21 |vpiParent: @@ -11841,24 +11793,20 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_bin2gray.gray), line:26:2, endln:26:11 |vpiParent: - \_ref_obj: (work@oh_bin2gray.gray) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:gray - |vpiFullName:work@oh_bin2gray.gray + \_assignment: , line:26:2, endln:26:22 |vpiName:gray |vpiFullName:work@oh_bin2gray.gray |vpiIndex: \_operation: , line:26:7, endln:26:10 |vpiParent: - \_begin: (work@oh_bin2gray), line:25:6, endln:29:9 + \_bit_select: (work@oh_bin2gray.gray), line:26:2, endln:26:11 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_bin2gray.N), line:26:7, endln:26:8 + \_ref_obj: (work@oh_bin2gray.gray.N), line:26:7, endln:26:8 |vpiParent: - \_begin: (work@oh_bin2gray), line:25:6, endln:29:9 + \_operation: , line:26:7, endln:26:10 |vpiName:N - |vpiFullName:work@oh_bin2gray.N + |vpiFullName:work@oh_bin2gray.gray.N |vpiOperand: \_constant: , line:26:9, endln:26:10 |vpiParent: @@ -11899,12 +11847,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:27:23, endln:27:26 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_assignment: , line:27:21, endln:27:26 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@oh_bin2gray.i), line:27:23, endln:27:24 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_operation: , line:27:23, endln:27:26 |vpiName:i |vpiFullName:work@oh_bin2gray.i |vpiActual: @@ -11920,7 +11868,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_bin2gray.i), line:27:21, endln:27:22 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_assignment: , line:27:21, endln:27:26 |vpiName:i |vpiFullName:work@oh_bin2gray.i |vpiActual: @@ -11946,7 +11894,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_bin2gray.N), line:27:15, endln:27:16 |vpiParent: - \_operation: , line:27:12, endln:27:19 + \_operation: , line:27:15, endln:27:18 |vpiName:N |vpiFullName:work@oh_bin2gray.N |vpiOperand: @@ -11966,22 +11914,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:28:14, endln:28:31 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_assignment: , line:28:4, endln:28:31 |vpiOpType:30 |vpiOperand: \_bit_select: (work@oh_bin2gray.bin), line:28:14, endln:28:20 |vpiParent: - \_ref_obj: (work@oh_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_bin2gray.bin + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_bin2gray.bin |vpiIndex: \_ref_obj: (work@oh_bin2gray.i), line:28:18, endln:28:19 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_bit_select: (work@oh_bin2gray.bin), line:28:14, endln:28:20 |vpiName:i |vpiFullName:work@oh_bin2gray.i |vpiActual: @@ -11989,24 +11933,20 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_bin2gray.bin), line:28:23, endln:28:31 |vpiParent: - \_ref_obj: (work@oh_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_bin2gray.bin + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_bin2gray.bin |vpiIndex: \_operation: , line:28:27, endln:28:30 |vpiParent: - \_operation: , line:28:14, endln:28:31 + \_bit_select: (work@oh_bin2gray.bin), line:28:23, endln:28:31 |vpiOpType:24 |vpiOperand: - \_ref_obj: (work@oh_bin2gray.i), line:28:27, endln:28:28 + \_ref_obj: (work@oh_bin2gray.bin.i), line:28:27, endln:28:28 |vpiParent: - \_operation: , line:28:14, endln:28:31 + \_operation: , line:28:27, endln:28:30 |vpiName:i - |vpiFullName:work@oh_bin2gray.i + |vpiFullName:work@oh_bin2gray.bin.i |vpiActual: \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: @@ -12020,17 +11960,13 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_bin2gray.gray), line:28:4, endln:28:11 |vpiParent: - \_ref_obj: (work@oh_bin2gray.gray) - |vpiParent: - \_assignment: , line:28:4, endln:28:31 - |vpiName:gray - |vpiFullName:work@oh_bin2gray.gray + \_assignment: , line:28:4, endln:28:31 |vpiName:gray |vpiFullName:work@oh_bin2gray.gray |vpiIndex: \_ref_obj: (work@oh_bin2gray.i), line:28:9, endln:28:10 |vpiParent: - \_for_stmt: (work@oh_bin2gray), line:27:2, endln:27:5 + \_bit_select: (work@oh_bin2gray.gray), line:28:4, endln:28:11 |vpiName:i |vpiFullName:work@oh_bin2gray.i |vpiActual: @@ -12041,23 +11977,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v, line:8:1, endln:31:10 |vpiRhs: - \_part_select: , line:21:25, endln:21:34 + \_part_select: in (work@oh_bin2gray.in), line:21:25, endln:21:34 |vpiParent: - \_ref_obj: in (work@oh_bin2gray.in), line:21:25, endln:21:27 - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:in - |vpiFullName:work@oh_bin2gray.in - |vpiDefName:in + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:in + |vpiFullName:work@oh_bin2gray.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:28, endln:21:31 + |vpiParent: + \_part_select: in (work@oh_bin2gray.in), line:21:25, endln:21:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:28, endln:21:29 + \_ref_obj: (work@oh_bin2gray.in.N), line:21:28, endln:21:29 |vpiParent: \_operation: , line:21:28, endln:21:31 |vpiName:N + |vpiFullName:work@oh_bin2gray.in.N |vpiOperand: \_constant: , line:21:30, endln:21:31 |vpiParent: @@ -12073,23 +12010,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:21:11, endln:21:21 + \_part_select: bin (work@oh_bin2gray.bin), line:21:11, endln:21:21 |vpiParent: - \_ref_obj: bin (work@oh_bin2gray.bin) - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:bin - |vpiFullName:work@oh_bin2gray.bin - |vpiDefName:bin + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:bin + |vpiFullName:work@oh_bin2gray.bin + |vpiDefName:bin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 + |vpiParent: + \_part_select: bin (work@oh_bin2gray.bin), line:21:11, endln:21:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:15, endln:21:16 + \_ref_obj: (work@oh_bin2gray.bin.N), line:21:15, endln:21:16 |vpiParent: \_operation: , line:21:15, endln:21:18 |vpiName:N + |vpiFullName:work@oh_bin2gray.bin.N |vpiOperand: \_constant: , line:21:17, endln:21:18 |vpiParent: @@ -12109,23 +12047,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v, line:8:1, endln:31:10 |vpiRhs: - \_part_select: , line:22:25, endln:22:36 + \_part_select: gray (work@oh_bin2gray.gray), line:22:25, endln:22:36 |vpiParent: - \_ref_obj: gray (work@oh_bin2gray.gray), line:22:25, endln:22:29 - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:gray - |vpiFullName:work@oh_bin2gray.gray - |vpiDefName:gray + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:gray + |vpiFullName:work@oh_bin2gray.gray + |vpiDefName:gray |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:30, endln:22:33 + |vpiParent: + \_part_select: gray (work@oh_bin2gray.gray), line:22:25, endln:22:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:30, endln:22:31 + \_ref_obj: (work@oh_bin2gray.gray.N), line:22:30, endln:22:31 |vpiParent: \_operation: , line:22:30, endln:22:33 |vpiName:N + |vpiFullName:work@oh_bin2gray.gray.N |vpiOperand: \_constant: , line:22:32, endln:22:33 |vpiParent: @@ -12141,23 +12080,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:22:11, endln:22:21 + \_part_select: out (work@oh_bin2gray.out), line:22:11, endln:22:21 |vpiParent: - \_ref_obj: out (work@oh_bin2gray.out) - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:out - |vpiFullName:work@oh_bin2gray.out - |vpiDefName:out + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:out + |vpiFullName:work@oh_bin2gray.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:15, endln:22:18 + |vpiParent: + \_part_select: out (work@oh_bin2gray.out), line:22:11, endln:22:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:15, endln:22:16 + \_ref_obj: (work@oh_bin2gray.out.N), line:22:15, endln:22:16 |vpiParent: \_operation: , line:22:15, endln:22:18 |vpiName:N + |vpiFullName:work@oh_bin2gray.out.N |vpiOperand: \_constant: , line:22:17, endln:22:18 |vpiParent: @@ -12387,22 +12327,23 @@ design: (work@oh_fifo_async) \_cont_assign: , line:19:14, endln:19:40 |vpiOpType:14 |vpiOperand: - \_part_select: , line:19:24, endln:19:34 + \_part_select: in (in), line:19:24, endln:19:34 |vpiParent: - \_ref_obj: in (in), line:19:24, endln:19:26 - |vpiParent: - \_operation: , line:19:24, endln:19:39 - |vpiName:in - |vpiDefName:in + \_operation: , line:19:24, endln:19:39 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:19:27, endln:19:31 + |vpiParent: + \_part_select: in (in), line:19:24, endln:19:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (NB), line:19:27, endln:19:29 + \_ref_obj: (in.NB), line:19:27, endln:19:29 |vpiParent: \_operation: , line:19:27, endln:19:31 |vpiName:NB + |vpiFullName:in.NB |vpiOperand: \_constant: , line:19:30, endln:19:31 |vpiParent: @@ -12425,17 +12366,13 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (out), line:19:14, endln:19:20 |vpiParent: - \_ref_obj: (out) - |vpiParent: - \_cont_assign: , line:19:14, endln:19:40 - |vpiName:out + \_cont_assign: , line:19:14, endln:19:40 |vpiName:out |vpiIndex: - \_ref_obj: (out.i), line:19:18, endln:19:19 + \_ref_obj: (i), line:19:18, endln:19:19 |vpiParent: \_bit_select: (out), line:19:14, endln:19:20 |vpiName:i - |vpiFullName:out.i |uhdmallModules: \_module_inst: work@oh_bitreverse (work@oh_bitreverse), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v, line:8:1, endln:23:10 |vpiParent: @@ -12899,22 +12836,23 @@ design: (work@oh_fifo_async) |vpiStmt: \_cont_assign: , line:18:10, endln:18:32 |vpiRhs: - \_part_select: , line:18:23, endln:18:32 + \_part_select: in (in), line:18:23, endln:18:32 |vpiParent: - \_ref_obj: in (in), line:18:23, endln:18:25 - |vpiParent: - \_cont_assign: , line:18:10, endln:18:32 - |vpiName:in - |vpiDefName:in + \_cont_assign: , line:18:10, endln:18:32 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:18:26, endln:18:29 + |vpiParent: + \_part_select: in (in), line:18:23, endln:18:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:18:26, endln:18:27 + \_ref_obj: (in.N), line:18:26, endln:18:27 |vpiParent: \_operation: , line:18:26, endln:18:29 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:18:28, endln:18:29 |vpiParent: @@ -12930,22 +12868,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:18:10, endln:18:20 + \_part_select: out (out), line:18:10, endln:18:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:18:10, endln:18:32 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:18:10, endln:18:32 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:18:14, endln:18:17 + |vpiParent: + \_part_select: out (out), line:18:10, endln:18:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:18:14, endln:18:15 + \_ref_obj: (out.N), line:18:14, endln:18:15 |vpiParent: \_operation: , line:18:14, endln:18:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:18:16, endln:18:17 |vpiParent: @@ -13488,20 +13427,16 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:52:23, endln:52:26 - |vpiParent: - \_assignment: , line:52:8, endln:52:26 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:52:8, endln:52:19 + \_part_select: period (work@oh_clockdiv.period), line:52:8, endln:52:19 |vpiParent: - \_ref_obj: period (work@oh_clockdiv.period) - |vpiParent: - \_assignment: , line:52:8, endln:52:26 - |vpiName:period - |vpiFullName:work@oh_clockdiv.period - |vpiDefName:period + \_assignment: , line:52:8, endln:52:26 + |vpiName:period + |vpiFullName:work@oh_clockdiv.period + |vpiDefName:period |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:52:15, endln:52:16 @@ -13532,20 +13467,16 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:54:22, endln:54:25 - |vpiParent: - \_assignment: , line:54:8, endln:54:25 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:54:8, endln:54:19 + \_part_select: period (work@oh_clockdiv.period), line:54:8, endln:54:19 |vpiParent: - \_ref_obj: period (work@oh_clockdiv.period) - |vpiParent: - \_assignment: , line:54:8, endln:54:25 - |vpiName:period - |vpiFullName:work@oh_clockdiv.period - |vpiDefName:period + \_assignment: , line:54:8, endln:54:25 + |vpiName:period + |vpiFullName:work@oh_clockdiv.period + |vpiDefName:period |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:54:15, endln:54:16 @@ -13571,7 +13502,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_clockdiv.period_match), line:55:14, endln:55:26 |vpiParent: - \_if_else: , line:53:11, endln:56:41 + \_operation: , line:55:14, endln:55:39 |vpiName:period_match |vpiFullName:work@oh_clockdiv.period_match |vpiOperand: @@ -13593,17 +13524,15 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:56:23, endln:56:40 |vpiParent: - \_if_stmt: , line:55:11, endln:56:41 + \_assignment: , line:56:8, endln:56:40 |vpiOpType:24 |vpiOperand: - \_part_select: , line:56:23, endln:56:34 + \_part_select: period (work@oh_clockdiv.period), line:56:23, endln:56:34 |vpiParent: - \_ref_obj: period (work@oh_clockdiv.period), line:56:23, endln:56:29 - |vpiParent: - \_operation: , line:56:23, endln:56:40 - |vpiName:period - |vpiFullName:work@oh_clockdiv.period - |vpiDefName:period + \_operation: , line:56:23, endln:56:40 + |vpiName:period + |vpiFullName:work@oh_clockdiv.period + |vpiDefName:period |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:56:30, endln:56:31 @@ -13626,14 +13555,12 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:56:8, endln:56:19 + \_part_select: period (work@oh_clockdiv.period), line:56:8, endln:56:19 |vpiParent: - \_ref_obj: period (work@oh_clockdiv.period) - |vpiParent: - \_assignment: , line:56:8, endln:56:40 - |vpiName:period - |vpiFullName:work@oh_clockdiv.period - |vpiDefName:period + \_assignment: , line:56:8, endln:56:40 + |vpiName:period + |vpiFullName:work@oh_clockdiv.period + |vpiDefName:period |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:56:15, endln:56:16 @@ -13699,20 +13626,16 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:66:26, endln:66:29 - |vpiParent: - \_assignment: , line:66:8, endln:66:29 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:66:8, endln:66:20 + \_part_select: counter (work@oh_clockdiv.counter), line:66:8, endln:66:20 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter) - |vpiParent: - \_assignment: , line:66:8, endln:66:29 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_assignment: , line:66:8, endln:66:29 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:66:16, endln:66:17 @@ -13753,20 +13676,16 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:69:19, endln:69:22 - |vpiParent: - \_assignment: , line:69:3, endln:69:22 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:69:3, endln:69:15 + \_part_select: counter (work@oh_clockdiv.counter), line:69:3, endln:69:15 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter) - |vpiParent: - \_assignment: , line:69:3, endln:69:22 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_assignment: , line:69:3, endln:69:22 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:69:11, endln:69:12 @@ -13788,17 +13707,15 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:71:19, endln:71:38 |vpiParent: - \_if_else: , line:68:8, endln:71:39 + \_assignment: , line:71:3, endln:71:38 |vpiOpType:24 |vpiOperand: - \_part_select: , line:71:19, endln:71:31 + \_part_select: counter (work@oh_clockdiv.counter), line:71:19, endln:71:31 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:71:19, endln:71:26 - |vpiParent: - \_operation: , line:71:19, endln:71:38 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:71:19, endln:71:38 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:71:27, endln:71:28 @@ -13821,14 +13738,12 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:71:3, endln:71:15 + \_part_select: counter (work@oh_clockdiv.counter), line:71:3, endln:71:15 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter) - |vpiParent: - \_assignment: , line:71:3, endln:71:38 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_assignment: , line:71:3, endln:71:38 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:71:11, endln:71:12 @@ -13894,8 +13809,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:90:23, endln:90:27 - |vpiParent: - \_assignment: , line:90:8, endln:90:27 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -13903,7 +13816,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout0_reg), line:90:8, endln:90:19 |vpiParent: - \_if_else: , line:89:6, endln:94:28 + \_assignment: , line:90:8, endln:90:27 |vpiName:clkout0_reg |vpiFullName:work@oh_clockdiv.clkout0_reg |vpiElseStmt: @@ -13923,8 +13836,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:92:23, endln:92:27 - |vpiParent: - \_assignment: , line:92:8, endln:92:27 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -13932,7 +13843,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout0_reg), line:92:8, endln:92:19 |vpiParent: - \_if_else: , line:91:11, endln:94:28 + \_assignment: , line:92:8, endln:92:27 |vpiName:clkout0_reg |vpiFullName:work@oh_clockdiv.clkout0_reg |vpiElseStmt: @@ -13952,8 +13863,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:94:23, endln:94:27 - |vpiParent: - \_assignment: , line:94:8, endln:94:27 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -13961,7 +13870,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout0_reg), line:94:8, endln:94:19 |vpiParent: - \_if_stmt: , line:93:11, endln:94:28 + \_assignment: , line:94:8, endln:94:27 |vpiName:clkout0_reg |vpiFullName:work@oh_clockdiv.clkout0_reg |vpiAlwaysType:1 @@ -14016,8 +13925,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:124:23, endln:124:27 - |vpiParent: - \_assignment: , line:124:8, endln:124:27 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -14025,7 +13932,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout1_reg), line:124:8, endln:124:19 |vpiParent: - \_if_else: , line:123:6, endln:128:28 + \_assignment: , line:124:8, endln:124:27 |vpiName:clkout1_reg |vpiFullName:work@oh_clockdiv.clkout1_reg |vpiElseStmt: @@ -14045,8 +13952,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:126:23, endln:126:27 - |vpiParent: - \_assignment: , line:126:8, endln:126:27 |vpiDecompile:1'b1 |vpiSize:1 |BIN:1 @@ -14054,7 +13959,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout1_reg), line:126:8, endln:126:19 |vpiParent: - \_if_else: , line:125:11, endln:128:28 + \_assignment: , line:126:8, endln:126:27 |vpiName:clkout1_reg |vpiFullName:work@oh_clockdiv.clkout1_reg |vpiElseStmt: @@ -14074,8 +13979,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:128:23, endln:128:27 - |vpiParent: - \_assignment: , line:128:8, endln:128:27 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -14083,7 +13986,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout1_reg), line:128:8, endln:128:19 |vpiParent: - \_if_stmt: , line:127:11, endln:128:28 + \_assignment: , line:128:8, endln:128:27 |vpiName:clkout1_reg |vpiFullName:work@oh_clockdiv.clkout1_reg |vpiAlwaysType:1 @@ -14114,13 +14017,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_clockdiv.clkout1_reg), line:132:23, endln:132:34 |vpiParent: - \_event_control: , line:131:11, endln:131:26 + \_assignment: , line:132:6, endln:132:34 |vpiName:clkout1_reg |vpiFullName:work@oh_clockdiv.clkout1_reg |vpiLhs: \_ref_obj: (work@oh_clockdiv.clkout1_shift), line:132:6, endln:132:19 |vpiParent: - \_event_control: , line:131:11, endln:131:26 + \_assignment: , line:132:6, endln:132:34 |vpiName:clkout1_shift |vpiFullName:work@oh_clockdiv.clkout1_shift |vpiAlwaysType:1 @@ -14134,14 +14037,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:58:11, endln:58:44 |vpiOpType:14 |vpiOperand: - \_part_select: , line:58:24, endln:58:35 + \_part_select: period (work@oh_clockdiv.period), line:58:24, endln:58:35 |vpiParent: - \_ref_obj: period (work@oh_clockdiv.period), line:58:24, endln:58:30 - |vpiParent: - \_operation: , line:58:24, endln:58:43 - |vpiName:period - |vpiFullName:work@oh_clockdiv.period - |vpiDefName:period + \_operation: , line:58:24, endln:58:43 + |vpiName:period + |vpiFullName:work@oh_clockdiv.period + |vpiDefName:period |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:58:31, endln:58:32 @@ -14179,14 +14080,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:73:11, endln:73:55 |vpiOpType:14 |vpiOperand: - \_part_select: , line:73:27, endln:73:39 + \_part_select: counter (work@oh_clockdiv.counter), line:73:27, endln:73:39 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:73:27, endln:73:34 - |vpiParent: - \_operation: , line:73:27, endln:73:54 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:73:27, endln:73:54 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:73:35, endln:73:36 @@ -14201,14 +14100,12 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:73:43, endln:73:54 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:73:43, endln:73:54 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:73:43, endln:73:49 - |vpiParent: - \_operation: , line:73:27, endln:73:54 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:73:27, endln:73:54 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:73:50, endln:73:51 @@ -14238,14 +14135,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:79:11, endln:79:58 |vpiOpType:14 |vpiOperand: - \_part_select: , line:79:27, endln:79:39 + \_part_select: counter (work@oh_clockdiv.counter), line:79:27, endln:79:39 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:79:27, endln:79:34 - |vpiParent: - \_operation: , line:79:27, endln:79:57 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:79:27, endln:79:57 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:79:35, endln:79:36 @@ -14260,14 +14155,12 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:79:43, endln:79:57 + \_part_select: clkphase0 (work@oh_clockdiv.clkphase0), line:79:43, endln:79:57 |vpiParent: - \_ref_obj: clkphase0 (work@oh_clockdiv.clkphase0), line:79:43, endln:79:52 - |vpiParent: - \_operation: , line:79:27, endln:79:57 - |vpiName:clkphase0 - |vpiFullName:work@oh_clockdiv.clkphase0 - |vpiDefName:clkphase0 + \_operation: , line:79:27, endln:79:57 + |vpiName:clkphase0 + |vpiFullName:work@oh_clockdiv.clkphase0 + |vpiDefName:clkphase0 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:79:53, endln:79:54 @@ -14297,14 +14190,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:80:11, endln:80:59 |vpiOpType:14 |vpiOperand: - \_part_select: , line:80:27, endln:80:39 + \_part_select: counter (work@oh_clockdiv.counter), line:80:27, endln:80:39 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:80:27, endln:80:34 - |vpiParent: - \_operation: , line:80:27, endln:80:58 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:80:27, endln:80:58 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:80:35, endln:80:36 @@ -14319,14 +14210,12 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:80:43, endln:80:58 + \_part_select: clkphase0 (work@oh_clockdiv.clkphase0), line:80:43, endln:80:58 |vpiParent: - \_ref_obj: clkphase0 (work@oh_clockdiv.clkphase0), line:80:43, endln:80:52 - |vpiParent: - \_operation: , line:80:27, endln:80:58 - |vpiName:clkphase0 - |vpiFullName:work@oh_clockdiv.clkphase0 - |vpiDefName:clkphase0 + \_operation: , line:80:27, endln:80:58 + |vpiName:clkphase0 + |vpiFullName:work@oh_clockdiv.clkphase0 + |vpiDefName:clkphase0 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:80:53, endln:80:55 @@ -14356,14 +14245,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:81:11, endln:81:58 |vpiOpType:14 |vpiOperand: - \_part_select: , line:81:27, endln:81:39 + \_part_select: counter (work@oh_clockdiv.counter), line:81:27, endln:81:39 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:81:27, endln:81:34 - |vpiParent: - \_operation: , line:81:27, endln:81:57 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:81:27, endln:81:57 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:81:35, endln:81:36 @@ -14378,14 +14265,12 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:81:43, endln:81:57 + \_part_select: clkphase1 (work@oh_clockdiv.clkphase1), line:81:43, endln:81:57 |vpiParent: - \_ref_obj: clkphase1 (work@oh_clockdiv.clkphase1), line:81:43, endln:81:52 - |vpiParent: - \_operation: , line:81:27, endln:81:57 - |vpiName:clkphase1 - |vpiFullName:work@oh_clockdiv.clkphase1 - |vpiDefName:clkphase1 + \_operation: , line:81:27, endln:81:57 + |vpiName:clkphase1 + |vpiFullName:work@oh_clockdiv.clkphase1 + |vpiDefName:clkphase1 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:81:53, endln:81:54 @@ -14415,14 +14300,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:82:11, endln:82:59 |vpiOpType:14 |vpiOperand: - \_part_select: , line:82:27, endln:82:39 + \_part_select: counter (work@oh_clockdiv.counter), line:82:27, endln:82:39 |vpiParent: - \_ref_obj: counter (work@oh_clockdiv.counter), line:82:27, endln:82:34 - |vpiParent: - \_operation: , line:82:27, endln:82:58 - |vpiName:counter - |vpiFullName:work@oh_clockdiv.counter - |vpiDefName:counter + \_operation: , line:82:27, endln:82:58 + |vpiName:counter + |vpiFullName:work@oh_clockdiv.counter + |vpiDefName:counter |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:82:35, endln:82:36 @@ -14437,14 +14320,12 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:82:43, endln:82:58 + \_part_select: clkphase1 (work@oh_clockdiv.clkphase1), line:82:43, endln:82:58 |vpiParent: - \_ref_obj: clkphase1 (work@oh_clockdiv.clkphase1), line:82:43, endln:82:52 - |vpiParent: - \_operation: , line:82:27, endln:82:58 - |vpiName:clkphase1 - |vpiFullName:work@oh_clockdiv.clkphase1 - |vpiDefName:clkphase1 + \_operation: , line:82:27, endln:82:58 + |vpiName:clkphase1 + |vpiFullName:work@oh_clockdiv.clkphase1 + |vpiDefName:clkphase1 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:82:53, endln:82:55 @@ -14474,14 +14355,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:97:11, endln:97:45 |vpiOpType:14 |vpiOperand: - \_part_select: , line:97:27, endln:97:38 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:97:27, endln:97:38 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:97:27, endln:97:33 - |vpiParent: - \_operation: , line:97:27, endln:97:44 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:97:27, endln:97:44 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:97:34, endln:97:35 @@ -14506,11 +14385,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk0_sel), line:97:11, endln:97:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk0_sel) - |vpiParent: - \_cont_assign: , line:97:11, endln:97:45 - |vpiName:clk0_sel - |vpiFullName:work@oh_clockdiv.clk0_sel + \_cont_assign: , line:97:11, endln:97:45 |vpiName:clk0_sel |vpiFullName:work@oh_clockdiv.clk0_sel |vpiIndex: @@ -14536,14 +14411,12 @@ design: (work@oh_fifo_async) \_operation: , line:98:25, endln:98:45 |vpiOpType:14 |vpiOperand: - \_part_select: , line:98:27, endln:98:38 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:98:27, endln:98:38 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:98:27, endln:98:33 - |vpiParent: - \_operation: , line:98:27, endln:98:44 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:98:27, endln:98:44 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:98:34, endln:98:35 @@ -14568,11 +14441,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk0_sel), line:98:11, endln:98:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk0_sel) - |vpiParent: - \_cont_assign: , line:98:11, endln:98:45 - |vpiName:clk0_sel - |vpiFullName:work@oh_clockdiv.clk0_sel + \_cont_assign: , line:98:11, endln:98:45 |vpiName:clk0_sel |vpiFullName:work@oh_clockdiv.clk0_sel |vpiIndex: @@ -14598,11 +14467,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:135:11, endln:135:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:135:11, endln:135:30 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:135:11, endln:135:30 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14623,14 +14488,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:136:11, endln:136:44 |vpiOpType:14 |vpiOperand: - \_part_select: , line:136:26, endln:136:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:136:26, endln:136:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:136:26, endln:136:32 - |vpiParent: - \_operation: , line:136:26, endln:136:43 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:136:26, endln:136:43 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:136:33, endln:136:34 @@ -14655,11 +14518,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:136:11, endln:136:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:136:11, endln:136:44 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:136:11, endln:136:44 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14680,14 +14539,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:137:11, endln:137:44 |vpiOpType:14 |vpiOperand: - \_part_select: , line:137:26, endln:137:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:137:26, endln:137:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:137:26, endln:137:32 - |vpiParent: - \_operation: , line:137:26, endln:137:43 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:137:26, endln:137:43 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:33, endln:137:34 @@ -14712,11 +14569,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:137:11, endln:137:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:137:11, endln:137:44 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:137:11, endln:137:44 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14737,14 +14590,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:138:11, endln:138:37 |vpiOpType:7 |vpiOperand: - \_part_select: , line:138:26, endln:138:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:138:26, endln:138:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:138:26, endln:138:32 - |vpiParent: - \_operation: , line:138:25, endln:138:37 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:138:25, endln:138:37 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:138:33, endln:138:34 @@ -14761,11 +14612,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:138:11, endln:138:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:138:11, endln:138:37 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:138:11, endln:138:37 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14791,11 +14638,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:148:11, endln:148:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:148:11, endln:148:30 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:148:11, endln:148:30 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14816,14 +14659,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:149:11, endln:149:44 |vpiOpType:14 |vpiOperand: - \_part_select: , line:149:26, endln:149:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:149:26, endln:149:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:149:26, endln:149:32 - |vpiParent: - \_operation: , line:149:26, endln:149:43 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:149:26, endln:149:43 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:149:33, endln:149:34 @@ -14848,11 +14689,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:149:11, endln:149:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:149:11, endln:149:44 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:149:11, endln:149:44 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14873,14 +14710,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:150:11, endln:150:44 |vpiOpType:14 |vpiOperand: - \_part_select: , line:150:26, endln:150:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:150:26, endln:150:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:150:26, endln:150:32 - |vpiParent: - \_operation: , line:150:26, endln:150:43 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:150:26, endln:150:43 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:150:33, endln:150:34 @@ -14905,11 +14740,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:150:11, endln:150:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:150:11, endln:150:44 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:150:11, endln:150:44 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14930,14 +14761,12 @@ design: (work@oh_fifo_async) \_cont_assign: , line:151:11, endln:151:37 |vpiOpType:7 |vpiOperand: - \_part_select: , line:151:26, endln:151:37 + \_part_select: clkdiv (work@oh_clockdiv.clkdiv), line:151:26, endln:151:37 |vpiParent: - \_ref_obj: clkdiv (work@oh_clockdiv.clkdiv), line:151:26, endln:151:32 - |vpiParent: - \_operation: , line:151:25, endln:151:37 - |vpiName:clkdiv - |vpiFullName:work@oh_clockdiv.clkdiv - |vpiDefName:clkdiv + \_operation: , line:151:25, endln:151:37 + |vpiName:clkdiv + |vpiFullName:work@oh_clockdiv.clkdiv + |vpiDefName:clkdiv |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:151:33, endln:151:34 @@ -14954,11 +14783,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_clockdiv.clk1_sel), line:151:11, endln:151:22 |vpiParent: - \_ref_obj: (work@oh_clockdiv.clk1_sel) - |vpiParent: - \_cont_assign: , line:151:11, endln:151:37 - |vpiName:clk1_sel - |vpiFullName:work@oh_clockdiv.clk1_sel + \_cont_assign: , line:151:11, endln:151:37 |vpiName:clk1_sel |vpiFullName:work@oh_clockdiv.clk1_sel |vpiIndex: @@ -14981,11 +14806,9 @@ design: (work@oh_fifo_async) \_port: (out), line:105:13, endln:105:36 |vpiName:out |vpiHighConn: - \_part_select: , line:105:19, endln:105:35 - |vpiParent: - \_ref_obj: clk0_sel_sh (clk0_sel_sh), line:105:19, endln:105:30 - |vpiName:clk0_sel_sh - |vpiDefName:clk0_sel_sh + \_part_select: clk0_sel_sh (clk0_sel_sh), line:105:19, endln:105:35 + |vpiName:clk0_sel_sh + |vpiDefName:clk0_sel_sh |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:105:31, endln:105:32 @@ -15009,11 +14832,9 @@ design: (work@oh_fifo_async) \_port: (in), line:107:6, endln:107:26 |vpiName:in |vpiHighConn: - \_part_select: , line:107:12, endln:107:25 - |vpiParent: - \_ref_obj: clk0_sel (clk0_sel), line:107:12, endln:107:20 - |vpiName:clk0_sel - |vpiDefName:clk0_sel + \_part_select: clk0_sel (clk0_sel), line:107:12, endln:107:25 + |vpiName:clk0_sel + |vpiDefName:clk0_sel |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:107:21, endln:107:22 @@ -15046,9 +14867,6 @@ design: (work@oh_fifo_async) |vpiName:en0 |vpiHighConn: \_bit_select: (clk0_sel), line:113:9, endln:113:20 - |vpiParent: - \_ref_obj: (clk0_sel) - |vpiName:clk0_sel |vpiName:clk0_sel |vpiIndex: \_constant: , line:113:18, endln:113:19 @@ -15063,9 +14881,6 @@ design: (work@oh_fifo_async) |vpiName:en1 |vpiHighConn: \_bit_select: (clk0_sel), line:114:9, endln:114:20 - |vpiParent: - \_ref_obj: (clk0_sel) - |vpiName:clk0_sel |vpiName:clk0_sel |vpiIndex: \_constant: , line:114:18, endln:114:19 @@ -15099,11 +14914,9 @@ design: (work@oh_fifo_async) \_port: (out), line:144:16, endln:144:39 |vpiName:out |vpiHighConn: - \_part_select: , line:144:22, endln:144:38 - |vpiParent: - \_ref_obj: clk1_sel_sh (clk1_sel_sh), line:144:22, endln:144:33 - |vpiName:clk1_sel_sh - |vpiDefName:clk1_sel_sh + \_part_select: clk1_sel_sh (clk1_sel_sh), line:144:22, endln:144:38 + |vpiName:clk1_sel_sh + |vpiDefName:clk1_sel_sh |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:144:34, endln:144:35 @@ -15127,11 +14940,9 @@ design: (work@oh_fifo_async) \_port: (in), line:146:9, endln:146:29 |vpiName:in |vpiHighConn: - \_part_select: , line:146:15, endln:146:28 - |vpiParent: - \_ref_obj: clk1_sel (clk1_sel), line:146:15, endln:146:23 - |vpiName:clk1_sel - |vpiDefName:clk1_sel + \_part_select: clk1_sel (clk1_sel), line:146:15, endln:146:28 + |vpiName:clk1_sel + |vpiDefName:clk1_sel |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:146:24, endln:146:25 @@ -15164,9 +14975,6 @@ design: (work@oh_fifo_async) |vpiName:en0 |vpiHighConn: \_bit_select: (clk1_sel), line:158:15, endln:158:26 - |vpiParent: - \_ref_obj: (clk1_sel) - |vpiName:clk1_sel |vpiName:clk1_sel |vpiIndex: \_constant: , line:158:24, endln:158:25 @@ -15181,9 +14989,6 @@ design: (work@oh_fifo_async) |vpiName:en1 |vpiHighConn: \_bit_select: (clk1_sel), line:159:15, endln:159:26 - |vpiParent: - \_ref_obj: (clk1_sel) - |vpiName:clk1_sel |vpiName:clk1_sel |vpiIndex: \_constant: , line:159:24, endln:159:25 @@ -15198,9 +15003,6 @@ design: (work@oh_fifo_async) |vpiName:en2 |vpiHighConn: \_bit_select: (clk1_sel), line:160:15, endln:160:26 - |vpiParent: - \_ref_obj: (clk1_sel) - |vpiName:clk1_sel |vpiName:clk1_sel |vpiIndex: \_constant: , line:160:24, endln:160:25 @@ -15215,9 +15017,6 @@ design: (work@oh_fifo_async) |vpiName:en3 |vpiHighConn: \_bit_select: (clk1_sel), line:161:15, endln:161:26 - |vpiParent: - \_ref_obj: (clk1_sel) - |vpiName:clk1_sel |vpiName:clk1_sel |vpiIndex: \_constant: , line:161:24, endln:161:25 @@ -15726,24 +15525,23 @@ design: (work@oh_fifo_async) \_operation: , line:21:19, endln:21:46 |vpiOpType:28 |vpiOperand: - \_part_select: , line:21:21, endln:21:33 + \_part_select: clkin (clkin), line:21:21, endln:21:33 |vpiParent: - \_ref_obj: clkin (clkin), line:21:21, endln:21:26 - |vpiParent: - \_operation: , line:21:21, endln:21:45 - |vpiName:clkin - |vpiDefName:clkin + \_operation: , line:21:21, endln:21:45 + |vpiName:clkin + |vpiDefName:clkin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:27, endln:21:30 |vpiParent: - \_operation: , line:21:19, endln:21:46 + \_part_select: clkin (clkin), line:21:21, endln:21:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:27, endln:21:28 + \_ref_obj: (clkin.N), line:21:27, endln:21:28 |vpiParent: - \_operation: , line:21:19, endln:21:46 + \_operation: , line:21:27, endln:21:30 |vpiName:N + |vpiFullName:clkin.N |vpiOperand: \_constant: , line:21:29, endln:21:30 |vpiParent: @@ -15759,24 +15557,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:21:36, endln:21:45 + \_part_select: en (en), line:21:36, endln:21:45 |vpiParent: - \_ref_obj: en (en), line:21:36, endln:21:38 - |vpiParent: - \_operation: , line:21:21, endln:21:45 - |vpiName:en - |vpiDefName:en + \_operation: , line:21:21, endln:21:45 + |vpiName:en + |vpiDefName:en |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:39, endln:21:42 |vpiParent: - \_operation: , line:21:21, endln:21:45 + \_part_select: en (en), line:21:36, endln:21:45 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:39, endln:21:40 + \_ref_obj: (en.N), line:21:39, endln:21:40 |vpiParent: - \_operation: , line:21:21, endln:21:45 + \_operation: , line:21:39, endln:21:42 |vpiName:N + |vpiFullName:en.N |vpiOperand: \_constant: , line:21:41, endln:21:42 |vpiParent: @@ -15812,20 +15609,21 @@ design: (work@oh_fifo_async) \_port: (en), line:29:10, endln:29:26 |vpiName:en |vpiHighConn: - \_part_select: , line:29:16, endln:29:25 - |vpiParent: - \_ref_obj: en (en), line:29:16, endln:29:18 - |vpiName:en - |vpiDefName:en + \_part_select: en (en), line:29:16, endln:29:25 + |vpiName:en + |vpiDefName:en |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:19, endln:29:22 + |vpiParent: + \_part_select: en (en), line:29:16, endln:29:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:19, endln:29:20 + \_ref_obj: (en.N), line:29:19, endln:29:20 |vpiParent: \_operation: , line:29:19, endln:29:22 |vpiName:N + |vpiFullName:en.N |vpiOperand: \_constant: , line:29:21, endln:29:22 |vpiParent: @@ -15844,20 +15642,21 @@ design: (work@oh_fifo_async) \_port: (clkin), line:30:10, endln:30:32 |vpiName:clkin |vpiHighConn: - \_part_select: , line:30:19, endln:30:31 - |vpiParent: - \_ref_obj: clkin (clkin), line:30:19, endln:30:24 - |vpiName:clkin - |vpiDefName:clkin + \_part_select: clkin (clkin), line:30:19, endln:30:31 + |vpiName:clkin + |vpiDefName:clkin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:25, endln:30:28 + |vpiParent: + \_part_select: clkin (clkin), line:30:19, endln:30:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:25, endln:30:26 + \_ref_obj: (clkin.N), line:30:25, endln:30:26 |vpiParent: \_operation: , line:30:25, endln:30:28 |vpiName:N + |vpiFullName:clkin.N |vpiOperand: \_constant: , line:30:27, endln:30:28 |vpiParent: @@ -16217,22 +16016,23 @@ design: (work@oh_fifo_async) \_operation: , line:23:26, endln:24:26 |vpiOpType:28 |vpiOperand: - \_part_select: , line:23:27, endln:23:37 + \_part_select: en0 (en0), line:23:27, endln:23:37 |vpiParent: - \_ref_obj: en0 (en0), line:23:27, endln:23:30 - |vpiParent: - \_operation: , line:23:27, endln:23:53 - |vpiName:en0 - |vpiDefName:en0 + \_operation: , line:23:27, endln:23:53 + |vpiName:en0 + |vpiDefName:en0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:31, endln:23:34 + |vpiParent: + \_part_select: en0 (en0), line:23:27, endln:23:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:31, endln:23:32 + \_ref_obj: (en0.N), line:23:31, endln:23:32 |vpiParent: \_operation: , line:23:31, endln:23:34 |vpiName:N + |vpiFullName:en0.N |vpiOperand: \_constant: , line:23:33, endln:23:34 |vpiParent: @@ -16248,24 +16048,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:23:40, endln:23:53 + \_part_select: clkin0 (clkin0), line:23:40, endln:23:53 |vpiParent: - \_ref_obj: clkin0 (clkin0), line:23:40, endln:23:46 - |vpiParent: - \_operation: , line:23:27, endln:23:53 - |vpiName:clkin0 - |vpiDefName:clkin0 + \_operation: , line:23:27, endln:23:53 + |vpiName:clkin0 + |vpiDefName:clkin0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:47, endln:23:50 |vpiParent: - \_operation: , line:23:27, endln:23:53 + \_part_select: clkin0 (clkin0), line:23:40, endln:23:53 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:47, endln:23:48 + \_ref_obj: (clkin0.N), line:23:47, endln:23:48 |vpiParent: - \_operation: , line:23:27, endln:23:53 + \_operation: , line:23:47, endln:23:50 |vpiName:N + |vpiFullName:clkin0.N |vpiOperand: \_constant: , line:23:49, endln:23:50 |vpiParent: @@ -16286,24 +16085,23 @@ design: (work@oh_fifo_async) \_operation: , line:23:26, endln:24:26 |vpiOpType:28 |vpiOperand: - \_part_select: , line:24:6, endln:24:16 + \_part_select: en1 (en1), line:24:6, endln:24:16 |vpiParent: - \_ref_obj: en1 (en1), line:24:6, endln:24:9 - |vpiParent: - \_operation: , line:24:6, endln:24:25 - |vpiName:en1 - |vpiDefName:en1 + \_operation: , line:24:6, endln:24:25 + |vpiName:en1 + |vpiDefName:en1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:10, endln:24:13 |vpiParent: - \_operation: , line:23:26, endln:24:26 + \_part_select: en1 (en1), line:24:6, endln:24:16 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:10, endln:24:11 + \_ref_obj: (en1.N), line:24:10, endln:24:11 |vpiParent: - \_operation: , line:23:26, endln:24:26 + \_operation: , line:24:10, endln:24:13 |vpiName:N + |vpiFullName:en1.N |vpiOperand: \_constant: , line:24:12, endln:24:13 |vpiParent: @@ -16324,22 +16122,23 @@ design: (work@oh_fifo_async) \_operation: , line:24:6, endln:24:25 |vpiName:clkin1 |vpiLhs: - \_part_select: , line:23:10, endln:23:23 + \_part_select: clkout (clkout), line:23:10, endln:23:23 |vpiParent: - \_ref_obj: clkout (clkout) - |vpiParent: - \_cont_assign: , line:23:10, endln:24:26 - |vpiName:clkout - |vpiDefName:clkout + \_cont_assign: , line:23:10, endln:24:26 + |vpiName:clkout + |vpiDefName:clkout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:17, endln:23:20 + |vpiParent: + \_part_select: clkout (clkout), line:23:10, endln:23:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:17, endln:23:18 + \_ref_obj: (clkout.N), line:23:17, endln:23:18 |vpiParent: \_operation: , line:23:17, endln:23:20 |vpiName:N + |vpiFullName:clkout.N |vpiOperand: \_constant: , line:23:19, endln:23:20 |vpiParent: @@ -16895,22 +16694,23 @@ design: (work@oh_fifo_async) \_operation: , line:27:26, endln:28:33 |vpiOpType:28 |vpiOperand: - \_part_select: , line:27:27, endln:27:37 + \_part_select: en0 (en0), line:27:27, endln:27:37 |vpiParent: - \_ref_obj: en0 (en0), line:27:27, endln:27:30 - |vpiParent: - \_operation: , line:27:27, endln:27:53 - |vpiName:en0 - |vpiDefName:en0 + \_operation: , line:27:27, endln:27:53 + |vpiName:en0 + |vpiDefName:en0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:31, endln:27:34 + |vpiParent: + \_part_select: en0 (en0), line:27:27, endln:27:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:27:31, endln:27:32 + \_ref_obj: (en0.N), line:27:31, endln:27:32 |vpiParent: \_operation: , line:27:31, endln:27:34 |vpiName:N + |vpiFullName:en0.N |vpiOperand: \_constant: , line:27:33, endln:27:34 |vpiParent: @@ -16926,24 +16726,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:27:40, endln:27:53 + \_part_select: clkin0 (clkin0), line:27:40, endln:27:53 |vpiParent: - \_ref_obj: clkin0 (clkin0), line:27:40, endln:27:46 - |vpiParent: - \_operation: , line:27:27, endln:27:53 - |vpiName:clkin0 - |vpiDefName:clkin0 + \_operation: , line:27:27, endln:27:53 + |vpiName:clkin0 + |vpiDefName:clkin0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:47, endln:27:50 |vpiParent: - \_operation: , line:27:27, endln:27:53 + \_part_select: clkin0 (clkin0), line:27:40, endln:27:53 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:27:47, endln:27:48 + \_ref_obj: (clkin0.N), line:27:47, endln:27:48 |vpiParent: - \_operation: , line:27:27, endln:27:53 + \_operation: , line:27:47, endln:27:50 |vpiName:N + |vpiFullName:clkin0.N |vpiOperand: \_constant: , line:27:49, endln:27:50 |vpiParent: @@ -16964,24 +16763,23 @@ design: (work@oh_fifo_async) \_operation: , line:27:26, endln:28:33 |vpiOpType:28 |vpiOperand: - \_part_select: , line:28:6, endln:28:16 + \_part_select: en1 (en1), line:28:6, endln:28:16 |vpiParent: - \_ref_obj: en1 (en1), line:28:6, endln:28:9 - |vpiParent: - \_operation: , line:28:6, endln:28:32 - |vpiName:en1 - |vpiDefName:en1 + \_operation: , line:28:6, endln:28:32 + |vpiName:en1 + |vpiDefName:en1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:10, endln:28:13 |vpiParent: - \_operation: , line:27:26, endln:28:33 + \_part_select: en1 (en1), line:28:6, endln:28:16 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:10, endln:28:11 + \_ref_obj: (en1.N), line:28:10, endln:28:11 |vpiParent: - \_operation: , line:27:26, endln:28:33 + \_operation: , line:28:10, endln:28:13 |vpiName:N + |vpiFullName:en1.N |vpiOperand: \_constant: , line:28:12, endln:28:13 |vpiParent: @@ -16997,24 +16795,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:28:19, endln:28:32 + \_part_select: clkin1 (clkin1), line:28:19, endln:28:32 |vpiParent: - \_ref_obj: clkin1 (clkin1), line:28:19, endln:28:25 - |vpiParent: - \_operation: , line:28:6, endln:28:32 - |vpiName:clkin1 - |vpiDefName:clkin1 + \_operation: , line:28:6, endln:28:32 + |vpiName:clkin1 + |vpiDefName:clkin1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:26, endln:28:29 |vpiParent: - \_operation: , line:28:6, endln:28:32 + \_part_select: clkin1 (clkin1), line:28:19, endln:28:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:26, endln:28:27 + \_ref_obj: (clkin1.N), line:28:26, endln:28:27 |vpiParent: - \_operation: , line:28:6, endln:28:32 + \_operation: , line:28:26, endln:28:29 |vpiName:N + |vpiFullName:clkin1.N |vpiOperand: \_constant: , line:28:28, endln:28:29 |vpiParent: @@ -17035,24 +16832,23 @@ design: (work@oh_fifo_async) \_operation: , line:27:26, endln:29:33 |vpiOpType:28 |vpiOperand: - \_part_select: , line:29:6, endln:29:16 + \_part_select: en2 (en2), line:29:6, endln:29:16 |vpiParent: - \_ref_obj: en2 (en2), line:29:6, endln:29:9 - |vpiParent: - \_operation: , line:29:6, endln:29:32 - |vpiName:en2 - |vpiDefName:en2 + \_operation: , line:29:6, endln:29:32 + |vpiName:en2 + |vpiDefName:en2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:10, endln:29:13 |vpiParent: - \_operation: , line:27:26, endln:29:33 + \_part_select: en2 (en2), line:29:6, endln:29:16 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:10, endln:29:11 + \_ref_obj: (en2.N), line:29:10, endln:29:11 |vpiParent: - \_operation: , line:27:26, endln:29:33 + \_operation: , line:29:10, endln:29:13 |vpiName:N + |vpiFullName:en2.N |vpiOperand: \_constant: , line:29:12, endln:29:13 |vpiParent: @@ -17068,24 +16864,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:29:19, endln:29:32 + \_part_select: clkin2 (clkin2), line:29:19, endln:29:32 |vpiParent: - \_ref_obj: clkin2 (clkin2), line:29:19, endln:29:25 - |vpiParent: - \_operation: , line:29:6, endln:29:32 - |vpiName:clkin2 - |vpiDefName:clkin2 + \_operation: , line:29:6, endln:29:32 + |vpiName:clkin2 + |vpiDefName:clkin2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:26, endln:29:29 |vpiParent: - \_operation: , line:29:6, endln:29:32 + \_part_select: clkin2 (clkin2), line:29:19, endln:29:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:26, endln:29:27 + \_ref_obj: (clkin2.N), line:29:26, endln:29:27 |vpiParent: - \_operation: , line:29:6, endln:29:32 + \_operation: , line:29:26, endln:29:29 |vpiName:N + |vpiFullName:clkin2.N |vpiOperand: \_constant: , line:29:28, endln:29:29 |vpiParent: @@ -17106,24 +16901,23 @@ design: (work@oh_fifo_async) \_operation: , line:27:26, endln:30:33 |vpiOpType:28 |vpiOperand: - \_part_select: , line:30:6, endln:30:16 + \_part_select: en3 (en3), line:30:6, endln:30:16 |vpiParent: - \_ref_obj: en3 (en3), line:30:6, endln:30:9 - |vpiParent: - \_operation: , line:30:6, endln:30:32 - |vpiName:en3 - |vpiDefName:en3 + \_operation: , line:30:6, endln:30:32 + |vpiName:en3 + |vpiDefName:en3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:10, endln:30:13 |vpiParent: - \_operation: , line:27:26, endln:30:33 + \_part_select: en3 (en3), line:30:6, endln:30:16 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:10, endln:30:11 + \_ref_obj: (en3.N), line:30:10, endln:30:11 |vpiParent: - \_operation: , line:27:26, endln:30:33 + \_operation: , line:30:10, endln:30:13 |vpiName:N + |vpiFullName:en3.N |vpiOperand: \_constant: , line:30:12, endln:30:13 |vpiParent: @@ -17139,24 +16933,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:30:19, endln:30:32 + \_part_select: clkin3 (clkin3), line:30:19, endln:30:32 |vpiParent: - \_ref_obj: clkin3 (clkin3), line:30:19, endln:30:25 - |vpiParent: - \_operation: , line:30:6, endln:30:32 - |vpiName:clkin3 - |vpiDefName:clkin3 + \_operation: , line:30:6, endln:30:32 + |vpiName:clkin3 + |vpiDefName:clkin3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:26, endln:30:29 |vpiParent: - \_operation: , line:30:6, endln:30:32 + \_part_select: clkin3 (clkin3), line:30:19, endln:30:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:26, endln:30:27 + \_ref_obj: (clkin3.N), line:30:26, endln:30:27 |vpiParent: - \_operation: , line:30:6, endln:30:32 + \_operation: , line:30:26, endln:30:29 |vpiName:N + |vpiFullName:clkin3.N |vpiOperand: \_constant: , line:30:28, endln:30:29 |vpiParent: @@ -17172,22 +16965,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:27:10, endln:27:23 + \_part_select: clkout (clkout), line:27:10, endln:27:23 |vpiParent: - \_ref_obj: clkout (clkout) - |vpiParent: - \_cont_assign: , line:27:10, endln:30:33 - |vpiName:clkout - |vpiDefName:clkout + \_cont_assign: , line:27:10, endln:30:33 + |vpiName:clkout + |vpiDefName:clkout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:17, endln:27:20 + |vpiParent: + \_part_select: clkout (clkout), line:27:10, endln:27:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:27:17, endln:27:18 + \_ref_obj: (clkout.N), line:27:17, endln:27:18 |vpiParent: \_operation: , line:27:17, endln:27:20 |vpiName:N + |vpiFullName:clkout.N |vpiOperand: \_constant: , line:27:19, endln:27:20 |vpiParent: @@ -17378,24 +17172,23 @@ design: (work@oh_fifo_async) \_cont_assign: , line:20:10, endln:20:34 |vpiOpType:7 |vpiOperand: - \_part_select: , line:20:21, endln:20:33 + \_part_select: clkin (clkin), line:20:21, endln:20:33 |vpiParent: - \_ref_obj: clkin (clkin), line:20:21, endln:20:26 - |vpiParent: - \_operation: , line:20:19, endln:20:34 - |vpiName:clkin - |vpiDefName:clkin + \_operation: , line:20:19, endln:20:34 + |vpiName:clkin + |vpiDefName:clkin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:27, endln:20:30 |vpiParent: - \_operation: , line:20:19, endln:20:34 + \_part_select: clkin (clkin), line:20:21, endln:20:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:27, endln:20:28 + \_ref_obj: (clkin.N), line:20:27, endln:20:28 |vpiParent: - \_operation: , line:20:19, endln:20:34 + \_operation: , line:20:27, endln:20:30 |vpiName:N + |vpiFullName:clkin.N |vpiOperand: \_constant: , line:20:29, endln:20:30 |vpiParent: @@ -17431,20 +17224,21 @@ design: (work@oh_fifo_async) \_port: (clkin), line:28:9, endln:28:31 |vpiName:clkin |vpiHighConn: - \_part_select: , line:28:18, endln:28:30 - |vpiParent: - \_ref_obj: clkin (clkin), line:28:18, endln:28:23 - |vpiName:clkin - |vpiDefName:clkin + \_part_select: clkin (clkin), line:28:18, endln:28:30 + |vpiName:clkin + |vpiDefName:clkin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:24, endln:28:27 + |vpiParent: + \_part_select: clkin (clkin), line:28:18, endln:28:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:24, endln:28:25 + \_ref_obj: (clkin.N), line:28:24, endln:28:25 |vpiParent: \_operation: , line:28:24, endln:28:27 |vpiName:N + |vpiFullName:clkin.N |vpiOperand: \_constant: , line:28:26, endln:28:27 |vpiParent: @@ -17803,26 +17597,24 @@ design: (work@oh_fifo_async) \_if_else: , line:36:6, endln:39:40 |vpiOpType:82 |vpiRhs: - \_part_select: , line:37:24, endln:37:40 + \_part_select: load_data (work@oh_counter.load_data), line:37:24, endln:37:40 |vpiParent: - \_ref_obj: load_data (work@oh_counter.load_data), line:37:24, endln:37:33 - |vpiParent: - \_assignment: , line:37:8, endln:37:40 - |vpiName:load_data - |vpiFullName:work@oh_counter.load_data - |vpiDefName:load_data + \_assignment: , line:37:8, endln:37:40 + |vpiName:load_data + |vpiFullName:work@oh_counter.load_data + |vpiDefName:load_data |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:34, endln:37:37 |vpiParent: - \_if_else: , line:36:6, endln:39:40 + \_part_select: load_data (work@oh_counter.load_data), line:37:24, endln:37:40 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:37:34, endln:37:35 + \_ref_obj: (work@oh_counter.load_data.N), line:37:34, endln:37:35 |vpiParent: - \_if_else: , line:36:6, endln:39:40 + \_operation: , line:37:34, endln:37:37 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.load_data.N |vpiOperand: \_constant: , line:37:36, endln:37:37 |vpiParent: @@ -17838,26 +17630,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:37:8, endln:37:20 + \_part_select: count (work@oh_counter.count), line:37:8, endln:37:20 |vpiParent: - \_ref_obj: count (work@oh_counter.count) - |vpiParent: - \_assignment: , line:37:8, endln:37:40 - |vpiName:count - |vpiFullName:work@oh_counter.count - |vpiDefName:count + \_assignment: , line:37:8, endln:37:40 + |vpiName:count + |vpiFullName:work@oh_counter.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:14, endln:37:17 |vpiParent: - \_if_else: , line:36:6, endln:39:40 + \_part_select: count (work@oh_counter.count), line:37:8, endln:37:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:37:14, endln:37:15 + \_ref_obj: (work@oh_counter.count.N), line:37:14, endln:37:15 |vpiParent: - \_if_else: , line:36:6, endln:39:40 + \_operation: , line:37:14, endln:37:17 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.count.N |vpiOperand: \_constant: , line:37:16, endln:37:17 |vpiParent: @@ -17884,7 +17674,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_counter.en), line:38:15, endln:38:17 |vpiParent: - \_if_else: , line:36:6, endln:39:40 + \_operation: , line:38:15, endln:38:45 |vpiName:en |vpiFullName:work@oh_counter.en |vpiOperand: @@ -17900,7 +17690,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_counter.wraparound), line:38:22, endln:38:32 |vpiParent: - \_operation: , line:38:20, endln:38:45 + \_operation: , line:38:22, endln:38:44 |vpiName:wraparound |vpiFullName:work@oh_counter.wraparound |vpiOperand: @@ -17920,26 +17710,24 @@ design: (work@oh_fifo_async) \_if_stmt: , line:38:11, endln:39:40 |vpiOpType:82 |vpiRhs: - \_part_select: , line:39:24, endln:39:39 + \_part_select: count_in (work@oh_counter.count_in), line:39:24, endln:39:39 |vpiParent: - \_ref_obj: count_in (work@oh_counter.count_in), line:39:24, endln:39:32 - |vpiParent: - \_assignment: , line:39:8, endln:39:39 - |vpiName:count_in - |vpiFullName:work@oh_counter.count_in - |vpiDefName:count_in + \_assignment: , line:39:8, endln:39:39 + |vpiName:count_in + |vpiFullName:work@oh_counter.count_in + |vpiDefName:count_in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:33, endln:39:36 |vpiParent: - \_if_stmt: , line:38:11, endln:39:40 + \_part_select: count_in (work@oh_counter.count_in), line:39:24, endln:39:39 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:39:33, endln:39:34 + \_ref_obj: (work@oh_counter.count_in.N), line:39:33, endln:39:34 |vpiParent: - \_if_stmt: , line:38:11, endln:39:40 + \_operation: , line:39:33, endln:39:36 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.count_in.N |vpiOperand: \_constant: , line:39:35, endln:39:36 |vpiParent: @@ -17955,26 +17743,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:39:8, endln:39:20 + \_part_select: count (work@oh_counter.count), line:39:8, endln:39:20 |vpiParent: - \_ref_obj: count (work@oh_counter.count) - |vpiParent: - \_assignment: , line:39:8, endln:39:39 - |vpiName:count - |vpiFullName:work@oh_counter.count - |vpiDefName:count + \_assignment: , line:39:8, endln:39:39 + |vpiName:count + |vpiFullName:work@oh_counter.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:14, endln:39:17 |vpiParent: - \_if_stmt: , line:38:11, endln:39:40 + \_part_select: count (work@oh_counter.count), line:39:8, endln:39:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:39:14, endln:39:15 + \_ref_obj: (work@oh_counter.count.N), line:39:14, endln:39:15 |vpiParent: - \_if_stmt: , line:38:11, endln:39:40 + \_operation: , line:39:14, endln:39:17 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.count.N |vpiOperand: \_constant: , line:39:16, endln:39:17 |vpiParent: @@ -18023,7 +17809,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_counter.N), line:31:33, endln:31:34 |vpiParent: - \_operation: , line:31:24, endln:31:70 + \_operation: , line:31:33, endln:31:36 |vpiName:N |vpiFullName:work@oh_counter.N |vpiOperand: @@ -18074,7 +17860,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_counter.N), line:31:55, endln:31:56 |vpiParent: - \_operation: , line:31:24, endln:31:70 + \_operation: , line:31:55, endln:31:58 |vpiName:N |vpiFullName:work@oh_counter.N |vpiOperand: @@ -18103,23 +17889,24 @@ design: (work@oh_fifo_async) |vpiName:in |vpiFullName:work@oh_counter.in |vpiLhs: - \_part_select: , line:31:11, endln:31:21 + \_part_select: inb (work@oh_counter.inb), line:31:11, endln:31:21 |vpiParent: - \_ref_obj: inb (work@oh_counter.inb) - |vpiParent: - \_cont_assign: , line:31:11, endln:31:70 - |vpiName:inb - |vpiFullName:work@oh_counter.inb - |vpiDefName:inb + \_cont_assign: , line:31:11, endln:31:70 + |vpiName:inb + |vpiFullName:work@oh_counter.inb + |vpiDefName:inb |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:15, endln:31:18 + |vpiParent: + \_part_select: inb (work@oh_counter.inb), line:31:11, endln:31:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:15, endln:31:16 + \_ref_obj: (work@oh_counter.inb.N), line:31:15, endln:31:16 |vpiParent: \_operation: , line:31:15, endln:31:18 |vpiName:N + |vpiFullName:work@oh_counter.inb.N |vpiOperand: \_constant: , line:31:17, endln:31:18 |vpiParent: @@ -18213,26 +18000,24 @@ design: (work@oh_fifo_async) \_operation: , line:41:36, endln:41:52 |vpiOpType:7 |vpiOperand: - \_part_select: , line:41:39, endln:41:51 + \_part_select: count (work@oh_counter.count), line:41:39, endln:41:51 |vpiParent: - \_ref_obj: count (work@oh_counter.count), line:41:39, endln:41:44 - |vpiParent: - \_operation: , line:41:38, endln:41:51 - |vpiName:count - |vpiFullName:work@oh_counter.count - |vpiDefName:count + \_operation: , line:41:38, endln:41:51 + |vpiName:count + |vpiFullName:work@oh_counter.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:45, endln:41:48 |vpiParent: - \_operation: , line:41:38, endln:41:51 + \_part_select: count (work@oh_counter.count), line:41:39, endln:41:51 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:41:45, endln:41:46 + \_ref_obj: (work@oh_counter.count.N), line:41:45, endln:41:46 |vpiParent: - \_operation: , line:41:38, endln:41:51 + \_operation: , line:41:45, endln:41:48 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.count.N |vpiOperand: \_constant: , line:41:47, endln:41:48 |vpiParent: @@ -18255,12 +18040,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:42:11, endln:42:20 |vpiParent: - \_operation: , line:41:24, endln:42:39 + \_operation: , line:42:11, endln:42:38 |vpiOpType:28 |vpiOperand: \_operation: , line:42:11, endln:42:15 |vpiParent: - \_operation: , line:41:24, endln:42:39 + \_operation: , line:42:11, endln:42:20 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@oh_counter.dec), line:42:12, endln:42:15 @@ -18280,26 +18065,24 @@ design: (work@oh_fifo_async) \_operation: , line:42:11, endln:42:38 |vpiOpType:5 |vpiOperand: - \_part_select: , line:42:25, endln:42:37 + \_part_select: count (work@oh_counter.count), line:42:25, endln:42:37 |vpiParent: - \_ref_obj: count (work@oh_counter.count), line:42:25, endln:42:30 - |vpiParent: - \_operation: , line:42:24, endln:42:37 - |vpiName:count - |vpiFullName:work@oh_counter.count - |vpiDefName:count + \_operation: , line:42:24, endln:42:37 + |vpiName:count + |vpiFullName:work@oh_counter.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:42:31, endln:42:34 |vpiParent: - \_operation: , line:42:24, endln:42:37 + \_part_select: count (work@oh_counter.count), line:42:25, endln:42:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_counter.N), line:42:31, endln:42:32 + \_ref_obj: (work@oh_counter.count.N), line:42:31, endln:42:32 |vpiParent: - \_operation: , line:42:24, endln:42:37 + \_operation: , line:42:31, endln:42:34 |vpiName:N - |vpiFullName:work@oh_counter.N + |vpiFullName:work@oh_counter.count.N |vpiOperand: \_constant: , line:42:33, endln:42:34 |vpiParent: @@ -18354,22 +18137,23 @@ design: (work@oh_fifo_async) \_cont_assign: , line:47:10, endln:47:52 |vpiOpType:24 |vpiOperand: - \_part_select: , line:47:27, endln:47:39 + \_part_select: count (count), line:47:27, endln:47:39 |vpiParent: - \_ref_obj: count (count), line:47:27, endln:47:32 - |vpiParent: - \_operation: , line:47:27, endln:47:52 - |vpiName:count - |vpiDefName:count + \_operation: , line:47:27, endln:47:52 + |vpiName:count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:33, endln:47:36 + |vpiParent: + \_part_select: count (count), line:47:27, endln:47:39 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:33, endln:47:34 + \_ref_obj: (count.N), line:47:33, endln:47:34 |vpiParent: \_operation: , line:47:33, endln:47:36 |vpiName:N + |vpiFullName:count.N |vpiOperand: \_constant: , line:47:35, endln:47:36 |vpiParent: @@ -18385,24 +18169,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:47:42, endln:47:52 + \_part_select: inb (inb), line:47:42, endln:47:52 |vpiParent: - \_ref_obj: inb (inb), line:47:42, endln:47:45 - |vpiParent: - \_operation: , line:47:27, endln:47:52 - |vpiName:inb - |vpiDefName:inb + \_operation: , line:47:27, endln:47:52 + |vpiName:inb + |vpiDefName:inb |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:46, endln:47:49 |vpiParent: - \_operation: , line:47:27, endln:47:52 + \_part_select: inb (inb), line:47:42, endln:47:52 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:46, endln:47:47 + \_ref_obj: (inb.N), line:47:46, endln:47:47 |vpiParent: - \_operation: , line:47:27, endln:47:52 + \_operation: , line:47:46, endln:47:49 |vpiName:N + |vpiFullName:inb.N |vpiOperand: \_constant: , line:47:48, endln:47:49 |vpiParent: @@ -18418,22 +18201,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:47:10, endln:47:25 + \_part_select: count_in (count_in), line:47:10, endln:47:25 |vpiParent: - \_ref_obj: count_in (count_in) - |vpiParent: - \_cont_assign: , line:47:10, endln:47:52 - |vpiName:count_in - |vpiDefName:count_in + \_cont_assign: , line:47:10, endln:47:52 + |vpiName:count_in + |vpiDefName:count_in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:19, endln:47:22 + |vpiParent: + \_part_select: count_in (count_in), line:47:10, endln:47:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:19, endln:47:20 + \_ref_obj: (count_in.N), line:47:19, endln:47:20 |vpiParent: \_operation: , line:47:19, endln:47:22 |vpiName:N + |vpiFullName:count_in.N |vpiOperand: \_constant: , line:47:21, endln:47:22 |vpiParent: @@ -18458,20 +18242,21 @@ design: (work@oh_fifo_async) \_port: (sum), line:53:6, endln:53:28 |vpiName:sum |vpiHighConn: - \_part_select: , line:53:13, endln:53:27 - |vpiParent: - \_ref_obj: cout_in (cout_in), line:53:13, endln:53:20 - |vpiName:cout_in - |vpiDefName:cout_in + \_part_select: cout_in (cout_in), line:53:13, endln:53:27 + |vpiName:cout_in + |vpiDefName:cout_in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:53:21, endln:53:24 + |vpiParent: + \_part_select: cout_in (cout_in), line:53:13, endln:53:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:53:21, endln:53:22 + \_ref_obj: (cout_in.N), line:53:21, endln:53:22 |vpiParent: \_operation: , line:53:21, endln:53:24 |vpiName:N + |vpiFullName:cout_in.N |vpiOperand: \_constant: , line:53:23, endln:53:24 |vpiParent: @@ -18494,20 +18279,21 @@ design: (work@oh_fifo_async) \_port: (a), line:57:6, endln:57:24 |vpiName:a |vpiHighConn: - \_part_select: , line:57:11, endln:57:23 - |vpiParent: - \_ref_obj: count (count), line:57:11, endln:57:16 - |vpiName:count - |vpiDefName:count + \_part_select: count (count), line:57:11, endln:57:23 + |vpiName:count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:17, endln:57:20 + |vpiParent: + \_part_select: count (count), line:57:11, endln:57:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:57:17, endln:57:18 + \_ref_obj: (count.N), line:57:17, endln:57:18 |vpiParent: \_operation: , line:57:17, endln:57:20 |vpiName:N + |vpiFullName:count.N |vpiOperand: \_constant: , line:57:19, endln:57:20 |vpiParent: @@ -18526,20 +18312,21 @@ design: (work@oh_fifo_async) \_port: (b), line:58:6, endln:58:25 |vpiName:b |vpiHighConn: - \_part_select: , line:58:11, endln:58:24 - |vpiParent: - \_ref_obj: in_mux (in_mux), line:58:11, endln:58:17 - |vpiName:in_mux - |vpiDefName:in_mux + \_part_select: in_mux (in_mux), line:58:11, endln:58:24 + |vpiName:in_mux + |vpiDefName:in_mux |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:18, endln:58:21 + |vpiParent: + \_part_select: in_mux (in_mux), line:58:11, endln:58:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:58:18, endln:58:19 + \_ref_obj: (in_mux.N), line:58:18, endln:58:19 |vpiParent: \_operation: , line:58:18, endln:58:21 |vpiName:N + |vpiFullName:in_mux.N |vpiOperand: \_constant: , line:58:20, endln:58:21 |vpiParent: @@ -18927,22 +18714,23 @@ design: (work@oh_fifo_async) \_operation: , line:22:21, endln:22:57 |vpiOpType:30 |vpiOperand: - \_part_select: , line:22:21, endln:22:31 + \_part_select: in0 (in0), line:22:21, endln:22:31 |vpiParent: - \_ref_obj: in0 (in0), line:22:21, endln:22:24 - |vpiParent: - \_operation: , line:22:21, endln:22:44 - |vpiName:in0 - |vpiDefName:in0 + \_operation: , line:22:21, endln:22:44 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:25, endln:22:28 + |vpiParent: + \_part_select: in0 (in0), line:22:21, endln:22:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:25, endln:22:26 + \_ref_obj: (in0.N), line:22:25, endln:22:26 |vpiParent: \_operation: , line:22:25, endln:22:28 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:22:27, endln:22:28 |vpiParent: @@ -18958,24 +18746,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:22:34, endln:22:44 + \_part_select: in1 (in1), line:22:34, endln:22:44 |vpiParent: - \_ref_obj: in1 (in1), line:22:34, endln:22:37 - |vpiParent: - \_operation: , line:22:21, endln:22:44 - |vpiName:in1 - |vpiDefName:in1 + \_operation: , line:22:21, endln:22:44 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:38, endln:22:41 |vpiParent: - \_operation: , line:22:21, endln:22:44 + \_part_select: in1 (in1), line:22:34, endln:22:44 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:38, endln:22:39 + \_ref_obj: (in1.N), line:22:38, endln:22:39 |vpiParent: - \_operation: , line:22:21, endln:22:44 + \_operation: , line:22:38, endln:22:41 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:22:40, endln:22:41 |vpiParent: @@ -18991,24 +18778,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:22:47, endln:22:57 + \_part_select: in2 (in2), line:22:47, endln:22:57 |vpiParent: - \_ref_obj: in2 (in2), line:22:47, endln:22:50 - |vpiParent: - \_operation: , line:22:21, endln:22:57 - |vpiName:in2 - |vpiDefName:in2 + \_operation: , line:22:21, endln:22:57 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:51, endln:22:54 |vpiParent: - \_operation: , line:22:21, endln:22:57 + \_part_select: in2 (in2), line:22:47, endln:22:57 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:51, endln:22:52 + \_ref_obj: (in2.N), line:22:51, endln:22:52 |vpiParent: - \_operation: , line:22:21, endln:22:57 + \_operation: , line:22:51, endln:22:54 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:22:53, endln:22:54 |vpiParent: @@ -19024,22 +18810,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:22:10, endln:22:18 + \_part_select: s (s), line:22:10, endln:22:18 |vpiParent: - \_ref_obj: s (s) - |vpiParent: - \_cont_assign: , line:22:10, endln:22:57 - |vpiName:s - |vpiDefName:s + \_cont_assign: , line:22:10, endln:22:57 + |vpiName:s + |vpiDefName:s |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:12, endln:22:15 + |vpiParent: + \_part_select: s (s), line:22:10, endln:22:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:22:12, endln:22:13 + \_ref_obj: (s.N), line:22:12, endln:22:13 |vpiParent: \_operation: , line:22:12, endln:22:15 |vpiName:N + |vpiFullName:s.N |vpiOperand: \_constant: , line:22:14, endln:22:15 |vpiParent: @@ -19072,22 +18859,23 @@ design: (work@oh_fifo_async) \_operation: , line:24:21, endln:25:32 |vpiOpType:28 |vpiOperand: - \_part_select: , line:24:22, endln:24:32 + \_part_select: in0 (in0), line:24:22, endln:24:32 |vpiParent: - \_ref_obj: in0 (in0), line:24:22, endln:24:25 - |vpiParent: - \_operation: , line:24:22, endln:24:45 - |vpiName:in0 - |vpiDefName:in0 + \_operation: , line:24:22, endln:24:45 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:26, endln:24:29 + |vpiParent: + \_part_select: in0 (in0), line:24:22, endln:24:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:26, endln:24:27 + \_ref_obj: (in0.N), line:24:26, endln:24:27 |vpiParent: \_operation: , line:24:26, endln:24:29 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:24:28, endln:24:29 |vpiParent: @@ -19103,24 +18891,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:24:35, endln:24:45 + \_part_select: in1 (in1), line:24:35, endln:24:45 |vpiParent: - \_ref_obj: in1 (in1), line:24:35, endln:24:38 - |vpiParent: - \_operation: , line:24:22, endln:24:45 - |vpiName:in1 - |vpiDefName:in1 + \_operation: , line:24:22, endln:24:45 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:39, endln:24:42 |vpiParent: - \_operation: , line:24:22, endln:24:45 + \_part_select: in1 (in1), line:24:35, endln:24:45 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:39, endln:24:40 + \_ref_obj: (in1.N), line:24:39, endln:24:40 |vpiParent: - \_operation: , line:24:22, endln:24:45 + \_operation: , line:24:39, endln:24:42 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:24:41, endln:24:42 |vpiParent: @@ -19141,24 +18928,23 @@ design: (work@oh_fifo_async) \_operation: , line:24:21, endln:25:32 |vpiOpType:28 |vpiOperand: - \_part_select: , line:25:8, endln:25:18 + \_part_select: in1 (in1), line:25:8, endln:25:18 |vpiParent: - \_ref_obj: in1 (in1), line:25:8, endln:25:11 - |vpiParent: - \_operation: , line:25:8, endln:25:31 - |vpiName:in1 - |vpiDefName:in1 + \_operation: , line:25:8, endln:25:31 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:12, endln:25:15 |vpiParent: - \_operation: , line:24:21, endln:25:32 + \_part_select: in1 (in1), line:25:8, endln:25:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:12, endln:25:13 + \_ref_obj: (in1.N), line:25:12, endln:25:13 |vpiParent: - \_operation: , line:24:21, endln:25:32 + \_operation: , line:25:12, endln:25:15 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:25:14, endln:25:15 |vpiParent: @@ -19174,24 +18960,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:25:21, endln:25:31 + \_part_select: in2 (in2), line:25:21, endln:25:31 |vpiParent: - \_ref_obj: in2 (in2), line:25:21, endln:25:24 - |vpiParent: - \_operation: , line:25:8, endln:25:31 - |vpiName:in2 - |vpiDefName:in2 + \_operation: , line:25:8, endln:25:31 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:25, endln:25:28 |vpiParent: - \_operation: , line:25:8, endln:25:31 + \_part_select: in2 (in2), line:25:21, endln:25:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:25, endln:25:26 + \_ref_obj: (in2.N), line:25:25, endln:25:26 |vpiParent: - \_operation: , line:25:8, endln:25:31 + \_operation: , line:25:25, endln:25:28 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:25:27, endln:25:28 |vpiParent: @@ -19212,24 +18997,23 @@ design: (work@oh_fifo_async) \_operation: , line:24:21, endln:26:33 |vpiOpType:28 |vpiOperand: - \_part_select: , line:26:8, endln:26:18 + \_part_select: in2 (in2), line:26:8, endln:26:18 |vpiParent: - \_ref_obj: in2 (in2), line:26:8, endln:26:11 - |vpiParent: - \_operation: , line:26:8, endln:26:31 - |vpiName:in2 - |vpiDefName:in2 + \_operation: , line:26:8, endln:26:31 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:12, endln:26:15 |vpiParent: - \_operation: , line:24:21, endln:26:33 + \_part_select: in2 (in2), line:26:8, endln:26:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:12, endln:26:13 + \_ref_obj: (in2.N), line:26:12, endln:26:13 |vpiParent: - \_operation: , line:24:21, endln:26:33 + \_operation: , line:26:12, endln:26:15 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:26:14, endln:26:15 |vpiParent: @@ -19245,24 +19029,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:26:21, endln:26:31 + \_part_select: in0 (in0), line:26:21, endln:26:31 |vpiParent: - \_ref_obj: in0 (in0), line:26:21, endln:26:24 - |vpiParent: - \_operation: , line:26:8, endln:26:31 - |vpiName:in0 - |vpiDefName:in0 + \_operation: , line:26:8, endln:26:31 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:25, endln:26:28 |vpiParent: - \_operation: , line:26:8, endln:26:31 + \_part_select: in0 (in0), line:26:21, endln:26:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:25, endln:26:26 + \_ref_obj: (in0.N), line:26:25, endln:26:26 |vpiParent: - \_operation: , line:26:8, endln:26:31 + \_operation: , line:26:25, endln:26:28 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:26:27, endln:26:28 |vpiParent: @@ -19278,22 +19061,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:24:10, endln:24:18 + \_part_select: c (c), line:24:10, endln:24:18 |vpiParent: - \_ref_obj: c (c) - |vpiParent: - \_cont_assign: , line:24:10, endln:26:33 - |vpiName:c - |vpiDefName:c + \_cont_assign: , line:24:10, endln:26:33 + |vpiName:c + |vpiDefName:c |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:12, endln:24:15 + |vpiParent: + \_part_select: c (c), line:24:10, endln:24:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:12, endln:24:13 + \_ref_obj: (c.N), line:24:12, endln:24:13 |vpiParent: \_operation: , line:24:12, endln:24:15 |vpiName:N + |vpiFullName:c.N |vpiOperand: \_constant: , line:24:14, endln:24:15 |vpiParent: @@ -19734,10 +19518,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (carry_int), line:30:10, endln:30:22 |vpiParent: - \_ref_obj: (carry_int) - |vpiParent: - \_cont_assign: , line:30:10, endln:30:28 - |vpiName:carry_int + \_cont_assign: , line:30:10, endln:30:28 |vpiName:carry_int |vpiIndex: \_constant: , line:30:20, endln:30:21 @@ -19752,17 +19533,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (carry_int), line:31:25, endln:31:37 |vpiParent: - \_ref_obj: (carry_int) - |vpiParent: - \_cont_assign: , line:31:10, endln:31:37 - |vpiName:carry_int + \_cont_assign: , line:31:10, endln:31:37 |vpiName:carry_int |vpiIndex: - \_ref_obj: (carry_int.N), line:31:35, endln:31:36 + \_ref_obj: (N), line:31:35, endln:31:36 |vpiParent: \_bit_select: (carry_int), line:31:25, endln:31:37 |vpiName:N - |vpiFullName:carry_int.N |vpiLhs: \_ref_obj: (cout), line:31:10, endln:31:14 |vpiParent: @@ -19776,20 +19553,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:36:8, endln:36:24 |vpiName:in0 |vpiHighConn: - \_part_select: , line:36:13, endln:36:23 - |vpiParent: - \_ref_obj: in0 (in0), line:36:13, endln:36:16 - |vpiName:in0 - |vpiDefName:in0 + \_part_select: in0 (in0), line:36:13, endln:36:23 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:17, endln:36:20 + |vpiParent: + \_part_select: in0 (in0), line:36:13, endln:36:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:36:17, endln:36:18 + \_ref_obj: (in0.N), line:36:17, endln:36:18 |vpiParent: \_operation: , line:36:17, endln:36:20 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:36:19, endln:36:20 |vpiParent: @@ -19808,20 +19586,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:37:8, endln:37:24 |vpiName:in1 |vpiHighConn: - \_part_select: , line:37:13, endln:37:23 - |vpiParent: - \_ref_obj: in1 (in1), line:37:13, endln:37:16 - |vpiName:in1 - |vpiDefName:in1 + \_part_select: in1 (in1), line:37:13, endln:37:23 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:17, endln:37:20 + |vpiParent: + \_part_select: in1 (in1), line:37:13, endln:37:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:37:17, endln:37:18 + \_ref_obj: (in1.N), line:37:17, endln:37:18 |vpiParent: \_operation: , line:37:17, endln:37:20 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:37:19, endln:37:20 |vpiParent: @@ -19840,20 +19619,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:38:8, endln:38:24 |vpiName:in2 |vpiHighConn: - \_part_select: , line:38:13, endln:38:23 - |vpiParent: - \_ref_obj: in2 (in2), line:38:13, endln:38:16 - |vpiName:in2 - |vpiDefName:in2 + \_part_select: in2 (in2), line:38:13, endln:38:23 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:17, endln:38:20 + |vpiParent: + \_part_select: in2 (in2), line:38:13, endln:38:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:38:17, endln:38:18 + \_ref_obj: (in2.N), line:38:17, endln:38:18 |vpiParent: \_operation: , line:38:17, endln:38:20 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:38:19, endln:38:20 |vpiParent: @@ -19872,15 +19652,16 @@ design: (work@oh_fifo_async) \_port: (c), line:40:8, endln:40:26 |vpiName:c |vpiHighConn: - \_part_select: , line:40:11, endln:40:25 - |vpiParent: - \_ref_obj: carry_int (carry_int), line:40:11, endln:40:20 - |vpiName:carry_int - |vpiDefName:carry_int + \_part_select: carry_int (carry_int), line:40:11, endln:40:25 + |vpiName:carry_int + |vpiDefName:carry_int |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (N), line:40:21, endln:40:22 + \_ref_obj: (carry_int.N), line:40:21, endln:40:22 + |vpiParent: + \_part_select: carry_int (carry_int), line:40:11, endln:40:25 |vpiName:N + |vpiFullName:carry_int.N |vpiRightRange: \_constant: , line:40:23, endln:40:24 |vpiDecompile:1 @@ -19891,20 +19672,21 @@ design: (work@oh_fifo_async) \_port: (s), line:41:8, endln:41:26 |vpiName:s |vpiHighConn: - \_part_select: , line:41:11, endln:41:25 - |vpiParent: - \_ref_obj: sum_int (sum_int), line:41:11, endln:41:18 - |vpiName:sum_int - |vpiDefName:sum_int + \_part_select: sum_int (sum_int), line:41:11, endln:41:25 + |vpiName:sum_int + |vpiDefName:sum_int |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:19, endln:41:22 + |vpiParent: + \_part_select: sum_int (sum_int), line:41:11, endln:41:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:41:19, endln:41:20 + \_ref_obj: (sum_int.N), line:41:19, endln:41:20 |vpiParent: \_operation: , line:41:19, endln:41:22 |vpiName:N + |vpiFullName:sum_int.N |vpiOperand: \_constant: , line:41:21, endln:41:22 |vpiParent: @@ -19927,20 +19709,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:45:8, endln:45:24 |vpiName:in0 |vpiHighConn: - \_part_select: , line:45:13, endln:45:23 - |vpiParent: - \_ref_obj: in3 (in3), line:45:13, endln:45:16 - |vpiName:in3 - |vpiDefName:in3 + \_part_select: in3 (in3), line:45:13, endln:45:23 + |vpiName:in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:45:17, endln:45:20 + |vpiParent: + \_part_select: in3 (in3), line:45:13, endln:45:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:45:17, endln:45:18 + \_ref_obj: (in3.N), line:45:17, endln:45:18 |vpiParent: \_operation: , line:45:17, endln:45:20 |vpiName:N + |vpiFullName:in3.N |vpiOperand: \_constant: , line:45:19, endln:45:20 |vpiParent: @@ -19959,20 +19742,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:46:8, endln:46:28 |vpiName:in1 |vpiHighConn: - \_part_select: , line:46:13, endln:46:27 - |vpiParent: - \_ref_obj: sum_int (sum_int), line:46:13, endln:46:20 - |vpiName:sum_int - |vpiDefName:sum_int + \_part_select: sum_int (sum_int), line:46:13, endln:46:27 + |vpiName:sum_int + |vpiDefName:sum_int |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:21, endln:46:24 + |vpiParent: + \_part_select: sum_int (sum_int), line:46:13, endln:46:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:46:21, endln:46:22 + \_ref_obj: (sum_int.N), line:46:21, endln:46:22 |vpiParent: \_operation: , line:46:21, endln:46:24 |vpiName:N + |vpiFullName:sum_int.N |vpiOperand: \_constant: , line:46:23, endln:46:24 |vpiParent: @@ -19991,20 +19775,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:47:8, endln:47:30 |vpiName:in2 |vpiHighConn: - \_part_select: , line:47:13, endln:47:29 - |vpiParent: - \_ref_obj: carry_int (carry_int), line:47:13, endln:47:22 - |vpiName:carry_int - |vpiDefName:carry_int + \_part_select: carry_int (carry_int), line:47:13, endln:47:29 + |vpiName:carry_int + |vpiDefName:carry_int |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:23, endln:47:26 + |vpiParent: + \_part_select: carry_int (carry_int), line:47:13, endln:47:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:23, endln:47:24 + \_ref_obj: (carry_int.N), line:47:23, endln:47:24 |vpiParent: \_operation: , line:47:23, endln:47:26 |vpiName:N + |vpiFullName:carry_int.N |vpiOperand: \_constant: , line:47:25, endln:47:26 |vpiParent: @@ -20023,20 +19808,21 @@ design: (work@oh_fifo_async) \_port: (c), line:49:8, endln:49:20 |vpiName:c |vpiHighConn: - \_part_select: , line:49:11, endln:49:19 - |vpiParent: - \_ref_obj: c (c), line:49:11, endln:49:12 - |vpiName:c - |vpiDefName:c + \_part_select: c (c), line:49:11, endln:49:19 + |vpiName:c + |vpiDefName:c |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:49:13, endln:49:16 + |vpiParent: + \_part_select: c (c), line:49:11, endln:49:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:49:13, endln:49:14 + \_ref_obj: (c.N), line:49:13, endln:49:14 |vpiParent: \_operation: , line:49:13, endln:49:16 |vpiName:N + |vpiFullName:c.N |vpiOperand: \_constant: , line:49:15, endln:49:16 |vpiParent: @@ -20055,20 +19841,21 @@ design: (work@oh_fifo_async) \_port: (s), line:50:8, endln:50:20 |vpiName:s |vpiHighConn: - \_part_select: , line:50:11, endln:50:19 - |vpiParent: - \_ref_obj: s (s), line:50:11, endln:50:12 - |vpiName:s - |vpiDefName:s + \_part_select: s (s), line:50:11, endln:50:19 + |vpiName:s + |vpiDefName:s |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:50:13, endln:50:16 + |vpiParent: + \_part_select: s (s), line:50:11, endln:50:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:50:13, endln:50:14 + \_ref_obj: (s.N), line:50:13, endln:50:14 |vpiParent: \_operation: , line:50:13, endln:50:16 |vpiName:N + |vpiFullName:s.N |vpiOperand: \_constant: , line:50:15, endln:50:16 |vpiParent: @@ -20093,20 +19880,23 @@ design: (work@oh_fifo_async) \_cont_assign: , line:57:10, endln:57:50 |vpiOpType:33 |vpiOperand: - \_part_select: , line:57:29, endln:57:45 + \_part_select: carry_out (carry_out), line:57:29, endln:57:45 |vpiParent: - \_ref_obj: carry_out (carry_out), line:57:29, endln:57:38 - |vpiName:carry_out - |vpiDefName:carry_out + \_operation: , line:57:28, endln:57:50 + |vpiName:carry_out + |vpiDefName:carry_out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:39, endln:57:42 + |vpiParent: + \_part_select: carry_out (carry_out), line:57:29, endln:57:45 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:57:39, endln:57:40 + \_ref_obj: (carry_out.N), line:57:39, endln:57:40 |vpiParent: \_operation: , line:57:39, endln:57:42 |vpiName:N + |vpiFullName:carry_out.N |vpiOperand: \_constant: , line:57:41, endln:57:42 |vpiParent: @@ -20127,22 +19917,23 @@ design: (work@oh_fifo_async) \_operation: , line:57:28, endln:57:50 |vpiName:cin |vpiLhs: - \_part_select: , line:57:10, endln:57:25 + \_part_select: carry_in (carry_in), line:57:10, endln:57:25 |vpiParent: - \_ref_obj: carry_in (carry_in) - |vpiParent: - \_cont_assign: , line:57:10, endln:57:50 - |vpiName:carry_in - |vpiDefName:carry_in + \_cont_assign: , line:57:10, endln:57:50 + |vpiName:carry_in + |vpiDefName:carry_in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:19, endln:57:22 + |vpiParent: + \_part_select: carry_in (carry_in), line:57:10, endln:57:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:57:19, endln:57:20 + \_ref_obj: (carry_in.N), line:57:19, endln:57:20 |vpiParent: \_operation: , line:57:19, endln:57:22 |vpiName:N + |vpiFullName:carry_in.N |vpiOperand: \_constant: , line:57:21, endln:57:22 |vpiParent: @@ -20162,10 +19953,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (carry), line:73:17, endln:73:27 |vpiParent: - \_ref_obj: (carry) - |vpiParent: - \_cont_assign: , line:73:10, endln:73:27 - |vpiName:carry + \_cont_assign: , line:73:10, endln:73:27 |vpiName:carry |vpiIndex: \_operation: , line:73:23, endln:73:26 @@ -20937,20 +20725,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:35:13, endln:35:29 |vpiName:in0 |vpiHighConn: - \_part_select: , line:35:18, endln:35:28 - |vpiParent: - \_ref_obj: in0 (in0), line:35:18, endln:35:21 - |vpiName:in0 - |vpiDefName:in0 + \_part_select: in0 (in0), line:35:18, endln:35:28 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:22, endln:35:25 + |vpiParent: + \_part_select: in0 (in0), line:35:18, endln:35:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:35:22, endln:35:23 + \_ref_obj: (in0.N), line:35:22, endln:35:23 |vpiParent: \_operation: , line:35:22, endln:35:25 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:35:24, endln:35:25 |vpiParent: @@ -20969,20 +20758,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:36:6, endln:36:22 |vpiName:in1 |vpiHighConn: - \_part_select: , line:36:11, endln:36:21 - |vpiParent: - \_ref_obj: in1 (in1), line:36:11, endln:36:14 - |vpiName:in1 - |vpiDefName:in1 + \_part_select: in1 (in1), line:36:11, endln:36:21 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:15, endln:36:18 + |vpiParent: + \_part_select: in1 (in1), line:36:11, endln:36:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:36:15, endln:36:16 + \_ref_obj: (in1.N), line:36:15, endln:36:16 |vpiParent: \_operation: , line:36:15, endln:36:18 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:36:17, endln:36:18 |vpiParent: @@ -21001,20 +20791,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:37:6, endln:37:22 |vpiName:in2 |vpiHighConn: - \_part_select: , line:37:11, endln:37:21 - |vpiParent: - \_ref_obj: in2 (in2), line:37:11, endln:37:14 - |vpiName:in2 - |vpiDefName:in2 + \_part_select: in2 (in2), line:37:11, endln:37:21 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:15, endln:37:18 + |vpiParent: + \_part_select: in2 (in2), line:37:11, endln:37:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:37:15, endln:37:16 + \_ref_obj: (in2.N), line:37:15, endln:37:16 |vpiParent: \_operation: , line:37:15, endln:37:18 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:37:17, endln:37:18 |vpiParent: @@ -21033,20 +20824,21 @@ design: (work@oh_fifo_async) \_port: (c), line:38:6, endln:38:22 |vpiName:c |vpiHighConn: - \_part_select: , line:38:9, endln:38:21 - |vpiParent: - \_ref_obj: cout0 (cout0), line:38:9, endln:38:14 - |vpiName:cout0 - |vpiDefName:cout0 + \_part_select: cout0 (cout0), line:38:9, endln:38:21 + |vpiName:cout0 + |vpiDefName:cout0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:15, endln:38:18 + |vpiParent: + \_part_select: cout0 (cout0), line:38:9, endln:38:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:38:15, endln:38:16 + \_ref_obj: (cout0.N), line:38:15, endln:38:16 |vpiParent: \_operation: , line:38:15, endln:38:18 |vpiName:N + |vpiFullName:cout0.N |vpiOperand: \_constant: , line:38:17, endln:38:18 |vpiParent: @@ -21065,20 +20857,21 @@ design: (work@oh_fifo_async) \_port: (s), line:39:6, endln:39:23 |vpiName:s |vpiHighConn: - \_part_select: , line:39:9, endln:39:22 - |vpiParent: - \_ref_obj: s_int0 (s_int0), line:39:9, endln:39:15 - |vpiName:s_int0 - |vpiDefName:s_int0 + \_part_select: s_int0 (s_int0), line:39:9, endln:39:22 + |vpiName:s_int0 + |vpiDefName:s_int0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:16, endln:39:19 + |vpiParent: + \_part_select: s_int0 (s_int0), line:39:9, endln:39:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:39:16, endln:39:17 + \_ref_obj: (s_int0.N), line:39:16, endln:39:17 |vpiParent: \_operation: , line:39:16, endln:39:19 |vpiName:N + |vpiFullName:s_int0.N |vpiOperand: \_constant: , line:39:18, endln:39:19 |vpiParent: @@ -21105,20 +20898,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:44:13, endln:44:29 |vpiName:in0 |vpiHighConn: - \_part_select: , line:44:18, endln:44:28 - |vpiParent: - \_ref_obj: in3 (in3), line:44:18, endln:44:21 - |vpiName:in3 - |vpiDefName:in3 + \_part_select: in3 (in3), line:44:18, endln:44:28 + |vpiName:in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:44:22, endln:44:25 + |vpiParent: + \_part_select: in3 (in3), line:44:18, endln:44:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:44:22, endln:44:23 + \_ref_obj: (in3.N), line:44:22, endln:44:23 |vpiParent: \_operation: , line:44:22, endln:44:25 |vpiName:N + |vpiFullName:in3.N |vpiOperand: \_constant: , line:44:24, endln:44:25 |vpiParent: @@ -21137,20 +20931,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:45:6, endln:45:22 |vpiName:in1 |vpiHighConn: - \_part_select: , line:45:11, endln:45:21 - |vpiParent: - \_ref_obj: in4 (in4), line:45:11, endln:45:14 - |vpiName:in4 - |vpiDefName:in4 + \_part_select: in4 (in4), line:45:11, endln:45:21 + |vpiName:in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:45:15, endln:45:18 + |vpiParent: + \_part_select: in4 (in4), line:45:11, endln:45:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:45:15, endln:45:16 + \_ref_obj: (in4.N), line:45:15, endln:45:16 |vpiParent: \_operation: , line:45:15, endln:45:18 |vpiName:N + |vpiFullName:in4.N |vpiOperand: \_constant: , line:45:17, endln:45:18 |vpiParent: @@ -21169,20 +20964,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:46:6, endln:46:22 |vpiName:in2 |vpiHighConn: - \_part_select: , line:46:11, endln:46:21 - |vpiParent: - \_ref_obj: in5 (in5), line:46:11, endln:46:14 - |vpiName:in5 - |vpiDefName:in5 + \_part_select: in5 (in5), line:46:11, endln:46:21 + |vpiName:in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:15, endln:46:18 + |vpiParent: + \_part_select: in5 (in5), line:46:11, endln:46:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:46:15, endln:46:16 + \_ref_obj: (in5.N), line:46:15, endln:46:16 |vpiParent: \_operation: , line:46:15, endln:46:18 |vpiName:N + |vpiFullName:in5.N |vpiOperand: \_constant: , line:46:17, endln:46:18 |vpiParent: @@ -21201,20 +20997,21 @@ design: (work@oh_fifo_async) \_port: (c), line:47:6, endln:47:22 |vpiName:c |vpiHighConn: - \_part_select: , line:47:9, endln:47:21 - |vpiParent: - \_ref_obj: cout1 (cout1), line:47:9, endln:47:14 - |vpiName:cout1 - |vpiDefName:cout1 + \_part_select: cout1 (cout1), line:47:9, endln:47:21 + |vpiName:cout1 + |vpiDefName:cout1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:15, endln:47:18 + |vpiParent: + \_part_select: cout1 (cout1), line:47:9, endln:47:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:15, endln:47:16 + \_ref_obj: (cout1.N), line:47:15, endln:47:16 |vpiParent: \_operation: , line:47:15, endln:47:18 |vpiName:N + |vpiFullName:cout1.N |vpiOperand: \_constant: , line:47:17, endln:47:18 |vpiParent: @@ -21233,20 +21030,21 @@ design: (work@oh_fifo_async) \_port: (s), line:48:6, endln:48:23 |vpiName:s |vpiHighConn: - \_part_select: , line:48:9, endln:48:22 - |vpiParent: - \_ref_obj: s_int1 (s_int1), line:48:9, endln:48:15 - |vpiName:s_int1 - |vpiDefName:s_int1 + \_part_select: s_int1 (s_int1), line:48:9, endln:48:22 + |vpiName:s_int1 + |vpiDefName:s_int1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:48:16, endln:48:19 + |vpiParent: + \_part_select: s_int1 (s_int1), line:48:9, endln:48:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:48:16, endln:48:17 + \_ref_obj: (s_int1.N), line:48:16, endln:48:17 |vpiParent: \_operation: , line:48:16, endln:48:19 |vpiName:N + |vpiFullName:s_int1.N |vpiOperand: \_constant: , line:48:18, endln:48:19 |vpiParent: @@ -21273,20 +21071,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:53:11, endln:53:30 |vpiName:in0 |vpiHighConn: - \_part_select: , line:53:16, endln:53:29 - |vpiParent: - \_ref_obj: s_int0 (s_int0), line:53:16, endln:53:22 - |vpiName:s_int0 - |vpiDefName:s_int0 + \_part_select: s_int0 (s_int0), line:53:16, endln:53:29 + |vpiName:s_int0 + |vpiDefName:s_int0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:53:23, endln:53:26 + |vpiParent: + \_part_select: s_int0 (s_int0), line:53:16, endln:53:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:53:23, endln:53:24 + \_ref_obj: (s_int0.N), line:53:23, endln:53:24 |vpiParent: \_operation: , line:53:23, endln:53:26 |vpiName:N + |vpiFullName:s_int0.N |vpiOperand: \_constant: , line:53:25, endln:53:26 |vpiParent: @@ -21305,20 +21104,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:54:4, endln:54:23 |vpiName:in1 |vpiHighConn: - \_part_select: , line:54:9, endln:54:22 - |vpiParent: - \_ref_obj: s_int1 (s_int1), line:54:9, endln:54:15 - |vpiName:s_int1 - |vpiDefName:s_int1 + \_part_select: s_int1 (s_int1), line:54:9, endln:54:22 + |vpiName:s_int1 + |vpiDefName:s_int1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:54:16, endln:54:19 + |vpiParent: + \_part_select: s_int1 (s_int1), line:54:9, endln:54:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:54:16, endln:54:17 + \_ref_obj: (s_int1.N), line:54:16, endln:54:17 |vpiParent: \_operation: , line:54:16, endln:54:19 |vpiName:N + |vpiFullName:s_int1.N |vpiOperand: \_constant: , line:54:18, endln:54:19 |vpiParent: @@ -21337,20 +21137,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:55:4, endln:55:21 |vpiName:in2 |vpiHighConn: - \_part_select: , line:55:9, endln:55:20 - |vpiParent: - \_ref_obj: cin0 (cin0), line:55:9, endln:55:13 - |vpiName:cin0 - |vpiDefName:cin0 + \_part_select: cin0 (cin0), line:55:9, endln:55:20 + |vpiName:cin0 + |vpiDefName:cin0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:55:14, endln:55:17 + |vpiParent: + \_part_select: cin0 (cin0), line:55:9, endln:55:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:55:14, endln:55:15 + \_ref_obj: (cin0.N), line:55:14, endln:55:15 |vpiParent: \_operation: , line:55:14, endln:55:17 |vpiName:N + |vpiFullName:cin0.N |vpiOperand: \_constant: , line:55:16, endln:55:17 |vpiParent: @@ -21369,20 +21170,21 @@ design: (work@oh_fifo_async) \_port: (in3), line:56:4, endln:56:21 |vpiName:in3 |vpiHighConn: - \_part_select: , line:56:9, endln:56:20 - |vpiParent: - \_ref_obj: cin1 (cin1), line:56:9, endln:56:13 - |vpiName:cin1 - |vpiDefName:cin1 + \_part_select: cin1 (cin1), line:56:9, endln:56:20 + |vpiName:cin1 + |vpiDefName:cin1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:14, endln:56:17 + |vpiParent: + \_part_select: cin1 (cin1), line:56:9, endln:56:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:56:14, endln:56:15 + \_ref_obj: (cin1.N), line:56:14, endln:56:15 |vpiParent: \_operation: , line:56:14, endln:56:17 |vpiName:N + |vpiFullName:cin1.N |vpiOperand: \_constant: , line:56:16, endln:56:17 |vpiParent: @@ -21401,20 +21203,21 @@ design: (work@oh_fifo_async) \_port: (cin), line:57:4, endln:57:21 |vpiName:cin |vpiHighConn: - \_part_select: , line:57:9, endln:57:20 - |vpiParent: - \_ref_obj: cin2 (cin2), line:57:9, endln:57:13 - |vpiName:cin2 - |vpiDefName:cin2 + \_part_select: cin2 (cin2), line:57:9, endln:57:20 + |vpiName:cin2 + |vpiDefName:cin2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:14, endln:57:17 + |vpiParent: + \_part_select: cin2 (cin2), line:57:9, endln:57:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:57:14, endln:57:15 + \_ref_obj: (cin2.N), line:57:14, endln:57:15 |vpiParent: \_operation: , line:57:14, endln:57:17 |vpiName:N + |vpiFullName:cin2.N |vpiOperand: \_constant: , line:57:16, endln:57:17 |vpiParent: @@ -21433,20 +21236,21 @@ design: (work@oh_fifo_async) \_port: (cout), line:58:4, endln:58:23 |vpiName:cout |vpiHighConn: - \_part_select: , line:58:10, endln:58:22 - |vpiParent: - \_ref_obj: cout2 (cout2), line:58:10, endln:58:15 - |vpiName:cout2 - |vpiDefName:cout2 + \_part_select: cout2 (cout2), line:58:10, endln:58:22 + |vpiName:cout2 + |vpiDefName:cout2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:16, endln:58:19 + |vpiParent: + \_part_select: cout2 (cout2), line:58:10, endln:58:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:58:16, endln:58:17 + \_ref_obj: (cout2.N), line:58:16, endln:58:17 |vpiParent: \_operation: , line:58:16, endln:58:19 |vpiName:N + |vpiFullName:cout2.N |vpiOperand: \_constant: , line:58:18, endln:58:19 |vpiParent: @@ -21465,20 +21269,21 @@ design: (work@oh_fifo_async) \_port: (c), line:59:4, endln:59:16 |vpiName:c |vpiHighConn: - \_part_select: , line:59:7, endln:59:15 - |vpiParent: - \_ref_obj: c (c), line:59:7, endln:59:8 - |vpiName:c - |vpiDefName:c + \_part_select: c (c), line:59:7, endln:59:15 + |vpiName:c + |vpiDefName:c |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:9, endln:59:12 + |vpiParent: + \_part_select: c (c), line:59:7, endln:59:15 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:59:9, endln:59:10 + \_ref_obj: (c.N), line:59:9, endln:59:10 |vpiParent: \_operation: , line:59:9, endln:59:12 |vpiName:N + |vpiFullName:c.N |vpiOperand: \_constant: , line:59:11, endln:59:12 |vpiParent: @@ -21497,20 +21302,21 @@ design: (work@oh_fifo_async) \_port: (s), line:60:4, endln:60:16 |vpiName:s |vpiHighConn: - \_part_select: , line:60:7, endln:60:15 - |vpiParent: - \_ref_obj: s (s), line:60:7, endln:60:8 - |vpiName:s - |vpiDefName:s + \_part_select: s (s), line:60:7, endln:60:15 + |vpiName:s + |vpiDefName:s |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:60:9, endln:60:12 + |vpiParent: + \_part_select: s (s), line:60:7, endln:60:15 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:60:9, endln:60:10 + \_ref_obj: (s.N), line:60:9, endln:60:10 |vpiParent: \_operation: , line:60:9, endln:60:12 |vpiName:N + |vpiFullName:s.N |vpiOperand: \_constant: , line:60:11, endln:60:12 |vpiParent: @@ -22692,20 +22498,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:46:13, endln:46:29 |vpiName:in0 |vpiHighConn: - \_part_select: , line:46:18, endln:46:28 - |vpiParent: - \_ref_obj: in0 (in0), line:46:18, endln:46:21 - |vpiName:in0 - |vpiDefName:in0 + \_part_select: in0 (in0), line:46:18, endln:46:28 + |vpiName:in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:22, endln:46:25 + |vpiParent: + \_part_select: in0 (in0), line:46:18, endln:46:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:46:22, endln:46:23 + \_ref_obj: (in0.N), line:46:22, endln:46:23 |vpiParent: \_operation: , line:46:22, endln:46:25 |vpiName:N + |vpiFullName:in0.N |vpiOperand: \_constant: , line:46:24, endln:46:25 |vpiParent: @@ -22724,20 +22531,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:47:6, endln:47:22 |vpiName:in1 |vpiHighConn: - \_part_select: , line:47:11, endln:47:21 - |vpiParent: - \_ref_obj: in1 (in1), line:47:11, endln:47:14 - |vpiName:in1 - |vpiDefName:in1 + \_part_select: in1 (in1), line:47:11, endln:47:21 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:15, endln:47:18 + |vpiParent: + \_part_select: in1 (in1), line:47:11, endln:47:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:47:15, endln:47:16 + \_ref_obj: (in1.N), line:47:15, endln:47:16 |vpiParent: \_operation: , line:47:15, endln:47:18 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:47:17, endln:47:18 |vpiParent: @@ -22756,20 +22564,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:48:6, endln:48:22 |vpiName:in2 |vpiHighConn: - \_part_select: , line:48:11, endln:48:21 - |vpiParent: - \_ref_obj: in2 (in2), line:48:11, endln:48:14 - |vpiName:in2 - |vpiDefName:in2 + \_part_select: in2 (in2), line:48:11, endln:48:21 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:48:15, endln:48:18 + |vpiParent: + \_part_select: in2 (in2), line:48:11, endln:48:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:48:15, endln:48:16 + \_ref_obj: (in2.N), line:48:15, endln:48:16 |vpiParent: \_operation: , line:48:15, endln:48:18 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:48:17, endln:48:18 |vpiParent: @@ -22788,20 +22597,21 @@ design: (work@oh_fifo_async) \_port: (c), line:49:6, endln:49:22 |vpiName:c |vpiHighConn: - \_part_select: , line:49:9, endln:49:21 - |vpiParent: - \_ref_obj: cout0 (cout0), line:49:9, endln:49:14 - |vpiName:cout0 - |vpiDefName:cout0 + \_part_select: cout0 (cout0), line:49:9, endln:49:21 + |vpiName:cout0 + |vpiDefName:cout0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:49:15, endln:49:18 + |vpiParent: + \_part_select: cout0 (cout0), line:49:9, endln:49:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:49:15, endln:49:16 + \_ref_obj: (cout0.N), line:49:15, endln:49:16 |vpiParent: \_operation: , line:49:15, endln:49:18 |vpiName:N + |vpiFullName:cout0.N |vpiOperand: \_constant: , line:49:17, endln:49:18 |vpiParent: @@ -22820,20 +22630,21 @@ design: (work@oh_fifo_async) \_port: (s), line:50:6, endln:50:23 |vpiName:s |vpiHighConn: - \_part_select: , line:50:9, endln:50:22 - |vpiParent: - \_ref_obj: s_int0 (s_int0), line:50:9, endln:50:15 - |vpiName:s_int0 - |vpiDefName:s_int0 + \_part_select: s_int0 (s_int0), line:50:9, endln:50:22 + |vpiName:s_int0 + |vpiDefName:s_int0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:50:16, endln:50:19 + |vpiParent: + \_part_select: s_int0 (s_int0), line:50:9, endln:50:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:50:16, endln:50:17 + \_ref_obj: (s_int0.N), line:50:16, endln:50:17 |vpiParent: \_operation: , line:50:16, endln:50:19 |vpiName:N + |vpiFullName:s_int0.N |vpiOperand: \_constant: , line:50:18, endln:50:19 |vpiParent: @@ -22860,20 +22671,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:55:13, endln:55:29 |vpiName:in0 |vpiHighConn: - \_part_select: , line:55:18, endln:55:28 - |vpiParent: - \_ref_obj: in3 (in3), line:55:18, endln:55:21 - |vpiName:in3 - |vpiDefName:in3 + \_part_select: in3 (in3), line:55:18, endln:55:28 + |vpiName:in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:55:22, endln:55:25 + |vpiParent: + \_part_select: in3 (in3), line:55:18, endln:55:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:55:22, endln:55:23 + \_ref_obj: (in3.N), line:55:22, endln:55:23 |vpiParent: \_operation: , line:55:22, endln:55:25 |vpiName:N + |vpiFullName:in3.N |vpiOperand: \_constant: , line:55:24, endln:55:25 |vpiParent: @@ -22892,20 +22704,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:56:6, endln:56:22 |vpiName:in1 |vpiHighConn: - \_part_select: , line:56:11, endln:56:21 - |vpiParent: - \_ref_obj: in4 (in4), line:56:11, endln:56:14 - |vpiName:in4 - |vpiDefName:in4 + \_part_select: in4 (in4), line:56:11, endln:56:21 + |vpiName:in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:15, endln:56:18 + |vpiParent: + \_part_select: in4 (in4), line:56:11, endln:56:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:56:15, endln:56:16 + \_ref_obj: (in4.N), line:56:15, endln:56:16 |vpiParent: \_operation: , line:56:15, endln:56:18 |vpiName:N + |vpiFullName:in4.N |vpiOperand: \_constant: , line:56:17, endln:56:18 |vpiParent: @@ -22924,20 +22737,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:57:6, endln:57:22 |vpiName:in2 |vpiHighConn: - \_part_select: , line:57:11, endln:57:21 - |vpiParent: - \_ref_obj: in5 (in5), line:57:11, endln:57:14 - |vpiName:in5 - |vpiDefName:in5 + \_part_select: in5 (in5), line:57:11, endln:57:21 + |vpiName:in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:15, endln:57:18 + |vpiParent: + \_part_select: in5 (in5), line:57:11, endln:57:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:57:15, endln:57:16 + \_ref_obj: (in5.N), line:57:15, endln:57:16 |vpiParent: \_operation: , line:57:15, endln:57:18 |vpiName:N + |vpiFullName:in5.N |vpiOperand: \_constant: , line:57:17, endln:57:18 |vpiParent: @@ -22956,20 +22770,21 @@ design: (work@oh_fifo_async) \_port: (c), line:58:6, endln:58:22 |vpiName:c |vpiHighConn: - \_part_select: , line:58:9, endln:58:21 - |vpiParent: - \_ref_obj: cout1 (cout1), line:58:9, endln:58:14 - |vpiName:cout1 - |vpiDefName:cout1 + \_part_select: cout1 (cout1), line:58:9, endln:58:21 + |vpiName:cout1 + |vpiDefName:cout1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:15, endln:58:18 + |vpiParent: + \_part_select: cout1 (cout1), line:58:9, endln:58:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:58:15, endln:58:16 + \_ref_obj: (cout1.N), line:58:15, endln:58:16 |vpiParent: \_operation: , line:58:15, endln:58:18 |vpiName:N + |vpiFullName:cout1.N |vpiOperand: \_constant: , line:58:17, endln:58:18 |vpiParent: @@ -22988,20 +22803,21 @@ design: (work@oh_fifo_async) \_port: (s), line:59:6, endln:59:23 |vpiName:s |vpiHighConn: - \_part_select: , line:59:9, endln:59:22 - |vpiParent: - \_ref_obj: s_int1 (s_int1), line:59:9, endln:59:15 - |vpiName:s_int1 - |vpiDefName:s_int1 + \_part_select: s_int1 (s_int1), line:59:9, endln:59:22 + |vpiName:s_int1 + |vpiDefName:s_int1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:16, endln:59:19 + |vpiParent: + \_part_select: s_int1 (s_int1), line:59:9, endln:59:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:59:16, endln:59:17 + \_ref_obj: (s_int1.N), line:59:16, endln:59:17 |vpiParent: \_operation: , line:59:16, endln:59:19 |vpiName:N + |vpiFullName:s_int1.N |vpiOperand: \_constant: , line:59:18, endln:59:19 |vpiParent: @@ -23028,20 +22844,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:64:13, endln:64:29 |vpiName:in0 |vpiHighConn: - \_part_select: , line:64:18, endln:64:28 - |vpiParent: - \_ref_obj: in6 (in6), line:64:18, endln:64:21 - |vpiName:in6 - |vpiDefName:in6 + \_part_select: in6 (in6), line:64:18, endln:64:28 + |vpiName:in6 + |vpiDefName:in6 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:64:22, endln:64:25 + |vpiParent: + \_part_select: in6 (in6), line:64:18, endln:64:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:64:22, endln:64:23 + \_ref_obj: (in6.N), line:64:22, endln:64:23 |vpiParent: \_operation: , line:64:22, endln:64:25 |vpiName:N + |vpiFullName:in6.N |vpiOperand: \_constant: , line:64:24, endln:64:25 |vpiParent: @@ -23060,20 +22877,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:65:6, endln:65:22 |vpiName:in1 |vpiHighConn: - \_part_select: , line:65:11, endln:65:21 - |vpiParent: - \_ref_obj: in7 (in7), line:65:11, endln:65:14 - |vpiName:in7 - |vpiDefName:in7 + \_part_select: in7 (in7), line:65:11, endln:65:21 + |vpiName:in7 + |vpiDefName:in7 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:65:15, endln:65:18 + |vpiParent: + \_part_select: in7 (in7), line:65:11, endln:65:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:65:15, endln:65:16 + \_ref_obj: (in7.N), line:65:15, endln:65:16 |vpiParent: \_operation: , line:65:15, endln:65:18 |vpiName:N + |vpiFullName:in7.N |vpiOperand: \_constant: , line:65:17, endln:65:18 |vpiParent: @@ -23092,20 +22910,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:66:6, endln:66:22 |vpiName:in2 |vpiHighConn: - \_part_select: , line:66:11, endln:66:21 - |vpiParent: - \_ref_obj: in8 (in8), line:66:11, endln:66:14 - |vpiName:in8 - |vpiDefName:in8 + \_part_select: in8 (in8), line:66:11, endln:66:21 + |vpiName:in8 + |vpiDefName:in8 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:66:15, endln:66:18 + |vpiParent: + \_part_select: in8 (in8), line:66:11, endln:66:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:66:15, endln:66:16 + \_ref_obj: (in8.N), line:66:15, endln:66:16 |vpiParent: \_operation: , line:66:15, endln:66:18 |vpiName:N + |vpiFullName:in8.N |vpiOperand: \_constant: , line:66:17, endln:66:18 |vpiParent: @@ -23124,20 +22943,21 @@ design: (work@oh_fifo_async) \_port: (c), line:67:6, endln:67:22 |vpiName:c |vpiHighConn: - \_part_select: , line:67:9, endln:67:21 - |vpiParent: - \_ref_obj: cout2 (cout2), line:67:9, endln:67:14 - |vpiName:cout2 - |vpiDefName:cout2 + \_part_select: cout2 (cout2), line:67:9, endln:67:21 + |vpiName:cout2 + |vpiDefName:cout2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:67:15, endln:67:18 + |vpiParent: + \_part_select: cout2 (cout2), line:67:9, endln:67:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:67:15, endln:67:16 + \_ref_obj: (cout2.N), line:67:15, endln:67:16 |vpiParent: \_operation: , line:67:15, endln:67:18 |vpiName:N + |vpiFullName:cout2.N |vpiOperand: \_constant: , line:67:17, endln:67:18 |vpiParent: @@ -23156,20 +22976,21 @@ design: (work@oh_fifo_async) \_port: (s), line:68:6, endln:68:23 |vpiName:s |vpiHighConn: - \_part_select: , line:68:9, endln:68:22 - |vpiParent: - \_ref_obj: s_int2 (s_int2), line:68:9, endln:68:15 - |vpiName:s_int2 - |vpiDefName:s_int2 + \_part_select: s_int2 (s_int2), line:68:9, endln:68:22 + |vpiName:s_int2 + |vpiDefName:s_int2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:16, endln:68:19 + |vpiParent: + \_part_select: s_int2 (s_int2), line:68:9, endln:68:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:68:16, endln:68:17 + \_ref_obj: (s_int2.N), line:68:16, endln:68:17 |vpiParent: \_operation: , line:68:16, endln:68:19 |vpiName:N + |vpiFullName:s_int2.N |vpiOperand: \_constant: , line:68:18, endln:68:19 |vpiParent: @@ -23196,20 +23017,21 @@ design: (work@oh_fifo_async) \_port: (in0), line:73:11, endln:73:30 |vpiName:in0 |vpiHighConn: - \_part_select: , line:73:16, endln:73:29 - |vpiParent: - \_ref_obj: s_int0 (s_int0), line:73:16, endln:73:22 - |vpiName:s_int0 - |vpiDefName:s_int0 + \_part_select: s_int0 (s_int0), line:73:16, endln:73:29 + |vpiName:s_int0 + |vpiDefName:s_int0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:73:23, endln:73:26 + |vpiParent: + \_part_select: s_int0 (s_int0), line:73:16, endln:73:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:73:23, endln:73:24 + \_ref_obj: (s_int0.N), line:73:23, endln:73:24 |vpiParent: \_operation: , line:73:23, endln:73:26 |vpiName:N + |vpiFullName:s_int0.N |vpiOperand: \_constant: , line:73:25, endln:73:26 |vpiParent: @@ -23228,20 +23050,21 @@ design: (work@oh_fifo_async) \_port: (in1), line:74:4, endln:74:23 |vpiName:in1 |vpiHighConn: - \_part_select: , line:74:9, endln:74:22 - |vpiParent: - \_ref_obj: s_int1 (s_int1), line:74:9, endln:74:15 - |vpiName:s_int1 - |vpiDefName:s_int1 + \_part_select: s_int1 (s_int1), line:74:9, endln:74:22 + |vpiName:s_int1 + |vpiDefName:s_int1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:74:16, endln:74:19 + |vpiParent: + \_part_select: s_int1 (s_int1), line:74:9, endln:74:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:74:16, endln:74:17 + \_ref_obj: (s_int1.N), line:74:16, endln:74:17 |vpiParent: \_operation: , line:74:16, endln:74:19 |vpiName:N + |vpiFullName:s_int1.N |vpiOperand: \_constant: , line:74:18, endln:74:19 |vpiParent: @@ -23260,20 +23083,21 @@ design: (work@oh_fifo_async) \_port: (in2), line:75:4, endln:75:23 |vpiName:in2 |vpiHighConn: - \_part_select: , line:75:9, endln:75:22 - |vpiParent: - \_ref_obj: s_int2 (s_int2), line:75:9, endln:75:15 - |vpiName:s_int2 - |vpiDefName:s_int2 + \_part_select: s_int2 (s_int2), line:75:9, endln:75:22 + |vpiName:s_int2 + |vpiDefName:s_int2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:75:16, endln:75:19 + |vpiParent: + \_part_select: s_int2 (s_int2), line:75:9, endln:75:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:75:16, endln:75:17 + \_ref_obj: (s_int2.N), line:75:16, endln:75:17 |vpiParent: \_operation: , line:75:16, endln:75:19 |vpiName:N + |vpiFullName:s_int2.N |vpiOperand: \_constant: , line:75:18, endln:75:19 |vpiParent: @@ -23292,20 +23116,21 @@ design: (work@oh_fifo_async) \_port: (in3), line:76:4, endln:76:21 |vpiName:in3 |vpiHighConn: - \_part_select: , line:76:9, endln:76:20 - |vpiParent: - \_ref_obj: cin0 (cin0), line:76:9, endln:76:13 - |vpiName:cin0 - |vpiDefName:cin0 + \_part_select: cin0 (cin0), line:76:9, endln:76:20 + |vpiName:cin0 + |vpiDefName:cin0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:76:14, endln:76:17 + |vpiParent: + \_part_select: cin0 (cin0), line:76:9, endln:76:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:76:14, endln:76:15 + \_ref_obj: (cin0.N), line:76:14, endln:76:15 |vpiParent: \_operation: , line:76:14, endln:76:17 |vpiName:N + |vpiFullName:cin0.N |vpiOperand: \_constant: , line:76:16, endln:76:17 |vpiParent: @@ -23324,20 +23149,21 @@ design: (work@oh_fifo_async) \_port: (in4), line:77:4, endln:77:21 |vpiName:in4 |vpiHighConn: - \_part_select: , line:77:9, endln:77:20 - |vpiParent: - \_ref_obj: cin1 (cin1), line:77:9, endln:77:13 - |vpiName:cin1 - |vpiDefName:cin1 + \_part_select: cin1 (cin1), line:77:9, endln:77:20 + |vpiName:cin1 + |vpiDefName:cin1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:77:14, endln:77:17 + |vpiParent: + \_part_select: cin1 (cin1), line:77:9, endln:77:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:77:14, endln:77:15 + \_ref_obj: (cin1.N), line:77:14, endln:77:15 |vpiParent: \_operation: , line:77:14, endln:77:17 |vpiName:N + |vpiFullName:cin1.N |vpiOperand: \_constant: , line:77:16, endln:77:17 |vpiParent: @@ -23356,20 +23182,21 @@ design: (work@oh_fifo_async) \_port: (in5), line:78:4, endln:78:21 |vpiName:in5 |vpiHighConn: - \_part_select: , line:78:9, endln:78:20 - |vpiParent: - \_ref_obj: cin2 (cin2), line:78:9, endln:78:13 - |vpiName:cin2 - |vpiDefName:cin2 + \_part_select: cin2 (cin2), line:78:9, endln:78:20 + |vpiName:cin2 + |vpiDefName:cin2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:78:14, endln:78:17 + |vpiParent: + \_part_select: cin2 (cin2), line:78:9, endln:78:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:78:14, endln:78:15 + \_ref_obj: (cin2.N), line:78:14, endln:78:15 |vpiParent: \_operation: , line:78:14, endln:78:17 |vpiName:N + |vpiFullName:cin2.N |vpiOperand: \_constant: , line:78:16, endln:78:17 |vpiParent: @@ -23388,20 +23215,21 @@ design: (work@oh_fifo_async) \_port: (cin0), line:79:4, endln:79:22 |vpiName:cin0 |vpiHighConn: - \_part_select: , line:79:10, endln:79:21 - |vpiParent: - \_ref_obj: cin3 (cin3), line:79:10, endln:79:14 - |vpiName:cin3 - |vpiDefName:cin3 + \_part_select: cin3 (cin3), line:79:10, endln:79:21 + |vpiName:cin3 + |vpiDefName:cin3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:79:15, endln:79:18 + |vpiParent: + \_part_select: cin3 (cin3), line:79:10, endln:79:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:79:15, endln:79:16 + \_ref_obj: (cin3.N), line:79:15, endln:79:16 |vpiParent: \_operation: , line:79:15, endln:79:18 |vpiName:N + |vpiFullName:cin3.N |vpiOperand: \_constant: , line:79:17, endln:79:18 |vpiParent: @@ -23420,20 +23248,21 @@ design: (work@oh_fifo_async) \_port: (cin1), line:80:4, endln:80:22 |vpiName:cin1 |vpiHighConn: - \_part_select: , line:80:10, endln:80:21 - |vpiParent: - \_ref_obj: cin4 (cin4), line:80:10, endln:80:14 - |vpiName:cin4 - |vpiDefName:cin4 + \_part_select: cin4 (cin4), line:80:10, endln:80:21 + |vpiName:cin4 + |vpiDefName:cin4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:80:15, endln:80:18 + |vpiParent: + \_part_select: cin4 (cin4), line:80:10, endln:80:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:80:15, endln:80:16 + \_ref_obj: (cin4.N), line:80:15, endln:80:16 |vpiParent: \_operation: , line:80:15, endln:80:18 |vpiName:N + |vpiFullName:cin4.N |vpiOperand: \_constant: , line:80:17, endln:80:18 |vpiParent: @@ -23452,20 +23281,21 @@ design: (work@oh_fifo_async) \_port: (cin2), line:81:4, endln:81:22 |vpiName:cin2 |vpiHighConn: - \_part_select: , line:81:10, endln:81:21 - |vpiParent: - \_ref_obj: cin5 (cin5), line:81:10, endln:81:14 - |vpiName:cin5 - |vpiDefName:cin5 + \_part_select: cin5 (cin5), line:81:10, endln:81:21 + |vpiName:cin5 + |vpiDefName:cin5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:81:15, endln:81:18 + |vpiParent: + \_part_select: cin5 (cin5), line:81:10, endln:81:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:81:15, endln:81:16 + \_ref_obj: (cin5.N), line:81:15, endln:81:16 |vpiParent: \_operation: , line:81:15, endln:81:18 |vpiName:N + |vpiFullName:cin5.N |vpiOperand: \_constant: , line:81:17, endln:81:18 |vpiParent: @@ -23484,20 +23314,21 @@ design: (work@oh_fifo_async) \_port: (cout0), line:82:4, endln:82:24 |vpiName:cout0 |vpiHighConn: - \_part_select: , line:82:11, endln:82:23 - |vpiParent: - \_ref_obj: cout3 (cout3), line:82:11, endln:82:16 - |vpiName:cout3 - |vpiDefName:cout3 + \_part_select: cout3 (cout3), line:82:11, endln:82:23 + |vpiName:cout3 + |vpiDefName:cout3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:82:17, endln:82:20 + |vpiParent: + \_part_select: cout3 (cout3), line:82:11, endln:82:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:82:17, endln:82:18 + \_ref_obj: (cout3.N), line:82:17, endln:82:18 |vpiParent: \_operation: , line:82:17, endln:82:20 |vpiName:N + |vpiFullName:cout3.N |vpiOperand: \_constant: , line:82:19, endln:82:20 |vpiParent: @@ -23516,20 +23347,21 @@ design: (work@oh_fifo_async) \_port: (cout1), line:83:4, endln:83:24 |vpiName:cout1 |vpiHighConn: - \_part_select: , line:83:11, endln:83:23 - |vpiParent: - \_ref_obj: cout4 (cout4), line:83:11, endln:83:16 - |vpiName:cout4 - |vpiDefName:cout4 + \_part_select: cout4 (cout4), line:83:11, endln:83:23 + |vpiName:cout4 + |vpiDefName:cout4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:83:17, endln:83:20 + |vpiParent: + \_part_select: cout4 (cout4), line:83:11, endln:83:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:83:17, endln:83:18 + \_ref_obj: (cout4.N), line:83:17, endln:83:18 |vpiParent: \_operation: , line:83:17, endln:83:20 |vpiName:N + |vpiFullName:cout4.N |vpiOperand: \_constant: , line:83:19, endln:83:20 |vpiParent: @@ -23548,20 +23380,21 @@ design: (work@oh_fifo_async) \_port: (cout2), line:84:4, endln:84:24 |vpiName:cout2 |vpiHighConn: - \_part_select: , line:84:11, endln:84:23 - |vpiParent: - \_ref_obj: cout5 (cout5), line:84:11, endln:84:16 - |vpiName:cout5 - |vpiDefName:cout5 + \_part_select: cout5 (cout5), line:84:11, endln:84:23 + |vpiName:cout5 + |vpiDefName:cout5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:84:17, endln:84:20 + |vpiParent: + \_part_select: cout5 (cout5), line:84:11, endln:84:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:84:17, endln:84:18 + \_ref_obj: (cout5.N), line:84:17, endln:84:18 |vpiParent: \_operation: , line:84:17, endln:84:20 |vpiName:N + |vpiFullName:cout5.N |vpiOperand: \_constant: , line:84:19, endln:84:20 |vpiParent: @@ -23580,20 +23413,21 @@ design: (work@oh_fifo_async) \_port: (c), line:85:4, endln:85:16 |vpiName:c |vpiHighConn: - \_part_select: , line:85:7, endln:85:15 - |vpiParent: - \_ref_obj: c (c), line:85:7, endln:85:8 - |vpiName:c - |vpiDefName:c + \_part_select: c (c), line:85:7, endln:85:15 + |vpiName:c + |vpiDefName:c |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:85:9, endln:85:12 + |vpiParent: + \_part_select: c (c), line:85:7, endln:85:15 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:85:9, endln:85:10 + \_ref_obj: (c.N), line:85:9, endln:85:10 |vpiParent: \_operation: , line:85:9, endln:85:12 |vpiName:N + |vpiFullName:c.N |vpiOperand: \_constant: , line:85:11, endln:85:12 |vpiParent: @@ -23612,20 +23446,21 @@ design: (work@oh_fifo_async) \_port: (s), line:86:4, endln:86:16 |vpiName:s |vpiHighConn: - \_part_select: , line:86:7, endln:86:15 - |vpiParent: - \_ref_obj: s (s), line:86:7, endln:86:8 - |vpiName:s - |vpiDefName:s + \_part_select: s (s), line:86:7, endln:86:15 + |vpiName:s + |vpiDefName:s |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:86:9, endln:86:12 + |vpiParent: + \_part_select: s (s), line:86:7, endln:86:15 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:86:9, endln:86:10 + \_ref_obj: (s.N), line:86:9, endln:86:10 |vpiParent: \_operation: , line:86:9, endln:86:12 |vpiName:N + |vpiFullName:s.N |vpiOperand: \_constant: , line:86:11, endln:86:12 |vpiParent: @@ -23931,27 +23766,26 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:28:27, endln:28:51 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_assignment: , line:28:5, endln:28:51 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:28, endln:28:46 + \_part_select: enable_pipe (enable_pipe), line:28:28, endln:28:46 |vpiParent: - \_ref_obj: enable_pipe (enable_pipe), line:28:28, endln:28:39 - |vpiParent: - \_event_control: , line:27:10, endln:27:25 - |vpiName:enable_pipe - |vpiDefName:enable_pipe + \_assignment: , line:28:5, endln:28:51 + |vpiName:enable_pipe + |vpiDefName:enable_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:40, endln:28:43 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_part_select: enable_pipe (enable_pipe), line:28:28, endln:28:46 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:40, endln:28:41 + \_ref_obj: (enable_pipe.N), line:28:40, endln:28:41 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_operation: , line:28:40, endln:28:43 |vpiName:N + |vpiFullName:enable_pipe.N |vpiOperand: \_constant: , line:28:42, endln:28:43 |vpiParent: @@ -23969,27 +23803,26 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (en), line:28:48, endln:28:50 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_assignment: , line:28:5, endln:28:51 |vpiName:en |vpiLhs: - \_part_select: , line:28:5, endln:28:23 + \_part_select: enable_pipe (enable_pipe), line:28:5, endln:28:23 |vpiParent: - \_ref_obj: enable_pipe (enable_pipe) - |vpiParent: - \_assignment: , line:28:5, endln:28:51 - |vpiName:enable_pipe - |vpiDefName:enable_pipe + \_assignment: , line:28:5, endln:28:51 + |vpiName:enable_pipe + |vpiDefName:enable_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:17, endln:28:20 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_part_select: enable_pipe (enable_pipe), line:28:5, endln:28:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:17, endln:28:18 + \_ref_obj: (enable_pipe.N), line:28:17, endln:28:18 |vpiParent: - \_event_control: , line:27:10, endln:27:25 + \_operation: , line:28:17, endln:28:20 |vpiName:N + |vpiFullName:enable_pipe.N |vpiOperand: \_constant: , line:28:19, endln:28:20 |vpiParent: @@ -24023,24 +23856,23 @@ design: (work@oh_fifo_async) \_operation: , line:31:19, endln:31:45 |vpiOpType:7 |vpiOperand: - \_part_select: , line:31:26, endln:31:44 + \_part_select: enable_pipe (enable_pipe), line:31:26, endln:31:44 |vpiParent: - \_ref_obj: enable_pipe (enable_pipe), line:31:26, endln:31:37 - |vpiParent: - \_operation: , line:31:25, endln:31:44 - |vpiName:enable_pipe - |vpiDefName:enable_pipe + \_operation: , line:31:25, endln:31:44 + |vpiName:enable_pipe + |vpiDefName:enable_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:38, endln:31:41 |vpiParent: - \_operation: , line:31:25, endln:31:44 + \_part_select: enable_pipe (enable_pipe), line:31:26, endln:31:44 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:38, endln:31:39 + \_ref_obj: (enable_pipe.N), line:31:38, endln:31:39 |vpiParent: - \_operation: , line:31:25, endln:31:44 + \_operation: , line:31:38, endln:31:41 |vpiName:N + |vpiFullName:enable_pipe.N |vpiOperand: \_constant: , line:31:40, endln:31:41 |vpiParent: @@ -24086,24 +23918,23 @@ design: (work@oh_fifo_async) \_ref_obj: (enable), line:33:28, endln:33:34 |vpiName:enable |vpiOperand: - \_part_select: , line:33:39, endln:33:48 + \_part_select: in (in), line:33:39, endln:33:48 |vpiParent: - \_ref_obj: in (in), line:33:39, endln:33:41 - |vpiParent: - \_operation: , line:33:23, endln:33:48 - |vpiName:in - |vpiDefName:in + \_operation: , line:33:23, endln:33:48 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:42, endln:33:45 |vpiParent: - \_operation: , line:33:23, endln:33:48 + \_part_select: in (in), line:33:39, endln:33:48 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:33:42, endln:33:43 + \_ref_obj: (in.N), line:33:42, endln:33:43 |vpiParent: - \_operation: , line:33:23, endln:33:48 + \_operation: , line:33:42, endln:33:45 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:33:44, endln:33:45 |vpiParent: @@ -24119,22 +23950,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:33:10, endln:33:20 + \_part_select: out (out), line:33:10, endln:33:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:33:10, endln:33:48 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:33:10, endln:33:48 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:14, endln:33:17 + |vpiParent: + \_part_select: out (out), line:33:10, endln:33:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:33:14, endln:33:15 + \_ref_obj: (out.N), line:33:14, endln:33:15 |vpiParent: \_operation: , line:33:14, endln:33:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:33:16, endln:33:17 |vpiParent: @@ -24274,7 +24106,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (BOUNCE), line:21:46, endln:21:52 |vpiParent: - \_sys_func_call: ($clog2), line:21:39, endln:21:63 + \_operation: , line:21:46, endln:21:62 |vpiName:BOUNCE |vpiOperand: \_ref_obj: (FREQUENCY), line:21:53, endln:21:62 @@ -24423,8 +24255,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:45:21, endln:45:25 - |vpiParent: - \_assignment: , line:45:8, endln:45:25 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -24432,7 +24262,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_debouncer.noisy_reg), line:45:8, endln:45:17 |vpiParent: - \_if_else: , line:44:6, endln:47:34 + \_assignment: , line:45:8, endln:45:25 |vpiName:noisy_reg |vpiFullName:work@oh_debouncer.noisy_reg |vpiElseStmt: @@ -24443,13 +24273,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_debouncer.noisy_synced), line:47:21, endln:47:33 |vpiParent: - \_if_else: , line:44:6, endln:47:34 + \_assignment: , line:47:8, endln:47:33 |vpiName:noisy_synced |vpiFullName:work@oh_debouncer.noisy_synced |vpiLhs: \_ref_obj: (work@oh_debouncer.noisy_reg), line:47:8, endln:47:17 |vpiParent: - \_if_else: , line:44:6, endln:47:34 + \_assignment: , line:47:8, endln:47:33 |vpiName:noisy_reg |vpiFullName:work@oh_debouncer.noisy_reg |vpiAlwaysType:1 @@ -24504,15 +24334,13 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:71:21, endln:71:24 - |vpiParent: - \_assignment: , line:71:8, endln:71:24 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: \_ref_obj: (work@oh_debouncer.clean_reg), line:71:8, endln:71:17 |vpiParent: - \_if_else: , line:70:6, endln:73:31 + \_assignment: , line:71:8, endln:71:24 |vpiName:clean_reg |vpiFullName:work@oh_debouncer.clean_reg |vpiElseStmt: @@ -24533,13 +24361,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_debouncer.noisy_reg), line:73:21, endln:73:30 |vpiParent: - \_if_stmt: , line:72:11, endln:73:31 + \_assignment: , line:73:8, endln:73:30 |vpiName:noisy_reg |vpiFullName:work@oh_debouncer.noisy_reg |vpiLhs: \_ref_obj: (work@oh_debouncer.clean_reg), line:73:8, endln:73:17 |vpiParent: - \_if_stmt: , line:72:11, endln:73:31 + \_assignment: , line:73:8, endln:73:30 |vpiName:clean_reg |vpiFullName:work@oh_debouncer.clean_reg |vpiAlwaysType:1 @@ -24988,28 +24816,28 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_delay.sync_pipe), line:34:24, endln:34:45 |vpiParent: - \_ref_obj: (work@oh_delay.sync_pipe) - |vpiParent: - \_cont_assign: , line:34:11, endln:34:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_delay.sync_pipe + \_cont_assign: , line:34:11, endln:34:45 |vpiName:sync_pipe |vpiFullName:work@oh_delay.sync_pipe |vpiIndex: - \_part_select: , line:34:34, endln:34:44 + \_part_select: sel (work@oh_delay.sync_pipe.sel), line:34:34, endln:34:44 |vpiParent: - \_ref_obj: sel (sel), line:34:34, endln:34:37 - |vpiName:sel - |vpiDefName:sel + \_bit_select: (work@oh_delay.sync_pipe), line:34:24, endln:34:45 + |vpiName:sel + |vpiFullName:work@oh_delay.sync_pipe.sel + |vpiDefName:sel |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:38, endln:34:41 + |vpiParent: + \_part_select: sel (work@oh_delay.sync_pipe.sel), line:34:34, endln:34:44 |vpiOpType:11 |vpiOperand: - \_ref_obj: (M), line:34:38, endln:34:39 + \_ref_obj: (work@oh_delay.sync_pipe.sel.M), line:34:38, endln:34:39 |vpiParent: \_operation: , line:34:38, endln:34:41 |vpiName:M + |vpiFullName:work@oh_delay.sync_pipe.sel.M |vpiOperand: \_constant: , line:34:40, endln:34:41 |vpiParent: @@ -25025,23 +24853,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:34:11, endln:34:21 + \_part_select: out (work@oh_delay.out), line:34:11, endln:34:21 |vpiParent: - \_ref_obj: out (work@oh_delay.out) - |vpiParent: - \_cont_assign: , line:34:11, endln:34:45 - |vpiName:out - |vpiFullName:work@oh_delay.out - |vpiDefName:out + \_cont_assign: , line:34:11, endln:34:45 + |vpiName:out + |vpiFullName:work@oh_delay.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:15, endln:34:18 + |vpiParent: + \_part_select: out (work@oh_delay.out), line:34:11, endln:34:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:34:15, endln:34:16 + \_ref_obj: (work@oh_delay.out.N), line:34:15, endln:34:16 |vpiParent: \_operation: , line:34:15, endln:34:18 |vpiName:N + |vpiFullName:work@oh_delay.out.N |vpiOperand: \_constant: , line:34:17, endln:34:18 |vpiParent: @@ -25084,24 +24913,23 @@ design: (work@oh_fifo_async) \_event_control: , line:25:14, endln:25:29 |vpiOpType:82 |vpiRhs: - \_part_select: , line:26:16, endln:26:25 + \_part_select: in (in), line:26:16, endln:26:25 |vpiParent: - \_ref_obj: in (in), line:26:16, endln:26:18 - |vpiParent: - \_assignment: , line:26:2, endln:26:25 - |vpiName:in - |vpiDefName:in + \_assignment: , line:26:2, endln:26:25 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:19, endln:26:22 |vpiParent: - \_event_control: , line:25:14, endln:25:29 + \_part_select: in (in), line:26:16, endln:26:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:19, endln:26:20 + \_ref_obj: (in.N), line:26:19, endln:26:20 |vpiParent: - \_event_control: , line:25:14, endln:25:29 + \_operation: , line:26:19, endln:26:22 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:26:21, endln:26:22 |vpiParent: @@ -25119,10 +24947,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (sync_pipe), line:26:2, endln:26:14 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_assignment: , line:26:2, endln:26:25 - |vpiName:sync_pipe + \_assignment: , line:26:2, endln:26:25 |vpiName:sync_pipe |vpiIndex: \_constant: , line:26:12, endln:26:13 @@ -25329,13 +25154,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_dffnq.d), line:15:11, endln:15:12 |vpiParent: - \_event_control: , line:14:11, endln:14:26 + \_assignment: , line:15:6, endln:15:12 |vpiName:d |vpiFullName:work@oh_dffnq.d |vpiLhs: \_ref_obj: (work@oh_dffnq.q), line:15:6, endln:15:7 |vpiParent: - \_event_control: , line:14:11, endln:14:26 + \_assignment: , line:15:6, endln:15:12 |vpiName:q |vpiFullName:work@oh_dffnq.q |vpiAlwaysType:1 @@ -25535,13 +25360,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_dffq.d), line:16:11, endln:16:12 |vpiParent: - \_event_control: , line:15:11, endln:15:26 + \_assignment: , line:16:6, endln:16:12 |vpiName:d |vpiFullName:work@oh_dffq.d |vpiLhs: \_ref_obj: (work@oh_dffq.q), line:16:6, endln:16:7 |vpiParent: - \_event_control: , line:15:11, endln:15:26 + \_assignment: , line:16:6, endln:16:12 |vpiName:q |vpiFullName:work@oh_dffq.q |vpiAlwaysType:1 @@ -25741,7 +25566,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:15:12, endln:15:14 |vpiParent: - \_event_control: , line:14:11, endln:14:26 + \_assignment: , line:15:6, endln:15:14 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@oh_dffqn.d), line:15:13, endln:15:14 @@ -25752,7 +25577,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_dffqn.qn), line:15:6, endln:15:8 |vpiParent: - \_event_control: , line:14:11, endln:14:26 + \_assignment: , line:15:6, endln:15:14 |vpiName:qn |vpiFullName:work@oh_dffqn.qn |vpiAlwaysType:1 @@ -26022,15 +25847,13 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:19:13, endln:19:16 - |vpiParent: - \_assignment: , line:19:8, endln:19:16 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: \_ref_obj: (work@oh_dffrq.q), line:19:8, endln:19:9 |vpiParent: - \_if_else: , line:18:6, endln:21:15 + \_assignment: , line:19:8, endln:19:16 |vpiName:q |vpiFullName:work@oh_dffrq.q |vpiElseStmt: @@ -26041,13 +25864,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_dffrq.d), line:21:13, endln:21:14 |vpiParent: - \_if_else: , line:18:6, endln:21:15 + \_assignment: , line:21:8, endln:21:14 |vpiName:d |vpiFullName:work@oh_dffrq.d |vpiLhs: \_ref_obj: (work@oh_dffrq.q), line:21:8, endln:21:9 |vpiParent: - \_if_else: , line:18:6, endln:21:15 + \_assignment: , line:21:8, endln:21:14 |vpiName:q |vpiFullName:work@oh_dffrq.q |vpiAlwaysType:1 @@ -26318,18 +26141,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:18:14, endln:18:24 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:18:8, endln:18:24 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_dffrqn.DW), line:18:15, endln:18:17 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:18:8, endln:18:24 |vpiName:DW |vpiFullName:work@oh_dffrqn.DW |vpiOperand: \_operation: , line:18:17, endln:18:23 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:18:8, endln:18:24 |vpiOpType:33 |vpiOperand: \_constant: , line:18:18, endln:18:22 @@ -26340,7 +26163,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_dffrqn.qn), line:18:8, endln:18:10 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:18:8, endln:18:24 |vpiName:qn |vpiFullName:work@oh_dffrqn.qn |vpiElseStmt: @@ -26351,7 +26174,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:20:14, endln:20:16 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:20:8, endln:20:16 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@oh_dffrqn.d), line:20:15, endln:20:16 @@ -26362,7 +26185,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_dffrqn.qn), line:20:8, endln:20:10 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:20:8, endln:20:16 |vpiName:qn |vpiFullName:work@oh_dffrqn.qn |vpiAlwaysType:1 @@ -26633,18 +26456,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:18:13, endln:18:23 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:18:8, endln:18:23 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_dffsq.DW), line:18:14, endln:18:16 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:18:8, endln:18:23 |vpiName:DW |vpiFullName:work@oh_dffsq.DW |vpiOperand: \_operation: , line:18:16, endln:18:22 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:18:8, endln:18:23 |vpiOpType:33 |vpiOperand: \_constant: , line:18:17, endln:18:21 @@ -26655,7 +26478,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_dffsq.q), line:18:8, endln:18:9 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:18:8, endln:18:23 |vpiName:q |vpiFullName:work@oh_dffsq.q |vpiElseStmt: @@ -26666,13 +26489,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_dffsq.d), line:20:13, endln:20:14 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:20:8, endln:20:14 |vpiName:d |vpiFullName:work@oh_dffsq.d |vpiLhs: \_ref_obj: (work@oh_dffsq.q), line:20:8, endln:20:9 |vpiParent: - \_if_else: , line:17:6, endln:20:15 + \_assignment: , line:20:8, endln:20:14 |vpiName:q |vpiFullName:work@oh_dffsq.q |vpiAlwaysType:1 @@ -26942,15 +26765,13 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:18:14, endln:18:17 - |vpiParent: - \_assignment: , line:18:8, endln:18:17 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: \_ref_obj: (work@oh_dffsqn.qn), line:18:8, endln:18:10 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:18:8, endln:18:17 |vpiName:qn |vpiFullName:work@oh_dffsqn.qn |vpiElseStmt: @@ -26961,7 +26782,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:20:14, endln:20:16 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:20:8, endln:20:16 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@oh_dffsqn.d), line:20:15, endln:20:16 @@ -26972,7 +26793,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_dffsqn.qn), line:20:8, endln:20:10 |vpiParent: - \_if_else: , line:17:6, endln:20:17 + \_assignment: , line:20:8, endln:20:16 |vpiName:qn |vpiFullName:work@oh_dffsqn.qn |vpiAlwaysType:1 @@ -27245,25 +27066,22 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (SYNCPIPE), line:26:17, endln:26:25 + \_ref_obj: (sync_pipe.SYNCPIPE), line:26:17, endln:26:25 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_part_select: sync_pipe (sync_pipe), line:26:7, endln:26:28 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiRightRange: \_constant: , line:26:26, endln:26:27 |vpiDecompile:0 @@ -27278,27 +27096,26 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:28:32, endln:28:61 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_if_else: , line:25:5, endln:28:62 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_part_select: sync_pipe (sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:28:43, endln:28:51 + \_ref_obj: (sync_pipe.SYNCPIPE), line:28:43, endln:28:51 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_operation: , line:28:43, endln:28:53 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:28:52, endln:28:53 |vpiParent: @@ -27316,22 +27133,21 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (din), line:28:57, endln:28:60 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_assignment: , line:28:7, endln:28:61 |vpiName:din |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (SYNCPIPE), line:28:17, endln:28:25 + \_ref_obj: (sync_pipe.SYNCPIPE), line:28:17, endln:28:25 |vpiParent: - \_if_else: , line:25:5, endln:28:62 + \_part_select: sync_pipe (sync_pipe), line:28:7, endln:28:28 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiRightRange: \_constant: , line:28:26, endln:28:27 |vpiDecompile:0 @@ -27359,15 +27175,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiIndex: \_ref_obj: (SYNCPIPE), line:30:36, endln:30:44 |vpiParent: - \_operation: , line:30:18, endln:30:45 + \_bit_select: (sync_pipe), line:30:26, endln:30:45 |vpiName:SYNCPIPE |vpiOperand: \_operation: , line:31:11, endln:31:41 @@ -27377,7 +27190,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:31:11, endln:31:17 |vpiParent: - \_operation: , line:30:17, endln:31:42 + \_operation: , line:31:11, endln:31:41 |vpiOpType:4 |vpiOperand: \_ref_obj: (DELAY), line:31:12, endln:31:17 @@ -27387,21 +27200,19 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: - \_operation: , line:31:11, endln:31:41 + \_bit_select: (sync_pipe), line:31:20, endln:31:41 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:31:30, endln:31:38 + \_ref_obj: (sync_pipe.SYNCPIPE), line:31:30, endln:31:38 |vpiParent: - \_operation: , line:31:11, endln:31:41 + \_operation: , line:31:30, endln:31:40 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:31:39, endln:31:40 |vpiParent: @@ -27661,32 +27472,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:21:26, endln:21:29 - |vpiParent: - \_assignment: , line:21:8, endln:21:29 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:21:8, endln:21:21 + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:21:8, endln:21:21 |vpiParent: - \_ref_obj: in_reg (work@oh_edge2pulse.in_reg) - |vpiParent: - \_assignment: , line:21:8, endln:21:29 - |vpiName:in_reg - |vpiFullName:work@oh_edge2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:21:8, endln:21:29 + |vpiName:in_reg + |vpiFullName:work@oh_edge2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:21:8, endln:21:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_edge2pulse.N), line:21:15, endln:21:16 + \_ref_obj: (work@oh_edge2pulse.in_reg.N), line:21:15, endln:21:16 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_operation: , line:21:15, endln:21:18 |vpiName:N - |vpiFullName:work@oh_edge2pulse.N + |vpiFullName:work@oh_edge2pulse.in_reg.N |vpiOperand: \_constant: , line:21:17, endln:21:18 |vpiParent: @@ -27707,26 +27514,24 @@ design: (work@oh_fifo_async) \_if_else: , line:20:6, endln:23:37 |vpiOpType:82 |vpiRhs: - \_part_select: , line:23:26, endln:23:35 + \_part_select: in (work@oh_edge2pulse.in), line:23:26, endln:23:35 |vpiParent: - \_ref_obj: in (work@oh_edge2pulse.in), line:23:26, endln:23:28 - |vpiParent: - \_assignment: , line:23:8, endln:23:35 - |vpiName:in - |vpiFullName:work@oh_edge2pulse.in - |vpiDefName:in + \_assignment: , line:23:8, endln:23:35 + |vpiName:in + |vpiFullName:work@oh_edge2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:29, endln:23:32 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_part_select: in (work@oh_edge2pulse.in), line:23:26, endln:23:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_edge2pulse.N), line:23:29, endln:23:30 + \_ref_obj: (work@oh_edge2pulse.in.N), line:23:29, endln:23:30 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_operation: , line:23:29, endln:23:32 |vpiName:N - |vpiFullName:work@oh_edge2pulse.N + |vpiFullName:work@oh_edge2pulse.in.N |vpiOperand: \_constant: , line:23:31, endln:23:32 |vpiParent: @@ -27742,26 +27547,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:23:8, endln:23:21 + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:23:8, endln:23:21 |vpiParent: - \_ref_obj: in_reg (work@oh_edge2pulse.in_reg) - |vpiParent: - \_assignment: , line:23:8, endln:23:35 - |vpiName:in_reg - |vpiFullName:work@oh_edge2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:23:8, endln:23:35 + |vpiName:in_reg + |vpiFullName:work@oh_edge2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:15, endln:23:18 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:23:8, endln:23:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_edge2pulse.N), line:23:15, endln:23:16 + \_ref_obj: (work@oh_edge2pulse.in_reg.N), line:23:15, endln:23:16 |vpiParent: - \_if_else: , line:20:6, endln:23:37 + \_operation: , line:23:15, endln:23:18 |vpiName:N - |vpiFullName:work@oh_edge2pulse.N + |vpiFullName:work@oh_edge2pulse.in_reg.N |vpiOperand: \_constant: , line:23:17, endln:23:18 |vpiParent: @@ -27787,23 +27590,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:25:11, endln:25:51 |vpiOpType:30 |vpiOperand: - \_part_select: , line:25:25, endln:25:38 + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:25:25, endln:25:38 |vpiParent: - \_ref_obj: in_reg (work@oh_edge2pulse.in_reg), line:25:25, endln:25:31 - |vpiParent: - \_operation: , line:25:25, endln:25:51 - |vpiName:in_reg - |vpiFullName:work@oh_edge2pulse.in_reg - |vpiDefName:in_reg + \_operation: , line:25:25, endln:25:51 + |vpiName:in_reg + |vpiFullName:work@oh_edge2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:32, endln:25:35 + |vpiParent: + \_part_select: in_reg (work@oh_edge2pulse.in_reg), line:25:25, endln:25:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:32, endln:25:33 + \_ref_obj: (work@oh_edge2pulse.in_reg.N), line:25:32, endln:25:33 |vpiParent: \_operation: , line:25:32, endln:25:35 |vpiName:N + |vpiFullName:work@oh_edge2pulse.in_reg.N |vpiOperand: \_constant: , line:25:34, endln:25:35 |vpiParent: @@ -27819,26 +27623,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:25:42, endln:25:51 + \_part_select: in (work@oh_edge2pulse.in), line:25:42, endln:25:51 |vpiParent: - \_ref_obj: in (work@oh_edge2pulse.in), line:25:42, endln:25:44 - |vpiParent: - \_operation: , line:25:25, endln:25:51 - |vpiName:in - |vpiFullName:work@oh_edge2pulse.in - |vpiDefName:in + \_operation: , line:25:25, endln:25:51 + |vpiName:in + |vpiFullName:work@oh_edge2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:45, endln:25:48 |vpiParent: - \_operation: , line:25:25, endln:25:51 + \_part_select: in (work@oh_edge2pulse.in), line:25:42, endln:25:51 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_edge2pulse.N), line:25:45, endln:25:46 + \_ref_obj: (work@oh_edge2pulse.in.N), line:25:45, endln:25:46 |vpiParent: - \_operation: , line:25:25, endln:25:51 + \_operation: , line:25:45, endln:25:48 |vpiName:N - |vpiFullName:work@oh_edge2pulse.N + |vpiFullName:work@oh_edge2pulse.in.N |vpiOperand: \_constant: , line:25:47, endln:25:48 |vpiParent: @@ -27854,23 +27656,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:25:11, endln:25:21 + \_part_select: out (work@oh_edge2pulse.out), line:25:11, endln:25:21 |vpiParent: - \_ref_obj: out (work@oh_edge2pulse.out) - |vpiParent: - \_cont_assign: , line:25:11, endln:25:51 - |vpiName:out - |vpiFullName:work@oh_edge2pulse.out - |vpiDefName:out + \_cont_assign: , line:25:11, endln:25:51 + |vpiName:out + |vpiFullName:work@oh_edge2pulse.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:15, endln:25:18 + |vpiParent: + \_part_select: out (work@oh_edge2pulse.out), line:25:11, endln:25:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:15, endln:25:16 + \_ref_obj: (work@oh_edge2pulse.out.N), line:25:15, endln:25:16 |vpiParent: \_operation: , line:25:15, endln:25:18 |vpiName:N + |vpiFullName:work@oh_edge2pulse.out.N |vpiOperand: \_constant: , line:25:17, endln:25:18 |vpiParent: @@ -27988,13 +27791,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_edgealign.slowclk), line:38:19, endln:38:26 |vpiParent: - \_event_control: , line:37:11, endln:37:30 + \_assignment: , line:38:6, endln:38:26 |vpiName:slowclk |vpiFullName:work@oh_edgealign.slowclk |vpiLhs: \_ref_obj: (work@oh_edgealign.clk45), line:38:6, endln:38:11 |vpiParent: - \_event_control: , line:37:11, endln:37:30 + \_assignment: , line:38:6, endln:38:26 |vpiName:clk45 |vpiFullName:work@oh_edgealign.clk45 |vpiAlwaysType:1 @@ -28030,13 +27833,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_edgealign.clk45), line:42:15, endln:42:20 |vpiParent: - \_begin: (work@oh_edgealign), line:41:6, endln:44:9 + \_assignment: , line:42:2, endln:42:20 |vpiName:clk45 |vpiFullName:work@oh_edgealign.clk45 |vpiLhs: \_ref_obj: (work@oh_edgealign.clk90), line:42:2, endln:42:7 |vpiParent: - \_begin: (work@oh_edgealign), line:41:6, endln:44:9 + \_assignment: , line:42:2, endln:42:20 |vpiName:clk90 |vpiFullName:work@oh_edgealign.clk90 |vpiStmt: @@ -28047,12 +27850,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:43:15, endln:43:29 |vpiParent: - \_begin: (work@oh_edgealign), line:41:6, endln:44:9 + \_assignment: , line:43:2, endln:43:29 |vpiOpType:28 |vpiOperand: \_operation: , line:43:15, endln:43:21 |vpiParent: - \_begin: (work@oh_edgealign), line:41:6, endln:44:9 + \_operation: , line:43:15, endln:43:29 |vpiOpType:4 |vpiOperand: \_ref_obj: (work@oh_edgealign.clk45), line:43:16, endln:43:21 @@ -28069,7 +27872,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_edgealign.firstedge), line:43:2, endln:43:11 |vpiParent: - \_begin: (work@oh_edgealign), line:41:6, endln:44:9 + \_assignment: , line:43:2, endln:43:29 |vpiName:firstedge |vpiFullName:work@oh_edgealign.firstedge |vpiAlwaysType:1 @@ -28289,32 +28092,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:21:25, endln:21:28 - |vpiParent: - \_assignment: , line:21:8, endln:21:28 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:21:8, endln:21:21 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:21:8, endln:21:21 |vpiParent: - \_ref_obj: in_reg (work@oh_fall2pulse.in_reg) - |vpiParent: - \_assignment: , line:21:8, endln:21:28 - |vpiName:in_reg - |vpiFullName:work@oh_fall2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:21:8, endln:21:28 + |vpiName:in_reg + |vpiFullName:work@oh_fall2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:21:8, endln:21:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fall2pulse.N), line:21:15, endln:21:16 + \_ref_obj: (work@oh_fall2pulse.in_reg.N), line:21:15, endln:21:16 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_operation: , line:21:15, endln:21:18 |vpiName:N - |vpiFullName:work@oh_fall2pulse.N + |vpiFullName:work@oh_fall2pulse.in_reg.N |vpiOperand: \_constant: , line:21:17, endln:21:18 |vpiParent: @@ -28335,26 +28134,24 @@ design: (work@oh_fifo_async) \_if_else: , line:20:6, endln:23:36 |vpiOpType:82 |vpiRhs: - \_part_select: , line:23:25, endln:23:34 + \_part_select: in (work@oh_fall2pulse.in), line:23:25, endln:23:34 |vpiParent: - \_ref_obj: in (work@oh_fall2pulse.in), line:23:25, endln:23:27 - |vpiParent: - \_assignment: , line:23:8, endln:23:34 - |vpiName:in - |vpiFullName:work@oh_fall2pulse.in - |vpiDefName:in + \_assignment: , line:23:8, endln:23:34 + |vpiName:in + |vpiFullName:work@oh_fall2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:28, endln:23:31 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_part_select: in (work@oh_fall2pulse.in), line:23:25, endln:23:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fall2pulse.N), line:23:28, endln:23:29 + \_ref_obj: (work@oh_fall2pulse.in.N), line:23:28, endln:23:29 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_operation: , line:23:28, endln:23:31 |vpiName:N - |vpiFullName:work@oh_fall2pulse.N + |vpiFullName:work@oh_fall2pulse.in.N |vpiOperand: \_constant: , line:23:30, endln:23:31 |vpiParent: @@ -28370,26 +28167,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:23:8, endln:23:21 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:23:8, endln:23:21 |vpiParent: - \_ref_obj: in_reg (work@oh_fall2pulse.in_reg) - |vpiParent: - \_assignment: , line:23:8, endln:23:34 - |vpiName:in_reg - |vpiFullName:work@oh_fall2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:23:8, endln:23:34 + |vpiName:in_reg + |vpiFullName:work@oh_fall2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:15, endln:23:18 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:23:8, endln:23:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fall2pulse.N), line:23:15, endln:23:16 + \_ref_obj: (work@oh_fall2pulse.in_reg.N), line:23:15, endln:23:16 |vpiParent: - \_if_else: , line:20:6, endln:23:36 + \_operation: , line:23:15, endln:23:18 |vpiName:N - |vpiFullName:work@oh_fall2pulse.N + |vpiFullName:work@oh_fall2pulse.in_reg.N |vpiOperand: \_constant: , line:23:17, endln:23:18 |vpiParent: @@ -28420,26 +28215,24 @@ design: (work@oh_fifo_async) \_operation: , line:25:24, endln:25:50 |vpiOpType:4 |vpiOperand: - \_part_select: , line:25:25, endln:25:34 + \_part_select: in (work@oh_fall2pulse.in), line:25:25, endln:25:34 |vpiParent: - \_ref_obj: in (work@oh_fall2pulse.in), line:25:25, endln:25:27 - |vpiParent: - \_operation: , line:25:24, endln:25:34 - |vpiName:in - |vpiFullName:work@oh_fall2pulse.in - |vpiDefName:in + \_operation: , line:25:24, endln:25:34 + |vpiName:in + |vpiFullName:work@oh_fall2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:28, endln:25:31 |vpiParent: - \_operation: , line:25:24, endln:25:34 + \_part_select: in (work@oh_fall2pulse.in), line:25:25, endln:25:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fall2pulse.N), line:25:28, endln:25:29 + \_ref_obj: (work@oh_fall2pulse.in.N), line:25:28, endln:25:29 |vpiParent: - \_operation: , line:25:24, endln:25:34 + \_operation: , line:25:28, endln:25:31 |vpiName:N - |vpiFullName:work@oh_fall2pulse.N + |vpiFullName:work@oh_fall2pulse.in.N |vpiOperand: \_constant: , line:25:30, endln:25:31 |vpiParent: @@ -28455,26 +28248,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:25:37, endln:25:50 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:25:37, endln:25:50 |vpiParent: - \_ref_obj: in_reg (work@oh_fall2pulse.in_reg), line:25:37, endln:25:43 - |vpiParent: - \_operation: , line:25:24, endln:25:50 - |vpiName:in_reg - |vpiFullName:work@oh_fall2pulse.in_reg - |vpiDefName:in_reg + \_operation: , line:25:24, endln:25:50 + |vpiName:in_reg + |vpiFullName:work@oh_fall2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:44, endln:25:47 |vpiParent: - \_operation: , line:25:24, endln:25:50 + \_part_select: in_reg (work@oh_fall2pulse.in_reg), line:25:37, endln:25:50 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fall2pulse.N), line:25:44, endln:25:45 + \_ref_obj: (work@oh_fall2pulse.in_reg.N), line:25:44, endln:25:45 |vpiParent: - \_operation: , line:25:24, endln:25:50 + \_operation: , line:25:44, endln:25:47 |vpiName:N - |vpiFullName:work@oh_fall2pulse.N + |vpiFullName:work@oh_fall2pulse.in_reg.N |vpiOperand: \_constant: , line:25:46, endln:25:47 |vpiParent: @@ -28490,23 +28281,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:25:11, endln:25:21 + \_part_select: out (work@oh_fall2pulse.out), line:25:11, endln:25:21 |vpiParent: - \_ref_obj: out (work@oh_fall2pulse.out) - |vpiParent: - \_cont_assign: , line:25:11, endln:25:50 - |vpiName:out - |vpiFullName:work@oh_fall2pulse.out - |vpiDefName:out + \_cont_assign: , line:25:11, endln:25:50 + |vpiName:out + |vpiFullName:work@oh_fall2pulse.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:15, endln:25:18 + |vpiParent: + \_part_select: out (work@oh_fall2pulse.out), line:25:11, endln:25:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:15, endln:25:16 + \_ref_obj: (work@oh_fall2pulse.out.N), line:25:15, endln:25:16 |vpiParent: \_operation: , line:25:15, endln:25:18 |vpiName:N + |vpiFullName:work@oh_fall2pulse.out.N |vpiOperand: \_constant: , line:25:17, endln:25:18 |vpiParent: @@ -29573,27 +29365,23 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:92:26, endln:92:29 - |vpiParent: - \_assignment: , line:92:8, endln:92:29 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:92:8, endln:92:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:92:8, endln:92:21 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr) - |vpiParent: - \_assignment: , line:92:8, endln:92:29 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:92:8, endln:92:29 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:92:16, endln:92:18 + \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:92:16, endln:92:18 |vpiParent: - \_if_else: , line:91:6, endln:94:47 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:92:8, endln:92:21 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiRightRange: \_constant: , line:92:19, endln:92:20 |vpiDecompile:0 @@ -29620,24 +29408,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:94:26, endln:94:46 |vpiParent: - \_if_stmt: , line:93:11, endln:94:47 + \_assignment: , line:94:8, endln:94:46 |vpiOpType:24 |vpiOperand: - \_part_select: , line:94:26, endln:94:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:39 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:33 - |vpiParent: - \_operation: , line:94:26, endln:94:46 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr + \_operation: , line:94:26, endln:94:46 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:94:34, endln:94:36 + \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:94:34, endln:94:36 |vpiParent: - \_if_stmt: , line:93:11, endln:94:47 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:39 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiRightRange: \_constant: , line:94:37, endln:94:38 |vpiDecompile:0 @@ -29653,21 +29439,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:94:8, endln:94:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:8, endln:94:21 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr) - |vpiParent: - \_assignment: , line:94:8, endln:94:46 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:94:8, endln:94:46 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:94:16, endln:94:18 + \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:94:16, endln:94:18 |vpiParent: - \_if_stmt: , line:93:11, endln:94:47 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:8, endln:94:21 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiRightRange: \_constant: , line:94:19, endln:94:20 |vpiDecompile:0 @@ -29732,28 +29516,24 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:102:25, endln:102:28 - |vpiParent: - \_assignment: , line:102:8, endln:102:28 |vpiDecompile:'d0 |vpiSize:-1 |DEC:0 |vpiConstType:1 |vpiLhs: - \_part_select: , line:102:8, endln:102:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:102:8, endln:102:21 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr) - |vpiParent: - \_assignment: , line:102:8, endln:102:28 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:102:8, endln:102:28 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:102:16, endln:102:18 + \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:102:16, endln:102:18 |vpiParent: - \_if_else: , line:101:6, endln:104:45 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:102:8, endln:102:21 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiRightRange: \_constant: , line:102:19, endln:102:20 |vpiDecompile:0 @@ -29780,24 +29560,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:104:25, endln:104:44 |vpiParent: - \_if_stmt: , line:103:11, endln:104:45 + \_assignment: , line:104:8, endln:104:44 |vpiOpType:24 |vpiOperand: - \_part_select: , line:104:25, endln:104:38 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:38 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:32 - |vpiParent: - \_operation: , line:104:25, endln:104:44 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr + \_operation: , line:104:25, endln:104:44 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:104:33, endln:104:35 + \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:104:33, endln:104:35 |vpiParent: - \_if_stmt: , line:103:11, endln:104:45 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:38 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiRightRange: \_constant: , line:104:36, endln:104:37 |vpiDecompile:0 @@ -29813,21 +29591,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:104:8, endln:104:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:8, endln:104:21 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr) - |vpiParent: - \_assignment: , line:104:8, endln:104:44 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:104:8, endln:104:44 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:104:16, endln:104:18 + \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:104:16, endln:104:18 |vpiParent: - \_if_stmt: , line:103:11, endln:104:45 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:8, endln:104:21 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiRightRange: \_constant: , line:104:19, endln:104:20 |vpiDecompile:0 @@ -29863,15 +29639,16 @@ design: (work@oh_fifo_async) \_port: (dout), line:121:19, endln:121:52 |vpiName:dout |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 - |vpiParent: - \_ref_obj: wr_addr_gray_sync (wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiName:wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync + \_part_select: wr_addr_gray_sync (wr_addr_gray_sync), line:121:28, endln:121:51 + |vpiName:wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:121:46, endln:121:48 + \_ref_obj: (wr_addr_gray_sync.AW), line:121:46, endln:121:48 + |vpiParent: + \_part_select: wr_addr_gray_sync (wr_addr_gray_sync), line:121:28, endln:121:51 |vpiName:AW + |vpiFullName:wr_addr_gray_sync.AW |vpiRightRange: \_constant: , line:121:49, endln:121:50 |vpiDecompile:0 @@ -29898,15 +29675,16 @@ design: (work@oh_fifo_async) \_port: (din), line:124:5, endln:124:33 |vpiName:din |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 - |vpiParent: - \_ref_obj: wr_addr_gray (wr_addr_gray), line:124:14, endln:124:26 - |vpiName:wr_addr_gray - |vpiDefName:wr_addr_gray + \_part_select: wr_addr_gray (wr_addr_gray), line:124:14, endln:124:32 + |vpiName:wr_addr_gray + |vpiDefName:wr_addr_gray |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:124:27, endln:124:29 + \_ref_obj: (wr_addr_gray.AW), line:124:27, endln:124:29 + |vpiParent: + \_part_select: wr_addr_gray (wr_addr_gray), line:124:14, endln:124:32 |vpiName:AW + |vpiFullName:wr_addr_gray.AW |vpiRightRange: \_constant: , line:124:30, endln:124:31 |vpiDecompile:0 @@ -29941,15 +29719,16 @@ design: (work@oh_fifo_async) \_port: (dout), line:137:19, endln:137:52 |vpiName:dout |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 - |vpiParent: - \_ref_obj: rd_addr_gray_sync (rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiName:rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync + \_part_select: rd_addr_gray_sync (rd_addr_gray_sync), line:137:28, endln:137:51 + |vpiName:rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:137:46, endln:137:48 + \_ref_obj: (rd_addr_gray_sync.AW), line:137:46, endln:137:48 + |vpiParent: + \_part_select: rd_addr_gray_sync (rd_addr_gray_sync), line:137:28, endln:137:51 |vpiName:AW + |vpiFullName:rd_addr_gray_sync.AW |vpiRightRange: \_constant: , line:137:49, endln:137:50 |vpiDecompile:0 @@ -29976,15 +29755,16 @@ design: (work@oh_fifo_async) \_port: (din), line:140:5, endln:140:33 |vpiName:din |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 - |vpiParent: - \_ref_obj: rd_addr_gray (rd_addr_gray), line:140:14, endln:140:26 - |vpiName:rd_addr_gray - |vpiDefName:rd_addr_gray + \_part_select: rd_addr_gray (rd_addr_gray), line:140:14, endln:140:32 + |vpiName:rd_addr_gray + |vpiDefName:rd_addr_gray |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:140:27, endln:140:29 + \_ref_obj: (rd_addr_gray.AW), line:140:27, endln:140:29 + |vpiParent: + \_part_select: rd_addr_gray (rd_addr_gray), line:140:14, endln:140:32 |vpiName:AW + |vpiFullName:rd_addr_gray.AW |vpiRightRange: \_constant: , line:140:30, endln:140:31 |vpiDecompile:0 @@ -30039,18 +29819,19 @@ design: (work@oh_fifo_async) \_cont_assign: , line:147:11, endln:147:70 |vpiOpType:14 |vpiOperand: - \_part_select: , line:147:24, endln:147:42 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:42 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:36 - |vpiParent: - \_operation: , line:147:24, endln:147:69 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_addr_gray - |vpiDefName:rd_addr_gray + \_operation: , line:147:24, endln:147:69 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:147:37, endln:147:39 + \_ref_obj: (work@oh_fifo_async.rd_addr_gray.AW), line:147:37, endln:147:39 + |vpiParent: + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:42 |vpiName:AW + |vpiFullName:work@oh_fifo_async.rd_addr_gray.AW |vpiRightRange: \_constant: , line:147:40, endln:147:41 |vpiDecompile:0 @@ -30058,21 +29839,19 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:147:46, endln:147:69 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:69 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:63 - |vpiParent: - \_operation: , line:147:24, endln:147:69 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync + \_operation: , line:147:24, endln:147:69 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_async.AW), line:147:64, endln:147:66 + \_ref_obj: (work@oh_fifo_async.wr_addr_gray_sync.AW), line:147:64, endln:147:66 |vpiParent: - \_operation: , line:147:24, endln:147:69 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:69 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync.AW |vpiRightRange: \_constant: , line:147:67, endln:147:68 |vpiDecompile:0 @@ -30102,23 +29881,24 @@ design: (work@oh_fifo_async) \_operation: , line:150:23, endln:151:46 |vpiOpType:14 |vpiOperand: - \_part_select: , line:150:24, endln:150:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:39 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:31 - |vpiParent: - \_operation: , line:150:24, endln:150:63 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr + \_operation: , line:150:24, endln:150:63 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:150:32, endln:150:36 + |vpiParent: + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:39 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:150:32, endln:150:34 + \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:150:32, endln:150:34 |vpiParent: \_operation: , line:150:32, endln:150:36 |vpiName:AW + |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiOperand: \_constant: , line:150:35, endln:150:36 |vpiParent: @@ -30134,26 +29914,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:150:43, endln:150:63 + \_part_select: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:63 |vpiParent: - \_ref_obj: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:55 - |vpiParent: - \_operation: , line:150:24, endln:150:63 - |vpiName:rd_addr_sync - |vpiFullName:work@oh_fifo_async.rd_addr_sync - |vpiDefName:rd_addr_sync + \_operation: , line:150:24, endln:150:63 + |vpiName:rd_addr_sync + |vpiFullName:work@oh_fifo_async.rd_addr_sync + |vpiDefName:rd_addr_sync |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:150:56, endln:150:60 |vpiParent: - \_operation: , line:150:24, endln:150:63 + \_part_select: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:63 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_async.AW), line:150:56, endln:150:58 + \_ref_obj: (work@oh_fifo_async.rd_addr_sync.AW), line:150:56, endln:150:58 |vpiParent: - \_operation: , line:150:24, endln:150:63 + \_operation: , line:150:56, endln:150:60 |vpiName:AW - |vpiFullName:work@oh_fifo_async.AW + |vpiFullName:work@oh_fifo_async.rd_addr_sync.AW |vpiOperand: \_constant: , line:150:59, endln:150:60 |vpiParent: @@ -30176,33 +29954,25 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_addr), line:151:10, endln:151:21 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_addr) - |vpiParent: - \_operation: , line:151:10, endln:151:45 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr + \_operation: , line:151:10, endln:151:45 |vpiName:wr_addr |vpiFullName:work@oh_fifo_async.wr_addr |vpiIndex: \_ref_obj: (work@oh_fifo_async.AW), line:151:18, endln:151:20 |vpiParent: - \_operation: , line:150:23, endln:151:46 + \_bit_select: (work@oh_fifo_async.wr_addr), line:151:10, endln:151:21 |vpiName:AW |vpiFullName:work@oh_fifo_async.AW |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_addr_sync), line:151:29, endln:151:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_addr_sync) - |vpiParent: - \_operation: , line:151:10, endln:151:45 - |vpiName:rd_addr_sync - |vpiFullName:work@oh_fifo_async.rd_addr_sync + \_operation: , line:151:10, endln:151:45 |vpiName:rd_addr_sync |vpiFullName:work@oh_fifo_async.rd_addr_sync |vpiIndex: \_ref_obj: (work@oh_fifo_async.AW), line:151:42, endln:151:44 |vpiParent: - \_operation: , line:151:10, endln:151:45 + \_bit_select: (work@oh_fifo_async.rd_addr_sync), line:151:29, endln:151:45 |vpiName:AW |vpiFullName:work@oh_fifo_async.AW |vpiLhs: @@ -30289,15 +30059,16 @@ design: (work@oh_fifo_async) \_port: (out), line:115:17, endln:115:45 |vpiName:out |vpiHighConn: - \_part_select: , line:115:26, endln:115:44 - |vpiParent: - \_ref_obj: wr_addr_gray (wr_addr_gray), line:115:26, endln:115:38 - |vpiName:wr_addr_gray - |vpiDefName:wr_addr_gray + \_part_select: wr_addr_gray (wr_addr_gray), line:115:26, endln:115:44 + |vpiName:wr_addr_gray + |vpiDefName:wr_addr_gray |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:115:39, endln:115:41 + \_ref_obj: (wr_addr_gray.AW), line:115:39, endln:115:41 + |vpiParent: + \_part_select: wr_addr_gray (wr_addr_gray), line:115:26, endln:115:44 |vpiName:AW + |vpiFullName:wr_addr_gray.AW |vpiRightRange: \_constant: , line:115:42, endln:115:43 |vpiDecompile:0 @@ -30308,15 +30079,16 @@ design: (work@oh_fifo_async) \_port: (in), line:116:3, endln:116:22 |vpiName:in |vpiHighConn: - \_part_select: , line:116:8, endln:116:21 - |vpiParent: - \_ref_obj: wr_addr (wr_addr), line:116:8, endln:116:15 - |vpiName:wr_addr - |vpiDefName:wr_addr + \_part_select: wr_addr (wr_addr), line:116:8, endln:116:21 + |vpiName:wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:116:16, endln:116:18 + \_ref_obj: (wr_addr.AW), line:116:16, endln:116:18 + |vpiParent: + \_part_select: wr_addr (wr_addr), line:116:8, endln:116:21 |vpiName:AW + |vpiFullName:wr_addr.AW |vpiRightRange: \_constant: , line:116:19, endln:116:20 |vpiDecompile:0 @@ -30335,15 +30107,16 @@ design: (work@oh_fifo_async) \_port: (out), line:131:17, endln:131:44 |vpiName:out |vpiHighConn: - \_part_select: , line:131:25, endln:131:43 - |vpiParent: - \_ref_obj: rd_addr_gray (rd_addr_gray), line:131:25, endln:131:37 - |vpiName:rd_addr_gray - |vpiDefName:rd_addr_gray + \_part_select: rd_addr_gray (rd_addr_gray), line:131:25, endln:131:43 + |vpiName:rd_addr_gray + |vpiDefName:rd_addr_gray |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:131:38, endln:131:40 + \_ref_obj: (rd_addr_gray.AW), line:131:38, endln:131:40 + |vpiParent: + \_part_select: rd_addr_gray (rd_addr_gray), line:131:25, endln:131:43 |vpiName:AW + |vpiFullName:rd_addr_gray.AW |vpiRightRange: \_constant: , line:131:41, endln:131:42 |vpiDecompile:0 @@ -30354,15 +30127,16 @@ design: (work@oh_fifo_async) \_port: (in), line:132:3, endln:132:25 |vpiName:in |vpiHighConn: - \_part_select: , line:132:11, endln:132:24 - |vpiParent: - \_ref_obj: rd_addr (rd_addr), line:132:11, endln:132:18 - |vpiName:rd_addr - |vpiDefName:rd_addr + \_part_select: rd_addr (rd_addr), line:132:11, endln:132:24 + |vpiName:rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (AW), line:132:19, endln:132:21 + \_ref_obj: (rd_addr.AW), line:132:19, endln:132:21 + |vpiParent: + \_part_select: rd_addr (rd_addr), line:132:11, endln:132:24 |vpiName:AW + |vpiFullName:rd_addr.AW |vpiRightRange: \_constant: , line:132:22, endln:132:23 |vpiDecompile:0 @@ -30411,20 +30185,21 @@ design: (work@oh_fifo_async) \_port: (rd_dout), line:166:3, endln:166:29 |vpiName:rd_dout |vpiHighConn: - \_part_select: , line:166:14, endln:166:28 - |vpiParent: - \_ref_obj: rd_dout (rd_dout), line:166:14, endln:166:21 - |vpiName:rd_dout - |vpiDefName:rd_dout + \_part_select: rd_dout (rd_dout), line:166:14, endln:166:28 + |vpiName:rd_dout + |vpiDefName:rd_dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:166:22, endln:166:25 + |vpiParent: + \_part_select: rd_dout (rd_dout), line:166:14, endln:166:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:166:22, endln:166:23 + \_ref_obj: (rd_dout.N), line:166:22, endln:166:23 |vpiParent: \_operation: , line:166:22, endln:166:25 |vpiName:N + |vpiFullName:rd_dout.N |vpiOperand: \_constant: , line:166:24, endln:166:25 |vpiParent: @@ -30451,20 +30226,21 @@ design: (work@oh_fifo_async) \_port: (wr_addr), line:169:3, endln:169:30 |vpiName:wr_addr |vpiHighConn: - \_part_select: , line:169:14, endln:169:29 - |vpiParent: - \_ref_obj: wr_addr (wr_addr), line:169:14, endln:169:21 - |vpiName:wr_addr - |vpiDefName:wr_addr + \_part_select: wr_addr (wr_addr), line:169:14, endln:169:29 + |vpiName:wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:169:22, endln:169:26 + |vpiParent: + \_part_select: wr_addr (wr_addr), line:169:14, endln:169:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:169:22, endln:169:24 + \_ref_obj: (wr_addr.AW), line:169:22, endln:169:24 |vpiParent: \_operation: , line:169:22, endln:169:26 |vpiName:AW + |vpiFullName:wr_addr.AW |vpiOperand: \_constant: , line:169:25, endln:169:26 |vpiParent: @@ -30483,20 +30259,21 @@ design: (work@oh_fifo_async) \_port: (wr_din), line:170:3, endln:170:28 |vpiName:wr_din |vpiHighConn: - \_part_select: , line:170:14, endln:170:27 - |vpiParent: - \_ref_obj: wr_din (wr_din), line:170:14, endln:170:20 - |vpiName:wr_din - |vpiDefName:wr_din + \_part_select: wr_din (wr_din), line:170:14, endln:170:27 + |vpiName:wr_din + |vpiDefName:wr_din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:170:21, endln:170:24 + |vpiParent: + \_part_select: wr_din (wr_din), line:170:14, endln:170:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:170:21, endln:170:22 + \_ref_obj: (wr_din.N), line:170:21, endln:170:22 |vpiParent: \_operation: , line:170:21, endln:170:24 |vpiName:N + |vpiFullName:wr_din.N |vpiOperand: \_constant: , line:170:23, endln:170:24 |vpiParent: @@ -30531,20 +30308,21 @@ design: (work@oh_fifo_async) \_port: (rd_addr), line:173:3, endln:173:30 |vpiName:rd_addr |vpiHighConn: - \_part_select: , line:173:14, endln:173:29 - |vpiParent: - \_ref_obj: rd_addr (rd_addr), line:173:14, endln:173:21 - |vpiName:rd_addr - |vpiDefName:rd_addr + \_part_select: rd_addr (rd_addr), line:173:14, endln:173:29 + |vpiName:rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:173:22, endln:173:26 + |vpiParent: + \_part_select: rd_addr (rd_addr), line:173:14, endln:173:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:173:22, endln:173:24 + \_ref_obj: (rd_addr.AW), line:173:22, endln:173:24 |vpiParent: \_operation: , line:173:22, endln:173:26 |vpiName:AW + |vpiFullName:rd_addr.AW |vpiOperand: \_constant: , line:173:25, endln:173:26 |vpiParent: @@ -30579,20 +30357,21 @@ design: (work@oh_fifo_async) \_port: (bist_wem), line:176:3, endln:176:31 |vpiName:bist_wem |vpiHighConn: - \_part_select: , line:176:15, endln:176:30 - |vpiParent: - \_ref_obj: bist_wem (bist_wem), line:176:15, endln:176:23 - |vpiName:bist_wem - |vpiDefName:bist_wem + \_part_select: bist_wem (bist_wem), line:176:15, endln:176:30 + |vpiName:bist_wem + |vpiDefName:bist_wem |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:176:24, endln:176:27 + |vpiParent: + \_part_select: bist_wem (bist_wem), line:176:15, endln:176:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:176:24, endln:176:25 + \_ref_obj: (bist_wem.N), line:176:24, endln:176:25 |vpiParent: \_operation: , line:176:24, endln:176:27 |vpiName:N + |vpiFullName:bist_wem.N |vpiOperand: \_constant: , line:176:26, endln:176:27 |vpiParent: @@ -30611,20 +30390,21 @@ design: (work@oh_fifo_async) \_port: (bist_addr), line:177:3, endln:177:34 |vpiName:bist_addr |vpiHighConn: - \_part_select: , line:177:16, endln:177:33 - |vpiParent: - \_ref_obj: bist_addr (bist_addr), line:177:16, endln:177:25 - |vpiName:bist_addr - |vpiDefName:bist_addr + \_part_select: bist_addr (bist_addr), line:177:16, endln:177:33 + |vpiName:bist_addr + |vpiDefName:bist_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:177:26, endln:177:30 + |vpiParent: + \_part_select: bist_addr (bist_addr), line:177:16, endln:177:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:177:26, endln:177:28 + \_ref_obj: (bist_addr.AW), line:177:26, endln:177:28 |vpiParent: \_operation: , line:177:26, endln:177:30 |vpiName:AW + |vpiFullName:bist_addr.AW |vpiOperand: \_constant: , line:177:29, endln:177:30 |vpiParent: @@ -30643,20 +30423,21 @@ design: (work@oh_fifo_async) \_port: (bist_din), line:178:3, endln:178:31 |vpiName:bist_din |vpiHighConn: - \_part_select: , line:178:15, endln:178:30 - |vpiParent: - \_ref_obj: bist_din (bist_din), line:178:15, endln:178:23 - |vpiName:bist_din - |vpiDefName:bist_din + \_part_select: bist_din (bist_din), line:178:15, endln:178:30 + |vpiName:bist_din + |vpiDefName:bist_din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:178:24, endln:178:27 + |vpiParent: + \_part_select: bist_din (bist_din), line:178:15, endln:178:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:178:24, endln:178:25 + \_ref_obj: (bist_din.N), line:178:24, endln:178:25 |vpiParent: \_operation: , line:178:24, endln:178:27 |vpiName:N + |vpiFullName:bist_din.N |vpiOperand: \_constant: , line:178:26, endln:178:27 |vpiParent: @@ -30707,11 +30488,9 @@ design: (work@oh_fifo_async) \_port: (memconfig), line:183:3, endln:183:31 |vpiName:memconfig |vpiHighConn: - \_part_select: , line:183:16, endln:183:30 - |vpiParent: - \_ref_obj: memconfig (memconfig), line:183:16, endln:183:25 - |vpiName:memconfig - |vpiDefName:memconfig + \_part_select: memconfig (memconfig), line:183:16, endln:183:30 + |vpiName:memconfig + |vpiDefName:memconfig |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:183:26, endln:183:27 @@ -30729,11 +30508,9 @@ design: (work@oh_fifo_async) \_port: (memrepair), line:184:3, endln:184:31 |vpiName:memrepair |vpiHighConn: - \_part_select: , line:184:16, endln:184:30 - |vpiParent: - \_ref_obj: memrepair (memrepair), line:184:16, endln:184:25 - |vpiName:memrepair - |vpiDefName:memrepair + \_part_select: memrepair (memrepair), line:184:16, endln:184:30 + |vpiName:memrepair + |vpiDefName:memrepair |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:184:26, endln:184:27 @@ -31190,8 +30967,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:48:21, endln:48:25 - |vpiParent: - \_assignment: , line:48:8, endln:48:25 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -31199,7 +30974,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_fifo_cdc.valid_out), line:48:8, endln:48:17 |vpiParent: - \_if_else: , line:47:6, endln:50:27 + \_assignment: , line:48:8, endln:48:25 |vpiName:valid_out |vpiFullName:work@oh_fifo_cdc.valid_out |vpiElseStmt: @@ -31220,13 +30995,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_fifo_cdc.rd_en), line:50:21, endln:50:26 |vpiParent: - \_if_stmt: , line:49:11, endln:50:27 + \_assignment: , line:50:8, endln:50:26 |vpiName:rd_en |vpiFullName:work@oh_fifo_cdc.rd_en |vpiLhs: \_ref_obj: (work@oh_fifo_cdc.valid_out), line:50:8, endln:50:17 |vpiParent: - \_if_stmt: , line:49:11, endln:50:27 + \_assignment: , line:50:8, endln:50:26 |vpiName:valid_out |vpiFullName:work@oh_fifo_cdc.valid_out |vpiAlwaysType:1 @@ -31295,12 +31070,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:36:25, endln:36:49 |vpiParent: - \_operation: , line:36:23, endln:36:65 + \_operation: , line:36:25, endln:36:64 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_fifo_cdc.wr_almost_full), line:36:25, endln:36:39 |vpiParent: - \_operation: , line:36:23, endln:36:65 + \_operation: , line:36:25, endln:36:49 |vpiName:wr_almost_full |vpiFullName:work@oh_fifo_cdc.wr_almost_full |vpiOperand: @@ -31365,20 +31140,21 @@ design: (work@oh_fifo_async) \_port: (rd_dout), line:58:5, endln:58:34 |vpiName:rd_dout |vpiHighConn: - \_part_select: , line:58:16, endln:58:33 - |vpiParent: - \_ref_obj: packet_out (packet_out), line:58:16, endln:58:26 - |vpiName:packet_out - |vpiDefName:packet_out + \_part_select: packet_out (packet_out), line:58:16, endln:58:33 + |vpiName:packet_out + |vpiDefName:packet_out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:58:27, endln:58:30 + |vpiParent: + \_part_select: packet_out (packet_out), line:58:16, endln:58:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:58:27, endln:58:28 + \_ref_obj: (packet_out.N), line:58:27, endln:58:28 |vpiParent: \_operation: , line:58:27, endln:58:30 |vpiName:N + |vpiFullName:packet_out.N |vpiOperand: \_constant: , line:58:29, endln:58:30 |vpiParent: @@ -31403,20 +31179,21 @@ design: (work@oh_fifo_async) \_port: (wr_din), line:60:5, endln:60:32 |vpiName:wr_din |vpiHighConn: - \_part_select: , line:60:15, endln:60:31 - |vpiParent: - \_ref_obj: packet_in (packet_in), line:60:15, endln:60:24 - |vpiName:packet_in - |vpiDefName:packet_in + \_part_select: packet_in (packet_in), line:60:15, endln:60:31 + |vpiName:packet_in + |vpiDefName:packet_in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:60:25, endln:60:28 + |vpiParent: + \_part_select: packet_in (packet_in), line:60:15, endln:60:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:60:25, endln:60:26 + \_ref_obj: (packet_in.N), line:60:25, endln:60:26 |vpiParent: \_operation: , line:60:25, endln:60:28 |vpiName:N + |vpiFullName:packet_in.N |vpiOperand: \_constant: , line:60:27, endln:60:28 |vpiParent: @@ -32633,28 +32410,24 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:78:31, endln:78:34 - |vpiParent: - \_assignment: , line:78:11, endln:78:34 |vpiDecompile:'d0 |vpiSize:-1 |DEC:0 |vpiConstType:1 |vpiLhs: - \_part_select: , line:78:11, endln:78:24 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:78:11, endln:78:24 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_assignment: , line:78:11, endln:78:34 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:78:11, endln:78:34 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:78:19, endln:78:21 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:78:19, endln:78:21 |vpiParent: - \_begin: (work@oh_fifo_sync), line:77:8, endln:81:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:78:11, endln:78:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:78:22, endln:78:23 |vpiDecompile:0 @@ -32668,27 +32441,23 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:79:31, endln:79:34 - |vpiParent: - \_assignment: , line:79:11, endln:79:34 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:79:11, endln:79:24 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:79:11, endln:79:24 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_assignment: , line:79:11, endln:79:34 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:79:11, endln:79:34 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:79:19, endln:79:21 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:79:19, endln:79:21 |vpiParent: - \_begin: (work@oh_fifo_sync), line:77:8, endln:81:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:79:11, endln:79:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:79:22, endln:79:23 |vpiDecompile:0 @@ -32702,32 +32471,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:80:31, endln:80:34 - |vpiParent: - \_assignment: , line:80:11, endln:80:34 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:80:11, endln:80:27 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:80:11, endln:80:27 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count) - |vpiParent: - \_assignment: , line:80:11, endln:80:34 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_assignment: , line:80:11, endln:80:34 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:80:20, endln:80:24 |vpiParent: - \_begin: (work@oh_fifo_sync), line:77:8, endln:81:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:80:11, endln:80:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:80:20, endln:80:22 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:80:20, endln:80:22 |vpiParent: - \_begin: (work@oh_fifo_sync), line:77:8, endln:81:11 + \_operation: , line:80:20, endln:80:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:80:23, endln:80:24 |vpiParent: @@ -32764,28 +32529,24 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:84:31, endln:84:34 - |vpiParent: - \_assignment: , line:84:11, endln:84:34 |vpiDecompile:'d0 |vpiSize:-1 |DEC:0 |vpiConstType:1 |vpiLhs: - \_part_select: , line:84:11, endln:84:24 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:84:11, endln:84:24 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_assignment: , line:84:11, endln:84:34 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:84:11, endln:84:34 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:84:19, endln:84:21 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:84:19, endln:84:21 |vpiParent: - \_begin: (work@oh_fifo_sync), line:83:8, endln:87:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:84:11, endln:84:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:84:22, endln:84:23 |vpiDecompile:0 @@ -32799,27 +32560,23 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:85:31, endln:85:34 - |vpiParent: - \_assignment: , line:85:11, endln:85:34 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:85:11, endln:85:24 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:85:11, endln:85:24 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_assignment: , line:85:11, endln:85:34 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:85:11, endln:85:34 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:85:19, endln:85:21 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:85:19, endln:85:21 |vpiParent: - \_begin: (work@oh_fifo_sync), line:83:8, endln:87:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:85:11, endln:85:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:85:22, endln:85:23 |vpiDecompile:0 @@ -32833,32 +32590,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:86:31, endln:86:34 - |vpiParent: - \_assignment: , line:86:11, endln:86:34 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:86:11, endln:86:27 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:86:11, endln:86:27 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count) - |vpiParent: - \_assignment: , line:86:11, endln:86:34 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_assignment: , line:86:11, endln:86:34 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:86:20, endln:86:24 |vpiParent: - \_begin: (work@oh_fifo_sync), line:83:8, endln:87:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:86:11, endln:86:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:86:20, endln:86:22 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:86:20, endln:86:22 |vpiParent: - \_begin: (work@oh_fifo_sync), line:83:8, endln:87:11 + \_operation: , line:86:20, endln:86:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:86:23, endln:86:24 |vpiParent: @@ -32885,7 +32638,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_fifo_sync.fifo_write), line:88:14, endln:88:24 |vpiParent: - \_if_else: , line:82:11, endln:102:11 + \_operation: , line:88:14, endln:88:36 |vpiName:fifo_write |vpiFullName:work@oh_fifo_sync.fifo_write |vpiOperand: @@ -32907,24 +32660,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:90:21, endln:90:40 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_assignment: , line:90:4, endln:90:40 |vpiOpType:24 |vpiOperand: - \_part_select: , line:90:21, endln:90:34 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:90:21, endln:90:34 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr), line:90:21, endln:90:28 - |vpiParent: - \_operation: , line:90:21, endln:90:40 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_operation: , line:90:21, endln:90:40 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:90:29, endln:90:31 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:90:29, endln:90:31 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:90:21, endln:90:34 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:90:32, endln:90:33 |vpiDecompile:0 @@ -32940,21 +32691,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:90:4, endln:90:17 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:90:4, endln:90:17 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_assignment: , line:90:4, endln:90:40 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:90:4, endln:90:40 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:90:12, endln:90:14 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:90:12, endln:90:14 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:90:4, endln:90:17 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:90:15, endln:90:16 |vpiDecompile:0 @@ -32969,24 +32718,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:91:21, endln:91:40 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_assignment: , line:91:4, endln:91:40 |vpiOpType:24 |vpiOperand: - \_part_select: , line:91:21, endln:91:34 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:91:21, endln:91:34 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr), line:91:21, endln:91:28 - |vpiParent: - \_operation: , line:91:21, endln:91:40 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_operation: , line:91:21, endln:91:40 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:91:29, endln:91:31 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:91:29, endln:91:31 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:91:21, endln:91:34 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:91:32, endln:91:33 |vpiDecompile:0 @@ -33002,21 +32749,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:91:4, endln:91:17 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:91:4, endln:91:17 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_assignment: , line:91:4, endln:91:40 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:91:4, endln:91:40 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:91:12, endln:91:14 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:91:12, endln:91:14 |vpiParent: - \_begin: (work@oh_fifo_sync), line:89:8, endln:92:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:91:4, endln:91:17 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:91:15, endln:91:16 |vpiDecompile:0 @@ -33046,24 +32791,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:95:24, endln:95:43 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_assignment: , line:95:4, endln:95:43 |vpiOpType:24 |vpiOperand: - \_part_select: , line:95:24, endln:95:37 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:95:24, endln:95:37 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr), line:95:24, endln:95:31 - |vpiParent: - \_operation: , line:95:24, endln:95:43 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_operation: , line:95:24, endln:95:43 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:95:32, endln:95:34 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:95:32, endln:95:34 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:95:24, endln:95:37 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:95:35, endln:95:36 |vpiDecompile:0 @@ -33079,21 +32822,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:95:4, endln:95:17 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:95:4, endln:95:17 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_assignment: , line:95:4, endln:95:43 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_assignment: , line:95:4, endln:95:43 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:95:12, endln:95:14 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:95:12, endln:95:14 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:95:4, endln:95:17 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiRightRange: \_constant: , line:95:15, endln:95:16 |vpiDecompile:0 @@ -33108,29 +32849,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:96:24, endln:96:46 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_assignment: , line:96:4, endln:96:46 |vpiOpType:24 |vpiOperand: - \_part_select: , line:96:24, endln:96:40 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:96:24, endln:96:40 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count), line:96:24, endln:96:32 - |vpiParent: - \_operation: , line:96:24, endln:96:46 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_operation: , line:96:24, endln:96:46 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:96:33, endln:96:37 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:96:24, endln:96:40 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:96:33, endln:96:35 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:96:33, endln:96:35 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_operation: , line:96:33, endln:96:37 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:96:36, endln:96:37 |vpiParent: @@ -33154,26 +32893,24 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:96:4, endln:96:20 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:96:4, endln:96:20 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count) - |vpiParent: - \_assignment: , line:96:4, endln:96:46 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_assignment: , line:96:4, endln:96:46 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:96:13, endln:96:17 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:96:4, endln:96:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:96:13, endln:96:15 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:96:13, endln:96:15 |vpiParent: - \_begin: (work@oh_fifo_sync), line:94:8, endln:97:11 + \_operation: , line:96:13, endln:96:17 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:96:16, endln:96:17 |vpiParent: @@ -33211,24 +32948,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:100:31, endln:100:50 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_assignment: , line:100:11, endln:100:50 |vpiOpType:24 |vpiOperand: - \_part_select: , line:100:31, endln:100:44 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:100:31, endln:100:44 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr), line:100:31, endln:100:38 - |vpiParent: - \_operation: , line:100:31, endln:100:50 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_operation: , line:100:31, endln:100:50 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:100:39, endln:100:41 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:100:39, endln:100:41 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:100:31, endln:100:44 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:100:42, endln:100:43 |vpiDecompile:0 @@ -33244,21 +32979,19 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:100:11, endln:100:24 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:100:11, endln:100:24 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_assignment: , line:100:11, endln:100:50 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_assignment: , line:100:11, endln:100:50 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: - \_ref_obj: (work@oh_fifo_sync.AW), line:100:19, endln:100:21 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:100:19, endln:100:21 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:100:11, endln:100:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiRightRange: \_constant: , line:100:22, endln:100:23 |vpiDecompile:0 @@ -33273,29 +33006,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:101:31, endln:101:53 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_assignment: , line:101:11, endln:101:53 |vpiOpType:11 |vpiOperand: - \_part_select: , line:101:31, endln:101:47 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:101:31, endln:101:47 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count), line:101:31, endln:101:39 - |vpiParent: - \_operation: , line:101:31, endln:101:53 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_operation: , line:101:31, endln:101:53 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:101:40, endln:101:44 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:101:31, endln:101:47 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:101:40, endln:101:42 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:101:40, endln:101:42 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_operation: , line:101:40, endln:101:44 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:101:43, endln:101:44 |vpiParent: @@ -33319,26 +33050,24 @@ design: (work@oh_fifo_async) |DEC:1 |vpiConstType:1 |vpiLhs: - \_part_select: , line:101:11, endln:101:27 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:101:11, endln:101:27 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count) - |vpiParent: - \_assignment: , line:101:11, endln:101:53 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_assignment: , line:101:11, endln:101:53 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:101:20, endln:101:24 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:101:11, endln:101:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:101:20, endln:101:22 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:101:20, endln:101:22 |vpiParent: - \_begin: (work@oh_fifo_sync), line:99:8, endln:102:11 + \_operation: , line:101:20, endln:101:24 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:101:23, endln:101:24 |vpiParent: @@ -33381,13 +33110,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_fifo_sync.fifo_empty), line:106:19, endln:106:29 |vpiParent: - \_event_control: , line:105:11, endln:105:26 + \_assignment: , line:106:6, endln:106:29 |vpiName:fifo_empty |vpiFullName:work@oh_fifo_sync.fifo_empty |vpiLhs: \_ref_obj: (work@oh_fifo_sync.empty_reg), line:106:6, endln:106:15 |vpiParent: - \_event_control: , line:105:11, endln:105:26 + \_assignment: , line:106:6, endln:106:29 |vpiName:empty_reg |vpiFullName:work@oh_fifo_sync.empty_reg |vpiAlwaysType:1 @@ -33465,23 +33194,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:70:11, endln:70:55 |vpiOpType:14 |vpiOperand: - \_part_select: , line:70:26, endln:70:42 + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:70:26, endln:70:42 |vpiParent: - \_ref_obj: wr_count (work@oh_fifo_sync.wr_count), line:70:26, endln:70:34 - |vpiParent: - \_operation: , line:70:26, endln:70:54 - |vpiName:wr_count - |vpiFullName:work@oh_fifo_sync.wr_count - |vpiDefName:wr_count + \_operation: , line:70:26, endln:70:54 + |vpiName:wr_count + |vpiFullName:work@oh_fifo_sync.wr_count + |vpiDefName:wr_count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:70:35, endln:70:39 + |vpiParent: + \_part_select: wr_count (work@oh_fifo_sync.wr_count), line:70:26, endln:70:42 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:70:35, endln:70:37 + \_ref_obj: (work@oh_fifo_sync.wr_count.AW), line:70:35, endln:70:37 |vpiParent: \_operation: , line:70:35, endln:70:39 |vpiName:AW + |vpiFullName:work@oh_fifo_sync.wr_count.AW |vpiOperand: \_constant: , line:70:38, endln:70:39 |vpiParent: @@ -33518,23 +33248,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:71:11, endln:71:61 |vpiOpType:14 |vpiOperand: - \_part_select: , line:71:26, endln:71:41 + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:71:26, endln:71:41 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_sync.wr_addr), line:71:26, endln:71:33 - |vpiParent: - \_operation: , line:71:26, endln:71:60 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr - |vpiDefName:wr_addr + \_operation: , line:71:26, endln:71:60 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_sync.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:71:34, endln:71:38 + |vpiParent: + \_part_select: wr_addr (work@oh_fifo_sync.wr_addr), line:71:26, endln:71:41 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:71:34, endln:71:36 + \_ref_obj: (work@oh_fifo_sync.wr_addr.AW), line:71:34, endln:71:36 |vpiParent: \_operation: , line:71:34, endln:71:38 |vpiName:AW + |vpiFullName:work@oh_fifo_sync.wr_addr.AW |vpiOperand: \_constant: , line:71:37, endln:71:38 |vpiParent: @@ -33550,26 +33281,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:71:45, endln:71:60 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:71:45, endln:71:60 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_sync.rd_addr), line:71:45, endln:71:52 - |vpiParent: - \_operation: , line:71:26, endln:71:60 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr - |vpiDefName:rd_addr + \_operation: , line:71:26, endln:71:60 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_sync.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:71:53, endln:71:57 |vpiParent: - \_operation: , line:71:26, endln:71:60 + \_part_select: rd_addr (work@oh_fifo_sync.rd_addr), line:71:45, endln:71:60 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_fifo_sync.AW), line:71:53, endln:71:55 + \_ref_obj: (work@oh_fifo_sync.rd_addr.AW), line:71:53, endln:71:55 |vpiParent: - \_operation: , line:71:26, endln:71:60 + \_operation: , line:71:53, endln:71:57 |vpiName:AW - |vpiFullName:work@oh_fifo_sync.AW + |vpiFullName:work@oh_fifo_sync.rd_addr.AW |vpiOperand: \_constant: , line:71:56, endln:71:57 |vpiParent: @@ -33613,17 +33342,13 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_sync.wr_addr), line:72:38, endln:72:49 |vpiParent: - \_ref_obj: (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_operation: , line:72:38, endln:72:63 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr + \_operation: , line:72:38, endln:72:63 |vpiName:wr_addr |vpiFullName:work@oh_fifo_sync.wr_addr |vpiIndex: \_ref_obj: (work@oh_fifo_sync.AW), line:72:46, endln:72:48 |vpiParent: - \_operation: , line:72:25, endln:72:64 + \_bit_select: (work@oh_fifo_sync.wr_addr), line:72:38, endln:72:49 |vpiName:AW |vpiFullName:work@oh_fifo_sync.AW |vpiOperand: @@ -33634,17 +33359,13 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_sync.rd_addr), line:72:52, endln:72:63 |vpiParent: - \_ref_obj: (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_operation: , line:72:51, endln:72:63 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr + \_operation: , line:72:51, endln:72:63 |vpiName:rd_addr |vpiFullName:work@oh_fifo_sync.rd_addr |vpiIndex: \_ref_obj: (work@oh_fifo_sync.AW), line:72:60, endln:72:62 |vpiParent: - \_operation: , line:72:51, endln:72:63 + \_bit_select: (work@oh_fifo_sync.rd_addr), line:72:52, endln:72:63 |vpiName:AW |vpiFullName:work@oh_fifo_sync.AW |vpiLhs: @@ -33676,33 +33397,25 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_sync.wr_addr), line:73:38, endln:73:49 |vpiParent: - \_ref_obj: (work@oh_fifo_sync.wr_addr) - |vpiParent: - \_operation: , line:73:38, endln:73:62 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_sync.wr_addr + \_operation: , line:73:38, endln:73:62 |vpiName:wr_addr |vpiFullName:work@oh_fifo_sync.wr_addr |vpiIndex: \_ref_obj: (work@oh_fifo_sync.AW), line:73:46, endln:73:48 |vpiParent: - \_operation: , line:73:25, endln:73:63 + \_bit_select: (work@oh_fifo_sync.wr_addr), line:73:38, endln:73:49 |vpiName:AW |vpiFullName:work@oh_fifo_sync.AW |vpiOperand: \_bit_select: (work@oh_fifo_sync.rd_addr), line:73:51, endln:73:62 |vpiParent: - \_ref_obj: (work@oh_fifo_sync.rd_addr) - |vpiParent: - \_operation: , line:73:38, endln:73:62 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_sync.rd_addr + \_operation: , line:73:38, endln:73:62 |vpiName:rd_addr |vpiFullName:work@oh_fifo_sync.rd_addr |vpiIndex: \_ref_obj: (work@oh_fifo_sync.AW), line:73:59, endln:73:61 |vpiParent: - \_operation: , line:73:38, endln:73:62 + \_bit_select: (work@oh_fifo_sync.rd_addr), line:73:51, endln:73:62 |vpiName:AW |vpiFullName:work@oh_fifo_sync.AW |vpiLhs: @@ -33791,20 +33504,21 @@ design: (work@oh_fifo_async) \_port: (rd_dout), line:123:3, endln:123:29 |vpiName:rd_dout |vpiHighConn: - \_part_select: , line:123:14, endln:123:28 - |vpiParent: - \_ref_obj: rd_dout (rd_dout), line:123:14, endln:123:21 - |vpiName:rd_dout - |vpiDefName:rd_dout + \_part_select: rd_dout (rd_dout), line:123:14, endln:123:28 + |vpiName:rd_dout + |vpiDefName:rd_dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:123:22, endln:123:25 + |vpiParent: + \_part_select: rd_dout (rd_dout), line:123:14, endln:123:28 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:123:22, endln:123:23 + \_ref_obj: (rd_dout.N), line:123:22, endln:123:23 |vpiParent: \_operation: , line:123:22, endln:123:25 |vpiName:N + |vpiFullName:rd_dout.N |vpiOperand: \_constant: , line:123:24, endln:123:25 |vpiParent: @@ -33835,20 +33549,21 @@ design: (work@oh_fifo_async) \_port: (wr_addr), line:127:3, endln:127:30 |vpiName:wr_addr |vpiHighConn: - \_part_select: , line:127:14, endln:127:29 - |vpiParent: - \_ref_obj: wr_addr (wr_addr), line:127:14, endln:127:21 - |vpiName:wr_addr - |vpiDefName:wr_addr + \_part_select: wr_addr (wr_addr), line:127:14, endln:127:29 + |vpiName:wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:127:22, endln:127:26 + |vpiParent: + \_part_select: wr_addr (wr_addr), line:127:14, endln:127:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:127:22, endln:127:24 + \_ref_obj: (wr_addr.AW), line:127:22, endln:127:24 |vpiParent: \_operation: , line:127:22, endln:127:26 |vpiName:AW + |vpiFullName:wr_addr.AW |vpiOperand: \_constant: , line:127:25, endln:127:26 |vpiParent: @@ -33867,20 +33582,21 @@ design: (work@oh_fifo_async) \_port: (wr_din), line:128:3, endln:128:28 |vpiName:wr_din |vpiHighConn: - \_part_select: , line:128:14, endln:128:27 - |vpiParent: - \_ref_obj: wr_din (wr_din), line:128:14, endln:128:20 - |vpiName:wr_din - |vpiDefName:wr_din + \_part_select: wr_din (wr_din), line:128:14, endln:128:27 + |vpiName:wr_din + |vpiDefName:wr_din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:128:21, endln:128:24 + |vpiParent: + \_part_select: wr_din (wr_din), line:128:14, endln:128:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:128:21, endln:128:22 + \_ref_obj: (wr_din.N), line:128:21, endln:128:22 |vpiParent: \_operation: , line:128:21, endln:128:24 |vpiName:N + |vpiFullName:wr_din.N |vpiOperand: \_constant: , line:128:23, endln:128:24 |vpiParent: @@ -33911,20 +33627,21 @@ design: (work@oh_fifo_async) \_port: (rd_addr), line:131:3, endln:131:30 |vpiName:rd_addr |vpiHighConn: - \_part_select: , line:131:14, endln:131:29 - |vpiParent: - \_ref_obj: rd_addr (rd_addr), line:131:14, endln:131:21 - |vpiName:rd_addr - |vpiDefName:rd_addr + \_part_select: rd_addr (rd_addr), line:131:14, endln:131:29 + |vpiName:rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:131:22, endln:131:26 + |vpiParent: + \_part_select: rd_addr (rd_addr), line:131:14, endln:131:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:131:22, endln:131:24 + \_ref_obj: (rd_addr.AW), line:131:22, endln:131:24 |vpiParent: \_operation: , line:131:22, endln:131:26 |vpiName:AW + |vpiFullName:rd_addr.AW |vpiOperand: \_constant: , line:131:25, endln:131:26 |vpiParent: @@ -33955,20 +33672,21 @@ design: (work@oh_fifo_async) \_port: (bist_wem), line:134:3, endln:134:31 |vpiName:bist_wem |vpiHighConn: - \_part_select: , line:134:15, endln:134:30 - |vpiParent: - \_ref_obj: bist_wem (bist_wem), line:134:15, endln:134:23 - |vpiName:bist_wem - |vpiDefName:bist_wem + \_part_select: bist_wem (bist_wem), line:134:15, endln:134:30 + |vpiName:bist_wem + |vpiDefName:bist_wem |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:134:24, endln:134:27 + |vpiParent: + \_part_select: bist_wem (bist_wem), line:134:15, endln:134:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:134:24, endln:134:25 + \_ref_obj: (bist_wem.N), line:134:24, endln:134:25 |vpiParent: \_operation: , line:134:24, endln:134:27 |vpiName:N + |vpiFullName:bist_wem.N |vpiOperand: \_constant: , line:134:26, endln:134:27 |vpiParent: @@ -33987,20 +33705,21 @@ design: (work@oh_fifo_async) \_port: (bist_addr), line:135:3, endln:135:34 |vpiName:bist_addr |vpiHighConn: - \_part_select: , line:135:16, endln:135:33 - |vpiParent: - \_ref_obj: bist_addr (bist_addr), line:135:16, endln:135:25 - |vpiName:bist_addr - |vpiDefName:bist_addr + \_part_select: bist_addr (bist_addr), line:135:16, endln:135:33 + |vpiName:bist_addr + |vpiDefName:bist_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:135:26, endln:135:30 + |vpiParent: + \_part_select: bist_addr (bist_addr), line:135:16, endln:135:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:135:26, endln:135:28 + \_ref_obj: (bist_addr.AW), line:135:26, endln:135:28 |vpiParent: \_operation: , line:135:26, endln:135:30 |vpiName:AW + |vpiFullName:bist_addr.AW |vpiOperand: \_constant: , line:135:29, endln:135:30 |vpiParent: @@ -34019,20 +33738,21 @@ design: (work@oh_fifo_async) \_port: (bist_din), line:136:3, endln:136:31 |vpiName:bist_din |vpiHighConn: - \_part_select: , line:136:15, endln:136:30 - |vpiParent: - \_ref_obj: bist_din (bist_din), line:136:15, endln:136:23 - |vpiName:bist_din - |vpiDefName:bist_din + \_part_select: bist_din (bist_din), line:136:15, endln:136:30 + |vpiName:bist_din + |vpiDefName:bist_din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:136:24, endln:136:27 + |vpiParent: + \_part_select: bist_din (bist_din), line:136:15, endln:136:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:136:24, endln:136:25 + \_ref_obj: (bist_din.N), line:136:24, endln:136:25 |vpiParent: \_operation: , line:136:24, endln:136:27 |vpiName:N + |vpiFullName:bist_din.N |vpiOperand: \_constant: , line:136:26, endln:136:27 |vpiParent: @@ -34075,11 +33795,9 @@ design: (work@oh_fifo_async) \_port: (memconfig), line:141:3, endln:141:31 |vpiName:memconfig |vpiHighConn: - \_part_select: , line:141:16, endln:141:30 - |vpiParent: - \_ref_obj: memconfig (memconfig), line:141:16, endln:141:25 - |vpiName:memconfig - |vpiDefName:memconfig + \_part_select: memconfig (memconfig), line:141:16, endln:141:30 + |vpiName:memconfig + |vpiDefName:memconfig |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:141:26, endln:141:27 @@ -34097,11 +33815,9 @@ design: (work@oh_fifo_async) \_port: (memrepair), line:142:3, endln:142:31 |vpiName:memrepair |vpiHighConn: - \_part_select: , line:142:16, endln:142:30 - |vpiParent: - \_ref_obj: memrepair (memrepair), line:142:16, endln:142:25 - |vpiName:memrepair - |vpiDefName:memrepair + \_part_select: memrepair (memrepair), line:142:16, endln:142:30 + |vpiName:memrepair + |vpiDefName:memrepair |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:142:26, endln:142:27 @@ -34285,24 +34001,20 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_gray2bin.gray), line:24:13, endln:24:22 |vpiParent: - \_ref_obj: (work@oh_gray2bin.gray) - |vpiParent: - \_assignment: , line:24:2, endln:24:22 - |vpiName:gray - |vpiFullName:work@oh_gray2bin.gray + \_assignment: , line:24:2, endln:24:22 |vpiName:gray |vpiFullName:work@oh_gray2bin.gray |vpiIndex: \_operation: , line:24:18, endln:24:21 |vpiParent: - \_begin: (work@oh_gray2bin), line:23:6, endln:31:9 + \_bit_select: (work@oh_gray2bin.gray), line:24:13, endln:24:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_gray2bin.N), line:24:18, endln:24:19 + \_ref_obj: (work@oh_gray2bin.gray.N), line:24:18, endln:24:19 |vpiParent: - \_begin: (work@oh_gray2bin), line:23:6, endln:31:9 + \_operation: , line:24:18, endln:24:21 |vpiName:N - |vpiFullName:work@oh_gray2bin.N + |vpiFullName:work@oh_gray2bin.gray.N |vpiOperand: \_constant: , line:24:20, endln:24:21 |vpiParent: @@ -34314,24 +34026,20 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_gray2bin.bin), line:24:2, endln:24:10 |vpiParent: - \_ref_obj: (work@oh_gray2bin.bin) - |vpiParent: - \_assignment: , line:24:2, endln:24:22 - |vpiName:bin - |vpiFullName:work@oh_gray2bin.bin + \_assignment: , line:24:2, endln:24:22 |vpiName:bin |vpiFullName:work@oh_gray2bin.bin |vpiIndex: \_operation: , line:24:6, endln:24:9 |vpiParent: - \_begin: (work@oh_gray2bin), line:23:6, endln:31:9 + \_bit_select: (work@oh_gray2bin.bin), line:24:2, endln:24:10 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_gray2bin.N), line:24:6, endln:24:7 + \_ref_obj: (work@oh_gray2bin.bin.N), line:24:6, endln:24:7 |vpiParent: - \_begin: (work@oh_gray2bin), line:23:6, endln:31:9 + \_operation: , line:24:6, endln:24:9 |vpiName:N - |vpiFullName:work@oh_gray2bin.N + |vpiFullName:work@oh_gray2bin.bin.N |vpiOperand: \_constant: , line:24:8, endln:24:9 |vpiParent: @@ -34372,12 +34080,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:25:23, endln:25:26 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:25:2, endln:25:5 + \_assignment: , line:25:21, endln:25:26 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@oh_gray2bin.i), line:25:23, endln:25:24 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:25:2, endln:25:5 + \_operation: , line:25:23, endln:25:26 |vpiName:i |vpiFullName:work@oh_gray2bin.i |vpiOperand: @@ -34391,7 +34099,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_gray2bin.i), line:25:21, endln:25:22 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:25:2, endln:25:5 + \_assignment: , line:25:21, endln:25:26 |vpiName:i |vpiFullName:work@oh_gray2bin.i |vpiCondition: @@ -34413,7 +34121,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_gray2bin.N), line:25:15, endln:25:16 |vpiParent: - \_operation: , line:25:12, endln:25:19 + \_operation: , line:25:15, endln:25:18 |vpiName:N |vpiFullName:work@oh_gray2bin.N |vpiOperand: @@ -34437,8 +34145,6 @@ design: (work@oh_fifo_async) |vpiBlocking:1 |vpiRhs: \_constant: , line:27:16, endln:27:20 - |vpiParent: - \_assignment: , line:27:7, endln:27:20 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -34446,17 +34152,13 @@ design: (work@oh_fifo_async) |vpiLhs: \_bit_select: (work@oh_gray2bin.bin), line:27:7, endln:27:13 |vpiParent: - \_ref_obj: (work@oh_gray2bin.bin) - |vpiParent: - \_assignment: , line:27:7, endln:27:20 - |vpiName:bin - |vpiFullName:work@oh_gray2bin.bin + \_assignment: , line:27:7, endln:27:20 |vpiName:bin |vpiFullName:work@oh_gray2bin.bin |vpiIndex: \_ref_obj: (work@oh_gray2bin.i), line:27:11, endln:27:12 |vpiParent: - \_begin: (work@oh_gray2bin), line:26:4, endln:30:7 + \_bit_select: (work@oh_gray2bin.bin), line:27:7, endln:27:13 |vpiName:i |vpiFullName:work@oh_gray2bin.i |vpiStmt: @@ -34489,12 +34191,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:28:24, endln:28:27 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_assignment: , line:28:22, endln:28:27 |vpiOpType:24 |vpiOperand: \_ref_obj: (work@oh_gray2bin.j), line:28:24, endln:28:25 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_operation: , line:28:24, endln:28:27 |vpiName:j |vpiFullName:work@oh_gray2bin.j |vpiOperand: @@ -34508,7 +34210,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_gray2bin.j), line:28:22, endln:28:23 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_assignment: , line:28:22, endln:28:27 |vpiName:j |vpiFullName:work@oh_gray2bin.j |vpiCondition: @@ -34537,54 +34239,42 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:29:18, endln:29:35 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_assignment: , line:29:9, endln:29:35 |vpiOpType:30 |vpiOperand: \_bit_select: (work@oh_gray2bin.bin), line:29:18, endln:29:24 |vpiParent: - \_ref_obj: (work@oh_gray2bin.bin) - |vpiParent: - \_operation: , line:29:18, endln:29:35 - |vpiName:bin - |vpiFullName:work@oh_gray2bin.bin + \_operation: , line:29:18, endln:29:35 |vpiName:bin |vpiFullName:work@oh_gray2bin.bin |vpiIndex: \_ref_obj: (work@oh_gray2bin.i), line:29:22, endln:29:23 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_bit_select: (work@oh_gray2bin.bin), line:29:18, endln:29:24 |vpiName:i |vpiFullName:work@oh_gray2bin.i |vpiOperand: \_bit_select: (work@oh_gray2bin.gray), line:29:27, endln:29:35 |vpiParent: - \_ref_obj: (work@oh_gray2bin.gray) - |vpiParent: - \_operation: , line:29:18, endln:29:35 - |vpiName:gray - |vpiFullName:work@oh_gray2bin.gray + \_operation: , line:29:18, endln:29:35 |vpiName:gray |vpiFullName:work@oh_gray2bin.gray |vpiIndex: \_ref_obj: (work@oh_gray2bin.j), line:29:33, endln:29:34 |vpiParent: - \_operation: , line:29:18, endln:29:35 + \_bit_select: (work@oh_gray2bin.gray), line:29:27, endln:29:35 |vpiName:j |vpiFullName:work@oh_gray2bin.j |vpiLhs: \_bit_select: (work@oh_gray2bin.bin), line:29:9, endln:29:15 |vpiParent: - \_ref_obj: (work@oh_gray2bin.bin) - |vpiParent: - \_assignment: , line:29:9, endln:29:35 - |vpiName:bin - |vpiFullName:work@oh_gray2bin.bin + \_assignment: , line:29:9, endln:29:35 |vpiName:bin |vpiFullName:work@oh_gray2bin.bin |vpiIndex: \_ref_obj: (work@oh_gray2bin.i), line:29:13, endln:29:14 |vpiParent: - \_for_stmt: (work@oh_gray2bin), line:28:7, endln:28:10 + \_bit_select: (work@oh_gray2bin.bin), line:29:9, endln:29:15 |vpiName:i |vpiFullName:work@oh_gray2bin.i |vpiAlwaysType:1 @@ -34593,23 +34283,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_gray2bin (work@oh_gray2bin), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v, line:8:1, endln:33:10 |vpiRhs: - \_part_select: , line:19:25, endln:19:34 + \_part_select: in (work@oh_gray2bin.in), line:19:25, endln:19:34 |vpiParent: - \_ref_obj: in (work@oh_gray2bin.in), line:19:25, endln:19:27 - |vpiParent: - \_cont_assign: , line:19:11, endln:19:34 - |vpiName:in - |vpiFullName:work@oh_gray2bin.in - |vpiDefName:in + \_cont_assign: , line:19:11, endln:19:34 + |vpiName:in + |vpiFullName:work@oh_gray2bin.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:19:28, endln:19:31 + |vpiParent: + \_part_select: in (work@oh_gray2bin.in), line:19:25, endln:19:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:19:28, endln:19:29 + \_ref_obj: (work@oh_gray2bin.in.N), line:19:28, endln:19:29 |vpiParent: \_operation: , line:19:28, endln:19:31 |vpiName:N + |vpiFullName:work@oh_gray2bin.in.N |vpiOperand: \_constant: , line:19:30, endln:19:31 |vpiParent: @@ -34625,23 +34316,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:19:11, endln:19:22 + \_part_select: gray (work@oh_gray2bin.gray), line:19:11, endln:19:22 |vpiParent: - \_ref_obj: gray (work@oh_gray2bin.gray) - |vpiParent: - \_cont_assign: , line:19:11, endln:19:34 - |vpiName:gray - |vpiFullName:work@oh_gray2bin.gray - |vpiDefName:gray + \_cont_assign: , line:19:11, endln:19:34 + |vpiName:gray + |vpiFullName:work@oh_gray2bin.gray + |vpiDefName:gray |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:19:16, endln:19:19 + |vpiParent: + \_part_select: gray (work@oh_gray2bin.gray), line:19:11, endln:19:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:19:16, endln:19:17 + \_ref_obj: (work@oh_gray2bin.gray.N), line:19:16, endln:19:17 |vpiParent: \_operation: , line:19:16, endln:19:19 |vpiName:N + |vpiFullName:work@oh_gray2bin.gray.N |vpiOperand: \_constant: , line:19:18, endln:19:19 |vpiParent: @@ -34661,23 +34353,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_gray2bin (work@oh_gray2bin), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v, line:8:1, endln:33:10 |vpiRhs: - \_part_select: , line:20:25, endln:20:35 + \_part_select: bin (work@oh_gray2bin.bin), line:20:25, endln:20:35 |vpiParent: - \_ref_obj: bin (work@oh_gray2bin.bin), line:20:25, endln:20:28 - |vpiParent: - \_cont_assign: , line:20:11, endln:20:35 - |vpiName:bin - |vpiFullName:work@oh_gray2bin.bin - |vpiDefName:bin + \_cont_assign: , line:20:11, endln:20:35 + |vpiName:bin + |vpiFullName:work@oh_gray2bin.bin + |vpiDefName:bin |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:29, endln:20:32 + |vpiParent: + \_part_select: bin (work@oh_gray2bin.bin), line:20:25, endln:20:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:29, endln:20:30 + \_ref_obj: (work@oh_gray2bin.bin.N), line:20:29, endln:20:30 |vpiParent: \_operation: , line:20:29, endln:20:32 |vpiName:N + |vpiFullName:work@oh_gray2bin.bin.N |vpiOperand: \_constant: , line:20:31, endln:20:32 |vpiParent: @@ -34693,23 +34386,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:20:11, endln:20:21 + \_part_select: out (work@oh_gray2bin.out), line:20:11, endln:20:21 |vpiParent: - \_ref_obj: out (work@oh_gray2bin.out) - |vpiParent: - \_cont_assign: , line:20:11, endln:20:35 - |vpiName:out - |vpiFullName:work@oh_gray2bin.out - |vpiDefName:out + \_cont_assign: , line:20:11, endln:20:35 + |vpiName:out + |vpiFullName:work@oh_gray2bin.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:15, endln:20:18 + |vpiParent: + \_part_select: out (work@oh_gray2bin.out), line:20:11, endln:20:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:15, endln:20:16 + \_ref_obj: (work@oh_gray2bin.out.N), line:20:15, endln:20:16 |vpiParent: \_operation: , line:20:15, endln:20:18 |vpiName:N + |vpiFullName:work@oh_gray2bin.out.N |vpiOperand: \_constant: , line:20:17, endln:20:18 |vpiParent: @@ -35250,12 +34944,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (en0), line:33:20, endln:33:23 |vpiParent: - \_event_control: , line:32:10, endln:32:25 + \_assignment: , line:33:5, endln:33:23 |vpiName:en0 |vpiLhs: \_ref_obj: (en0_negedge), line:33:5, endln:33:16 |vpiParent: - \_event_control: , line:32:10, endln:32:25 + \_assignment: , line:33:5, endln:33:23 |vpiName:en0_negedge |vpiAlwaysType:1 |vpiStmt: @@ -35289,24 +34983,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:40:5, endln:41:33 |vpiOpType:82 |vpiRhs: - \_part_select: , line:41:23, endln:41:32 + \_part_select: in (in), line:41:23, endln:41:32 |vpiParent: - \_ref_obj: in (in), line:41:23, endln:41:25 - |vpiParent: - \_assignment: , line:41:7, endln:41:32 - |vpiName:in - |vpiDefName:in + \_assignment: , line:41:7, endln:41:32 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:26, endln:41:29 |vpiParent: - \_if_stmt: , line:40:5, endln:41:33 + \_part_select: in (in), line:41:23, endln:41:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:41:26, endln:41:27 + \_ref_obj: (in.N), line:41:26, endln:41:27 |vpiParent: - \_if_stmt: , line:40:5, endln:41:33 + \_operation: , line:41:26, endln:41:29 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:41:28, endln:41:29 |vpiParent: @@ -35322,24 +35015,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:41:7, endln:41:19 + \_part_select: in_sl (in_sl), line:41:7, endln:41:19 |vpiParent: - \_ref_obj: in_sl (in_sl) - |vpiParent: - \_assignment: , line:41:7, endln:41:32 - |vpiName:in_sl - |vpiDefName:in_sl + \_assignment: , line:41:7, endln:41:32 + |vpiName:in_sl + |vpiDefName:in_sl |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:13, endln:41:16 |vpiParent: - \_if_stmt: , line:40:5, endln:41:33 + \_part_select: in_sl (in_sl), line:41:7, endln:41:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:41:13, endln:41:14 + \_ref_obj: (in_sl.N), line:41:13, endln:41:14 |vpiParent: - \_if_stmt: , line:40:5, endln:41:33 + \_operation: , line:41:13, endln:41:16 |vpiName:N + |vpiFullName:in_sl.N |vpiOperand: \_constant: , line:41:15, endln:41:16 |vpiParent: @@ -35386,24 +35078,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:43:5, endln:44:33 |vpiOpType:82 |vpiRhs: - \_part_select: , line:44:23, endln:44:32 + \_part_select: in (in), line:44:23, endln:44:32 |vpiParent: - \_ref_obj: in (in), line:44:23, endln:44:25 - |vpiParent: - \_assignment: , line:44:7, endln:44:32 - |vpiName:in - |vpiDefName:in + \_assignment: , line:44:7, endln:44:32 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:44:26, endln:44:29 |vpiParent: - \_if_stmt: , line:43:5, endln:44:33 + \_part_select: in (in), line:44:23, endln:44:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:44:26, endln:44:27 + \_ref_obj: (in.N), line:44:26, endln:44:27 |vpiParent: - \_if_stmt: , line:43:5, endln:44:33 + \_operation: , line:44:26, endln:44:29 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:44:28, endln:44:29 |vpiParent: @@ -35419,24 +35110,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:44:7, endln:44:19 + \_part_select: in_sh (in_sh), line:44:7, endln:44:19 |vpiParent: - \_ref_obj: in_sh (in_sh) - |vpiParent: - \_assignment: , line:44:7, endln:44:32 - |vpiName:in_sh - |vpiDefName:in_sh + \_assignment: , line:44:7, endln:44:32 + |vpiName:in_sh + |vpiDefName:in_sh |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:44:13, endln:44:16 |vpiParent: - \_if_stmt: , line:43:5, endln:44:33 + \_part_select: in_sh (in_sh), line:44:7, endln:44:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:44:13, endln:44:14 + \_ref_obj: (in_sh.N), line:44:13, endln:44:14 |vpiParent: - \_if_stmt: , line:43:5, endln:44:33 + \_operation: , line:44:13, endln:44:16 |vpiName:N + |vpiFullName:in_sh.N |vpiOperand: \_constant: , line:44:15, endln:44:16 |vpiParent: @@ -35485,27 +35175,26 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:51:23, endln:52:23 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_assignment: , line:51:7, endln:52:23 |vpiOpType:33 |vpiOperand: - \_part_select: , line:51:24, endln:51:36 + \_part_select: in_sh (in_sh), line:51:24, endln:51:36 |vpiParent: - \_ref_obj: in_sh (in_sh), line:51:24, endln:51:29 - |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 - |vpiName:in_sh - |vpiDefName:in_sh + \_assignment: , line:51:7, endln:52:23 + |vpiName:in_sh + |vpiDefName:in_sh |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:51:30, endln:51:33 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_part_select: in_sh (in_sh), line:51:24, endln:51:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:51:30, endln:51:31 + \_ref_obj: (in_sh.N), line:51:30, endln:51:31 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_operation: , line:51:30, endln:51:33 |vpiName:N + |vpiFullName:in_sh.N |vpiOperand: \_constant: , line:51:32, endln:51:33 |vpiParent: @@ -35521,24 +35210,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:52:10, endln:52:22 + \_part_select: in_sl (in_sl), line:52:10, endln:52:22 |vpiParent: - \_ref_obj: in_sl (in_sl), line:52:10, endln:52:15 - |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 - |vpiName:in_sl - |vpiDefName:in_sl + \_assignment: , line:51:7, endln:52:23 + |vpiName:in_sl + |vpiDefName:in_sl |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:52:16, endln:52:19 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_part_select: in_sl (in_sl), line:52:10, endln:52:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:52:16, endln:52:17 + \_ref_obj: (in_sl.N), line:52:16, endln:52:17 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_operation: , line:52:16, endln:52:19 |vpiName:N + |vpiFullName:in_sl.N |vpiOperand: \_constant: , line:52:18, endln:52:19 |vpiParent: @@ -35554,23 +35242,21 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:51:7, endln:51:19 + \_part_select: out (out), line:51:7, endln:51:19 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_assignment: , line:51:7, endln:52:23 - |vpiName:out - |vpiDefName:out + \_assignment: , line:51:7, endln:52:23 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:51:11, endln:51:16 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_part_select: out (out), line:51:7, endln:51:19 |vpiOpType:11 |vpiOperand: \_operation: , line:51:11, endln:51:14 |vpiParent: - \_if_stmt: , line:50:5, endln:52:24 + \_operation: , line:51:11, endln:51:16 |vpiOpType:25 |vpiOperand: \_constant: , line:51:11, endln:51:12 @@ -35581,10 +35267,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:51:13, endln:51:14 + \_ref_obj: (out.N), line:51:13, endln:51:14 |vpiParent: \_operation: , line:51:11, endln:51:14 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:51:15, endln:51:16 |vpiParent: @@ -35983,24 +35670,23 @@ design: (work@oh_fifo_async) \_ref_obj: (iso), line:20:28, endln:20:31 |vpiName:iso |vpiOperand: - \_part_select: , line:20:36, endln:20:45 + \_part_select: in (in), line:20:36, endln:20:45 |vpiParent: - \_ref_obj: in (in), line:20:36, endln:20:38 - |vpiParent: - \_operation: , line:20:23, endln:20:45 - |vpiName:in - |vpiDefName:in + \_operation: , line:20:23, endln:20:45 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:39, endln:20:42 |vpiParent: - \_operation: , line:20:23, endln:20:45 + \_part_select: in (in), line:20:36, endln:20:45 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:39, endln:20:40 + \_ref_obj: (in.N), line:20:39, endln:20:40 |vpiParent: - \_operation: , line:20:23, endln:20:45 + \_operation: , line:20:39, endln:20:42 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:20:41, endln:20:42 |vpiParent: @@ -36016,22 +35702,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:20:10, endln:20:20 + \_part_select: out (out), line:20:10, endln:20:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:20:10, endln:20:45 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:20:10, endln:20:45 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:14, endln:20:17 + |vpiParent: + \_part_select: out (out), line:20:10, endln:20:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:14, endln:20:15 + \_ref_obj: (out.N), line:20:14, endln:20:15 |vpiParent: \_operation: , line:20:14, endln:20:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:20:16, endln:20:17 |vpiParent: @@ -36291,24 +35978,23 @@ design: (work@oh_fifo_async) \_operation: , line:21:28, endln:21:32 |vpiName:iso |vpiOperand: - \_part_select: , line:21:37, endln:21:46 + \_part_select: in (in), line:21:37, endln:21:46 |vpiParent: - \_ref_obj: in (in), line:21:37, endln:21:39 - |vpiParent: - \_operation: , line:21:23, endln:21:46 - |vpiName:in - |vpiDefName:in + \_operation: , line:21:23, endln:21:46 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:40, endln:21:43 |vpiParent: - \_operation: , line:21:23, endln:21:46 + \_part_select: in (in), line:21:37, endln:21:46 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:40, endln:21:41 + \_ref_obj: (in.N), line:21:40, endln:21:41 |vpiParent: - \_operation: , line:21:23, endln:21:46 + \_operation: , line:21:40, endln:21:43 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:21:42, endln:21:43 |vpiParent: @@ -36324,22 +36010,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:21:10, endln:21:20 + \_part_select: out (out), line:21:10, endln:21:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:21:10, endln:21:46 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:21:10, endln:21:46 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:14, endln:21:17 + |vpiParent: + \_part_select: out (out), line:21:10, endln:21:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:14, endln:21:15 + \_ref_obj: (out.N), line:21:14, endln:21:15 |vpiParent: \_operation: , line:21:14, endln:21:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:21:16, endln:21:17 |vpiParent: @@ -36642,24 +36329,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:22:5, endln:23:35 |vpiOpType:82 |vpiRhs: - \_part_select: , line:23:25, endln:23:34 + \_part_select: in (in), line:23:25, endln:23:34 |vpiParent: - \_ref_obj: in (in), line:23:25, endln:23:27 - |vpiParent: - \_assignment: , line:23:7, endln:23:34 - |vpiName:in - |vpiDefName:in + \_assignment: , line:23:7, endln:23:34 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:28, endln:23:31 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_part_select: in (in), line:23:25, endln:23:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:28, endln:23:29 + \_ref_obj: (in.N), line:23:28, endln:23:29 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_operation: , line:23:28, endln:23:31 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:23:30, endln:23:31 |vpiParent: @@ -36675,24 +36361,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:23:7, endln:23:21 + \_part_select: out_reg (out_reg), line:23:7, endln:23:21 |vpiParent: - \_ref_obj: out_reg (out_reg) - |vpiParent: - \_assignment: , line:23:7, endln:23:34 - |vpiName:out_reg - |vpiDefName:out_reg + \_assignment: , line:23:7, endln:23:34 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:15, endln:23:18 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_part_select: out_reg (out_reg), line:23:7, endln:23:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:15, endln:23:16 + \_ref_obj: (out_reg.N), line:23:15, endln:23:16 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_operation: , line:23:15, endln:23:18 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:23:17, endln:23:18 |vpiParent: @@ -36711,22 +36396,23 @@ design: (work@oh_fifo_async) |vpiStmt: \_cont_assign: , line:24:10, endln:24:37 |vpiRhs: - \_part_select: , line:24:23, endln:24:37 + \_part_select: out_reg (out_reg), line:24:23, endln:24:37 |vpiParent: - \_ref_obj: out_reg (out_reg), line:24:23, endln:24:30 - |vpiParent: - \_cont_assign: , line:24:10, endln:24:37 - |vpiName:out_reg - |vpiDefName:out_reg + \_cont_assign: , line:24:10, endln:24:37 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:31, endln:24:34 + |vpiParent: + \_part_select: out_reg (out_reg), line:24:23, endln:24:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:31, endln:24:32 + \_ref_obj: (out_reg.N), line:24:31, endln:24:32 |vpiParent: \_operation: , line:24:31, endln:24:34 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:24:33, endln:24:34 |vpiParent: @@ -36742,22 +36428,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:24:10, endln:24:20 + \_part_select: out (out), line:24:10, endln:24:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:24:10, endln:24:37 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:24:10, endln:24:37 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:14, endln:24:17 + |vpiParent: + \_part_select: out (out), line:24:10, endln:24:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:14, endln:24:15 + \_ref_obj: (out.N), line:24:14, endln:24:15 |vpiParent: \_operation: , line:24:14, endln:24:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:24:16, endln:24:17 |vpiParent: @@ -37055,24 +36742,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:22:5, endln:23:35 |vpiOpType:82 |vpiRhs: - \_part_select: , line:23:25, endln:23:34 + \_part_select: in (in), line:23:25, endln:23:34 |vpiParent: - \_ref_obj: in (in), line:23:25, endln:23:27 - |vpiParent: - \_assignment: , line:23:7, endln:23:34 - |vpiName:in - |vpiDefName:in + \_assignment: , line:23:7, endln:23:34 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:28, endln:23:31 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_part_select: in (in), line:23:25, endln:23:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:28, endln:23:29 + \_ref_obj: (in.N), line:23:28, endln:23:29 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_operation: , line:23:28, endln:23:31 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:23:30, endln:23:31 |vpiParent: @@ -37088,24 +36774,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:23:7, endln:23:21 + \_part_select: out_reg (out_reg), line:23:7, endln:23:21 |vpiParent: - \_ref_obj: out_reg (out_reg) - |vpiParent: - \_assignment: , line:23:7, endln:23:34 - |vpiName:out_reg - |vpiDefName:out_reg + \_assignment: , line:23:7, endln:23:34 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:15, endln:23:18 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_part_select: out_reg (out_reg), line:23:7, endln:23:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:15, endln:23:16 + \_ref_obj: (out_reg.N), line:23:15, endln:23:16 |vpiParent: - \_if_stmt: , line:22:5, endln:23:35 + \_operation: , line:23:15, endln:23:18 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:23:17, endln:23:18 |vpiParent: @@ -37124,22 +36809,23 @@ design: (work@oh_fifo_async) |vpiStmt: \_cont_assign: , line:25:10, endln:25:37 |vpiRhs: - \_part_select: , line:25:23, endln:25:37 + \_part_select: out_reg (out_reg), line:25:23, endln:25:37 |vpiParent: - \_ref_obj: out_reg (out_reg), line:25:23, endln:25:30 - |vpiParent: - \_cont_assign: , line:25:10, endln:25:37 - |vpiName:out_reg - |vpiDefName:out_reg + \_cont_assign: , line:25:10, endln:25:37 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:31, endln:25:34 + |vpiParent: + \_part_select: out_reg (out_reg), line:25:23, endln:25:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:31, endln:25:32 + \_ref_obj: (out_reg.N), line:25:31, endln:25:32 |vpiParent: \_operation: , line:25:31, endln:25:34 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:25:33, endln:25:34 |vpiParent: @@ -37155,22 +36841,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:25:10, endln:25:20 + \_part_select: out (out), line:25:10, endln:25:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:25:10, endln:25:37 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:25:10, endln:25:37 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:14, endln:25:17 + |vpiParent: + \_part_select: out (out), line:25:10, endln:25:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:14, endln:25:15 + \_ref_obj: (out.N), line:25:14, endln:25:15 |vpiParent: \_operation: , line:25:14, endln:25:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:25:16, endln:25:17 |vpiParent: @@ -37383,13 +37070,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_latnq.d), line:17:13, endln:17:14 |vpiParent: - \_if_stmt: , line:16:6, endln:17:15 + \_assignment: , line:17:8, endln:17:14 |vpiName:d |vpiFullName:work@oh_latnq.d |vpiLhs: \_ref_obj: (work@oh_latnq.q), line:17:8, endln:17:9 |vpiParent: - \_if_stmt: , line:16:6, endln:17:15 + \_assignment: , line:17:8, endln:17:14 |vpiName:q |vpiFullName:work@oh_latnq.q |vpiAlwaysType:4 @@ -37584,13 +37271,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_latq.d), line:17:13, endln:17:14 |vpiParent: - \_if_stmt: , line:16:6, endln:17:15 + \_assignment: , line:17:8, endln:17:14 |vpiName:d |vpiFullName:work@oh_latq.d |vpiLhs: \_ref_obj: (work@oh_latq.q), line:17:8, endln:17:9 |vpiParent: - \_if_stmt: , line:16:6, endln:17:15 + \_assignment: , line:17:8, endln:17:14 |vpiName:q |vpiFullName:work@oh_latq.q |vpiAlwaysType:4 @@ -38534,12 +38221,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:54:20, endln:54:23 |vpiParent: - \_for_stmt: , line:54:5, endln:54:8 + \_assignment: , line:54:18, endln:54:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (i), line:54:20, endln:54:21 |vpiParent: - \_for_stmt: , line:54:5, endln:54:8 + \_operation: , line:54:20, endln:54:23 |vpiName:i |vpiOperand: \_constant: , line:54:22, endln:54:23 @@ -38552,7 +38239,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (i), line:54:18, endln:54:19 |vpiParent: - \_for_stmt: , line:54:5, endln:54:8 + \_assignment: , line:54:18, endln:54:23 |vpiName:i |vpiCondition: \_operation: , line:54:14, endln:54:17 @@ -38581,20 +38268,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (wr_en), line:55:11, endln:55:16 |vpiParent: - \_for_stmt: , line:54:5, endln:54:8 + \_operation: , line:55:11, endln:55:28 |vpiName:wr_en |vpiOperand: \_bit_select: (wr_wem), line:55:19, endln:55:28 |vpiParent: - \_ref_obj: (wr_wem) - |vpiParent: - \_operation: , line:55:11, endln:55:28 - |vpiName:wr_wem + \_operation: , line:55:11, endln:55:28 |vpiName:wr_wem |vpiIndex: \_ref_obj: (i), line:55:26, endln:55:27 |vpiParent: - \_operation: , line:55:11, endln:55:28 + \_bit_select: (wr_wem), line:55:19, endln:55:28 |vpiName:i |vpiStmt: \_assignment: , line:56:16, endln:56:51 @@ -38605,15 +38289,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (wr_din), line:56:42, endln:56:51 |vpiParent: - \_ref_obj: (wr_din) - |vpiParent: - \_assignment: , line:56:16, endln:56:51 - |vpiName:wr_din + \_assignment: , line:56:16, endln:56:51 |vpiName:wr_din |vpiIndex: \_ref_obj: (i), line:56:49, endln:56:50 |vpiParent: - \_if_stmt: , line:55:7, endln:56:52 + \_bit_select: (wr_din), line:56:42, endln:56:51 |vpiName:i |vpiLhs: \_var_select: (ram), line:56:16, endln:56:39 @@ -38621,24 +38302,24 @@ design: (work@oh_fifo_async) \_assignment: , line:56:16, endln:56:51 |vpiName:ram |vpiIndex: - \_part_select: , line:56:20, endln:56:35 + \_part_select: wr_addr (ram.wr_addr), line:56:20, endln:56:35 |vpiParent: - \_ref_obj: wr_addr (wr_addr), line:56:20, endln:56:27 - |vpiParent: - \_if_stmt: , line:55:7, endln:56:52 - |vpiName:wr_addr - |vpiDefName:wr_addr + \_var_select: (ram), line:56:16, endln:56:39 + |vpiName:wr_addr + |vpiFullName:ram.wr_addr + |vpiDefName:wr_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:28, endln:56:32 |vpiParent: - \_if_stmt: , line:55:7, endln:56:52 + \_part_select: wr_addr (ram.wr_addr), line:56:20, endln:56:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:56:28, endln:56:30 + \_ref_obj: (ram.wr_addr.AW), line:56:28, endln:56:30 |vpiParent: - \_if_stmt: , line:55:7, endln:56:52 + \_operation: , line:56:28, endln:56:32 |vpiName:AW + |vpiFullName:ram.wr_addr.AW |vpiOperand: \_constant: , line:56:31, endln:56:32 |vpiParent: @@ -38654,36 +38335,38 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:56:37, endln:56:38 + \_ref_obj: (ram.i), line:56:37, endln:56:38 |vpiParent: - \_if_stmt: , line:55:7, endln:56:52 + \_var_select: (ram), line:56:16, endln:56:39 |vpiName:i + |vpiFullName:ram.i |vpiAlwaysType:1 |vpiStmt: \_cont_assign: , line:59:10, endln:59:45 |vpiRhs: \_bit_select: (ram), line:59:25, endln:59:45 |vpiParent: - \_ref_obj: (ram) - |vpiParent: - \_cont_assign: , line:59:10, endln:59:45 - |vpiName:ram + \_cont_assign: , line:59:10, endln:59:45 |vpiName:ram |vpiIndex: - \_part_select: , line:59:29, endln:59:44 + \_part_select: rd_addr (ram.rd_addr), line:59:29, endln:59:44 |vpiParent: - \_ref_obj: rd_addr (rd_addr), line:59:29, endln:59:36 - |vpiName:rd_addr - |vpiDefName:rd_addr + \_bit_select: (ram), line:59:25, endln:59:45 + |vpiName:rd_addr + |vpiFullName:ram.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:37, endln:59:41 + |vpiParent: + \_part_select: rd_addr (ram.rd_addr), line:59:29, endln:59:44 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:59:37, endln:59:39 + \_ref_obj: (ram.rd_addr.AW), line:59:37, endln:59:39 |vpiParent: \_operation: , line:59:37, endln:59:41 |vpiName:AW + |vpiFullName:ram.rd_addr.AW |vpiOperand: \_constant: , line:59:40, endln:59:41 |vpiParent: @@ -38699,22 +38382,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:59:10, endln:59:22 + \_part_select: rdata (rdata), line:59:10, endln:59:22 |vpiParent: - \_ref_obj: rdata (rdata) - |vpiParent: - \_cont_assign: , line:59:10, endln:59:45 - |vpiName:rdata - |vpiDefName:rdata + \_cont_assign: , line:59:10, endln:59:45 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:16, endln:59:19 + |vpiParent: + \_part_select: rdata (rdata), line:59:10, endln:59:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:59:16, endln:59:17 + \_ref_obj: (rdata.N), line:59:16, endln:59:17 |vpiParent: \_operation: , line:59:16, endln:59:19 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:59:18, endln:59:19 |vpiParent: @@ -38797,24 +38481,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:64:5, endln:65:37 |vpiOpType:82 |vpiRhs: - \_part_select: , line:65:24, endln:65:36 + \_part_select: rdata (rdata), line:65:24, endln:65:36 |vpiParent: - \_ref_obj: rdata (rdata), line:65:24, endln:65:29 - |vpiParent: - \_assignment: , line:65:7, endln:65:36 - |vpiName:rdata - |vpiDefName:rdata + \_assignment: , line:65:7, endln:65:36 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:65:30, endln:65:33 |vpiParent: - \_if_stmt: , line:64:5, endln:65:37 + \_part_select: rdata (rdata), line:65:24, endln:65:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:65:30, endln:65:31 + \_ref_obj: (rdata.N), line:65:30, endln:65:31 |vpiParent: - \_if_stmt: , line:64:5, endln:65:37 + \_operation: , line:65:30, endln:65:33 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:65:32, endln:65:33 |vpiParent: @@ -38830,24 +38513,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:65:7, endln:65:20 + \_part_select: rd_reg (rd_reg), line:65:7, endln:65:20 |vpiParent: - \_ref_obj: rd_reg (rd_reg) - |vpiParent: - \_assignment: , line:65:7, endln:65:36 - |vpiName:rd_reg - |vpiDefName:rd_reg + \_assignment: , line:65:7, endln:65:36 + |vpiName:rd_reg + |vpiDefName:rd_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:65:14, endln:65:17 |vpiParent: - \_if_stmt: , line:64:5, endln:65:37 + \_part_select: rd_reg (rd_reg), line:65:7, endln:65:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:65:14, endln:65:15 + \_ref_obj: (rd_reg.N), line:65:14, endln:65:15 |vpiParent: - \_if_stmt: , line:64:5, endln:65:37 + \_operation: , line:65:14, endln:65:17 |vpiName:N + |vpiFullName:rd_reg.N |vpiOperand: \_constant: , line:65:16, endln:65:17 |vpiParent: @@ -38889,24 +38571,23 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiOperand: - \_part_select: , line:68:38, endln:68:51 + \_part_select: rd_reg (rd_reg), line:68:38, endln:68:51 |vpiParent: - \_ref_obj: rd_reg (rd_reg), line:68:38, endln:68:44 - |vpiParent: - \_operation: , line:68:27, endln:68:66 - |vpiName:rd_reg - |vpiDefName:rd_reg + \_operation: , line:68:27, endln:68:66 + |vpiName:rd_reg + |vpiDefName:rd_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:45, endln:68:48 |vpiParent: - \_operation: , line:68:27, endln:68:66 + \_part_select: rd_reg (rd_reg), line:68:38, endln:68:51 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:68:45, endln:68:46 + \_ref_obj: (rd_reg.N), line:68:45, endln:68:46 |vpiParent: - \_operation: , line:68:27, endln:68:66 + \_operation: , line:68:45, endln:68:48 |vpiName:N + |vpiFullName:rd_reg.N |vpiOperand: \_constant: , line:68:47, endln:68:48 |vpiParent: @@ -38922,24 +38603,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:68:54, endln:68:66 + \_part_select: rdata (rdata), line:68:54, endln:68:66 |vpiParent: - \_ref_obj: rdata (rdata), line:68:54, endln:68:59 - |vpiParent: - \_operation: , line:68:27, endln:68:66 - |vpiName:rdata - |vpiDefName:rdata + \_operation: , line:68:27, endln:68:66 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:60, endln:68:63 |vpiParent: - \_operation: , line:68:27, endln:68:66 + \_part_select: rdata (rdata), line:68:54, endln:68:66 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:68:60, endln:68:61 + \_ref_obj: (rdata.N), line:68:60, endln:68:61 |vpiParent: - \_operation: , line:68:27, endln:68:66 + \_operation: , line:68:60, endln:68:63 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:68:62, endln:68:63 |vpiParent: @@ -38955,22 +38635,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:68:10, endln:68:24 + \_part_select: rd_dout (rd_dout), line:68:10, endln:68:24 |vpiParent: - \_ref_obj: rd_dout (rd_dout) - |vpiParent: - \_cont_assign: , line:68:10, endln:68:66 - |vpiName:rd_dout - |vpiDefName:rd_dout + \_cont_assign: , line:68:10, endln:68:66 + |vpiName:rd_dout + |vpiDefName:rd_dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:18, endln:68:21 + |vpiParent: + \_part_select: rd_dout (rd_dout), line:68:10, endln:68:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:68:18, endln:68:19 + \_ref_obj: (rd_dout.N), line:68:18, endln:68:19 |vpiParent: \_operation: , line:68:18, endln:68:21 |vpiName:N + |vpiFullName:rd_dout.N |vpiOperand: \_constant: , line:68:20, endln:68:21 |vpiParent: @@ -39850,12 +39531,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:51:20, endln:51:23 |vpiParent: - \_for_stmt: , line:51:5, endln:51:8 + \_assignment: , line:51:18, endln:51:23 |vpiOpType:24 |vpiOperand: \_ref_obj: (i), line:51:20, endln:51:21 |vpiParent: - \_for_stmt: , line:51:5, endln:51:8 + \_operation: , line:51:20, endln:51:23 |vpiName:i |vpiOperand: \_constant: , line:51:22, endln:51:23 @@ -39868,7 +39549,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (i), line:51:18, endln:51:19 |vpiParent: - \_for_stmt: , line:51:5, endln:51:8 + \_assignment: , line:51:18, endln:51:23 |vpiName:i |vpiCondition: \_operation: , line:51:14, endln:51:17 @@ -39897,20 +39578,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (en), line:52:11, endln:52:13 |vpiParent: - \_for_stmt: , line:51:5, endln:51:8 + \_operation: , line:52:11, endln:52:22 |vpiName:en |vpiOperand: \_bit_select: (wem), line:52:16, endln:52:22 |vpiParent: - \_ref_obj: (wem) - |vpiParent: - \_operation: , line:52:11, endln:52:22 - |vpiName:wem + \_operation: , line:52:11, endln:52:22 |vpiName:wem |vpiIndex: \_ref_obj: (i), line:52:20, endln:52:21 |vpiParent: - \_operation: , line:52:11, endln:52:22 + \_bit_select: (wem), line:52:16, endln:52:22 |vpiName:i |vpiStmt: \_assignment: , line:53:16, endln:53:46 @@ -39920,15 +39598,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (din), line:53:40, endln:53:46 |vpiParent: - \_ref_obj: (din) - |vpiParent: - \_assignment: , line:53:16, endln:53:46 - |vpiName:din + \_assignment: , line:53:16, endln:53:46 |vpiName:din |vpiIndex: \_ref_obj: (i), line:53:44, endln:53:45 |vpiParent: - \_if_stmt: , line:52:7, endln:53:47 + \_bit_select: (din), line:53:40, endln:53:46 |vpiName:i |vpiLhs: \_var_select: (ram), line:53:16, endln:53:36 @@ -39936,24 +39611,24 @@ design: (work@oh_fifo_async) \_assignment: , line:53:16, endln:53:46 |vpiName:ram |vpiIndex: - \_part_select: , line:53:20, endln:53:32 + \_part_select: addr (ram.addr), line:53:20, endln:53:32 |vpiParent: - \_ref_obj: addr (addr), line:53:20, endln:53:24 - |vpiParent: - \_if_stmt: , line:52:7, endln:53:47 - |vpiName:addr - |vpiDefName:addr + \_var_select: (ram), line:53:16, endln:53:36 + |vpiName:addr + |vpiFullName:ram.addr + |vpiDefName:addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:53:25, endln:53:29 |vpiParent: - \_if_stmt: , line:52:7, endln:53:47 + \_part_select: addr (ram.addr), line:53:20, endln:53:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:53:25, endln:53:27 + \_ref_obj: (ram.addr.AW), line:53:25, endln:53:27 |vpiParent: - \_if_stmt: , line:52:7, endln:53:47 + \_operation: , line:53:25, endln:53:29 |vpiName:AW + |vpiFullName:ram.addr.AW |vpiOperand: \_constant: , line:53:28, endln:53:29 |vpiParent: @@ -39969,36 +39644,38 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiIndex: - \_ref_obj: (i), line:53:34, endln:53:35 + \_ref_obj: (ram.i), line:53:34, endln:53:35 |vpiParent: - \_if_stmt: , line:52:7, endln:53:47 + \_var_select: (ram), line:53:16, endln:53:36 |vpiName:i + |vpiFullName:ram.i |vpiAlwaysType:1 |vpiStmt: \_cont_assign: , line:55:10, endln:55:42 |vpiRhs: \_bit_select: (ram), line:55:25, endln:55:42 |vpiParent: - \_ref_obj: (ram) - |vpiParent: - \_cont_assign: , line:55:10, endln:55:42 - |vpiName:ram + \_cont_assign: , line:55:10, endln:55:42 |vpiName:ram |vpiIndex: - \_part_select: , line:55:29, endln:55:41 + \_part_select: addr (ram.addr), line:55:29, endln:55:41 |vpiParent: - \_ref_obj: addr (addr), line:55:29, endln:55:33 - |vpiName:addr - |vpiDefName:addr + \_bit_select: (ram), line:55:25, endln:55:42 + |vpiName:addr + |vpiFullName:ram.addr + |vpiDefName:addr |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:55:34, endln:55:38 + |vpiParent: + \_part_select: addr (ram.addr), line:55:29, endln:55:41 |vpiOpType:11 |vpiOperand: - \_ref_obj: (AW), line:55:34, endln:55:36 + \_ref_obj: (ram.addr.AW), line:55:34, endln:55:36 |vpiParent: \_operation: , line:55:34, endln:55:38 |vpiName:AW + |vpiFullName:ram.addr.AW |vpiOperand: \_constant: , line:55:37, endln:55:38 |vpiParent: @@ -40014,22 +39691,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:55:10, endln:55:22 + \_part_select: rdata (rdata), line:55:10, endln:55:22 |vpiParent: - \_ref_obj: rdata (rdata) - |vpiParent: - \_cont_assign: , line:55:10, endln:55:42 - |vpiName:rdata - |vpiDefName:rdata + \_cont_assign: , line:55:10, endln:55:42 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:55:16, endln:55:19 + |vpiParent: + \_part_select: rdata (rdata), line:55:10, endln:55:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:55:16, endln:55:17 + \_ref_obj: (rdata.N), line:55:16, endln:55:17 |vpiParent: \_operation: , line:55:16, endln:55:19 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:55:18, endln:55:19 |vpiParent: @@ -40112,24 +39790,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:60:5, endln:61:37 |vpiOpType:82 |vpiRhs: - \_part_select: , line:61:24, endln:61:36 + \_part_select: rdata (rdata), line:61:24, endln:61:36 |vpiParent: - \_ref_obj: rdata (rdata), line:61:24, endln:61:29 - |vpiParent: - \_assignment: , line:61:7, endln:61:36 - |vpiName:rdata - |vpiDefName:rdata + \_assignment: , line:61:7, endln:61:36 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:61:30, endln:61:33 |vpiParent: - \_if_stmt: , line:60:5, endln:61:37 + \_part_select: rdata (rdata), line:61:24, endln:61:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:61:30, endln:61:31 + \_ref_obj: (rdata.N), line:61:30, endln:61:31 |vpiParent: - \_if_stmt: , line:60:5, endln:61:37 + \_operation: , line:61:30, endln:61:33 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:61:32, endln:61:33 |vpiParent: @@ -40145,24 +39822,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:61:7, endln:61:20 + \_part_select: rd_reg (rd_reg), line:61:7, endln:61:20 |vpiParent: - \_ref_obj: rd_reg (rd_reg) - |vpiParent: - \_assignment: , line:61:7, endln:61:36 - |vpiName:rd_reg - |vpiDefName:rd_reg + \_assignment: , line:61:7, endln:61:36 + |vpiName:rd_reg + |vpiDefName:rd_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:61:14, endln:61:17 |vpiParent: - \_if_stmt: , line:60:5, endln:61:37 + \_part_select: rd_reg (rd_reg), line:61:7, endln:61:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:61:14, endln:61:15 + \_ref_obj: (rd_reg.N), line:61:14, endln:61:15 |vpiParent: - \_if_stmt: , line:60:5, endln:61:37 + \_operation: , line:61:14, endln:61:17 |vpiName:N + |vpiFullName:rd_reg.N |vpiOperand: \_constant: , line:61:16, endln:61:17 |vpiParent: @@ -40204,24 +39880,23 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiOperand: - \_part_select: , line:64:35, endln:64:48 + \_part_select: rd_reg (rd_reg), line:64:35, endln:64:48 |vpiParent: - \_ref_obj: rd_reg (rd_reg), line:64:35, endln:64:41 - |vpiParent: - \_operation: , line:64:24, endln:64:63 - |vpiName:rd_reg - |vpiDefName:rd_reg + \_operation: , line:64:24, endln:64:63 + |vpiName:rd_reg + |vpiDefName:rd_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:64:42, endln:64:45 |vpiParent: - \_operation: , line:64:24, endln:64:63 + \_part_select: rd_reg (rd_reg), line:64:35, endln:64:48 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:64:42, endln:64:43 + \_ref_obj: (rd_reg.N), line:64:42, endln:64:43 |vpiParent: - \_operation: , line:64:24, endln:64:63 + \_operation: , line:64:42, endln:64:45 |vpiName:N + |vpiFullName:rd_reg.N |vpiOperand: \_constant: , line:64:44, endln:64:45 |vpiParent: @@ -40237,24 +39912,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:64:51, endln:64:63 + \_part_select: rdata (rdata), line:64:51, endln:64:63 |vpiParent: - \_ref_obj: rdata (rdata), line:64:51, endln:64:56 - |vpiParent: - \_operation: , line:64:24, endln:64:63 - |vpiName:rdata - |vpiDefName:rdata + \_operation: , line:64:24, endln:64:63 + |vpiName:rdata + |vpiDefName:rdata |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:64:57, endln:64:60 |vpiParent: - \_operation: , line:64:24, endln:64:63 + \_part_select: rdata (rdata), line:64:51, endln:64:63 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:64:57, endln:64:58 + \_ref_obj: (rdata.N), line:64:57, endln:64:58 |vpiParent: - \_operation: , line:64:24, endln:64:63 + \_operation: , line:64:57, endln:64:60 |vpiName:N + |vpiFullName:rdata.N |vpiOperand: \_constant: , line:64:59, endln:64:60 |vpiParent: @@ -40270,22 +39944,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:64:10, endln:64:21 + \_part_select: dout (dout), line:64:10, endln:64:21 |vpiParent: - \_ref_obj: dout (dout) - |vpiParent: - \_cont_assign: , line:64:10, endln:64:63 - |vpiName:dout - |vpiDefName:dout + \_cont_assign: , line:64:10, endln:64:63 + |vpiName:dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:64:15, endln:64:18 + |vpiParent: + \_part_select: dout (dout), line:64:10, endln:64:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:64:15, endln:64:16 + \_ref_obj: (dout.N), line:64:15, endln:64:16 |vpiParent: \_operation: , line:64:15, endln:64:18 |vpiName:N + |vpiFullName:dout.N |vpiOperand: \_constant: , line:64:17, endln:64:18 |vpiParent: @@ -40736,24 +40411,23 @@ design: (work@oh_fifo_async) \_sys_func_call: ($signed), line:31:29, endln:31:36 |vpiName:a_sext |vpiOperand: - \_part_select: , line:31:45, endln:31:53 + \_part_select: a (a), line:31:45, endln:31:53 |vpiParent: - \_ref_obj: a (a), line:31:45, endln:31:46 - |vpiParent: - \_sys_func_call: ($signed), line:31:29, endln:31:36 - |vpiName:a - |vpiDefName:a + \_sys_func_call: ($signed), line:31:29, endln:31:36 + |vpiName:a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:47, endln:31:50 |vpiParent: - \_sys_func_call: ($signed), line:31:29, endln:31:36 + \_part_select: a (a), line:31:45, endln:31:53 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:47, endln:31:48 + \_ref_obj: (a.N), line:31:47, endln:31:48 |vpiParent: - \_sys_func_call: ($signed), line:31:29, endln:31:36 + \_operation: , line:31:47, endln:31:50 |vpiName:N + |vpiFullName:a.N |vpiOperand: \_constant: , line:31:49, endln:31:50 |vpiParent: @@ -40784,24 +40458,23 @@ design: (work@oh_fifo_async) \_sys_func_call: ($signed), line:32:9, endln:32:16 |vpiName:b_sext |vpiOperand: - \_part_select: , line:32:25, endln:32:33 + \_part_select: b (b), line:32:25, endln:32:33 |vpiParent: - \_ref_obj: b (b), line:32:25, endln:32:26 - |vpiParent: - \_sys_func_call: ($signed), line:32:9, endln:32:16 - |vpiName:b - |vpiDefName:b + \_sys_func_call: ($signed), line:32:9, endln:32:16 + |vpiName:b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:27, endln:32:30 |vpiParent: - \_sys_func_call: ($signed), line:32:9, endln:32:16 + \_part_select: b (b), line:32:25, endln:32:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:32:27, endln:32:28 + \_ref_obj: (b.N), line:32:27, endln:32:28 |vpiParent: - \_sys_func_call: ($signed), line:32:9, endln:32:16 + \_operation: , line:32:27, endln:32:30 |vpiName:N + |vpiFullName:b.N |vpiOperand: \_constant: , line:32:29, endln:32:30 |vpiParent: @@ -40818,16 +40491,16 @@ design: (work@oh_fifo_async) |vpiConstType:9 |vpiName:$signed |vpiLhs: - \_part_select: , line:31:10, endln:31:26 + \_part_select: product (product), line:31:10, endln:31:26 |vpiParent: - \_ref_obj: product (product) - |vpiParent: - \_cont_assign: , line:31:10, endln:32:35 - |vpiName:product - |vpiDefName:product + \_cont_assign: , line:31:10, endln:32:35 + |vpiName:product + |vpiDefName:product |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:18, endln:31:23 + |vpiParent: + \_part_select: product (product), line:31:10, endln:31:26 |vpiOpType:11 |vpiOperand: \_operation: , line:31:18, endln:31:21 @@ -40843,10 +40516,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:31:20, endln:31:21 + \_ref_obj: (product.N), line:31:20, endln:31:21 |vpiParent: \_operation: , line:31:18, endln:31:21 |vpiName:N + |vpiFullName:product.N |vpiOperand: \_constant: , line:31:22, endln:31:23 |vpiParent: @@ -40871,14 +40545,14 @@ design: (work@oh_fifo_async) \_port: (product), line:38:7, endln:38:34 |vpiName:product |vpiHighConn: - \_part_select: , line:38:17, endln:38:33 - |vpiParent: - \_ref_obj: product (product), line:38:17, endln:38:24 - |vpiName:product - |vpiDefName:product + \_part_select: product (product), line:38:17, endln:38:33 + |vpiName:product + |vpiDefName:product |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:25, endln:38:30 + |vpiParent: + \_part_select: product (product), line:38:17, endln:38:33 |vpiOpType:11 |vpiOperand: \_operation: , line:38:25, endln:38:28 @@ -40894,10 +40568,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:38:27, endln:38:28 + \_ref_obj: (product.N), line:38:27, endln:38:28 |vpiParent: \_operation: , line:38:25, endln:38:28 |vpiName:N + |vpiFullName:product.N |vpiOperand: \_constant: , line:38:29, endln:38:30 |vpiParent: @@ -40916,14 +40591,14 @@ design: (work@oh_fifo_async) \_port: (sum), line:39:7, endln:39:26 |vpiName:sum |vpiHighConn: - \_part_select: , line:39:13, endln:39:25 - |vpiParent: - \_ref_obj: sum (sum), line:39:13, endln:39:16 - |vpiName:sum - |vpiDefName:sum + \_part_select: sum (sum), line:39:13, endln:39:25 + |vpiName:sum + |vpiDefName:sum |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:17, endln:39:22 + |vpiParent: + \_part_select: sum (sum), line:39:13, endln:39:25 |vpiOpType:11 |vpiOperand: \_operation: , line:39:17, endln:39:20 @@ -40939,10 +40614,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:39:19, endln:39:20 + \_ref_obj: (sum.N), line:39:19, endln:39:20 |vpiParent: \_operation: , line:39:17, endln:39:20 |vpiName:N + |vpiFullName:sum.N |vpiOperand: \_constant: , line:39:21, endln:39:22 |vpiParent: @@ -40961,14 +40637,14 @@ design: (work@oh_fifo_async) \_port: (carry), line:40:7, endln:40:30 |vpiName:carry |vpiHighConn: - \_part_select: , line:40:15, endln:40:29 - |vpiParent: - \_ref_obj: carry (carry), line:40:15, endln:40:20 - |vpiName:carry - |vpiDefName:carry + \_part_select: carry (carry), line:40:15, endln:40:29 + |vpiName:carry + |vpiDefName:carry |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:40:21, endln:40:26 + |vpiParent: + \_part_select: carry (carry), line:40:15, endln:40:29 |vpiOpType:11 |vpiOperand: \_operation: , line:40:21, endln:40:24 @@ -40984,10 +40660,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:40:23, endln:40:24 + \_ref_obj: (carry.N), line:40:23, endln:40:24 |vpiParent: \_operation: , line:40:21, endln:40:24 |vpiName:N + |vpiFullName:carry.N |vpiOperand: \_constant: , line:40:25, endln:40:26 |vpiParent: @@ -41006,20 +40683,21 @@ design: (work@oh_fifo_async) \_port: (a), line:42:7, endln:42:21 |vpiName:a |vpiHighConn: - \_part_select: , line:42:12, endln:42:20 - |vpiParent: - \_ref_obj: a (a), line:42:12, endln:42:13 - |vpiName:a - |vpiDefName:a + \_part_select: a (a), line:42:12, endln:42:20 + |vpiName:a + |vpiDefName:a |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:42:14, endln:42:17 + |vpiParent: + \_part_select: a (a), line:42:12, endln:42:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:42:14, endln:42:15 + \_ref_obj: (a.N), line:42:14, endln:42:15 |vpiParent: \_operation: , line:42:14, endln:42:17 |vpiName:N + |vpiFullName:a.N |vpiOperand: \_constant: , line:42:16, endln:42:17 |vpiParent: @@ -41038,20 +40716,21 @@ design: (work@oh_fifo_async) \_port: (b), line:43:7, endln:43:21 |vpiName:b |vpiHighConn: - \_part_select: , line:43:12, endln:43:20 - |vpiParent: - \_ref_obj: b (b), line:43:12, endln:43:13 - |vpiName:b - |vpiDefName:b + \_part_select: b (b), line:43:12, endln:43:20 + |vpiName:b + |vpiDefName:b |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:43:14, endln:43:17 + |vpiParent: + \_part_select: b (b), line:43:12, endln:43:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:43:14, endln:43:15 + \_ref_obj: (b.N), line:43:14, endln:43:15 |vpiParent: \_operation: , line:43:14, endln:43:17 |vpiName:N + |vpiFullName:b.N |vpiOperand: \_constant: , line:43:16, endln:43:17 |vpiParent: @@ -41417,30 +41096,27 @@ design: (work@oh_fifo_async) |vpiBlocking:1 |vpiRhs: \_constant: , line:26:21, endln:26:24 - |vpiParent: - \_assignment: , line:26:8, endln:26:24 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:8, endln:26:18 + \_part_select: mux (mux), line:26:8, endln:26:18 |vpiParent: - \_ref_obj: mux (mux) - |vpiParent: - \_assignment: , line:26:8, endln:26:24 - |vpiName:mux - |vpiDefName:mux + \_assignment: , line:26:8, endln:26:24 + |vpiName:mux + |vpiDefName:mux |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:12, endln:26:15 |vpiParent: - \_begin: , line:25:5, endln:29:8 + \_part_select: mux (mux), line:26:8, endln:26:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:12, endln:26:13 + \_ref_obj: (mux.N), line:26:12, endln:26:13 |vpiParent: - \_begin: , line:25:5, endln:29:8 + \_operation: , line:26:12, endln:26:15 |vpiName:N + |vpiFullName:mux.N |vpiOperand: \_constant: , line:26:14, endln:26:15 |vpiParent: @@ -41485,12 +41161,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:27:22, endln:27:25 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_assignment: , line:27:20, endln:27:25 |vpiOpType:24 |vpiOperand: \_ref_obj: (i), line:27:22, endln:27:23 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_operation: , line:27:22, endln:27:25 |vpiName:i |vpiOperand: \_constant: , line:27:24, endln:27:25 @@ -41503,7 +41179,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (i), line:27:20, endln:27:21 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_assignment: , line:27:20, endln:27:25 |vpiName:i |vpiCondition: \_operation: , line:27:16, endln:27:19 @@ -41529,27 +41205,26 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:28:16, endln:28:63 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_assignment: , line:28:3, endln:28:63 |vpiOpType:29 |vpiOperand: - \_part_select: , line:28:16, endln:28:26 + \_part_select: mux (mux), line:28:16, endln:28:26 |vpiParent: - \_ref_obj: mux (mux), line:28:16, endln:28:19 - |vpiParent: - \_operation: , line:28:16, endln:28:63 - |vpiName:mux - |vpiDefName:mux + \_operation: , line:28:16, endln:28:63 + |vpiName:mux + |vpiDefName:mux |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:20, endln:28:23 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_part_select: mux (mux), line:28:16, endln:28:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:20, endln:28:21 + \_ref_obj: (mux.N), line:28:20, endln:28:21 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_operation: , line:28:20, endln:28:23 |vpiName:N + |vpiFullName:mux.N |vpiOperand: \_constant: , line:28:22, endln:28:23 |vpiParent: @@ -41572,7 +41247,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:28:29, endln:28:42 |vpiParent: - \_operation: , line:28:16, endln:28:63 + \_operation: , line:28:29, endln:28:63 |vpiOpType:34 |vpiOperand: \_ref_obj: (N), line:28:31, endln:28:32 @@ -41587,46 +41262,42 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (sel), line:28:34, endln:28:40 |vpiParent: - \_ref_obj: (sel) - |vpiParent: - \_operation: , line:28:16, endln:28:63 - |vpiName:sel + \_operation: , line:28:16, endln:28:63 |vpiName:sel |vpiIndex: \_ref_obj: (i), line:28:38, endln:28:39 |vpiParent: - \_operation: , line:28:16, endln:28:63 + \_bit_select: (sel), line:28:34, endln:28:40 |vpiName:i |vpiOperand: - \_indexed_part_select: , line:28:48, endln:28:62 + \_indexed_part_select: in (in), line:28:48, endln:28:62 |vpiParent: - \_ref_obj: in (in) - |vpiParent: - \_operation: , line:28:29, endln:28:63 - |vpiName:in - |vpiDefName:in + \_operation: , line:28:29, endln:28:63 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiIndexedPartSelectType:2 |vpiBaseExpr: \_operation: , line:28:49, endln:28:58 |vpiParent: - \_operation: , line:28:29, endln:28:63 + \_indexed_part_select: in (in), line:28:48, endln:28:62 |vpiOpType:11 |vpiOperand: \_operation: , line:28:49, endln:28:56 |vpiParent: - \_operation: , line:28:29, endln:28:63 + \_operation: , line:28:49, endln:28:58 |vpiOpType:25 |vpiOperand: \_operation: , line:28:50, endln:28:53 |vpiParent: - \_operation: , line:28:29, endln:28:63 + \_operation: , line:28:49, endln:28:56 |vpiOpType:24 |vpiOperand: - \_ref_obj: (i), line:28:50, endln:28:51 + \_ref_obj: (in.i), line:28:50, endln:28:51 |vpiParent: - \_operation: , line:28:29, endln:28:63 + \_operation: , line:28:50, endln:28:53 |vpiName:i + |vpiFullName:in.i |vpiOperand: \_constant: , line:28:52, endln:28:53 |vpiParent: @@ -41636,10 +41307,11 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:28:55, endln:28:56 + \_ref_obj: (in.N), line:28:55, endln:28:56 |vpiParent: \_operation: , line:28:49, endln:28:56 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:28:57, endln:28:58 |vpiParent: @@ -41651,27 +41323,26 @@ design: (work@oh_fifo_async) |vpiWidthExpr: \_ref_obj: (N), line:28:61, endln:28:62 |vpiParent: - \_operation: , line:28:29, endln:28:63 + \_indexed_part_select: in (in), line:28:48, endln:28:62 |vpiName:N |vpiLhs: - \_part_select: , line:28:3, endln:28:13 + \_part_select: mux (mux), line:28:3, endln:28:13 |vpiParent: - \_ref_obj: mux (mux) - |vpiParent: - \_assignment: , line:28:3, endln:28:63 - |vpiName:mux - |vpiDefName:mux + \_assignment: , line:28:3, endln:28:63 + |vpiName:mux + |vpiDefName:mux |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:7, endln:28:10 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_part_select: mux (mux), line:28:3, endln:28:13 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:7, endln:28:8 + \_ref_obj: (mux.N), line:28:7, endln:28:8 |vpiParent: - \_for_stmt: , line:27:8, endln:27:11 + \_operation: , line:28:7, endln:28:10 |vpiName:N + |vpiFullName:mux.N |vpiOperand: \_constant: , line:28:9, endln:28:10 |vpiParent: @@ -41692,10 +41363,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (mux), line:30:23, endln:30:31 |vpiParent: - \_ref_obj: (mux) - |vpiParent: - \_cont_assign: , line:30:10, endln:30:31 - |vpiName:mux + \_cont_assign: , line:30:10, endln:30:31 |vpiName:mux |vpiIndex: \_operation: , line:30:27, endln:30:30 @@ -41717,22 +41385,23 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiLhs: - \_part_select: , line:30:10, endln:30:20 + \_part_select: out (out), line:30:10, endln:30:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:30:10, endln:30:31 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:30:10, endln:30:31 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:14, endln:30:17 + |vpiParent: + \_part_select: out (out), line:30:10, endln:30:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:14, endln:30:15 + \_ref_obj: (out.N), line:30:14, endln:30:15 |vpiParent: \_operation: , line:30:14, endln:30:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:30:16, endln:30:17 |vpiParent: @@ -41763,20 +41432,21 @@ design: (work@oh_fifo_async) \_port: (sel), line:37:5, endln:37:23 |vpiName:sel |vpiHighConn: - \_part_select: , line:37:12, endln:37:22 - |vpiParent: - \_ref_obj: sel (sel), line:37:12, endln:37:15 - |vpiName:sel - |vpiDefName:sel + \_part_select: sel (sel), line:37:12, endln:37:22 + |vpiName:sel + |vpiDefName:sel |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:16, endln:37:19 + |vpiParent: + \_part_select: sel (sel), line:37:12, endln:37:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:37:16, endln:37:17 + \_ref_obj: (sel.N), line:37:16, endln:37:17 |vpiParent: \_operation: , line:37:16, endln:37:19 |vpiName:N + |vpiFullName:sel.N |vpiOperand: \_constant: , line:37:18, endln:37:19 |vpiParent: @@ -41795,20 +41465,21 @@ design: (work@oh_fifo_async) \_port: (in), line:38:5, endln:38:20 |vpiName:in |vpiHighConn: - \_part_select: , line:38:10, endln:38:19 - |vpiParent: - \_ref_obj: in (in), line:38:10, endln:38:12 - |vpiName:in - |vpiDefName:in + \_part_select: in (in), line:38:10, endln:38:19 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:13, endln:38:16 + |vpiParent: + \_part_select: in (in), line:38:10, endln:38:19 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:38:13, endln:38:14 + \_ref_obj: (in.N), line:38:13, endln:38:14 |vpiParent: \_operation: , line:38:13, endln:38:16 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:38:15, endln:38:16 |vpiParent: @@ -42751,26 +42422,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:38:30, endln:38:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:38:40, endln:38:50 + \_part_select: in0 (work@oh_mux12.in0), line:38:40, endln:38:50 |vpiParent: - \_ref_obj: in0 (work@oh_mux12.in0), line:38:40, endln:38:43 - |vpiParent: - \_operation: , line:38:25, endln:38:50 - |vpiName:in0 - |vpiFullName:work@oh_mux12.in0 - |vpiDefName:in0 + \_operation: , line:38:25, endln:38:50 + |vpiName:in0 + |vpiFullName:work@oh_mux12.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:44, endln:38:47 |vpiParent: - \_operation: , line:38:25, endln:38:50 + \_part_select: in0 (work@oh_mux12.in0), line:38:40, endln:38:50 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:38:44, endln:38:45 + \_ref_obj: (work@oh_mux12.in0.N), line:38:44, endln:38:45 |vpiParent: - \_operation: , line:38:25, endln:38:50 + \_operation: , line:38:44, endln:38:47 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in0.N |vpiOperand: \_constant: , line:38:46, endln:38:47 |vpiParent: @@ -42793,7 +42462,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:39:5, endln:39:16 |vpiParent: - \_operation: , line:38:25, endln:39:30 + \_operation: , line:39:5, endln:39:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:39:7, endln:39:8 @@ -42813,26 +42482,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux12.sel1 |vpiOperand: - \_part_select: , line:39:20, endln:39:30 + \_part_select: in1 (work@oh_mux12.in1), line:39:20, endln:39:30 |vpiParent: - \_ref_obj: in1 (work@oh_mux12.in1), line:39:20, endln:39:23 - |vpiParent: - \_operation: , line:39:5, endln:39:30 - |vpiName:in1 - |vpiFullName:work@oh_mux12.in1 - |vpiDefName:in1 + \_operation: , line:39:5, endln:39:30 + |vpiName:in1 + |vpiFullName:work@oh_mux12.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:24, endln:39:27 |vpiParent: - \_operation: , line:39:5, endln:39:30 + \_part_select: in1 (work@oh_mux12.in1), line:39:20, endln:39:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:39:24, endln:39:25 + \_ref_obj: (work@oh_mux12.in1.N), line:39:24, endln:39:25 |vpiParent: - \_operation: , line:39:5, endln:39:30 + \_operation: , line:39:24, endln:39:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in1.N |vpiOperand: \_constant: , line:39:26, endln:39:27 |vpiParent: @@ -42855,7 +42522,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:40:5, endln:40:16 |vpiParent: - \_operation: , line:38:25, endln:40:30 + \_operation: , line:40:5, endln:40:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:40:7, endln:40:8 @@ -42875,26 +42542,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux12.sel2 |vpiOperand: - \_part_select: , line:40:20, endln:40:30 + \_part_select: in2 (work@oh_mux12.in2), line:40:20, endln:40:30 |vpiParent: - \_ref_obj: in2 (work@oh_mux12.in2), line:40:20, endln:40:23 - |vpiParent: - \_operation: , line:40:5, endln:40:30 - |vpiName:in2 - |vpiFullName:work@oh_mux12.in2 - |vpiDefName:in2 + \_operation: , line:40:5, endln:40:30 + |vpiName:in2 + |vpiFullName:work@oh_mux12.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:40:24, endln:40:27 |vpiParent: - \_operation: , line:40:5, endln:40:30 + \_part_select: in2 (work@oh_mux12.in2), line:40:20, endln:40:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:40:24, endln:40:25 + \_ref_obj: (work@oh_mux12.in2.N), line:40:24, endln:40:25 |vpiParent: - \_operation: , line:40:5, endln:40:30 + \_operation: , line:40:24, endln:40:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in2.N |vpiOperand: \_constant: , line:40:26, endln:40:27 |vpiParent: @@ -42917,7 +42582,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:41:5, endln:41:16 |vpiParent: - \_operation: , line:38:25, endln:41:30 + \_operation: , line:41:5, endln:41:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:41:7, endln:41:8 @@ -42937,26 +42602,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux12.sel3 |vpiOperand: - \_part_select: , line:41:20, endln:41:30 + \_part_select: in3 (work@oh_mux12.in3), line:41:20, endln:41:30 |vpiParent: - \_ref_obj: in3 (work@oh_mux12.in3), line:41:20, endln:41:23 - |vpiParent: - \_operation: , line:41:5, endln:41:30 - |vpiName:in3 - |vpiFullName:work@oh_mux12.in3 - |vpiDefName:in3 + \_operation: , line:41:5, endln:41:30 + |vpiName:in3 + |vpiFullName:work@oh_mux12.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:24, endln:41:27 |vpiParent: - \_operation: , line:41:5, endln:41:30 + \_part_select: in3 (work@oh_mux12.in3), line:41:20, endln:41:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:41:24, endln:41:25 + \_ref_obj: (work@oh_mux12.in3.N), line:41:24, endln:41:25 |vpiParent: - \_operation: , line:41:5, endln:41:30 + \_operation: , line:41:24, endln:41:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in3.N |vpiOperand: \_constant: , line:41:26, endln:41:27 |vpiParent: @@ -42979,7 +42642,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:42:5, endln:42:16 |vpiParent: - \_operation: , line:38:25, endln:42:30 + \_operation: , line:42:5, endln:42:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:42:7, endln:42:8 @@ -42999,26 +42662,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux12.sel4 |vpiOperand: - \_part_select: , line:42:20, endln:42:30 + \_part_select: in4 (work@oh_mux12.in4), line:42:20, endln:42:30 |vpiParent: - \_ref_obj: in4 (work@oh_mux12.in4), line:42:20, endln:42:23 - |vpiParent: - \_operation: , line:42:5, endln:42:30 - |vpiName:in4 - |vpiFullName:work@oh_mux12.in4 - |vpiDefName:in4 + \_operation: , line:42:5, endln:42:30 + |vpiName:in4 + |vpiFullName:work@oh_mux12.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:42:24, endln:42:27 |vpiParent: - \_operation: , line:42:5, endln:42:30 + \_part_select: in4 (work@oh_mux12.in4), line:42:20, endln:42:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:42:24, endln:42:25 + \_ref_obj: (work@oh_mux12.in4.N), line:42:24, endln:42:25 |vpiParent: - \_operation: , line:42:5, endln:42:30 + \_operation: , line:42:24, endln:42:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in4.N |vpiOperand: \_constant: , line:42:26, endln:42:27 |vpiParent: @@ -43041,7 +42702,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:43:5, endln:43:16 |vpiParent: - \_operation: , line:38:25, endln:43:30 + \_operation: , line:43:5, endln:43:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:43:7, endln:43:8 @@ -43061,26 +42722,24 @@ design: (work@oh_fifo_async) |vpiName:sel5 |vpiFullName:work@oh_mux12.sel5 |vpiOperand: - \_part_select: , line:43:20, endln:43:30 + \_part_select: in5 (work@oh_mux12.in5), line:43:20, endln:43:30 |vpiParent: - \_ref_obj: in5 (work@oh_mux12.in5), line:43:20, endln:43:23 - |vpiParent: - \_operation: , line:43:5, endln:43:30 - |vpiName:in5 - |vpiFullName:work@oh_mux12.in5 - |vpiDefName:in5 + \_operation: , line:43:5, endln:43:30 + |vpiName:in5 + |vpiFullName:work@oh_mux12.in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:43:24, endln:43:27 |vpiParent: - \_operation: , line:43:5, endln:43:30 + \_part_select: in5 (work@oh_mux12.in5), line:43:20, endln:43:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:43:24, endln:43:25 + \_ref_obj: (work@oh_mux12.in5.N), line:43:24, endln:43:25 |vpiParent: - \_operation: , line:43:5, endln:43:30 + \_operation: , line:43:24, endln:43:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in5.N |vpiOperand: \_constant: , line:43:26, endln:43:27 |vpiParent: @@ -43103,7 +42762,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:44:5, endln:44:16 |vpiParent: - \_operation: , line:38:25, endln:44:30 + \_operation: , line:44:5, endln:44:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:44:7, endln:44:8 @@ -43123,26 +42782,24 @@ design: (work@oh_fifo_async) |vpiName:sel6 |vpiFullName:work@oh_mux12.sel6 |vpiOperand: - \_part_select: , line:44:20, endln:44:30 + \_part_select: in6 (work@oh_mux12.in6), line:44:20, endln:44:30 |vpiParent: - \_ref_obj: in6 (work@oh_mux12.in6), line:44:20, endln:44:23 - |vpiParent: - \_operation: , line:44:5, endln:44:30 - |vpiName:in6 - |vpiFullName:work@oh_mux12.in6 - |vpiDefName:in6 + \_operation: , line:44:5, endln:44:30 + |vpiName:in6 + |vpiFullName:work@oh_mux12.in6 + |vpiDefName:in6 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:44:24, endln:44:27 |vpiParent: - \_operation: , line:44:5, endln:44:30 + \_part_select: in6 (work@oh_mux12.in6), line:44:20, endln:44:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:44:24, endln:44:25 + \_ref_obj: (work@oh_mux12.in6.N), line:44:24, endln:44:25 |vpiParent: - \_operation: , line:44:5, endln:44:30 + \_operation: , line:44:24, endln:44:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in6.N |vpiOperand: \_constant: , line:44:26, endln:44:27 |vpiParent: @@ -43165,7 +42822,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:45:5, endln:45:16 |vpiParent: - \_operation: , line:38:25, endln:45:30 + \_operation: , line:45:5, endln:45:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:45:7, endln:45:8 @@ -43185,26 +42842,24 @@ design: (work@oh_fifo_async) |vpiName:sel7 |vpiFullName:work@oh_mux12.sel7 |vpiOperand: - \_part_select: , line:45:20, endln:45:30 + \_part_select: in7 (work@oh_mux12.in7), line:45:20, endln:45:30 |vpiParent: - \_ref_obj: in7 (work@oh_mux12.in7), line:45:20, endln:45:23 - |vpiParent: - \_operation: , line:45:5, endln:45:30 - |vpiName:in7 - |vpiFullName:work@oh_mux12.in7 - |vpiDefName:in7 + \_operation: , line:45:5, endln:45:30 + |vpiName:in7 + |vpiFullName:work@oh_mux12.in7 + |vpiDefName:in7 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:45:24, endln:45:27 |vpiParent: - \_operation: , line:45:5, endln:45:30 + \_part_select: in7 (work@oh_mux12.in7), line:45:20, endln:45:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:45:24, endln:45:25 + \_ref_obj: (work@oh_mux12.in7.N), line:45:24, endln:45:25 |vpiParent: - \_operation: , line:45:5, endln:45:30 + \_operation: , line:45:24, endln:45:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in7.N |vpiOperand: \_constant: , line:45:26, endln:45:27 |vpiParent: @@ -43227,7 +42882,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:46:5, endln:46:16 |vpiParent: - \_operation: , line:38:25, endln:46:30 + \_operation: , line:46:5, endln:46:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:46:7, endln:46:8 @@ -43247,26 +42902,24 @@ design: (work@oh_fifo_async) |vpiName:sel8 |vpiFullName:work@oh_mux12.sel8 |vpiOperand: - \_part_select: , line:46:20, endln:46:30 + \_part_select: in8 (work@oh_mux12.in8), line:46:20, endln:46:30 |vpiParent: - \_ref_obj: in8 (work@oh_mux12.in8), line:46:20, endln:46:23 - |vpiParent: - \_operation: , line:46:5, endln:46:30 - |vpiName:in8 - |vpiFullName:work@oh_mux12.in8 - |vpiDefName:in8 + \_operation: , line:46:5, endln:46:30 + |vpiName:in8 + |vpiFullName:work@oh_mux12.in8 + |vpiDefName:in8 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:24, endln:46:27 |vpiParent: - \_operation: , line:46:5, endln:46:30 + \_part_select: in8 (work@oh_mux12.in8), line:46:20, endln:46:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:46:24, endln:46:25 + \_ref_obj: (work@oh_mux12.in8.N), line:46:24, endln:46:25 |vpiParent: - \_operation: , line:46:5, endln:46:30 + \_operation: , line:46:24, endln:46:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in8.N |vpiOperand: \_constant: , line:46:26, endln:46:27 |vpiParent: @@ -43289,7 +42942,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:47:5, endln:47:16 |vpiParent: - \_operation: , line:38:25, endln:47:30 + \_operation: , line:47:5, endln:47:30 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:47:7, endln:47:8 @@ -43309,26 +42962,24 @@ design: (work@oh_fifo_async) |vpiName:sel9 |vpiFullName:work@oh_mux12.sel9 |vpiOperand: - \_part_select: , line:47:20, endln:47:30 + \_part_select: in9 (work@oh_mux12.in9), line:47:20, endln:47:30 |vpiParent: - \_ref_obj: in9 (work@oh_mux12.in9), line:47:20, endln:47:23 - |vpiParent: - \_operation: , line:47:5, endln:47:30 - |vpiName:in9 - |vpiFullName:work@oh_mux12.in9 - |vpiDefName:in9 + \_operation: , line:47:5, endln:47:30 + |vpiName:in9 + |vpiFullName:work@oh_mux12.in9 + |vpiDefName:in9 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:47:24, endln:47:27 |vpiParent: - \_operation: , line:47:5, endln:47:30 + \_part_select: in9 (work@oh_mux12.in9), line:47:20, endln:47:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:47:24, endln:47:25 + \_ref_obj: (work@oh_mux12.in9.N), line:47:24, endln:47:25 |vpiParent: - \_operation: , line:47:5, endln:47:30 + \_operation: , line:47:24, endln:47:27 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in9.N |vpiOperand: \_constant: , line:47:26, endln:47:27 |vpiParent: @@ -43351,7 +43002,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:48:5, endln:48:17 |vpiParent: - \_operation: , line:38:25, endln:48:31 + \_operation: , line:48:5, endln:48:31 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:48:7, endln:48:8 @@ -43371,26 +43022,24 @@ design: (work@oh_fifo_async) |vpiName:sel10 |vpiFullName:work@oh_mux12.sel10 |vpiOperand: - \_part_select: , line:48:20, endln:48:31 + \_part_select: in10 (work@oh_mux12.in10), line:48:20, endln:48:31 |vpiParent: - \_ref_obj: in10 (work@oh_mux12.in10), line:48:20, endln:48:24 - |vpiParent: - \_operation: , line:48:5, endln:48:31 - |vpiName:in10 - |vpiFullName:work@oh_mux12.in10 - |vpiDefName:in10 + \_operation: , line:48:5, endln:48:31 + |vpiName:in10 + |vpiFullName:work@oh_mux12.in10 + |vpiDefName:in10 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:48:25, endln:48:28 |vpiParent: - \_operation: , line:48:5, endln:48:31 + \_part_select: in10 (work@oh_mux12.in10), line:48:20, endln:48:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:48:25, endln:48:26 + \_ref_obj: (work@oh_mux12.in10.N), line:48:25, endln:48:26 |vpiParent: - \_operation: , line:48:5, endln:48:31 + \_operation: , line:48:25, endln:48:28 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in10.N |vpiOperand: \_constant: , line:48:27, endln:48:28 |vpiParent: @@ -43413,7 +43062,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:49:5, endln:49:17 |vpiParent: - \_operation: , line:38:25, endln:49:31 + \_operation: , line:49:5, endln:49:31 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux12.N), line:49:7, endln:49:8 @@ -43433,26 +43082,24 @@ design: (work@oh_fifo_async) |vpiName:sel11 |vpiFullName:work@oh_mux12.sel11 |vpiOperand: - \_part_select: , line:49:20, endln:49:31 + \_part_select: in11 (work@oh_mux12.in11), line:49:20, endln:49:31 |vpiParent: - \_ref_obj: in11 (work@oh_mux12.in11), line:49:20, endln:49:24 - |vpiParent: - \_operation: , line:49:5, endln:49:31 - |vpiName:in11 - |vpiFullName:work@oh_mux12.in11 - |vpiDefName:in11 + \_operation: , line:49:5, endln:49:31 + |vpiName:in11 + |vpiFullName:work@oh_mux12.in11 + |vpiDefName:in11 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:49:25, endln:49:28 |vpiParent: - \_operation: , line:49:5, endln:49:31 + \_part_select: in11 (work@oh_mux12.in11), line:49:20, endln:49:31 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux12.N), line:49:25, endln:49:26 + \_ref_obj: (work@oh_mux12.in11.N), line:49:25, endln:49:26 |vpiParent: - \_operation: , line:49:5, endln:49:31 + \_operation: , line:49:25, endln:49:28 |vpiName:N - |vpiFullName:work@oh_mux12.N + |vpiFullName:work@oh_mux12.in11.N |vpiOperand: \_constant: , line:49:27, endln:49:28 |vpiParent: @@ -43468,23 +43115,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:38:11, endln:38:21 + \_part_select: out (work@oh_mux12.out), line:38:11, endln:38:21 |vpiParent: - \_ref_obj: out (work@oh_mux12.out) - |vpiParent: - \_cont_assign: , line:38:11, endln:49:32 - |vpiName:out - |vpiFullName:work@oh_mux12.out - |vpiDefName:out + \_cont_assign: , line:38:11, endln:49:32 + |vpiName:out + |vpiFullName:work@oh_mux12.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:15, endln:38:18 + |vpiParent: + \_part_select: out (work@oh_mux12.out), line:38:11, endln:38:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:38:15, endln:38:16 + \_ref_obj: (work@oh_mux12.out.N), line:38:15, endln:38:16 |vpiParent: \_operation: , line:38:15, endln:38:18 |vpiName:N + |vpiFullName:work@oh_mux12.out.N |vpiOperand: \_constant: , line:38:17, endln:38:18 |vpiParent: @@ -43737,26 +43385,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:17:30, endln:17:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:17:39, endln:17:49 + \_part_select: in0 (work@oh_mux2.in0), line:17:39, endln:17:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux2.in0), line:17:39, endln:17:42 - |vpiParent: - \_operation: , line:17:25, endln:17:49 - |vpiName:in0 - |vpiFullName:work@oh_mux2.in0 - |vpiDefName:in0 + \_operation: , line:17:25, endln:17:49 + |vpiName:in0 + |vpiFullName:work@oh_mux2.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:17:43, endln:17:46 |vpiParent: - \_operation: , line:17:25, endln:17:49 + \_part_select: in0 (work@oh_mux2.in0), line:17:39, endln:17:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux2.N), line:17:43, endln:17:44 + \_ref_obj: (work@oh_mux2.in0.N), line:17:43, endln:17:44 |vpiParent: - \_operation: , line:17:25, endln:17:49 + \_operation: , line:17:43, endln:17:46 |vpiName:N - |vpiFullName:work@oh_mux2.N + |vpiFullName:work@oh_mux2.in0.N |vpiOperand: \_constant: , line:17:45, endln:17:46 |vpiParent: @@ -43779,7 +43425,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:5, endln:18:16 |vpiParent: - \_operation: , line:17:25, endln:18:29 + \_operation: , line:18:5, endln:18:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux2.N), line:18:7, endln:18:8 @@ -43799,26 +43445,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux2.sel1 |vpiOperand: - \_part_select: , line:18:19, endln:18:29 + \_part_select: in1 (work@oh_mux2.in1), line:18:19, endln:18:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux2.in1), line:18:19, endln:18:22 - |vpiParent: - \_operation: , line:18:5, endln:18:29 - |vpiName:in1 - |vpiFullName:work@oh_mux2.in1 - |vpiDefName:in1 + \_operation: , line:18:5, endln:18:29 + |vpiName:in1 + |vpiFullName:work@oh_mux2.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:18:23, endln:18:26 |vpiParent: - \_operation: , line:18:5, endln:18:29 + \_part_select: in1 (work@oh_mux2.in1), line:18:19, endln:18:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux2.N), line:18:23, endln:18:24 + \_ref_obj: (work@oh_mux2.in1.N), line:18:23, endln:18:24 |vpiParent: - \_operation: , line:18:5, endln:18:29 + \_operation: , line:18:23, endln:18:26 |vpiName:N - |vpiFullName:work@oh_mux2.N + |vpiFullName:work@oh_mux2.in1.N |vpiOperand: \_constant: , line:18:25, endln:18:26 |vpiParent: @@ -43834,23 +43478,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:17:11, endln:17:21 + \_part_select: out (work@oh_mux2.out), line:17:11, endln:17:21 |vpiParent: - \_ref_obj: out (work@oh_mux2.out) - |vpiParent: - \_cont_assign: , line:17:11, endln:18:30 - |vpiName:out - |vpiFullName:work@oh_mux2.out - |vpiDefName:out + \_cont_assign: , line:17:11, endln:18:30 + |vpiName:out + |vpiFullName:work@oh_mux2.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:17:15, endln:17:18 + |vpiParent: + \_part_select: out (work@oh_mux2.out), line:17:11, endln:17:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:17:15, endln:17:16 + \_ref_obj: (work@oh_mux2.out.N), line:17:15, endln:17:16 |vpiParent: \_operation: , line:17:15, endln:17:18 |vpiName:N + |vpiFullName:work@oh_mux2.out.N |vpiOperand: \_constant: , line:17:17, endln:17:18 |vpiParent: @@ -44172,26 +43817,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:19:30, endln:19:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:19:39, endln:19:49 + \_part_select: in0 (work@oh_mux3.in0), line:19:39, endln:19:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux3.in0), line:19:39, endln:19:42 - |vpiParent: - \_operation: , line:19:25, endln:19:49 - |vpiName:in0 - |vpiFullName:work@oh_mux3.in0 - |vpiDefName:in0 + \_operation: , line:19:25, endln:19:49 + |vpiName:in0 + |vpiFullName:work@oh_mux3.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:19:43, endln:19:46 |vpiParent: - \_operation: , line:19:25, endln:19:49 + \_part_select: in0 (work@oh_mux3.in0), line:19:39, endln:19:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux3.N), line:19:43, endln:19:44 + \_ref_obj: (work@oh_mux3.in0.N), line:19:43, endln:19:44 |vpiParent: - \_operation: , line:19:25, endln:19:49 + \_operation: , line:19:43, endln:19:46 |vpiName:N - |vpiFullName:work@oh_mux3.N + |vpiFullName:work@oh_mux3.in0.N |vpiOperand: \_constant: , line:19:45, endln:19:46 |vpiParent: @@ -44214,7 +43857,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:20:5, endln:20:16 |vpiParent: - \_operation: , line:19:25, endln:20:29 + \_operation: , line:20:5, endln:20:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux3.N), line:20:7, endln:20:8 @@ -44234,26 +43877,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux3.sel1 |vpiOperand: - \_part_select: , line:20:19, endln:20:29 + \_part_select: in1 (work@oh_mux3.in1), line:20:19, endln:20:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux3.in1), line:20:19, endln:20:22 - |vpiParent: - \_operation: , line:20:5, endln:20:29 - |vpiName:in1 - |vpiFullName:work@oh_mux3.in1 - |vpiDefName:in1 + \_operation: , line:20:5, endln:20:29 + |vpiName:in1 + |vpiFullName:work@oh_mux3.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:23, endln:20:26 |vpiParent: - \_operation: , line:20:5, endln:20:29 + \_part_select: in1 (work@oh_mux3.in1), line:20:19, endln:20:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux3.N), line:20:23, endln:20:24 + \_ref_obj: (work@oh_mux3.in1.N), line:20:23, endln:20:24 |vpiParent: - \_operation: , line:20:5, endln:20:29 + \_operation: , line:20:23, endln:20:26 |vpiName:N - |vpiFullName:work@oh_mux3.N + |vpiFullName:work@oh_mux3.in1.N |vpiOperand: \_constant: , line:20:25, endln:20:26 |vpiParent: @@ -44276,7 +43917,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:21:5, endln:21:16 |vpiParent: - \_operation: , line:19:25, endln:21:29 + \_operation: , line:21:5, endln:21:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux3.N), line:21:7, endln:21:8 @@ -44296,26 +43937,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux3.sel2 |vpiOperand: - \_part_select: , line:21:19, endln:21:29 + \_part_select: in2 (work@oh_mux3.in2), line:21:19, endln:21:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux3.in2), line:21:19, endln:21:22 - |vpiParent: - \_operation: , line:21:5, endln:21:29 - |vpiName:in2 - |vpiFullName:work@oh_mux3.in2 - |vpiDefName:in2 + \_operation: , line:21:5, endln:21:29 + |vpiName:in2 + |vpiFullName:work@oh_mux3.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:23, endln:21:26 |vpiParent: - \_operation: , line:21:5, endln:21:29 + \_part_select: in2 (work@oh_mux3.in2), line:21:19, endln:21:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux3.N), line:21:23, endln:21:24 + \_ref_obj: (work@oh_mux3.in2.N), line:21:23, endln:21:24 |vpiParent: - \_operation: , line:21:5, endln:21:29 + \_operation: , line:21:23, endln:21:26 |vpiName:N - |vpiFullName:work@oh_mux3.N + |vpiFullName:work@oh_mux3.in2.N |vpiOperand: \_constant: , line:21:25, endln:21:26 |vpiParent: @@ -44331,23 +43970,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:19:11, endln:19:21 + \_part_select: out (work@oh_mux3.out), line:19:11, endln:19:21 |vpiParent: - \_ref_obj: out (work@oh_mux3.out) - |vpiParent: - \_cont_assign: , line:19:11, endln:21:30 - |vpiName:out - |vpiFullName:work@oh_mux3.out - |vpiDefName:out + \_cont_assign: , line:19:11, endln:21:30 + |vpiName:out + |vpiFullName:work@oh_mux3.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:19:15, endln:19:18 + |vpiParent: + \_part_select: out (work@oh_mux3.out), line:19:11, endln:19:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:19:15, endln:19:16 + \_ref_obj: (work@oh_mux3.out.N), line:19:15, endln:19:16 |vpiParent: \_operation: , line:19:15, endln:19:18 |vpiName:N + |vpiFullName:work@oh_mux3.out.N |vpiOperand: \_constant: , line:19:17, endln:19:18 |vpiParent: @@ -44738,26 +44378,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:21:30, endln:21:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:21:39, endln:21:49 + \_part_select: in0 (work@oh_mux4.in0), line:21:39, endln:21:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux4.in0), line:21:39, endln:21:42 - |vpiParent: - \_operation: , line:21:25, endln:21:49 - |vpiName:in0 - |vpiFullName:work@oh_mux4.in0 - |vpiDefName:in0 + \_operation: , line:21:25, endln:21:49 + |vpiName:in0 + |vpiFullName:work@oh_mux4.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:43, endln:21:46 |vpiParent: - \_operation: , line:21:25, endln:21:49 + \_part_select: in0 (work@oh_mux4.in0), line:21:39, endln:21:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux4.N), line:21:43, endln:21:44 + \_ref_obj: (work@oh_mux4.in0.N), line:21:43, endln:21:44 |vpiParent: - \_operation: , line:21:25, endln:21:49 + \_operation: , line:21:43, endln:21:46 |vpiName:N - |vpiFullName:work@oh_mux4.N + |vpiFullName:work@oh_mux4.in0.N |vpiOperand: \_constant: , line:21:45, endln:21:46 |vpiParent: @@ -44780,7 +44418,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:22:5, endln:22:16 |vpiParent: - \_operation: , line:21:25, endln:22:29 + \_operation: , line:22:5, endln:22:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux4.N), line:22:7, endln:22:8 @@ -44800,26 +44438,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux4.sel1 |vpiOperand: - \_part_select: , line:22:19, endln:22:29 + \_part_select: in1 (work@oh_mux4.in1), line:22:19, endln:22:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux4.in1), line:22:19, endln:22:22 - |vpiParent: - \_operation: , line:22:5, endln:22:29 - |vpiName:in1 - |vpiFullName:work@oh_mux4.in1 - |vpiDefName:in1 + \_operation: , line:22:5, endln:22:29 + |vpiName:in1 + |vpiFullName:work@oh_mux4.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:23, endln:22:26 |vpiParent: - \_operation: , line:22:5, endln:22:29 + \_part_select: in1 (work@oh_mux4.in1), line:22:19, endln:22:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux4.N), line:22:23, endln:22:24 + \_ref_obj: (work@oh_mux4.in1.N), line:22:23, endln:22:24 |vpiParent: - \_operation: , line:22:5, endln:22:29 + \_operation: , line:22:23, endln:22:26 |vpiName:N - |vpiFullName:work@oh_mux4.N + |vpiFullName:work@oh_mux4.in1.N |vpiOperand: \_constant: , line:22:25, endln:22:26 |vpiParent: @@ -44842,7 +44478,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:23:5, endln:23:16 |vpiParent: - \_operation: , line:21:25, endln:23:29 + \_operation: , line:23:5, endln:23:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux4.N), line:23:7, endln:23:8 @@ -44862,26 +44498,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux4.sel2 |vpiOperand: - \_part_select: , line:23:19, endln:23:29 + \_part_select: in2 (work@oh_mux4.in2), line:23:19, endln:23:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux4.in2), line:23:19, endln:23:22 - |vpiParent: - \_operation: , line:23:5, endln:23:29 - |vpiName:in2 - |vpiFullName:work@oh_mux4.in2 - |vpiDefName:in2 + \_operation: , line:23:5, endln:23:29 + |vpiName:in2 + |vpiFullName:work@oh_mux4.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:23, endln:23:26 |vpiParent: - \_operation: , line:23:5, endln:23:29 + \_part_select: in2 (work@oh_mux4.in2), line:23:19, endln:23:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux4.N), line:23:23, endln:23:24 + \_ref_obj: (work@oh_mux4.in2.N), line:23:23, endln:23:24 |vpiParent: - \_operation: , line:23:5, endln:23:29 + \_operation: , line:23:23, endln:23:26 |vpiName:N - |vpiFullName:work@oh_mux4.N + |vpiFullName:work@oh_mux4.in2.N |vpiOperand: \_constant: , line:23:25, endln:23:26 |vpiParent: @@ -44904,7 +44538,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:24:5, endln:24:16 |vpiParent: - \_operation: , line:21:25, endln:24:29 + \_operation: , line:24:5, endln:24:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux4.N), line:24:7, endln:24:8 @@ -44924,26 +44558,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux4.sel3 |vpiOperand: - \_part_select: , line:24:19, endln:24:29 + \_part_select: in3 (work@oh_mux4.in3), line:24:19, endln:24:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux4.in3), line:24:19, endln:24:22 - |vpiParent: - \_operation: , line:24:5, endln:24:29 - |vpiName:in3 - |vpiFullName:work@oh_mux4.in3 - |vpiDefName:in3 + \_operation: , line:24:5, endln:24:29 + |vpiName:in3 + |vpiFullName:work@oh_mux4.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:23, endln:24:26 |vpiParent: - \_operation: , line:24:5, endln:24:29 + \_part_select: in3 (work@oh_mux4.in3), line:24:19, endln:24:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux4.N), line:24:23, endln:24:24 + \_ref_obj: (work@oh_mux4.in3.N), line:24:23, endln:24:24 |vpiParent: - \_operation: , line:24:5, endln:24:29 + \_operation: , line:24:23, endln:24:26 |vpiName:N - |vpiFullName:work@oh_mux4.N + |vpiFullName:work@oh_mux4.in3.N |vpiOperand: \_constant: , line:24:25, endln:24:26 |vpiParent: @@ -44959,23 +44591,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:21:11, endln:21:21 + \_part_select: out (work@oh_mux4.out), line:21:11, endln:21:21 |vpiParent: - \_ref_obj: out (work@oh_mux4.out) - |vpiParent: - \_cont_assign: , line:21:11, endln:24:30 - |vpiName:out - |vpiFullName:work@oh_mux4.out - |vpiDefName:out + \_cont_assign: , line:21:11, endln:24:30 + |vpiName:out + |vpiFullName:work@oh_mux4.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 + |vpiParent: + \_part_select: out (work@oh_mux4.out), line:21:11, endln:21:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:21:15, endln:21:16 + \_ref_obj: (work@oh_mux4.out.N), line:21:15, endln:21:16 |vpiParent: \_operation: , line:21:15, endln:21:18 |vpiName:N + |vpiFullName:work@oh_mux4.out.N |vpiOperand: \_constant: , line:21:17, endln:21:18 |vpiParent: @@ -45435,26 +45068,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:23:30, endln:23:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:23:39, endln:23:49 + \_part_select: in0 (work@oh_mux5.in0), line:23:39, endln:23:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux5.in0), line:23:39, endln:23:42 - |vpiParent: - \_operation: , line:23:25, endln:23:49 - |vpiName:in0 - |vpiFullName:work@oh_mux5.in0 - |vpiDefName:in0 + \_operation: , line:23:25, endln:23:49 + |vpiName:in0 + |vpiFullName:work@oh_mux5.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:43, endln:23:46 |vpiParent: - \_operation: , line:23:25, endln:23:49 + \_part_select: in0 (work@oh_mux5.in0), line:23:39, endln:23:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux5.N), line:23:43, endln:23:44 + \_ref_obj: (work@oh_mux5.in0.N), line:23:43, endln:23:44 |vpiParent: - \_operation: , line:23:25, endln:23:49 + \_operation: , line:23:43, endln:23:46 |vpiName:N - |vpiFullName:work@oh_mux5.N + |vpiFullName:work@oh_mux5.in0.N |vpiOperand: \_constant: , line:23:45, endln:23:46 |vpiParent: @@ -45477,7 +45108,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:24:5, endln:24:16 |vpiParent: - \_operation: , line:23:25, endln:24:29 + \_operation: , line:24:5, endln:24:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux5.N), line:24:7, endln:24:8 @@ -45497,26 +45128,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux5.sel1 |vpiOperand: - \_part_select: , line:24:19, endln:24:29 + \_part_select: in1 (work@oh_mux5.in1), line:24:19, endln:24:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux5.in1), line:24:19, endln:24:22 - |vpiParent: - \_operation: , line:24:5, endln:24:29 - |vpiName:in1 - |vpiFullName:work@oh_mux5.in1 - |vpiDefName:in1 + \_operation: , line:24:5, endln:24:29 + |vpiName:in1 + |vpiFullName:work@oh_mux5.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:23, endln:24:26 |vpiParent: - \_operation: , line:24:5, endln:24:29 + \_part_select: in1 (work@oh_mux5.in1), line:24:19, endln:24:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux5.N), line:24:23, endln:24:24 + \_ref_obj: (work@oh_mux5.in1.N), line:24:23, endln:24:24 |vpiParent: - \_operation: , line:24:5, endln:24:29 + \_operation: , line:24:23, endln:24:26 |vpiName:N - |vpiFullName:work@oh_mux5.N + |vpiFullName:work@oh_mux5.in1.N |vpiOperand: \_constant: , line:24:25, endln:24:26 |vpiParent: @@ -45539,7 +45168,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:25:5, endln:25:16 |vpiParent: - \_operation: , line:23:25, endln:25:29 + \_operation: , line:25:5, endln:25:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux5.N), line:25:7, endln:25:8 @@ -45559,26 +45188,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux5.sel2 |vpiOperand: - \_part_select: , line:25:19, endln:25:29 + \_part_select: in2 (work@oh_mux5.in2), line:25:19, endln:25:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux5.in2), line:25:19, endln:25:22 - |vpiParent: - \_operation: , line:25:5, endln:25:29 - |vpiName:in2 - |vpiFullName:work@oh_mux5.in2 - |vpiDefName:in2 + \_operation: , line:25:5, endln:25:29 + |vpiName:in2 + |vpiFullName:work@oh_mux5.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:23, endln:25:26 |vpiParent: - \_operation: , line:25:5, endln:25:29 + \_part_select: in2 (work@oh_mux5.in2), line:25:19, endln:25:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux5.N), line:25:23, endln:25:24 + \_ref_obj: (work@oh_mux5.in2.N), line:25:23, endln:25:24 |vpiParent: - \_operation: , line:25:5, endln:25:29 + \_operation: , line:25:23, endln:25:26 |vpiName:N - |vpiFullName:work@oh_mux5.N + |vpiFullName:work@oh_mux5.in2.N |vpiOperand: \_constant: , line:25:25, endln:25:26 |vpiParent: @@ -45601,7 +45228,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:26:5, endln:26:16 |vpiParent: - \_operation: , line:23:25, endln:26:29 + \_operation: , line:26:5, endln:26:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux5.N), line:26:7, endln:26:8 @@ -45621,26 +45248,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux5.sel3 |vpiOperand: - \_part_select: , line:26:19, endln:26:29 + \_part_select: in3 (work@oh_mux5.in3), line:26:19, endln:26:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux5.in3), line:26:19, endln:26:22 - |vpiParent: - \_operation: , line:26:5, endln:26:29 - |vpiName:in3 - |vpiFullName:work@oh_mux5.in3 - |vpiDefName:in3 + \_operation: , line:26:5, endln:26:29 + |vpiName:in3 + |vpiFullName:work@oh_mux5.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:23, endln:26:26 |vpiParent: - \_operation: , line:26:5, endln:26:29 + \_part_select: in3 (work@oh_mux5.in3), line:26:19, endln:26:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux5.N), line:26:23, endln:26:24 + \_ref_obj: (work@oh_mux5.in3.N), line:26:23, endln:26:24 |vpiParent: - \_operation: , line:26:5, endln:26:29 + \_operation: , line:26:23, endln:26:26 |vpiName:N - |vpiFullName:work@oh_mux5.N + |vpiFullName:work@oh_mux5.in3.N |vpiOperand: \_constant: , line:26:25, endln:26:26 |vpiParent: @@ -45663,7 +45288,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:27:5, endln:27:16 |vpiParent: - \_operation: , line:23:25, endln:27:29 + \_operation: , line:27:5, endln:27:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux5.N), line:27:7, endln:27:8 @@ -45683,26 +45308,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux5.sel4 |vpiOperand: - \_part_select: , line:27:19, endln:27:29 + \_part_select: in4 (work@oh_mux5.in4), line:27:19, endln:27:29 |vpiParent: - \_ref_obj: in4 (work@oh_mux5.in4), line:27:19, endln:27:22 - |vpiParent: - \_operation: , line:27:5, endln:27:29 - |vpiName:in4 - |vpiFullName:work@oh_mux5.in4 - |vpiDefName:in4 + \_operation: , line:27:5, endln:27:29 + |vpiName:in4 + |vpiFullName:work@oh_mux5.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:23, endln:27:26 |vpiParent: - \_operation: , line:27:5, endln:27:29 + \_part_select: in4 (work@oh_mux5.in4), line:27:19, endln:27:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux5.N), line:27:23, endln:27:24 + \_ref_obj: (work@oh_mux5.in4.N), line:27:23, endln:27:24 |vpiParent: - \_operation: , line:27:5, endln:27:29 + \_operation: , line:27:23, endln:27:26 |vpiName:N - |vpiFullName:work@oh_mux5.N + |vpiFullName:work@oh_mux5.in4.N |vpiOperand: \_constant: , line:27:25, endln:27:26 |vpiParent: @@ -45718,23 +45341,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:23:11, endln:23:21 + \_part_select: out (work@oh_mux5.out), line:23:11, endln:23:21 |vpiParent: - \_ref_obj: out (work@oh_mux5.out) - |vpiParent: - \_cont_assign: , line:23:11, endln:27:30 - |vpiName:out - |vpiFullName:work@oh_mux5.out - |vpiDefName:out + \_cont_assign: , line:23:11, endln:27:30 + |vpiName:out + |vpiFullName:work@oh_mux5.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:23:15, endln:23:18 + |vpiParent: + \_part_select: out (work@oh_mux5.out), line:23:11, endln:23:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:23:15, endln:23:16 + \_ref_obj: (work@oh_mux5.out.N), line:23:15, endln:23:16 |vpiParent: \_operation: , line:23:15, endln:23:18 |vpiName:N + |vpiFullName:work@oh_mux5.out.N |vpiOperand: \_constant: , line:23:17, endln:23:18 |vpiParent: @@ -46263,26 +45887,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:25:30, endln:25:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:25:39, endln:25:49 + \_part_select: in0 (work@oh_mux6.in0), line:25:39, endln:25:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux6.in0), line:25:39, endln:25:42 - |vpiParent: - \_operation: , line:25:25, endln:25:49 - |vpiName:in0 - |vpiFullName:work@oh_mux6.in0 - |vpiDefName:in0 + \_operation: , line:25:25, endln:25:49 + |vpiName:in0 + |vpiFullName:work@oh_mux6.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:43, endln:25:46 |vpiParent: - \_operation: , line:25:25, endln:25:49 + \_part_select: in0 (work@oh_mux6.in0), line:25:39, endln:25:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:25:43, endln:25:44 + \_ref_obj: (work@oh_mux6.in0.N), line:25:43, endln:25:44 |vpiParent: - \_operation: , line:25:25, endln:25:49 + \_operation: , line:25:43, endln:25:46 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in0.N |vpiOperand: \_constant: , line:25:45, endln:25:46 |vpiParent: @@ -46305,7 +45927,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:26:5, endln:26:16 |vpiParent: - \_operation: , line:25:25, endln:26:29 + \_operation: , line:26:5, endln:26:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux6.N), line:26:7, endln:26:8 @@ -46325,26 +45947,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux6.sel1 |vpiOperand: - \_part_select: , line:26:19, endln:26:29 + \_part_select: in1 (work@oh_mux6.in1), line:26:19, endln:26:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux6.in1), line:26:19, endln:26:22 - |vpiParent: - \_operation: , line:26:5, endln:26:29 - |vpiName:in1 - |vpiFullName:work@oh_mux6.in1 - |vpiDefName:in1 + \_operation: , line:26:5, endln:26:29 + |vpiName:in1 + |vpiFullName:work@oh_mux6.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:23, endln:26:26 |vpiParent: - \_operation: , line:26:5, endln:26:29 + \_part_select: in1 (work@oh_mux6.in1), line:26:19, endln:26:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:26:23, endln:26:24 + \_ref_obj: (work@oh_mux6.in1.N), line:26:23, endln:26:24 |vpiParent: - \_operation: , line:26:5, endln:26:29 + \_operation: , line:26:23, endln:26:26 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in1.N |vpiOperand: \_constant: , line:26:25, endln:26:26 |vpiParent: @@ -46367,7 +45987,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:27:5, endln:27:16 |vpiParent: - \_operation: , line:25:25, endln:27:29 + \_operation: , line:27:5, endln:27:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux6.N), line:27:7, endln:27:8 @@ -46387,26 +46007,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux6.sel2 |vpiOperand: - \_part_select: , line:27:19, endln:27:29 + \_part_select: in2 (work@oh_mux6.in2), line:27:19, endln:27:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux6.in2), line:27:19, endln:27:22 - |vpiParent: - \_operation: , line:27:5, endln:27:29 - |vpiName:in2 - |vpiFullName:work@oh_mux6.in2 - |vpiDefName:in2 + \_operation: , line:27:5, endln:27:29 + |vpiName:in2 + |vpiFullName:work@oh_mux6.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:23, endln:27:26 |vpiParent: - \_operation: , line:27:5, endln:27:29 + \_part_select: in2 (work@oh_mux6.in2), line:27:19, endln:27:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:27:23, endln:27:24 + \_ref_obj: (work@oh_mux6.in2.N), line:27:23, endln:27:24 |vpiParent: - \_operation: , line:27:5, endln:27:29 + \_operation: , line:27:23, endln:27:26 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in2.N |vpiOperand: \_constant: , line:27:25, endln:27:26 |vpiParent: @@ -46429,7 +46047,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:28:5, endln:28:16 |vpiParent: - \_operation: , line:25:25, endln:28:29 + \_operation: , line:28:5, endln:28:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux6.N), line:28:7, endln:28:8 @@ -46449,26 +46067,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux6.sel3 |vpiOperand: - \_part_select: , line:28:19, endln:28:29 + \_part_select: in3 (work@oh_mux6.in3), line:28:19, endln:28:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux6.in3), line:28:19, endln:28:22 - |vpiParent: - \_operation: , line:28:5, endln:28:29 - |vpiName:in3 - |vpiFullName:work@oh_mux6.in3 - |vpiDefName:in3 + \_operation: , line:28:5, endln:28:29 + |vpiName:in3 + |vpiFullName:work@oh_mux6.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:23, endln:28:26 |vpiParent: - \_operation: , line:28:5, endln:28:29 + \_part_select: in3 (work@oh_mux6.in3), line:28:19, endln:28:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:28:23, endln:28:24 + \_ref_obj: (work@oh_mux6.in3.N), line:28:23, endln:28:24 |vpiParent: - \_operation: , line:28:5, endln:28:29 + \_operation: , line:28:23, endln:28:26 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in3.N |vpiOperand: \_constant: , line:28:25, endln:28:26 |vpiParent: @@ -46491,7 +46107,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:29:5, endln:29:16 |vpiParent: - \_operation: , line:25:25, endln:29:29 + \_operation: , line:29:5, endln:29:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux6.N), line:29:7, endln:29:8 @@ -46511,26 +46127,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux6.sel4 |vpiOperand: - \_part_select: , line:29:19, endln:29:29 + \_part_select: in4 (work@oh_mux6.in4), line:29:19, endln:29:29 |vpiParent: - \_ref_obj: in4 (work@oh_mux6.in4), line:29:19, endln:29:22 - |vpiParent: - \_operation: , line:29:5, endln:29:29 - |vpiName:in4 - |vpiFullName:work@oh_mux6.in4 - |vpiDefName:in4 + \_operation: , line:29:5, endln:29:29 + |vpiName:in4 + |vpiFullName:work@oh_mux6.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:23, endln:29:26 |vpiParent: - \_operation: , line:29:5, endln:29:29 + \_part_select: in4 (work@oh_mux6.in4), line:29:19, endln:29:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:29:23, endln:29:24 + \_ref_obj: (work@oh_mux6.in4.N), line:29:23, endln:29:24 |vpiParent: - \_operation: , line:29:5, endln:29:29 + \_operation: , line:29:23, endln:29:26 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in4.N |vpiOperand: \_constant: , line:29:25, endln:29:26 |vpiParent: @@ -46553,7 +46167,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:30:5, endln:30:16 |vpiParent: - \_operation: , line:25:25, endln:30:29 + \_operation: , line:30:5, endln:30:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux6.N), line:30:7, endln:30:8 @@ -46573,26 +46187,24 @@ design: (work@oh_fifo_async) |vpiName:sel5 |vpiFullName:work@oh_mux6.sel5 |vpiOperand: - \_part_select: , line:30:19, endln:30:29 + \_part_select: in5 (work@oh_mux6.in5), line:30:19, endln:30:29 |vpiParent: - \_ref_obj: in5 (work@oh_mux6.in5), line:30:19, endln:30:22 - |vpiParent: - \_operation: , line:30:5, endln:30:29 - |vpiName:in5 - |vpiFullName:work@oh_mux6.in5 - |vpiDefName:in5 + \_operation: , line:30:5, endln:30:29 + |vpiName:in5 + |vpiFullName:work@oh_mux6.in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:23, endln:30:26 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_part_select: in5 (work@oh_mux6.in5), line:30:19, endln:30:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux6.N), line:30:23, endln:30:24 + \_ref_obj: (work@oh_mux6.in5.N), line:30:23, endln:30:24 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_operation: , line:30:23, endln:30:26 |vpiName:N - |vpiFullName:work@oh_mux6.N + |vpiFullName:work@oh_mux6.in5.N |vpiOperand: \_constant: , line:30:25, endln:30:26 |vpiParent: @@ -46608,23 +46220,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:25:11, endln:25:21 + \_part_select: out (work@oh_mux6.out), line:25:11, endln:25:21 |vpiParent: - \_ref_obj: out (work@oh_mux6.out) - |vpiParent: - \_cont_assign: , line:25:11, endln:30:30 - |vpiName:out - |vpiFullName:work@oh_mux6.out - |vpiDefName:out + \_cont_assign: , line:25:11, endln:30:30 + |vpiName:out + |vpiFullName:work@oh_mux6.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:15, endln:25:18 + |vpiParent: + \_part_select: out (work@oh_mux6.out), line:25:11, endln:25:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:25:15, endln:25:16 + \_ref_obj: (work@oh_mux6.out.N), line:25:15, endln:25:16 |vpiParent: \_operation: , line:25:15, endln:25:18 |vpiName:N + |vpiFullName:work@oh_mux6.out.N |vpiOperand: \_constant: , line:25:17, endln:25:18 |vpiParent: @@ -47222,26 +46835,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:27:30, endln:27:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:27:39, endln:27:49 + \_part_select: in0 (work@oh_mux7.in0), line:27:39, endln:27:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux7.in0), line:27:39, endln:27:42 - |vpiParent: - \_operation: , line:27:25, endln:27:49 - |vpiName:in0 - |vpiFullName:work@oh_mux7.in0 - |vpiDefName:in0 + \_operation: , line:27:25, endln:27:49 + |vpiName:in0 + |vpiFullName:work@oh_mux7.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:43, endln:27:46 |vpiParent: - \_operation: , line:27:25, endln:27:49 + \_part_select: in0 (work@oh_mux7.in0), line:27:39, endln:27:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:27:43, endln:27:44 + \_ref_obj: (work@oh_mux7.in0.N), line:27:43, endln:27:44 |vpiParent: - \_operation: , line:27:25, endln:27:49 + \_operation: , line:27:43, endln:27:46 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in0.N |vpiOperand: \_constant: , line:27:45, endln:27:46 |vpiParent: @@ -47264,7 +46875,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:28:5, endln:28:16 |vpiParent: - \_operation: , line:27:25, endln:28:29 + \_operation: , line:28:5, endln:28:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:28:7, endln:28:8 @@ -47284,26 +46895,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux7.sel1 |vpiOperand: - \_part_select: , line:28:19, endln:28:29 + \_part_select: in1 (work@oh_mux7.in1), line:28:19, endln:28:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux7.in1), line:28:19, endln:28:22 - |vpiParent: - \_operation: , line:28:5, endln:28:29 - |vpiName:in1 - |vpiFullName:work@oh_mux7.in1 - |vpiDefName:in1 + \_operation: , line:28:5, endln:28:29 + |vpiName:in1 + |vpiFullName:work@oh_mux7.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:23, endln:28:26 |vpiParent: - \_operation: , line:28:5, endln:28:29 + \_part_select: in1 (work@oh_mux7.in1), line:28:19, endln:28:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:28:23, endln:28:24 + \_ref_obj: (work@oh_mux7.in1.N), line:28:23, endln:28:24 |vpiParent: - \_operation: , line:28:5, endln:28:29 + \_operation: , line:28:23, endln:28:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in1.N |vpiOperand: \_constant: , line:28:25, endln:28:26 |vpiParent: @@ -47326,7 +46935,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:29:5, endln:29:16 |vpiParent: - \_operation: , line:27:25, endln:29:29 + \_operation: , line:29:5, endln:29:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:29:7, endln:29:8 @@ -47346,26 +46955,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux7.sel2 |vpiOperand: - \_part_select: , line:29:19, endln:29:29 + \_part_select: in2 (work@oh_mux7.in2), line:29:19, endln:29:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux7.in2), line:29:19, endln:29:22 - |vpiParent: - \_operation: , line:29:5, endln:29:29 - |vpiName:in2 - |vpiFullName:work@oh_mux7.in2 - |vpiDefName:in2 + \_operation: , line:29:5, endln:29:29 + |vpiName:in2 + |vpiFullName:work@oh_mux7.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:23, endln:29:26 |vpiParent: - \_operation: , line:29:5, endln:29:29 + \_part_select: in2 (work@oh_mux7.in2), line:29:19, endln:29:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:29:23, endln:29:24 + \_ref_obj: (work@oh_mux7.in2.N), line:29:23, endln:29:24 |vpiParent: - \_operation: , line:29:5, endln:29:29 + \_operation: , line:29:23, endln:29:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in2.N |vpiOperand: \_constant: , line:29:25, endln:29:26 |vpiParent: @@ -47388,7 +46995,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:30:5, endln:30:16 |vpiParent: - \_operation: , line:27:25, endln:30:29 + \_operation: , line:30:5, endln:30:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:30:7, endln:30:8 @@ -47408,26 +47015,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux7.sel3 |vpiOperand: - \_part_select: , line:30:19, endln:30:29 + \_part_select: in3 (work@oh_mux7.in3), line:30:19, endln:30:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux7.in3), line:30:19, endln:30:22 - |vpiParent: - \_operation: , line:30:5, endln:30:29 - |vpiName:in3 - |vpiFullName:work@oh_mux7.in3 - |vpiDefName:in3 + \_operation: , line:30:5, endln:30:29 + |vpiName:in3 + |vpiFullName:work@oh_mux7.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:23, endln:30:26 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_part_select: in3 (work@oh_mux7.in3), line:30:19, endln:30:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:30:23, endln:30:24 + \_ref_obj: (work@oh_mux7.in3.N), line:30:23, endln:30:24 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_operation: , line:30:23, endln:30:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in3.N |vpiOperand: \_constant: , line:30:25, endln:30:26 |vpiParent: @@ -47450,7 +47055,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:31:5, endln:31:16 |vpiParent: - \_operation: , line:27:25, endln:31:29 + \_operation: , line:31:5, endln:31:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:31:7, endln:31:8 @@ -47470,26 +47075,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux7.sel4 |vpiOperand: - \_part_select: , line:31:19, endln:31:29 + \_part_select: in4 (work@oh_mux7.in4), line:31:19, endln:31:29 |vpiParent: - \_ref_obj: in4 (work@oh_mux7.in4), line:31:19, endln:31:22 - |vpiParent: - \_operation: , line:31:5, endln:31:29 - |vpiName:in4 - |vpiFullName:work@oh_mux7.in4 - |vpiDefName:in4 + \_operation: , line:31:5, endln:31:29 + |vpiName:in4 + |vpiFullName:work@oh_mux7.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:23, endln:31:26 |vpiParent: - \_operation: , line:31:5, endln:31:29 + \_part_select: in4 (work@oh_mux7.in4), line:31:19, endln:31:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:31:23, endln:31:24 + \_ref_obj: (work@oh_mux7.in4.N), line:31:23, endln:31:24 |vpiParent: - \_operation: , line:31:5, endln:31:29 + \_operation: , line:31:23, endln:31:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in4.N |vpiOperand: \_constant: , line:31:25, endln:31:26 |vpiParent: @@ -47512,7 +47115,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:32:5, endln:32:16 |vpiParent: - \_operation: , line:27:25, endln:32:29 + \_operation: , line:32:5, endln:32:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:32:7, endln:32:8 @@ -47532,26 +47135,24 @@ design: (work@oh_fifo_async) |vpiName:sel5 |vpiFullName:work@oh_mux7.sel5 |vpiOperand: - \_part_select: , line:32:19, endln:32:29 + \_part_select: in5 (work@oh_mux7.in5), line:32:19, endln:32:29 |vpiParent: - \_ref_obj: in5 (work@oh_mux7.in5), line:32:19, endln:32:22 - |vpiParent: - \_operation: , line:32:5, endln:32:29 - |vpiName:in5 - |vpiFullName:work@oh_mux7.in5 - |vpiDefName:in5 + \_operation: , line:32:5, endln:32:29 + |vpiName:in5 + |vpiFullName:work@oh_mux7.in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:23, endln:32:26 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_part_select: in5 (work@oh_mux7.in5), line:32:19, endln:32:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:32:23, endln:32:24 + \_ref_obj: (work@oh_mux7.in5.N), line:32:23, endln:32:24 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_operation: , line:32:23, endln:32:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in5.N |vpiOperand: \_constant: , line:32:25, endln:32:26 |vpiParent: @@ -47574,7 +47175,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:33:5, endln:33:16 |vpiParent: - \_operation: , line:27:25, endln:33:29 + \_operation: , line:33:5, endln:33:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux7.N), line:33:7, endln:33:8 @@ -47594,26 +47195,24 @@ design: (work@oh_fifo_async) |vpiName:sel6 |vpiFullName:work@oh_mux7.sel6 |vpiOperand: - \_part_select: , line:33:19, endln:33:29 + \_part_select: in6 (work@oh_mux7.in6), line:33:19, endln:33:29 |vpiParent: - \_ref_obj: in6 (work@oh_mux7.in6), line:33:19, endln:33:22 - |vpiParent: - \_operation: , line:33:5, endln:33:29 - |vpiName:in6 - |vpiFullName:work@oh_mux7.in6 - |vpiDefName:in6 + \_operation: , line:33:5, endln:33:29 + |vpiName:in6 + |vpiFullName:work@oh_mux7.in6 + |vpiDefName:in6 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:23, endln:33:26 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_part_select: in6 (work@oh_mux7.in6), line:33:19, endln:33:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux7.N), line:33:23, endln:33:24 + \_ref_obj: (work@oh_mux7.in6.N), line:33:23, endln:33:24 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_operation: , line:33:23, endln:33:26 |vpiName:N - |vpiFullName:work@oh_mux7.N + |vpiFullName:work@oh_mux7.in6.N |vpiOperand: \_constant: , line:33:25, endln:33:26 |vpiParent: @@ -47629,23 +47228,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:27:11, endln:27:21 + \_part_select: out (work@oh_mux7.out), line:27:11, endln:27:21 |vpiParent: - \_ref_obj: out (work@oh_mux7.out) - |vpiParent: - \_cont_assign: , line:27:11, endln:33:30 - |vpiName:out - |vpiFullName:work@oh_mux7.out - |vpiDefName:out + \_cont_assign: , line:27:11, endln:33:30 + |vpiName:out + |vpiFullName:work@oh_mux7.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:15, endln:27:18 + |vpiParent: + \_part_select: out (work@oh_mux7.out), line:27:11, endln:27:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:27:15, endln:27:16 + \_ref_obj: (work@oh_mux7.out.N), line:27:15, endln:27:16 |vpiParent: \_operation: , line:27:15, endln:27:18 |vpiName:N + |vpiFullName:work@oh_mux7.out.N |vpiOperand: \_constant: , line:27:17, endln:27:18 |vpiParent: @@ -48312,26 +47912,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:29:30, endln:29:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:29:39, endln:29:49 + \_part_select: in0 (work@oh_mux8.in0), line:29:39, endln:29:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux8.in0), line:29:39, endln:29:42 - |vpiParent: - \_operation: , line:29:25, endln:29:49 - |vpiName:in0 - |vpiFullName:work@oh_mux8.in0 - |vpiDefName:in0 + \_operation: , line:29:25, endln:29:49 + |vpiName:in0 + |vpiFullName:work@oh_mux8.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:43, endln:29:46 |vpiParent: - \_operation: , line:29:25, endln:29:49 + \_part_select: in0 (work@oh_mux8.in0), line:29:39, endln:29:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:29:43, endln:29:44 + \_ref_obj: (work@oh_mux8.in0.N), line:29:43, endln:29:44 |vpiParent: - \_operation: , line:29:25, endln:29:49 + \_operation: , line:29:43, endln:29:46 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in0.N |vpiOperand: \_constant: , line:29:45, endln:29:46 |vpiParent: @@ -48354,7 +47952,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:30:5, endln:30:16 |vpiParent: - \_operation: , line:29:25, endln:30:29 + \_operation: , line:30:5, endln:30:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:30:7, endln:30:8 @@ -48374,26 +47972,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux8.sel1 |vpiOperand: - \_part_select: , line:30:19, endln:30:29 + \_part_select: in1 (work@oh_mux8.in1), line:30:19, endln:30:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux8.in1), line:30:19, endln:30:22 - |vpiParent: - \_operation: , line:30:5, endln:30:29 - |vpiName:in1 - |vpiFullName:work@oh_mux8.in1 - |vpiDefName:in1 + \_operation: , line:30:5, endln:30:29 + |vpiName:in1 + |vpiFullName:work@oh_mux8.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:23, endln:30:26 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_part_select: in1 (work@oh_mux8.in1), line:30:19, endln:30:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:30:23, endln:30:24 + \_ref_obj: (work@oh_mux8.in1.N), line:30:23, endln:30:24 |vpiParent: - \_operation: , line:30:5, endln:30:29 + \_operation: , line:30:23, endln:30:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in1.N |vpiOperand: \_constant: , line:30:25, endln:30:26 |vpiParent: @@ -48416,7 +48012,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:31:5, endln:31:16 |vpiParent: - \_operation: , line:29:25, endln:31:29 + \_operation: , line:31:5, endln:31:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:31:7, endln:31:8 @@ -48436,26 +48032,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux8.sel2 |vpiOperand: - \_part_select: , line:31:19, endln:31:29 + \_part_select: in2 (work@oh_mux8.in2), line:31:19, endln:31:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux8.in2), line:31:19, endln:31:22 - |vpiParent: - \_operation: , line:31:5, endln:31:29 - |vpiName:in2 - |vpiFullName:work@oh_mux8.in2 - |vpiDefName:in2 + \_operation: , line:31:5, endln:31:29 + |vpiName:in2 + |vpiFullName:work@oh_mux8.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:23, endln:31:26 |vpiParent: - \_operation: , line:31:5, endln:31:29 + \_part_select: in2 (work@oh_mux8.in2), line:31:19, endln:31:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:31:23, endln:31:24 + \_ref_obj: (work@oh_mux8.in2.N), line:31:23, endln:31:24 |vpiParent: - \_operation: , line:31:5, endln:31:29 + \_operation: , line:31:23, endln:31:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in2.N |vpiOperand: \_constant: , line:31:25, endln:31:26 |vpiParent: @@ -48478,7 +48072,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:32:5, endln:32:16 |vpiParent: - \_operation: , line:29:25, endln:32:29 + \_operation: , line:32:5, endln:32:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:32:7, endln:32:8 @@ -48498,26 +48092,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux8.sel3 |vpiOperand: - \_part_select: , line:32:19, endln:32:29 + \_part_select: in3 (work@oh_mux8.in3), line:32:19, endln:32:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux8.in3), line:32:19, endln:32:22 - |vpiParent: - \_operation: , line:32:5, endln:32:29 - |vpiName:in3 - |vpiFullName:work@oh_mux8.in3 - |vpiDefName:in3 + \_operation: , line:32:5, endln:32:29 + |vpiName:in3 + |vpiFullName:work@oh_mux8.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:23, endln:32:26 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_part_select: in3 (work@oh_mux8.in3), line:32:19, endln:32:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:32:23, endln:32:24 + \_ref_obj: (work@oh_mux8.in3.N), line:32:23, endln:32:24 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_operation: , line:32:23, endln:32:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in3.N |vpiOperand: \_constant: , line:32:25, endln:32:26 |vpiParent: @@ -48540,7 +48132,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:33:5, endln:33:16 |vpiParent: - \_operation: , line:29:25, endln:33:29 + \_operation: , line:33:5, endln:33:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:33:7, endln:33:8 @@ -48560,26 +48152,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux8.sel4 |vpiOperand: - \_part_select: , line:33:19, endln:33:29 + \_part_select: in4 (work@oh_mux8.in4), line:33:19, endln:33:29 |vpiParent: - \_ref_obj: in4 (work@oh_mux8.in4), line:33:19, endln:33:22 - |vpiParent: - \_operation: , line:33:5, endln:33:29 - |vpiName:in4 - |vpiFullName:work@oh_mux8.in4 - |vpiDefName:in4 + \_operation: , line:33:5, endln:33:29 + |vpiName:in4 + |vpiFullName:work@oh_mux8.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:23, endln:33:26 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_part_select: in4 (work@oh_mux8.in4), line:33:19, endln:33:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:33:23, endln:33:24 + \_ref_obj: (work@oh_mux8.in4.N), line:33:23, endln:33:24 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_operation: , line:33:23, endln:33:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in4.N |vpiOperand: \_constant: , line:33:25, endln:33:26 |vpiParent: @@ -48602,7 +48192,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:34:5, endln:34:16 |vpiParent: - \_operation: , line:29:25, endln:34:29 + \_operation: , line:34:5, endln:34:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:34:7, endln:34:8 @@ -48622,26 +48212,24 @@ design: (work@oh_fifo_async) |vpiName:sel5 |vpiFullName:work@oh_mux8.sel5 |vpiOperand: - \_part_select: , line:34:19, endln:34:29 + \_part_select: in5 (work@oh_mux8.in5), line:34:19, endln:34:29 |vpiParent: - \_ref_obj: in5 (work@oh_mux8.in5), line:34:19, endln:34:22 - |vpiParent: - \_operation: , line:34:5, endln:34:29 - |vpiName:in5 - |vpiFullName:work@oh_mux8.in5 - |vpiDefName:in5 + \_operation: , line:34:5, endln:34:29 + |vpiName:in5 + |vpiFullName:work@oh_mux8.in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:23, endln:34:26 |vpiParent: - \_operation: , line:34:5, endln:34:29 + \_part_select: in5 (work@oh_mux8.in5), line:34:19, endln:34:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:34:23, endln:34:24 + \_ref_obj: (work@oh_mux8.in5.N), line:34:23, endln:34:24 |vpiParent: - \_operation: , line:34:5, endln:34:29 + \_operation: , line:34:23, endln:34:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in5.N |vpiOperand: \_constant: , line:34:25, endln:34:26 |vpiParent: @@ -48664,7 +48252,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:35:5, endln:35:16 |vpiParent: - \_operation: , line:29:25, endln:35:29 + \_operation: , line:35:5, endln:35:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:35:7, endln:35:8 @@ -48684,26 +48272,24 @@ design: (work@oh_fifo_async) |vpiName:sel6 |vpiFullName:work@oh_mux8.sel6 |vpiOperand: - \_part_select: , line:35:19, endln:35:29 + \_part_select: in6 (work@oh_mux8.in6), line:35:19, endln:35:29 |vpiParent: - \_ref_obj: in6 (work@oh_mux8.in6), line:35:19, endln:35:22 - |vpiParent: - \_operation: , line:35:5, endln:35:29 - |vpiName:in6 - |vpiFullName:work@oh_mux8.in6 - |vpiDefName:in6 + \_operation: , line:35:5, endln:35:29 + |vpiName:in6 + |vpiFullName:work@oh_mux8.in6 + |vpiDefName:in6 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:23, endln:35:26 |vpiParent: - \_operation: , line:35:5, endln:35:29 + \_part_select: in6 (work@oh_mux8.in6), line:35:19, endln:35:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:35:23, endln:35:24 + \_ref_obj: (work@oh_mux8.in6.N), line:35:23, endln:35:24 |vpiParent: - \_operation: , line:35:5, endln:35:29 + \_operation: , line:35:23, endln:35:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in6.N |vpiOperand: \_constant: , line:35:25, endln:35:26 |vpiParent: @@ -48726,7 +48312,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:36:5, endln:36:16 |vpiParent: - \_operation: , line:29:25, endln:36:29 + \_operation: , line:36:5, endln:36:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux8.N), line:36:7, endln:36:8 @@ -48746,26 +48332,24 @@ design: (work@oh_fifo_async) |vpiName:sel7 |vpiFullName:work@oh_mux8.sel7 |vpiOperand: - \_part_select: , line:36:19, endln:36:29 + \_part_select: in7 (work@oh_mux8.in7), line:36:19, endln:36:29 |vpiParent: - \_ref_obj: in7 (work@oh_mux8.in7), line:36:19, endln:36:22 - |vpiParent: - \_operation: , line:36:5, endln:36:29 - |vpiName:in7 - |vpiFullName:work@oh_mux8.in7 - |vpiDefName:in7 + \_operation: , line:36:5, endln:36:29 + |vpiName:in7 + |vpiFullName:work@oh_mux8.in7 + |vpiDefName:in7 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:23, endln:36:26 |vpiParent: - \_operation: , line:36:5, endln:36:29 + \_part_select: in7 (work@oh_mux8.in7), line:36:19, endln:36:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux8.N), line:36:23, endln:36:24 + \_ref_obj: (work@oh_mux8.in7.N), line:36:23, endln:36:24 |vpiParent: - \_operation: , line:36:5, endln:36:29 + \_operation: , line:36:23, endln:36:26 |vpiName:N - |vpiFullName:work@oh_mux8.N + |vpiFullName:work@oh_mux8.in7.N |vpiOperand: \_constant: , line:36:25, endln:36:26 |vpiParent: @@ -48781,23 +48365,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:29:11, endln:29:21 + \_part_select: out (work@oh_mux8.out), line:29:11, endln:29:21 |vpiParent: - \_ref_obj: out (work@oh_mux8.out) - |vpiParent: - \_cont_assign: , line:29:11, endln:36:30 - |vpiName:out - |vpiFullName:work@oh_mux8.out - |vpiDefName:out + \_cont_assign: , line:29:11, endln:36:30 + |vpiName:out + |vpiFullName:work@oh_mux8.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:15, endln:29:18 + |vpiParent: + \_part_select: out (work@oh_mux8.out), line:29:11, endln:29:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:15, endln:29:16 + \_ref_obj: (work@oh_mux8.out.N), line:29:15, endln:29:16 |vpiParent: \_operation: , line:29:15, endln:29:18 |vpiName:N + |vpiFullName:work@oh_mux8.out.N |vpiOperand: \_constant: , line:29:17, endln:29:18 |vpiParent: @@ -49533,26 +49118,24 @@ design: (work@oh_fifo_async) \_ref_obj: (sel0), line:31:30, endln:31:34 |vpiName:sel0 |vpiOperand: - \_part_select: , line:31:39, endln:31:49 + \_part_select: in0 (work@oh_mux9.in0), line:31:39, endln:31:49 |vpiParent: - \_ref_obj: in0 (work@oh_mux9.in0), line:31:39, endln:31:42 - |vpiParent: - \_operation: , line:31:25, endln:31:49 - |vpiName:in0 - |vpiFullName:work@oh_mux9.in0 - |vpiDefName:in0 + \_operation: , line:31:25, endln:31:49 + |vpiName:in0 + |vpiFullName:work@oh_mux9.in0 + |vpiDefName:in0 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:43, endln:31:46 |vpiParent: - \_operation: , line:31:25, endln:31:49 + \_part_select: in0 (work@oh_mux9.in0), line:31:39, endln:31:49 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:31:43, endln:31:44 + \_ref_obj: (work@oh_mux9.in0.N), line:31:43, endln:31:44 |vpiParent: - \_operation: , line:31:25, endln:31:49 + \_operation: , line:31:43, endln:31:46 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in0.N |vpiOperand: \_constant: , line:31:45, endln:31:46 |vpiParent: @@ -49575,7 +49158,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:32:5, endln:32:16 |vpiParent: - \_operation: , line:31:25, endln:32:29 + \_operation: , line:32:5, endln:32:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:32:7, endln:32:8 @@ -49595,26 +49178,24 @@ design: (work@oh_fifo_async) |vpiName:sel1 |vpiFullName:work@oh_mux9.sel1 |vpiOperand: - \_part_select: , line:32:19, endln:32:29 + \_part_select: in1 (work@oh_mux9.in1), line:32:19, endln:32:29 |vpiParent: - \_ref_obj: in1 (work@oh_mux9.in1), line:32:19, endln:32:22 - |vpiParent: - \_operation: , line:32:5, endln:32:29 - |vpiName:in1 - |vpiFullName:work@oh_mux9.in1 - |vpiDefName:in1 + \_operation: , line:32:5, endln:32:29 + |vpiName:in1 + |vpiFullName:work@oh_mux9.in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:23, endln:32:26 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_part_select: in1 (work@oh_mux9.in1), line:32:19, endln:32:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:32:23, endln:32:24 + \_ref_obj: (work@oh_mux9.in1.N), line:32:23, endln:32:24 |vpiParent: - \_operation: , line:32:5, endln:32:29 + \_operation: , line:32:23, endln:32:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in1.N |vpiOperand: \_constant: , line:32:25, endln:32:26 |vpiParent: @@ -49637,7 +49218,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:33:5, endln:33:16 |vpiParent: - \_operation: , line:31:25, endln:33:29 + \_operation: , line:33:5, endln:33:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:33:7, endln:33:8 @@ -49657,26 +49238,24 @@ design: (work@oh_fifo_async) |vpiName:sel2 |vpiFullName:work@oh_mux9.sel2 |vpiOperand: - \_part_select: , line:33:19, endln:33:29 + \_part_select: in2 (work@oh_mux9.in2), line:33:19, endln:33:29 |vpiParent: - \_ref_obj: in2 (work@oh_mux9.in2), line:33:19, endln:33:22 - |vpiParent: - \_operation: , line:33:5, endln:33:29 - |vpiName:in2 - |vpiFullName:work@oh_mux9.in2 - |vpiDefName:in2 + \_operation: , line:33:5, endln:33:29 + |vpiName:in2 + |vpiFullName:work@oh_mux9.in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:23, endln:33:26 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_part_select: in2 (work@oh_mux9.in2), line:33:19, endln:33:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:33:23, endln:33:24 + \_ref_obj: (work@oh_mux9.in2.N), line:33:23, endln:33:24 |vpiParent: - \_operation: , line:33:5, endln:33:29 + \_operation: , line:33:23, endln:33:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in2.N |vpiOperand: \_constant: , line:33:25, endln:33:26 |vpiParent: @@ -49699,7 +49278,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:34:5, endln:34:16 |vpiParent: - \_operation: , line:31:25, endln:34:29 + \_operation: , line:34:5, endln:34:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:34:7, endln:34:8 @@ -49719,26 +49298,24 @@ design: (work@oh_fifo_async) |vpiName:sel3 |vpiFullName:work@oh_mux9.sel3 |vpiOperand: - \_part_select: , line:34:19, endln:34:29 + \_part_select: in3 (work@oh_mux9.in3), line:34:19, endln:34:29 |vpiParent: - \_ref_obj: in3 (work@oh_mux9.in3), line:34:19, endln:34:22 - |vpiParent: - \_operation: , line:34:5, endln:34:29 - |vpiName:in3 - |vpiFullName:work@oh_mux9.in3 - |vpiDefName:in3 + \_operation: , line:34:5, endln:34:29 + |vpiName:in3 + |vpiFullName:work@oh_mux9.in3 + |vpiDefName:in3 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:23, endln:34:26 |vpiParent: - \_operation: , line:34:5, endln:34:29 + \_part_select: in3 (work@oh_mux9.in3), line:34:19, endln:34:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:34:23, endln:34:24 + \_ref_obj: (work@oh_mux9.in3.N), line:34:23, endln:34:24 |vpiParent: - \_operation: , line:34:5, endln:34:29 + \_operation: , line:34:23, endln:34:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in3.N |vpiOperand: \_constant: , line:34:25, endln:34:26 |vpiParent: @@ -49761,7 +49338,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:35:5, endln:35:16 |vpiParent: - \_operation: , line:31:25, endln:35:29 + \_operation: , line:35:5, endln:35:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:35:7, endln:35:8 @@ -49781,26 +49358,24 @@ design: (work@oh_fifo_async) |vpiName:sel4 |vpiFullName:work@oh_mux9.sel4 |vpiOperand: - \_part_select: , line:35:19, endln:35:29 + \_part_select: in4 (work@oh_mux9.in4), line:35:19, endln:35:29 |vpiParent: - \_ref_obj: in4 (work@oh_mux9.in4), line:35:19, endln:35:22 - |vpiParent: - \_operation: , line:35:5, endln:35:29 - |vpiName:in4 - |vpiFullName:work@oh_mux9.in4 - |vpiDefName:in4 + \_operation: , line:35:5, endln:35:29 + |vpiName:in4 + |vpiFullName:work@oh_mux9.in4 + |vpiDefName:in4 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:35:23, endln:35:26 |vpiParent: - \_operation: , line:35:5, endln:35:29 + \_part_select: in4 (work@oh_mux9.in4), line:35:19, endln:35:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:35:23, endln:35:24 + \_ref_obj: (work@oh_mux9.in4.N), line:35:23, endln:35:24 |vpiParent: - \_operation: , line:35:5, endln:35:29 + \_operation: , line:35:23, endln:35:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in4.N |vpiOperand: \_constant: , line:35:25, endln:35:26 |vpiParent: @@ -49823,7 +49398,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:36:5, endln:36:16 |vpiParent: - \_operation: , line:31:25, endln:36:29 + \_operation: , line:36:5, endln:36:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:36:7, endln:36:8 @@ -49843,26 +49418,24 @@ design: (work@oh_fifo_async) |vpiName:sel5 |vpiFullName:work@oh_mux9.sel5 |vpiOperand: - \_part_select: , line:36:19, endln:36:29 + \_part_select: in5 (work@oh_mux9.in5), line:36:19, endln:36:29 |vpiParent: - \_ref_obj: in5 (work@oh_mux9.in5), line:36:19, endln:36:22 - |vpiParent: - \_operation: , line:36:5, endln:36:29 - |vpiName:in5 - |vpiFullName:work@oh_mux9.in5 - |vpiDefName:in5 + \_operation: , line:36:5, endln:36:29 + |vpiName:in5 + |vpiFullName:work@oh_mux9.in5 + |vpiDefName:in5 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:23, endln:36:26 |vpiParent: - \_operation: , line:36:5, endln:36:29 + \_part_select: in5 (work@oh_mux9.in5), line:36:19, endln:36:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:36:23, endln:36:24 + \_ref_obj: (work@oh_mux9.in5.N), line:36:23, endln:36:24 |vpiParent: - \_operation: , line:36:5, endln:36:29 + \_operation: , line:36:23, endln:36:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in5.N |vpiOperand: \_constant: , line:36:25, endln:36:26 |vpiParent: @@ -49885,7 +49458,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:37:5, endln:37:16 |vpiParent: - \_operation: , line:31:25, endln:37:29 + \_operation: , line:37:5, endln:37:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:37:7, endln:37:8 @@ -49905,26 +49478,24 @@ design: (work@oh_fifo_async) |vpiName:sel6 |vpiFullName:work@oh_mux9.sel6 |vpiOperand: - \_part_select: , line:37:19, endln:37:29 + \_part_select: in6 (work@oh_mux9.in6), line:37:19, endln:37:29 |vpiParent: - \_ref_obj: in6 (work@oh_mux9.in6), line:37:19, endln:37:22 - |vpiParent: - \_operation: , line:37:5, endln:37:29 - |vpiName:in6 - |vpiFullName:work@oh_mux9.in6 - |vpiDefName:in6 + \_operation: , line:37:5, endln:37:29 + |vpiName:in6 + |vpiFullName:work@oh_mux9.in6 + |vpiDefName:in6 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:23, endln:37:26 |vpiParent: - \_operation: , line:37:5, endln:37:29 + \_part_select: in6 (work@oh_mux9.in6), line:37:19, endln:37:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:37:23, endln:37:24 + \_ref_obj: (work@oh_mux9.in6.N), line:37:23, endln:37:24 |vpiParent: - \_operation: , line:37:5, endln:37:29 + \_operation: , line:37:23, endln:37:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in6.N |vpiOperand: \_constant: , line:37:25, endln:37:26 |vpiParent: @@ -49947,7 +49518,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:38:5, endln:38:16 |vpiParent: - \_operation: , line:31:25, endln:38:29 + \_operation: , line:38:5, endln:38:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:38:7, endln:38:8 @@ -49967,26 +49538,24 @@ design: (work@oh_fifo_async) |vpiName:sel7 |vpiFullName:work@oh_mux9.sel7 |vpiOperand: - \_part_select: , line:38:19, endln:38:29 + \_part_select: in7 (work@oh_mux9.in7), line:38:19, endln:38:29 |vpiParent: - \_ref_obj: in7 (work@oh_mux9.in7), line:38:19, endln:38:22 - |vpiParent: - \_operation: , line:38:5, endln:38:29 - |vpiName:in7 - |vpiFullName:work@oh_mux9.in7 - |vpiDefName:in7 + \_operation: , line:38:5, endln:38:29 + |vpiName:in7 + |vpiFullName:work@oh_mux9.in7 + |vpiDefName:in7 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:38:23, endln:38:26 |vpiParent: - \_operation: , line:38:5, endln:38:29 + \_part_select: in7 (work@oh_mux9.in7), line:38:19, endln:38:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:38:23, endln:38:24 + \_ref_obj: (work@oh_mux9.in7.N), line:38:23, endln:38:24 |vpiParent: - \_operation: , line:38:5, endln:38:29 + \_operation: , line:38:23, endln:38:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in7.N |vpiOperand: \_constant: , line:38:25, endln:38:26 |vpiParent: @@ -50009,7 +49578,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:39:5, endln:39:16 |vpiParent: - \_operation: , line:31:25, endln:39:29 + \_operation: , line:39:5, endln:39:29 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_mux9.N), line:39:7, endln:39:8 @@ -50029,26 +49598,24 @@ design: (work@oh_fifo_async) |vpiName:sel8 |vpiFullName:work@oh_mux9.sel8 |vpiOperand: - \_part_select: , line:39:19, endln:39:29 + \_part_select: in8 (work@oh_mux9.in8), line:39:19, endln:39:29 |vpiParent: - \_ref_obj: in8 (work@oh_mux9.in8), line:39:19, endln:39:22 - |vpiParent: - \_operation: , line:39:5, endln:39:29 - |vpiName:in8 - |vpiFullName:work@oh_mux9.in8 - |vpiDefName:in8 + \_operation: , line:39:5, endln:39:29 + |vpiName:in8 + |vpiFullName:work@oh_mux9.in8 + |vpiDefName:in8 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:23, endln:39:26 |vpiParent: - \_operation: , line:39:5, endln:39:29 + \_part_select: in8 (work@oh_mux9.in8), line:39:19, endln:39:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_mux9.N), line:39:23, endln:39:24 + \_ref_obj: (work@oh_mux9.in8.N), line:39:23, endln:39:24 |vpiParent: - \_operation: , line:39:5, endln:39:29 + \_operation: , line:39:23, endln:39:26 |vpiName:N - |vpiFullName:work@oh_mux9.N + |vpiFullName:work@oh_mux9.in8.N |vpiOperand: \_constant: , line:39:25, endln:39:26 |vpiParent: @@ -50064,23 +49631,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:31:11, endln:31:21 + \_part_select: out (work@oh_mux9.out), line:31:11, endln:31:21 |vpiParent: - \_ref_obj: out (work@oh_mux9.out) - |vpiParent: - \_cont_assign: , line:31:11, endln:39:30 - |vpiName:out - |vpiFullName:work@oh_mux9.out - |vpiDefName:out + \_cont_assign: , line:31:11, endln:39:30 + |vpiName:out + |vpiFullName:work@oh_mux9.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:31:15, endln:31:18 + |vpiParent: + \_part_select: out (work@oh_mux9.out), line:31:11, endln:31:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:31:15, endln:31:16 + \_ref_obj: (work@oh_mux9.out.N), line:31:15, endln:31:16 |vpiParent: \_operation: , line:31:15, endln:31:18 |vpiName:N + |vpiFullName:work@oh_mux9.out.N |vpiOperand: \_constant: , line:31:17, endln:31:18 |vpiParent: @@ -50348,7 +49916,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_mx2.d1), line:16:28, endln:16:30 |vpiParent: - \_operation: , line:16:15, endln:16:35 + \_operation: , line:16:28, endln:16:34 |vpiName:d1 |vpiFullName:work@oh_mx2.d1 |vpiOperand: @@ -50729,12 +50297,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:19:9, endln:19:16 |vpiParent: - \_operation: , line:18:15, endln:19:24 + \_operation: , line:19:9, endln:19:23 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mx3.d1), line:19:9, endln:19:11 |vpiParent: - \_operation: , line:18:15, endln:19:24 + \_operation: , line:19:9, endln:19:16 |vpiName:d1 |vpiFullName:work@oh_mx3.d1 |vpiOperand: @@ -50762,7 +50330,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_mx3.d2), line:20:9, endln:20:11 |vpiParent: - \_operation: , line:18:15, endln:20:17 + \_operation: , line:20:9, endln:20:16 |vpiName:d2 |vpiFullName:work@oh_mx3.d2 |vpiOperand: @@ -51194,12 +50762,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:20:9, endln:20:17 |vpiParent: - \_operation: , line:19:15, endln:20:24 + \_operation: , line:20:9, endln:20:23 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mx4.d1), line:20:9, endln:20:11 |vpiParent: - \_operation: , line:19:15, endln:20:24 + \_operation: , line:20:9, endln:20:17 |vpiName:d1 |vpiFullName:work@oh_mx4.d1 |vpiOperand: @@ -51227,12 +50795,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:21:9, endln:21:17 |vpiParent: - \_operation: , line:19:15, endln:21:24 + \_operation: , line:21:9, endln:21:23 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mx4.d2), line:21:9, endln:21:11 |vpiParent: - \_operation: , line:19:15, endln:21:24 + \_operation: , line:21:9, endln:21:17 |vpiName:d2 |vpiFullName:work@oh_mx4.d2 |vpiOperand: @@ -51260,12 +50828,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:22:9, endln:22:17 |vpiParent: - \_operation: , line:19:15, endln:22:24 + \_operation: , line:22:9, endln:22:23 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mx4.d2), line:22:9, endln:22:11 |vpiParent: - \_operation: , line:19:15, endln:22:24 + \_operation: , line:22:9, endln:22:17 |vpiName:d2 |vpiFullName:work@oh_mx4.d2 |vpiOperand: @@ -51517,12 +51085,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:38 + \_operation: , line:16:17, endln:16:37 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi2.d0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:38 + \_operation: , line:16:18, endln:16:25 |vpiName:d0 |vpiFullName:work@oh_mxi2.d0 |vpiOperand: @@ -51544,7 +51112,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_mxi2.d1), line:16:30, endln:16:32 |vpiParent: - \_operation: , line:16:17, endln:16:37 + \_operation: , line:16:30, endln:16:36 |vpiName:d1 |vpiFullName:work@oh_mxi2.d1 |vpiOperand: @@ -51882,22 +51450,22 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:17, endln:19:19 |vpiParent: - \_operation: , line:18:15, endln:20:13 + \_operation: , line:18:17, endln:20:12 |vpiOpType:29 |vpiOperand: \_operation: , line:18:18, endln:18:32 |vpiParent: - \_operation: , line:18:15, endln:20:13 + \_operation: , line:18:17, endln:19:19 |vpiOpType:28 |vpiOperand: \_operation: , line:18:18, endln:18:26 |vpiParent: - \_operation: , line:18:15, endln:20:13 + \_operation: , line:18:18, endln:18:32 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi3.d0), line:18:18, endln:18:20 |vpiParent: - \_operation: , line:18:15, endln:20:13 + \_operation: , line:18:18, endln:18:26 |vpiName:d0 |vpiFullName:work@oh_mxi3.d0 |vpiOperand: @@ -51930,12 +51498,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:19:4, endln:19:11 |vpiParent: - \_operation: , line:18:17, endln:19:19 + \_operation: , line:19:4, endln:19:18 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi3.d1), line:19:4, endln:19:6 |vpiParent: - \_operation: , line:18:17, endln:19:19 + \_operation: , line:19:4, endln:19:11 |vpiName:d1 |vpiFullName:work@oh_mxi3.d1 |vpiOperand: @@ -51963,7 +51531,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_mxi3.d2), line:20:4, endln:20:6 |vpiParent: - \_operation: , line:18:17, endln:20:12 + \_operation: , line:20:4, endln:20:11 |vpiName:d2 |vpiFullName:work@oh_mxi3.d2 |vpiOperand: @@ -52347,27 +51915,27 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:19:17, endln:21:19 |vpiParent: - \_operation: , line:19:15, endln:22:20 + \_operation: , line:19:17, endln:22:19 |vpiOpType:29 |vpiOperand: \_operation: , line:19:17, endln:20:19 |vpiParent: - \_operation: , line:19:15, endln:22:20 + \_operation: , line:19:17, endln:21:19 |vpiOpType:29 |vpiOperand: \_operation: , line:19:18, endln:19:32 |vpiParent: - \_operation: , line:19:15, endln:22:20 + \_operation: , line:19:17, endln:20:19 |vpiOpType:28 |vpiOperand: \_operation: , line:19:18, endln:19:26 |vpiParent: - \_operation: , line:19:15, endln:22:20 + \_operation: , line:19:18, endln:19:32 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi4.d0), line:19:18, endln:19:20 |vpiParent: - \_operation: , line:19:15, endln:22:20 + \_operation: , line:19:18, endln:19:26 |vpiName:d0 |vpiFullName:work@oh_mxi4.d0 |vpiOperand: @@ -52400,12 +51968,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:20:4, endln:20:12 |vpiParent: - \_operation: , line:19:17, endln:20:19 + \_operation: , line:20:4, endln:20:18 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi4.d1), line:20:4, endln:20:6 |vpiParent: - \_operation: , line:19:17, endln:20:19 + \_operation: , line:20:4, endln:20:12 |vpiName:d1 |vpiFullName:work@oh_mxi4.d1 |vpiOperand: @@ -52433,12 +52001,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:21:4, endln:21:12 |vpiParent: - \_operation: , line:19:17, endln:21:19 + \_operation: , line:21:4, endln:21:18 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi4.d2), line:21:4, endln:21:6 |vpiParent: - \_operation: , line:19:17, endln:21:19 + \_operation: , line:21:4, endln:21:12 |vpiName:d2 |vpiFullName:work@oh_mxi4.d2 |vpiOperand: @@ -52466,12 +52034,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:22:4, endln:22:12 |vpiParent: - \_operation: , line:19:17, endln:22:19 + \_operation: , line:22:4, endln:22:18 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_mxi4.d2), line:22:4, endln:22:6 |vpiParent: - \_operation: , line:19:17, endln:22:19 + \_operation: , line:22:4, endln:22:12 |vpiName:d2 |vpiFullName:work@oh_mxi4.d2 |vpiOperand: @@ -52723,12 +52291,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:15:17, endln:15:22 |vpiParent: - \_operation: , line:15:15, endln:15:27 + \_operation: , line:15:17, endln:15:26 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_nand3.a), line:15:17, endln:15:18 |vpiParent: - \_operation: , line:15:15, endln:15:27 + \_operation: , line:15:17, endln:15:22 |vpiName:a |vpiFullName:work@oh_nand3.a |vpiOperand: @@ -53026,17 +52594,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:17, endln:16:26 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:30 |vpiOpType:28 |vpiOperand: \_operation: , line:16:17, endln:16:22 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:26 |vpiOpType:28 |vpiOperand: \_ref_obj: (work@oh_nand4.a), line:16:17, endln:16:18 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:22 |vpiName:a |vpiFullName:work@oh_nand4.a |vpiOperand: @@ -53248,7 +52816,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_nor2.a), line:14:17, endln:14:18 |vpiParent: - \_operation: , line:14:15, endln:14:23 + \_operation: , line:14:17, endln:14:22 |vpiName:a |vpiFullName:work@oh_nor2.a |vpiOperand: @@ -53494,12 +53062,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:15:17, endln:15:22 |vpiParent: - \_operation: , line:15:15, endln:15:27 + \_operation: , line:15:17, endln:15:26 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_nor3.a), line:15:17, endln:15:18 |vpiParent: - \_operation: , line:15:15, endln:15:27 + \_operation: , line:15:17, endln:15:22 |vpiName:a |vpiFullName:work@oh_nor3.a |vpiOperand: @@ -53797,17 +53365,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:17, endln:16:26 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:30 |vpiOpType:29 |vpiOperand: \_operation: , line:16:17, endln:16:22 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:26 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_nor4.a), line:16:17, endln:16:18 |vpiParent: - \_operation: , line:16:15, endln:16:31 + \_operation: , line:16:17, endln:16:22 |vpiName:a |vpiFullName:work@oh_nor4.a |vpiOperand: @@ -54689,7 +54257,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oa22.b0), line:16:28, endln:16:30 |vpiParent: - \_operation: , line:16:15, endln:16:36 + \_operation: , line:16:28, endln:16:35 |vpiName:b0 |vpiFullName:work@oh_oa22.b0 |vpiOperand: @@ -55049,7 +54617,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oa221.b0), line:17:28, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:36 + \_operation: , line:17:28, endln:17:35 |vpiName:b0 |vpiFullName:work@oh_oa221.b0 |vpiOperand: @@ -55461,7 +55029,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oa222.b0), line:18:28, endln:18:30 |vpiParent: - \_operation: , line:18:15, endln:18:36 + \_operation: , line:18:28, endln:18:35 |vpiName:b0 |vpiFullName:work@oh_oa222.b0 |vpiOperand: @@ -55478,7 +55046,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oa222.c0), line:18:40, endln:18:42 |vpiParent: - \_operation: , line:18:15, endln:18:48 + \_operation: , line:18:40, endln:18:47 |vpiName:c0 |vpiFullName:work@oh_oa222.c0 |vpiOperand: @@ -56519,7 +56087,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oa32.b0), line:17:33, endln:17:35 |vpiParent: - \_operation: , line:17:15, endln:17:41 + \_operation: , line:17:33, endln:17:40 |vpiName:b0 |vpiFullName:work@oh_oa32.b0 |vpiOperand: @@ -56931,12 +56499,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:33, endln:18:40 |vpiParent: - \_operation: , line:18:15, endln:18:46 + \_operation: , line:18:33, endln:18:45 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oa33.b0), line:18:33, endln:18:35 |vpiParent: - \_operation: , line:18:15, endln:18:46 + \_operation: , line:18:33, endln:18:40 |vpiName:b0 |vpiFullName:work@oh_oa33.b0 |vpiOperand: @@ -57188,12 +56756,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:15:18, endln:15:25 |vpiParent: - \_operation: , line:15:15, endln:15:32 + \_operation: , line:15:17, endln:15:31 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai21.a0), line:15:18, endln:15:20 |vpiParent: - \_operation: , line:15:15, endln:15:32 + \_operation: , line:15:18, endln:15:25 |vpiName:a0 |vpiFullName:work@oh_oai21.a0 |vpiOperand: @@ -57491,12 +57059,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:39 + \_operation: , line:16:17, endln:16:38 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai22.a0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:39 + \_operation: , line:16:18, endln:16:25 |vpiName:a0 |vpiFullName:work@oh_oai22.a0 |vpiOperand: @@ -57513,7 +57081,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oai22.b0), line:16:30, endln:16:32 |vpiParent: - \_operation: , line:16:17, endln:16:38 + \_operation: , line:16:30, endln:16:37 |vpiName:b0 |vpiFullName:work@oh_oai22.b0 |vpiOperand: @@ -57851,17 +57419,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:17, endln:17:38 |vpiParent: - \_operation: , line:17:15, endln:17:46 + \_operation: , line:17:17, endln:17:45 |vpiOpType:28 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:46 + \_operation: , line:17:17, endln:17:38 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai221.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:46 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_oai221.a0 |vpiOperand: @@ -57878,7 +57446,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oai221.b0), line:17:30, endln:17:32 |vpiParent: - \_operation: , line:17:17, endln:17:38 + \_operation: , line:17:30, endln:17:37 |vpiName:b0 |vpiFullName:work@oh_oai221.b0 |vpiOperand: @@ -58268,17 +57836,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:17, endln:18:38 |vpiParent: - \_operation: , line:18:15, endln:18:51 + \_operation: , line:18:17, endln:18:50 |vpiOpType:28 |vpiOperand: \_operation: , line:18:18, endln:18:25 |vpiParent: - \_operation: , line:18:15, endln:18:51 + \_operation: , line:18:17, endln:18:38 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai222.a0), line:18:18, endln:18:20 |vpiParent: - \_operation: , line:18:15, endln:18:51 + \_operation: , line:18:18, endln:18:25 |vpiName:a0 |vpiFullName:work@oh_oai222.a0 |vpiOperand: @@ -58295,7 +57863,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oai222.b0), line:18:30, endln:18:32 |vpiParent: - \_operation: , line:18:17, endln:18:38 + \_operation: , line:18:30, endln:18:37 |vpiName:b0 |vpiFullName:work@oh_oai222.b0 |vpiOperand: @@ -58312,7 +57880,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oai222.c0), line:18:42, endln:18:44 |vpiParent: - \_operation: , line:18:17, endln:18:50 + \_operation: , line:18:42, endln:18:49 |vpiName:c0 |vpiFullName:work@oh_oai222.c0 |vpiOperand: @@ -58604,17 +58172,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:30 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:17, endln:16:36 |vpiOpType:29 |vpiOperand: \_operation: , line:16:18, endln:16:25 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:18, endln:16:30 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai31.a0), line:16:18, endln:16:20 |vpiParent: - \_operation: , line:16:15, endln:16:37 + \_operation: , line:16:18, endln:16:25 |vpiName:a0 |vpiFullName:work@oh_oai31.a0 |vpiOperand: @@ -58964,22 +58532,22 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:17, endln:17:36 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:17, endln:17:41 |vpiOpType:28 |vpiOperand: \_operation: , line:17:18, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:17, endln:17:36 |vpiOpType:29 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:18, endln:17:30 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai311.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:42 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_oai311.a0 |vpiOperand: @@ -59335,17 +58903,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:17:18, endln:17:30 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:17, endln:17:43 |vpiOpType:29 |vpiOperand: \_operation: , line:17:18, endln:17:25 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:18, endln:17:30 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai32.a0), line:17:18, endln:17:20 |vpiParent: - \_operation: , line:17:15, endln:17:44 + \_operation: , line:17:18, endln:17:25 |vpiName:a0 |vpiFullName:work@oh_oai32.a0 |vpiOperand: @@ -59368,7 +58936,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_oai32.b0), line:17:35, endln:17:37 |vpiParent: - \_operation: , line:17:17, endln:17:43 + \_operation: , line:17:35, endln:17:42 |vpiName:b0 |vpiFullName:work@oh_oai32.b0 |vpiOperand: @@ -59752,17 +59320,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:18, endln:18:30 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:17, endln:18:48 |vpiOpType:29 |vpiOperand: \_operation: , line:18:18, endln:18:25 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:18, endln:18:30 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai33.a0), line:18:18, endln:18:20 |vpiParent: - \_operation: , line:18:15, endln:18:49 + \_operation: , line:18:18, endln:18:25 |vpiName:a0 |vpiFullName:work@oh_oai33.a0 |vpiOperand: @@ -59785,12 +59353,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:18:35, endln:18:42 |vpiParent: - \_operation: , line:18:17, endln:18:48 + \_operation: , line:18:35, endln:18:47 |vpiOpType:29 |vpiOperand: \_ref_obj: (work@oh_oai33.b0), line:18:35, endln:18:37 |vpiParent: - \_operation: , line:18:17, endln:18:48 + \_operation: , line:18:35, endln:18:42 |vpiName:b0 |vpiFullName:work@oh_oai33.b0 |vpiOperand: @@ -60128,24 +59696,23 @@ design: (work@oh_fifo_async) \_event_control: , line:25:10, endln:25:25 |vpiOpType:82 |vpiRhs: - \_part_select: , line:26:22, endln:26:32 + \_part_select: in2 (in2), line:26:22, endln:26:32 |vpiParent: - \_ref_obj: in2 (in2), line:26:22, endln:26:25 - |vpiParent: - \_assignment: , line:26:5, endln:26:32 - |vpiName:in2 - |vpiDefName:in2 + \_assignment: , line:26:5, endln:26:32 + |vpiName:in2 + |vpiDefName:in2 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:26, endln:26:29 |vpiParent: - \_event_control: , line:25:10, endln:25:25 + \_part_select: in2 (in2), line:26:22, endln:26:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:26, endln:26:27 + \_ref_obj: (in2.N), line:26:26, endln:26:27 |vpiParent: - \_event_control: , line:25:10, endln:25:25 + \_operation: , line:26:26, endln:26:29 |vpiName:N + |vpiFullName:in2.N |vpiOperand: \_constant: , line:26:28, endln:26:29 |vpiParent: @@ -60161,24 +59728,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:26:5, endln:26:18 + \_part_select: in2_sh (in2_sh), line:26:5, endln:26:18 |vpiParent: - \_ref_obj: in2_sh (in2_sh) - |vpiParent: - \_assignment: , line:26:5, endln:26:32 - |vpiName:in2_sh - |vpiDefName:in2_sh + \_assignment: , line:26:5, endln:26:32 + |vpiName:in2_sh + |vpiDefName:in2_sh |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:12, endln:26:15 |vpiParent: - \_event_control: , line:25:10, endln:25:25 + \_part_select: in2_sh (in2_sh), line:26:5, endln:26:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:12, endln:26:13 + \_ref_obj: (in2_sh.N), line:26:12, endln:26:13 |vpiParent: - \_event_control: , line:25:10, endln:25:25 + \_operation: , line:26:12, endln:26:15 |vpiName:N + |vpiFullName:in2_sh.N |vpiOperand: \_constant: , line:26:14, endln:26:15 |vpiParent: @@ -60212,24 +59778,23 @@ design: (work@oh_fifo_async) \_operation: , line:28:23, endln:28:27 |vpiName:clk |vpiOperand: - \_part_select: , line:28:30, endln:28:40 + \_part_select: in1 (in1), line:28:30, endln:28:40 |vpiParent: - \_ref_obj: in1 (in1), line:28:30, endln:28:33 - |vpiParent: - \_operation: , line:28:23, endln:28:56 - |vpiName:in1 - |vpiDefName:in1 + \_operation: , line:28:23, endln:28:56 + |vpiName:in1 + |vpiDefName:in1 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:34, endln:28:37 |vpiParent: - \_operation: , line:28:23, endln:28:56 + \_part_select: in1 (in1), line:28:30, endln:28:40 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:34, endln:28:35 + \_ref_obj: (in1.N), line:28:34, endln:28:35 |vpiParent: - \_operation: , line:28:23, endln:28:56 + \_operation: , line:28:34, endln:28:37 |vpiName:N + |vpiFullName:in1.N |vpiOperand: \_constant: , line:28:36, endln:28:37 |vpiParent: @@ -60245,24 +59810,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:28:43, endln:28:56 + \_part_select: in2_sh (in2_sh), line:28:43, endln:28:56 |vpiParent: - \_ref_obj: in2_sh (in2_sh), line:28:43, endln:28:49 - |vpiParent: - \_operation: , line:28:23, endln:28:56 - |vpiName:in2_sh - |vpiDefName:in2_sh + \_operation: , line:28:23, endln:28:56 + |vpiName:in2_sh + |vpiDefName:in2_sh |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:50, endln:28:53 |vpiParent: - \_operation: , line:28:23, endln:28:56 + \_part_select: in2_sh (in2_sh), line:28:43, endln:28:56 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:50, endln:28:51 + \_ref_obj: (in2_sh.N), line:28:50, endln:28:51 |vpiParent: - \_operation: , line:28:23, endln:28:56 + \_operation: , line:28:50, endln:28:53 |vpiName:N + |vpiFullName:in2_sh.N |vpiOperand: \_constant: , line:28:52, endln:28:53 |vpiParent: @@ -60278,22 +59842,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:28:10, endln:28:20 + \_part_select: out (out), line:28:10, endln:28:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:28:10, endln:28:56 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:28:10, endln:28:56 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:14, endln:28:17 + |vpiParent: + \_part_select: out (out), line:28:10, endln:28:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:14, endln:28:15 + \_ref_obj: (out.N), line:28:14, endln:28:15 |vpiParent: \_operation: , line:28:14, endln:28:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:28:16, endln:28:17 |vpiParent: @@ -61137,7 +60702,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (PW), line:10:29, endln:10:31 |vpiParent: - \_sys_func_call: ($clog2), line:10:22, endln:10:35 + \_operation: , line:10:29, endln:10:34 |vpiName:PW |vpiOperand: \_ref_obj: (SW), line:10:32, endln:10:34 @@ -61518,32 +61083,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:39:25, endln:39:28 - |vpiParent: - \_assignment: , line:39:8, endln:39:28 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:39:8, endln:39:21 + \_part_select: count (work@oh_par2ser.count), line:39:8, endln:39:21 |vpiParent: - \_ref_obj: count (work@oh_par2ser.count) - |vpiParent: - \_assignment: , line:39:8, endln:39:28 - |vpiName:count - |vpiFullName:work@oh_par2ser.count - |vpiDefName:count + \_assignment: , line:39:8, endln:39:28 + |vpiName:count + |vpiFullName:work@oh_par2ser.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:39:14, endln:39:18 |vpiParent: - \_if_else: , line:38:6, endln:43:46 + \_part_select: count (work@oh_par2ser.count), line:39:8, endln:39:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:39:14, endln:39:16 + \_ref_obj: (work@oh_par2ser.count.CW), line:39:14, endln:39:16 |vpiParent: - \_if_else: , line:38:6, endln:43:46 + \_operation: , line:39:14, endln:39:18 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.count.CW |vpiOperand: \_constant: , line:39:17, endln:39:18 |vpiParent: @@ -61574,26 +61135,24 @@ design: (work@oh_fifo_async) \_if_else: , line:40:11, endln:43:46 |vpiOpType:82 |vpiRhs: - \_part_select: , line:41:25, endln:41:41 + \_part_select: datasize (work@oh_par2ser.datasize), line:41:25, endln:41:41 |vpiParent: - \_ref_obj: datasize (work@oh_par2ser.datasize), line:41:25, endln:41:33 - |vpiParent: - \_assignment: , line:41:8, endln:41:41 - |vpiName:datasize - |vpiFullName:work@oh_par2ser.datasize - |vpiDefName:datasize + \_assignment: , line:41:8, endln:41:41 + |vpiName:datasize + |vpiFullName:work@oh_par2ser.datasize + |vpiDefName:datasize |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:34, endln:41:38 |vpiParent: - \_if_else: , line:40:11, endln:43:46 + \_part_select: datasize (work@oh_par2ser.datasize), line:41:25, endln:41:41 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:41:34, endln:41:36 + \_ref_obj: (work@oh_par2ser.datasize.CW), line:41:34, endln:41:36 |vpiParent: - \_if_else: , line:40:11, endln:43:46 + \_operation: , line:41:34, endln:41:38 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.datasize.CW |vpiOperand: \_constant: , line:41:37, endln:41:38 |vpiParent: @@ -61609,26 +61168,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:41:8, endln:41:21 + \_part_select: count (work@oh_par2ser.count), line:41:8, endln:41:21 |vpiParent: - \_ref_obj: count (work@oh_par2ser.count) - |vpiParent: - \_assignment: , line:41:8, endln:41:41 - |vpiName:count - |vpiFullName:work@oh_par2ser.count - |vpiDefName:count + \_assignment: , line:41:8, endln:41:41 + |vpiName:count + |vpiFullName:work@oh_par2ser.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:41:14, endln:41:18 |vpiParent: - \_if_else: , line:40:11, endln:43:46 + \_part_select: count (work@oh_par2ser.count), line:41:8, endln:41:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:41:14, endln:41:16 + \_ref_obj: (work@oh_par2ser.count.CW), line:41:14, endln:41:16 |vpiParent: - \_if_else: , line:40:11, endln:43:46 + \_operation: , line:41:14, endln:41:18 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.count.CW |vpiOperand: \_constant: , line:41:17, endln:41:18 |vpiParent: @@ -61655,7 +61212,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_par2ser.shift), line:42:14, endln:42:19 |vpiParent: - \_if_else: , line:40:11, endln:43:46 + \_operation: , line:42:14, endln:42:26 |vpiName:shift |vpiFullName:work@oh_par2ser.shift |vpiOperand: @@ -61672,29 +61229,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:43:25, endln:43:45 |vpiParent: - \_if_stmt: , line:42:11, endln:43:46 + \_assignment: , line:43:8, endln:43:45 |vpiOpType:11 |vpiOperand: - \_part_select: , line:43:25, endln:43:38 + \_part_select: count (work@oh_par2ser.count), line:43:25, endln:43:38 |vpiParent: - \_ref_obj: count (work@oh_par2ser.count), line:43:25, endln:43:30 - |vpiParent: - \_operation: , line:43:25, endln:43:45 - |vpiName:count - |vpiFullName:work@oh_par2ser.count - |vpiDefName:count + \_operation: , line:43:25, endln:43:45 + |vpiName:count + |vpiFullName:work@oh_par2ser.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:43:31, endln:43:35 |vpiParent: - \_if_stmt: , line:42:11, endln:43:46 + \_part_select: count (work@oh_par2ser.count), line:43:25, endln:43:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:43:31, endln:43:33 + \_ref_obj: (work@oh_par2ser.count.CW), line:43:31, endln:43:33 |vpiParent: - \_if_stmt: , line:42:11, endln:43:46 + \_operation: , line:43:31, endln:43:35 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.count.CW |vpiOperand: \_constant: , line:43:34, endln:43:35 |vpiParent: @@ -61718,26 +61273,24 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:43:8, endln:43:21 + \_part_select: count (work@oh_par2ser.count), line:43:8, endln:43:21 |vpiParent: - \_ref_obj: count (work@oh_par2ser.count) - |vpiParent: - \_assignment: , line:43:8, endln:43:45 - |vpiName:count - |vpiFullName:work@oh_par2ser.count - |vpiDefName:count + \_assignment: , line:43:8, endln:43:45 + |vpiName:count + |vpiFullName:work@oh_par2ser.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:43:14, endln:43:18 |vpiParent: - \_if_stmt: , line:42:11, endln:43:46 + \_part_select: count (work@oh_par2ser.count), line:43:8, endln:43:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:43:14, endln:43:16 + \_ref_obj: (work@oh_par2ser.count.CW), line:43:14, endln:43:16 |vpiParent: - \_if_stmt: , line:42:11, endln:43:46 + \_operation: , line:43:14, endln:43:18 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.count.CW |vpiOperand: \_constant: , line:43:17, endln:43:18 |vpiParent: @@ -61805,32 +61358,28 @@ design: (work@oh_fifo_async) |vpiBlocking:1 |vpiRhs: \_constant: , line:57:27, endln:57:30 - |vpiParent: - \_assignment: , line:57:8, endln:57:30 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:57:8, endln:57:24 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:57:8, endln:57:24 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg) - |vpiParent: - \_assignment: , line:57:8, endln:57:30 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:57:8, endln:57:30 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:57:17, endln:57:21 |vpiParent: - \_if_else: , line:56:6, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:57:8, endln:57:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:57:17, endln:57:19 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:57:17, endln:57:19 |vpiParent: - \_if_else: , line:56:6, endln:63:62 + \_operation: , line:57:17, endln:57:21 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:57:20, endln:57:21 |vpiParent: @@ -61862,26 +61411,24 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiBlocking:1 |vpiRhs: - \_part_select: , line:59:27, endln:59:38 + \_part_select: din (work@oh_par2ser.din), line:59:27, endln:59:38 |vpiParent: - \_ref_obj: din (work@oh_par2ser.din), line:59:27, endln:59:30 - |vpiParent: - \_assignment: , line:59:8, endln:59:38 - |vpiName:din - |vpiFullName:work@oh_par2ser.din - |vpiDefName:din + \_assignment: , line:59:8, endln:59:38 + |vpiName:din + |vpiFullName:work@oh_par2ser.din + |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:31, endln:59:35 |vpiParent: - \_if_else: , line:58:11, endln:63:62 + \_part_select: din (work@oh_par2ser.din), line:59:27, endln:59:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:59:31, endln:59:33 + \_ref_obj: (work@oh_par2ser.din.PW), line:59:31, endln:59:33 |vpiParent: - \_if_else: , line:58:11, endln:63:62 + \_operation: , line:59:31, endln:59:35 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.din.PW |vpiOperand: \_constant: , line:59:34, endln:59:35 |vpiParent: @@ -61897,26 +61444,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:59:8, endln:59:24 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:59:8, endln:59:24 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg) - |vpiParent: - \_assignment: , line:59:8, endln:59:38 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:59:8, endln:59:38 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:17, endln:59:21 |vpiParent: - \_if_else: , line:58:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:59:8, endln:59:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:59:17, endln:59:19 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:59:17, endln:59:19 |vpiParent: - \_if_else: , line:58:11, endln:63:62 + \_operation: , line:59:17, endln:59:21 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:59:20, endln:59:21 |vpiParent: @@ -61943,7 +61488,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_par2ser.shift), line:60:14, endln:60:19 |vpiParent: - \_if_else: , line:58:11, endln:63:62 + \_operation: , line:60:14, endln:60:30 |vpiName:shift |vpiFullName:work@oh_par2ser.shift |vpiOperand: @@ -61961,51 +61506,49 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:61:27, endln:61:60 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_assignment: , line:61:8, endln:61:60 |vpiOpType:33 |vpiOperand: \_operation: , line:61:28, endln:61:40 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_assignment: , line:61:8, endln:61:60 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_par2ser.SW), line:61:30, endln:61:32 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_assignment: , line:61:8, endln:61:60 |vpiName:SW |vpiFullName:work@oh_par2ser.SW |vpiOperand: \_operation: , line:61:33, endln:61:39 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_assignment: , line:61:8, endln:61:60 |vpiOpType:33 |vpiOperand: \_ref_obj: (work@oh_par2ser.fill), line:61:34, endln:61:38 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_assignment: , line:61:8, endln:61:60 |vpiName:fill |vpiFullName:work@oh_par2ser.fill |vpiOperand: - \_part_select: , line:61:42, endln:61:59 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:61:42, endln:61:59 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:61:42, endln:61:50 - |vpiParent: - \_if_else: , line:60:11, endln:63:62 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:61:8, endln:61:60 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:61:51, endln:61:55 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:61:42, endln:61:59 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:61:51, endln:61:53 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:61:51, endln:61:53 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_operation: , line:61:51, endln:61:55 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:61:54, endln:61:55 |vpiParent: @@ -62015,32 +61558,30 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiRightRange: - \_ref_obj: (work@oh_par2ser.SW), line:61:56, endln:61:58 + \_ref_obj: (work@oh_par2ser.shiftreg.SW), line:61:56, endln:61:58 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:61:42, endln:61:59 |vpiName:SW - |vpiFullName:work@oh_par2ser.SW + |vpiFullName:work@oh_par2ser.shiftreg.SW |vpiLhs: - \_part_select: , line:61:8, endln:61:24 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:61:8, endln:61:24 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg) - |vpiParent: - \_assignment: , line:61:8, endln:61:60 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:61:8, endln:61:60 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:61:17, endln:61:21 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:61:8, endln:61:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:61:17, endln:61:19 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:61:17, endln:61:19 |vpiParent: - \_if_else: , line:60:11, endln:63:62 + \_operation: , line:61:17, endln:61:21 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:61:20, endln:61:21 |vpiParent: @@ -62074,40 +61615,38 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:63:27, endln:63:61 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_assignment: , line:63:8, endln:63:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:63:28, endln:63:47 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:63:28, endln:63:47 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:63:28, endln:63:36 - |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:63:8, endln:63:61 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:63:37, endln:63:44 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:63:28, endln:63:47 |vpiOpType:11 |vpiOperand: \_operation: , line:63:37, endln:63:42 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_operation: , line:63:37, endln:63:44 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:63:37, endln:63:39 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:63:37, endln:63:39 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_operation: , line:63:37, endln:63:42 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: - \_ref_obj: (work@oh_par2ser.SW), line:63:40, endln:63:42 + \_ref_obj: (work@oh_par2ser.shiftreg.SW), line:63:40, endln:63:42 |vpiParent: \_operation: , line:63:37, endln:63:42 |vpiName:SW - |vpiFullName:work@oh_par2ser.SW + |vpiFullName:work@oh_par2ser.shiftreg.SW |vpiOperand: \_constant: , line:63:43, endln:63:44 |vpiParent: @@ -62125,46 +61664,44 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:63:48, endln:63:60 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_assignment: , line:63:8, endln:63:61 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_par2ser.SW), line:63:50, endln:63:52 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_assignment: , line:63:8, endln:63:61 |vpiName:SW |vpiFullName:work@oh_par2ser.SW |vpiOperand: \_operation: , line:63:53, endln:63:59 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_assignment: , line:63:8, endln:63:61 |vpiOpType:33 |vpiOperand: \_ref_obj: (work@oh_par2ser.fill), line:63:54, endln:63:58 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_assignment: , line:63:8, endln:63:61 |vpiName:fill |vpiFullName:work@oh_par2ser.fill |vpiLhs: - \_part_select: , line:63:8, endln:63:24 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:63:8, endln:63:24 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg) - |vpiParent: - \_assignment: , line:63:8, endln:63:61 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_assignment: , line:63:8, endln:63:61 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:63:17, endln:63:21 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:63:8, endln:63:24 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:63:17, endln:63:19 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:63:17, endln:63:19 |vpiParent: - \_if_stmt: , line:62:11, endln:63:62 + \_operation: , line:63:17, endln:63:21 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:63:20, endln:63:21 |vpiParent: @@ -62238,26 +61775,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:46:11, endln:46:32 |vpiOpType:7 |vpiOperand: - \_part_select: , line:46:19, endln:46:32 + \_part_select: count (work@oh_par2ser.count), line:46:19, endln:46:32 |vpiParent: - \_ref_obj: count (work@oh_par2ser.count), line:46:19, endln:46:24 - |vpiParent: - \_operation: , line:46:18, endln:46:32 - |vpiName:count - |vpiFullName:work@oh_par2ser.count - |vpiDefName:count + \_operation: , line:46:18, endln:46:32 + |vpiName:count + |vpiFullName:work@oh_par2ser.count + |vpiDefName:count |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:25, endln:46:29 |vpiParent: - \_operation: , line:46:18, endln:46:32 + \_part_select: count (work@oh_par2ser.count), line:46:19, endln:46:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.CW), line:46:25, endln:46:27 + \_ref_obj: (work@oh_par2ser.count.CW), line:46:25, endln:46:27 |vpiParent: - \_operation: , line:46:18, endln:46:32 + \_operation: , line:46:25, endln:46:29 |vpiName:CW - |vpiFullName:work@oh_par2ser.CW + |vpiFullName:work@oh_par2ser.count.CW |vpiOperand: \_constant: , line:46:28, endln:46:29 |vpiParent: @@ -62337,26 +61872,24 @@ design: (work@oh_fifo_async) |vpiName:lsbfirst |vpiFullName:work@oh_par2ser.lsbfirst |vpiOperand: - \_part_select: , line:66:37, endln:66:53 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:66:37, endln:66:53 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:66:37, endln:66:45 - |vpiParent: - \_operation: , line:66:26, endln:67:36 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_operation: , line:66:26, endln:67:36 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:66:46, endln:66:50 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:66:37, endln:66:53 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.SW), line:66:46, endln:66:48 + \_ref_obj: (work@oh_par2ser.shiftreg.SW), line:66:46, endln:66:48 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_operation: , line:66:46, endln:66:50 |vpiName:SW - |vpiFullName:work@oh_par2ser.SW + |vpiFullName:work@oh_par2ser.shiftreg.SW |vpiOperand: \_constant: , line:66:49, endln:66:50 |vpiParent: @@ -62372,26 +61905,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:67:16, endln:67:36 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:67:16, endln:67:36 |vpiParent: - \_ref_obj: shiftreg (work@oh_par2ser.shiftreg), line:67:16, endln:67:24 - |vpiParent: - \_operation: , line:66:26, endln:67:36 - |vpiName:shiftreg - |vpiFullName:work@oh_par2ser.shiftreg - |vpiDefName:shiftreg + \_operation: , line:66:26, endln:67:36 + |vpiName:shiftreg + |vpiFullName:work@oh_par2ser.shiftreg + |vpiDefName:shiftreg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:67:25, endln:67:29 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:67:16, endln:67:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:67:25, endln:67:27 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:67:25, endln:67:27 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_operation: , line:67:25, endln:67:29 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: \_constant: , line:67:28, endln:67:29 |vpiParent: @@ -62403,38 +61934,39 @@ design: (work@oh_fifo_async) |vpiRightRange: \_operation: , line:67:30, endln:67:35 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_part_select: shiftreg (work@oh_par2ser.shiftreg), line:67:16, endln:67:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_par2ser.PW), line:67:30, endln:67:32 + \_ref_obj: (work@oh_par2ser.shiftreg.PW), line:67:30, endln:67:32 |vpiParent: - \_operation: , line:66:26, endln:67:36 + \_operation: , line:67:30, endln:67:35 |vpiName:PW - |vpiFullName:work@oh_par2ser.PW + |vpiFullName:work@oh_par2ser.shiftreg.PW |vpiOperand: - \_ref_obj: (work@oh_par2ser.SW), line:67:33, endln:67:35 + \_ref_obj: (work@oh_par2ser.shiftreg.SW), line:67:33, endln:67:35 |vpiParent: \_operation: , line:67:30, endln:67:35 |vpiName:SW - |vpiFullName:work@oh_par2ser.SW + |vpiFullName:work@oh_par2ser.shiftreg.SW |vpiLhs: - \_part_select: , line:66:11, endln:66:23 + \_part_select: dout (work@oh_par2ser.dout), line:66:11, endln:66:23 |vpiParent: - \_ref_obj: dout (work@oh_par2ser.dout) - |vpiParent: - \_cont_assign: , line:66:11, endln:67:36 - |vpiName:dout - |vpiFullName:work@oh_par2ser.dout - |vpiDefName:dout + \_cont_assign: , line:66:11, endln:67:36 + |vpiName:dout + |vpiFullName:work@oh_par2ser.dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:66:16, endln:66:20 + |vpiParent: + \_part_select: dout (work@oh_par2ser.dout), line:66:11, endln:66:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SW), line:66:16, endln:66:18 + \_ref_obj: (work@oh_par2ser.dout.SW), line:66:16, endln:66:18 |vpiParent: \_operation: , line:66:16, endln:66:20 |vpiName:SW + |vpiFullName:work@oh_par2ser.dout.SW |vpiOperand: \_constant: , line:66:19, endln:66:20 |vpiParent: @@ -62553,26 +62085,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:15:11, endln:15:30 |vpiOpType:9 |vpiOperand: - \_part_select: , line:15:21, endln:15:30 + \_part_select: in (work@oh_parity.in), line:15:21, endln:15:30 |vpiParent: - \_ref_obj: in (work@oh_parity.in), line:15:21, endln:15:23 - |vpiParent: - \_operation: , line:15:20, endln:15:30 - |vpiName:in - |vpiFullName:work@oh_parity.in - |vpiDefName:in + \_operation: , line:15:20, endln:15:30 + |vpiName:in + |vpiFullName:work@oh_parity.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:15:24, endln:15:27 |vpiParent: - \_operation: , line:15:20, endln:15:30 + \_part_select: in (work@oh_parity.in), line:15:21, endln:15:30 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_parity.N), line:15:24, endln:15:25 + \_ref_obj: (work@oh_parity.in.N), line:15:24, endln:15:25 |vpiParent: - \_operation: , line:15:20, endln:15:30 + \_operation: , line:15:24, endln:15:27 |vpiName:N - |vpiFullName:work@oh_parity.N + |vpiFullName:work@oh_parity.in.N |vpiOperand: \_constant: , line:15:26, endln:15:27 |vpiParent: @@ -63136,8 +62666,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:32:22, endln:32:26 - |vpiParent: - \_assignment: , line:32:8, endln:32:26 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -63145,7 +62673,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_pulse2pulse.toggle_reg), line:32:8, endln:32:18 |vpiParent: - \_if_else: , line:31:6, endln:34:29 + \_assignment: , line:32:8, endln:32:26 |vpiName:toggle_reg |vpiFullName:work@oh_pulse2pulse.toggle_reg |vpiElseStmt: @@ -63156,13 +62684,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_pulse2pulse.toggle), line:34:22, endln:34:28 |vpiParent: - \_if_else: , line:31:6, endln:34:29 + \_assignment: , line:34:8, endln:34:28 |vpiName:toggle |vpiFullName:work@oh_pulse2pulse.toggle |vpiLhs: \_ref_obj: (work@oh_pulse2pulse.toggle_reg), line:34:8, endln:34:18 |vpiParent: - \_if_else: , line:31:6, endln:34:29 + \_assignment: , line:34:8, endln:34:28 |vpiName:toggle_reg |vpiFullName:work@oh_pulse2pulse.toggle_reg |vpiAlwaysType:1 @@ -63207,8 +62735,6 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:47:21, endln:47:25 - |vpiParent: - \_assignment: , line:47:8, endln:47:25 |vpiDecompile:1'b0 |vpiSize:1 |BIN:0 @@ -63216,7 +62742,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_pulse2pulse.pulse_reg), line:47:8, endln:47:17 |vpiParent: - \_if_else: , line:46:6, endln:49:33 + \_assignment: , line:47:8, endln:47:25 |vpiName:pulse_reg |vpiFullName:work@oh_pulse2pulse.pulse_reg |vpiElseStmt: @@ -63227,13 +62753,13 @@ design: (work@oh_fifo_async) |vpiRhs: \_ref_obj: (work@oh_pulse2pulse.toggle_sync), line:49:21, endln:49:32 |vpiParent: - \_if_else: , line:46:6, endln:49:33 + \_assignment: , line:49:8, endln:49:32 |vpiName:toggle_sync |vpiFullName:work@oh_pulse2pulse.toggle_sync |vpiLhs: \_ref_obj: (work@oh_pulse2pulse.pulse_reg), line:49:8, endln:49:17 |vpiParent: - \_if_else: , line:46:6, endln:49:33 + \_assignment: , line:49:8, endln:49:32 |vpiName:pulse_reg |vpiFullName:work@oh_pulse2pulse.pulse_reg |vpiAlwaysType:1 @@ -63497,23 +63023,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_pwr_buf (work@oh_pwr_buf), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v, line:8:1, endln:24:10 |vpiRhs: - \_part_select: , line:20:24, endln:20:33 + \_part_select: in (work@oh_pwr_buf.in), line:20:24, endln:20:33 |vpiParent: - \_ref_obj: in (work@oh_pwr_buf.in), line:20:24, endln:20:26 - |vpiParent: - \_cont_assign: , line:20:11, endln:20:33 - |vpiName:in - |vpiFullName:work@oh_pwr_buf.in - |vpiDefName:in + \_cont_assign: , line:20:11, endln:20:33 + |vpiName:in + |vpiFullName:work@oh_pwr_buf.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:27, endln:20:30 + |vpiParent: + \_part_select: in (work@oh_pwr_buf.in), line:20:24, endln:20:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:27, endln:20:28 + \_ref_obj: (work@oh_pwr_buf.in.N), line:20:27, endln:20:28 |vpiParent: \_operation: , line:20:27, endln:20:30 |vpiName:N + |vpiFullName:work@oh_pwr_buf.in.N |vpiOperand: \_constant: , line:20:29, endln:20:30 |vpiParent: @@ -63529,23 +63056,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:20:11, endln:20:21 + \_part_select: out (work@oh_pwr_buf.out), line:20:11, endln:20:21 |vpiParent: - \_ref_obj: out (work@oh_pwr_buf.out) - |vpiParent: - \_cont_assign: , line:20:11, endln:20:33 - |vpiName:out - |vpiFullName:work@oh_pwr_buf.out - |vpiDefName:out + \_cont_assign: , line:20:11, endln:20:33 + |vpiName:out + |vpiFullName:work@oh_pwr_buf.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:15, endln:20:18 + |vpiParent: + \_part_select: out (work@oh_pwr_buf.out), line:20:11, endln:20:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:20:15, endln:20:16 + \_ref_obj: (work@oh_pwr_buf.out.N), line:20:15, endln:20:16 |vpiParent: \_operation: , line:20:15, endln:20:18 |vpiName:N + |vpiFullName:work@oh_pwr_buf.out.N |vpiOperand: \_constant: , line:20:17, endln:20:18 |vpiParent: @@ -63893,30 +63421,27 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:25, endln:26:28 - |vpiParent: - \_assignment: , line:26:7, endln:26:28 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:21 + \_part_select: out_reg (out_reg), line:26:7, endln:26:21 |vpiParent: - \_ref_obj: out_reg (out_reg) - |vpiParent: - \_assignment: , line:26:7, endln:26:28 - |vpiName:out_reg - |vpiDefName:out_reg + \_assignment: , line:26:7, endln:26:28 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:26:15, endln:26:18 |vpiParent: - \_if_else: , line:25:5, endln:28:35 + \_part_select: out_reg (out_reg), line:26:7, endln:26:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:26:15, endln:26:16 + \_ref_obj: (out_reg.N), line:26:15, endln:26:16 |vpiParent: - \_if_else: , line:25:5, endln:28:35 + \_operation: , line:26:15, endln:26:18 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:26:17, endln:26:18 |vpiParent: @@ -63946,24 +63471,23 @@ design: (work@oh_fifo_async) \_if_stmt: , line:27:10, endln:28:35 |vpiOpType:82 |vpiRhs: - \_part_select: , line:28:25, endln:28:34 + \_part_select: in (in), line:28:25, endln:28:34 |vpiParent: - \_ref_obj: in (in), line:28:25, endln:28:27 - |vpiParent: - \_assignment: , line:28:7, endln:28:34 - |vpiName:in - |vpiDefName:in + \_assignment: , line:28:7, endln:28:34 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:28, endln:28:31 |vpiParent: - \_if_stmt: , line:27:10, endln:28:35 + \_part_select: in (in), line:28:25, endln:28:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:28, endln:28:29 + \_ref_obj: (in.N), line:28:28, endln:28:29 |vpiParent: - \_if_stmt: , line:27:10, endln:28:35 + \_operation: , line:28:28, endln:28:31 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:28:30, endln:28:31 |vpiParent: @@ -63979,24 +63503,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:28:7, endln:28:21 + \_part_select: out_reg (out_reg), line:28:7, endln:28:21 |vpiParent: - \_ref_obj: out_reg (out_reg) - |vpiParent: - \_assignment: , line:28:7, endln:28:34 - |vpiName:out_reg - |vpiDefName:out_reg + \_assignment: , line:28:7, endln:28:34 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:15, endln:28:18 |vpiParent: - \_if_stmt: , line:27:10, endln:28:35 + \_part_select: out_reg (out_reg), line:28:7, endln:28:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:15, endln:28:16 + \_ref_obj: (out_reg.N), line:28:15, endln:28:16 |vpiParent: - \_if_stmt: , line:27:10, endln:28:35 + \_operation: , line:28:15, endln:28:18 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:28:17, endln:28:18 |vpiParent: @@ -64015,22 +63538,23 @@ design: (work@oh_fifo_async) |vpiStmt: \_cont_assign: , line:29:10, endln:29:37 |vpiRhs: - \_part_select: , line:29:23, endln:29:37 + \_part_select: out_reg (out_reg), line:29:23, endln:29:37 |vpiParent: - \_ref_obj: out_reg (out_reg), line:29:23, endln:29:30 - |vpiParent: - \_cont_assign: , line:29:10, endln:29:37 - |vpiName:out_reg - |vpiDefName:out_reg + \_cont_assign: , line:29:10, endln:29:37 + |vpiName:out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:31, endln:29:34 + |vpiParent: + \_part_select: out_reg (out_reg), line:29:23, endln:29:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:31, endln:29:32 + \_ref_obj: (out_reg.N), line:29:31, endln:29:32 |vpiParent: \_operation: , line:29:31, endln:29:34 |vpiName:N + |vpiFullName:out_reg.N |vpiOperand: \_constant: , line:29:33, endln:29:34 |vpiParent: @@ -64046,22 +63570,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:29:10, endln:29:20 + \_part_select: out (out), line:29:10, endln:29:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:29:10, endln:29:37 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:29:10, endln:29:37 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:29:14, endln:29:17 + |vpiParent: + \_part_select: out (out), line:29:10, endln:29:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:29:14, endln:29:15 + \_ref_obj: (out.N), line:29:14, endln:29:15 |vpiParent: \_operation: , line:29:14, endln:29:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:29:16, endln:29:17 |vpiParent: @@ -64699,18 +64224,24 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:datamux.i |vpiIndex: - \_part_select: , line:53:26, endln:53:32 + \_part_select: datamux (datamux.datamux), line:53:26, endln:53:32 |vpiParent: \_var_select: (datamux), line:53:15, endln:53:33 + |vpiName:datamux + |vpiFullName:datamux.datamux + |vpiDefName:datamux |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:53:26, endln:53:30 + |vpiParent: + \_part_select: datamux (datamux.datamux), line:53:26, endln:53:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (RW), line:53:26, endln:53:28 + \_ref_obj: (datamux.datamux.RW), line:53:26, endln:53:28 |vpiParent: \_operation: , line:53:26, endln:53:30 |vpiName:RW + |vpiFullName:datamux.datamux.RW |vpiOperand: \_constant: , line:53:29, endln:53:30 |vpiParent: @@ -64738,18 +64269,24 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:write_en.i |vpiIndex: - \_part_select: , line:54:27, endln:54:33 + \_part_select: write_en (write_en.write_en), line:54:27, endln:54:33 |vpiParent: \_var_select: (write_en), line:54:15, endln:54:34 + |vpiName:write_en + |vpiFullName:write_en.write_en + |vpiDefName:write_en |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:54:27, endln:54:31 + |vpiParent: + \_part_select: write_en (write_en.write_en), line:54:27, endln:54:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (WP), line:54:27, endln:54:29 + \_ref_obj: (write_en.write_en.WP), line:54:27, endln:54:29 |vpiParent: \_operation: , line:54:27, endln:54:31 |vpiName:WP + |vpiFullName:write_en.write_en.WP |vpiOperand: \_constant: , line:54:30, endln:54:31 |vpiParent: @@ -64768,14 +64305,14 @@ design: (work@oh_fifo_async) \_port: (in), line:55:9, endln:55:34 |vpiName:in |vpiHighConn: - \_part_select: , line:55:15, endln:55:33 - |vpiParent: - \_ref_obj: wr_data (wr_data), line:55:15, endln:55:22 - |vpiName:wr_data - |vpiDefName:wr_data + \_part_select: wr_data (wr_data), line:55:15, endln:55:33 + |vpiName:wr_data + |vpiDefName:wr_data |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:55:23, endln:55:30 + |vpiParent: + \_part_select: wr_data (wr_data), line:55:15, endln:55:33 |vpiOpType:11 |vpiOperand: \_operation: , line:55:23, endln:55:28 @@ -64783,15 +64320,17 @@ design: (work@oh_fifo_async) \_operation: , line:55:23, endln:55:30 |vpiOpType:25 |vpiOperand: - \_ref_obj: (WP), line:55:23, endln:55:25 + \_ref_obj: (wr_data.WP), line:55:23, endln:55:25 |vpiParent: \_operation: , line:55:23, endln:55:28 |vpiName:WP + |vpiFullName:wr_data.WP |vpiOperand: - \_ref_obj: (RW), line:55:26, endln:55:28 + \_ref_obj: (wr_data.RW), line:55:26, endln:55:28 |vpiParent: \_operation: , line:55:23, endln:55:28 |vpiName:RW + |vpiFullName:wr_data.RW |vpiOperand: \_constant: , line:55:29, endln:55:30 |vpiParent: @@ -64898,27 +64437,34 @@ design: (work@oh_fifo_async) |vpiOpType:7 |vpiOperand: \_var_select: (write_en), line:62:9, endln:62:28 + |vpiParent: + \_operation: , line:62:8, endln:62:28 |vpiName:write_en |vpiIndex: - \_ref_obj: (i), line:62:18, endln:62:19 + \_ref_obj: (write_en.i), line:62:18, endln:62:19 |vpiParent: - \_operation: , line:62:8, endln:62:28 + \_var_select: (write_en), line:62:9, endln:62:28 |vpiName:i + |vpiFullName:write_en.i |vpiIndex: - \_part_select: , line:62:21, endln:62:27 + \_part_select: write_en (write_en.write_en), line:62:21, endln:62:27 |vpiParent: \_var_select: (write_en), line:62:9, endln:62:28 + |vpiName:write_en + |vpiFullName:write_en.write_en + |vpiDefName:write_en |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:62:21, endln:62:25 |vpiParent: - \_operation: , line:62:8, endln:62:28 + \_part_select: write_en (write_en.write_en), line:62:21, endln:62:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (WP), line:62:21, endln:62:23 + \_ref_obj: (write_en.write_en.WP), line:62:21, endln:62:23 |vpiParent: - \_operation: , line:62:8, endln:62:28 + \_operation: , line:62:21, endln:62:25 |vpiName:WP + |vpiFullName:write_en.write_en.WP |vpiOperand: \_constant: , line:62:24, endln:62:25 |vpiParent: @@ -64941,28 +64487,22 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (datamux), line:63:16, endln:63:26 |vpiParent: - \_ref_obj: (datamux) - |vpiParent: - \_assignment: , line:63:6, endln:63:26 - |vpiName:datamux + \_assignment: , line:63:6, endln:63:26 |vpiName:datamux |vpiIndex: \_ref_obj: (i), line:63:24, endln:63:25 |vpiParent: - \_if_stmt: , line:62:4, endln:63:27 + \_bit_select: (datamux), line:63:16, endln:63:26 |vpiName:i |vpiLhs: \_bit_select: (mem), line:63:6, endln:63:12 |vpiParent: - \_ref_obj: (mem) - |vpiParent: - \_assignment: , line:63:6, endln:63:26 - |vpiName:mem + \_assignment: , line:63:6, endln:63:26 |vpiName:mem |vpiIndex: \_ref_obj: (i), line:63:10, endln:63:11 |vpiParent: - \_if_stmt: , line:62:4, endln:63:27 + \_bit_select: (mem), line:63:6, endln:63:12 |vpiName:i |vpiAlwaysType:1 |vpiGenStmt: @@ -65054,79 +64594,78 @@ design: (work@oh_fifo_async) |vpiOpType:33 |vpiOperand: \_bit_select: (rd_valid), line:72:40, endln:72:51 - |vpiParent: - \_ref_obj: (rd_valid) - |vpiName:rd_valid |vpiName:rd_valid |vpiIndex: - \_ref_obj: (rd_valid.i), line:72:49, endln:72:50 + \_ref_obj: (i), line:72:49, endln:72:50 |vpiParent: \_bit_select: (rd_valid), line:72:40, endln:72:51 |vpiName:i - |vpiFullName:rd_valid.i |vpiOperand: \_bit_select: (mem), line:73:5, endln:73:29 |vpiParent: - \_ref_obj: (mem) - |vpiParent: - \_operation: , line:72:34, endln:73:29 - |vpiName:mem + \_operation: , line:72:34, endln:73:29 |vpiName:mem |vpiIndex: - \_indexed_part_select: , line:73:17, endln:73:27 + \_indexed_part_select: rd_addr (mem.rd_addr), line:73:17, endln:73:27 |vpiParent: - \_ref_obj: rd_addr (rd_addr) - |vpiParent: - \_operation: , line:72:34, endln:73:29 - |vpiName:rd_addr - |vpiDefName:rd_addr + \_bit_select: (mem), line:73:5, endln:73:29 + |vpiName:rd_addr + |vpiFullName:mem.rd_addr + |vpiDefName:rd_addr |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:73:17, endln:73:22 |vpiParent: - \_operation: , line:72:34, endln:73:29 + \_indexed_part_select: rd_addr (mem.rd_addr), line:73:17, endln:73:27 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:73:17, endln:73:18 + \_ref_obj: (mem.rd_addr.i), line:73:17, endln:73:18 |vpiParent: - \_operation: , line:72:34, endln:73:29 + \_operation: , line:73:17, endln:73:22 |vpiName:i + |vpiFullName:mem.rd_addr.i |vpiOperand: - \_ref_obj: (RAW), line:73:19, endln:73:22 + \_ref_obj: (mem.rd_addr.RAW), line:73:19, endln:73:22 |vpiParent: \_operation: , line:73:17, endln:73:22 |vpiName:RAW + |vpiFullName:mem.rd_addr.RAW |vpiWidthExpr: - \_ref_obj: (RAW), line:73:24, endln:73:27 + \_ref_obj: (mem.RAW), line:73:24, endln:73:27 |vpiParent: - \_operation: , line:72:34, endln:73:29 + \_indexed_part_select: rd_addr (mem.rd_addr), line:73:17, endln:73:27 |vpiName:RAW + |vpiFullName:mem.RAW |vpiLhs: - \_indexed_part_select: , line:72:14, endln:72:31 + \_indexed_part_select: rd_data (rd_data), line:72:14, endln:72:31 |vpiParent: - \_ref_obj: rd_data (rd_data) - |vpiParent: - \_cont_assign: , line:72:14, endln:73:29 - |vpiName:rd_data - |vpiDefName:rd_data + \_cont_assign: , line:72:14, endln:73:29 + |vpiName:rd_data + |vpiDefName:rd_data |vpiConstantSelect:1 |vpiIndexedPartSelectType:1 |vpiBaseExpr: \_operation: , line:72:22, endln:72:26 + |vpiParent: + \_indexed_part_select: rd_data (rd_data), line:72:14, endln:72:31 |vpiOpType:25 |vpiOperand: - \_ref_obj: (i), line:72:22, endln:72:23 + \_ref_obj: (rd_data.i), line:72:22, endln:72:23 |vpiParent: \_operation: , line:72:22, endln:72:26 |vpiName:i + |vpiFullName:rd_data.i |vpiOperand: - \_ref_obj: (RW), line:72:24, endln:72:26 + \_ref_obj: (rd_data.RW), line:72:24, endln:72:26 |vpiParent: \_operation: , line:72:22, endln:72:26 |vpiName:RW + |vpiFullName:rd_data.RW |vpiWidthExpr: \_ref_obj: (RW), line:72:28, endln:72:30 + |vpiParent: + \_indexed_part_select: rd_data (rd_data), line:72:14, endln:72:31 |vpiName:RW |uhdmallModules: \_module_inst: work@oh_rise2pulse (work@oh_rise2pulse), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v, line:8:1, endln:26:10 @@ -65344,32 +64883,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:20:26, endln:20:29 - |vpiParent: - \_assignment: , line:20:8, endln:20:29 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:20:8, endln:20:21 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:20:8, endln:20:21 |vpiParent: - \_ref_obj: in_reg (work@oh_rise2pulse.in_reg) - |vpiParent: - \_assignment: , line:20:8, endln:20:29 - |vpiName:in_reg - |vpiFullName:work@oh_rise2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:20:8, endln:20:29 + |vpiName:in_reg + |vpiFullName:work@oh_rise2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:15, endln:20:18 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:20:8, endln:20:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_rise2pulse.N), line:20:15, endln:20:16 + \_ref_obj: (work@oh_rise2pulse.in_reg.N), line:20:15, endln:20:16 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_operation: , line:20:15, endln:20:18 |vpiName:N - |vpiFullName:work@oh_rise2pulse.N + |vpiFullName:work@oh_rise2pulse.in_reg.N |vpiOperand: \_constant: , line:20:17, endln:20:18 |vpiParent: @@ -65390,26 +64925,24 @@ design: (work@oh_fifo_async) \_if_else: , line:19:6, endln:22:37 |vpiOpType:82 |vpiRhs: - \_part_select: , line:22:26, endln:22:35 + \_part_select: in (work@oh_rise2pulse.in), line:22:26, endln:22:35 |vpiParent: - \_ref_obj: in (work@oh_rise2pulse.in), line:22:26, endln:22:28 - |vpiParent: - \_assignment: , line:22:8, endln:22:35 - |vpiName:in - |vpiFullName:work@oh_rise2pulse.in - |vpiDefName:in + \_assignment: , line:22:8, endln:22:35 + |vpiName:in + |vpiFullName:work@oh_rise2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:29, endln:22:32 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_part_select: in (work@oh_rise2pulse.in), line:22:26, endln:22:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_rise2pulse.N), line:22:29, endln:22:30 + \_ref_obj: (work@oh_rise2pulse.in.N), line:22:29, endln:22:30 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_operation: , line:22:29, endln:22:32 |vpiName:N - |vpiFullName:work@oh_rise2pulse.N + |vpiFullName:work@oh_rise2pulse.in.N |vpiOperand: \_constant: , line:22:31, endln:22:32 |vpiParent: @@ -65425,26 +64958,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:22:8, endln:22:21 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:22:8, endln:22:21 |vpiParent: - \_ref_obj: in_reg (work@oh_rise2pulse.in_reg) - |vpiParent: - \_assignment: , line:22:8, endln:22:35 - |vpiName:in_reg - |vpiFullName:work@oh_rise2pulse.in_reg - |vpiDefName:in_reg + \_assignment: , line:22:8, endln:22:35 + |vpiName:in_reg + |vpiFullName:work@oh_rise2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:15, endln:22:18 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:22:8, endln:22:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_rise2pulse.N), line:22:15, endln:22:16 + \_ref_obj: (work@oh_rise2pulse.in_reg.N), line:22:15, endln:22:16 |vpiParent: - \_if_else: , line:19:6, endln:22:37 + \_operation: , line:22:15, endln:22:18 |vpiName:N - |vpiFullName:work@oh_rise2pulse.N + |vpiFullName:work@oh_rise2pulse.in_reg.N |vpiOperand: \_constant: , line:22:17, endln:22:18 |vpiParent: @@ -65470,23 +65001,24 @@ design: (work@oh_fifo_async) \_cont_assign: , line:24:11, endln:24:51 |vpiOpType:28 |vpiOperand: - \_part_select: , line:24:25, endln:24:34 + \_part_select: in (work@oh_rise2pulse.in), line:24:25, endln:24:34 |vpiParent: - \_ref_obj: in (work@oh_rise2pulse.in), line:24:25, endln:24:27 - |vpiParent: - \_operation: , line:24:25, endln:24:51 - |vpiName:in - |vpiFullName:work@oh_rise2pulse.in - |vpiDefName:in + \_operation: , line:24:25, endln:24:51 + |vpiName:in + |vpiFullName:work@oh_rise2pulse.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:28, endln:24:31 + |vpiParent: + \_part_select: in (work@oh_rise2pulse.in), line:24:25, endln:24:34 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:28, endln:24:29 + \_ref_obj: (work@oh_rise2pulse.in.N), line:24:28, endln:24:29 |vpiParent: \_operation: , line:24:28, endln:24:31 |vpiName:N + |vpiFullName:work@oh_rise2pulse.in.N |vpiOperand: \_constant: , line:24:30, endln:24:31 |vpiParent: @@ -65507,26 +65039,24 @@ design: (work@oh_fifo_async) \_operation: , line:24:25, endln:24:51 |vpiOpType:4 |vpiOperand: - \_part_select: , line:24:38, endln:24:51 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:24:38, endln:24:51 |vpiParent: - \_ref_obj: in_reg (work@oh_rise2pulse.in_reg), line:24:38, endln:24:44 - |vpiParent: - \_operation: , line:24:37, endln:24:51 - |vpiName:in_reg - |vpiFullName:work@oh_rise2pulse.in_reg - |vpiDefName:in_reg + \_operation: , line:24:37, endln:24:51 + |vpiName:in_reg + |vpiFullName:work@oh_rise2pulse.in_reg + |vpiDefName:in_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:45, endln:24:48 |vpiParent: - \_operation: , line:24:37, endln:24:51 + \_part_select: in_reg (work@oh_rise2pulse.in_reg), line:24:38, endln:24:51 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_rise2pulse.N), line:24:45, endln:24:46 + \_ref_obj: (work@oh_rise2pulse.in_reg.N), line:24:45, endln:24:46 |vpiParent: - \_operation: , line:24:37, endln:24:51 + \_operation: , line:24:45, endln:24:48 |vpiName:N - |vpiFullName:work@oh_rise2pulse.N + |vpiFullName:work@oh_rise2pulse.in_reg.N |vpiOperand: \_constant: , line:24:47, endln:24:48 |vpiParent: @@ -65542,23 +65072,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:24:11, endln:24:21 + \_part_select: out (work@oh_rise2pulse.out), line:24:11, endln:24:21 |vpiParent: - \_ref_obj: out (work@oh_rise2pulse.out) - |vpiParent: - \_cont_assign: , line:24:11, endln:24:51 - |vpiName:out - |vpiFullName:work@oh_rise2pulse.out - |vpiDefName:out + \_cont_assign: , line:24:11, endln:24:51 + |vpiName:out + |vpiFullName:work@oh_rise2pulse.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:15, endln:24:18 + |vpiParent: + \_part_select: out (work@oh_rise2pulse.out), line:24:11, endln:24:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:24:15, endln:24:16 + \_ref_obj: (work@oh_rise2pulse.out.N), line:24:15, endln:24:16 |vpiParent: \_operation: , line:24:15, endln:24:18 |vpiName:N + |vpiFullName:work@oh_rise2pulse.out.N |vpiOperand: \_constant: , line:24:17, endln:24:18 |vpiParent: @@ -65814,30 +65345,27 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:25:36, endln:25:39 - |vpiParent: - \_assignment: , line:25:9, endln:25:39 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:25:9, endln:25:32 + \_part_select: sync_pipe (sync_pipe), line:25:9, endln:25:32 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:25:9, endln:25:39 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:25:9, endln:25:39 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:19, endln:25:29 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_part_select: sync_pipe (sync_pipe), line:25:9, endln:25:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:25:19, endln:25:27 + \_ref_obj: (sync_pipe.SYNCPIPE), line:25:19, endln:25:27 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_operation: , line:25:19, endln:25:29 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:25:28, endln:25:29 |vpiParent: @@ -65860,27 +65388,26 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:27:36, endln:27:66 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_assignment: , line:27:9, endln:27:66 |vpiOpType:33 |vpiOperand: - \_part_select: , line:27:37, endln:27:60 + \_part_select: sync_pipe (sync_pipe), line:27:37, endln:27:60 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe), line:27:37, endln:27:46 - |vpiParent: - \_if_else: , line:24:7, endln:27:67 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:27:9, endln:27:66 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:47, endln:27:57 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_part_select: sync_pipe (sync_pipe), line:27:37, endln:27:60 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:27:47, endln:27:55 + \_ref_obj: (sync_pipe.SYNCPIPE), line:27:47, endln:27:55 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_operation: , line:27:47, endln:27:57 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:27:56, endln:27:57 |vpiParent: @@ -65904,24 +65431,23 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:27:9, endln:27:32 + \_part_select: sync_pipe (sync_pipe), line:27:9, endln:27:32 |vpiParent: - \_ref_obj: sync_pipe (sync_pipe) - |vpiParent: - \_assignment: , line:27:9, endln:27:66 - |vpiName:sync_pipe - |vpiDefName:sync_pipe + \_assignment: , line:27:9, endln:27:66 + |vpiName:sync_pipe + |vpiDefName:sync_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:19, endln:27:29 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_part_select: sync_pipe (sync_pipe), line:27:9, endln:27:32 |vpiOpType:11 |vpiOperand: - \_ref_obj: (SYNCPIPE), line:27:19, endln:27:27 + \_ref_obj: (sync_pipe.SYNCPIPE), line:27:19, endln:27:27 |vpiParent: - \_if_else: , line:24:7, endln:27:67 + \_operation: , line:27:19, endln:27:29 |vpiName:SYNCPIPE + |vpiFullName:sync_pipe.SYNCPIPE |vpiOperand: \_constant: , line:27:28, endln:27:29 |vpiParent: @@ -65942,10 +65468,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (sync_pipe), line:28:23, endln:28:44 |vpiParent: - \_ref_obj: (sync_pipe) - |vpiParent: - \_cont_assign: , line:28:12, endln:28:44 - |vpiName:sync_pipe + \_cont_assign: , line:28:12, endln:28:44 |vpiName:sync_pipe |vpiIndex: \_operation: , line:28:33, endln:28:43 @@ -66283,12 +65806,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:18:13, endln:18:24 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_assignment: , line:18:8, endln:18:24 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffq.se), line:18:13, endln:18:15 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_operation: , line:18:13, endln:18:24 |vpiName:se |vpiFullName:work@oh_sdffq.se |vpiOperand: @@ -66306,7 +65829,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffq.q), line:18:8, endln:18:9 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_assignment: , line:18:8, endln:18:24 |vpiName:q |vpiFullName:work@oh_sdffq.q |vpiAlwaysType:1 @@ -66598,12 +66121,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:18:12, endln:18:25 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_assignment: , line:18:6, endln:18:25 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffqn.se), line:18:12, endln:18:14 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_operation: , line:18:12, endln:18:25 |vpiName:se |vpiFullName:work@oh_sdffqn.se |vpiOperand: @@ -66631,7 +66154,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffqn.qn), line:18:6, endln:18:8 |vpiParent: - \_event_control: , line:17:11, endln:17:26 + \_assignment: , line:18:6, endln:18:25 |vpiName:qn |vpiFullName:work@oh_sdffqn.qn |vpiAlwaysType:1 @@ -66993,15 +66516,13 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:21:13, endln:21:16 - |vpiParent: - \_assignment: , line:21:8, endln:21:16 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: \_ref_obj: (work@oh_sdffrq.q), line:21:8, endln:21:9 |vpiParent: - \_if_else: , line:20:6, endln:23:25 + \_assignment: , line:21:8, endln:21:16 |vpiName:q |vpiFullName:work@oh_sdffrq.q |vpiElseStmt: @@ -67012,12 +66533,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:23:13, endln:23:24 |vpiParent: - \_if_else: , line:20:6, endln:23:25 + \_assignment: , line:23:8, endln:23:24 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffrq.se), line:23:13, endln:23:15 |vpiParent: - \_if_else: , line:20:6, endln:23:25 + \_operation: , line:23:13, endln:23:24 |vpiName:se |vpiFullName:work@oh_sdffrq.se |vpiOperand: @@ -67035,7 +66556,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffrq.q), line:23:8, endln:23:9 |vpiParent: - \_if_else: , line:20:6, endln:23:25 + \_assignment: , line:23:8, endln:23:24 |vpiName:q |vpiFullName:work@oh_sdffrq.q |vpiAlwaysType:1 @@ -67398,18 +66919,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:20:14, endln:20:24 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:20:8, endln:20:24 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_sdffrqn.DW), line:20:15, endln:20:17 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:20:8, endln:20:24 |vpiName:DW |vpiFullName:work@oh_sdffrqn.DW |vpiOperand: \_operation: , line:20:17, endln:20:23 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:20:8, endln:20:24 |vpiOpType:33 |vpiOperand: \_constant: , line:20:18, endln:20:22 @@ -67420,7 +66941,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffrqn.qn), line:20:8, endln:20:10 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:20:8, endln:20:24 |vpiName:qn |vpiFullName:work@oh_sdffrqn.qn |vpiElseStmt: @@ -67431,12 +66952,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:22:15, endln:22:28 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:22:8, endln:22:28 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffrqn.se), line:22:15, endln:22:17 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_operation: , line:22:15, endln:22:28 |vpiName:se |vpiFullName:work@oh_sdffrqn.se |vpiOperand: @@ -67464,7 +66985,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffrqn.qn), line:22:8, endln:22:10 |vpiParent: - \_if_else: , line:19:6, endln:22:29 + \_assignment: , line:22:8, endln:22:28 |vpiName:qn |vpiFullName:work@oh_sdffrqn.qn |vpiAlwaysType:1 @@ -67827,18 +67348,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:20:13, endln:20:23 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:20:8, endln:20:23 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_sdffsq.DW), line:20:14, endln:20:16 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:20:8, endln:20:23 |vpiName:DW |vpiFullName:work@oh_sdffsq.DW |vpiOperand: \_operation: , line:20:16, endln:20:22 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:20:8, endln:20:23 |vpiOpType:33 |vpiOperand: \_constant: , line:20:17, endln:20:21 @@ -67849,7 +67370,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffsq.q), line:20:8, endln:20:9 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:20:8, endln:20:23 |vpiName:q |vpiFullName:work@oh_sdffsq.q |vpiElseStmt: @@ -67860,12 +67381,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:22:13, endln:22:24 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:22:8, endln:22:24 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffsq.se), line:22:13, endln:22:15 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_operation: , line:22:13, endln:22:24 |vpiName:se |vpiFullName:work@oh_sdffsq.se |vpiOperand: @@ -67883,7 +67404,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffsq.q), line:22:8, endln:22:9 |vpiParent: - \_if_else: , line:19:6, endln:22:25 + \_assignment: , line:22:8, endln:22:24 |vpiName:q |vpiFullName:work@oh_sdffsq.q |vpiAlwaysType:1 @@ -68245,15 +67766,13 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:20:14, endln:20:17 - |vpiParent: - \_assignment: , line:20:8, endln:20:17 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: \_ref_obj: (work@oh_sdffsqn.qn), line:20:8, endln:20:10 |vpiParent: - \_if_else: , line:19:6, endln:22:28 + \_assignment: , line:20:8, endln:20:17 |vpiName:qn |vpiFullName:work@oh_sdffsqn.qn |vpiElseStmt: @@ -68264,12 +67783,12 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:22:14, endln:22:27 |vpiParent: - \_if_else: , line:19:6, endln:22:28 + \_assignment: , line:22:8, endln:22:27 |vpiOpType:32 |vpiOperand: \_ref_obj: (work@oh_sdffsqn.se), line:22:14, endln:22:16 |vpiParent: - \_if_else: , line:19:6, endln:22:28 + \_operation: , line:22:14, endln:22:27 |vpiName:se |vpiFullName:work@oh_sdffsqn.se |vpiOperand: @@ -68297,7 +67816,7 @@ design: (work@oh_fifo_async) |vpiLhs: \_ref_obj: (work@oh_sdffsqn.qn), line:22:8, endln:22:10 |vpiParent: - \_if_else: , line:19:6, endln:22:28 + \_assignment: , line:22:8, endln:22:27 |vpiName:qn |vpiFullName:work@oh_sdffsqn.qn |vpiAlwaysType:1 @@ -68372,7 +67891,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (PW), line:10:29, endln:10:31 |vpiParent: - \_sys_func_call: ($clog2), line:10:22, endln:10:35 + \_operation: , line:10:29, endln:10:34 |vpiName:PW |vpiOperand: \_ref_obj: (SW), line:10:32, endln:10:34 @@ -68576,7 +68095,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_ser2par.shift), line:24:9, endln:24:14 |vpiParent: - \_event_control: , line:23:11, endln:23:26 + \_operation: , line:24:9, endln:24:25 |vpiName:shift |vpiFullName:work@oh_ser2par.shift |vpiOperand: @@ -68593,29 +68112,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:25:24, endln:25:51 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_assignment: , line:25:8, endln:25:51 |vpiOpType:33 |vpiOperand: - \_part_select: , line:25:25, endln:25:36 + \_part_select: din (work@oh_ser2par.din), line:25:25, endln:25:36 |vpiParent: - \_ref_obj: din (work@oh_ser2par.din), line:25:25, endln:25:28 - |vpiParent: - \_if_else: , line:24:6, endln:27:54 - |vpiName:din - |vpiFullName:work@oh_ser2par.din - |vpiDefName:din + \_assignment: , line:25:8, endln:25:51 + |vpiName:din + |vpiFullName:work@oh_ser2par.din + |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:29, endln:25:33 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_part_select: din (work@oh_ser2par.din), line:25:25, endln:25:36 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.SW), line:25:29, endln:25:31 + \_ref_obj: (work@oh_ser2par.din.SW), line:25:29, endln:25:31 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_operation: , line:25:29, endln:25:33 |vpiName:SW - |vpiFullName:work@oh_ser2par.SW + |vpiFullName:work@oh_ser2par.din.SW |vpiOperand: \_constant: , line:25:32, endln:25:33 |vpiParent: @@ -68631,26 +68148,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:25:37, endln:25:50 + \_part_select: dout (work@oh_ser2par.dout), line:25:37, endln:25:50 |vpiParent: - \_ref_obj: dout (work@oh_ser2par.dout), line:25:37, endln:25:41 - |vpiParent: - \_if_else: , line:24:6, endln:27:54 - |vpiName:dout - |vpiFullName:work@oh_ser2par.dout - |vpiDefName:dout + \_assignment: , line:25:8, endln:25:51 + |vpiName:dout + |vpiFullName:work@oh_ser2par.dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:42, endln:25:46 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_part_select: dout (work@oh_ser2par.dout), line:25:37, endln:25:50 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.PW), line:25:42, endln:25:44 + \_ref_obj: (work@oh_ser2par.dout.PW), line:25:42, endln:25:44 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_operation: , line:25:42, endln:25:46 |vpiName:PW - |vpiFullName:work@oh_ser2par.PW + |vpiFullName:work@oh_ser2par.dout.PW |vpiOperand: \_constant: , line:25:45, endln:25:46 |vpiParent: @@ -68660,32 +68175,30 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiRightRange: - \_ref_obj: (work@oh_ser2par.SW), line:25:47, endln:25:49 + \_ref_obj: (work@oh_ser2par.dout.SW), line:25:47, endln:25:49 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_part_select: dout (work@oh_ser2par.dout), line:25:37, endln:25:50 |vpiName:SW - |vpiFullName:work@oh_ser2par.SW + |vpiFullName:work@oh_ser2par.dout.SW |vpiLhs: - \_part_select: , line:25:8, endln:25:20 + \_part_select: dout (work@oh_ser2par.dout), line:25:8, endln:25:20 |vpiParent: - \_ref_obj: dout (work@oh_ser2par.dout) - |vpiParent: - \_assignment: , line:25:8, endln:25:51 - |vpiName:dout - |vpiFullName:work@oh_ser2par.dout - |vpiDefName:dout + \_assignment: , line:25:8, endln:25:51 + |vpiName:dout + |vpiFullName:work@oh_ser2par.dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:13, endln:25:17 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_part_select: dout (work@oh_ser2par.dout), line:25:8, endln:25:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.PW), line:25:13, endln:25:15 + \_ref_obj: (work@oh_ser2par.dout.PW), line:25:13, endln:25:15 |vpiParent: - \_if_else: , line:24:6, endln:27:54 + \_operation: , line:25:13, endln:25:17 |vpiName:PW - |vpiFullName:work@oh_ser2par.PW + |vpiFullName:work@oh_ser2par.dout.PW |vpiOperand: \_constant: , line:25:16, endln:25:17 |vpiParent: @@ -68718,40 +68231,38 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:27:24, endln:27:53 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_assignment: , line:27:8, endln:27:53 |vpiOpType:33 |vpiOperand: - \_part_select: , line:27:25, endln:27:40 + \_part_select: dout (work@oh_ser2par.dout), line:27:25, endln:27:40 |vpiParent: - \_ref_obj: dout (work@oh_ser2par.dout), line:27:25, endln:27:29 - |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 - |vpiName:dout - |vpiFullName:work@oh_ser2par.dout - |vpiDefName:dout + \_assignment: , line:27:8, endln:27:53 + |vpiName:dout + |vpiFullName:work@oh_ser2par.dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:30, endln:27:37 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_part_select: dout (work@oh_ser2par.dout), line:27:25, endln:27:40 |vpiOpType:11 |vpiOperand: \_operation: , line:27:30, endln:27:35 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_operation: , line:27:30, endln:27:37 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.PW), line:27:30, endln:27:32 + \_ref_obj: (work@oh_ser2par.dout.PW), line:27:30, endln:27:32 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_operation: , line:27:30, endln:27:35 |vpiName:PW - |vpiFullName:work@oh_ser2par.PW + |vpiFullName:work@oh_ser2par.dout.PW |vpiOperand: - \_ref_obj: (work@oh_ser2par.SW), line:27:33, endln:27:35 + \_ref_obj: (work@oh_ser2par.dout.SW), line:27:33, endln:27:35 |vpiParent: \_operation: , line:27:30, endln:27:35 |vpiName:SW - |vpiFullName:work@oh_ser2par.SW + |vpiFullName:work@oh_ser2par.dout.SW |vpiOperand: \_constant: , line:27:36, endln:27:37 |vpiParent: @@ -68767,26 +68278,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:27:41, endln:27:52 + \_part_select: din (work@oh_ser2par.din), line:27:41, endln:27:52 |vpiParent: - \_ref_obj: din (work@oh_ser2par.din), line:27:41, endln:27:44 - |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 - |vpiName:din - |vpiFullName:work@oh_ser2par.din - |vpiDefName:din + \_assignment: , line:27:8, endln:27:53 + |vpiName:din + |vpiFullName:work@oh_ser2par.din + |vpiDefName:din |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:45, endln:27:49 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_part_select: din (work@oh_ser2par.din), line:27:41, endln:27:52 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.SW), line:27:45, endln:27:47 + \_ref_obj: (work@oh_ser2par.din.SW), line:27:45, endln:27:47 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_operation: , line:27:45, endln:27:49 |vpiName:SW - |vpiFullName:work@oh_ser2par.SW + |vpiFullName:work@oh_ser2par.din.SW |vpiOperand: \_constant: , line:27:48, endln:27:49 |vpiParent: @@ -68802,26 +68311,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:27:8, endln:27:20 + \_part_select: dout (work@oh_ser2par.dout), line:27:8, endln:27:20 |vpiParent: - \_ref_obj: dout (work@oh_ser2par.dout) - |vpiParent: - \_assignment: , line:27:8, endln:27:53 - |vpiName:dout - |vpiFullName:work@oh_ser2par.dout - |vpiDefName:dout + \_assignment: , line:27:8, endln:27:53 + |vpiName:dout + |vpiFullName:work@oh_ser2par.dout + |vpiDefName:dout |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:13, endln:27:17 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_part_select: dout (work@oh_ser2par.dout), line:27:8, endln:27:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_ser2par.PW), line:27:13, endln:27:15 + \_ref_obj: (work@oh_ser2par.dout.PW), line:27:13, endln:27:15 |vpiParent: - \_if_stmt: , line:26:11, endln:27:54 + \_operation: , line:27:13, endln:27:17 |vpiName:PW - |vpiFullName:work@oh_ser2par.PW + |vpiFullName:work@oh_ser2par.dout.PW |vpiOperand: \_constant: , line:27:16, endln:27:17 |vpiParent: @@ -69126,21 +68633,19 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (in), line:28:43, endln:28:50 |vpiParent: - \_ref_obj: (in) - |vpiParent: - \_operation: , line:28:30, endln:28:50 - |vpiName:in + \_operation: , line:28:30, endln:28:50 |vpiName:in |vpiIndex: \_operation: , line:28:46, endln:28:49 |vpiParent: - \_operation: , line:28:30, endln:28:50 + \_bit_select: (in), line:28:43, endln:28:50 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:46, endln:28:47 + \_ref_obj: (in.N), line:28:46, endln:28:47 |vpiParent: - \_operation: , line:28:30, endln:28:50 + \_operation: , line:28:46, endln:28:49 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:28:48, endln:28:49 |vpiParent: @@ -69180,20 +68685,23 @@ design: (work@oh_fifo_async) \_ref_obj: (shift_in), line:30:35, endln:30:43 |vpiName:shift_in |vpiOperand: - \_part_select: , line:30:46, endln:30:55 + \_part_select: in (in), line:30:46, endln:30:55 |vpiParent: - \_ref_obj: in (in), line:30:46, endln:30:48 - |vpiName:in - |vpiDefName:in + \_operation: , line:30:29, endln:30:56 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:49, endln:30:52 + |vpiParent: + \_part_select: in (in), line:30:46, endln:30:55 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:49, endln:30:50 + \_ref_obj: (in.N), line:30:49, endln:30:50 |vpiParent: \_operation: , line:30:49, endln:30:52 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:30:51, endln:30:52 |vpiParent: @@ -69209,16 +68717,16 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:30:10, endln:30:26 + \_part_select: in_sext (in_sext), line:30:10, endln:30:26 |vpiParent: - \_ref_obj: in_sext (in_sext) - |vpiParent: - \_cont_assign: , line:30:10, endln:30:56 - |vpiName:in_sext - |vpiDefName:in_sext + \_cont_assign: , line:30:10, endln:30:56 + |vpiName:in_sext + |vpiDefName:in_sext |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:18, endln:30:23 + |vpiParent: + \_part_select: in_sext (in_sext), line:30:10, endln:30:26 |vpiOpType:11 |vpiOperand: \_operation: , line:30:18, endln:30:21 @@ -69234,10 +68742,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:30:20, endln:30:21 + \_ref_obj: (in_sext.N), line:30:20, endln:30:21 |vpiParent: \_operation: , line:30:18, endln:30:21 |vpiName:N + |vpiFullName:in_sext.N |vpiOperand: \_constant: , line:30:22, endln:30:23 |vpiParent: @@ -69260,16 +68769,16 @@ design: (work@oh_fifo_async) \_cont_assign: , line:32:10, endln:32:61 |vpiOpType:23 |vpiOperand: - \_part_select: , line:32:29, endln:32:45 + \_part_select: in_sext (in_sext), line:32:29, endln:32:45 |vpiParent: - \_ref_obj: in_sext (in_sext), line:32:29, endln:32:36 - |vpiParent: - \_operation: , line:32:29, endln:32:61 - |vpiName:in_sext - |vpiDefName:in_sext + \_operation: , line:32:29, endln:32:61 + |vpiName:in_sext + |vpiDefName:in_sext |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:37, endln:32:42 + |vpiParent: + \_part_select: in_sext (in_sext), line:32:29, endln:32:45 |vpiOpType:11 |vpiOperand: \_operation: , line:32:37, endln:32:40 @@ -69285,10 +68794,11 @@ design: (work@oh_fifo_async) |UINT:2 |vpiConstType:9 |vpiOperand: - \_ref_obj: (N), line:32:39, endln:32:40 + \_ref_obj: (in_sext.N), line:32:39, endln:32:40 |vpiParent: \_operation: , line:32:37, endln:32:40 |vpiName:N + |vpiFullName:in_sext.N |vpiOperand: \_constant: , line:32:41, endln:32:42 |vpiParent: @@ -69304,24 +68814,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:32:49, endln:32:61 + \_part_select: shamt (shamt), line:32:49, endln:32:61 |vpiParent: - \_ref_obj: shamt (shamt), line:32:49, endln:32:54 - |vpiParent: - \_operation: , line:32:29, endln:32:61 - |vpiName:shamt - |vpiDefName:shamt + \_operation: , line:32:29, endln:32:61 + |vpiName:shamt + |vpiDefName:shamt |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:55, endln:32:58 |vpiParent: - \_operation: , line:32:29, endln:32:61 + \_part_select: shamt (shamt), line:32:49, endln:32:61 |vpiOpType:11 |vpiOperand: - \_ref_obj: (S), line:32:55, endln:32:56 + \_ref_obj: (shamt.S), line:32:55, endln:32:56 |vpiParent: - \_operation: , line:32:29, endln:32:61 + \_operation: , line:32:55, endln:32:58 |vpiName:S + |vpiFullName:shamt.S |vpiOperand: \_constant: , line:32:57, endln:32:58 |vpiParent: @@ -69337,22 +68846,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:32:10, endln:32:26 + \_part_select: sr_result (sr_result), line:32:10, endln:32:26 |vpiParent: - \_ref_obj: sr_result (sr_result) - |vpiParent: - \_cont_assign: , line:32:10, endln:32:61 - |vpiName:sr_result - |vpiDefName:sr_result + \_cont_assign: , line:32:10, endln:32:61 + |vpiName:sr_result + |vpiDefName:sr_result |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:20, endln:32:23 + |vpiParent: + \_part_select: sr_result (sr_result), line:32:10, endln:32:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:32:20, endln:32:21 + \_ref_obj: (sr_result.N), line:32:20, endln:32:21 |vpiParent: \_operation: , line:32:20, endln:32:23 |vpiName:N + |vpiFullName:sr_result.N |vpiOperand: \_constant: , line:32:22, endln:32:23 |vpiParent: @@ -69375,22 +68885,23 @@ design: (work@oh_fifo_async) \_cont_assign: , line:34:10, endln:34:61 |vpiOpType:22 |vpiOperand: - \_part_select: , line:34:29, endln:34:38 + \_part_select: in (in), line:34:29, endln:34:38 |vpiParent: - \_ref_obj: in (in), line:34:29, endln:34:31 - |vpiParent: - \_operation: , line:34:29, endln:34:61 - |vpiName:in - |vpiDefName:in + \_operation: , line:34:29, endln:34:61 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:32, endln:34:35 + |vpiParent: + \_part_select: in (in), line:34:29, endln:34:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:34:32, endln:34:33 + \_ref_obj: (in.N), line:34:32, endln:34:33 |vpiParent: \_operation: , line:34:32, endln:34:35 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:34:34, endln:34:35 |vpiParent: @@ -69406,24 +68917,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:34:49, endln:34:61 + \_part_select: shamt (shamt), line:34:49, endln:34:61 |vpiParent: - \_ref_obj: shamt (shamt), line:34:49, endln:34:54 - |vpiParent: - \_operation: , line:34:29, endln:34:61 - |vpiName:shamt - |vpiDefName:shamt + \_operation: , line:34:29, endln:34:61 + |vpiName:shamt + |vpiDefName:shamt |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:55, endln:34:58 |vpiParent: - \_operation: , line:34:29, endln:34:61 + \_part_select: shamt (shamt), line:34:49, endln:34:61 |vpiOpType:11 |vpiOperand: - \_ref_obj: (S), line:34:55, endln:34:56 + \_ref_obj: (shamt.S), line:34:55, endln:34:56 |vpiParent: - \_operation: , line:34:29, endln:34:61 + \_operation: , line:34:55, endln:34:58 |vpiName:S + |vpiFullName:shamt.S |vpiOperand: \_constant: , line:34:57, endln:34:58 |vpiParent: @@ -69439,22 +68949,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:34:10, endln:34:26 + \_part_select: sl_result (sl_result), line:34:10, endln:34:26 |vpiParent: - \_ref_obj: sl_result (sl_result) - |vpiParent: - \_cont_assign: , line:34:10, endln:34:61 - |vpiName:sl_result - |vpiDefName:sl_result + \_cont_assign: , line:34:10, endln:34:61 + |vpiName:sl_result + |vpiDefName:sl_result |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:34:20, endln:34:23 + |vpiParent: + \_part_select: sl_result (sl_result), line:34:10, endln:34:26 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:34:20, endln:34:21 + \_ref_obj: (sl_result.N), line:34:20, endln:34:21 |vpiParent: \_operation: , line:34:20, endln:34:23 |vpiName:N + |vpiFullName:sl_result.N |vpiOperand: \_constant: , line:34:22, endln:34:23 |vpiParent: @@ -69482,24 +68993,23 @@ design: (work@oh_fifo_async) \_operation: , line:36:29, endln:37:33 |vpiName:right |vpiOperand: - \_part_select: , line:36:37, endln:36:53 + \_part_select: sr_result (sr_result), line:36:37, endln:36:53 |vpiParent: - \_ref_obj: sr_result (sr_result), line:36:37, endln:36:46 - |vpiParent: - \_operation: , line:36:29, endln:37:33 - |vpiName:sr_result - |vpiDefName:sr_result + \_operation: , line:36:29, endln:37:33 + |vpiName:sr_result + |vpiDefName:sr_result |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:47, endln:36:50 |vpiParent: - \_operation: , line:36:29, endln:37:33 + \_part_select: sr_result (sr_result), line:36:37, endln:36:53 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:36:47, endln:36:48 + \_ref_obj: (sr_result.N), line:36:47, endln:36:48 |vpiParent: - \_operation: , line:36:29, endln:37:33 + \_operation: , line:36:47, endln:36:50 |vpiName:N + |vpiFullName:sr_result.N |vpiOperand: \_constant: , line:36:49, endln:36:50 |vpiParent: @@ -69515,24 +69025,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:37:17, endln:37:33 + \_part_select: sl_result (sl_result), line:37:17, endln:37:33 |vpiParent: - \_ref_obj: sl_result (sl_result), line:37:17, endln:37:26 - |vpiParent: - \_operation: , line:36:29, endln:37:33 - |vpiName:sl_result - |vpiDefName:sl_result + \_operation: , line:36:29, endln:37:33 + |vpiName:sl_result + |vpiDefName:sl_result |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:37:27, endln:37:30 |vpiParent: - \_operation: , line:36:29, endln:37:33 + \_part_select: sl_result (sl_result), line:37:17, endln:37:33 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:37:27, endln:37:28 + \_ref_obj: (sl_result.N), line:37:27, endln:37:28 |vpiParent: - \_operation: , line:36:29, endln:37:33 + \_operation: , line:37:27, endln:37:30 |vpiName:N + |vpiFullName:sl_result.N |vpiOperand: \_constant: , line:37:29, endln:37:30 |vpiParent: @@ -69548,22 +69057,23 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:36:10, endln:36:20 + \_part_select: out (out), line:36:10, endln:36:20 |vpiParent: - \_ref_obj: out (out) - |vpiParent: - \_cont_assign: , line:36:10, endln:37:33 - |vpiName:out - |vpiDefName:out + \_cont_assign: , line:36:10, endln:37:33 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:36:14, endln:36:17 + |vpiParent: + \_part_select: out (out), line:36:10, endln:36:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:36:14, endln:36:15 + \_ref_obj: (out.N), line:36:14, endln:36:15 |vpiParent: \_operation: , line:36:14, endln:36:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:36:16, endln:36:17 |vpiParent: @@ -69588,20 +69098,21 @@ design: (work@oh_fifo_async) \_port: (out), line:44:8, endln:44:26 |vpiName:out |vpiHighConn: - \_part_select: , line:44:15, endln:44:25 - |vpiParent: - \_ref_obj: out (out), line:44:15, endln:44:18 - |vpiName:out - |vpiDefName:out + \_part_select: out (out), line:44:15, endln:44:25 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:44:19, endln:44:22 + |vpiParent: + \_part_select: out (out), line:44:15, endln:44:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:44:19, endln:44:20 + \_ref_obj: (out.N), line:44:19, endln:44:20 |vpiParent: \_operation: , line:44:19, endln:44:22 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:44:21, endln:44:22 |vpiParent: @@ -69620,20 +69131,21 @@ design: (work@oh_fifo_async) \_port: (in), line:46:8, endln:46:24 |vpiName:in |vpiHighConn: - \_part_select: , line:46:14, endln:46:23 - |vpiParent: - \_ref_obj: in (in), line:46:14, endln:46:16 - |vpiName:in - |vpiDefName:in + \_part_select: in (in), line:46:14, endln:46:23 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:46:17, endln:46:20 + |vpiParent: + \_part_select: in (in), line:46:14, endln:46:23 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:46:17, endln:46:18 + \_ref_obj: (in.N), line:46:17, endln:46:18 |vpiParent: \_operation: , line:46:17, endln:46:20 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:46:19, endln:46:20 |vpiParent: @@ -69664,20 +69176,21 @@ design: (work@oh_fifo_async) \_port: (shamt), line:49:8, endln:49:30 |vpiName:shamt |vpiHighConn: - \_part_select: , line:49:17, endln:49:29 - |vpiParent: - \_ref_obj: shamt (shamt), line:49:17, endln:49:22 - |vpiName:shamt - |vpiDefName:shamt + \_part_select: shamt (shamt), line:49:17, endln:49:29 + |vpiName:shamt + |vpiDefName:shamt |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:49:23, endln:49:26 + |vpiParent: + \_part_select: shamt (shamt), line:49:17, endln:49:29 |vpiOpType:11 |vpiOperand: - \_ref_obj: (S), line:49:23, endln:49:24 + \_ref_obj: (shamt.S), line:49:23, endln:49:24 |vpiParent: \_operation: , line:49:23, endln:49:26 |vpiName:S + |vpiFullName:shamt.S |vpiOperand: \_constant: , line:49:25, endln:49:26 |vpiParent: @@ -70010,32 +69523,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:81:31, endln:81:34 - |vpiParent: - \_assignment: , line:81:8, endln:81:34 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:81:8, endln:81:27 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:81:8, endln:81:27 |vpiParent: - \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe) - |vpiParent: - \_assignment: , line:81:8, endln:81:34 - |vpiName:wakeup_pipe - |vpiFullName:work@oh_standby.wakeup_pipe - |vpiDefName:wakeup_pipe + \_assignment: , line:81:8, endln:81:34 + |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe + |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:81:20, endln:81:24 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:81:8, endln:81:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_standby.PD), line:81:20, endln:81:22 + \_ref_obj: (work@oh_standby.wakeup_pipe.PD), line:81:20, endln:81:22 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_operation: , line:81:20, endln:81:24 |vpiName:PD - |vpiFullName:work@oh_standby.PD + |vpiFullName:work@oh_standby.wakeup_pipe.PD |vpiOperand: \_constant: , line:81:23, endln:81:24 |vpiParent: @@ -70058,29 +69567,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:83:31, endln:83:64 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_assignment: , line:83:8, endln:83:64 |vpiOpType:33 |vpiOperand: - \_part_select: , line:83:32, endln:83:51 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:32, endln:83:51 |vpiParent: - \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:32, endln:83:43 - |vpiParent: - \_if_else: , line:80:6, endln:83:65 - |vpiName:wakeup_pipe - |vpiFullName:work@oh_standby.wakeup_pipe - |vpiDefName:wakeup_pipe + \_assignment: , line:83:8, endln:83:64 + |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe + |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:83:44, endln:83:48 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:32, endln:83:51 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_standby.PD), line:83:44, endln:83:46 + \_ref_obj: (work@oh_standby.wakeup_pipe.PD), line:83:44, endln:83:46 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_operation: , line:83:44, endln:83:48 |vpiName:PD - |vpiFullName:work@oh_standby.PD + |vpiFullName:work@oh_standby.wakeup_pipe.PD |vpiOperand: \_constant: , line:83:47, endln:83:48 |vpiParent: @@ -70098,30 +69605,28 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_standby.wakeup_now), line:83:53, endln:83:63 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_assignment: , line:83:8, endln:83:64 |vpiName:wakeup_now |vpiFullName:work@oh_standby.wakeup_now |vpiLhs: - \_part_select: , line:83:8, endln:83:27 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:8, endln:83:27 |vpiParent: - \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe) - |vpiParent: - \_assignment: , line:83:8, endln:83:64 - |vpiName:wakeup_pipe - |vpiFullName:work@oh_standby.wakeup_pipe - |vpiDefName:wakeup_pipe + \_assignment: , line:83:8, endln:83:64 + |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe + |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:83:20, endln:83:24 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:83:8, endln:83:27 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_standby.PD), line:83:20, endln:83:22 + \_ref_obj: (work@oh_standby.wakeup_pipe.PD), line:83:20, endln:83:22 |vpiParent: - \_if_else: , line:80:6, endln:83:65 + \_operation: , line:83:20, endln:83:24 |vpiName:PD - |vpiFullName:work@oh_standby.PD + |vpiFullName:work@oh_standby.wakeup_pipe.PD |vpiOperand: \_constant: , line:83:23, endln:83:24 |vpiParent: @@ -70206,26 +69711,24 @@ design: (work@oh_fifo_async) \_operation: , line:86:25, endln:87:47 |vpiOpType:7 |vpiOperand: - \_part_select: , line:87:27, endln:87:46 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:87:27, endln:87:46 |vpiParent: - \_ref_obj: wakeup_pipe (work@oh_standby.wakeup_pipe), line:87:27, endln:87:38 - |vpiParent: - \_operation: , line:87:26, endln:87:46 - |vpiName:wakeup_pipe - |vpiFullName:work@oh_standby.wakeup_pipe - |vpiDefName:wakeup_pipe + \_operation: , line:87:26, endln:87:46 + |vpiName:wakeup_pipe + |vpiFullName:work@oh_standby.wakeup_pipe + |vpiDefName:wakeup_pipe |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:87:39, endln:87:43 |vpiParent: - \_operation: , line:87:26, endln:87:46 + \_part_select: wakeup_pipe (work@oh_standby.wakeup_pipe), line:87:27, endln:87:46 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_standby.PD), line:87:39, endln:87:41 + \_ref_obj: (work@oh_standby.wakeup_pipe.PD), line:87:39, endln:87:41 |vpiParent: - \_operation: , line:87:26, endln:87:46 + \_operation: , line:87:39, endln:87:43 |vpiName:PD - |vpiFullName:work@oh_standby.PD + |vpiFullName:work@oh_standby.wakeup_pipe.PD |vpiOperand: \_constant: , line:87:42, endln:87:43 |vpiParent: @@ -70545,32 +70048,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:20:28, endln:20:31 - |vpiParent: - \_assignment: , line:20:8, endln:20:31 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:20:8, endln:20:25 + \_part_select: valid (work@oh_stretcher.valid), line:20:8, endln:20:25 |vpiParent: - \_ref_obj: valid (work@oh_stretcher.valid) - |vpiParent: - \_assignment: , line:20:8, endln:20:31 - |vpiName:valid - |vpiFullName:work@oh_stretcher.valid - |vpiDefName:valid + \_assignment: , line:20:8, endln:20:31 + |vpiName:valid + |vpiFullName:work@oh_stretcher.valid + |vpiDefName:valid |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:20:14, endln:20:22 |vpiParent: - \_if_else: , line:19:6, endln:24:53 + \_part_select: valid (work@oh_stretcher.valid), line:20:8, endln:20:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_stretcher.CYCLES), line:20:14, endln:20:20 + \_ref_obj: (work@oh_stretcher.valid.CYCLES), line:20:14, endln:20:20 |vpiParent: - \_if_else: , line:19:6, endln:24:53 + \_operation: , line:20:14, endln:20:22 |vpiName:CYCLES - |vpiFullName:work@oh_stretcher.CYCLES + |vpiFullName:work@oh_stretcher.valid.CYCLES |vpiOperand: \_constant: , line:20:21, endln:20:22 |vpiParent: @@ -70603,18 +70102,18 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:22:28, endln:22:44 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_assignment: , line:22:8, endln:22:44 |vpiOpType:34 |vpiOperand: \_ref_obj: (work@oh_stretcher.CYCLES), line:22:30, endln:22:36 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_assignment: , line:22:8, endln:22:44 |vpiName:CYCLES |vpiFullName:work@oh_stretcher.CYCLES |vpiOperand: \_operation: , line:22:37, endln:22:43 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_assignment: , line:22:8, endln:22:44 |vpiOpType:33 |vpiOperand: \_constant: , line:22:38, endln:22:42 @@ -70623,26 +70122,24 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:22:8, endln:22:25 + \_part_select: valid (work@oh_stretcher.valid), line:22:8, endln:22:25 |vpiParent: - \_ref_obj: valid (work@oh_stretcher.valid) - |vpiParent: - \_assignment: , line:22:8, endln:22:44 - |vpiName:valid - |vpiFullName:work@oh_stretcher.valid - |vpiDefName:valid + \_assignment: , line:22:8, endln:22:44 + |vpiName:valid + |vpiFullName:work@oh_stretcher.valid + |vpiDefName:valid |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:14, endln:22:22 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_part_select: valid (work@oh_stretcher.valid), line:22:8, endln:22:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_stretcher.CYCLES), line:22:14, endln:22:20 + \_ref_obj: (work@oh_stretcher.valid.CYCLES), line:22:14, endln:22:20 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_operation: , line:22:14, endln:22:22 |vpiName:CYCLES - |vpiFullName:work@oh_stretcher.CYCLES + |vpiFullName:work@oh_stretcher.valid.CYCLES |vpiOperand: \_constant: , line:22:21, endln:22:22 |vpiParent: @@ -70665,29 +70162,27 @@ design: (work@oh_fifo_async) |vpiRhs: \_operation: , line:24:28, endln:24:52 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_assignment: , line:24:8, endln:24:52 |vpiOpType:33 |vpiOperand: - \_part_select: , line:24:29, endln:24:46 + \_part_select: valid (work@oh_stretcher.valid), line:24:29, endln:24:46 |vpiParent: - \_ref_obj: valid (work@oh_stretcher.valid), line:24:29, endln:24:34 - |vpiParent: - \_if_else: , line:21:11, endln:24:53 - |vpiName:valid - |vpiFullName:work@oh_stretcher.valid - |vpiDefName:valid + \_assignment: , line:24:8, endln:24:52 + |vpiName:valid + |vpiFullName:work@oh_stretcher.valid + |vpiDefName:valid |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:35, endln:24:43 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_part_select: valid (work@oh_stretcher.valid), line:24:29, endln:24:46 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_stretcher.CYCLES), line:24:35, endln:24:41 + \_ref_obj: (work@oh_stretcher.valid.CYCLES), line:24:35, endln:24:41 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_operation: , line:24:35, endln:24:43 |vpiName:CYCLES - |vpiFullName:work@oh_stretcher.CYCLES + |vpiFullName:work@oh_stretcher.valid.CYCLES |vpiOperand: \_constant: , line:24:42, endln:24:43 |vpiParent: @@ -70711,26 +70206,24 @@ design: (work@oh_fifo_async) |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:24:8, endln:24:25 + \_part_select: valid (work@oh_stretcher.valid), line:24:8, endln:24:25 |vpiParent: - \_ref_obj: valid (work@oh_stretcher.valid) - |vpiParent: - \_assignment: , line:24:8, endln:24:52 - |vpiName:valid - |vpiFullName:work@oh_stretcher.valid - |vpiDefName:valid + \_assignment: , line:24:8, endln:24:52 + |vpiName:valid + |vpiFullName:work@oh_stretcher.valid + |vpiDefName:valid |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:24:14, endln:24:22 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_part_select: valid (work@oh_stretcher.valid), line:24:8, endln:24:25 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@oh_stretcher.CYCLES), line:24:14, endln:24:20 + \_ref_obj: (work@oh_stretcher.valid.CYCLES), line:24:14, endln:24:20 |vpiParent: - \_if_else: , line:21:11, endln:24:53 + \_operation: , line:24:14, endln:24:22 |vpiName:CYCLES - |vpiFullName:work@oh_stretcher.CYCLES + |vpiFullName:work@oh_stretcher.valid.CYCLES |vpiOperand: \_constant: , line:24:21, endln:24:22 |vpiParent: @@ -70753,11 +70246,7 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_stretcher.valid), line:26:17, endln:26:32 |vpiParent: - \_ref_obj: (work@oh_stretcher.valid) - |vpiParent: - \_cont_assign: , line:26:11, endln:26:32 - |vpiName:valid - |vpiFullName:work@oh_stretcher.valid + \_cont_assign: , line:26:11, endln:26:32 |vpiName:valid |vpiFullName:work@oh_stretcher.valid |vpiIndex: @@ -71035,20 +70524,21 @@ design: (work@oh_fifo_async) \_port: (out), line:30:4, endln:30:21 |vpiName:out |vpiHighConn: - \_part_select: , line:30:10, endln:30:20 - |vpiParent: - \_ref_obj: out (out), line:30:10, endln:30:13 - |vpiName:out - |vpiDefName:out + \_part_select: out (out), line:30:10, endln:30:20 + |vpiName:out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:30:14, endln:30:17 + |vpiParent: + \_part_select: out (out), line:30:10, endln:30:20 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:30:14, endln:30:15 + \_ref_obj: (out.N), line:30:14, endln:30:15 |vpiParent: \_operation: , line:30:14, endln:30:17 |vpiName:N + |vpiFullName:out.N |vpiOperand: \_constant: , line:30:16, endln:30:17 |vpiParent: @@ -71067,20 +70557,21 @@ design: (work@oh_fifo_async) \_port: (in), line:32:4, endln:32:19 |vpiName:in |vpiHighConn: - \_part_select: , line:32:9, endln:32:18 - |vpiParent: - \_ref_obj: in (in), line:32:9, endln:32:11 - |vpiName:in - |vpiDefName:in + \_part_select: in (in), line:32:9, endln:32:18 + |vpiName:in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:32:12, endln:32:15 + |vpiParent: + \_part_select: in (in), line:32:9, endln:32:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:32:12, endln:32:13 + \_ref_obj: (in.N), line:32:12, endln:32:13 |vpiParent: \_operation: , line:32:12, endln:32:15 |vpiName:N + |vpiFullName:in.N |vpiOperand: \_constant: , line:32:14, endln:32:15 |vpiParent: @@ -71099,20 +70590,21 @@ design: (work@oh_fifo_async) \_port: (ie), line:33:4, endln:33:19 |vpiName:ie |vpiHighConn: - \_part_select: , line:33:9, endln:33:18 - |vpiParent: - \_ref_obj: ie (ie), line:33:9, endln:33:11 - |vpiName:ie - |vpiDefName:ie + \_part_select: ie (ie), line:33:9, endln:33:18 + |vpiName:ie + |vpiDefName:ie |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:33:12, endln:33:15 + |vpiParent: + \_part_select: ie (ie), line:33:9, endln:33:18 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:33:12, endln:33:13 + \_ref_obj: (ie.N), line:33:12, endln:33:13 |vpiParent: \_operation: , line:33:12, endln:33:15 |vpiName:N + |vpiFullName:ie.N |vpiOperand: \_constant: , line:33:14, endln:33:15 |vpiParent: @@ -71312,7 +70804,7 @@ design: (work@oh_fifo_async) |vpiOperand: \_ref_obj: (work@oh_xnor2.a), line:14:18, endln:14:19 |vpiParent: - \_operation: , line:14:16, endln:14:24 + \_operation: , line:14:18, endln:14:23 |vpiName:a |vpiFullName:work@oh_xnor2.a |vpiOperand: @@ -71558,12 +71050,12 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:15:18, endln:15:23 |vpiParent: - \_operation: , line:15:16, endln:15:28 + \_operation: , line:15:18, endln:15:27 |vpiOpType:30 |vpiOperand: \_ref_obj: (work@oh_xnor3.a), line:15:18, endln:15:19 |vpiParent: - \_operation: , line:15:16, endln:15:28 + \_operation: , line:15:18, endln:15:23 |vpiName:a |vpiFullName:work@oh_xnor3.a |vpiOperand: @@ -71861,17 +71353,17 @@ design: (work@oh_fifo_async) |vpiOperand: \_operation: , line:16:18, endln:16:27 |vpiParent: - \_operation: , line:16:16, endln:16:32 + \_operation: , line:16:18, endln:16:31 |vpiOpType:30 |vpiOperand: \_operation: , line:16:18, endln:16:23 |vpiParent: - \_operation: , line:16:16, endln:16:32 + \_operation: , line:16:18, endln:16:27 |vpiOpType:30 |vpiOperand: \_ref_obj: (work@oh_xnor4.a), line:16:18, endln:16:19 |vpiParent: - \_operation: , line:16:16, endln:16:32 + \_operation: , line:16:18, endln:16:23 |vpiName:a |vpiFullName:work@oh_xnor4.a |vpiOperand: @@ -72870,32 +72362,28 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:25:26, endln:25:29 - |vpiParent: - \_assignment: , line:25:8, endln:25:29 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:25:8, endln:25:22 + \_part_select: out_reg (work@ohr_reg0.out_reg), line:25:8, endln:25:22 |vpiParent: - \_ref_obj: out_reg (work@ohr_reg0.out_reg) - |vpiParent: - \_assignment: , line:25:8, endln:25:29 - |vpiName:out_reg - |vpiFullName:work@ohr_reg0.out_reg - |vpiDefName:out_reg + \_assignment: , line:25:8, endln:25:29 + |vpiName:out_reg + |vpiFullName:work@ohr_reg0.out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:16, endln:25:19 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_part_select: out_reg (work@ohr_reg0.out_reg), line:25:8, endln:25:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@ohr_reg0.N), line:25:16, endln:25:17 + \_ref_obj: (work@ohr_reg0.out_reg.N), line:25:16, endln:25:17 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_operation: , line:25:16, endln:25:19 |vpiName:N - |vpiFullName:work@ohr_reg0.N + |vpiFullName:work@ohr_reg0.out_reg.N |vpiOperand: \_constant: , line:25:18, endln:25:19 |vpiParent: @@ -72916,26 +72404,24 @@ design: (work@oh_fifo_async) \_if_else: , line:24:6, endln:27:36 |vpiOpType:82 |vpiRhs: - \_part_select: , line:27:26, endln:27:35 + \_part_select: in (work@ohr_reg0.in), line:27:26, endln:27:35 |vpiParent: - \_ref_obj: in (work@ohr_reg0.in), line:27:26, endln:27:28 - |vpiParent: - \_assignment: , line:27:8, endln:27:35 - |vpiName:in - |vpiFullName:work@ohr_reg0.in - |vpiDefName:in + \_assignment: , line:27:8, endln:27:35 + |vpiName:in + |vpiFullName:work@ohr_reg0.in + |vpiDefName:in |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:29, endln:27:32 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_part_select: in (work@ohr_reg0.in), line:27:26, endln:27:35 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@ohr_reg0.N), line:27:29, endln:27:30 + \_ref_obj: (work@ohr_reg0.in.N), line:27:29, endln:27:30 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_operation: , line:27:29, endln:27:32 |vpiName:N - |vpiFullName:work@ohr_reg0.N + |vpiFullName:work@ohr_reg0.in.N |vpiOperand: \_constant: , line:27:31, endln:27:32 |vpiParent: @@ -72951,26 +72437,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:27:8, endln:27:22 + \_part_select: out_reg (work@ohr_reg0.out_reg), line:27:8, endln:27:22 |vpiParent: - \_ref_obj: out_reg (work@ohr_reg0.out_reg) - |vpiParent: - \_assignment: , line:27:8, endln:27:35 - |vpiName:out_reg - |vpiFullName:work@ohr_reg0.out_reg - |vpiDefName:out_reg + \_assignment: , line:27:8, endln:27:35 + |vpiName:out_reg + |vpiFullName:work@ohr_reg0.out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:16, endln:27:19 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_part_select: out_reg (work@ohr_reg0.out_reg), line:27:8, endln:27:22 |vpiOpType:11 |vpiOperand: - \_ref_obj: (work@ohr_reg0.N), line:27:16, endln:27:17 + \_ref_obj: (work@ohr_reg0.out_reg.N), line:27:16, endln:27:17 |vpiParent: - \_if_else: , line:24:6, endln:27:36 + \_operation: , line:27:16, endln:27:19 |vpiName:N - |vpiFullName:work@ohr_reg0.N + |vpiFullName:work@ohr_reg0.out_reg.N |vpiOperand: \_constant: , line:27:18, endln:27:19 |vpiParent: @@ -72991,23 +72475,24 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@ohr_reg0 (work@ohr_reg0), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v, line:8:1, endln:31:10 |vpiRhs: - \_part_select: , line:28:24, endln:28:38 + \_part_select: out_reg (work@ohr_reg0.out_reg), line:28:24, endln:28:38 |vpiParent: - \_ref_obj: out_reg (work@ohr_reg0.out_reg), line:28:24, endln:28:31 - |vpiParent: - \_cont_assign: , line:28:11, endln:28:38 - |vpiName:out_reg - |vpiFullName:work@ohr_reg0.out_reg - |vpiDefName:out_reg + \_cont_assign: , line:28:11, endln:28:38 + |vpiName:out_reg + |vpiFullName:work@ohr_reg0.out_reg + |vpiDefName:out_reg |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:32, endln:28:35 + |vpiParent: + \_part_select: out_reg (work@ohr_reg0.out_reg), line:28:24, endln:28:38 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:32, endln:28:33 + \_ref_obj: (work@ohr_reg0.out_reg.N), line:28:32, endln:28:33 |vpiParent: \_operation: , line:28:32, endln:28:35 |vpiName:N + |vpiFullName:work@ohr_reg0.out_reg.N |vpiOperand: \_constant: , line:28:34, endln:28:35 |vpiParent: @@ -73023,23 +72508,24 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:28:11, endln:28:21 + \_part_select: out (work@ohr_reg0.out), line:28:11, endln:28:21 |vpiParent: - \_ref_obj: out (work@ohr_reg0.out) - |vpiParent: - \_cont_assign: , line:28:11, endln:28:38 - |vpiName:out - |vpiFullName:work@ohr_reg0.out - |vpiDefName:out + \_cont_assign: , line:28:11, endln:28:38 + |vpiName:out + |vpiFullName:work@ohr_reg0.out + |vpiDefName:out |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:15, endln:28:18 + |vpiParent: + \_part_select: out (work@ohr_reg0.out), line:28:11, endln:28:21 |vpiOpType:11 |vpiOperand: - \_ref_obj: (N), line:28:15, endln:28:16 + \_ref_obj: (work@ohr_reg0.out.N), line:28:15, endln:28:16 |vpiParent: \_operation: , line:28:15, endln:28:18 |vpiName:N + |vpiFullName:work@ohr_reg0.out.N |vpiOperand: \_constant: , line:28:17, endln:28:18 |vpiParent: @@ -74581,21 +74067,19 @@ design: (work@oh_fifo_async) |vpiRhs: \_constant: , line:92:26, endln:92:29 |vpiLhs: - \_part_select: , line:92:8, endln:92:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:92:8, endln:92:21 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr) - |vpiParent: - \_assignment: , line:92:8, endln:92:29 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_assignment: , line:92:8, endln:92:29 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:92:16, endln:92:18 |vpiParent: - \_part_select: , line:92:8, endln:92:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:92:8, endln:92:21 |vpiName:AW |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiActual: @@ -74625,21 +74109,19 @@ design: (work@oh_fifo_async) \_assignment: , line:94:8, endln:94:46 |vpiOpType:24 |vpiOperand: - \_part_select: , line:94:26, endln:94:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:39 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:33 - |vpiParent: - \_operation: , line:94:26, endln:94:46 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_operation: , line:94:26, endln:94:46 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:94:34, endln:94:36 |vpiParent: - \_part_select: , line:94:26, endln:94:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:26, endln:94:39 |vpiName:AW |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiActual: @@ -74653,21 +74135,19 @@ design: (work@oh_fifo_async) |UINT:63 |vpiConstType:9 |vpiLhs: - \_part_select: , line:94:8, endln:94:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:8, endln:94:21 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr) - |vpiParent: - \_assignment: , line:94:8, endln:94:46 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_assignment: , line:94:8, endln:94:46 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:94:16, endln:94:18 |vpiParent: - \_part_select: , line:94:8, endln:94:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:94:8, endln:94:21 |vpiName:AW |vpiFullName:work@oh_fifo_async.wr_addr.AW |vpiActual: @@ -74745,21 +74225,19 @@ design: (work@oh_fifo_async) |DEC:0 |vpiConstType:1 |vpiLhs: - \_part_select: , line:102:8, endln:102:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:102:8, endln:102:21 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr) - |vpiParent: - \_assignment: , line:102:8, endln:102:28 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 + \_assignment: , line:102:8, endln:102:28 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:102:16, endln:102:18 |vpiParent: - \_part_select: , line:102:8, endln:102:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:102:8, endln:102:21 |vpiName:AW |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiActual: @@ -74789,21 +74267,19 @@ design: (work@oh_fifo_async) \_assignment: , line:104:8, endln:104:44 |vpiOpType:24 |vpiOperand: - \_part_select: , line:104:25, endln:104:38 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:38 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:32 - |vpiParent: - \_operation: , line:104:25, endln:104:44 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 + \_operation: , line:104:25, endln:104:44 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:104:33, endln:104:35 |vpiParent: - \_part_select: , line:104:25, endln:104:38 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:25, endln:104:38 |vpiName:AW |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiActual: @@ -74817,21 +74293,19 @@ design: (work@oh_fifo_async) |UINT:63 |vpiConstType:9 |vpiLhs: - \_part_select: , line:104:8, endln:104:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:8, endln:104:21 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_addr) - |vpiParent: - \_assignment: , line:104:8, endln:104:44 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 + \_assignment: , line:104:8, endln:104:44 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.rd_addr.AW), line:104:16, endln:104:18 |vpiParent: - \_part_select: , line:104:8, endln:104:21 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:104:8, endln:104:21 |vpiName:AW |vpiFullName:work@oh_fifo_async.rd_addr.AW |vpiActual: @@ -75131,27 +74605,23 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:25:36, endln:25:39 - |vpiParent: - \_assignment: , line:25:9, endln:25:39 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:25:9, endln:25:32 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:25:9, endln:25:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:25:9, endln:25:39 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_assignment: , line:25:9, endln:25:39 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:19, endln:25:29 |vpiParent: - \_part_select: , line:25:9, endln:25:32 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:25:9, endln:25:32 |vpiOpType:11 |vpiOperand: \_constant: , line:25:19, endln:25:27 @@ -75190,21 +74660,19 @@ design: (work@oh_fifo_async) \_assignment: , line:27:9, endln:27:66 |vpiOpType:33 |vpiOperand: - \_part_select: , line:27:37, endln:27:60 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:27:37, endln:27:60 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:27:37, endln:27:46 - |vpiParent: - \_operation: , line:27:36, endln:27:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_operation: , line:27:36, endln:27:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:47, endln:27:57 |vpiParent: - \_part_select: , line:27:37, endln:27:60 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:27:37, endln:27:60 |vpiOpType:11 |vpiOperand: \_constant: , line:27:47, endln:27:55 @@ -75241,21 +74709,19 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:27:9, endln:27:32 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:27:9, endln:27:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:27:9, endln:27:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_assignment: , line:27:9, endln:27:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:19, endln:27:29 |vpiParent: - \_part_select: , line:27:9, endln:27:32 + \_part_select: sync_pipe (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:27:9, endln:27:32 |vpiOpType:11 |vpiOperand: \_constant: , line:27:19, endln:27:27 @@ -75291,15 +74757,11 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:28:23, endln:28:44 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe) - |vpiParent: - \_cont_assign: , line:28:12, endln:28:44 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_cont_assign: , line:28:12, endln:28:44 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_rsync.genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiIndex: \_operation: , line:28:33, endln:28:43 |vpiParent: @@ -75325,8 +74787,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_rsync.genblk1.nrst_out), line:28:12, endln:28:20 |vpiParent: @@ -75627,27 +75087,23 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:25:36, endln:25:39 - |vpiParent: - \_assignment: , line:25:9, endln:25:39 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:25:9, endln:25:32 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:25:9, endln:25:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:25:9, endln:25:39 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_assignment: , line:25:9, endln:25:39 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:25:19, endln:25:29 |vpiParent: - \_part_select: , line:25:9, endln:25:32 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:25:9, endln:25:32 |vpiOpType:11 |vpiOperand: \_constant: , line:25:19, endln:25:27 @@ -75686,21 +75142,19 @@ design: (work@oh_fifo_async) \_assignment: , line:27:9, endln:27:66 |vpiOpType:33 |vpiOperand: - \_part_select: , line:27:37, endln:27:60 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:27:37, endln:27:60 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:27:37, endln:27:46 - |vpiParent: - \_operation: , line:27:36, endln:27:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_operation: , line:27:36, endln:27:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:47, endln:27:57 |vpiParent: - \_part_select: , line:27:37, endln:27:60 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:27:37, endln:27:60 |vpiOpType:11 |vpiOperand: \_constant: , line:27:47, endln:27:55 @@ -75737,21 +75191,19 @@ design: (work@oh_fifo_async) |BIN:1 |vpiConstType:3 |vpiLhs: - \_part_select: , line:27:9, endln:27:32 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:27:9, endln:27:32 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:27:9, endln:27:66 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_assignment: , line:27:9, endln:27:66 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:27:19, endln:27:29 |vpiParent: - \_part_select: , line:27:9, endln:27:32 + \_part_select: sync_pipe (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:27:9, endln:27:32 |vpiOpType:11 |vpiOperand: \_constant: , line:27:19, endln:27:27 @@ -75787,15 +75239,11 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:28:23, endln:28:44 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe) - |vpiParent: - \_cont_assign: , line:28:12, endln:28:44 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 + \_cont_assign: , line:28:12, endln:28:44 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_rsync.genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiIndex: \_operation: , line:28:33, endln:28:43 |vpiParent: @@ -75821,8 +75269,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_rsync.genblk1.sync_pipe), line:22:24, endln:22:33 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_rsync.genblk1.nrst_out), line:28:12, endln:28:20 |vpiParent: @@ -75992,16 +75438,14 @@ design: (work@oh_fifo_async) |vpiName:in |vpiDirection:1 |vpiHighConn: - \_part_select: , line:116:8, endln:116:21 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:116:8, endln:116:21 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_bin2gray.in.wr_addr), line:116:8, endln:116:15 - |vpiParent: - \_port: (in), line:12:20, endln:12:22 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_bin2gray.in.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_port: (in), line:12:20, endln:12:22 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:116:16, endln:116:18 @@ -76054,16 +75498,14 @@ design: (work@oh_fifo_async) |vpiName:out |vpiDirection:2 |vpiHighConn: - \_part_select: , line:115:26, endln:115:44 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:115:26, endln:115:44 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_bin2gray.out.wr_addr_gray), line:115:26, endln:115:38 - |vpiParent: - \_port: (out), line:13:20, endln:13:23 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_bin2gray.out.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (out), line:13:20, endln:13:23 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:115:39, endln:115:41 @@ -76131,15 +75573,11 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.wr_bin2gray.bin), line:26:14, endln:26:22 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.bin) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 + \_assignment: , line:26:2, endln:26:22 |vpiName:bin |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: \_operation: , line:26:18, endln:26:21 |vpiParent: @@ -76155,20 +75593,14 @@ design: (work@oh_fifo_async) \_parameter: (work@oh_fifo_async.wr_bin2gray.N), line:9:15, endln:9:16 |vpiOperand: \_constant: , line:26:20, endln:26:21 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiLhs: \_bit_select: (work@oh_fifo_async.wr_bin2gray.gray), line:26:2, endln:26:11 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.gray) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 + \_assignment: , line:26:2, endln:26:22 |vpiName:gray |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 |vpiIndex: \_operation: , line:26:7, endln:26:10 |vpiParent: @@ -76184,8 +75616,6 @@ design: (work@oh_fifo_async) \_parameter: (work@oh_fifo_async.wr_bin2gray.N), line:9:15, endln:9:16 |vpiOperand: \_constant: , line:26:9, endln:26:10 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 |vpiStmt: \_for_stmt: (work@oh_fifo_async.wr_bin2gray), line:27:2, endln:27:5 |vpiParent: @@ -76276,37 +75706,27 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_bin2gray.bin), line:28:14, endln:28:20 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.bin.i), line:28:18, endln:28:19 + \_ref_obj: (work@oh_fifo_async.wr_bin2gray.i), line:28:18, endln:28:19 |vpiParent: \_bit_select: (work@oh_fifo_async.wr_bin2gray.bin), line:28:14, endln:28:20 |vpiName:i - |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin.i + |vpiFullName:work@oh_fifo_async.wr_bin2gray.i |vpiActual: \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_bin2gray.bin), line:28:23, endln:28:31 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: \_operation: , line:28:27, endln:28:30 |vpiParent: @@ -76322,51 +75742,41 @@ design: (work@oh_fifo_async) \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: \_constant: , line:28:29, endln:28:30 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiLhs: \_bit_select: (work@oh_fifo_async.wr_bin2gray.gray), line:28:4, endln:28:11 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.gray) - |vpiParent: - \_assignment: , line:28:4, endln:28:31 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 + \_assignment: , line:28:4, endln:28:31 |vpiName:gray |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.wr_bin2gray.gray.i), line:28:9, endln:28:10 + \_ref_obj: (work@oh_fifo_async.wr_bin2gray.i), line:28:9, endln:28:10 |vpiParent: \_bit_select: (work@oh_fifo_async.wr_bin2gray.gray), line:28:4, endln:28:11 |vpiName:i - |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray.i + |vpiFullName:work@oh_fifo_async.wr_bin2gray.i |vpiActual: \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 |vpiAlwaysType:1 |vpiContAssign: \_cont_assign: , line:21:11, endln:21:34 |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_fifo_async.wr_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v, line:114:4, endln:116:24 |vpiRhs: - \_part_select: , line:21:25, endln:21:34 + \_part_select: in (work@oh_fifo_async.wr_bin2gray.in), line:21:25, endln:21:34 |vpiParent: - \_ref_obj: in (work@oh_fifo_async.wr_bin2gray.in), line:21:25, endln:21:27 - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:in - |vpiFullName:work@oh_fifo_async.wr_bin2gray.in - |vpiDefName:in - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.in), line:12:20, endln:12:22 + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:in + |vpiFullName:work@oh_fifo_async.wr_bin2gray.in + |vpiDefName:in + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.in), line:12:20, endln:12:22 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:28, endln:21:31 |vpiParent: - \_part_select: , line:21:25, endln:21:34 + \_part_select: in (work@oh_fifo_async.wr_bin2gray.in), line:21:25, endln:21:34 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.wr_bin2gray.in.N), line:21:28, endln:21:29 @@ -76381,21 +75791,19 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:21:32, endln:21:33 |vpiLhs: - \_part_select: , line:21:11, endln:21:21 + \_part_select: bin (work@oh_fifo_async.wr_bin2gray.bin), line:21:11, endln:21:21 |vpiParent: - \_ref_obj: bin (work@oh_fifo_async.wr_bin2gray.bin) - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin - |vpiDefName:bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:bin + |vpiFullName:work@oh_fifo_async.wr_bin2gray.bin + |vpiDefName:bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.bin), line:17:20, endln:17:23 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 |vpiParent: - \_part_select: , line:21:11, endln:21:21 + \_part_select: bin (work@oh_fifo_async.wr_bin2gray.bin), line:21:11, endln:21:21 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.wr_bin2gray.bin.N), line:21:15, endln:21:16 @@ -76414,21 +75822,19 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_fifo_async.wr_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v, line:114:4, endln:116:24 |vpiRhs: - \_part_select: , line:22:25, endln:22:36 + \_part_select: gray (work@oh_fifo_async.wr_bin2gray.gray), line:22:25, endln:22:36 |vpiParent: - \_ref_obj: gray (work@oh_fifo_async.wr_bin2gray.gray), line:22:25, endln:22:29 - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray - |vpiDefName:gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:gray + |vpiFullName:work@oh_fifo_async.wr_bin2gray.gray + |vpiDefName:gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.gray), line:16:20, endln:16:24 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:30, endln:22:33 |vpiParent: - \_part_select: , line:22:25, endln:22:36 + \_part_select: gray (work@oh_fifo_async.wr_bin2gray.gray), line:22:25, endln:22:36 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.wr_bin2gray.gray.N), line:22:30, endln:22:31 @@ -76443,21 +75849,19 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:22:34, endln:22:35 |vpiLhs: - \_part_select: , line:22:11, endln:22:21 + \_part_select: out (work@oh_fifo_async.wr_bin2gray.out), line:22:11, endln:22:21 |vpiParent: - \_ref_obj: out (work@oh_fifo_async.wr_bin2gray.out) - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:out - |vpiFullName:work@oh_fifo_async.wr_bin2gray.out - |vpiDefName:out - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_bin2gray.out), line:13:20, endln:13:23 + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:out + |vpiFullName:work@oh_fifo_async.wr_bin2gray.out + |vpiDefName:out + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_bin2gray.out), line:13:20, endln:13:23 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:15, endln:22:18 |vpiParent: - \_part_select: , line:22:11, endln:22:21 + \_part_select: out (work@oh_fifo_async.wr_bin2gray.out), line:22:11, endln:22:21 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.wr_bin2gray.out.N), line:22:15, endln:22:16 @@ -76676,16 +76080,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[0].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[0].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -76718,16 +76120,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[0].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[0].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -76854,22 +76254,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -76898,21 +76294,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -76949,16 +76343,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[0].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -77006,15 +76398,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -77027,8 +76415,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -77054,15 +76440,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -77088,8 +76470,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[0].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -77303,16 +76683,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[1].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[1].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -77345,16 +76723,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[1].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[1].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -77481,22 +76857,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -77525,21 +76897,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -77576,16 +76946,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[1].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -77633,15 +77001,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -77654,8 +77018,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -77681,15 +77043,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -77715,8 +77073,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[1].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -77930,16 +77286,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[2].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[2].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -77972,16 +77326,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[2].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[2].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -78108,22 +77460,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -78152,21 +77500,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -78203,16 +77549,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[2].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -78260,15 +77604,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -78281,8 +77621,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -78308,15 +77646,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -78342,8 +77676,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[2].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -78557,16 +77889,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[3].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[3].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -78599,16 +77929,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[3].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[3].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -78735,22 +78063,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -78779,21 +78103,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -78830,16 +78152,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[3].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -78887,15 +78207,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -78908,8 +78224,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -78935,15 +78249,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -78969,8 +78279,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[3].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -79184,16 +78492,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[4].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[4].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -79226,16 +78532,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[4].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[4].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -79362,22 +78666,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -79406,21 +78706,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -79457,16 +78755,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[4].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -79514,15 +78810,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -79535,8 +78827,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -79562,15 +78852,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -79596,8 +78882,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[4].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -79811,16 +79095,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:124:14, endln:124:32 + \_part_select: wr_addr_gray (work@oh_fifo_async.wr_addr_gray), line:124:14, endln:124:32 |vpiParent: - \_ref_obj: wr_addr_gray (work@oh_fifo_async.wr_sync[5].din.wr_addr_gray), line:124:14, endln:124:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:wr_addr_gray - |vpiFullName:work@oh_fifo_async.wr_sync[5].din.wr_addr_gray - |vpiDefName:wr_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:wr_addr_gray + |vpiFullName:work@oh_fifo_async.wr_addr_gray + |vpiDefName:wr_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray), line:57:18, endln:57:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:124:27, endln:124:29 @@ -79853,16 +79135,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:121:28, endln:121:51 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:121:28, endln:121:51 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_sync[5].dout.wr_addr_gray_sync), line:121:28, endln:121:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_sync[5].dout.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:121:46, endln:121:48 @@ -79989,22 +79269,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -80033,21 +79309,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -80084,16 +79358,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.wr_sync[5].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -80141,15 +79413,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -80162,8 +79430,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -80189,15 +79455,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -80223,8 +79485,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_sync[5].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -80394,16 +79654,14 @@ design: (work@oh_fifo_async) |vpiName:in |vpiDirection:1 |vpiHighConn: - \_part_select: , line:132:11, endln:132:24 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:132:11, endln:132:24 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.rd_bin2gray.in.rd_addr), line:132:11, endln:132:18 - |vpiParent: - \_port: (in), line:12:20, endln:12:22 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.rd_bin2gray.in.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 + \_port: (in), line:12:20, endln:12:22 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:132:19, endln:132:21 @@ -80456,16 +79714,14 @@ design: (work@oh_fifo_async) |vpiName:out |vpiDirection:2 |vpiHighConn: - \_part_select: , line:131:25, endln:131:43 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:131:25, endln:131:43 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_bin2gray.out.rd_addr_gray), line:131:25, endln:131:37 - |vpiParent: - \_port: (out), line:13:20, endln:13:23 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_bin2gray.out.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (out), line:13:20, endln:13:23 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:131:38, endln:131:40 @@ -80533,15 +79789,11 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.rd_bin2gray.bin), line:26:14, endln:26:22 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.bin) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 + \_assignment: , line:26:2, endln:26:22 |vpiName:bin |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: \_operation: , line:26:18, endln:26:21 |vpiParent: @@ -80557,20 +79809,14 @@ design: (work@oh_fifo_async) \_parameter: (work@oh_fifo_async.rd_bin2gray.N), line:9:15, endln:9:16 |vpiOperand: \_constant: , line:26:20, endln:26:21 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiLhs: \_bit_select: (work@oh_fifo_async.rd_bin2gray.gray), line:26:2, endln:26:11 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.gray) - |vpiParent: - \_assignment: , line:26:2, endln:26:22 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 + \_assignment: , line:26:2, endln:26:22 |vpiName:gray |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 |vpiIndex: \_operation: , line:26:7, endln:26:10 |vpiParent: @@ -80586,8 +79832,6 @@ design: (work@oh_fifo_async) \_parameter: (work@oh_fifo_async.rd_bin2gray.N), line:9:15, endln:9:16 |vpiOperand: \_constant: , line:26:9, endln:26:10 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 |vpiStmt: \_for_stmt: (work@oh_fifo_async.rd_bin2gray), line:27:2, endln:27:5 |vpiParent: @@ -80625,7 +79869,7 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:work@oh_fifo_async.rd_bin2gray.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: \_constant: , line:27:25, endln:27:26 |vpiLhs: @@ -80635,7 +79879,7 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:work@oh_fifo_async.rd_bin2gray.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiCondition: \_operation: , line:27:12, endln:27:19 |vpiParent: @@ -80648,7 +79892,7 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:work@oh_fifo_async.rd_bin2gray.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: \_operation: , line:27:15, endln:27:18 |vpiParent: @@ -80678,37 +79922,27 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_bin2gray.bin), line:28:14, endln:28:20 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.bin.i), line:28:18, endln:28:19 + \_ref_obj: (work@oh_fifo_async.rd_bin2gray.i), line:28:18, endln:28:19 |vpiParent: \_bit_select: (work@oh_fifo_async.rd_bin2gray.bin), line:28:14, endln:28:20 |vpiName:i - |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin.i + |vpiFullName:work@oh_fifo_async.rd_bin2gray.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_bin2gray.bin), line:28:23, endln:28:31 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.bin) - |vpiParent: - \_operation: , line:28:14, endln:28:31 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 + \_operation: , line:28:14, endln:28:31 |vpiName:bin |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiIndex: \_operation: , line:28:27, endln:28:30 |vpiParent: @@ -80721,54 +79955,44 @@ design: (work@oh_fifo_async) |vpiName:i |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiOperand: \_constant: , line:28:29, endln:28:30 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiLhs: \_bit_select: (work@oh_fifo_async.rd_bin2gray.gray), line:28:4, endln:28:11 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.gray) - |vpiParent: - \_assignment: , line:28:4, endln:28:31 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 + \_assignment: , line:28:4, endln:28:31 |vpiName:gray |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.rd_bin2gray.gray.i), line:28:9, endln:28:10 + \_ref_obj: (work@oh_fifo_async.rd_bin2gray.i), line:28:9, endln:28:10 |vpiParent: \_bit_select: (work@oh_fifo_async.rd_bin2gray.gray), line:28:4, endln:28:11 |vpiName:i - |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray.i + |vpiFullName:work@oh_fifo_async.rd_bin2gray.i |vpiActual: - \_integer_var: (work@oh_fifo_async.rd_bin2gray.i), line:19:16, endln:19:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 + \_integer_var: (work@oh_fifo_async.wr_bin2gray.i), line:19:16, endln:19:17 |vpiAlwaysType:1 |vpiContAssign: \_cont_assign: , line:21:11, endln:21:34 |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_fifo_async.rd_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v, line:130:4, endln:132:27 |vpiRhs: - \_part_select: , line:21:25, endln:21:34 + \_part_select: in (work@oh_fifo_async.rd_bin2gray.in), line:21:25, endln:21:34 |vpiParent: - \_ref_obj: in (work@oh_fifo_async.rd_bin2gray.in), line:21:25, endln:21:27 - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:in - |vpiFullName:work@oh_fifo_async.rd_bin2gray.in - |vpiDefName:in - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.in), line:12:20, endln:12:22 + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:in + |vpiFullName:work@oh_fifo_async.rd_bin2gray.in + |vpiDefName:in + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.in), line:12:20, endln:12:22 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:28, endln:21:31 |vpiParent: - \_part_select: , line:21:25, endln:21:34 + \_part_select: in (work@oh_fifo_async.rd_bin2gray.in), line:21:25, endln:21:34 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.rd_bin2gray.in.N), line:21:28, endln:21:29 @@ -80783,21 +80007,19 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:21:32, endln:21:33 |vpiLhs: - \_part_select: , line:21:11, endln:21:21 + \_part_select: bin (work@oh_fifo_async.rd_bin2gray.bin), line:21:11, endln:21:21 |vpiParent: - \_ref_obj: bin (work@oh_fifo_async.rd_bin2gray.bin) - |vpiParent: - \_cont_assign: , line:21:11, endln:21:34 - |vpiName:bin - |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin - |vpiDefName:bin - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 + \_cont_assign: , line:21:11, endln:21:34 + |vpiName:bin + |vpiFullName:work@oh_fifo_async.rd_bin2gray.bin + |vpiDefName:bin + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.bin), line:17:20, endln:17:23 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:21:15, endln:21:18 |vpiParent: - \_part_select: , line:21:11, endln:21:21 + \_part_select: bin (work@oh_fifo_async.rd_bin2gray.bin), line:21:11, endln:21:21 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.rd_bin2gray.bin.N), line:21:15, endln:21:16 @@ -80816,21 +80038,19 @@ design: (work@oh_fifo_async) |vpiParent: \_module_inst: work@oh_bin2gray (work@oh_fifo_async.rd_bin2gray), file:${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v, line:130:4, endln:132:27 |vpiRhs: - \_part_select: , line:22:25, endln:22:36 + \_part_select: gray (work@oh_fifo_async.rd_bin2gray.gray), line:22:25, endln:22:36 |vpiParent: - \_ref_obj: gray (work@oh_fifo_async.rd_bin2gray.gray), line:22:25, endln:22:29 - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:gray - |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray - |vpiDefName:gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:gray + |vpiFullName:work@oh_fifo_async.rd_bin2gray.gray + |vpiDefName:gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.gray), line:16:20, endln:16:24 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:30, endln:22:33 |vpiParent: - \_part_select: , line:22:25, endln:22:36 + \_part_select: gray (work@oh_fifo_async.rd_bin2gray.gray), line:22:25, endln:22:36 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.rd_bin2gray.gray.N), line:22:30, endln:22:31 @@ -80845,21 +80065,19 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:22:34, endln:22:35 |vpiLhs: - \_part_select: , line:22:11, endln:22:21 + \_part_select: out (work@oh_fifo_async.rd_bin2gray.out), line:22:11, endln:22:21 |vpiParent: - \_ref_obj: out (work@oh_fifo_async.rd_bin2gray.out) - |vpiParent: - \_cont_assign: , line:22:11, endln:22:36 - |vpiName:out - |vpiFullName:work@oh_fifo_async.rd_bin2gray.out - |vpiDefName:out - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_bin2gray.out), line:13:20, endln:13:23 + \_cont_assign: , line:22:11, endln:22:36 + |vpiName:out + |vpiFullName:work@oh_fifo_async.rd_bin2gray.out + |vpiDefName:out + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_bin2gray.out), line:13:20, endln:13:23 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:22:15, endln:22:18 |vpiParent: - \_part_select: , line:22:11, endln:22:21 + \_part_select: out (work@oh_fifo_async.rd_bin2gray.out), line:22:11, endln:22:21 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.rd_bin2gray.out.N), line:22:15, endln:22:16 @@ -81078,16 +80296,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[0].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[0].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -81120,16 +80336,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[0].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[0].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -81256,22 +80470,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -81300,21 +80510,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -81351,16 +80559,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[0].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -81408,15 +80614,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -81429,8 +80631,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -81456,15 +80656,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -81490,8 +80686,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[0].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[0].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -81705,16 +80899,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[1].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[1].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -81747,16 +80939,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[1].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[1].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -81883,22 +81073,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -81927,21 +81113,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -81978,16 +81162,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[1].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -82035,15 +81217,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -82056,8 +81234,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -82083,15 +81259,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -82117,8 +81289,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[1].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[1].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -82332,16 +81502,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[2].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[2].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -82374,16 +81542,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[2].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[2].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -82510,22 +81676,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -82554,21 +81716,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -82605,16 +81765,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[2].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -82662,15 +81820,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -82683,8 +81837,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -82710,15 +81862,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -82744,8 +81892,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[2].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[2].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -82959,16 +82105,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[3].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[3].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -83001,16 +82145,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[3].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[3].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -83137,22 +82279,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -83181,21 +82319,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -83232,16 +82368,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[3].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -83289,15 +82423,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -83310,8 +82440,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -83337,15 +82465,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -83371,8 +82495,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[3].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[3].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -83586,16 +82708,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[4].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[4].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -83628,16 +82748,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[4].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[4].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -83764,22 +82882,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -83808,21 +82922,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -83859,16 +82971,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[4].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -83916,15 +83026,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -83937,8 +83043,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -83964,15 +83068,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -83998,8 +83098,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[4].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[4].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -84213,16 +83311,14 @@ design: (work@oh_fifo_async) |vpiName:din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:140:14, endln:140:32 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:140:14, endln:140:32 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_sync[5].din.rd_addr_gray), line:140:14, endln:140:26 - |vpiParent: - \_port: (din), line:17:12, endln:17:15 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_sync[5].din.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_port: (din), line:17:12, endln:17:15 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:140:27, endln:140:29 @@ -84255,16 +83351,14 @@ design: (work@oh_fifo_async) |vpiName:dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:137:28, endln:137:51 + \_part_select: rd_addr_gray_sync (work@oh_fifo_async.rd_addr_gray_sync), line:137:28, endln:137:51 |vpiParent: - \_ref_obj: rd_addr_gray_sync (work@oh_fifo_async.rd_sync[5].dout.rd_addr_gray_sync), line:137:28, endln:137:45 - |vpiParent: - \_port: (dout), line:18:12, endln:18:16 - |vpiName:rd_addr_gray_sync - |vpiFullName:work@oh_fifo_async.rd_sync[5].dout.rd_addr_gray_sync - |vpiDefName:rd_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 + \_port: (dout), line:18:12, endln:18:16 + |vpiName:rd_addr_gray_sync + |vpiFullName:work@oh_fifo_async.rd_addr_gray_sync + |vpiDefName:rd_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray_sync), line:60:18, endln:60:35 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:137:46, endln:137:48 @@ -84391,22 +83485,18 @@ design: (work@oh_fifo_async) |vpiOpType:82 |vpiRhs: \_constant: , line:26:32, endln:26:35 - |vpiParent: - \_assignment: , line:26:7, endln:26:35 |vpiDecompile:'b0 |BIN:0 |vpiConstType:3 |vpiLhs: - \_part_select: , line:26:7, endln:26:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:26:7, endln:26:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:26:7, endln:26:35 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:26:7, endln:26:35 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:26:17, endln:26:25 @@ -84435,21 +83525,19 @@ design: (work@oh_fifo_async) \_assignment: , line:28:7, endln:28:61 |vpiOpType:33 |vpiOperand: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:28:33, endln:28:42 - |vpiParent: - \_operation: , line:28:32, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:28:32, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:28:43, endln:28:53 |vpiParent: - \_part_select: , line:28:33, endln:28:56 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:28:33, endln:28:56 |vpiOpType:11 |vpiOperand: \_constant: , line:28:43, endln:28:51 @@ -84486,16 +83574,14 @@ design: (work@oh_fifo_async) |vpiActual: \_logic_net: (work@oh_fifo_async.rd_sync[5].din), line:17:12, endln:17:15 |vpiLhs: - \_part_select: , line:28:7, endln:28:28 + \_part_select: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:28:7, endln:28:28 |vpiParent: - \_ref_obj: sync_pipe (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe) - |vpiParent: - \_assignment: , line:28:7, endln:28:61 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe - |vpiDefName:sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_assignment: , line:28:7, endln:28:61 + |vpiName:sync_pipe + |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe + |vpiDefName:sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:28:17, endln:28:25 @@ -84543,15 +83629,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:30:26, endln:30:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:30:18, endln:30:45 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:30:18, endln:30:45 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_constant: , line:30:36, endln:30:44 |vpiParent: @@ -84564,8 +83646,6 @@ design: (work@oh_fifo_async) |vpiParent: \_constant: , line:30:36, endln:30:44 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiOperand: \_operation: , line:31:11, endln:31:41 |vpiParent: @@ -84591,15 +83671,11 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:31:20, endln:31:41 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe) - |vpiParent: - \_operation: , line:31:11, endln:31:41 - |vpiName:sync_pipe - |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 + \_operation: , line:31:11, endln:31:41 |vpiName:sync_pipe |vpiFullName:work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiIndex: \_operation: , line:31:30, endln:31:40 |vpiParent: @@ -84625,8 +83701,6 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:1 |vpiConstType:9 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_sync[5].genblk1.sync_pipe), line:23:20, endln:23:29 |vpiLhs: \_ref_obj: (work@oh_fifo_async.rd_sync[5].genblk1.dout), line:30:10, endln:30:14 |vpiParent: @@ -85266,21 +84340,19 @@ design: (work@oh_fifo_async) |vpiName:wr_addr |vpiDirection:1 |vpiHighConn: - \_part_select: , line:169:14, endln:169:29 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:169:14, endln:169:29 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.oh_memory_dp.wr_addr.wr_addr), line:169:14, endln:169:21 - |vpiParent: - \_port: (wr_addr), line:21:21, endln:21:28 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.oh_memory_dp.wr_addr.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_port: (wr_addr), line:21:21, endln:21:28 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:169:22, endln:169:26 |vpiParent: - \_part_select: , line:169:14, endln:169:29 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:169:14, endln:169:29 |vpiOpType:11 |vpiOperand: \_constant: , line:169:22, endln:169:24 @@ -85343,21 +84415,19 @@ design: (work@oh_fifo_async) |vpiName:wr_din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:170:14, endln:170:27 + \_part_select: wr_din (work@oh_fifo_async.wr_din), line:170:14, endln:170:27 |vpiParent: - \_ref_obj: wr_din (work@oh_fifo_async.oh_memory_dp.wr_din.wr_din), line:170:14, endln:170:20 - |vpiParent: - \_port: (wr_din), line:22:20, endln:22:26 - |vpiName:wr_din - |vpiFullName:work@oh_fifo_async.oh_memory_dp.wr_din.wr_din - |vpiDefName:wr_din - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_din), line:26:20, endln:26:26 + \_port: (wr_din), line:22:20, endln:22:26 + |vpiName:wr_din + |vpiFullName:work@oh_fifo_async.wr_din + |vpiDefName:wr_din + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_din), line:26:20, endln:26:26 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:170:21, endln:170:24 |vpiParent: - \_part_select: , line:170:14, endln:170:27 + \_part_select: wr_din (work@oh_fifo_async.wr_din), line:170:14, endln:170:27 |vpiOpType:11 |vpiOperand: \_constant: , line:170:21, endln:170:22 @@ -85476,21 +84546,19 @@ design: (work@oh_fifo_async) |vpiName:rd_addr |vpiDirection:1 |vpiHighConn: - \_part_select: , line:173:14, endln:173:29 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:173:14, endln:173:29 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.oh_memory_dp.rd_addr.rd_addr), line:173:14, endln:173:21 - |vpiParent: - \_port: (rd_addr), line:25:21, endln:25:28 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.oh_memory_dp.rd_addr.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 + \_port: (rd_addr), line:25:21, endln:25:28 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr), line:56:17, endln:56:24 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:173:22, endln:173:26 |vpiParent: - \_part_select: , line:173:14, endln:173:29 + \_part_select: rd_addr (work@oh_fifo_async.rd_addr), line:173:14, endln:173:29 |vpiOpType:11 |vpiOperand: \_constant: , line:173:22, endln:173:24 @@ -85553,21 +84621,19 @@ design: (work@oh_fifo_async) |vpiName:rd_dout |vpiDirection:2 |vpiHighConn: - \_part_select: , line:166:14, endln:166:28 + \_part_select: rd_dout (work@oh_fifo_async.rd_dout), line:166:14, endln:166:28 |vpiParent: - \_ref_obj: rd_dout (work@oh_fifo_async.oh_memory_dp.rd_dout.rd_dout), line:166:14, endln:166:21 - |vpiParent: - \_port: (rd_dout), line:26:20, endln:26:27 - |vpiName:rd_dout - |vpiFullName:work@oh_fifo_async.oh_memory_dp.rd_dout.rd_dout - |vpiDefName:rd_dout - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_dout), line:34:20, endln:34:27 + \_port: (rd_dout), line:26:20, endln:26:27 + |vpiName:rd_dout + |vpiFullName:work@oh_fifo_async.rd_dout + |vpiDefName:rd_dout + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_dout), line:34:20, endln:34:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:166:22, endln:166:25 |vpiParent: - \_part_select: , line:166:14, endln:166:28 + \_part_select: rd_dout (work@oh_fifo_async.rd_dout), line:166:14, endln:166:28 |vpiOpType:11 |vpiOperand: \_constant: , line:166:22, endln:166:23 @@ -85686,21 +84752,19 @@ design: (work@oh_fifo_async) |vpiName:bist_wem |vpiDirection:1 |vpiHighConn: - \_part_select: , line:176:15, endln:176:30 + \_part_select: bist_wem (work@oh_fifo_async.bist_wem), line:176:15, endln:176:30 |vpiParent: - \_ref_obj: bist_wem (work@oh_fifo_async.oh_memory_dp.bist_wem.bist_wem), line:176:15, endln:176:23 - |vpiParent: - \_port: (bist_wem), line:30:20, endln:30:28 - |vpiName:bist_wem - |vpiFullName:work@oh_fifo_async.oh_memory_dp.bist_wem.bist_wem - |vpiDefName:bist_wem - |vpiActual: - \_logic_net: (work@oh_fifo_async.bist_wem), line:41:20, endln:41:28 + \_port: (bist_wem), line:30:20, endln:30:28 + |vpiName:bist_wem + |vpiFullName:work@oh_fifo_async.bist_wem + |vpiDefName:bist_wem + |vpiActual: + \_logic_net: (work@oh_fifo_async.bist_wem), line:41:20, endln:41:28 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:176:24, endln:176:27 |vpiParent: - \_part_select: , line:176:15, endln:176:30 + \_part_select: bist_wem (work@oh_fifo_async.bist_wem), line:176:15, endln:176:30 |vpiOpType:11 |vpiOperand: \_constant: , line:176:24, endln:176:25 @@ -85767,21 +84831,19 @@ design: (work@oh_fifo_async) |vpiName:bist_addr |vpiDirection:1 |vpiHighConn: - \_part_select: , line:177:16, endln:177:33 + \_part_select: bist_addr (work@oh_fifo_async.bist_addr), line:177:16, endln:177:33 |vpiParent: - \_ref_obj: bist_addr (work@oh_fifo_async.oh_memory_dp.bist_addr.bist_addr), line:177:16, endln:177:25 - |vpiParent: - \_port: (bist_addr), line:31:21, endln:31:30 - |vpiName:bist_addr - |vpiFullName:work@oh_fifo_async.oh_memory_dp.bist_addr.bist_addr - |vpiDefName:bist_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.bist_addr), line:42:21, endln:42:30 + \_port: (bist_addr), line:31:21, endln:31:30 + |vpiName:bist_addr + |vpiFullName:work@oh_fifo_async.bist_addr + |vpiDefName:bist_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.bist_addr), line:42:21, endln:42:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:177:26, endln:177:30 |vpiParent: - \_part_select: , line:177:16, endln:177:33 + \_part_select: bist_addr (work@oh_fifo_async.bist_addr), line:177:16, endln:177:33 |vpiOpType:11 |vpiOperand: \_constant: , line:177:26, endln:177:28 @@ -85844,21 +84906,19 @@ design: (work@oh_fifo_async) |vpiName:bist_din |vpiDirection:1 |vpiHighConn: - \_part_select: , line:178:15, endln:178:30 + \_part_select: bist_din (work@oh_fifo_async.bist_din), line:178:15, endln:178:30 |vpiParent: - \_ref_obj: bist_din (work@oh_fifo_async.oh_memory_dp.bist_din.bist_din), line:178:15, endln:178:23 - |vpiParent: - \_port: (bist_din), line:32:20, endln:32:28 - |vpiName:bist_din - |vpiFullName:work@oh_fifo_async.oh_memory_dp.bist_din.bist_din - |vpiDefName:bist_din - |vpiActual: - \_logic_net: (work@oh_fifo_async.bist_din), line:43:20, endln:43:28 + \_port: (bist_din), line:32:20, endln:32:28 + |vpiName:bist_din + |vpiFullName:work@oh_fifo_async.bist_din + |vpiDefName:bist_din + |vpiActual: + \_logic_net: (work@oh_fifo_async.bist_din), line:43:20, endln:43:28 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:178:24, endln:178:27 |vpiParent: - \_part_select: , line:178:15, endln:178:30 + \_part_select: bist_din (work@oh_fifo_async.bist_din), line:178:15, endln:178:30 |vpiOpType:11 |vpiOperand: \_constant: , line:178:24, endln:178:25 @@ -86029,16 +85089,14 @@ design: (work@oh_fifo_async) |vpiName:memconfig |vpiDirection:1 |vpiHighConn: - \_part_select: , line:183:16, endln:183:30 + \_part_select: memconfig (work@oh_fifo_async.memconfig), line:183:16, endln:183:30 |vpiParent: - \_ref_obj: memconfig (work@oh_fifo_async.oh_memory_dp.memconfig.memconfig), line:183:16, endln:183:25 - |vpiParent: - \_port: (memconfig), line:38:21, endln:38:30 - |vpiName:memconfig - |vpiFullName:work@oh_fifo_async.oh_memory_dp.memconfig.memconfig - |vpiDefName:memconfig - |vpiActual: - \_logic_net: (work@oh_fifo_async.memconfig), line:50:21, endln:50:30 + \_port: (memconfig), line:38:21, endln:38:30 + |vpiName:memconfig + |vpiFullName:work@oh_fifo_async.memconfig + |vpiDefName:memconfig + |vpiActual: + \_logic_net: (work@oh_fifo_async.memconfig), line:50:21, endln:50:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:183:26, endln:183:27 @@ -86091,16 +85149,14 @@ design: (work@oh_fifo_async) |vpiName:memrepair |vpiDirection:1 |vpiHighConn: - \_part_select: , line:184:16, endln:184:30 + \_part_select: memrepair (work@oh_fifo_async.memrepair), line:184:16, endln:184:30 |vpiParent: - \_ref_obj: memrepair (work@oh_fifo_async.oh_memory_dp.memrepair.memrepair), line:184:16, endln:184:25 - |vpiParent: - \_port: (memrepair), line:39:21, endln:39:30 - |vpiName:memrepair - |vpiFullName:work@oh_fifo_async.oh_memory_dp.memrepair.memrepair - |vpiDefName:memrepair - |vpiActual: - \_logic_net: (work@oh_fifo_async.memrepair), line:51:21, endln:51:30 + \_port: (memrepair), line:39:21, endln:39:30 + |vpiName:memrepair + |vpiFullName:work@oh_fifo_async.memrepair + |vpiDefName:memrepair + |vpiActual: + \_logic_net: (work@oh_fifo_async.memrepair), line:51:21, endln:51:30 |vpiConstantSelect:1 |vpiLeftRange: \_constant: , line:184:26, endln:184:27 @@ -86394,25 +85450,19 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.oh_memory_dp.wr_wem), line:55:19, endln:55:28 |vpiParent: - \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.wr_wem) - |vpiParent: - \_operation: , line:55:11, endln:55:28 - |vpiName:wr_wem - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.wr_wem - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_wem), line:20:20, endln:20:26 + \_operation: , line:55:11, endln:55:28 |vpiName:wr_wem |vpiFullName:work@oh_fifo_async.oh_memory_dp.wr_wem + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_wem), line:20:20, endln:20:26 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.wr_wem.i), line:55:26, endln:55:27 + \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.i), line:55:26, endln:55:27 |vpiParent: \_bit_select: (work@oh_fifo_async.oh_memory_dp.wr_wem), line:55:19, endln:55:28 |vpiName:i - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.wr_wem.i + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.i |vpiActual: \_integer_var: (work@oh_fifo_async.oh_memory_dp.genblk1.i), line:50:17, endln:50:18 - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_wem), line:20:20, endln:20:26 |vpiStmt: \_assignment: , line:56:16, endln:56:51 |vpiParent: @@ -86422,47 +85472,41 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.oh_memory_dp.wr_din), line:56:42, endln:56:51 |vpiParent: - \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.wr_din) - |vpiParent: - \_assignment: , line:56:16, endln:56:51 - |vpiName:wr_din - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.wr_din - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_din), line:22:20, endln:22:26 + \_assignment: , line:56:16, endln:56:51 |vpiName:wr_din |vpiFullName:work@oh_fifo_async.oh_memory_dp.wr_din + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_din), line:22:20, endln:22:26 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.wr_din.i), line:56:49, endln:56:50 + \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.i), line:56:49, endln:56:50 |vpiParent: \_bit_select: (work@oh_fifo_async.oh_memory_dp.wr_din), line:56:42, endln:56:51 |vpiName:i - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.wr_din.i + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.i |vpiActual: \_integer_var: (work@oh_fifo_async.oh_memory_dp.genblk1.i), line:50:17, endln:50:18 - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_din), line:22:20, endln:22:26 |vpiLhs: \_var_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:56:16, endln:56:39 |vpiParent: \_assignment: , line:56:16, endln:56:51 |vpiName:ram |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.ram + |vpiActual: + \_array_net: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:48:22, endln:48:25 |vpiIndex: - \_part_select: , line:56:20, endln:56:35 + \_part_select: wr_addr (work@oh_fifo_async.oh_memory_dp.wr_addr), line:56:20, endln:56:35 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.oh_memory_dp.genblk1.ram.wr_addr), line:56:20, endln:56:27 - |vpiParent: - \_var_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:56:16, endln:56:39 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.ram.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_addr), line:21:21, endln:21:28 + \_var_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:56:16, endln:56:39 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.oh_memory_dp.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.wr_addr), line:21:21, endln:21:28 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:56:28, endln:56:32 |vpiParent: - \_part_select: , line:56:20, endln:56:35 + \_part_select: wr_addr (work@oh_fifo_async.oh_memory_dp.wr_addr), line:56:20, endln:56:35 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.ram.wr_addr.AW), line:56:28, endln:56:30 @@ -86534,21 +85578,19 @@ design: (work@oh_fifo_async) \_if_stmt: , line:64:5, endln:65:37 |vpiOpType:82 |vpiRhs: - \_part_select: , line:65:24, endln:65:36 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:65:24, endln:65:36 |vpiParent: - \_ref_obj: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:65:24, endln:65:29 - |vpiParent: - \_assignment: , line:65:7, endln:65:36 - |vpiName:rdata - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata - |vpiDefName:rdata - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 + \_assignment: , line:65:7, endln:65:36 + |vpiName:rdata + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata + |vpiDefName:rdata + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:65:30, endln:65:33 |vpiParent: - \_part_select: , line:65:24, endln:65:36 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:65:24, endln:65:36 |vpiOpType:11 |vpiOperand: \_constant: , line:65:30, endln:65:31 @@ -86577,21 +85619,19 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:65:7, endln:65:20 + \_part_select: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:65:7, endln:65:20 |vpiParent: - \_ref_obj: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg) - |vpiParent: - \_assignment: , line:65:7, endln:65:36 - |vpiName:rd_reg - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg - |vpiDefName:rd_reg - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:62:21, endln:62:27 + \_assignment: , line:65:7, endln:65:36 + |vpiName:rd_reg + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg + |vpiDefName:rd_reg + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:62:21, endln:62:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:65:14, endln:65:17 |vpiParent: - \_part_select: , line:65:7, endln:65:20 + \_part_select: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:65:7, endln:65:20 |vpiOpType:11 |vpiOperand: \_constant: , line:65:14, endln:65:15 @@ -86627,31 +85667,25 @@ design: (work@oh_fifo_async) |vpiRhs: \_bit_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:59:25, endln:59:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.oh_memory_dp.genblk1.ram) - |vpiParent: - \_cont_assign: , line:59:10, endln:59:45 - |vpiName:ram - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.ram - |vpiActual: - \_array_net: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:48:22, endln:48:25 + \_cont_assign: , line:59:10, endln:59:45 |vpiName:ram |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.ram + |vpiActual: + \_array_net: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:48:22, endln:48:25 |vpiIndex: - \_part_select: , line:59:29, endln:59:44 + \_part_select: rd_addr (work@oh_fifo_async.oh_memory_dp.rd_addr), line:59:29, endln:59:44 |vpiParent: - \_ref_obj: rd_addr (work@oh_fifo_async.oh_memory_dp.genblk1.ram.rd_addr), line:59:29, endln:59:36 - |vpiParent: - \_bit_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:59:25, endln:59:45 - |vpiName:rd_addr - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.ram.rd_addr - |vpiDefName:rd_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.rd_addr), line:25:21, endln:25:28 + \_bit_select: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:59:25, endln:59:45 + |vpiName:rd_addr + |vpiFullName:work@oh_fifo_async.oh_memory_dp.rd_addr + |vpiDefName:rd_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.rd_addr), line:25:21, endln:25:28 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:37, endln:59:41 |vpiParent: - \_part_select: , line:59:29, endln:59:44 + \_part_select: rd_addr (work@oh_fifo_async.oh_memory_dp.rd_addr), line:59:29, endln:59:44 |vpiOpType:11 |vpiOperand: \_constant: , line:59:37, endln:59:39 @@ -86675,24 +85709,20 @@ design: (work@oh_fifo_async) |vpiSize:64 |UINT:0 |vpiConstType:9 - |vpiActual: - \_array_net: (work@oh_fifo_async.oh_memory_dp.genblk1.ram), line:48:22, endln:48:25 |vpiLhs: - \_part_select: , line:59:10, endln:59:22 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:59:10, endln:59:22 |vpiParent: - \_ref_obj: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata) - |vpiParent: - \_cont_assign: , line:59:10, endln:59:45 - |vpiName:rdata - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata - |vpiDefName:rdata - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 + \_cont_assign: , line:59:10, endln:59:45 + |vpiName:rdata + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata + |vpiDefName:rdata + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:59:16, endln:59:19 |vpiParent: - \_part_select: , line:59:10, endln:59:22 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:59:10, endln:59:22 |vpiOpType:11 |vpiOperand: \_constant: , line:59:16, endln:59:17 @@ -86736,21 +85766,19 @@ design: (work@oh_fifo_async) |UINT:1 |vpiConstType:9 |vpiOperand: - \_part_select: , line:68:38, endln:68:51 + \_part_select: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:68:38, endln:68:51 |vpiParent: - \_ref_obj: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:68:38, endln:68:44 - |vpiParent: - \_operation: , line:68:27, endln:68:66 - |vpiName:rd_reg - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg - |vpiDefName:rd_reg - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:62:21, endln:62:27 + \_operation: , line:68:27, endln:68:66 + |vpiName:rd_reg + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg + |vpiDefName:rd_reg + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:62:21, endln:62:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:45, endln:68:48 |vpiParent: - \_part_select: , line:68:38, endln:68:51 + \_part_select: rd_reg (work@oh_fifo_async.oh_memory_dp.genblk1.rd_reg), line:68:38, endln:68:51 |vpiOpType:11 |vpiOperand: \_constant: , line:68:45, endln:68:46 @@ -86779,21 +85807,19 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:68:54, endln:68:66 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:68:54, endln:68:66 |vpiParent: - \_ref_obj: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:68:54, endln:68:59 - |vpiParent: - \_operation: , line:68:27, endln:68:66 - |vpiName:rdata - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata - |vpiDefName:rdata - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 + \_operation: , line:68:27, endln:68:66 + |vpiName:rdata + |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rdata + |vpiDefName:rdata + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:49:22, endln:49:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:60, endln:68:63 |vpiParent: - \_part_select: , line:68:54, endln:68:66 + \_part_select: rdata (work@oh_fifo_async.oh_memory_dp.genblk1.rdata), line:68:54, endln:68:66 |vpiOpType:11 |vpiOperand: \_constant: , line:68:60, endln:68:61 @@ -86822,21 +85848,19 @@ design: (work@oh_fifo_async) |UINT:0 |vpiConstType:9 |vpiLhs: - \_part_select: , line:68:10, endln:68:24 + \_part_select: rd_dout (work@oh_fifo_async.oh_memory_dp.rd_dout), line:68:10, endln:68:24 |vpiParent: - \_ref_obj: rd_dout (work@oh_fifo_async.oh_memory_dp.genblk1.rd_dout) - |vpiParent: - \_cont_assign: , line:68:10, endln:68:66 - |vpiName:rd_dout - |vpiFullName:work@oh_fifo_async.oh_memory_dp.genblk1.rd_dout - |vpiDefName:rd_dout - |vpiActual: - \_logic_net: (work@oh_fifo_async.oh_memory_dp.rd_dout), line:26:20, endln:26:27 + \_cont_assign: , line:68:10, endln:68:66 + |vpiName:rd_dout + |vpiFullName:work@oh_fifo_async.oh_memory_dp.rd_dout + |vpiDefName:rd_dout + |vpiActual: + \_logic_net: (work@oh_fifo_async.oh_memory_dp.rd_dout), line:26:20, endln:26:27 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:68:18, endln:68:21 |vpiParent: - \_part_select: , line:68:10, endln:68:24 + \_part_select: rd_dout (work@oh_fifo_async.oh_memory_dp.rd_dout), line:68:10, endln:68:24 |vpiOpType:11 |vpiOperand: \_constant: , line:68:18, endln:68:19 @@ -86990,21 +86014,19 @@ design: (work@oh_fifo_async) \_cont_assign: , line:147:11, endln:147:70 |vpiOpType:14 |vpiOperand: - \_part_select: , line:147:24, endln:147:42 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:42 |vpiParent: - \_ref_obj: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:36 - |vpiParent: - \_operation: , line:147:24, endln:147:69 - |vpiName:rd_addr_gray - |vpiFullName:work@oh_fifo_async.rd_addr_gray - |vpiDefName:rd_addr_gray - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 + \_operation: , line:147:24, endln:147:69 + |vpiName:rd_addr_gray + |vpiFullName:work@oh_fifo_async.rd_addr_gray + |vpiDefName:rd_addr_gray + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_gray), line:59:18, endln:59:30 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.rd_addr_gray.AW), line:147:37, endln:147:39 |vpiParent: - \_part_select: , line:147:24, endln:147:42 + \_part_select: rd_addr_gray (work@oh_fifo_async.rd_addr_gray), line:147:24, endln:147:42 |vpiName:AW |vpiFullName:work@oh_fifo_async.rd_addr_gray.AW |vpiActual: @@ -87012,27 +86034,25 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:147:40, endln:147:41 |vpiParent: - \_part_select: , line:147:24, endln:147:42 + \_part_select: rd_addr_gray (rd_addr_gray), line:147:24, endln:147:42 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:147:46, endln:147:69 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:69 |vpiParent: - \_ref_obj: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:63 - |vpiParent: - \_operation: , line:147:24, endln:147:69 - |vpiName:wr_addr_gray_sync - |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync - |vpiDefName:wr_addr_gray_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 + \_operation: , line:147:24, endln:147:69 + |vpiName:wr_addr_gray_sync + |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync + |vpiDefName:wr_addr_gray_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr_gray_sync), line:58:18, endln:58:35 |vpiConstantSelect:1 |vpiLeftRange: \_ref_obj: (work@oh_fifo_async.wr_addr_gray_sync.AW), line:147:64, endln:147:66 |vpiParent: - \_part_select: , line:147:46, endln:147:69 + \_part_select: wr_addr_gray_sync (work@oh_fifo_async.wr_addr_gray_sync), line:147:46, endln:147:69 |vpiName:AW |vpiFullName:work@oh_fifo_async.wr_addr_gray_sync.AW |vpiActual: @@ -87040,7 +86060,7 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:147:67, endln:147:68 |vpiParent: - \_part_select: , line:147:46, endln:147:69 + \_part_select: wr_addr_gray_sync (wr_addr_gray_sync), line:147:46, endln:147:69 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -87068,21 +86088,19 @@ design: (work@oh_fifo_async) \_operation: , line:150:23, endln:151:46 |vpiOpType:14 |vpiOperand: - \_part_select: , line:150:24, endln:150:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:39 |vpiParent: - \_ref_obj: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:31 - |vpiParent: - \_operation: , line:150:24, endln:150:63 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiDefName:wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_operation: , line:150:24, endln:150:63 + |vpiName:wr_addr + |vpiFullName:work@oh_fifo_async.wr_addr + |vpiDefName:wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:150:32, endln:150:36 |vpiParent: - \_part_select: , line:150:24, endln:150:39 + \_part_select: wr_addr (work@oh_fifo_async.wr_addr), line:150:24, endln:150:39 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:150:32, endln:150:34 @@ -87103,27 +86121,25 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:150:37, endln:150:38 |vpiParent: - \_part_select: , line:150:24, endln:150:39 + \_part_select: wr_addr (wr_addr), line:150:24, endln:150:39 |vpiDecompile:0 |vpiSize:64 |UINT:0 |vpiConstType:9 |vpiOperand: - \_part_select: , line:150:43, endln:150:63 + \_part_select: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:63 |vpiParent: - \_ref_obj: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:55 - |vpiParent: - \_operation: , line:150:24, endln:150:63 - |vpiName:rd_addr_sync - |vpiFullName:work@oh_fifo_async.rd_addr_sync - |vpiDefName:rd_addr_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_sync), line:61:18, endln:61:30 + \_operation: , line:150:24, endln:150:63 + |vpiName:rd_addr_sync + |vpiFullName:work@oh_fifo_async.rd_addr_sync + |vpiDefName:rd_addr_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_sync), line:61:18, endln:61:30 |vpiConstantSelect:1 |vpiLeftRange: \_operation: , line:150:56, endln:150:60 |vpiParent: - \_part_select: , line:150:43, endln:150:63 + \_part_select: rd_addr_sync (work@oh_fifo_async.rd_addr_sync), line:150:43, endln:150:63 |vpiOpType:11 |vpiOperand: \_ref_obj: (work@oh_fifo_async.rd_addr_sync.AW), line:150:56, endln:150:58 @@ -87144,7 +86160,7 @@ design: (work@oh_fifo_async) |vpiRightRange: \_constant: , line:150:61, endln:150:62 |vpiParent: - \_part_select: , line:150:43, endln:150:63 + \_part_select: rd_addr_sync (rd_addr_sync), line:150:43, endln:150:63 |vpiDecompile:0 |vpiSize:64 |UINT:0 @@ -87157,47 +86173,35 @@ design: (work@oh_fifo_async) |vpiOperand: \_bit_select: (work@oh_fifo_async.wr_addr), line:151:10, endln:151:21 |vpiParent: - \_ref_obj: (work@oh_fifo_async.wr_addr) - |vpiParent: - \_operation: , line:151:10, endln:151:45 - |vpiName:wr_addr - |vpiFullName:work@oh_fifo_async.wr_addr - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 + \_operation: , line:151:10, endln:151:45 |vpiName:wr_addr |vpiFullName:work@oh_fifo_async.wr_addr + |vpiActual: + \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.wr_addr.AW), line:151:18, endln:151:20 + \_ref_obj: (work@oh_fifo_async.AW), line:151:18, endln:151:20 |vpiParent: \_bit_select: (work@oh_fifo_async.wr_addr), line:151:10, endln:151:21 |vpiName:AW - |vpiFullName:work@oh_fifo_async.wr_addr.AW + |vpiFullName:work@oh_fifo_async.AW |vpiActual: \_parameter: (work@oh_fifo_async.AW), line:15:15, endln:15:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.wr_addr), line:55:17, endln:55:24 |vpiOperand: \_bit_select: (work@oh_fifo_async.rd_addr_sync), line:151:29, endln:151:45 |vpiParent: - \_ref_obj: (work@oh_fifo_async.rd_addr_sync) - |vpiParent: - \_operation: , line:151:10, endln:151:45 - |vpiName:rd_addr_sync - |vpiFullName:work@oh_fifo_async.rd_addr_sync - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_sync), line:61:18, endln:61:30 + \_operation: , line:151:10, endln:151:45 |vpiName:rd_addr_sync |vpiFullName:work@oh_fifo_async.rd_addr_sync + |vpiActual: + \_logic_net: (work@oh_fifo_async.rd_addr_sync), line:61:18, endln:61:30 |vpiIndex: - \_ref_obj: (work@oh_fifo_async.rd_addr_sync.AW), line:151:42, endln:151:44 + \_ref_obj: (work@oh_fifo_async.AW), line:151:42, endln:151:44 |vpiParent: \_bit_select: (work@oh_fifo_async.rd_addr_sync), line:151:29, endln:151:45 |vpiName:AW - |vpiFullName:work@oh_fifo_async.rd_addr_sync.AW + |vpiFullName:work@oh_fifo_async.AW |vpiActual: \_parameter: (work@oh_fifo_async.AW), line:15:15, endln:15:17 - |vpiActual: - \_logic_net: (work@oh_fifo_async.rd_addr_sync), line:61:18, endln:61:30 |vpiLhs: \_ref_obj: (work@oh_fifo_async.wr_full), line:150:11, endln:150:18 |vpiParent: @@ -87215,7 +86219,7 @@ design: (work@oh_fifo_async) [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_7seg_decode.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_7seg_decode_000.v | 23 | 40 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_abs_000.v | 22 | 35 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_abs.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_abs_000.v | 23 | 35 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_add.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_add_000.v | 30 | 45 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and2.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_and2_000.v | 19 | 33 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_and3.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_and3_000.v | 7 | 18 | @@ -87238,26 +86242,26 @@ design: (work@oh_fifo_async) [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi311.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_aoi311_000.v | 10 | 19 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi32.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_aoi32_000.v | 10 | 19 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_aoi33.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_aoi33_000.v | 11 | 20 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_arbiter_000.v | 18 | 33 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_bin2gray_000.v | 12 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_arbiter.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_arbiter_000.v | 19 | 33 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2gray.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_bin2gray_000.v | 14 | 31 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bin2onehot.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_bin2onehot_000.v | 11 | 21 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_bitreverse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_bitreverse_000.v | 12 | 23 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buf.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_buf_000.v | 5 | 15 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_buffer_000.v | 20 | 29 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockdiv_000.v | 75 | 167 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_buffer.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_buffer_000.v | 21 | 29 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockdiv.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockdiv_000.v | 83 | 167 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockgate.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockgate_000.v | 26 | 46 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockmux_000.v | 22 | 33 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux2.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockmux2_000.v | 29 | 40 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockmux4.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockmux4_000.v | 39 | 50 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_clockor.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_clockor_000.v | 20 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_counter_000.v | 37 | 64 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa32_000.v | 28 | 40 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa42_000.v | 49 | 77 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_counter.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_counter_000.v | 40 | 64 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa32.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa32_000.v | 29 | 40 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa42.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa42_000.v | 50 | 77 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa62.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa62_000.v | 48 | 62 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_csa92.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_csa92_000.v | 72 | 88 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_datagate_000.v | 30 | 49 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_datagate.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_datagate_000.v | 31 | 49 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_debouncer.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_debouncer_000.v | 38 | 77 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_delay_000.v | 18 | 36 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_delay.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_delay_000.v | 20 | 36 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffnq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffnq_000.v | 6 | 17 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffq_000.v | 6 | 18 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffqn_000.v | 6 | 17 | @@ -87265,27 +86269,27 @@ design: (work@oh_fifo_async) [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffrqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffrqn_000.v | 7 | 22 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffsq_000.v | 7 | 22 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dffsqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dffsqn_000.v | 7 | 22 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dsync_000.v | 28 | 44 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_edge2pulse_000.v | 9 | 27 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_dsync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_dsync_000.v | 30 | 44 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edge2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_edge2pulse_000.v | 12 | 27 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_edgealign.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_edgealign_000.v | 22 | 46 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fall2pulse_000.v | 9 | 27 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fifo_async_000.v | 103 | 186 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fall2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fall2pulse_000.v | 12 | 27 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_async.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fifo_async_000.v | 107 | 186 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_cdc.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fifo_cdc_000.v | 55 | 86 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fifo_sync_000.v | 76 | 144 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_gray2bin_000.v | 10 | 33 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_fifo_sync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_fifo_sync_000.v | 88 | 144 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_gray2bin.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_gray2bin_000.v | 12 | 33 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_header.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_header_000.v | 18 | 29 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_iddr_000.v | 31 | 69 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_iddr.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_iddr_000.v | 33 | 69 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_inv.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_inv_000.v | 5 | 15 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobufhi.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_isobufhi_000.v | 23 | 32 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_isobuflo.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_isobuflo_000.v | 23 | 34 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_lat0_000.v | 21 | 36 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_lat1_000.v | 21 | 37 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat0.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_lat0_000.v | 23 | 36 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_lat1.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_lat1_000.v | 23 | 37 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latnq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_latnq_000.v | 7 | 19 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_latq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_latq_000.v | 7 | 19 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_memory_dp_000.v | 46 | 78 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_memory_sp_000.v | 43 | 75 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_dp.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_memory_dp_000.v | 48 | 78 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_memory_sp.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_memory_sp_000.v | 45 | 75 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mult.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mult_000.v | 33 | 49 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mux_000.v | 24 | 41 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mux_000.v | 26 | 41 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux12.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mux12_000.v | 41 | 51 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux2.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mux2_000.v | 10 | 21 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_mux3.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_mux3_000.v | 13 | 23 | @@ -87323,30 +86327,30 @@ design: (work@oh_fifo_async) [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai311.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_oai311_000.v | 10 | 19 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai32.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_oai32_000.v | 10 | 19 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oai33.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_oai33_000.v | 11 | 20 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_oddr_000.v | 25 | 43 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_oddr.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_oddr_000.v | 27 | 43 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or2.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_or2_000.v | 7 | 16 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or3.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_or3_000.v | 7 | 18 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_or4.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_or4_000.v | 8 | 19 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_par2ser_000.v | 23 | 69 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_parity_000.v | 6 | 17 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_par2ser.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_par2ser_000.v | 31 | 69 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_parity.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_parity_000.v | 7 | 17 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pll.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_pll_000.v | 13 | 26 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pulse2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_pulse2pulse_000.v | 20 | 53 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_pwr_buf_000.v | 12 | 24 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_reg0_000.v | 15 | 31 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_reg1_000.v | 27 | 45 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_pwr_buf.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_pwr_buf_000.v | 13 | 24 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg0.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_reg0_000.v | 18 | 31 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_reg1.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_reg1_000.v | 30 | 45 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_regfile.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_regfile_000.v | 41 | 76 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_rise2pulse_000.v | 7 | 26 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_rsync_000.v | 24 | 40 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rise2pulse.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_rise2pulse_000.v | 10 | 26 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_rsync.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_rsync_000.v | 26 | 40 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffq_000.v | 8 | 20 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffqn_000.v | 8 | 20 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffrq_000.v | 9 | 25 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffrqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffrqn_000.v | 9 | 24 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsq.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffsq_000.v | 9 | 24 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_sdffsqn.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_sdffsqn_000.v | 9 | 24 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_ser2par_000.v | 12 | 29 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_shift_000.v | 29 | 53 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_standby_000.v | 47 | 96 | -[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_stretcher_000.v | 8 | 28 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_ser2par.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_ser2par_000.v | 14 | 29 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_shift.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_shift_000.v | 33 | 53 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_standby.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_standby_000.v | 49 | 96 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_stretcher.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_stretcher_000.v | 10 | 28 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_tristate.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_tristate_000.v | 25 | 36 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor2.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_xnor2_000.v | 7 | 16 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/oh/stdlib/hdl/oh_xnor3.v | ${SURELOG_DIR}/build/regression/BasicOh/roundtrip/oh_xnor3_000.v | 8 | 17 | diff --git a/third_party/tests/xgate/Xgate.log b/third_party/tests/xgate/Xgate.log index 4b33c87a3f..dd729f0232 100644 --- a/third_party/tests/xgate/Xgate.log +++ b/third_party/tests/xgate/Xgate.log @@ -5502,7 +5502,7 @@ part_select 118339 port 121006 range 112851 ref_module 10683 -ref_obj 411748 +ref_obj 271731 string_typespec 300 sys_func_call 23 task 9 @@ -5556,7 +5556,7 @@ part_select 177487 port 183618 range 112851 ref_module 10683 -ref_obj 679741 +ref_obj 461509 string_typespec 300 sys_func_call 23 task 18 @@ -5571,5 +5571,5 @@ unsupported_typespec 160 [ NOTE] : 87 -[roundtrip]: ${SURELOG_DIR}/third_party/tests/xgate/cells_sim.v | ${SURELOG_DIR}/build/regression/Xgate/roundtrip/cells_sim_000.v | 2505 | 4392 | +[roundtrip]: ${SURELOG_DIR}/third_party/tests/xgate/cells_sim.v | ${SURELOG_DIR}/build/regression/Xgate/roundtrip/cells_sim_000.v | 2565 | 4392 | [roundtrip]: ${SURELOG_DIR}/third_party/tests/xgate/gnl_4_8_7_2.0_gnl_8000_08_7_80_80.v | ${SURELOG_DIR}/build/regression/Xgate/roundtrip/gnl_4_8_7_2.0_gnl_8000_08_7_80_80_000.v | 113418 | 113449 | \ No newline at end of file