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lines changed Original file line number Diff line number Diff line change 11CAPI=2:
22
3- name : chipsalliance.org:cores:SweRV_EH1:1.3
3+ name : chipsalliance.org:cores:SweRV_EH1:1.4
44
55filesets:
66 rtl:
@@ -96,7 +96,6 @@ targets:
9696 - "tool_verilator? (verilator_tb)"
9797
9898 generate : [swerv_ahb_config]
99- parameters : [ifu_mem_file, lsu_mem_file]
10099 tools:
101100 modelsim:
102101 vlog_options :
@@ -110,24 +109,32 @@ targets:
110109 synth:
111110 default_tool : vivado
112111 filesets : [includes, rtl, vivado_tcl]
113- generate : [swerv_default_config ]
112+ generate : [swerv_fpga_config ]
114113 tools:
115114 vivado:
116115 part : xc7a100tcsg324-1
116+ pnr : none
117117 toplevel : swerv_wrapper
118118
119119generate:
120120 swerv_ahb_config:
121121 generator: swerv_config
122122 position : first
123123 parameters:
124- args : ['-ahb_lite']
124+ args : ['-ahb_lite', -unset=assert_on ]
125125
126126 swerv_default_config:
127127 generator: swerv_config
128128 position : first
129129 parameters:
130130 args : [-unset=assert_on]
131+
132+ swerv_fpga_config:
133+ generator: swerv_config
134+ position : first
135+ parameters:
136+ args : [-unset=assert_on, -set=fpga_optimize=1]
137+
131138generators:
132139 swerv_config:
133140 interpreter: python
@@ -138,4 +145,4 @@ provider:
138145 name : github
139146 user : olofk
140147 repo : Cores-SweRV
141- version : 4a287a070497f602feadf63f1b6a130b64cffdb4
148+ version : 5bca0373295e6ba4c8bbb0c0390322a101650de6
Original file line number Diff line number Diff line change @@ -18,7 +18,7 @@ filesets:
1818 - "pulp-platform.org::axi2apb"
1919 - "pulp-platform.org::axi_mem_if"
2020 - ">=pulp-platform.org::axi_node:1.1.1-r2"
21- - ">=chipsalliance.org:cores:SweRV_EH1:1.2 "
21+ - ">=chipsalliance.org:cores:SweRV_EH1:1.4 "
2222
2323 bfm:
2424 files:
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