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Caliptra Timing Optimization #3380

@RaunakGu

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@RaunakGu

Team,

@mhatrevi @swenson @clayton8

This is regarding Caliptra cold‑boot timing. It is being run at 500MHz..
Currently, approximately 23 ms is consumed by KAT + IDev + LDev execution alone.
Given the tight boot‑up timing requirements, this presents a challenge to meeting the overall TTR target. We need to evaluate potential optimization opportunities. Let us know your thoughts on possible optimizations or if additional breakdown is needed for these red‑highlighted steps in the screenshots.?

Proposed areas to consider:

KAT optimization:

  1. Can multiple KATs be executed in parallel to reduce total latency?
  2. LMS KAT conditional execution: Run LMS KAT only when the key type is configured as LMS; otherwise, skip it entirely.?

IDev Optimization:
Major time seems taken by ECC and MLDSA key pair generation, both being run sequentially. Can we run these Key generation in parallel?

LDev Optimization:
Major time seems taken by ECC and MLDSA key pair generation, both being run sequentially. Can we run these Key generation in parallel?

Image Image Image Image

chipsalliance/caliptra-ss#608 (comment)

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