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[ChiselSim] Add non-ElaboratedModule LayerControl
Add functions for working with `LayerControl` member functions which do not require an `ElaboratedModule`. An `ElaboratedModule` is private and basically impossible to work with unless you are already using `ChiselSim`. For projects that are extending `ChiselSim` (or have not adopted it fully, yet), this makes `LayerControl` usable whereas without this it is not. Signed-off-by: Schuyler Eldridge <[email protected]>
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src/main/scala-2/chisel3/simulator/LayerControl.scala

Lines changed: 48 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -13,47 +13,63 @@ object LayerControl {
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/** The type of all layer control variations */
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sealed trait Type {
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/** Return the layers that should be enabled in a circuit. The layers must exist in the design.
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/** Return the layers that should be enabled in a circuit. The layers must exist in the circuit.
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*
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* @param design an Annotation that contains an elaborated design used to check that the requested layers exist
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* @return all layers that should be enabled
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* @throws IllegalArgumentException if the requested layers
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* @param allLayers all layers that are defined in a circuit
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* @return the layers that should be enabled
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* @throws IllegalArgumentException if the requested layers are not in `allLayers`
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*/
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protected def getLayerSubset(module: ElaboratedModule[_]): Seq[Layer]
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protected def getLayerSubset(allLayers: Seq[Layer]): Seq[Layer]
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/** Return the preprocessor defines that should be set to enable the layers of
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* this `LayerControl.Type`.
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*
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* This requires passing an elaborated module in order to know what layers
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* exist in the design.
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*
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* @param module an elaborated module
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* @param module a Chisel module
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* @param allLayers all the layers that are allow
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* @return preprocessor defines to control the enabling of these layers
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*/
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final def preprocessorDefines(
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module: ElaboratedModule[_ <: RawModule]
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): Seq[VerilogPreprocessorDefine] = getLayerSubset(module).flatMap {
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module: RawModule,
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allLayers: Seq[Layer]
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): Seq[VerilogPreprocessorDefine] = getLayerSubset(allLayers).flatMap {
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case layer =>
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layer.config.abi match {
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case abi: chisel3.layer.ABI.PreprocessorDefine.type =>
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Some(VerilogPreprocessorDefine(abi.toMacroIdentifier(layer, module.wrapped.circuitName)))
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Some(VerilogPreprocessorDefine(abi.toMacroIdentifier(layer, module.circuitName)))
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case _ => None
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}
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}
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/** Return the preprocessor defines that should be set to enable the layers of
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* this `LayerControl.Type`.
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*
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* This requires passing an elaborated module in order to know what layers
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* exist in the design.
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*
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* @param module an elaborated Chisel module
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* @return preprocessor defines to control the enabling of these layers
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*/
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final def preprocessorDefines(
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module: ElaboratedModule[_ <: RawModule]
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): Seq[VerilogPreprocessorDefine] = preprocessorDefines(module.wrapped, module.layers)
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/** Return a partial function that will return true if a file should be included
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* in the build to enable a layer. This partial function is not defined if
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* the file is not a layer file.
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*
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* @param module an elaborated module
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* @param module a Chisel module
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* @param allLayers all the layers that can be enabled
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* @return a partial function to test if layer files should be included
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*/
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final def shouldIncludeFile(module: ElaboratedModule[_ <: RawModule]): PartialFunction[File, Boolean] = {
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val layerFilenames: Seq[String] = getLayerSubset(module).flatMap {
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final def shouldIncludeFile(
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module: RawModule,
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allLayers: Seq[Layer]
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): PartialFunction[File, Boolean] = {
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val layerFilenames: Seq[String] = getLayerSubset(allLayers).flatMap {
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case layer =>
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layer.config.abi match {
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case abi: chisel3.layer.ABI.FileInclude.type =>
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Some(abi.toFilename(layer, module.wrapped.circuitName))
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Some(abi.toFilename(layer, module.circuitName))
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case _ => None
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}
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}
@@ -64,12 +80,23 @@ object LayerControl {
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}
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}
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/** Return a partial function that will return true if a file should be included
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* in the build to enable a layer. This partial function is not defined if
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* the file is not a layer file.
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*
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* @param module an elaborated Chisel module
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* @return a partial function to test if layer files should be included
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*/
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final def shouldIncludeFile(
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module: ElaboratedModule[_ <: RawModule]
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): PartialFunction[File, Boolean] = shouldIncludeFile(module.wrapped, module.layers)
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}
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/** Enable all layers */
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final case object EnableAll extends Type {
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72-
override protected def getLayerSubset(module: ElaboratedModule[_]): Seq[Layer] = module.layers
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override protected def getLayerSubset(layers: Seq[Layer]): Seq[Layer] = layers
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}
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/** Enable only the specified layers
@@ -89,12 +116,12 @@ object LayerControl {
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}
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}
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92-
override protected def getLayerSubset(module: ElaboratedModule[_]): Seq[Layer] = {
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val definedLayers = module.layers
119+
override protected def getLayerSubset(allLayers: Seq[Layer]): Seq[Layer] = {
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val layerSet = allLayers.toSet
94121
layers.foreach { layer =>
95122
require(
96-
definedLayers.contains(layer),
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s"""cannot enable layer '${layer.fullName}' as it is not one of the defined layers: ${definedLayers.map(
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layerSet.contains(layer),
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s"""cannot enable layer '${layer.fullName}' as it is not one of the defined layers: ${allLayers.map(
98125
_.fullName
99126
)}"""
100127
)

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