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Merge pull request #374 from antmicro/366-use-after-delete
Remove unused modules from top_nodes
2 parents 52cdcc4 + 2f2f009 commit 3b3dcc5

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systemverilog-plugin/UhdmAst.cc

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -598,6 +598,8 @@ static AST::AstNode *convert_dot(AST::AstNode *wire_node, AST::AstNode *node, AS
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static void setup_current_scope(std::unordered_map<std::string, AST::AstNode *> top_nodes, AST::AstNode *current_top_node)
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{
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for (auto it = top_nodes.begin(); it != top_nodes.end(); it++) {
601+
if (!it->second)
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continue;
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if (it->second->type == AST::AST_PACKAGE) {
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for (auto &o : it->second->children) {
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// import only parameters
@@ -1527,7 +1529,7 @@ void UhdmAst::process_design()
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}
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}
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// Once we walked everything, unroll that as children of this node
1530-
for (auto pair : shared.top_nodes) {
1532+
for (auto &pair : shared.top_nodes) {
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if (!pair.second)
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continue;
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if (!pair.second->get_bool_attribute(UhdmAst::partial())) {
@@ -1542,7 +1544,10 @@ void UhdmAst::process_design()
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}
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} else {
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log_warning("Removing unused module: %s from the design.\n", pair.second->str.c_str());
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// TODO: This should be properly erased from the module, but it seems that it's
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// needed to resolve scope
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delete pair.second;
1550+
pair.second = nullptr;
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}
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}
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}

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