fix surelog build on mac

Author: timkpaine

.github/workflows/ci.yml

@@ -69,11 +69,18 @@ jobs:
           restore-keys: brew-
       if: ${{ runner.os == 'macOS' }}
 
+    - uses: actions/setup-java@v3
+      with:
+        distribution: 'temurin'
+        java-version: '11'
+
     - name: Install Mac Dependencies
       run: |
         brew update
-        brew install make cmake graphviz bison flex boost nlohmann-json icarus-verilog
+        brew install bison boost cmake flex graphviz icarus-verilog make nlohmann-json
         sudo ln -s /usr/local/bin/gmake /usr/local/bin/make
+      env:
+        HOMEBREW_NO_AUTO_UPDATE: "1"
       if: ${{ runner.os == 'macOS'}}
 
     - name: Format
@@ -116,7 +123,7 @@ jobs:
           git clone https://github.com/chipsalliance/Surelog.git
           pushd Surelog
           git submodule update --init --recursive
-          cmake -B build -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_STANDARD=17 -DSURELOG_USE_HOST_GTEST=ON -S . && cmake --build build && sudo cmake --install build
+          cmake -B build -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_STANDARD=17 -DSURELOG_USE_HOST_GTEST=ON -DPYTHON_EXECUTABLE=`which python` -DPython3_EXECUTABLE=`which python` -S . && cmake --build build && sudo cmake --install build
           popd
       env:
         OS: ${{ runner.os }}

Makefile_test.common

@@ -78,7 +78,7 @@ $(1): $(1)/ok
 	@printf "Test %-18s \e[32mPASSED\e[0m @ %s\n" $(1) $(CURDIR);
 
 $(1)/$$(notdir $(1).vvp): $(1)/$$(notdir $(1).v)
-	@iverilog -vvvv -g2005 -o $$@ $$< $(SIM_LIBS) -I../ -DVCD_FILE=\"$(1)/$$(notdir $(1).vcd)\" >$(1)/$$(notdir $(1).vvp.log) 2>&1; \
+	@iverilog -vvvv -g2005 -grelative-include -o $$@ $$< $(SIM_LIBS) -I../ -DVCD_FILE=\"$(1)/$$(notdir $(1).vcd)\" >$(1)/$$(notdir $(1).vvp.log) 2>&1; \
 	if [ $$$$? -ne 0 ]; then \
 		printf "Test %-18s \e[31;1mFAILED\e[0m @ %s\n" $(1) $(CURDIR); \
 		false; \

ql-qlf-plugin/tests/Makefile

@@ -37,7 +37,6 @@ TESTS = \
 #	qlf_k6n10_bram \
 
 SIM_TESTS = \
-     qlf_k6n10f/sim_dsp_mult_cfg_ports \
      qlf_k6n10f/sim_dsp_mult_cfg_ports \
      qlf_k6n10f/sim_dsp_mult_cfg_params \
      qlf_k6n10f/sim_dsp_mult_r_cfg_ports \

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_fir_cfg_params/sim_dsp_fir_cfg_params.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 
 module tb();
 

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_fir_cfg_ports/sim_dsp_fir_cfg_ports.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 
 module tb();
 

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_mult_r_cfg_params/sim_dsp_mult_r_cfg_params.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 
 module tb();
 

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_mult_r_cfg_ports/sim_dsp_mult_r_cfg_ports.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 
 module tb();
 

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_simd_cfg_params/sim_dsp_simd_cfg_params.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 `timescale 1ns/1ps
 
 module tb();

ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_simd_cfg_ports/sim_dsp_simd_cfg_ports.v

@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-`include "qlf_k6n10f/cells_sim.v"
+`include "../../../qlf_k6n10f/cells_sim.v"
 `timescale 1ns/1ps
 
 module tb();