asm: make all text section labels .L local

To help with backtraces if we ever fix them due to the lkmc_asm_main_after_prologue debacle.

Author: cirosantilli

baremetal/arch/aarch64/multicore.S

@@ -15,7 +15,7 @@ LKMC_PROLOGUE
     mrs x1, mpidr_el1
     ands x1, x1, 3
     beq cpu0_only
-cpu1_only:
+.Lcpu1_only:
     /* Only CPU 1 reaches this point and sets the spinlock. */
     mov x0, 1
     ldr x1, =spinlock
@@ -28,12 +28,12 @@ cpu1_only:
      * Optional, but could save power on a real system.
      */
     sev
-cpu1_sleep_forever:
+.Lcpu1_sleep_forever:
     /* Hint CPU 1 to enter low power mode.
      * Optional, but could save power on a real system.
      */
     wfe
-    b cpu1_sleep_forever
+    b .Lcpu1_sleep_forever
 cpu0_only:
     /* Only CPU 0 reaches this point. */
 
@@ -46,7 +46,7 @@ cpu0_only:
     /* Argument 1: target_cpu */
     mov x1, 1
     /* Argument 2: entry_point_address */
-    ldr x2, =cpu1_only
+    ldr x2, =.Lcpu1_only
     /* Argument 3: context_id */
     mov x3, 0
     /* Unused hvc args: the Linux kernel zeroes them,

baremetal/arch/arm/multicore.S

@@ -10,21 +10,21 @@ LKMC_PROLOGUE
     mrc p15, 0, r1, c0, c0, 5
     ands r1, r1, 3
     beq cpu0_only
-cpu1_only:
+.Lcpu1_only:
     mov r0, 1
     ldr r1, =spinlock
     str r0, [r1]
     dmb sy
     sev
-cpu1_sleep_forever:
+.Lcpu1_sleep_forever:
     wfe
-    b cpu1_sleep_forever
+    b .Lcpu1_sleep_forever
 cpu0_only:
 #if !LKMC_GEM5
     /* PSCI CPU_ON. */
     ldr r0, =0x84000003
     mov r1, 1
-    ldr r2, =cpu1_only
+    ldr r2, =.Lcpu1_only
     mov r3, 0
     hvc 0
 #endif

userland/arch/aarch64/adr.S

@@ -16,6 +16,5 @@ LKMC_PROLOGUE
      */
     adr x0, data_label
     ldr x1, =data_label
-label:
     LKMC_ASSERT_EQ_REG(x0, x1)
 LKMC_EPILOGUE

userland/arch/aarch64/adrp.S

@@ -3,9 +3,9 @@
 #include <lkmc.h>
 
 LKMC_PROLOGUE
-    adrp x0, label
-    adr x1, label
-label:
+    adrp x0, .Llabel
+    adr x1, .Llabel
+.Llabel:
     /* Clear the lower 12 bits. */
     bic x1, x1, 0xFF
     bic x1, x1, 0xF00

userland/arch/aarch64/cbz.S

@@ -6,14 +6,13 @@ LKMC_PROLOGUE
 
     /* Branch. */
     mov x0, 0x0
-    cbz x0, ok
+    cbz x0, .Lok
     LKMC_ASSERT_FAIL
-ok:
+.Lok:
 
     /* Don't branch. */
     mov x0, 0x1
-    cbz x0, ko
-
+    cbz x0, .Lko
 LKMC_EPILOGUE
-ko:
+.Lko:
     LKMC_ASSERT_FAIL

userland/arch/aarch64/movk.S

@@ -17,10 +17,10 @@ LKMC_PROLOGUE
      * This could be used if the label is too far away for
      * adr relative addressing.
      */
-    movz x0, :abs_g2:label     /* bits 32-47, overflow check */
-    movk x0, :abs_g1_nc:label  /* bits 16-31, no overflow check */
-    movk x0, :abs_g0_nc:label  /* bits  0-15, no overflow check */
-    adr x1, label
-label:
+    movz x0, :abs_g2:.Llabel     /* bits 32-47, overflow check */
+    movk x0, :abs_g1_nc:.Llabel  /* bits 16-31, no overflow check */
+    movk x0, :abs_g0_nc:.Llabel  /* bits  0-15, no overflow check */
+    adr x1, .Llabel
+.Llabel:
     LKMC_ASSERT_EQ_REG(x0, x1)
 LKMC_EPILOGUE

userland/arch/aarch64/pc.S

@@ -27,11 +27,11 @@ LKMC_PROLOGUE
      * "LDR (literal)" instead of "LDR (immediate)":
      * https://stackoverflow.com/questions/28638981/howto-write-pc-relative-adressing-on-arm-asm/54480999#54480999
      */
-    ldr x0, pc_relative_ldr
-    b 1f
-pc_relative_ldr:
+    ldr x0, .Lpc_relative_ldr
+    b 2f
+.Lpc_relative_ldr:
     .quad 0x123456789ABCDEF0
-1:
+2:
     LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0)
 
     /* Just for fun, we can also use relative numbers instead of labels.
@@ -68,7 +68,7 @@ pc_relative_ldr:
     ldr x0, pc_relative_str
     LKMC_ASSERT_EQ(x0, =0x0)
     adr x1, pc_relative_str
-    ldr x0, pc_relative_ldr
+    ldr x0, .Lpc_relative_ldr
     str x0, [x1]
     ldr x0, pc_relative_str
     LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0)

userland/arch/arm/adr.S

@@ -6,14 +6,14 @@
 data_label:
     .word 0x1234678
 LKMC_PROLOGUE
-    adr r4, label
+    adr r4, .Llabel
     /* objdump tells us that this uses the literal pool,
      * it does not get converted to adr, which is the better
      * alternative here.
      */
-    ldr r5, =label
-    adrl r6, label
-label:
+    ldr r5, =.Llabel
+    adrl r6, .Llabel
+.Llabel:
     LKMC_ASSERT_EQ_REG(r4, r5)
     LKMC_ASSERT_EQ_REG(r4, r6)
 

userland/arch/arm/b.S

@@ -3,7 +3,7 @@
 #include <lkmc.h>
 LKMC_PROLOGUE
     /* Jump over the fail. 26-bit PC-relative. */
-    b ok
+    b .Lok
     LKMC_ASSERT_FAIL
-ok:
+.Lok:
 LKMC_EPILOGUE

userland/arch/arm/registers.S

@@ -48,7 +48,6 @@ LKMC_PROLOGUE
 10:
 
     /* Another example with mov reading from pc. */
-pc_addr:
     mov r0, pc
     /* Why sub 8:
      * https://stackoverflow.com/questions/24091566/why-does-the-arm-pc-register-point-to-the-instruction-after-the-next-one-to-be-e