gem5: port lkmc/m5ops.h to x86

We can now easily include x86 m5ops on our gem5 examples.

Author: cirosantilli

README.adoc

@@ -10916,8 +10916,9 @@ To use that file, first rebuild `m5ops.out` with the m5ops instructions enabled
 ./build-userland \
   --arch aarch64 \
   --ccflags='-DLKMC_M5OPS_ENABLE=1' \
-  --force-rebuild c/m5ops \
+  --force-rebuild \
   --static \
+  userland/c/m5ops.c \
 ;
 ./build-buildroot --arch aarch64
 ....

lkmc/m5ops.h

@@ -5,7 +5,28 @@
 
 #if LKMC_M5OPS_ENABLE
 
-#if defined(__arm__)
+#if defined(__x86_64__)
+
+/* 0x43 is the identifier for CHECKPOINT on all archs.
+ *
+ * 0x040F is the magic x86 undefined instruction boilerplate to which the identifier gets added.
+ *
+ * D means RDI which is the first argument of a Linux C function call,
+ * and S means RSI is the second one: these are also used by gem5 as arguments of the m5ops.
+ */
+#define LKMC_M5OPS_CHECKPOINT_ASM mov $0, %%rdi; mov $0, %%rsi; .word 0x040F; .word 0x0043
+#define LKMC_M5OPS_DUMPSTATS_ASM  mov $0, %%rdi; mov $0, %%rsi; .word 0x040F; .word 0x0041
+#define LKMC_M5OPS_EXIT_ASM       mov $0, %%rdi;                .word 0x040F; .word 0x0021
+#define LKMC_M5OPS_FAIL_1_ASM     mov $0, %%rdi; mov $1, %%rsi; .word 0x040F; .word 0x0022
+#define LKMC_M5OPS_RESETSTATS_ASM mov $0, %%rdi; mov $0, %%rsi; .word 0x040F; .word 0x0040
+
+#define LKMC_M5OPS_CHECKPOINT __asm__ __volatile__ (".word 0x040F; .word 0x0043;" : : "D" (0), "S" (0) :)
+#define LKMC_M5OPS_DUMPSTATS  __asm__ __volatile__ (".word 0x040F; .word 0x0041;" : : "D" (0), "S" (0) :)
+#define LKMC_M5OPS_EXIT       __asm__ __volatile__ (".word 0x040F; .word 0x0021;" : : "D" (0)          :)
+#define LKMC_M5OPS_FAIL_1     __asm__ __volatile__ (".word 0x040F; .word 0x0022;" : : "D" (0), "S" (1) :)
+#define LKMC_M5OPS_RESETSTATS __asm__ __volatile__ (".word 0x040F; .word 0x0040;" : : "D" (0), "S" (0) :)
+
+#elif defined(__arm__)
 
 #define LKMC_M5OPS_CHECKPOINT_ASM mov r0, #0; mov r1, #0; mov r2, #0; mov r3, #0; .inst 0xEE000110 | (0x43 << 16)
 #define LKMC_M5OPS_DUMPSTATS_ASM  mov r0, #0; mov r1, #0; mov r2, #0; mov r3, #0; .inst 0xEE000110 | (0x41 << 16)