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[DAG] Add select_cc -> abd folds (llvm#102137)
Fixes llvm#100810
1 parent 1d65d53 commit 86bd629

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13 files changed

+528
-534
lines changed

13 files changed

+528
-534
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27919,6 +27919,8 @@ SDValue DAGCombiner::SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1,
2791927919
return S;
2792027920
if (SDValue S = PerformUMinFpToSatCombine(N0, N1, N2, N3, CC, DAG))
2792127921
return S;
27922+
if (SDValue ABD = foldSelectToABD(N0, N1, N2, N3, CC, DL))
27923+
return ABD;
2792227924

2792327925
return SDValue();
2792427926
}

‎llvm/test/CodeGen/AArch64/abds-neg.ll

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -377,7 +377,7 @@ define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
377377
; CHECK: // %bb.0:
378378
; CHECK-NEXT: sub x8, x1, x0
379379
; CHECK-NEXT: subs x9, x0, x1
380-
; CHECK-NEXT: csel x0, x8, x9, lt
380+
; CHECK-NEXT: csel x0, x9, x8, gt
381381
; CHECK-NEXT: ret
382382
%cmp = icmp slt i64 %a, %b
383383
%ab = sub i64 %a, %b
@@ -389,14 +389,13 @@ define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
389389
define i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {
390390
; CHECK-LABEL: abd_cmp_i128:
391391
; CHECK: // %bb.0:
392-
; CHECK-NEXT: cmp x0, x2
393-
; CHECK-NEXT: sbc x8, x1, x3
394-
; CHECK-NEXT: subs x9, x2, x0
395-
; CHECK-NEXT: sbc x10, x3, x1
396-
; CHECK-NEXT: subs x11, x0, x2
397-
; CHECK-NEXT: sbcs xzr, x1, x3
398-
; CHECK-NEXT: csel x0, x9, x11, lt
399-
; CHECK-NEXT: csel x1, x10, x8, lt
392+
; CHECK-NEXT: subs x8, x0, x2
393+
; CHECK-NEXT: sbc x9, x1, x3
394+
; CHECK-NEXT: subs x10, x2, x0
395+
; CHECK-NEXT: sbc x11, x3, x1
396+
; CHECK-NEXT: sbcs xzr, x3, x1
397+
; CHECK-NEXT: csel x0, x8, x10, lt
398+
; CHECK-NEXT: csel x1, x9, x11, lt
400399
; CHECK-NEXT: ret
401400
%cmp = icmp slt i128 %a, %b
402401
%ab = sub i128 %a, %b

‎llvm/test/CodeGen/AArch64/abds.ll

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -298,10 +298,9 @@ define i8 @abd_cmp_i8(i8 %a, i8 %b) nounwind {
298298
; CHECK-LABEL: abd_cmp_i8:
299299
; CHECK: // %bb.0:
300300
; CHECK-NEXT: sxtb w8, w0
301-
; CHECK-NEXT: sub w9, w0, w1
302-
; CHECK-NEXT: sub w10, w1, w0
303-
; CHECK-NEXT: cmp w8, w1, sxtb
304-
; CHECK-NEXT: csel w0, w9, w10, gt
301+
; CHECK-NEXT: sub w8, w8, w1, sxtb
302+
; CHECK-NEXT: cmp w8, #0
303+
; CHECK-NEXT: cneg w0, w8, mi
305304
; CHECK-NEXT: ret
306305
%cmp = icmp sgt i8 %a, %b
307306
%ab = sub i8 %a, %b
@@ -314,10 +313,9 @@ define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
314313
; CHECK-LABEL: abd_cmp_i16:
315314
; CHECK: // %bb.0:
316315
; CHECK-NEXT: sxth w8, w0
317-
; CHECK-NEXT: sub w9, w0, w1
318-
; CHECK-NEXT: sub w10, w1, w0
319-
; CHECK-NEXT: cmp w8, w1, sxth
320-
; CHECK-NEXT: csel w0, w9, w10, ge
316+
; CHECK-NEXT: sub w8, w8, w1, sxth
317+
; CHECK-NEXT: cmp w8, #0
318+
; CHECK-NEXT: cneg w0, w8, mi
321319
; CHECK-NEXT: ret
322320
%cmp = icmp sge i16 %a, %b
323321
%ab = sub i16 %a, %b
@@ -331,7 +329,7 @@ define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
331329
; CHECK: // %bb.0:
332330
; CHECK-NEXT: sub w8, w1, w0
333331
; CHECK-NEXT: subs w9, w0, w1
334-
; CHECK-NEXT: csel w0, w8, w9, lt
332+
; CHECK-NEXT: csel w0, w9, w8, gt
335333
; CHECK-NEXT: ret
336334
%cmp = icmp slt i32 %a, %b
337335
%ab = sub i32 %a, %b

‎llvm/test/CodeGen/AArch64/abdu-neg.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -379,7 +379,7 @@ define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
379379
; CHECK: // %bb.0:
380380
; CHECK-NEXT: sub x8, x1, x0
381381
; CHECK-NEXT: subs x9, x0, x1
382-
; CHECK-NEXT: csel x0, x8, x9, lo
382+
; CHECK-NEXT: csel x0, x9, x8, hi
383383
; CHECK-NEXT: ret
384384
%cmp = icmp ult i64 %a, %b
385385
%ab = sub i64 %a, %b
@@ -391,14 +391,14 @@ define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
391391
define i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {
392392
; CHECK-LABEL: abd_cmp_i128:
393393
; CHECK: // %bb.0:
394-
; CHECK-NEXT: cmp x0, x2
395-
; CHECK-NEXT: sbc x8, x1, x3
396-
; CHECK-NEXT: subs x9, x2, x0
397-
; CHECK-NEXT: sbc x10, x3, x1
398-
; CHECK-NEXT: subs x11, x0, x2
399-
; CHECK-NEXT: sbcs xzr, x1, x3
400-
; CHECK-NEXT: csel x0, x9, x11, lo
401-
; CHECK-NEXT: csel x1, x10, x8, lo
394+
; CHECK-NEXT: subs x8, x0, x2
395+
; CHECK-NEXT: sbcs x9, x1, x3
396+
; CHECK-NEXT: cset w10, lo
397+
; CHECK-NEXT: sbfx x10, x10, #0, #1
398+
; CHECK-NEXT: eor x8, x8, x10
399+
; CHECK-NEXT: eor x9, x9, x10
400+
; CHECK-NEXT: subs x0, x8, x10
401+
; CHECK-NEXT: sbc x1, x9, x10
402402
; CHECK-NEXT: ret
403403
%cmp = icmp ult i128 %a, %b
404404
%ab = sub i128 %a, %b

‎llvm/test/CodeGen/AArch64/abdu.ll

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -301,10 +301,9 @@ define i8 @abd_cmp_i8(i8 %a, i8 %b) nounwind {
301301
; CHECK-LABEL: abd_cmp_i8:
302302
; CHECK: // %bb.0:
303303
; CHECK-NEXT: and w8, w0, #0xff
304-
; CHECK-NEXT: sub w9, w0, w1
305-
; CHECK-NEXT: sub w10, w1, w0
306-
; CHECK-NEXT: cmp w8, w1, uxtb
307-
; CHECK-NEXT: csel w0, w9, w10, hi
304+
; CHECK-NEXT: sub w8, w8, w1, uxtb
305+
; CHECK-NEXT: cmp w8, #0
306+
; CHECK-NEXT: cneg w0, w8, mi
308307
; CHECK-NEXT: ret
309308
%cmp = icmp ugt i8 %a, %b
310309
%ab = sub i8 %a, %b
@@ -317,10 +316,9 @@ define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
317316
; CHECK-LABEL: abd_cmp_i16:
318317
; CHECK: // %bb.0:
319318
; CHECK-NEXT: and w8, w0, #0xffff
320-
; CHECK-NEXT: sub w9, w0, w1
321-
; CHECK-NEXT: sub w10, w1, w0
322-
; CHECK-NEXT: cmp w8, w1, uxth
323-
; CHECK-NEXT: csel w0, w9, w10, hs
319+
; CHECK-NEXT: sub w8, w8, w1, uxth
320+
; CHECK-NEXT: cmp w8, #0
321+
; CHECK-NEXT: cneg w0, w8, mi
324322
; CHECK-NEXT: ret
325323
%cmp = icmp uge i16 %a, %b
326324
%ab = sub i16 %a, %b
@@ -334,7 +332,7 @@ define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
334332
; CHECK: // %bb.0:
335333
; CHECK-NEXT: sub w8, w1, w0
336334
; CHECK-NEXT: subs w9, w0, w1
337-
; CHECK-NEXT: csel w0, w8, w9, lo
335+
; CHECK-NEXT: csel w0, w9, w8, hi
338336
; CHECK-NEXT: ret
339337
%cmp = icmp ult i32 %a, %b
340338
%ab = sub i32 %a, %b

‎llvm/test/CodeGen/AMDGPU/sad.ll

Lines changed: 8 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -258,10 +258,9 @@ define amdgpu_kernel void @v_sad_u32_multi_use_select_pat2(ptr addrspace(1) %out
258258
; GCN-NEXT: s_add_u32 s16, s16, s13
259259
; GCN-NEXT: s_addc_u32 s17, s17, 0
260260
; GCN-NEXT: s_waitcnt lgkmcnt(0)
261-
; GCN-NEXT: s_sub_i32 s3, s0, s1
262-
; GCN-NEXT: s_sub_i32 s6, s1, s0
263-
; GCN-NEXT: s_cmp_gt_u32 s0, s1
264-
; GCN-NEXT: s_cselect_b32 s0, s3, s6
261+
; GCN-NEXT: s_min_u32 s3, s0, s1
262+
; GCN-NEXT: s_max_u32 s0, s0, s1
263+
; GCN-NEXT: s_sub_i32 s0, s0, s3
265264
; GCN-NEXT: v_mov_b32_e32 v0, s4
266265
; GCN-NEXT: v_mov_b32_e32 v2, s0
267266
; GCN-NEXT: s_add_i32 s0, s0, s2
@@ -477,18 +476,14 @@ define amdgpu_kernel void @s_sad_u32_i8_pat2(ptr addrspace(1) %out, i8 zeroext %
477476
; GCN-NEXT: s_load_dword s2, s[6:7], 0x2
478477
; GCN-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
479478
; GCN-NEXT: s_waitcnt lgkmcnt(0)
480-
; GCN-NEXT: s_lshr_b32 s4, s2, 8
481479
; GCN-NEXT: s_and_b32 s3, s2, 0xff
482-
; GCN-NEXT: s_bfe_u32 s5, s2, 0x80008
483-
; GCN-NEXT: s_lshr_b32 s6, s2, 16
484-
; GCN-NEXT: s_sub_i32 s7, s2, s4
485-
; GCN-NEXT: s_sub_i32 s2, s4, s2
486-
; GCN-NEXT: s_cmp_gt_u32 s3, s5
487-
; GCN-NEXT: s_cselect_b32 s2, s7, s2
488-
; GCN-NEXT: s_add_i32 s2, s2, s6
480+
; GCN-NEXT: s_bfe_u32 s4, s2, 0x80008
481+
; GCN-NEXT: s_lshr_b32 s2, s2, 16
482+
; GCN-NEXT: v_mov_b32_e32 v0, s4
483+
; GCN-NEXT: v_mov_b32_e32 v1, s2
484+
; GCN-NEXT: v_sad_u32 v2, s3, v0, v1
489485
; GCN-NEXT: v_mov_b32_e32 v0, s0
490486
; GCN-NEXT: v_mov_b32_e32 v1, s1
491-
; GCN-NEXT: v_mov_b32_e32 v2, s2
492487
; GCN-NEXT: flat_store_byte v[0:1], v2
493488
; GCN-NEXT: s_endpgm
494489
%icmp0 = icmp ugt i8 %a, %b

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