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Add debug flag to I2C unittest
Hide the print statements of the I2C unittest behind debug flags. This debug flag is currently always False. TODO: Expose the debug flag of the I2C unittest
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2 files changed

+29
-23
lines changed

2 files changed

+29
-23
lines changed

‎clash-cores/test/Test/Cores/I2C/Config.hs

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ module Test.Cores.I2C.Config where
44

55
import Clash.Prelude
66
import Clash.Explicit.SimIO
7+
import Control.Monad (when)
78
import Numeric (showHex)
89

910
import Clash.Cores.I2C.ByteMaster (I2COperation(..))
@@ -20,6 +21,7 @@ data ConfS = ConfS { i2cConfStateM :: ConfStateMachine
2021
, i2cConfOp :: Maybe I2COperation
2122
, i2cConfLutIndex :: Index 16
2223
, i2cConfFault :: Bool
24+
, i2cConfDebug :: Bool
2325
}
2426

2527
data ConfI = ConfI { i2cRst :: Bool
@@ -41,6 +43,7 @@ confInit = ConfS { i2cConfStateM = CONFena
4143
, i2cConfOp = Nothing
4244
, i2cConfLutIndex = 0
4345
, i2cConfFault = False
46+
, i2cConfDebug = False
4447
}
4548

4649
configT
@@ -49,7 +52,7 @@ configT
4952
-> SimIO ConfO
5053
configT s0 ConfI{i2cRst=rst,i2cEna=ena,i2cCmdAck=cmdAck,i2cRxAck=rxAck,i2cAl=al} = do
5154
s <- readReg s0
52-
let ConfS confStateM claim op lutIndex fault = s
55+
let ConfS confStateM claim op lutIndex fault debug = s
5356

5457
let i2cSlvAddr = 0x34 :: BitVector 8
5558

@@ -65,32 +68,32 @@ configT s0 ConfI{i2cRst=rst,i2cEna=ena,i2cCmdAck=cmdAck,i2cRxAck=rxAck,i2cAl=al}
6568
, i2cConfClaim = True
6669
}
6770
| done
68-
-> do display "done"
71+
-> do when debug $ display "done"
6972
pure s
7073

7174
CONFaddr
7275
-> do
73-
display $ "CONFaddr, writing: " <> showHex i2cSlvAddr ""
76+
when debug $ display $ "CONFaddr, writing: " <> showHex i2cSlvAddr ""
7477
pure s { i2cConfStateM = CONFaddrAck
7578
, i2cConfOp = Just (WriteData (unpack i2cSlvAddr))
7679
}
7780

7881
CONFaddrAck
7982
| success
8083
-> if rxAck then do
81-
display "CONFaddrAck"
84+
when debug $ display "CONFaddrAck"
8285
pure s { i2cConfStateM = CONFreg
8386
, i2cConfOp = Nothing
8487
}
8588
else do
86-
display "Failure CONFaddr"
89+
when debug $ display "Failure CONFaddr"
8790
pure s { i2cConfStateM = CONFena
8891
, i2cConfFault = True
8992
}
9093

9194
CONFreg
9295
-> do
93-
display $
96+
when debug $ display $
9497
"CONFreg, writing: " <> showHex (fst lutData) "" <>
9598
", lutIndex: " <> show lutIndex
9699
pure s { i2cConfStateM = CONFregAck
@@ -99,37 +102,37 @@ configT s0 ConfI{i2cRst=rst,i2cEna=ena,i2cCmdAck=cmdAck,i2cRxAck=rxAck,i2cAl=al}
99102
CONFregAck
100103
| success
101104
-> if rxAck then do
102-
display "Success CONFreg"
105+
when debug $ display "Success CONFreg"
103106
pure s { i2cConfStateM = CONFdata
104107
, i2cConfOp = Nothing
105108
}
106109
else do
107-
display "Failure CONFreg"
110+
when debug $ display "Failure CONFreg"
108111
pure s { i2cConfStateM = CONFena
109112
, i2cConfFault = True
110113
}
111114

112115
CONFdata
113-
-> do display $ "CONFdata, writing: " <> showHex (snd lutData) ""
116+
-> do when debug $ display $ "CONFdata, writing: " <> showHex (snd lutData) ""
114117
pure s { i2cConfStateM = CONFdataAck
115118
, i2cConfOp = Just (WriteData (unpack (snd lutData)))
116119
}
117120
CONFdataAck
118121
| success
119122
-> if rxAck then do
120-
display "Success CONFdata"
123+
when debug $ display "Success CONFdata"
121124
pure s { i2cConfStateM = CONFstop
122125
, i2cConfOp = Nothing
123126
}
124127
else do
125-
display "Failure CONFdata"
128+
when debug $ display "Failure CONFdata"
126129
pure s { i2cConfStateM = CONFena
127130
, i2cConfFault = True
128131
}
129132

130133
CONFstop
131134
-> do
132-
display "Success CONFstop"
135+
when debug $ display "Success CONFstop"
133136
pure s { i2cConfStateM = CONFena
134137
, i2cConfClaim = False
135138
, i2cConfLutIndex = lutIndex + 1

‎clash-cores/test/Test/Cores/I2C/Slave.hs

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ module Test.Cores.I2C.Slave where
44

55
import Clash.Prelude
66
import Clash.Explicit.SimIO
7+
import Control.Monad (when)
78

89
data ACConfTestS = ACCTS { i2cSlaveRegFile :: Vec 16 (Unsigned 8)
910
, i2cSlaveAddr :: Vec 8 Bit
@@ -13,6 +14,7 @@ data ACConfTestS = ACCTS { i2cSlaveRegFile :: Vec 16 (Unsigned 8)
1314
, i2cSlavePrevSDA :: Bit
1415
, i2cSlaveSdaOut :: Bit
1516
, i2cSlaveRegAddr :: Unsigned 8
17+
, i2cSlaveDebug :: Bool
1618
}
1719

1820
data AudioTestSM = ATidle | ATaddr | ATaddrAck | ATreg | ATregAck | ATval | ATvalAck | ATstop
@@ -30,13 +32,14 @@ i2cSlaveInit = ACCTS { i2cSlaveRegFile = replicate d16 0x0
3032
, i2cSlavePrevSDA = high
3133
, i2cSlaveSdaOut = high
3234
, i2cSlaveRegAddr = 0
35+
, i2cSlaveDebug = False
3336
}
3437

3538
i2cSlaveT :: Reg ACConfTestS -> ACConfTestI -> SimIO ACConfTestO
3639
i2cSlaveT s0 (scl,sda) = do
3740
s <- readReg s0
3841

39-
let ACCTS regFile addr cntr atStateM prevSCL prevSDA sdaOut regAddr = s
42+
let ACCTS regFile addr cntr atStateM prevSCL prevSDA sdaOut regAddr debug = s
4043

4144
let startCondition = (prevSDA == high && sda == low) && scl == high
4245
stopCondition = (prevSDA == low && sda == high) && scl == high
@@ -47,17 +50,17 @@ i2cSlaveT s0 (scl,sda) = do
4750

4851
stateMachine <- case atStateM of
4952
ATidle
50-
| startCondition -> do display "start"
53+
| startCondition -> do when debug $ display "start"
5154
pure s {i2cSlaveAtStateM = ATaddr}
5255
ATaddr
5356
| cntr == 8 -> if validAddr then do
54-
display "valid addr"
57+
when debug $ display "valid addr"
5558
pure s { i2cSlaveAtStateM = ATaddrAck
5659
, i2cSlaveAddr = repeat low
5760
, i2cSlaveCntr = 0
5861
}
5962
else do
60-
display $ "invalid addr: " <> show addr
63+
when debug $ display $ "invalid addr: " <> show addr
6164
pure s { i2cSlaveAtStateM = ATidle
6265
, i2cSlaveAddr = repeat low
6366
, i2cSlaveCntr = 0
@@ -67,20 +70,20 @@ i2cSlaveT s0 (scl,sda) = do
6770
, i2cSlaveSdaOut = high
6871
}
6972
ATaddrAck
70-
| sclRising -> do display "addrAck"
73+
| sclRising -> do when debug $ display "addrAck"
7174
pure s { i2cSlaveAtStateM = ATreg
7275
, i2cSlaveSdaOut = low
7376
}
7477
ATreg
7578
| cntr == 8 -> if validRegAddr then do
76-
display "valid reg addr"
79+
when debug $ display "valid reg addr"
7780
pure s { i2cSlaveAtStateM = ATregAck
7881
, i2cSlaveAddr = repeat low
7982
, i2cSlaveCntr = 0
8083
, i2cSlaveRegAddr = shiftR (bitCoerce addr) 1
8184
}
8285
else do
83-
display $ "invalid reg addr: " <> show addr
86+
when debug $ display $ "invalid reg addr: " <> show addr
8487
pure s { i2cSlaveAtStateM = ATidle
8588
, i2cSlaveAddr = repeat low
8689
, i2cSlaveCntr = 0
@@ -90,12 +93,12 @@ i2cSlaveT s0 (scl,sda) = do
9093
, i2cSlaveSdaOut = high
9194
}
9295
ATregAck
93-
| sclRising -> do display "regAck"
96+
| sclRising -> do when debug $ display "regAck"
9497
pure s { i2cSlaveAtStateM = ATval
9598
, i2cSlaveSdaOut = low
9699
}
97100
ATval
98-
| cntr == 8 -> do display "val"
101+
| cntr == 8 -> do when debug $ display "val"
99102
pure s { i2cSlaveAtStateM = ATvalAck
100103
, i2cSlaveAddr = repeat low
101104
, i2cSlaveCntr = 0
@@ -107,12 +110,12 @@ i2cSlaveT s0 (scl,sda) = do
107110
, i2cSlaveSdaOut = high
108111
}
109112
ATvalAck
110-
| sclRising -> do display "valAck"
113+
| sclRising -> do when debug $ display "valAck"
111114
pure s { i2cSlaveAtStateM = ATstop
112115
, i2cSlaveSdaOut = low
113116
}
114117
ATstop
115-
| stopCondition -> do display "stop"
118+
| stopCondition -> do when debug $ display "stop"
116119
pure s { i2cSlaveAtStateM = ATidle
117120
, i2cSlaveSdaOut = high
118121
}

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