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tests: Fixup files for formatting compatibility
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tests/Main.hs

Lines changed: 38 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -27,8 +27,8 @@ import Test.Tasty.Clash
2727

2828
-- | GHC version as major.minor.patch1. For example: 8.10.2.
2929
ghcVersion3 :: String
30-
ghcVersion3 =
3130
#ifdef __GLASGOW_HASKELL_PATCHLEVEL2__
31+
ghcVersion3 =
3232
let ghc_p1 = __GLASGOW_HASKELL_PATCHLEVEL1__
3333
ghc_p2 = __GLASGOW_HASKELL_PATCHLEVEL2__ in
3434
case ghc_p2 of
@@ -37,10 +37,39 @@ ghcVersion3 =
3737
_ ->
3838
intercalate "." (map show (versionBranch compilerVersion <> [ghc_p1,ghc_p2]))
3939
#else
40+
ghcVersion3 =
4041
let ghc_p1 = __GLASGOW_HASKELL_PATCHLEVEL1__ in
4142
intercalate "." (map show (versionBranch compilerVersion <> [ghc_p1]))
4243
#endif
4344

45+
multipleHiddenEnabled :: Bool
46+
#ifdef CLASH_MULTIPLE_HIDDEN
47+
multipleHiddenEnabled = True
48+
#else
49+
multipleHiddenEnabled = False
50+
#endif
51+
52+
coSimEnabled :: Bool
53+
#ifdef COSIM
54+
coSimEnabled = True
55+
#else
56+
coSimEnabled = False
57+
#endif
58+
59+
ghcVersionGreater94 :: Bool
60+
#if MIN_VERSION_GLASGOW_HASKELL(9,4,0,0)
61+
ghcVersionGreater94 = True
62+
#else
63+
ghcVersionGreater94 = False
64+
#endif
65+
66+
baseVersionGreater414 :: Bool
67+
#if MIN_VERSION_base(4,14,0)
68+
baseVersionGreater414 = True
69+
#else
70+
baseVersionGreater414 = False
71+
#endif
72+
4473
-- Directory clash binary is expected to live in
4574
cabalClashBinDir :: IO String
4675
cabalClashBinDir = makeAbsolute rel_path
@@ -380,9 +409,7 @@ runClashTest = defaultMain $ clashTestRoot
380409
, runTest "DivZero" def
381410
, runTest "LambdaDrop" def{hdlSim=[]}
382411
, runTest "IrrefError" def{hdlSim=[]}
383-
#ifdef CLASH_MULTIPLE_HIDDEN
384-
, runTest "MultipleHidden" def
385-
#endif
412+
, runTestIf multipleHiddenEnabled "MultipleHidden" def
386413
, outputTest "NameInlining" def
387414
, runTest "NameInstance" def{hdlSim=[]}
388415
, outputTest "NameInstance" def
@@ -637,12 +664,10 @@ runClashTest = defaultMain $ clashTestRoot
637664
[ runTest "MAC" def{hdlSim=[]}
638665
, runTest "CBlockRamTest" def{hdlSim=[]}
639666
]
640-
#ifdef COSIM
641667
, clashTestGroup "CoSim"
642-
[ runTest "Multiply" def{hdlTargets=[Verilog]}
643-
, runTest "Register" def{hdlTargets=[Verilog]}
668+
[ runTestIf coSimEnabled "Multiply" def{hdlTargets=[Verilog]}
669+
, runTestIf coSimEnabled "Register" def{hdlTargets=[Verilog]}
644670
]
645-
#endif
646671
, clashTestGroup "CustomReprs"
647672
[ clashTestGroup "RotateC"
648673
[ runTest "RotateC" def
@@ -717,9 +742,7 @@ runClashTest = defaultMain $ clashTestRoot
717742
]
718743
, clashTestGroup "Feedback"
719744
[ runTest "Fib" def
720-
#ifdef CLASH_MULTIPLE_HIDDEN
721-
, runTest "MutuallyRecursive" def
722-
#endif
745+
, runTestIf multipleHiddenEnabled "MutuallyRecursive" def
723746
]
724747
, clashTestGroup "Fixed"
725748
[ runTest "Mixer" def
@@ -808,14 +831,12 @@ runClashTest = defaultMain $ clashTestRoot
808831
, runTest "T2360" def{hdlSim=[],clashFlags=["-fclash-force-undefined=0"]}
809832
, outputTest "T2502" def{hdlTargets=[VHDL]}
810833
, outputTest "T2508" def{hdlTargets=[VHDL]}
811-
#if MIN_VERSION_GLASGOW_HASKELL(9,4,0,0)
812-
, runTest "T2510" def{
834+
, runTestIf ghcVersionGreater94 "T2510" def{
813835
hdlTargets=[VHDL]
814836
, hdlSim=[]
815837
, expectClashFail=Just (TestSpecificExitCode 0, "Warning: primitive T2510.bb isn't marked OPAQUE.")
816838
}
817839
, outputTest "T2510" def{hdlTargets=[VHDL], clashFlags=["-DNOINLINE=OPAQUE"]}
818-
#endif
819840
, outputTest "T2542" def{hdlTargets=[VHDL]}
820841
, runTest "T2593" def{hdlSim=[]}
821842
, runTest "T2623CaseConFVs" def{hdlLoad=[],hdlSim=[],hdlTargets=[VHDL]}
@@ -846,9 +867,7 @@ runClashTest = defaultMain $ clashTestRoot
846867
]
847868
, clashTestGroup "Numbers"
848869
[ runTest "BitInteger" def
849-
#if MIN_VERSION_base(4,14,0)
850-
, runTest "BitReverse" def
851-
#endif
870+
, runTestIf baseVersionGreater414 "BitReverse" def
852871
, runTest "BitsTB" def { buildTargets = BuildSpecific [ "bitsTB1"
853872
, "bitsTB2"
854873
, "bitsTB3"
@@ -950,13 +969,9 @@ runClashTest = defaultMain $ clashTestRoot
950969
[ runTest "Blob" def
951970
]
952971
, runTest "AndEnable" def
953-
#ifdef CLASH_MULTIPLE_HIDDEN
954-
,
955-
-- TODO: Vivado is disabled because it gives different results, see
972+
, -- TODO: Vivado is disabled because it gives different results, see
956973
-- https://github.com/clash-lang/clash-compiler/issues/2267
957-
runTest "AndSpecificEnable" def{hdlSim=hdlSim def \\ [Vivado]}
958-
959-
#endif
974+
runTestIf multipleHiddenEnabled "AndSpecificEnable" def{hdlSim=hdlSim def \\ [Vivado]}
960975
, runTest "Ram" def
961976
, clashTestGroup "Ram"
962977
[ runTest "RMultiTop" def
Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,19 @@
1+
{-# LANGUAGE TemplateHaskell #-}
2+
13
module InputProbesExceeded where
24

3-
import Clash.Prelude
45
import Clash.Cores.Xilinx.VIO
6+
import Clash.Prelude
57

68
import qualified Data.List as L
79

810
type Dom = XilinxSystem
911

10-
inNames = $(listToVecTH (L.map (("probe_in_" <>) . show) [0::Int, 1..256]))
12+
inNames = $(listToVecTH (L.map (("probe_in_" <>) . show) [0 :: Int, 1 .. 256]))
1113
outNames = Nil
1214

1315
topEntity ::
1416
"clk" ::: Clock Dom ->
15-
"in" ::: Signal Dom (Vec 257 Bool) ->
17+
"in" ::: Signal Dom (Vec 257 Bool) ->
1618
"out" ::: Signal Dom ()
1719
topEntity = vioProbe @Dom inNames outNames ()

tests/shouldfail/Cores/Xilinx/VIO/OutputProbesExceeded.hs

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,16 @@
1+
{-# LANGUAGE TemplateHaskell #-}
2+
13
module OutputProbesExceeded where
24

3-
import Clash.Prelude
45
import Clash.Cores.Xilinx.VIO
6+
import Clash.Prelude
57

68
import qualified Data.List as L
79

810
type Dom = XilinxSystem
911

1012
inNames = Nil
11-
outNames = $(listToVecTH (L.map (("probe_out_" <>) . show) [0::Int, 1..256]))
13+
outNames = $(listToVecTH (L.map (("probe_out_" <>) . show) [0 :: Int, 1 .. 256]))
1214

1315
topEntity ::
1416
"clk" ::: Clock Dom ->

tests/shouldwork/Basic/AES.hs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
{-# LANGUAGE TemplateHaskell #-}
2+
13
module AES where
24

35
import Clash.Prelude

tests/shouldwork/Basic/T1591.hs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
{-# LANGUAGE CPP #-}
2+
{-# LANGUAGE TemplateHaskell #-}
23

34
#if __GLASGOW_HASKELL__ >= 810
45
{-# LANGUAGE StandaloneKindSignatures #-}

tests/shouldwork/BitVector/UnpackUndefined.hs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
{-# LANGUAGE MagicHash #-}
2+
13
module UnpackUndefined where
24
import Clash.Prelude
35
import Clash.Sized.Internal.BitVector

tests/shouldwork/BlackBox/LITrendering.hs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
{-# LANGUAGE MagicHash #-}
2+
13
-- Tests that ~LIT's are rendered as bare literals in HDL
24

35
{-# LANGUAGE AllowAmbiguousTypes #-}

tests/shouldwork/Cores/Xilinx/DcFifo/Basic.hs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
{-# LANGUAGE CPP #-}
2+
{-# LANGUAGE MagicHash #-}
23

34
module Basic where
45

tests/shouldwork/Cores/Xilinx/Floating.hs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ Maintainer : QBayLogic B.V. <[email protected]>
66
-}
77

88
{-# LANGUAGE CPP #-}
9+
{-# LANGUAGE TemplateHaskell #-}
910

1011
{-# OPTIONS_GHC -fconstraint-solver-iterations=10 -Wall -Werror #-}
1112

tests/shouldwork/Cores/Xilinx/VIO.hs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
{-# LANGUAGE CPP #-}
22
{-# LANGUAGE OverloadedStrings #-}
3+
{-# LANGUAGE TemplateHaskell #-}
34

45
module VIO where
56

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