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classicrocker883classicrocker883
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Update - Add N32 12864 LCD (#228)
1 parent a4840cd commit 1c8dab4

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8 files changed

+154
-45
lines changed

8 files changed

+154
-45
lines changed

‎Marlin/src/HAL/STM32F1/HAL.cpp‎

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,8 @@ void MarlinHAL::adc_init() {
167167
adc.setContinuous();
168168
adc.startConversion();
169169
}
170-
170+
#elif HAS_N32_CR10
171+
#include "HAL_N32.h"
171172
#endif // !VOXELAB_N32
172173

173174
void MarlinHAL::adc_start(const pin_t pin) {
@@ -199,7 +200,26 @@ void MarlinHAL::adc_start(const pin_t pin) {
199200
_TCASE(POWER_MONITOR_CURRENT, POWER_MONITOR_CURRENT_PIN, POWERMON_CURRENT)
200201
_TCASE(POWER_MONITOR_VOLTAGE, POWER_MONITOR_VOLTAGE_PIN, POWERMON_VOLTAGE)
201202
}
202-
adc_result = (adc_results[(int)pin_index] & 0xFFF) >> (12 - HAL_ADC_RESOLUTION); // shift out unused bits
203+
204+
#if DISABLED(HAS_N32_CR10)
205+
adc_result = (adc_results[(int)pin_index] & 0xFFF) >> (12 - HAL_ADC_RESOLUTION); // shift out unused bits
206+
#else
207+
ADC_Initial(USE_ADC);
208+
209+
switch (pin_index) {
210+
case TEMP_0:
211+
adc_result = ADC_GetData(USE_ADC, ADC2_Channel_02_PA5);
212+
adc_result = ADC_GetData(USE_ADC, ADC2_Channel_02_PA5);
213+
break;
214+
case TEMP_BED:
215+
adc_result = ADC_GetData(USE_ADC, ADC2_Channel_01_PA4);
216+
adc_result = ADC_GetData(USE_ADC, ADC2_Channel_01_PA4);
217+
break;
218+
default:
219+
break;
220+
}
221+
adc_result = (adc_result >> 2) & 0x3FF;
222+
#endif
203223
}
204224

205225
// ------------------------

‎Marlin/src/HAL/STM32F1/HAL.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,9 @@ typedef int8_t pin_t;
108108
// ADC
109109
// ------------------------
110110

111+
#if HAS_N32_CR10
112+
#define ADC_RESOLUTION 10
113+
#endif
111114
#ifdef ADC_RESOLUTION
112115
#define HAL_ADC_RESOLUTION ADC_RESOLUTION
113116
#else

‎Marlin/src/HAL/STM32F1/HAL_N32.cpp‎

Lines changed: 28 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -87,27 +87,31 @@ void ADC_DeInit(ADC_Module* NS_ADCx) {
8787
reg_temp = ADC_RCC_AHBPRST;
8888
reg_temp |= RCC_AHB_PERIPH_ADC1;
8989
ADC_RCC_AHBPRST = reg_temp; // ADC module reunion position
90+
TERN_(HAS_N32_CR10, for(volatile int i=0; i<10; i++) {})
9091
ADC_RCC_AHBPRST = 0x00000000; // ADC module reset and clear
9192
}
9293
else if (NS_ADCx == NS_ADC2) {
9394
/* Enable ADC2 reset state */
9495
reg_temp = ADC_RCC_AHBPRST;
9596
reg_temp |= RCC_AHB_PERIPH_ADC2;
9697
ADC_RCC_AHBPRST = reg_temp; // ADC module reunion position
98+
TERN_(HAS_N32_CR10, for(volatile int i=0; i<10; i++) {})
9799
ADC_RCC_AHBPRST = 0x00000000; // ADC module reset and clear
98100
}
99101
else if (NS_ADCx == NS_ADC3) {
100102
/* Enable ADC2 reset state */
101103
reg_temp = ADC_RCC_AHBPRST;
102104
reg_temp |= RCC_AHB_PERIPH_ADC3;
103105
ADC_RCC_AHBPRST = reg_temp; // ADC module reunion position
106+
TERN_(HAS_N32_CR10, for(volatile int i=0; i<10; i++) {})
104107
ADC_RCC_AHBPRST = 0x00000000; // ADC module reset and clear
105108
}
106109
else if (NS_ADCx == NS_ADC4) {
107110
/* Enable ADC3 reset state */
108111
reg_temp = ADC_RCC_AHBPRST;
109112
reg_temp |= RCC_AHB_PERIPH_ADC4;
110113
ADC_RCC_AHBPRST = reg_temp; // ADC module reunion position
114+
TERN_(HAS_N32_CR10, for(volatile int i=0; i<10; i++) {})
111115
ADC_RCC_AHBPRST = 0x00000000; // ADC module reset and clear
112116
}
113117
}
@@ -399,21 +403,25 @@ void enable_adc_clk(uint8_t cmd) {
399403
void ADC_Initial(ADC_Module* NS_ADCx) {
400404
ADC_InitType ADC_InitStructure;
401405

406+
TERN_(HAS_N32_CR10, ADC_DeInit(NS_ADCx));
407+
402408
/* ADC configuration ------------------------------------------------------*/
403409
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT; // Independent mode
404-
ADC_InitStructure.MultiChEn = 1; // Multi-channel enable
405-
ADC_InitStructure.ContinueConvEn = 1; // Continuous enable
410+
ADC_InitStructure.MultiChEn = TERN(HAS_N32_CR10, 0, 1); // Multi-channel enable
411+
ADC_InitStructure.ContinueConvEn = TERN(HAS_N32_CR10, 0, 1); // Continuous enable
406412
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIGCONV_NONE; // Non-trigger
407413
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R; // Right alignment
408-
ADC_InitStructure.ChsNumber = 2; // Scan channel number
414+
ADC_InitStructure.ChsNumber = TERN(HAS_N32_CR10, 1, 2); // Scan channel number
409415
ADC_Init(NS_ADCx, &ADC_InitStructure);
410416

411-
/* ADC regular channel14 configuration */
412-
ADC_ConfigRegularChannel(NS_ADCx, ADC2_Channel_05_PC4, 2, ADC_SAMP_TIME_55CYCLES5);
413-
ADC_ConfigRegularChannel(NS_ADCx, ADC2_Channel_12_PC5, 1, ADC_SAMP_TIME_55CYCLES5);
417+
#if !HAS_N32_CR10
418+
/* ADC regular channel14 configuration */
419+
ADC_ConfigRegularChannel(NS_ADCx, ADC2_Channel_05_PC4, 2, ADC_SAMP_TIME_55CYCLES5);
420+
ADC_ConfigRegularChannel(NS_ADCx, ADC2_Channel_12_PC5, 1, ADC_SAMP_TIME_55CYCLES5);
414421

415-
/** 使能ADC DMA */
416-
ADC_EnableDMA(NS_ADCx, 1);
422+
/** 使能ADC DMA */
423+
ADC_EnableDMA(NS_ADCx, 1);
424+
#endif
417425

418426
/* Enable ADC */
419427
ADC_Enable(NS_ADCx, 1);
@@ -424,21 +432,28 @@ void ADC_Initial(ADC_Module* NS_ADCx) {
424432
while (ADC_GetCalibrationStatus(NS_ADCx));
425433

426434
/* Start ADC Software Conversion */
427-
ADC_EnableSoftwareStartConv(NS_ADCx, 1);
435+
IF_DISABLED(HAS_N32_CR10, ADC_EnableSoftwareStartConv(NS_ADCx, 1));
428436
}
429437

430438
/**================================================================
431439
* Single independent sampling
432440
================================================================*/
433441
uint16_t ADC_GetData(ADC_Module* NS_ADCx, uint8_t ADC_Channel) {
434442
uint16_t dat;
443+
TERN_(HAS_N32_CR10, uint8_t timeOut);
435444

436445
/** Set channel parameters */
437-
ADC_ConfigRegularChannel(NS_ADCx, ADC_Channel, 1, ADC_SAMP_TIME_239CYCLES5);
446+
ADC_ConfigRegularChannel(NS_ADCx, ADC_Channel, 1, TERN(HAS_N32_CR10, ADC_SAMP_TIME_71CYCLES5, ADC_SAMP_TIME_239CYCLES5));
447+
448+
#if HAS_N32_CR10
449+
ADC_ClearFlag(NS_ADCx, ADC_FLAG_ENDC);
450+
ADC_ClearFlag(NS_ADCx, ADC_FLAG_STR);
451+
#endif
438452

439453
/* Start ADC Software Conversion */
454+
TERN_(HAS_N32_CR10, timeOut = 0xFF);
440455
ADC_EnableSoftwareStartConv(NS_ADCx, 1);
441-
while(ADC_GetFlagStatus(NS_ADCx, ADC_FLAG_ENDC) == 0);
456+
while((ADC_GetFlagStatus(NS_ADCx, ADC_FLAG_ENDC) == 0) TERN_(HAS_N32_CR10, && (timeOut--)));
442457

443458
ADC_ClearFlag(NS_ADCx, ADC_FLAG_ENDC);
444459
ADC_ClearFlag(NS_ADCx, ADC_FLAG_STR);
@@ -630,8 +645,8 @@ void MarlinHAL::adc_init() {
630645
//NS_GPIOC_PL_CFG = reg_temp; // PC4/5 analog input
631646

632647
enable_adc_clk(1); // Make ADC clock
633-
ADC_DMA_init(); // DMA initialization
634-
ADC_Initial(NS_ADC2); // ADC initialization
648+
IF_DISABLED(HAS_N32_CR10, ADC_DMA_init()); // DMA initialization
649+
ADC_Initial(USE_ADC); // ADC initialization
635650

636651
delay(2);
637652
//NS_PINRT("get adc1 = ", adc_results[0], "\r\n");

‎Marlin/src/HAL/STM32F1/fastio.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030

3131
#define READ(IO) (PIN_MAP[IO].gpio_device->regs->IDR & _BV32(PIN_MAP[IO].gpio_bit) ? HIGH : LOW)
3232
#define WRITE(IO,V) (PIN_MAP[IO].gpio_device->regs->BSRR = _BV32(PIN_MAP[IO].gpio_bit) << ((V) ? 0 : 16))
33+
#define U8G_WRITE(IO,V) ((V)?WRITE(IO,0):WRITE(IO,1))
3334
#define TOGGLE(IO) TBI32(PIN_MAP[IO].gpio_device->regs->ODR, PIN_MAP[IO].gpio_bit)
3435

3536
#define _GET_MODE(IO) gpio_get_mode(PIN_MAP[IO].gpio_device, PIN_MAP[IO].gpio_bit)
@@ -38,13 +39,16 @@
3839
#define _SET_OUTPUT_OD(IO) _SET_MODE(IO, GPIO_OUTPUT_OD)
3940

4041
#define OUT_WRITE(IO,V) do{ _SET_OUTPUT(IO); WRITE(IO,V); }while(0)
42+
#define U8G_OUT_WRITE(IO,V) do{ _SET_OUTPUT(IO); U8G_WRITE(IO,V); }while(0)
4143
#define OUT_WRITE_OD(IO,V) do{ _SET_OUTPUT_OD(IO); WRITE(IO,V); }while(0)
44+
#define U8G_OUT_WRITE_OD(IO,V) do{ _SET_OUTPUT_OD(IO); U8G_WRITE(IO,V); }while(0)
4245

4346
#define SET_INPUT(IO) _SET_MODE(IO, GPIO_INPUT_FLOATING)
4447
#define SET_INPUT_PULLUP(IO) _SET_MODE(IO, GPIO_INPUT_PU)
4548
#define SET_INPUT_PULLDOWN(IO) _SET_MODE(IO, GPIO_INPUT_PD)
4649
#define SET_OUTPUT(IO) OUT_WRITE(IO, LOW)
4750
#define SET_OUTPUT_OD(IO) OUT_WRITE_OD(IO, LOW)
51+
#define U8G_SET_OUTPUT(IO) U8G_OUT_WRITE(IO, LOW)
4852
#define SET_PWM(IO) pinMode(IO, PWM) // do{ gpio_set_mode(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_bit, GPIO_AF_OUTPUT_PP); timer_set_mode(PIN_MAP[pin].timer_device, PIN_MAP[pin].timer_channel, TIMER_PWM); }while(0)
4953
#define SET_PWM_OD(IO) pinMode(IO, PWM_OPEN_DRAIN)
5054

‎Marlin/src/inc/Conditionals-2-LCD.h‎

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -284,9 +284,17 @@
284284

285285
#define IS_RRD_FG_SC 1
286286
#define NO_LCD_SDCARD
287-
#define LCD_ST7920_DELAY_1 125
288-
#define LCD_ST7920_DELAY_2 125
289-
#define LCD_ST7920_DELAY_3 125
287+
288+
#ifdef VOXELAB_N32
289+
#define LCD_ST7920_DELAY_1 0
290+
#define LCD_ST7920_DELAY_2 80
291+
#define LCD_ST7920_DELAY_3 450
292+
#define HAS_N32_CR10 1
293+
#else
294+
#define LCD_ST7920_DELAY_1 125
295+
#define LCD_ST7920_DELAY_2 125
296+
#define LCD_ST7920_DELAY_3 125
297+
#endif
290298

291299
#elif ANY(ANET_FULL_GRAPHICS_LCD, CTC_A10S_A13)
292300

‎Marlin/src/lcd/dogm/u8g/ultralcd_st7920_u8glib_rrd_AVR.cpp‎

Lines changed: 22 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -91,11 +91,19 @@
9191
#define ST7920_DAT(V) ((V) & 0x80)
9292
#endif
9393

94-
#define ST7920_SND_BIT(...) do{ \
95-
WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
96-
WRITE(ST7920_DAT_PIN, ST7920_DAT(val)); ST7920_DELAY_2; \
97-
WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
98-
val <<= 1; }while(0);
94+
#if HAS_N32_CR10
95+
#define ST7920_SND_BIT(...) do{ \
96+
U8G_WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
97+
U8G_WRITE(ST7920_DAT_PIN, ST7920_DAT(val)); ST7920_DELAY_2; \
98+
U8G_WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
99+
val <<= 1; }while(0);
100+
#else
101+
#define ST7920_SND_BIT(...) do{ \
102+
WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
103+
WRITE(ST7920_DAT_PIN, ST7920_DAT(val)); ST7920_DELAY_2; \
104+
WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
105+
val <<= 1; }while(0);
106+
#endif
99107

100108
// Optimize this code with -O3
101109
#pragma GCC optimize (3)
@@ -108,9 +116,15 @@ uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
108116
uint8_t i, y;
109117
switch (msg) {
110118
case U8G_DEV_MSG_INIT: {
111-
OUT_WRITE(ST7920_CS_PIN, LOW);
112-
OUT_WRITE(ST7920_DAT_PIN, LOW);
113-
OUT_WRITE(ST7920_CLK_PIN, HIGH);
119+
#if HAS_N32_CR10
120+
U8G_OUT_WRITE(ST7920_CS_PIN, LOW);
121+
U8G_OUT_WRITE(ST7920_DAT_PIN, LOW);
122+
U8G_OUT_WRITE(ST7920_CLK_PIN, HIGH);
123+
#else
124+
OUT_WRITE(ST7920_CS_PIN, LOW);
125+
OUT_WRITE(ST7920_DAT_PIN, LOW);
126+
OUT_WRITE(ST7920_CLK_PIN, HIGH);
127+
#endif
114128

115129
ST7920_CS();
116130
u8g_Delay(120); // Initial delay for boot up

‎Marlin/src/lcd/dogm/u8g/ultralcd_st7920_u8glib_rrd_AVR.h‎

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,13 @@ void ST7920_SWSPI_SND_8BIT(uint8_t val);
4545
#define U8G_DELAY() DELAY_US(10)
4646
#endif
4747

48-
#define ST7920_CS() { WRITE(ST7920_CS_PIN, HIGH); U8G_DELAY(); }
49-
#define ST7920_NCS() { WRITE(ST7920_CS_PIN, LOW); }
48+
#if HAS_N32_CR10
49+
#define ST7920_CS() { U8G_WRITE(ST7920_CS_PIN, HIGH); U8G_DELAY(); }
50+
#define ST7920_NCS() { U8G_WRITE(ST7920_CS_PIN, LOW); }
51+
#else
52+
#define ST7920_CS() { WRITE(ST7920_CS_PIN, HIGH); U8G_DELAY(); }
53+
#define ST7920_NCS() { WRITE(ST7920_CS_PIN, LOW); }
54+
#endif
5055
#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xF8); U8G_DELAY(); }
5156
#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xFA); U8G_DELAY(); }
5257
#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xF0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4U)); U8G_DELAY(); }

‎Marlin/src/pins/stm32f1/pins_CREALITY_V4.h‎

Lines changed: 57 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -82,14 +82,26 @@
8282
//
8383
// Limit Switches
8484
//
85-
#ifndef X_STOP_PIN
86-
#define X_STOP_PIN PA5
87-
#endif
88-
#ifndef Y_STOP_PIN
89-
#define Y_STOP_PIN PA6
90-
#endif
91-
#ifndef Z_STOP_PIN
92-
#define Z_STOP_PIN PA7
85+
#if HAS_N32_CR10
86+
#ifndef X_STOP_PIN
87+
#define X_STOP_PIN PA6
88+
#endif
89+
#ifndef Y_STOP_PIN
90+
#define Y_STOP_PIN PA7
91+
#endif
92+
#ifndef Z_STOP_PIN
93+
#define Z_STOP_PIN PC4
94+
#endif
95+
#else
96+
#ifndef X_STOP_PIN
97+
#define X_STOP_PIN PA5
98+
#endif
99+
#ifndef Y_STOP_PIN
100+
#define Y_STOP_PIN PA6
101+
#endif
102+
#ifndef Z_STOP_PIN
103+
#define Z_STOP_PIN PA7
104+
#endif
93105
#endif
94106

95107
#ifndef Z_MIN_PROBE_PIN
@@ -106,7 +118,7 @@
106118
//
107119
// Filament Runout Sensor
108120
//
109-
#ifndef FIL_RUNOUT_PIN
121+
#if !defined(FIL_RUNOUT_PIN) && !HAS_N32_CR10
110122
#define FIL_RUNOUT_PIN PA4 // "Pulled-high"
111123
#endif
112124

@@ -148,20 +160,34 @@
148160
//
149161
// Temperature Sensors
150162
//
151-
#define TEMP_0_PIN PC5 // TH1
152-
#define TEMP_BED_PIN PC4 // TB1
163+
#if HAS_N32_CR10
164+
#define TEMP_0_PIN PA5 // TH1
165+
#define TEMP_BED_PIN PA4 // TB1
166+
#else
167+
#define TEMP_0_PIN PC5 // TH1
168+
#define TEMP_BED_PIN PC4 // TB1
169+
#endif
153170

154171
//
155172
// Heaters / Fans
156173
//
157174
#ifndef HEATER_0_PIN
158175
#define HEATER_0_PIN PA1 // HEATER1
159176
#endif
160-
#ifndef HEATER_BED_PIN
161-
#define HEATER_BED_PIN PA2 // HOT BED
162-
#endif
163-
#ifndef FAN0_PIN
164-
#define FAN0_PIN PA0 // FAN
177+
#if HAS_N32_CR10
178+
#ifndef HEATER_BED_PIN
179+
#define HEATER_BED_PIN PA0 // HOT BED
180+
#endif
181+
#ifndef FAN0_PIN
182+
#define FAN0_PIN PA2 // FAN
183+
#endif
184+
#else
185+
#ifndef HEATER_BED_PIN
186+
#define HEATER_BED_PIN PA2 // HOT BED
187+
#endif
188+
#ifndef FAN0_PIN
189+
#define FAN0_PIN PA0 // FAN
190+
#endif
165191
#endif
166192
#define FAN_SOFT_PWM_REQUIRED
167193

@@ -247,7 +273,21 @@
247273
#error "Define RET6_12864_LCD or VET6_12864_LCD to select pins for the LCD with the Creality V4 controller."
248274
#endif
249275

250-
#if ENABLED(CR10_STOCKDISPLAY)
276+
#if HAS_N32_CR10
277+
278+
#define LCD_PINS_RS PB12 // EXP3_07_PIN
279+
#define LCD_PINS_EN PB15 // EXP3_08_PIN
280+
#define LCD_PINS_D4 PB13 // EXP3_06_PIN
281+
282+
#define BTN_ENC PB1 // EXP3_02_PIN Z_MIN_PROBE_PIN
283+
#define BTN_EN1 PC6 // EXP3_03_PIN EXP3_01_PIN
284+
#define BTN_EN2 PB14 // EXP3_05_PIN
285+
286+
#ifndef HAS_PIN_27_BOARD
287+
#define BEEPER_PIN PB0 // EXP3_01_PIN SERVO0_PIN
288+
#endif
289+
290+
#elif ENABLED(CR10_STOCKDISPLAY)
251291

252292
#define LCD_PINS_RS EXP3_07_PIN
253293
#define LCD_PINS_EN EXP3_08_PIN

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