cxl/region: Fix decoder interleave programming

djbw · djbw · commit 2901c8bdedca · 2022-08-05T08:41:19.000-07:00
Jonathan notes: "Curiously interleave ways = 1 for the EPs which is obviously wrong" ...while testing the latest CXL development branch on QEMU. It turns out the region creation process failed to program the endpoint decoders. This was missed because the default settings of x1 at 4K intereleave still results in the region appearing to function. Jonathan caught the bug by reverse mapping the translations that need to happen for the QEMU support. Link: https://lore.kernel.org/r/62e95fdf9f6e2_30440294e4@dwillia2-xfh.jf.intel.com.notmuch Fixes: 384e624 ("cxl/region: Attach endpoint decoders") Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/165951146336.967013.11160153960900111443.stgit@dwillia2-xfh.jf.intel.com Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
@@ -1255,6 +1255,9 @@ static int cxl_region_attach(struct cxl_region *cxlr,
 		p->state = CXL_CONFIG_ACTIVE;
 	}
 
+	cxled->cxld.interleave_ways = p->interleave_ways;
+	cxled->cxld.interleave_granularity = p->interleave_granularity;
+
 	return 0;
 
 err_decrement:

Original file line number	Diff line number	Diff line change
`@@ -1255,6 +1255,9 @@ static int cxl_region_attach(struct cxl_region *cxlr,`
`1255`	`1255`	`p->state = CXL_CONFIG_ACTIVE;`
`1256`	`1256`	`}`
`1257`	`1257`
	`1258`	`+ cxled->cxld.interleave_ways = p->interleave_ways;`
	`1259`	`+ cxled->cxld.interleave_granularity = p->interleave_granularity;`
	`1260`	`+`
`1258`	`1261`	`return 0;`
`1259`	`1262`
`1260`	`1263`	`err_decrement:`