@@ -1307,9 +1307,17 @@ static int smu_v13_0_0_populate_umd_state_clk(struct smu_context *smu)
13071307 & dpm_context -> dpm_tables .fclk_table ;
13081308 struct smu_umd_pstate_table * pstate_table =
13091309 & smu -> pstate_table ;
1310+ struct smu_table_context * table_context = & smu -> smu_table ;
1311+ PPTable_t * pptable = table_context -> driver_pptable ;
1312+ DriverReportedClocks_t driver_clocks =
1313+ pptable -> SkuTable .DriverReportedClocks ;
13101314
13111315 pstate_table -> gfxclk_pstate .min = gfx_table -> min ;
1312- pstate_table -> gfxclk_pstate .peak = gfx_table -> max ;
1316+ if (driver_clocks .GameClockAc &&
1317+ (driver_clocks .GameClockAc < gfx_table -> max ))
1318+ pstate_table -> gfxclk_pstate .peak = driver_clocks .GameClockAc ;
1319+ else
1320+ pstate_table -> gfxclk_pstate .peak = gfx_table -> max ;
13131321
13141322 pstate_table -> uclk_pstate .min = mem_table -> min ;
13151323 pstate_table -> uclk_pstate .peak = mem_table -> max ;
@@ -1326,12 +1334,12 @@ static int smu_v13_0_0_populate_umd_state_clk(struct smu_context *smu)
13261334 pstate_table -> fclk_pstate .min = fclk_table -> min ;
13271335 pstate_table -> fclk_pstate .peak = fclk_table -> max ;
13281336
1329- /*
1330- * For now, just use the mininum clock frequency.
1331- * TODO: update them when the real pstate settings available
1332- */
1333- pstate_table -> gfxclk_pstate .standard = gfx_table -> min ;
1334- pstate_table -> uclk_pstate .standard = mem_table -> min ;
1337+ if ( driver_clocks . BaseClockAc &&
1338+ driver_clocks . BaseClockAc < gfx_table -> max )
1339+ pstate_table -> gfxclk_pstate . standard = driver_clocks . BaseClockAc ;
1340+ else
1341+ pstate_table -> gfxclk_pstate .standard = gfx_table -> max ;
1342+ pstate_table -> uclk_pstate .standard = mem_table -> max ;
13351343 pstate_table -> socclk_pstate .standard = soc_table -> min ;
13361344 pstate_table -> vclk_pstate .standard = vclk_table -> min ;
13371345 pstate_table -> dclk_pstate .standard = dclk_table -> min ;
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