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Merge tag 'v6.1-rc7' into iommufd.git for-next
Resolve conflicts in drivers/vfio/vfio_main.c by using the iommfd version. The rc fix was done a different way when iommufd patches reworked this code. Signed-off-by: Jason Gunthorpe <[email protected]>
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.mailmap

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@@ -29,6 +29,7 @@ Alexandre Belloni <[email protected]> <alexandre.belloni@free-electr
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Alexei Starovoitov <[email protected]> <[email protected]>
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Alexei Starovoitov <[email protected]> <[email protected]>
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Alexei Starovoitov <[email protected]> <[email protected]>
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@@ -382,6 +383,7 @@ Santosh Shilimkar <[email protected]>
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Santosh Shilimkar <[email protected]>
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Sarangdhar Joshi <[email protected]>
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Sascha Hauer <[email protected]>
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S.Çağlar Onur <[email protected]>
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Sean Christopherson <[email protected]> <[email protected]>
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@@ -416,6 +418,7 @@ TripleX Chung <[email protected]> <[email protected]>
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Tsuneo Yoshioka <[email protected]>
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Uwe Kleine-König <[email protected]>
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Uwe Kleine-König <[email protected]>
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Uwe Kleine-König <[email protected]>

CREDITS

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S: K1N 6Z9
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S: CANADA
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N: Vivien Didelot
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D: DSA framework and MV88E6XXX driver
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S: Montreal, Quebec, Canada
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N: Jeff Dike
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W: http://user-mode-linux.sourceforge.net
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S: San Jose, CA 95110
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S: USA
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N: Michal Marek
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D: Kbuild Maintainer 2009-2017
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N: Martin Mares
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W: http://www.ucw.cz/~mj/

Documentation/admin-guide/kernel-parameters.txt

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memory, and other data can't be written using
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xmon commands.
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off xmon is disabled.
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amd_pstate= [X86]
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disable
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Do not enable amd_pstate as the default
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scaling driver for the supported processors
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passive
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Use amd_pstate as a scaling driver, driver requests a
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desired performance on this abstract scale and the power
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management firmware translates the requests into actual
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hardware states (core frequency, data fabric and memory
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clocks etc.)

Documentation/admin-guide/pm/amd-pstate.rst

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Kernel Module Options for ``amd-pstate``
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=========================================
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.. _shared_mem:
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``shared_mem``
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Use a module param (shared_mem) to enable related processors manually with
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**amd_pstate.shared_mem=1**.
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Due to the performance issue on the processors with `Shared Memory Support
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<perf_cap_>`_, we disable it presently and will re-enable this by default
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once we address performance issue with this solution.
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To check whether the current processor is using `Full MSR Support <perf_cap_>`_
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or `Shared Memory Support <perf_cap_>`_ : ::
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ray@hr-test1:~$ lscpu | grep cppc
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Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd cppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
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If the CPU flags have ``cppc``, then this processor supports `Full MSR Support
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<perf_cap_>`_. Otherwise, it supports `Shared Memory Support <perf_cap_>`_.
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Passive Mode
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------------
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``amd_pstate=passive``
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It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in the command line.
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In this mode, ``amd_pstate`` driver software specifies a desired QoS target in the CPPC
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performance scale as a relative number. This can be expressed as percentage of nominal
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performance (infrastructure max). Below the nominal sustained performance level,
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desired performance expresses the average performance level of the processor subject
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to the Performance Reduction Tolerance register. Above the nominal performance level,
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processor must provide at least nominal performance requested and go higher if current
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operating conditions allow.
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``cpupower`` tool support for ``amd-pstate``

Documentation/arm64/booting.rst

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- SMCR_EL2.LEN must be initialised to the same value for all CPUs the
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kernel will execute on.
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- HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
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- HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
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- HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
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- HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
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- If EL3 is present:

Documentation/arm64/cpu-feature-registers.rst

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The infrastructure emulates only the following system register space::
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Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7
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Op0=3, Op1=0, CRn=0, CRm=0,2,3,4,5,6,7
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(See Table C5-6 'System instruction encodings for non-Debug System
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register accesses' in ARMv8 ARM DDI 0487A.h, for the list of
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| WFXT | [3-0] | y |
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+------------------------------+---------+---------+
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10) MVFR0_EL1 - AArch32 Media and VFP Feature Register 0
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+------------------------------+---------+---------+
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| Name | bits | visible |
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+------------------------------+---------+---------+
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| FPDP | [11-8] | y |
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+------------------------------+---------+---------+
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11) MVFR1_EL1 - AArch32 Media and VFP Feature Register 1
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+------------------------------+---------+---------+
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| Name | bits | visible |
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+------------------------------+---------+---------+
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| SIMDFMAC | [31-28] | y |
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+------------------------------+---------+---------+
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| SIMDSP | [19-16] | y |
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+------------------------------+---------+---------+
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| SIMDInt | [15-12] | y |
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+------------------------------+---------+---------+
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| SIMDLS | [11-8] | y |
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+------------------------------+---------+---------+
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12) ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5
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+------------------------------+---------+---------+
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| Name | bits | visible |
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+------------------------------+---------+---------+
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| CRC32 | [19-16] | y |
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+------------------------------+---------+---------+
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| SHA2 | [15-12] | y |
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+------------------------------+---------+---------+
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| SHA1 | [11-8] | y |
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+------------------------------+---------+---------+
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| AES | [7-4] | y |
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+------------------------------+---------+---------+
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Appendix I: Example
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-------------------

Documentation/dev-tools/kmsan.rst

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A use of uninitialized value ``v`` is reported by KMSAN in the following cases:
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- in a condition, e.g. ``if (v) { ... }``;
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- in an indexing or pointer dereferencing, e.g. ``array[v]`` or ``*v``;
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Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml

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properties:
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compatible:
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enum:
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- qcom,sfpb-mutex
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- qcom,tcsr-mutex
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oneOf:
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- enum:
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- qcom,sfpb-mutex
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- qcom,tcsr-mutex
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- items:
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- enum:
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- qcom,apq8084-tcsr-mutex
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- qcom,ipq6018-tcsr-mutex
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- qcom,msm8226-tcsr-mutex
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- qcom,msm8994-tcsr-mutex
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- const: qcom,tcsr-mutex
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- items:
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- enum:
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- qcom,msm8974-tcsr-mutex
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- const: qcom,tcsr-mutex
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- const: syscon
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tcsr_mutex: hwlock@1f40000 {
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#hwlock-cells = <1>;
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};
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hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex";
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reg = <0x01f40000 0x40000>;
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#hwlock-cells = <1>;
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};
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Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml

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aspeed,trim-data-valid:
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type: boolean
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description: |
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The ADC reference voltage can be calibrated to obtain the trimming
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data which will be stored in otp. This property informs the driver that
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the data store in the otp is valid.
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Documentation/devicetree/bindings/input/goodix,gt7375p.yaml

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- items:
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- const: goodix,gt7986u
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- const: goodix,gt7375p
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