3838 */
3939#define CHIP_ERASE_2MB_READY_WAIT_JIFFIES (40UL * HZ)
4040
41- #define SPI_NOR_MAX_ADDR_WIDTH 4
41+ #define SPI_NOR_MAX_ADDR_NBYTES 4
4242
4343#define SPI_NOR_SRST_SLEEP_MIN 200
4444#define SPI_NOR_SRST_SLEEP_MAX 400
@@ -198,7 +198,7 @@ static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t from,
198198{
199199 struct spi_mem_op op =
200200 SPI_MEM_OP (SPI_MEM_OP_CMD (nor -> read_opcode , 0 ),
201- SPI_MEM_OP_ADDR (nor -> addr_width , from , 0 ),
201+ SPI_MEM_OP_ADDR (nor -> addr_nbytes , from , 0 ),
202202 SPI_MEM_OP_DUMMY (nor -> read_dummy , 0 ),
203203 SPI_MEM_OP_DATA_IN (len , buf , 0 ));
204204 bool usebouncebuf ;
@@ -262,7 +262,7 @@ static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
262262{
263263 struct spi_mem_op op =
264264 SPI_MEM_OP (SPI_MEM_OP_CMD (nor -> program_opcode , 0 ),
265- SPI_MEM_OP_ADDR (nor -> addr_width , to , 0 ),
265+ SPI_MEM_OP_ADDR (nor -> addr_nbytes , to , 0 ),
266266 SPI_MEM_OP_NO_DUMMY ,
267267 SPI_MEM_OP_DATA_OUT (len , buf , 0 ));
268268 ssize_t nbytes ;
@@ -1113,7 +1113,7 @@ int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
11131113 if (nor -> spimem ) {
11141114 struct spi_mem_op op =
11151115 SPI_NOR_SECTOR_ERASE_OP (nor -> erase_opcode ,
1116- nor -> addr_width , addr );
1116+ nor -> addr_nbytes , addr );
11171117
11181118 spi_nor_spimem_setup_op (nor , & op , nor -> write_proto );
11191119
@@ -1126,13 +1126,13 @@ int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
11261126 * Default implementation, if driver doesn't have a specialized HW
11271127 * control
11281128 */
1129- for (i = nor -> addr_width - 1 ; i >= 0 ; i -- ) {
1129+ for (i = nor -> addr_nbytes - 1 ; i >= 0 ; i -- ) {
11301130 nor -> bouncebuf [i ] = addr & 0xff ;
11311131 addr >>= 8 ;
11321132 }
11331133
11341134 return spi_nor_controller_ops_write_reg (nor , nor -> erase_opcode ,
1135- nor -> bouncebuf , nor -> addr_width );
1135+ nor -> bouncebuf , nor -> addr_nbytes );
11361136}
11371137
11381138/**
@@ -2249,43 +2249,43 @@ static int spi_nor_default_setup(struct spi_nor *nor,
22492249 return 0 ;
22502250}
22512251
2252- static int spi_nor_set_addr_width (struct spi_nor * nor )
2252+ static int spi_nor_set_addr_nbytes (struct spi_nor * nor )
22532253{
2254- if (nor -> addr_width ) {
2254+ if (nor -> addr_nbytes ) {
22552255 /* already configured from SFDP */
22562256 } else if (nor -> read_proto == SNOR_PROTO_8_8_8_DTR ) {
22572257 /*
22582258 * In 8D-8D-8D mode, one byte takes half a cycle to transfer. So
2259- * in this protocol an odd address width cannot be used because
2259+ * in this protocol an odd addr_nbytes cannot be used because
22602260 * then the address phase would only span a cycle and a half.
22612261 * Half a cycle would be left over. We would then have to start
22622262 * the dummy phase in the middle of a cycle and so too the data
22632263 * phase, and we will end the transaction with half a cycle left
22642264 * over.
22652265 *
2266- * Force all 8D-8D-8D flashes to use an address width of 4 to
2266+ * Force all 8D-8D-8D flashes to use an addr_nbytes of 4 to
22672267 * avoid this situation.
22682268 */
2269- nor -> addr_width = 4 ;
2270- } else if (nor -> info -> addr_width ) {
2271- nor -> addr_width = nor -> info -> addr_width ;
2269+ nor -> addr_nbytes = 4 ;
2270+ } else if (nor -> info -> addr_nbytes ) {
2271+ nor -> addr_nbytes = nor -> info -> addr_nbytes ;
22722272 } else {
2273- nor -> addr_width = 3 ;
2273+ nor -> addr_nbytes = 3 ;
22742274 }
22752275
2276- if (nor -> addr_width == 3 && nor -> params -> size > 0x1000000 ) {
2276+ if (nor -> addr_nbytes == 3 && nor -> params -> size > 0x1000000 ) {
22772277 /* enable 4-byte addressing if the device exceeds 16MiB */
2278- nor -> addr_width = 4 ;
2278+ nor -> addr_nbytes = 4 ;
22792279 }
22802280
2281- if (nor -> addr_width > SPI_NOR_MAX_ADDR_WIDTH ) {
2282- dev_dbg (nor -> dev , "address width is too large: %u\n" ,
2283- nor -> addr_width );
2281+ if (nor -> addr_nbytes > SPI_NOR_MAX_ADDR_NBYTES ) {
2282+ dev_dbg (nor -> dev , "The number of address bytes is too large: %u\n" ,
2283+ nor -> addr_nbytes );
22842284 return - EINVAL ;
22852285 }
22862286
22872287 /* Set 4byte opcodes when possible. */
2288- if (nor -> addr_width == 4 && nor -> flags & SNOR_F_4B_OPCODES &&
2288+ if (nor -> addr_nbytes == 4 && nor -> flags & SNOR_F_4B_OPCODES &&
22892289 !(nor -> flags & SNOR_F_HAS_4BAIT ))
22902290 spi_nor_set_4byte_opcodes (nor );
22912291
@@ -2304,7 +2304,7 @@ static int spi_nor_setup(struct spi_nor *nor,
23042304 if (ret )
23052305 return ret ;
23062306
2307- return spi_nor_set_addr_width (nor );
2307+ return spi_nor_set_addr_nbytes (nor );
23082308}
23092309
23102310/**
@@ -2492,7 +2492,7 @@ static void spi_nor_sfdp_init_params_deprecated(struct spi_nor *nor)
24922492
24932493 if (spi_nor_parse_sfdp (nor )) {
24942494 memcpy (nor -> params , & sfdp_params , sizeof (* nor -> params ));
2495- nor -> addr_width = 0 ;
2495+ nor -> addr_nbytes = 0 ;
24962496 nor -> flags &= ~SNOR_F_4B_OPCODES ;
24972497 }
24982498}
@@ -2713,7 +2713,7 @@ static int spi_nor_init(struct spi_nor *nor)
27132713 nor -> flags & SNOR_F_SWP_IS_VOLATILE ))
27142714 spi_nor_try_unlock_all (nor );
27152715
2716- if (nor -> addr_width == 4 &&
2716+ if (nor -> addr_nbytes == 4 &&
27172717 nor -> read_proto != SNOR_PROTO_8_8_8_DTR &&
27182718 !(nor -> flags & SNOR_F_4B_OPCODES )) {
27192719 /*
@@ -2840,7 +2840,7 @@ static void spi_nor_put_device(struct mtd_info *mtd)
28402840void spi_nor_restore (struct spi_nor * nor )
28412841{
28422842 /* restore the addressing mode */
2843- if (nor -> addr_width == 4 && !(nor -> flags & SNOR_F_4B_OPCODES ) &&
2843+ if (nor -> addr_nbytes == 4 && !(nor -> flags & SNOR_F_4B_OPCODES ) &&
28442844 nor -> flags & SNOR_F_BROKEN_RESET )
28452845 nor -> params -> set_4byte_addr_mode (nor , false);
28462846
@@ -2984,7 +2984,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
29842984 * - select op codes for (Fast) Read, Page Program and Sector Erase.
29852985 * - set the number of dummy cycles (mode cycles + wait states).
29862986 * - set the SPI protocols for register and memory accesses.
2987- * - set the address width .
2987+ * - set the number of address bytes .
29882988 */
29892989 ret = spi_nor_setup (nor , hwcaps );
29902990 if (ret )
@@ -3025,7 +3025,7 @@ static int spi_nor_create_read_dirmap(struct spi_nor *nor)
30253025{
30263026 struct spi_mem_dirmap_info info = {
30273027 .op_tmpl = SPI_MEM_OP (SPI_MEM_OP_CMD (nor -> read_opcode , 0 ),
3028- SPI_MEM_OP_ADDR (nor -> addr_width , 0 , 0 ),
3028+ SPI_MEM_OP_ADDR (nor -> addr_nbytes , 0 , 0 ),
30293029 SPI_MEM_OP_DUMMY (nor -> read_dummy , 0 ),
30303030 SPI_MEM_OP_DATA_IN (0 , NULL , 0 )),
30313031 .offset = 0 ,
@@ -3056,7 +3056,7 @@ static int spi_nor_create_write_dirmap(struct spi_nor *nor)
30563056{
30573057 struct spi_mem_dirmap_info info = {
30583058 .op_tmpl = SPI_MEM_OP (SPI_MEM_OP_CMD (nor -> program_opcode , 0 ),
3059- SPI_MEM_OP_ADDR (nor -> addr_width , 0 , 0 ),
3059+ SPI_MEM_OP_ADDR (nor -> addr_nbytes , 0 , 0 ),
30603060 SPI_MEM_OP_NO_DUMMY ,
30613061 SPI_MEM_OP_DATA_OUT (0 , NULL , 0 )),
30623062 .offset = 0 ,
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