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AngeloGioacchino Del Regnolag-linaro
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mfd: mt6397: Add basic support for MT6331+MT6332 PMIC
Add support for the MT6331 PMIC with MT6332 Companion PMIC, found in MT6795 Helio X10 smartphone platforms. This combo has support for multiple devices but, for a start, only the following have been implemented: - Regulators (two instances, one in MT6331, one in MT6332) - RTC (MT6331) - Keys (MT6331) - Interrupts (MT6331 also dispatches MT6332's interrupts) There's more to be implemented, especially for MT6332, which will come at a later stage. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Signed-off-by: Lee Jones <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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drivers/mfd/mt6397-core.c

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,11 +12,13 @@
1212
#include <linux/regmap.h>
1313
#include <linux/mfd/core.h>
1414
#include <linux/mfd/mt6323/core.h>
15+
#include <linux/mfd/mt6331/core.h>
1516
#include <linux/mfd/mt6357/core.h>
1617
#include <linux/mfd/mt6358/core.h>
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#include <linux/mfd/mt6359/core.h>
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#include <linux/mfd/mt6397/core.h>
1920
#include <linux/mfd/mt6323/registers.h>
21+
#include <linux/mfd/mt6331/registers.h>
2022
#include <linux/mfd/mt6357/registers.h>
2123
#include <linux/mfd/mt6358/registers.h>
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#include <linux/mfd/mt6359/registers.h>
@@ -28,6 +30,9 @@
2830
#define MT6357_RTC_BASE 0x0588
2931
#define MT6357_RTC_SIZE 0x3c
3032

33+
#define MT6331_RTC_BASE 0x4000
34+
#define MT6331_RTC_SIZE 0x40
35+
3136
#define MT6358_RTC_BASE 0x0588
3237
#define MT6358_RTC_SIZE 0x3c
3338

@@ -47,6 +52,11 @@ static const struct resource mt6357_rtc_resources[] = {
4752
DEFINE_RES_IRQ(MT6357_IRQ_RTC),
4853
};
4954

55+
static const struct resource mt6331_rtc_resources[] = {
56+
DEFINE_RES_MEM(MT6331_RTC_BASE, MT6331_RTC_SIZE),
57+
DEFINE_RES_IRQ(MT6331_IRQ_STATUS_RTC),
58+
};
59+
5060
static const struct resource mt6358_rtc_resources[] = {
5161
DEFINE_RES_MEM(MT6358_RTC_BASE, MT6358_RTC_SIZE),
5262
DEFINE_RES_IRQ(MT6358_IRQ_RTC),
@@ -83,6 +93,11 @@ static const struct resource mt6357_keys_resources[] = {
8393
DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY_R, "homekey_r"),
8494
};
8595

96+
static const struct resource mt6331_keys_resources[] = {
97+
DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_HOMEKEY, "homekey"),
99+
};
100+
86101
static const struct resource mt6397_keys_resources[] = {
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DEFINE_RES_IRQ_NAMED(MT6397_IRQ_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6397_IRQ_HOMEKEY, "homekey"),
@@ -133,6 +148,27 @@ static const struct mfd_cell mt6357_devs[] = {
133148
},
134149
};
135150

151+
/* MT6331 is always used in combination with MT6332 */
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static const struct mfd_cell mt6331_mt6332_devs[] = {
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{
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.name = "mt6331-rtc",
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.num_resources = ARRAY_SIZE(mt6331_rtc_resources),
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.resources = mt6331_rtc_resources,
157+
.of_compatible = "mediatek,mt6331-rtc",
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}, {
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.name = "mt6331-regulator",
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.of_compatible = "mediatek,mt6331-regulator"
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}, {
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.name = "mt6332-regulator",
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.of_compatible = "mediatek,mt6332-regulator"
164+
}, {
165+
.name = "mtk-pmic-keys",
166+
.num_resources = ARRAY_SIZE(mt6331_keys_resources),
167+
.resources = mt6331_keys_resources,
168+
.of_compatible = "mediatek,mt6331-keys"
169+
},
170+
};
171+
136172
static const struct mfd_cell mt6358_devs[] = {
137173
{
138174
.name = "mt6358-regulator",
@@ -220,6 +256,14 @@ static const struct chip_data mt6357_core = {
220256
.irq_init = mt6358_irq_init,
221257
};
222258

259+
static const struct chip_data mt6331_mt6332_core = {
260+
.cid_addr = MT6331_HWCID,
261+
.cid_shift = 0,
262+
.cells = mt6331_mt6332_devs,
263+
.cell_size = ARRAY_SIZE(mt6331_mt6332_devs),
264+
.irq_init = mt6397_irq_init,
265+
};
266+
223267
static const struct chip_data mt6358_core = {
224268
.cid_addr = MT6358_SWCID,
225269
.cid_shift = 8,
@@ -302,6 +346,9 @@ static const struct of_device_id mt6397_of_match[] = {
302346
{
303347
.compatible = "mediatek,mt6323",
304348
.data = &mt6323_core,
349+
}, {
350+
.compatible = "mediatek,mt6331",
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.data = &mt6331_mt6332_core,
305352
}, {
306353
.compatible = "mediatek,mt6357",
307354
.data = &mt6357_core,

drivers/mfd/mt6397-irq.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,8 @@
1212
#include <linux/suspend.h>
1313
#include <linux/mfd/mt6323/core.h>
1414
#include <linux/mfd/mt6323/registers.h>
15+
#include <linux/mfd/mt6331/core.h>
16+
#include <linux/mfd/mt6331/registers.h>
1517
#include <linux/mfd/mt6397/core.h>
1618
#include <linux/mfd/mt6397/registers.h>
1719

@@ -172,7 +174,12 @@ int mt6397_irq_init(struct mt6397_chip *chip)
172174
chip->int_status[0] = MT6323_INT_STATUS0;
173175
chip->int_status[1] = MT6323_INT_STATUS1;
174176
break;
175-
177+
case MT6331_CHIP_ID:
178+
chip->int_con[0] = MT6331_INT_CON0;
179+
chip->int_con[1] = MT6331_INT_CON1;
180+
chip->int_status[0] = MT6331_INT_STATUS_CON0;
181+
chip->int_status[1] = MT6331_INT_STATUS_CON1;
182+
break;
176183
case MT6391_CHIP_ID:
177184
case MT6397_CHIP_ID:
178185
chip->int_con[0] = MT6397_INT_CON0;

include/linux/mfd/mt6331/core.h

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
/*
3+
* Copyright (c) 2022 AngeloGioacchino Del Regno <[email protected]>
4+
*/
5+
6+
#ifndef __MFD_MT6331_CORE_H__
7+
#define __MFD_MT6331_CORE_H__
8+
9+
enum mt6331_irq_status_numbers {
10+
MT6331_IRQ_STATUS_PWRKEY = 0,
11+
MT6331_IRQ_STATUS_HOMEKEY,
12+
MT6331_IRQ_STATUS_CHRDET,
13+
MT6331_IRQ_STATUS_THR_H,
14+
MT6331_IRQ_STATUS_THR_L,
15+
MT6331_IRQ_STATUS_BAT_H,
16+
MT6331_IRQ_STATUS_BAT_L,
17+
MT6331_IRQ_STATUS_RTC,
18+
MT6331_IRQ_STATUS_AUDIO,
19+
MT6331_IRQ_STATUS_MAD,
20+
MT6331_IRQ_STATUS_ACCDET,
21+
MT6331_IRQ_STATUS_ACCDET_EINT,
22+
MT6331_IRQ_STATUS_ACCDET_NEGV = 12,
23+
MT6331_IRQ_STATUS_VDVFS11_OC = 16,
24+
MT6331_IRQ_STATUS_VDVFS12_OC,
25+
MT6331_IRQ_STATUS_VDVFS13_OC,
26+
MT6331_IRQ_STATUS_VDVFS14_OC,
27+
MT6331_IRQ_STATUS_GPU_OC,
28+
MT6331_IRQ_STATUS_VCORE1_OC,
29+
MT6331_IRQ_STATUS_VCORE2_OC,
30+
MT6331_IRQ_STATUS_VIO18_OC,
31+
MT6331_IRQ_STATUS_LDO_OC,
32+
MT6331_IRQ_STATUS_NR,
33+
};
34+
35+
#define MT6331_IRQ_CON0_BASE MT6331_IRQ_STATUS_PWRKEY
36+
#define MT6331_IRQ_CON0_BITS (MT6331_IRQ_STATUS_ACCDET_NEGV + 1)
37+
#define MT6331_IRQ_CON1_BASE MT6331_IRQ_STATUS_VDVFS11_OC
38+
#define MT6331_IRQ_CON1_BITS (MT6331_IRQ_STATUS_LDO_OC - MT6331_IRQ_STATUS_VDFS11_OC + 1)
39+
40+
#endif /* __MFD_MT6331_CORE_H__ */

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