66 */
77
88#include <linux/acpi.h>
9+ #include <linux/bitfield.h>
910#include <linux/delay.h>
1011#include <linux/err.h>
1112#include <linux/interrupt.h>
6364 */
6465#define MLXBF_I2C_TYU_PLL_OUT_FREQ (400 * 1000 * 1000)
6566/* Reference clock for Bluefield - 156 MHz. */
66- #define MLXBF_I2C_PLL_IN_FREQ (156 * 1000 * 1000)
67+ #define MLXBF_I2C_PLL_IN_FREQ 156250000ULL
6768
6869/* Constant used to determine the PLL frequency. */
69- #define MLNXBF_I2C_COREPLL_CONST 16384
70+ #define MLNXBF_I2C_COREPLL_CONST 16384ULL
71+
72+ #define MLXBF_I2C_FREQUENCY_1GHZ 1000000000ULL
7073
7174/* PLL registers. */
72- #define MLXBF_I2C_CORE_PLL_REG0 0x0
7375#define MLXBF_I2C_CORE_PLL_REG1 0x4
7476#define MLXBF_I2C_CORE_PLL_REG2 0x8
7577
181183#define MLXBF_I2C_COREPLL_FREQ MLXBF_I2C_TYU_PLL_OUT_FREQ
182184
183185/* Core PLL TYU configuration. */
184- #define MLXBF_I2C_COREPLL_CORE_F_TYU_MASK GENMASK(12, 0)
185- #define MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK GENMASK(3, 0)
186- #define MLXBF_I2C_COREPLL_CORE_R_TYU_MASK GENMASK(5, 0)
187-
188- #define MLXBF_I2C_COREPLL_CORE_F_TYU_SHIFT 3
189- #define MLXBF_I2C_COREPLL_CORE_OD_TYU_SHIFT 16
190- #define MLXBF_I2C_COREPLL_CORE_R_TYU_SHIFT 20
186+ #define MLXBF_I2C_COREPLL_CORE_F_TYU_MASK GENMASK(15, 3)
187+ #define MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK GENMASK(19, 16)
188+ #define MLXBF_I2C_COREPLL_CORE_R_TYU_MASK GENMASK(25, 20)
191189
192190/* Core PLL YU configuration. */
193191#define MLXBF_I2C_COREPLL_CORE_F_YU_MASK GENMASK(25, 0)
194192#define MLXBF_I2C_COREPLL_CORE_OD_YU_MASK GENMASK(3, 0)
195- #define MLXBF_I2C_COREPLL_CORE_R_YU_MASK GENMASK(5, 0 )
193+ #define MLXBF_I2C_COREPLL_CORE_R_YU_MASK GENMASK(31, 26 )
196194
197- #define MLXBF_I2C_COREPLL_CORE_F_YU_SHIFT 0
198- #define MLXBF_I2C_COREPLL_CORE_OD_YU_SHIFT 1
199- #define MLXBF_I2C_COREPLL_CORE_R_YU_SHIFT 26
200195
201196/* Core PLL frequency. */
202197static u64 mlxbf_i2c_corepll_frequency ;
@@ -479,8 +474,6 @@ static struct mutex mlxbf_i2c_bus_lock;
479474#define MLXBF_I2C_MASK_8 GENMASK(7, 0)
480475#define MLXBF_I2C_MASK_16 GENMASK(15, 0)
481476
482- #define MLXBF_I2C_FREQUENCY_1GHZ 1000000000
483-
484477/*
485478 * Function to poll a set of bits at a specific address; it checks whether
486479 * the bits are equal to zero when eq_zero is set to 'true', and not equal
@@ -669,7 +662,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
669662 /* Clear status bits. */
670663 writel (0x0 , priv -> smbus -> io + MLXBF_I2C_SMBUS_MASTER_STATUS );
671664 /* Set the cause data. */
672- writel (~0x0 , priv -> smbus -> io + MLXBF_I2C_CAUSE_OR_CLEAR );
665+ writel (~0x0 , priv -> mst_cause -> io + MLXBF_I2C_CAUSE_OR_CLEAR );
673666 /* Zero PEC byte. */
674667 writel (0x0 , priv -> smbus -> io + MLXBF_I2C_SMBUS_MASTER_PEC );
675668 /* Zero byte count. */
@@ -738,6 +731,9 @@ mlxbf_i2c_smbus_start_transaction(struct mlxbf_i2c_priv *priv,
738731 if (flags & MLXBF_I2C_F_WRITE ) {
739732 write_en = 1 ;
740733 write_len += operation -> length ;
734+ if (data_idx + operation -> length >
735+ MLXBF_I2C_MASTER_DATA_DESC_SIZE )
736+ return - ENOBUFS ;
741737 memcpy (data_desc + data_idx ,
742738 operation -> buffer , operation -> length );
743739 data_idx += operation -> length ;
@@ -1407,24 +1403,19 @@ static int mlxbf_i2c_init_master(struct platform_device *pdev,
14071403 return 0 ;
14081404}
14091405
1410- static u64 mlxbf_calculate_freq_from_tyu (struct mlxbf_i2c_resource * corepll_res )
1406+ static u64 mlxbf_i2c_calculate_freq_from_tyu (struct mlxbf_i2c_resource * corepll_res )
14111407{
1412- u64 core_frequency , pad_frequency ;
1408+ u64 core_frequency ;
14131409 u8 core_od , core_r ;
14141410 u32 corepll_val ;
14151411 u16 core_f ;
14161412
1417- pad_frequency = MLXBF_I2C_PLL_IN_FREQ ;
1418-
14191413 corepll_val = readl (corepll_res -> io + MLXBF_I2C_CORE_PLL_REG1 );
14201414
14211415 /* Get Core PLL configuration bits. */
1422- core_f = rol32 (corepll_val , MLXBF_I2C_COREPLL_CORE_F_TYU_SHIFT ) &
1423- MLXBF_I2C_COREPLL_CORE_F_TYU_MASK ;
1424- core_od = rol32 (corepll_val , MLXBF_I2C_COREPLL_CORE_OD_TYU_SHIFT ) &
1425- MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK ;
1426- core_r = rol32 (corepll_val , MLXBF_I2C_COREPLL_CORE_R_TYU_SHIFT ) &
1427- MLXBF_I2C_COREPLL_CORE_R_TYU_MASK ;
1416+ core_f = FIELD_GET (MLXBF_I2C_COREPLL_CORE_F_TYU_MASK , corepll_val );
1417+ core_od = FIELD_GET (MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK , corepll_val );
1418+ core_r = FIELD_GET (MLXBF_I2C_COREPLL_CORE_R_TYU_MASK , corepll_val );
14281419
14291420 /*
14301421 * Compute PLL output frequency as follow:
@@ -1436,31 +1427,26 @@ static u64 mlxbf_calculate_freq_from_tyu(struct mlxbf_i2c_resource *corepll_res)
14361427 * Where PLL_OUT_FREQ and PLL_IN_FREQ refer to CoreFrequency
14371428 * and PadFrequency, respectively.
14381429 */
1439- core_frequency = pad_frequency * (++ core_f );
1430+ core_frequency = MLXBF_I2C_PLL_IN_FREQ * (++ core_f );
14401431 core_frequency /= (++ core_r ) * (++ core_od );
14411432
14421433 return core_frequency ;
14431434}
14441435
1445- static u64 mlxbf_calculate_freq_from_yu (struct mlxbf_i2c_resource * corepll_res )
1436+ static u64 mlxbf_i2c_calculate_freq_from_yu (struct mlxbf_i2c_resource * corepll_res )
14461437{
14471438 u32 corepll_reg1_val , corepll_reg2_val ;
1448- u64 corepll_frequency , pad_frequency ;
1439+ u64 corepll_frequency ;
14491440 u8 core_od , core_r ;
14501441 u32 core_f ;
14511442
1452- pad_frequency = MLXBF_I2C_PLL_IN_FREQ ;
1453-
14541443 corepll_reg1_val = readl (corepll_res -> io + MLXBF_I2C_CORE_PLL_REG1 );
14551444 corepll_reg2_val = readl (corepll_res -> io + MLXBF_I2C_CORE_PLL_REG2 );
14561445
14571446 /* Get Core PLL configuration bits */
1458- core_f = rol32 (corepll_reg1_val , MLXBF_I2C_COREPLL_CORE_F_YU_SHIFT ) &
1459- MLXBF_I2C_COREPLL_CORE_F_YU_MASK ;
1460- core_r = rol32 (corepll_reg1_val , MLXBF_I2C_COREPLL_CORE_R_YU_SHIFT ) &
1461- MLXBF_I2C_COREPLL_CORE_R_YU_MASK ;
1462- core_od = rol32 (corepll_reg2_val , MLXBF_I2C_COREPLL_CORE_OD_YU_SHIFT ) &
1463- MLXBF_I2C_COREPLL_CORE_OD_YU_MASK ;
1447+ core_f = FIELD_GET (MLXBF_I2C_COREPLL_CORE_F_YU_MASK , corepll_reg1_val );
1448+ core_r = FIELD_GET (MLXBF_I2C_COREPLL_CORE_R_YU_MASK , corepll_reg1_val );
1449+ core_od = FIELD_GET (MLXBF_I2C_COREPLL_CORE_OD_YU_MASK , corepll_reg2_val );
14641450
14651451 /*
14661452 * Compute PLL output frequency as follow:
@@ -1472,7 +1458,7 @@ static u64 mlxbf_calculate_freq_from_yu(struct mlxbf_i2c_resource *corepll_res)
14721458 * Where PLL_OUT_FREQ and PLL_IN_FREQ refer to CoreFrequency
14731459 * and PadFrequency, respectively.
14741460 */
1475- corepll_frequency = (pad_frequency * core_f ) / MLNXBF_I2C_COREPLL_CONST ;
1461+ corepll_frequency = (MLXBF_I2C_PLL_IN_FREQ * core_f ) / MLNXBF_I2C_COREPLL_CONST ;
14761462 corepll_frequency /= (++ core_r ) * (++ core_od );
14771463
14781464 return corepll_frequency ;
@@ -2180,14 +2166,14 @@ static struct mlxbf_i2c_chip_info mlxbf_i2c_chip[] = {
21802166 [1 ] = & mlxbf_i2c_corepll_res [MLXBF_I2C_CHIP_TYPE_1 ],
21812167 [2 ] = & mlxbf_i2c_gpio_res [MLXBF_I2C_CHIP_TYPE_1 ]
21822168 },
2183- .calculate_freq = mlxbf_calculate_freq_from_tyu
2169+ .calculate_freq = mlxbf_i2c_calculate_freq_from_tyu
21842170 },
21852171 [MLXBF_I2C_CHIP_TYPE_2 ] = {
21862172 .type = MLXBF_I2C_CHIP_TYPE_2 ,
21872173 .shared_res = {
21882174 [0 ] = & mlxbf_i2c_corepll_res [MLXBF_I2C_CHIP_TYPE_2 ]
21892175 },
2190- .calculate_freq = mlxbf_calculate_freq_from_yu
2176+ .calculate_freq = mlxbf_i2c_calculate_freq_from_yu
21912177 }
21922178};
21932179
0 commit comments