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airliedairlied
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Merge tag 'amd-drm-next-6.2-2022-11-25' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.2-2022-11-25: amdgpu: - Old GCC fix - GFX11 fixes - PSP suspend/resume fix - PCI ref count fix - DC KASAN fix - DCN 3.2.x fixes - Dell platform suspend/resume fixes - DCN 3.1.4 fixes - RAS fixes - SMU 13.x fixes - Flex array changes - VCN 4.0 RAS updates - Add missing licsense to some files - Documentation updates - SR-IOV fixes - DP MST DSC fix amdkfd: - Fix topology locking in error case Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 02339a8 + 10d2d1f commit f513a19

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65 files changed

+896
-216
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -327,7 +327,6 @@ static void amdgpu_connector_free_edid(struct drm_connector *connector)
327327

328328
kfree(amdgpu_connector->edid);
329329
amdgpu_connector->edid = NULL;
330-
drm_connector_update_edid_property(connector, NULL);
331330
}
332331

333332
static int amdgpu_connector_ddc_get_modes(struct drm_connector *connector)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 16 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4181,34 +4181,35 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
41814181

41824182
r = amdgpu_device_ip_resume(adev);
41834183

4184-
/* no matter what r is, always need to properly release full GPU */
4185-
if (amdgpu_sriov_vf(adev)) {
4186-
amdgpu_virt_init_data_exchange(adev);
4187-
amdgpu_virt_release_full_gpu(adev, true);
4188-
}
4189-
41904184
if (r) {
41914185
dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r);
4192-
return r;
4186+
goto exit;
41934187
}
41944188
amdgpu_fence_driver_hw_init(adev);
41954189

41964190
r = amdgpu_device_ip_late_init(adev);
41974191
if (r)
4198-
return r;
4192+
goto exit;
41994193

42004194
queue_delayed_work(system_wq, &adev->delayed_init_work,
42014195
msecs_to_jiffies(AMDGPU_RESUME_MS));
42024196

42034197
if (!adev->in_s0ix) {
42044198
r = amdgpu_amdkfd_resume(adev, adev->in_runpm);
42054199
if (r)
4206-
return r;
4200+
goto exit;
42074201
}
42084202

4203+
exit:
4204+
if (amdgpu_sriov_vf(adev)) {
4205+
amdgpu_virt_init_data_exchange(adev);
4206+
amdgpu_virt_release_full_gpu(adev, true);
4207+
}
4208+
4209+
if (r)
4210+
return r;
4211+
42094212
/* Make sure IB tests flushed */
4210-
if (amdgpu_sriov_vf(adev))
4211-
amdgpu_irq_gpu_reset_resume_helper(adev);
42124213
flush_delayed_work(&adev->delayed_init_work);
42134214

42144215
if (adev->in_s0ix) {
@@ -5045,6 +5046,8 @@ static void amdgpu_device_resume_display_audio(struct amdgpu_device *adev)
50455046
pm_runtime_enable(&(p->dev));
50465047
pm_runtime_resume(&(p->dev));
50475048
}
5049+
5050+
pci_dev_put(p);
50485051
}
50495052

50505053
static int amdgpu_device_suspend_display_audio(struct amdgpu_device *adev)
@@ -5083,13 +5086,15 @@ static int amdgpu_device_suspend_display_audio(struct amdgpu_device *adev)
50835086

50845087
if (expires < ktime_get_mono_fast_ns()) {
50855088
dev_warn(adev->dev, "failed to suspend display audio\n");
5089+
pci_dev_put(p);
50865090
/* TODO: abort the succeeding gpu reset? */
50875091
return -ETIMEDOUT;
50885092
}
50895093
}
50905094

50915095
pm_runtime_disable(&(p->dev));
50925096

5097+
pci_dev_put(p);
50935098
return 0;
50945099
}
50955100

‎drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1702,11 +1702,13 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
17021702
return 0;
17031703
}
17041704

1705+
#if defined(CONFIG_DRM_AMD_DC)
17051706
static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev)
17061707
{
17071708
amdgpu_device_set_sriov_virtual_display(adev);
17081709
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
17091710
}
1711+
#endif
17101712

17111713
static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
17121714
{

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -238,8 +238,7 @@ module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
238238

239239
/**
240240
* DOC: gttsize (int)
241-
* Restrict the size of GTT domain in MiB for testing. The default is -1 (It's VRAM size if 3GB < VRAM < 3/4 RAM,
242-
* otherwise 3/4 RAM size).
241+
* Restrict the size of GTT domain in MiB for testing. The default is -1 (Use 1/2 RAM, minimum value is 3GB).
243242
*/
244243
MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");
245244
module_param_named(gttsize, amdgpu_gtt_size, int, 0600);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -479,6 +479,12 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev)
479479
unsigned i;
480480
unsigned vmhub, inv_eng;
481481

482+
if (adev->enable_mes) {
483+
/* reserve engine 5 for firmware */
484+
for (vmhub = 0; vmhub < AMDGPU_MAX_VMHUBS; vmhub++)
485+
vm_inv_engs[vmhub] &= ~(1 << 5);
486+
}
487+
482488
for (i = 0; i < adev->num_rings; ++i) {
483489
ring = adev->rings[i];
484490
vmhub = ring->funcs->vmhub;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_job.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,12 @@ static void amdgpu_job_free_cb(struct drm_sched_job *s_job)
174174
drm_sched_job_cleanup(s_job);
175175

176176
amdgpu_sync_free(&job->explicit_sync);
177-
dma_fence_put(&job->hw_fence);
177+
178+
/* only put the hw fence if has embedded fence */
179+
if (!job->hw_fence.ops)
180+
kfree(job);
181+
else
182+
dma_fence_put(&job->hw_fence);
178183
}
179184

180185
void amdgpu_job_set_gang_leader(struct amdgpu_job *job,

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -198,6 +198,7 @@ void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
198198
{
199199
amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr,
200200
&mem_ctx->shared_buf);
201+
mem_ctx->shared_bo = NULL;
201202
}
202203

203204
static void psp_free_shared_bufs(struct psp_context *psp)
@@ -208,6 +209,7 @@ static void psp_free_shared_bufs(struct psp_context *psp)
208209
/* free TMR memory buffer */
209210
pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
210211
amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
212+
psp->tmr_bo = NULL;
211213

212214
/* free xgmi shared memory */
213215
psp_ta_free_shared_buf(&psp->xgmi_context.context.mem_context);
@@ -769,7 +771,7 @@ static int psp_load_toc(struct psp_context *psp,
769771
/* Set up Trusted Memory Region */
770772
static int psp_tmr_init(struct psp_context *psp)
771773
{
772-
int ret;
774+
int ret = 0;
773775
int tmr_size;
774776
void *tmr_buf;
775777
void **pptr;
@@ -796,10 +798,12 @@ static int psp_tmr_init(struct psp_context *psp)
796798
}
797799
}
798800

799-
pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
800-
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
801-
AMDGPU_GEM_DOMAIN_VRAM,
802-
&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
801+
if (!psp->tmr_bo) {
802+
pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
803+
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
804+
AMDGPU_GEM_DOMAIN_VRAM,
805+
&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
806+
}
803807

804808
return ret;
805809
}
@@ -2727,8 +2731,6 @@ static int psp_suspend(void *handle)
27272731
}
27282732

27292733
out:
2730-
psp_free_shared_bufs(psp);
2731-
27322734
return ret;
27332735
}
27342736

‎drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,6 @@
3232

3333
#define RB_ENABLED (1 << 0)
3434
#define RB4_ENABLED (1 << 1)
35-
#define MMSCH_DOORBELL_OFFSET 0x8
3635

3736
#define MMSCH_VF_ENGINE_STATUS__PASS 0x1
3837

‎drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -770,6 +770,33 @@ static void vcn_v2_5_enable_clock_gating(struct amdgpu_device *adev)
770770
}
771771
}
772772

773+
static void vcn_v2_6_enable_ras(struct amdgpu_device *adev, int inst_idx,
774+
bool indirect)
775+
{
776+
uint32_t tmp;
777+
778+
if (adev->ip_versions[UVD_HWIP][0] != IP_VERSION(2, 6, 0))
779+
return;
780+
781+
tmp = VCN_RAS_CNTL__VCPU_VCODEC_REARM_MASK |
782+
VCN_RAS_CNTL__VCPU_VCODEC_IH_EN_MASK |
783+
VCN_RAS_CNTL__VCPU_VCODEC_PMI_EN_MASK |
784+
VCN_RAS_CNTL__VCPU_VCODEC_STALL_EN_MASK;
785+
WREG32_SOC15_DPG_MODE(inst_idx,
786+
SOC15_DPG_MODE_OFFSET(VCN, 0, mmVCN_RAS_CNTL),
787+
tmp, 0, indirect);
788+
789+
tmp = UVD_VCPU_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK;
790+
WREG32_SOC15_DPG_MODE(inst_idx,
791+
SOC15_DPG_MODE_OFFSET(VCN, 0, mmUVD_VCPU_INT_EN),
792+
tmp, 0, indirect);
793+
794+
tmp = UVD_SYS_INT_EN__RASCNTL_VCPU_VCODEC_EN_MASK;
795+
WREG32_SOC15_DPG_MODE(inst_idx,
796+
SOC15_DPG_MODE_OFFSET(VCN, 0, mmUVD_SYS_INT_EN),
797+
tmp, 0, indirect);
798+
}
799+
773800
static int vcn_v2_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect)
774801
{
775802
volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
@@ -849,6 +876,8 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, boo
849876
WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(
850877
VCN, 0, mmUVD_LMI_CTRL2), 0, 0, indirect);
851878

879+
vcn_v2_6_enable_ras(adev, inst_idx, indirect);
880+
852881
/* unblock VCPU register access */
853882
WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(
854883
VCN, 0, mmUVD_RB_ARB_CTRL), 0, 0, indirect);

‎drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,6 @@ static int vcn_v4_0_sw_init(void *handle)
103103
struct amdgpu_ring *ring;
104104
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
105105
int i, r;
106-
int vcn_doorbell_index = 0;
107106

108107
r = amdgpu_vcn_sw_init(adev);
109108
if (r)
@@ -115,12 +114,6 @@ static int vcn_v4_0_sw_init(void *handle)
115114
if (r)
116115
return r;
117116

118-
if (amdgpu_sriov_vf(adev)) {
119-
vcn_doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1 - MMSCH_DOORBELL_OFFSET;
120-
/* get DWORD offset */
121-
vcn_doorbell_index = vcn_doorbell_index << 1;
122-
}
123-
124117
for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
125118
volatile struct amdgpu_vcn4_fw_shared *fw_shared;
126119

@@ -144,7 +137,7 @@ static int vcn_v4_0_sw_init(void *handle)
144137
ring = &adev->vcn.inst[i].ring_enc[0];
145138
ring->use_doorbell = true;
146139
if (amdgpu_sriov_vf(adev))
147-
ring->doorbell_index = vcn_doorbell_index + i * (adev->vcn.num_enc_rings + 1) + 1;
140+
ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + i * (adev->vcn.num_enc_rings + 1) + 1;
148141
else
149142
ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + 8 * i;
150143

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