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Merge tag 'timers-core-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner: "Updates for the time(r) subsystem: Core: - Make the clocksource watchdog more robust by better validation checks of the measurement. Drivers: - New drivers for MStar and SSD20xd SOCs - The usual cleanups and improvements all over the place" * tag 'timers-core-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dt-bindings: timer: Add Mstar MSC313e timer devicetree bindings documentation clocksource/drivers/msc313e: Add support for ssd20xd-based platforms clocksource/drivers: Add MStar MSC313e timer support clocksource/drivers/pistachio: Fix -Wunused-but-set-variable warning clocksource/drivers/timer-imx-sysctr: Set cpumask to cpu_possible_mask clocksource/drivers/imx-sysctr: Mark two variable with __ro_after_init clocksource/drivers/renesas,ostm: Make RENESAS_OSTM symbol visible clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2L OSTM clocksource/drivers/exynos_mct: Fix silly typo resulting in checkpatch warning clocksource: Reduce the default clocksource_watchdog() retries to 2 clocksource: Avoid accidental unstable marking of clocksources dt-bindings: timer: tpm-timer: Add imx8ulp compatible string reset: Add of_reset_control_get_optional_exclusive() clocksource/drivers/exynos_mct: Refactor resources allocation dt-bindings: timer: remove rockchip,rk3066-timer compatible string from rockchip,rk-timer.yaml dt-bindings: timer: cadence_ttc: Add power-domains
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‎Documentation/admin-guide/kernel-parameters.txt‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -612,8 +612,8 @@
612612
clocksource.max_cswd_read_retries= [KNL]
613613
Number of clocksource_watchdog() retries due to
614614
external delays before the clock will be marked
615-
unstable. Defaults to three retries, that is,
616-
four attempts to read the clock under test.
615+
unstable. Defaults to two retries, that is,
616+
three attempts to read the clock under test.
617617

618618
clocksource.verify_n_cpus= [KNL]
619619
Limit the number of CPUs checked for clocksources

‎Documentation/devicetree/bindings/timer/cdns,ttc.yaml‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,9 @@ properties:
2525
clocks:
2626
maxItems: 1
2727

28+
power-domains:
29+
maxItems: 1
30+
2831
timer-width:
2932
$ref: "/schemas/types.yaml#/definitions/uint32"
3033
description: |

‎Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/timer/mstar,msc313e-timer.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Mstar MSC313e Timer Device Tree Bindings
8+
9+
maintainers:
10+
- Daniel Palmer <[email protected]>
11+
- Romain Perier <[email protected]>
12+
13+
properties:
14+
compatible:
15+
enum:
16+
- mstar,msc313e-timer
17+
- sstar,ssd20xd-timer
18+
19+
reg:
20+
maxItems: 1
21+
22+
interrupts:
23+
maxItems: 1
24+
25+
clocks:
26+
maxItems: 1
27+
28+
required:
29+
- compatible
30+
- reg
31+
- interrupts
32+
- clocks
33+
34+
additionalProperties: false
35+
36+
examples:
37+
- |
38+
#include <dt-bindings/interrupt-controller/arm-gic.h>
39+
40+
timer@6040 {
41+
compatible = "mstar,msc313e-timer";
42+
reg = <0x6040 0x40>;
43+
clocks = <&xtal_div2>;
44+
interrupts-extended = <&intc_fiq GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
45+
};
46+
...

‎Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,11 @@ description: |
1919
2020
properties:
2121
compatible:
22-
const: fsl,imx7ulp-tpm
22+
oneOf:
23+
- const: fsl,imx7ulp-tpm
24+
- items:
25+
- const: fsl,imx8ulp-tpm
26+
- const: fsl,imx7ulp-tpm
2327

2428
reg:
2529
maxItems: 1

‎Documentation/devicetree/bindings/timer/renesas,ostm.yaml‎

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,9 +21,10 @@ properties:
2121
compatible:
2222
items:
2323
- enum:
24-
- renesas,r7s72100-ostm # RZ/A1H
25-
- renesas,r7s9210-ostm # RZ/A2M
26-
- const: renesas,ostm # Generic
24+
- renesas,r7s72100-ostm # RZ/A1H
25+
- renesas,r7s9210-ostm # RZ/A2M
26+
- renesas,r9a07g044-ostm # RZ/G2{L,LC}
27+
- const: renesas,ostm # Generic
2728

2829
reg:
2930
maxItems: 1
@@ -37,13 +38,26 @@ properties:
3738
power-domains:
3839
maxItems: 1
3940

41+
resets:
42+
maxItems: 1
43+
4044
required:
4145
- compatible
4246
- reg
4347
- interrupts
4448
- clocks
4549
- power-domains
4650

51+
if:
52+
properties:
53+
compatible:
54+
contains:
55+
enum:
56+
- renesas,r9a07g044-ostm
57+
then:
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required:
59+
- resets
60+
4761
additionalProperties: false
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examples:

‎Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,6 @@ properties:
1818
- enum:
1919
- rockchip,rv1108-timer
2020
- rockchip,rk3036-timer
21-
- rockchip,rk3066-timer
2221
- rockchip,rk3188-timer
2322
- rockchip,rk3228-timer
2423
- rockchip,rk3229-timer

‎MAINTAINERS‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2304,6 +2304,7 @@ F: Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml
23042304
F: arch/arm/boot/dts/mstar-*
23052305
F: arch/arm/mach-mstar/
23062306
F: drivers/clk/mstar/
2307+
F: drivers/clocksource/timer-msc313e.c
23072308
F: drivers/gpio/gpio-msc313.c
23082309
F: drivers/rtc/rtc-msc313.c
23092310
F: drivers/watchdog/msc313e_wdt.c

‎drivers/clocksource/Kconfig‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -510,7 +510,8 @@ config SH_TIMER_MTU2
510510
This hardware comes with 16-bit timer registers.
511511

512512
config RENESAS_OSTM
513-
bool "Renesas OSTM timer driver" if COMPILE_TEST
513+
bool "Renesas OSTM timer driver"
514+
depends on ARCH_RENESAS || COMPILE_TEST
514515
select CLKSRC_MMIO
515516
select TIMER_OF
516517
help
@@ -671,6 +672,15 @@ config MILBEAUT_TIMER
671672
help
672673
Enables the support for Milbeaut timer driver.
673674

675+
config MSC313E_TIMER
676+
bool "MSC313E timer driver" if COMPILE_TEST
677+
select TIMER_OF
678+
select CLKSRC_MMIO
679+
help
680+
Enables support for the MStar MSC313E timer driver.
681+
This provides access to multiple interrupt generating
682+
programmable 32-bit free running incrementing counters.
683+
674684
config INGENIC_TIMER
675685
bool "Clocksource/timer using the TCU in Ingenic JZ SoCs"
676686
default MACH_INGENIC

‎drivers/clocksource/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,3 +88,4 @@ obj-$(CONFIG_CSKY_MP_TIMER) += timer-mp-csky.o
8888
obj-$(CONFIG_GX6605S_TIMER) += timer-gx6605s.o
8989
obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o
9090
obj-$(CONFIG_MICROCHIP_PIT64B) += timer-microchip-pit64b.o
91+
obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o

‎drivers/clocksource/exynos_mct.c‎

Lines changed: 31 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -467,7 +467,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu)
467467
evt->tick_resume = set_state_shutdown;
468468
evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
469469
CLOCK_EVT_FEAT_PERCPU;
470-
evt->rating = MCT_CLKEVENTS_RATING,
470+
evt->rating = MCT_CLKEVENTS_RATING;
471471

472472
exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
473473

@@ -504,11 +504,14 @@ static int exynos4_mct_dying_cpu(unsigned int cpu)
504504
return 0;
505505
}
506506

507-
static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base)
507+
static int __init exynos4_timer_resources(struct device_node *np)
508508
{
509-
int err, cpu;
510509
struct clk *mct_clk, *tick_clk;
511510

511+
reg_base = of_iomap(np, 0);
512+
if (!reg_base)
513+
panic("%s: unable to ioremap mct address space\n", __func__);
514+
512515
tick_clk = of_clk_get_by_name(np, "fin_pll");
513516
if (IS_ERR(tick_clk))
514517
panic("%s: unable to determine tick clock rate\n", __func__);
@@ -519,9 +522,27 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *
519522
panic("%s: unable to retrieve mct clock instance\n", __func__);
520523
clk_prepare_enable(mct_clk);
521524

522-
reg_base = base;
523-
if (!reg_base)
524-
panic("%s: unable to ioremap mct address space\n", __func__);
525+
return 0;
526+
}
527+
528+
static int __init exynos4_timer_interrupts(struct device_node *np,
529+
unsigned int int_type)
530+
{
531+
int nr_irqs, i, err, cpu;
532+
533+
mct_int_type = int_type;
534+
535+
/* This driver uses only one global timer interrupt */
536+
mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
537+
538+
/*
539+
* Find out the number of local irqs specified. The local
540+
* timer irqs are specified after the four global timer
541+
* irqs are specified.
542+
*/
543+
nr_irqs = of_irq_count(np);
544+
for (i = MCT_L0_IRQ; i < nr_irqs; i++)
545+
mct_irqs[i] = irq_of_parse_and_map(np, i);
525546

526547
if (mct_int_type == MCT_INT_PPI) {
527548

@@ -581,24 +602,13 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *
581602

582603
static int __init mct_init_dt(struct device_node *np, unsigned int int_type)
583604
{
584-
u32 nr_irqs, i;
585605
int ret;
586606

587-
mct_int_type = int_type;
588-
589-
/* This driver uses only one global timer interrupt */
590-
mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
591-
592-
/*
593-
* Find out the number of local irqs specified. The local
594-
* timer irqs are specified after the four global timer
595-
* irqs are specified.
596-
*/
597-
nr_irqs = of_irq_count(np);
598-
for (i = MCT_L0_IRQ; i < nr_irqs; i++)
599-
mct_irqs[i] = irq_of_parse_and_map(np, i);
607+
ret = exynos4_timer_resources(np);
608+
if (ret)
609+
return ret;
600610

601-
ret = exynos4_timer_resources(np, of_iomap(np, 0));
611+
ret = exynos4_timer_interrupts(np, int_type);
602612
if (ret)
603613
return ret;
604614

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