Merge pull request #65 from cms-l1-globaltrigger/dev_v1.32.1

merge dev_v1.32.1 to master

Author: herbberg

CHANGELOG.md

@@ -4,6 +4,17 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
+## [v1.32.1] - 2025-05-26
+### Comment
+
+- updated constraints_fixed_cells.tcl
+- bug fixed in gtl_fdl_wrapper_tpl_questa.do
+### Changed
+- ucf file:
+  - ../ucf/constraints_fixed_cells.tcl
+- sim file:
+  - ../scripts/templates/gtl_fdl_wrapper_tpl_questa.do
+
 ## [v1.32.0] - 2025-05-13
 ### Comment
 

README.md

@@ -24,7 +24,7 @@ Current versions:
 
 | entity | version |
 |:-:|:-:|
-| uGT FW | v1.32.0 |
+| uGT FW | v1.32.1 |
 | framework | v1.4.2 |
 | gt logic | v1.25.0 |
 | final decision logic | v1.4.1 |

firmware/hdl/packages/gt_mp7_core_pkg.vhd

@@ -4,14 +4,15 @@
 -- actual versions:
 -- use "FRAME_VERSION" as mp7_ugt release fw version (used for tag name).
 
--- mp7_ugt (=FRAME_VERSION): v1.32.0
+-- mp7_ugt (=FRAME_VERSION): v1.32.1
 
 -- use "GT_VERSION" as mp7_ugt release fw version (used for tag name).
--- gt: v1.32.0
+-- gt: v1.32.1
 -- frame: v1.4.2 (see frame.vhd)
 -- gtl: v1.25.0 (see gtl_module_tpl.vhd)
 -- fdl: v1.4.1 (see fdl_module.vhd)
 
+-- HB 2024-09-04: v1.32.1 - Updated constraints_fixed_cells.tcl.
 -- HB 2024-09-04: v1.30.0 - Added vivado_fix_cells_tpl.tcl and constraints_fixed_cells.tcl to ../scripts.
 -- HB 2023-04-08: v1.22.2 - Changed in scripts/mp7_patch.py (for area_constraints.tcl).
 -- HB 2023-04-07: v1.22.1 - Used Tx links 28-31 for scouting (frame/output_mux.vhd) without links 32..71.
@@ -109,7 +110,7 @@ package gt_mp7_core_pkg is
 -- GT firmware version
     constant GT_MAJOR_VERSION      : integer range 0 to 255 := 1;
     constant GT_MINOR_VERSION      : integer range 0 to 255 := 32;
-    constant GT_REV_VERSION        : integer range 0 to 255 := 0;
+    constant GT_REV_VERSION        : integer range 0 to 255 := 1;
 	constant GT_VERSION : std_logic_vector(31 downto 0) := X"00" &
            std_logic_vector(to_unsigned(GT_MAJOR_VERSION, 8)) &
            std_logic_vector(to_unsigned(GT_MINOR_VERSION, 8)) &

firmware/sim/scripts/templates/gtl_fdl_wrapper_tpl_questa.do

@@ -103,6 +103,13 @@ vcom -93 -work work $HDL_DIR/payload/gtl/common/correlation_cuts_wrapper.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/common/orm_cuts.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/common/esums_4_corr_cond.vhd
 #
+#### inserted from anomaly_detection.dep (wrapper in dep file)
+{{adt_vhd}}
+#### inserted from axol1tl_trigger.dep (wrapper in dep file)
+{{axol1tl_vhd}}
+#### inserted from topo_trigger.dep (wrapper in dep file)
+{{topo_vhd}}
+#
 ### modules of instances in gtl_module.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/bx_pipeline.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/muon_charge_correlations.vhd
@@ -121,13 +128,6 @@ vcom -93 -work work $HDL_DIR/payload/gtl/calo_comb_multi_condition.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/ml_comparison.vhd
 vcom -93 -work work $HDL_DIR/payload/gtl/ml_calculation_instances.vhd
 #
-#### inserted from anomaly_detection.dep (wrapper in dep file)
-{{adt_vhd}}
-#### inserted from axol1tl_trigger.dep (wrapper in dep file)
-{{axol1tl_vhd}}
-#### inserted from topo_trigger.dep (wrapper in dep file)
-{{topo_vhd}}
-#
 ### modules of BRAMs used for mass over DeltaR
 vcom -93 -work work $NGC_DIR/$BLK_MEM_GEN_VERSION/rom_lut_calo_inv_dr_sq_1/synth/rom_lut_calo_inv_dr_sq_1.vhd
 vcom -93 -work work $NGC_DIR/$BLK_MEM_GEN_VERSION/rom_lut_calo_inv_dr_sq_2/synth/rom_lut_calo_inv_dr_sq_2.vhd