Merge pull request #48055 from missirol/devel_L1TReEmulFromRAW_ZDC

use unpacked HCAL TPs for L1T-ZDC sums in `L1TReEmulFromRAW`

Author: cmsbuild

L1Trigger/Configuration/python/customiseReEmul.py

@@ -1,7 +1,8 @@
-
 import FWCore.ParameterSet.Config as cms
+
 from Configuration.Eras.Modifier_stage2L1Trigger_cff import stage2L1Trigger
 from Configuration.Eras.Modifier_stage2L1Trigger_2017_cff import stage2L1Trigger_2017
+from Configuration.Eras.Modifier_stage2L1Trigger_2021_cff import stage2L1Trigger_2021
 from Configuration.Eras.Modifier_run3_GEM_cff import run3_GEM
 
 def L1TCaloStage2ParamsForHW(process):
@@ -186,7 +187,6 @@ def L1TReEmulFromRAW2016(process):
 
 def L1TReEmulFromRAW(process):
     L1TReEmulFromRAW2016(process)
-    
 
     stage2L1Trigger_2017.toModify(process.simOmtfDigis,
         srcRPC   = 'omtfStage2Digis',
@@ -224,6 +224,10 @@ def L1TReEmulFromRAW(process):
         DTDigi_Theta_Source = 'bmtfDigis'
     )
 
+    stage2L1Trigger_2021.toModify(process.l1tZDCEtSums,
+        hcalTPDigis = 'hcalDigis'
+    )
+
     print("# L1TReEmul sequence:  ")
     print("# {0}".format(process.L1TReEmul))
     print("# {0}".format(process.schedule))