Merge pull request #3 from Undefined01/soc

5265325 · web-flow · commit 0ed9670db4e2 · 2021-09-17T18:56:00.000+08:00
Support ysyx SoC and add an example for soc
diff --git a/.gitmodules b/.gitmodules
@@ -7,3 +7,6 @@
 [submodule "libraries/difftest"]
 	path = libraries/difftest
 	url = https://gitee.com/oscpu/difftest.git
+[submodule "libraries/ysyxSoC"]
+	path = libraries/ysyxSoC
+	url = https://github.com/oscpu/ysyxSoC
diff --git a/README.md b/README.md
@@ -137,6 +137,28 @@ Enter the test cycle:
 ./build.sh -e chisel_cpu_diff -d -s -a "-i inst_diff.bin" -m "EMU_TRACE=1" -b
 ```
 
+### soc
+
+`projects/soc`目录下存放了接入`ysyxSoC`的示例程序。源码中只有一个占位符，能够通过编译但不能正常运行。
+
+要使用该框架，需要先按照 [ysyx SoC 的 readme](https://github.com/osCPU/ysyxsoc) 完成 `命名规范` 和 `CPU 内部修改` 两个步骤，得到 `ysyx_21xxxx.v`，随后放入 `projects/soc/vsrc/` 中。此后，执行下面的命令将会根据 `myinfo.txt` 中的 ID 自动 对代码进行规范检查、集成到 `soc` 并运行指定的程序。`ysyxSoC` 中附带的例程会被自动软连接至 `build` 目录下，仿真时可以快速使用。
+
+```bash
+./build.sh -e soc -b -s -y -v '--timescale "1ns/1ns" -Wno-fatal --trace' -a "-i ysyxSoC/flash/hello-flash.bin --dump-wave"
+```
+
+由于无法直接使用 `difftest` 框架，暂时只支持少量参数。
+```bash
+$ ./emu -h
+Usage: ./emu [OPTION...]
+
+  -i, --image=FILE           run with this image file
+      --dump-wave            dump waveform when log is enabled
+  -b, --log-begin=NUM        display log from NUM th cycle
+  -e, --log-end=NUM          stop display log at NUM th cycle
+  -h, --help                 print program help info
+```
+
 ## 查看波形
 
 在`oscpu`目录下使用命令可以通过`gtkwave`查看输出的波形，其中`xxx`表示例程名。
diff --git a/build.sh b/build.sh
@@ -1,11 +1,11 @@
 #!/bin/bash
 
-VERSION="1.19"
+VERSION="1.20"
 
 help() {
     echo "Version v"$VERSION
     echo "Usage:"
-    echo "build.sh [-e project_name] [-b] [-t top_file] [-s] [-a parameters_list] [-f] [-l] [-g] [-w] [-c] [-d] [-m] [-r test_cases]"
+    echo "build.sh [-e project_name] [-b] [-t top_file] [-s] [-a parameters_list] [-f] [-l] [-g] [-w] [-c] [-d] [-m] [-r test_cases] [-v parameters_list] [-y]"
     echo "Description:"
     echo "-e: Specify a example project. For example: -e counter. If not specified, the default directory \"cpu\" will be used."
     echo "-b: Build project using verilator and make tools automatically. It will generate the \"build\"(difftest) or \"build_test\" subfolder under the project directory."
@@ -20,6 +20,8 @@ help() {
     echo "-d: Connect to XiangShan difftest framework."
     echo "-m: Parameters passed to the difftest makefile. For example: -m \"EMU_TRACE=1 EMU_THREADS=4\". Multiple parameters require double quotes."
     echo "-r: Run all test cases of the specified directory in the \"bin\" directory. For example: -r \"case1 case2\". This option requires the project to be able to connect to difftest."
+    echo "-v: Parameters passed to verilator. For example: -v '--timescale \"1ns/1ns\"'"
+    echo "-y: Connect to ysyx SoC."
     exit 0
 }
 
@@ -115,31 +117,61 @@ build_diff_proj() {
     compile_difftest
 }
 
+build_soc_proj() {
+    mkdir -p $BUILD_PATH/vsrc $BUILD_PATH/csrc
+
+    if [[ ! -f "$PROJECT_PATH/$VSRC_FOLDER/ysyx_${ID:0-6}.v" ]]; then
+        echo "$VSRC_FOLDER/ysyx_${ID:0-6}.v not detected. Please follow the README of ysyxSoC to get this file."
+        exit 1
+    fi
+
+    [[ -f $BUILD_PATH/vsrc/cpu-check.py ]] || cp $YSYXSOC_HOME/ysyx/soc/cpu-check.py $BUILD_PATH/
+    sed -i -e "s/input(.*)/\"${ID:0-4}\"/g" $BUILD_PATH/cpu-check.py
+    eval "cd $PROJECT_PATH/$VSRC_FOLDER && python3 $BUILD_PATH/cpu-check.py 1> /dev/null && mv -f cpu-check.log $BUILD_PATH"
+    grep 'fine' $BUILD_PATH/cpu-check.log 1> /dev/null 2>&1
+    if [[ $? -ne 0 ]]; then
+        echo "Interface check failed. Check $BUILD_FOLDER/cpu-check.log for more details."
+        exit 1
+    fi
+
+    if [[ ! -f $BUILD_PATH/vsrc/ysyxSoCFull.v ]]; then
+        cp $YSYXSOC_HOME/ysyx/soc/ysyxSoCFull.v $BUILD_PATH/vsrc/
+        sed -i -e "s/ysyx_000000/ysyx_${ID:0-6}/g" $BUILD_PATH/vsrc/ysyxSoCFull.v
+    fi
+
+    ln -s $YSYXSOC_HOME/ysyx/peripheral $BUILD_PATH/vsrc/
+    ln -s $YSYXSOC_HOME/ysyx/peripheral/spiFlash $BUILD_PATH/csrc/
+    VSRC_FOLDER+=" $BUILD_PATH/vsrc"
+    CSRC_FOLDER+=" $BUILD_PATH/csrc"
+
+    ln -s $YSYXSOC_HOME/ysyx/program/bin $BUILD_PATH/ysyxSoC
+}
+
 build_proj() {
     cd $PROJECT_PATH
 
     # get all .cpp files
-    CSRC_LIST=`find $PROJECT_PATH/$CSRC_FOLDER -name "*.cpp"`
+    CSRC_LIST=`find -L $PROJECT_PATH/$CSRC_FOLDER -name "*.cpp"`
     for CSRC_FILE in ${CSRC_LIST[@]}
     do
         CSRC_FILES="$CSRC_FILES $CSRC_FILE"
     done
     # get all vsrc subfolders
-    VSRC_SUB_FOLDER=`find $VSRC_FOLDER -type d`
+    VSRC_SUB_FOLDER=`find -L $VSRC_FOLDER -type d`
     for SUBFOLDER in ${VSRC_SUB_FOLDER[@]}
     do
         INCLUDE_VSRC_FOLDERS="$INCLUDE_VSRC_FOLDERS -I$SUBFOLDER"
     done
     # get all csrc subfolders
-    CSRC_SUB_FOLDER=`find $PROJECT_PATH/$CSRC_FOLDER -type d`
+    CSRC_SUB_FOLDER=`find -L $PROJECT_PATH/$CSRC_FOLDER -type d`
     for SUBFOLDER in ${CSRC_SUB_FOLDER[@]}
     do
         INCLUDE_CSRC_FOLDERS="$INCLUDE_CSRC_FOLDERS -I$SUBFOLDER"
     done
 
     # compile
     mkdir $BUILD_FOLDER 1>/dev/null 2>&1
-    eval "verilator --x-assign unique --cc --exe --trace --assert -O3 -CFLAGS \"-std=c++11 -Wall $INCLUDE_CSRC_FOLDERS $CFLAGS\" $LDFLAGS -o $PROJECT_PATH/$BUILD_FOLDER/$EMU_FILE \
+    eval "verilator --x-assign unique --cc --exe --trace --assert -O3 $VERILATORFLAGS -CFLAGS \"-std=c++11 -Wall $INCLUDE_CSRC_FOLDERS $CFLAGS\" $LDFLAGS -o $PROJECT_PATH/$BUILD_FOLDER/$EMU_FILE \
         -Mdir $PROJECT_PATH/$BUILD_FOLDER/emu-compile $INCLUDE_VSRC_FOLDERS --build $V_TOP_FILE $CSRC_FILES"
     if [ $? -ne 0 ]; then
         echo "Failed to run verilator!!!"
@@ -176,12 +208,14 @@ DIFFTEST_TOP_FILE="SimTop.v"
 NEMU_PATH=$LIBRARIES_FOLDER"/NEMU"
 DIFFTEST_HELPER_PATH="src/test/vsrc/common"
 DIFFTEST_PARAM=
-TEST_CASES="false"
 DRAMSIM3_FOLDER="libraries/DRAMsim3"
 TEST_CASES=
+YSYXSOC="false"
+YSYXSOC_FOLDER="libraries/ysyxSoC"
+VERILATORFLAGS=
 
 # Check parameters
-while getopts 'he:bt:sa:f:l:gwcdm:r:' OPT; do
+while getopts 'he:bt:sa:f:l:gwcdm:r:yv:' OPT; do
     case $OPT in
         h) help;;
         e) PROJECT_FOLDER="$OPTARG";;
@@ -197,6 +231,8 @@ while getopts 'he:bt:sa:f:l:gwcdm:r:' OPT; do
         d) DIFFTEST="true";;
         m) DIFFTEST_PARAM="$OPTARG";;
         r) TEST_CASES="$OPTARG"; DIFFTEST="true";;
+        y) YSYXSOC="true"; V_TOP_FILE="ysyxSoCFull.v";;
+        v) VERILATORFLAGS="$OPTARG";;
         ?) help;;
     esac
 done
@@ -210,6 +246,7 @@ NEMU_HOME=$OSCPU_PATH/$NEMU_PATH
 DIFFTEST_HOME=$OSCPU_PATH/$DIFFTEST_PATH
 DRAMSIM3_HOME=$OSCPU_PATH/$DRAMSIM3_FOLDER
 LIBRARIES_HOME=$OSCPU_PATH/$LIBRARIES_FOLDER
+YSYXSOC_HOME=$OSCPU_PATH/$YSYXSOC_FOLDER
 export NEMU_HOME=$NEMU_HOME
 export NOOP_HOME=$PROJECT_PATH
 export DRAMSIM3_HOME=$DRAMSIM3_HOME
@@ -233,6 +270,8 @@ fi
 
 # Build project
 if [[ "$BUILD" == "true" ]]; then
+    [[ -d $BUILD_PATH ]] && find $BUILD_PATH -type l -delete
+    [[ "$YSYXSOC" == "true" ]] && build_soc_proj
     [[ "$DIFFTEST" == "true" ]] && build_diff_proj || build_proj
 
     #git commit
diff --git a/libraries/ysyxSoC b/libraries/ysyxSoC
@@ -0,0 +1 @@
+Subproject commit b23f10d2971a811c48a8542b0525097b17515ad3
diff --git a/projects/soc/csrc/emu.h b/projects/soc/csrc/emu.h
@@ -0,0 +1,146 @@
+#include <unistd.h>
+#include <getopt.h>
+
+#include <verilated_vcd_c.h>
+#include <verilated.h>
+#include <VysyxSoCFull.h>
+
+extern "C"
+{
+  void flash_init(const char *img);
+}
+
+class Emulator
+{
+public:
+  Emulator(int argc, char *argv[])
+  {
+    parseArgs(argc, argv);
+
+    if (args.image == nullptr)
+    {
+      printf("Image file unspecified. Use -i to provide the image of flash");
+      exit(1);
+    }
+    printf("Initializing flash with \"%s\" ...\n", args.image);
+    flash_init(args.image);
+
+    printf("Initializing and resetting DUT ...\n");
+    dut_ptr = new VysyxSoCFull;
+    dut_ptr->reset = 1;
+    for (int i = 0; i < 10; i++)
+    {
+      dut_ptr->clock = 0;
+      dut_ptr->eval();
+      dut_ptr->clock = 1;
+      dut_ptr->eval();
+    }
+    dut_ptr->clock = 0;
+    dut_ptr->reset = 0;
+    dut_ptr->eval();
+
+    if (args.dump_wave)
+    {
+      Verilated::traceEverOn(true);
+      printf("`dump-wave` enabled, waves will be written to \"vlt_dump.vcd\".\n");
+      fp = new VerilatedVcdC;
+      dut_ptr->trace(fp, 1);
+      fp->open("vlt_dump.vcd");
+      fp->dump(0);
+    }
+  }
+  ~Emulator()
+  {
+    if (args.dump_wave)
+    {
+      fp->close();
+      delete fp;
+    }
+  }
+
+  void step()
+  {
+    dut_ptr->clock = 1;
+    dut_ptr->eval();
+    cycle++;
+    if (args.dump_wave && args.dump_begin <= cycle && cycle <= args.dump_end)
+      fp->dump((vluint64_t)cycle);
+    dut_ptr->clock = 0;
+    dut_ptr->eval();
+  }
+
+  unsigned long long get_cycle()
+  {
+    return cycle;
+  }
+
+private:
+  void parseArgs(int argc, char *argv[])
+  {
+
+    int long_index;
+    const struct option long_options[] = {
+        {"dump-wave", 0, NULL, 0},
+        {"log-begin", 1, NULL, 'b'},
+        {"log-end", 1, NULL, 'e'},
+        {"image", 1, NULL, 'i'},
+        {"help", 0, NULL, 'h'},
+        {0, 0, NULL, 0}};
+
+    int o;
+    while ((o = getopt_long(argc, const_cast<char *const *>(argv),
+                            "-hi:b:e:", long_options, &long_index)) != -1)
+    {
+      switch (o)
+      {
+      case 0:
+        switch (long_index)
+        {
+        case 0:
+          args.dump_wave = true;
+          continue;
+        }
+        // fall through
+      default:
+        print_help(argv[0]);
+        exit(0);
+      case 'i':
+        args.image = optarg;
+        break;
+      case 'b':
+        args.dump_begin = atoll(optarg);
+        break;
+      case 'e':
+        args.dump_end = atoll(optarg);
+        break;
+      }
+    }
+
+    Verilated::commandArgs(argc, argv);
+  }
+
+  static inline void print_help(const char *file)
+  {
+    printf("Usage: %s [OPTION...]\n", file);
+    printf("\n");
+    printf("  -i, --image=FILE           run with this image file\n");
+    printf("      --dump-wave            dump waveform when log is enabled\n");
+    printf("  -b, --log-begin=NUM        display log from NUM th cycle\n");
+    printf("  -e, --log-end=NUM          stop display log at NUM th cycle\n");
+    printf("  -h, --help                 print program help info\n");
+    printf("\n");
+  }
+
+  unsigned long long cycle = 0;
+
+  struct Args
+  {
+    bool dump_wave = false;
+    unsigned long dump_begin = 0;
+    unsigned long dump_end = -1;
+    const char *image = nullptr;
+  } args;
+
+  VysyxSoCFull *dut_ptr = nullptr;
+  VerilatedVcdC *fp = nullptr;
+};
diff --git a/projects/soc/csrc/main.cpp b/projects/soc/csrc/main.cpp
@@ -0,0 +1,57 @@
+#include <cstdio>
+#include <csignal>
+#include <chrono>
+namespace chrono = std::chrono;
+
+#include "verilated.h" //Defines common routines
+#include "VysyxSoCFull.h"
+
+#include <emu.h>
+
+static int signal_received = 0;
+
+void sig_handler(int signo)
+{
+    if (signal_received != 0)
+    {
+        puts("SIGINT received, forcely shutting down.\n");
+        exit(0);
+    }
+    puts("SIGINT received, gracefully shutting down... Type Ctrl+C again to stop forcely.\n");
+    signal_received = signo;
+}
+
+static Emulator *emu = nullptr;
+chrono::system_clock::time_point sim_start_time;
+void release()
+{
+    if (emu != nullptr)
+    {
+        auto elapsed = chrono::duration_cast<chrono::seconds>(chrono::system_clock::now() - sim_start_time);
+        printf("Simulated %llu cycles in %lds\n",
+               emu->get_cycle(),
+               elapsed.count());
+        delete emu;
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    printf("Emu compiled at %s, %s\n", __DATE__, __TIME__);
+
+    if (signal(SIGINT, sig_handler) == SIG_ERR)
+    {
+        printf("can't catch SIGINT\n");
+    }
+    atexit(release);
+
+    emu = new Emulator(argc, argv);
+    printf("Start simulating ...\n");
+    sim_start_time = chrono::system_clock::now();
+    while (!Verilated::gotFinish() && signal_received == 0)
+    {
+        emu->step();
+    }
+
+    return 0;
+}
diff --git a/projects/soc/vsrc/ysyx_210000.v b/projects/soc/vsrc/ysyx_210000.v
