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iclsrc
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Merge from 'sycl' to 'sycl-web'
2 parents 1f2fcd0 + 3e7f66b commit 0e04724

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.github/workflows/sycl_linux_precommit_aws.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ jobs:
5959
name: CUDA E2E
6060
runner: '["aws_cuda-${{ github.event.workflow_run.id }}-${{ github.event.workflow_run.run_attempt }}"]'
6161
image: ghcr.io/intel/llvm/ubuntu2204_build:latest
62-
image_options: -u 1001 --gpus all --cap-add SYS_ADMIN
62+
image_options: -u 1001 --gpus all --cap-add SYS_ADMIN --env NVIDIA_DISABLE_REQUIRE=1
6363
target_devices: ext_oneapi_cuda:gpu
6464
# No idea why but that seems to work and be in sync with the main
6565
# pre-commit workflow.

clang/lib/Driver/ToolChains/SYCL.cpp

Lines changed: 59 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1008,6 +1008,35 @@ void SYCL::x86_64::BackendCompiler::ConstructJob(
10081008
C.addCommand(std::move(Cmd));
10091009
}
10101010

1011+
// Unsupported options for device compilation
1012+
// -fcf-protection, -fsanitize, -fprofile-generate, -fprofile-instr-generate
1013+
// -ftest-coverage, -fcoverage-mapping, -fcreate-profile, -fprofile-arcs
1014+
// -fcs-profile-generate -forder-file-instrumentation
1015+
static std::vector<OptSpecifier> getUnsupportedOpts(void) {
1016+
std::vector<OptSpecifier> UnsupportedOpts = {
1017+
options::OPT_fsanitize_EQ,
1018+
options::OPT_fcf_protection_EQ,
1019+
options::OPT_fprofile_generate,
1020+
options::OPT_fprofile_generate_EQ,
1021+
options::OPT_fno_profile_generate,
1022+
options::OPT_ftest_coverage,
1023+
options::OPT_fno_test_coverage,
1024+
options::OPT_fcoverage_mapping,
1025+
options::OPT_fno_coverage_mapping,
1026+
options::OPT_fprofile_instr_generate,
1027+
options::OPT_fprofile_instr_generate_EQ,
1028+
options::OPT_fprofile_arcs,
1029+
options::OPT_fno_profile_arcs,
1030+
options::OPT_fno_profile_instr_generate,
1031+
options::OPT_fcreate_profile,
1032+
options::OPT_fprofile_instr_use,
1033+
options::OPT_fprofile_instr_use_EQ,
1034+
options::OPT_forder_file_instrumentation,
1035+
options::OPT_fcs_profile_generate,
1036+
options::OPT_fcs_profile_generate_EQ};
1037+
return UnsupportedOpts;
1038+
}
1039+
10111040
SYCLToolChain::SYCLToolChain(const Driver &D, const llvm::Triple &Triple,
10121041
const ToolChain &HostTC, const ArgList &Args)
10131042
: ToolChain(D, Triple, Args), HostTC(HostTC),
@@ -1017,17 +1046,19 @@ SYCLToolChain::SYCLToolChain(const Driver &D, const llvm::Triple &Triple,
10171046
getProgramPaths().push_back(getDriver().Dir);
10181047

10191048
// Diagnose unsupported options only once.
1020-
// All sanitizer options are not currently supported, except AddressSanitizer
1021-
for (auto *A : Args.filtered(options::OPT_fsanitize_EQ,
1022-
options::OPT_fcf_protection_EQ)) {
1023-
if (A->getOption().getID() == options::OPT_fsanitize_EQ &&
1024-
A->getValues().size() == 1) {
1025-
std::string SanitizeVal = A->getValue();
1026-
if (SanitizeVal == "address")
1027-
continue;
1049+
for (OptSpecifier Opt : getUnsupportedOpts()) {
1050+
if (const Arg *A = Args.getLastArg(Opt)) {
1051+
// All sanitizer options are not currently supported, except
1052+
// AddressSanitizer
1053+
if (A->getOption().getID() == options::OPT_fsanitize_EQ &&
1054+
A->getValues().size() == 1) {
1055+
std::string SanitizeVal = A->getValue();
1056+
if (SanitizeVal == "address")
1057+
continue;
1058+
}
1059+
D.Diag(clang::diag::warn_drv_unsupported_option_for_target)
1060+
<< A->getAsString(Args) << getTriple().str();
10281061
}
1029-
D.getDiags().Report(clang::diag::warn_drv_unsupported_option_for_target)
1030-
<< A->getAsString(Args) << getTriple().str();
10311062
}
10321063
}
10331064

@@ -1053,27 +1084,27 @@ SYCLToolChain::TranslateArgs(const llvm::opt::DerivedArgList &Args,
10531084
for (Arg *A : Args) {
10541085
// Filter out any options we do not want to pass along to the device
10551086
// compilation.
1056-
auto Opt(A->getOption().getID());
1057-
switch (Opt) {
1058-
case options::OPT_fsanitize_EQ:
1059-
if (A->getValues().size() == 1) {
1060-
std::string SanitizeVal = A->getValue();
1061-
if (SanitizeVal == "address") {
1062-
if (IsNewDAL)
1063-
DAL->append(A);
1064-
continue;
1087+
auto Opt(A->getOption());
1088+
bool Unsupported = false;
1089+
for (OptSpecifier UnsupportedOpt : getUnsupportedOpts()) {
1090+
if (Opt.matches(UnsupportedOpt)) {
1091+
if (A->getValues().size() == 1) {
1092+
std::string SanitizeVal = A->getValue();
1093+
if (SanitizeVal == "address") {
1094+
if (IsNewDAL)
1095+
DAL->append(A);
1096+
continue;
1097+
}
10651098
}
1099+
if (!IsNewDAL)
1100+
DAL->eraseArg(Opt.getID());
1101+
Unsupported = true;
10661102
}
1067-
[[fallthrough]];
1068-
case options::OPT_fcf_protection_EQ:
1069-
if (!IsNewDAL)
1070-
DAL->eraseArg(Opt);
1071-
break;
1072-
default:
1073-
if (IsNewDAL)
1074-
DAL->append(A);
1075-
break;
10761103
}
1104+
if (Unsupported)
1105+
continue;
1106+
if (IsNewDAL)
1107+
DAL->append(A);
10771108
}
10781109
// Strip out -O0 for FPGA Hardware device compilation.
10791110
if (getDriver().IsFPGAHWMode() &&

clang/test/Driver/sycl-unsupported.cpp

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,35 @@
1111
// RUN: %clangxx -fsycl -fsycl-targets=spir64_x86_64 -fcf-protection -### %s 2>&1 \
1212
// RUN: | FileCheck %s -DARCH=spir64_x86_64 -DOPT=-fcf-protection
1313

14+
// RUN: %clangxx -fsycl -fprofile-instr-generate -### %s 2>&1 \
15+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-fprofile-instr-generate \
16+
// RUN: -DOPT_CC1=-fprofile-instrument=clang \
17+
// RUN: -check-prefixes=UNSUPPORTED_OPT_DIAG,UNSUPPORTED_OPT
18+
// RUN: %clangxx -fsycl -fcoverage-mapping \
19+
// RUN: -fprofile-instr-generate -### %s 2>&1 \
20+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-fcoverage-mapping
21+
// RUN: %clangxx -fsycl -ftest-coverage -### %s 2>&1 \
22+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-ftest-coverage \
23+
// RUN: -DOPT_CC1=-coverage-notes-file \
24+
// RUN: -check-prefixes=UNSUPPORTED_OPT_DIAG,UNSUPPORTED_OPT
25+
// RUN: %clangxx -fsycl -fcreate-profile -### %s 2>&1 \
26+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-fcreate-profile \
27+
// RUN: -check-prefix UNSUPPORTED_OPT_DIAG
28+
// RUN: %clangxx -fsycl -fprofile-arcs -### %s 2>&1 \
29+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-fprofile-arcs \
30+
// RUN: -DOPT_CC1=-coverage-data-file \
31+
// RUN: -check-prefixes=UNSUPPORTED_OPT_DIAG,UNSUPPORTED_OPT
32+
// RUN: %clangxx -fsycl -fcs-profile-generate -### %s 2>&1 \
33+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-fcs-profile-generate \
34+
// RUN: -DOPT_CC1=-fprofile-instrument=csllvm \
35+
// RUN: -check-prefixes=UNSUPPORTED_OPT_DIAG,UNSUPPORTED_OPT
36+
// RUN: %clangxx -fsycl -forder-file-instrumentation -### %s 2>&1 \
37+
// RUN: | FileCheck %s -DARCH=spir64 -DOPT=-forder-file-instrumentation
38+
1439
// CHECK: ignoring '[[OPT]]' option as it is not currently supported for target '[[ARCH]]{{.*}}' [-Woption-ignored]
1540
// CHECK-NOT: clang{{.*}} "-fsycl-is-device"{{.*}} "[[OPT]]{{.*}}"
1641
// CHECK: clang{{.*}} "-fsycl-is-host"{{.*}} "[[OPT]]{{.*}}"
42+
43+
// UNSUPPORTED_OPT_DIAG: ignoring '[[OPT]]' option as it is not currently supported for target '[[ARCH]]{{.*}}' [-Woption-ignored]
44+
// UNSUPPORTED_OPT-NOT: clang{{.*}} "-fsycl-is-device"{{.*}} "[[OPT_CC1]]{{.*}}"
45+
// UNSUPPORTED_OPT: clang{{.*}} "-fsycl-is-host"{{.*}} "[[OPT_CC1]]{{.*}}"

llvm-spirv/lib/SPIRV/SPIRVToOCL.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -567,7 +567,7 @@ void SPIRVToOCLBase::visitCallSPIRVPipeBuiltin(CallInst *CI, Op OC) {
567567
Mutator.mapArg(Mutator.arg_size() - 3, [](IRBuilder<> &Builder, Value *P) {
568568
Type *T = P->getType();
569569
assert(isa<PointerType>(T));
570-
auto *NewTy = Builder.getInt8PtrTy(SPIRAS_Generic);
570+
auto *NewTy = Builder.getPtrTy(SPIRAS_Generic);
571571
if (T != NewTy) {
572572
P = Builder.CreatePointerBitCastOrAddrSpaceCast(P, NewTy);
573573
}

llvm-spirv/lib/SPIRV/SPIRVToOCL20.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -259,7 +259,7 @@ void SPIRVToOCL20Base::visitCallSPIRVEnqueueKernel(CallInst *CI, Op OC) {
259259
auto Mutator = mutateCallInst(CI, FName.str());
260260
Mutator.mapArg(6, [=](IRBuilder<> &Builder, Value *Invoke) {
261261
Value *Replace = CastInst::CreatePointerBitCastOrAddrSpaceCast(
262-
Invoke, Builder.getInt8PtrTy(SPIRAS_Generic), "", CI);
262+
Invoke, Builder.getPtrTy(SPIRAS_Generic), "", CI);
263263
return std::make_pair(
264264
Replace, TypedPointerType::get(Builder.getInt8Ty(), SPIRAS_Generic));
265265
});

llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2109,6 +2109,13 @@ LLVMToSPIRVBase::transValueWithoutDecoration(Value *V, SPIRVBasicBlock *BB,
21092109
}
21102110

21112111
if (CmpInst *Cmp = dyn_cast<CmpInst>(V)) {
2112+
if (Cmp->getPredicate() == CmpInst::Predicate::FCMP_FALSE) {
2113+
auto *CmpTy = Cmp->getType();
2114+
SPIRVValue *FalseValue = CmpTy->isVectorTy()
2115+
? BM->addNullConstant(transType(CmpTy))
2116+
: BM->addConstant(BM->addBoolType(), 0);
2117+
return mapValue(V, FalseValue);
2118+
}
21122119
SPIRVInstruction *BI = transCmpInst(Cmp, BB);
21132120
return mapValue(V, BI);
21142121
}
@@ -3242,6 +3249,28 @@ AnnotationDecorations tryParseAnnotationString(SPIRVModule *BM,
32423249
internal::DecorationCacheControlLoadINTEL) {
32433250
Decorates.CacheControlVec.emplace_back(
32443251
static_cast<Decoration>(DecorationKind), std::move(DecValues));
3252+
} else if (DecorationKind == DecorationMemoryINTEL) {
3253+
// SPIRV doesn't allow the same Decoration to be applied multiple
3254+
// times on a single SPIRVEntry, unless explicitly allowed by the
3255+
// language spec. Filter out the less specific MemoryINTEL
3256+
// decorations, if applied multiple times
3257+
auto CanFilterOut = [](auto &Val) {
3258+
if (!Val.second.empty())
3259+
return (Val.second[0] == "DEFAULT");
3260+
return false;
3261+
};
3262+
auto It = std::find_if(DecorationsVec.begin(), DecorationsVec.end(),
3263+
CanFilterOut);
3264+
3265+
if (It != DecorationsVec.end()) {
3266+
// replace the less specific decoration
3267+
*It = {static_cast<Decoration>(DecorationKind),
3268+
std::move(DecValues)};
3269+
} else {
3270+
// add new decoration
3271+
DecorationsVec.emplace_back(static_cast<Decoration>(DecorationKind),
3272+
std::move(DecValues));
3273+
}
32453274
} else {
32463275
DecorationsVec.emplace_back(static_cast<Decoration>(DecorationKind),
32473276
std::move(DecValues));

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3834,7 +3834,7 @@ template <Op OC> class SPIRVReadClockKHRInstBase : public SPIRVUnaryInst<OC> {
38343834
" 64-bit type or two element vector of 32-bit type\n");
38353835
}
38363836
};
3837-
#define _SPIRV_OP(x, ...) typedef SPIRVReadClockKHRInstBase<Op##x> SPIRV##x;
3837+
#define _SPIRV_OP(x) typedef SPIRVReadClockKHRInstBase<Op##x> SPIRV##x;
38383838
_SPIRV_OP(ReadClockKHR)
38393839
#undef _SPIRV_OP
38403840

llvm-spirv/test/FCmpFalse.ll

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
; RUN: llvm-as %s -o %t.bc
2+
; RUN: llvm-spirv %t.bc -spirv-text -o %t.spt
3+
; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
4+
; RUN: llvm-spirv %t.bc -o %t.spv
5+
; RUN: spirv-val %t.spv
6+
7+
; CHECK-SPIRV: ConstantFalse [[#]] [[#FalseVal:]]
8+
; CHECK-SPIRV: ReturnValue [[#FalseVal]]
9+
10+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
11+
target triple = "spir64-unknown-unknown"
12+
13+
define spir_func i1 @f(float %0) {
14+
%2 = fcmp false float %0, %0
15+
ret i1 %2
16+
}

llvm-spirv/test/FCmpFalse_Vec.ll

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
; RUN: llvm-as %s -o %t.bc
2+
; RUN: llvm-spirv %t.bc -spirv-text -o %t.spt
3+
; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
4+
; RUN: llvm-spirv %t.bc -o %t.spv
5+
; RUN: spirv-val %t.spv
6+
7+
; CHECK-SPIRV: TypeBool [[#BoolTy:]]
8+
; CHECK-SPIRV: TypeVector [[#VecTy:]] [[#BoolTy]] 4
9+
; CHECK-SPIRV: ConstantNull [[#VecTy]] [[#VecNullVal:]]
10+
; CHECK-SPIRV: ReturnValue [[#VecNullVal]]
11+
12+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
13+
target triple = "spir64-unknown-unknown"
14+
15+
define spir_func <4 x i1> @f(<4 x float> %0) {
16+
%2 = fcmp false <4 x float> %0, %0
17+
ret <4 x i1> %2
18+
}
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,70 @@
1+
; Test checks that MemoryINTEL decoration can be applied twice on a single
2+
; variable
3+
4+
; RUN: llvm-as %s -o %t.bc
5+
; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_fpga_memory_attributes -o %t.spv
6+
; RUN: llvm-spirv %t.spv -to-text -o %t.spt
7+
; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
8+
; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc
9+
; RUN: llvm-dis %t.rev.bc
10+
; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM
11+
; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
12+
; RUN: llvm-dis %t.rev.bc
13+
; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM
14+
15+
; CHECK-SPIRV: Capability FPGAMemoryAttributesINTEL
16+
; CHECK-SPIRV: Extension "SPV_INTEL_fpga_memory_attributes"
17+
; CHECK-SPIRV: Decorate [[#empty:]] MemoryINTEL "DEFAULT"
18+
; CHECK-SPIRV-NOT: Decorate [[#]] MemoryINTEL "DEFAULT"
19+
; CHECK-SPIRV: Decorate [[#mlab:]] MemoryINTEL "MLAB"
20+
; CHECK-SPIRV-NOT: Decorate [[#]] MemoryINTEL "DEFAULT"
21+
; CHECK-SPIRV: Decorate [[#block_ram:]] MemoryINTEL "BLOCK_RAM"
22+
23+
24+
; ModuleID = '/nfs/site/disks/swuser_work_aradzikh/external/llvm-intel/sycl/test/check_device_code/fpga_mem_local.cpp'
25+
source_filename = "fpga_mem_local.cpp"
26+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
27+
target triple = "spir64-unknown-unknown"
28+
29+
%"fpga_mem" = type { [10 x i32] }
30+
31+
@.str.1 = private unnamed_addr addrspace(1) constant [17 x i8] c"{5826:\22DEFAULT\22}\00", section "llvm.metadata"
32+
@.str.2 = private unnamed_addr addrspace(1) constant [30 x i8] c"{5826:\22DEFAULT\22}{5826:\22MLAB\22}\00", section "llvm.metadata"
33+
@.str.3 = private unnamed_addr addrspace(1) constant [35 x i8] c"{5826:\22DEFAULT\22}{5826:\22BLOCK_RAM\22}\00", section "llvm.metadata"
34+
35+
; CHECK-LLVM: [[empty_annot:]] = private unnamed_addr constant [17 x i8] c"{memory:DEFAULT}\00", align 1
36+
; CHECK-LLVM: [[mlab_annot:]] = private unnamed_addr constant [14 x i8] c"{memory:MLAB}\00", align 1
37+
; CHECK-LLVM: [[block_ram_annot:]] = private unnamed_addr constant [19 x i8] c"{memory:BLOCK_RAM}\00", align 1
38+
39+
; Function Attrs: mustprogress norecurse nounwind
40+
define weak_odr dso_local spir_kernel void @kernel(ptr addrspace(4) %out) {
41+
entry:
42+
%empty.i = alloca %"fpga_mem", align 4
43+
%mlab.i = alloca %"fpga_mem", align 4
44+
%block_ram.i = alloca %"fpga_mem", align 4
45+
%empty.ascast.i = addrspacecast ptr %empty.i to ptr addrspace(4)
46+
%mlab.ascast.i = addrspacecast ptr %mlab.i to ptr addrspace(4)
47+
%block_ram.ascast.i = addrspacecast ptr %block_ram.i to ptr addrspace(4)
48+
49+
call void @llvm.var.annotation.p4.p1(ptr addrspace(4) %empty.ascast.i, ptr addrspace(1) @.str.1, ptr addrspace(1) undef, i32 undef, ptr addrspace(1) undef)
50+
; CHECK-SPV-IR: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %empty{{.*}}, ptr [[empty_annot]]
51+
; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %empty{{.*}}, ptr [[empty_annot]]
52+
call void @llvm.var.annotation.p4.p1(ptr addrspace(4) %mlab.ascast.i, ptr addrspace(1) @.str.2, ptr addrspace(1) undef, i32 undef, ptr addrspace(1) undef)
53+
; CHECK-SPV-IR: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %mlab{{.*}}, ptr [[mlab_annot]]
54+
; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %mlab{{.*}}, ptr [[mlab_annot]]
55+
call void @llvm.var.annotation.p4.p1(ptr addrspace(4) %block_ram.ascast.i, ptr addrspace(1) @.str.3, ptr addrspace(1) undef, i32 undef, ptr addrspace(1) undef)
56+
; CHECK-SPV-IR: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %block_ram{{.*}}, ptr [[block_ram_annot]]
57+
; CHECK-LLVM: call void @llvm.var.annotation{{.*}}(ptr addrspace(4) %block_ram{{.*}}, ptr [[block_ram_annot]]
58+
59+
%l1 = load i32, ptr addrspace(4) %empty.ascast.i, align 4
60+
%l2 = load i32, ptr addrspace(4) %mlab.ascast.i, align 4
61+
%l3 = load i32, ptr addrspace(4) %block_ram.ascast.i, align 4
62+
63+
%add1 = add nsw i32 %l1, %l2
64+
%add2 = add nsw i32 %add1, %l3
65+
store i32 %add2, ptr addrspace(4) %out, align 4
66+
67+
ret void
68+
}
69+
70+
declare void @llvm.var.annotation.p4.p1(ptr addrspace(4), ptr addrspace(1), ptr addrspace(1), i32, ptr addrspace(1))

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