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[InstCombine] Don't treat undef as poison in demanded element simplification
We can only set PoisonElts if the element is poison, not if it is undef.
1 parent f4b6f36 commit 9d45579

22 files changed

+262
-154
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1345,15 +1345,15 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
13451345
APInt EltMask(APInt::getAllOnes(VWidth));
13461346
assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!");
13471347

1348-
if (DemandedElts.isZero()) { // If nothing is demanded, provide poison.
1348+
if (match(V, m_Poison())) {
1349+
// If the entire vector is poison, just return this info.
13491350
PoisonElts = EltMask;
1350-
return !isa<PoisonValue>(V) ? PoisonValue::get(V->getType()) : nullptr;
1351+
return nullptr;
13511352
}
13521353

1353-
if (match(V, m_Undef())) {
1354-
// If the entire vector is undef or poison, just return this info.
1354+
if (DemandedElts.isZero()) { // If nothing is demanded, provide poison.
13551355
PoisonElts = EltMask;
1356-
return nullptr;
1356+
return PoisonValue::get(V->getType());
13571357
}
13581358

13591359
PoisonElts = 0;

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4872,7 +4872,7 @@ define amdgpu_ps float @extract_elt0_dmask_0111_image_sample_1d_v4f32_f32(float
48724872
define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 {
48734873
; CHECK-LABEL: @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(
48744874
; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0)
4875-
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <2 x float> poison, float [[DATA]], i64 0
4875+
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <2 x float> <float poison, float undef>, float [[DATA]], i64 0
48764876
; CHECK-NEXT: ret <2 x float> [[SHUF]]
48774877
;
48784878
%data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0)
@@ -4913,7 +4913,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0101_image_sample_1d_v4f32
49134913
define amdgpu_ps <3 x float> @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 {
49144914
; CHECK-LABEL: @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(
49154915
; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0)
4916-
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <3 x float> poison, float [[DATA]], i64 0
4916+
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <3 x float> <float poison, float undef, float undef>, float [[DATA]], i64 0
49174917
; CHECK-NEXT: ret <3 x float> [[SHUF]]
49184918
;
49194919
%data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0)

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4871,7 +4871,7 @@ define amdgpu_ps float @extract_elt0_dmask_0111_image_sample_1d_v4f32_f32(float
48714871
define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 {
48724872
; CHECK-LABEL: @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(
48734873
; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0)
4874-
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <2 x float> poison, float [[DATA]], i64 0
4874+
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <2 x float> <float poison, float undef>, float [[DATA]], i64 0
48754875
; CHECK-NEXT: ret <2 x float> [[SHUF]]
48764876
;
48774877
%data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0)
@@ -4912,7 +4912,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0101_image_sample_1d_v4f32
49124912
define amdgpu_ps <3 x float> @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 {
49134913
; CHECK-LABEL: @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(
49144914
; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0)
4915-
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <3 x float> poison, float [[DATA]], i64 0
4915+
; CHECK-NEXT: [[SHUF:%.*]] = insertelement <3 x float> <float poison, float undef, float undef>, float [[DATA]], i64 0
49164916
; CHECK-NEXT: ret <3 x float> [[SHUF]]
49174917
;
49184918
%data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0)

‎llvm/test/Transforms/InstCombine/X86/clmulqdq.ll

Lines changed: 120 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -51,36 +51,72 @@ define <2 x i64> @test_demanded_elts_pclmulqdq_17(<2 x i64> %a0, <2 x i64> %a1)
5151

5252
define <2 x i64> @test_demanded_elts_pclmulqdq_undef_0() {
5353
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_undef_0(
54-
; CHECK-NEXT: ret <2 x i64> zeroinitializer
54+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 undef, i64 poison>, <2 x i64> <i64 undef, i64 poison>, i8 0)
55+
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
5556
;
5657
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 undef, i64 1>, <2 x i64> <i64 undef, i64 1>, i8 0)
5758
ret <2 x i64> %1
5859
}
5960

6061
define <2 x i64> @test_demanded_elts_pclmulqdq_undef_1() {
6162
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_undef_1(
62-
; CHECK-NEXT: ret <2 x i64> zeroinitializer
63+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 poison, i64 undef>, <2 x i64> <i64 undef, i64 poison>, i8 1)
64+
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
6365
;
6466
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 1, i64 undef>, <2 x i64> <i64 undef, i64 1>, i8 1)
6567
ret <2 x i64> %1
6668
}
6769

6870
define <2 x i64> @test_demanded_elts_pclmulqdq_undef_16() {
6971
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_undef_16(
70-
; CHECK-NEXT: ret <2 x i64> zeroinitializer
72+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 undef, i64 poison>, <2 x i64> <i64 poison, i64 undef>, i8 16)
73+
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
7174
;
7275
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 undef, i64 1>, <2 x i64> <i64 1, i64 undef>, i8 16)
7376
ret <2 x i64> %1
7477
}
7578

7679
define <2 x i64> @test_demanded_elts_pclmulqdq_undef_17() {
7780
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_undef_17(
78-
; CHECK-NEXT: ret <2 x i64> zeroinitializer
81+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 poison, i64 undef>, <2 x i64> <i64 poison, i64 undef>, i8 17)
82+
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
7983
;
8084
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 1, i64 undef>, <2 x i64> <i64 1, i64 undef>, i8 17)
8185
ret <2 x i64> %1
8286
}
8387

88+
define <2 x i64> @test_demanded_elts_pclmulqdq_poison_0() {
89+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_poison_0(
90+
; CHECK-NEXT: ret <2 x i64> zeroinitializer
91+
;
92+
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 poison, i64 1>, <2 x i64> <i64 poison, i64 1>, i8 0)
93+
ret <2 x i64> %1
94+
}
95+
96+
define <2 x i64> @test_demanded_elts_pclmulqdq_poison_1() {
97+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_poison_1(
98+
; CHECK-NEXT: ret <2 x i64> zeroinitializer
99+
;
100+
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 1, i64 poison>, <2 x i64> <i64 poison, i64 1>, i8 1)
101+
ret <2 x i64> %1
102+
}
103+
104+
define <2 x i64> @test_demanded_elts_pclmulqdq_poison_16() {
105+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_poison_16(
106+
; CHECK-NEXT: ret <2 x i64> zeroinitializer
107+
;
108+
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 poison, i64 1>, <2 x i64> <i64 1, i64 poison>, i8 16)
109+
ret <2 x i64> %1
110+
}
111+
112+
define <2 x i64> @test_demanded_elts_pclmulqdq_poison_17() {
113+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_poison_17(
114+
; CHECK-NEXT: ret <2 x i64> zeroinitializer
115+
;
116+
%1 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> <i64 1, i64 poison>, <2 x i64> <i64 1, i64 poison>, i8 17)
117+
ret <2 x i64> %1
118+
}
119+
84120
define <4 x i64> @test_demanded_elts_pclmulqdq_256_0(<4 x i64> %a0, <4 x i64> %a1) {
85121
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_0(
86122
; CHECK-NEXT: [[RES:%.*]] = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> [[A0:%.*]], <4 x i64> [[A1:%.*]], i8 0)
@@ -135,36 +171,72 @@ define <4 x i64> @test_demanded_elts_pclmulqdq_256_17(<4 x i64> %a0, <4 x i64> %
135171

136172
define <4 x i64> @test_demanded_elts_pclmulqdq_256_undef_0() {
137173
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_undef_0(
138-
; CHECK-NEXT: ret <4 x i64> zeroinitializer
174+
; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 undef, i64 poison, i64 undef, i64 poison>, <4 x i64> <i64 undef, i64 poison, i64 undef, i64 poison>, i8 0)
175+
; CHECK-NEXT: ret <4 x i64> [[TMP1]]
139176
;
140177
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 undef, i64 1, i64 undef, i64 1>, <4 x i64> <i64 undef, i64 1, i64 undef, i64 1>, i8 0)
141178
ret <4 x i64> %1
142179
}
143180

144181
define <4 x i64> @test_demanded_elts_pclmulqdq_256_undef_1() {
145182
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_undef_1(
146-
; CHECK-NEXT: ret <4 x i64> zeroinitializer
183+
; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 poison, i64 undef, i64 poison, i64 undef>, <4 x i64> <i64 undef, i64 poison, i64 undef, i64 poison>, i8 1)
184+
; CHECK-NEXT: ret <4 x i64> [[TMP1]]
147185
;
148186
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 1, i64 undef, i64 1, i64 undef>, <4 x i64> <i64 undef, i64 1, i64 undef, i64 1>, i8 1)
149187
ret <4 x i64> %1
150188
}
151189

152190
define <4 x i64> @test_demanded_elts_pclmulqdq_256_undef_16() {
153191
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_undef_16(
154-
; CHECK-NEXT: ret <4 x i64> zeroinitializer
192+
; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 undef, i64 poison, i64 undef, i64 poison>, <4 x i64> <i64 poison, i64 undef, i64 poison, i64 undef>, i8 16)
193+
; CHECK-NEXT: ret <4 x i64> [[TMP1]]
155194
;
156195
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 undef, i64 1, i64 undef, i64 1>, <4 x i64> <i64 1, i64 undef, i64 1, i64 undef>, i8 16)
157196
ret <4 x i64> %1
158197
}
159198

160199
define <4 x i64> @test_demanded_elts_pclmulqdq_256_undef_17() {
161200
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_undef_17(
162-
; CHECK-NEXT: ret <4 x i64> zeroinitializer
201+
; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 poison, i64 undef, i64 poison, i64 undef>, <4 x i64> <i64 poison, i64 undef, i64 poison, i64 undef>, i8 17)
202+
; CHECK-NEXT: ret <4 x i64> [[TMP1]]
163203
;
164204
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 1, i64 undef, i64 1, i64 undef>, <4 x i64> <i64 1, i64 undef, i64 1, i64 undef>, i8 17)
165205
ret <4 x i64> %1
166206
}
167207

208+
define <4 x i64> @test_demanded_elts_pclmulqdq_256_poison_0() {
209+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_poison_0(
210+
; CHECK-NEXT: ret <4 x i64> zeroinitializer
211+
;
212+
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 poison, i64 1, i64 poison, i64 1>, <4 x i64> <i64 poison, i64 1, i64 poison, i64 1>, i8 0)
213+
ret <4 x i64> %1
214+
}
215+
216+
define <4 x i64> @test_demanded_elts_pclmulqdq_256_poison_1() {
217+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_poison_1(
218+
; CHECK-NEXT: ret <4 x i64> zeroinitializer
219+
;
220+
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 1, i64 poison, i64 1, i64 poison>, <4 x i64> <i64 poison, i64 1, i64 poison, i64 1>, i8 1)
221+
ret <4 x i64> %1
222+
}
223+
224+
define <4 x i64> @test_demanded_elts_pclmulqdq_256_poison_16() {
225+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_poison_16(
226+
; CHECK-NEXT: ret <4 x i64> zeroinitializer
227+
;
228+
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 poison, i64 1, i64 poison, i64 1>, <4 x i64> <i64 1, i64 poison, i64 1, i64 poison>, i8 16)
229+
ret <4 x i64> %1
230+
}
231+
232+
define <4 x i64> @test_demanded_elts_pclmulqdq_256_poison_17() {
233+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_256_poison_17(
234+
; CHECK-NEXT: ret <4 x i64> zeroinitializer
235+
;
236+
%1 = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> <i64 1, i64 poison, i64 1, i64 poison>, <4 x i64> <i64 1, i64 poison, i64 1, i64 poison>, i8 17)
237+
ret <4 x i64> %1
238+
}
239+
168240
define <8 x i64> @test_demanded_elts_pclmulqdq_512_0(<8 x i64> %a0, <8 x i64> %a1) {
169241
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_0(
170242
; CHECK-NEXT: [[RES:%.*]] = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1:%.*]], i8 0)
@@ -235,32 +307,68 @@ define <8 x i64> @test_demanded_elts_pclmulqdq_512_17(<8 x i64> %a0, <8 x i64> %
235307

236308
define <8 x i64> @test_demanded_elts_pclmulqdq_512_undef_0() {
237309
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_undef_0(
238-
; CHECK-NEXT: ret <8 x i64> zeroinitializer
310+
; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison>, <8 x i64> <i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison>, i8 0)
311+
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
239312
;
240313
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1>, <8 x i64> <i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1>, i8 0)
241314
ret <8 x i64> %1
242315
}
243316

244317
define <8 x i64> @test_demanded_elts_pclmulqdq_512_undef_1() {
245318
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_undef_1(
246-
; CHECK-NEXT: ret <8 x i64> zeroinitializer
319+
; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef>, <8 x i64> <i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison>, i8 1)
320+
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
247321
;
248322
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef>, <8 x i64> <i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1>, i8 1)
249323
ret <8 x i64> %1
250324
}
251325

252326
define <8 x i64> @test_demanded_elts_pclmulqdq_512_undef_16() {
253327
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_undef_16(
254-
; CHECK-NEXT: ret <8 x i64> zeroinitializer
328+
; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison>, <8 x i64> <i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef>, i8 16)
329+
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
255330
;
256331
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1>, <8 x i64> <i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef>, i8 16)
257332
ret <8 x i64> %1
258333
}
259334

260335
define <8 x i64> @test_demanded_elts_pclmulqdq_512_undef_17() {
261336
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_undef_17(
262-
; CHECK-NEXT: ret <8 x i64> zeroinitializer
337+
; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef>, <8 x i64> <i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef, i64 poison, i64 undef>, i8 17)
338+
; CHECK-NEXT: ret <8 x i64> [[TMP1]]
263339
;
264340
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef>, <8 x i64> <i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef, i64 1, i64 undef>, i8 17)
265341
ret <8 x i64> %1
266342
}
343+
344+
define <8 x i64> @test_demanded_elts_pclmulqdq_512_poison_0() {
345+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_poison_0(
346+
; CHECK-NEXT: ret <8 x i64> zeroinitializer
347+
;
348+
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1>, <8 x i64> <i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1>, i8 0)
349+
ret <8 x i64> %1
350+
}
351+
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define <8 x i64> @test_demanded_elts_pclmulqdq_512_poison_1() {
353+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_poison_1(
354+
; CHECK-NEXT: ret <8 x i64> zeroinitializer
355+
;
356+
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison>, <8 x i64> <i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1>, i8 1)
357+
ret <8 x i64> %1
358+
}
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define <8 x i64> @test_demanded_elts_pclmulqdq_512_poison_16() {
361+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_poison_16(
362+
; CHECK-NEXT: ret <8 x i64> zeroinitializer
363+
;
364+
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1>, <8 x i64> <i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison>, i8 16)
365+
ret <8 x i64> %1
366+
}
367+
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define <8 x i64> @test_demanded_elts_pclmulqdq_512_poison_17() {
369+
; CHECK-LABEL: @test_demanded_elts_pclmulqdq_512_poison_17(
370+
; CHECK-NEXT: ret <8 x i64> zeroinitializer
371+
;
372+
%1 = call <8 x i64> @llvm.x86.pclmulqdq.512(<8 x i64> <i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison>, <8 x i64> <i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison, i64 1, i64 poison>, i8 17)
373+
ret <8 x i64> %1
374+
}

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