[InstCombine] Remove root special case in demanded bits simplification

When calling SimplifyDemandedBits (as opposed to
SimplifyDemandedInstructionBits), and there are multiple uses,
always use SimplifyMultipleUseDemandedBits and drop the special
case for root values.

This fixes the ephemeral value detection, as seen by the restored
assumes in tests. It may result in more or less simplification,
depending on whether we get more out of having demanded bits or
the ability to perform non-multi-use transforms. The change in
the phi-known-bits.ll test is because the icmp operand now gets
simplified based on demanded bits, which then prevents a different
known bits simplification later.

This also makes the code safe against future changes like
llvm#97289, which add more
context that would have to be discarded for the multi-use case.

Author: nikic

clang/test/CodeGen/inline-asm-x86-flag-output.c

@@ -380,8 +380,10 @@ int test_assume_boolean_flag(long nr, volatile long *addr) {
   //CHECK: %0 = tail call { i32, i32 } asm "cmp $2,$1", "={@cca},={@ccae},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) %addr, i64 %nr)
   //CHECK: [[RES1:%.*]] = extractvalue { i32, i32 } %0, 0
   //CHECK: [[RES2:%.*]] = extractvalue { i32, i32 } %0, 1
-  //CHECK: %1 = icmp ult i32 [[RES2]], 2
+  //CHECK: %1 = icmp ult i32 [[RES1]], 2
   //CHECK: tail call void @llvm.assume(i1 %1)
+  //CHECK: %2 = icmp ult i32 [[RES2]], 2
+  //CHECK: tail call void @llvm.assume(i1 %2)
   int x,y;
   asm("cmp %2,%1"
       : "=@cca"(x), "=@ccae"(y), "=m"(*(volatile long *)(addr))

llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

@@ -117,20 +117,11 @@ bool InstCombinerImpl::SimplifyDemandedBits(Instruction *I, unsigned OpNo,
   if (VInst->hasOneUse()) {
     // If the instruction has one use, we can directly simplify it.
     NewVal = SimplifyDemandedUseBits(VInst, DemandedMask, Known, Depth, Q);
-  } else if (Depth != 0) {
-    // If there are multiple uses of this instruction and we aren't at the root,
-    // then we can simplify VInst to some other value, but not modify the
-    // instruction.
-    NewVal =
-        SimplifyMultipleUseDemandedBits(VInst, DemandedMask, Known, Depth, Q);
   } else {
-    // If this is the root being simplified, allow it to have multiple uses,
-    // just set the DemandedMask to all bits and reset the context instruction.
-    // This allows visitTruncInst (for example) to simplify the operand of a
-    // trunc without duplicating all the SimplifyDemandedUseBits() logic.
+    // If there are multiple uses of this instruction, then we can simplify
+    // VInst to some other value, but not modify the instruction.
     NewVal =
-        SimplifyDemandedUseBits(VInst, APInt::getAllOnes(Known.getBitWidth()),
-                                Known, Depth, Q.getWithInstruction(VInst));
+        SimplifyMultipleUseDemandedBits(VInst, DemandedMask, Known, Depth, Q);
   }
   if (!NewVal) return false;
   if (Instruction* OpInst = dyn_cast<Instruction>(U))

llvm/test/Analysis/ValueTracking/phi-known-bits.ll

@@ -375,10 +375,13 @@ F:
 define i8 @phi_ugt_high_bits_and_known(i8 %xx) {
 ; CHECK-LABEL: @phi_ugt_high_bits_and_known(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[XX:%.*]], -65
+; CHECK-NEXT:    [[X:%.*]] = or i8 [[XX:%.*]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[XX]], -65
 ; CHECK-NEXT:    br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
 ; CHECK:       T:
-; CHECK-NEXT:    ret i8 65
+; CHECK-NEXT:    [[V:%.*]] = phi i8 [ [[X]], [[ENTRY:%.*]] ], [ -1, [[F]] ]
+; CHECK-NEXT:    [[R:%.*]] = and i8 [[V]], 65
+; CHECK-NEXT:    ret i8 [[R]]
 ; CHECK:       F:
 ; CHECK-NEXT:    br label [[T]]
 ;

llvm/test/Transforms/InstCombine/assume-inseltpoison.ll

@@ -15,6 +15,8 @@ define i32 @PR40940(<4 x i8> %x) {
 ; CHECK-LABEL: @PR40940(
 ; CHECK-NEXT:    [[SHUF:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 3>
 ; CHECK-NEXT:    [[T2:%.*]] = bitcast <4 x i8> [[SHUF]] to i32
+; CHECK-NEXT:    [[T3:%.*]] = icmp ult i32 [[T2]], 65536
+; CHECK-NEXT:    call void @llvm.assume(i1 [[T3]])
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %shuf = shufflevector <4 x i8> %x, <4 x i8> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 3>

llvm/test/Transforms/InstCombine/assume.ll

@@ -428,6 +428,8 @@ define i32 @PR40940(<4 x i8> %x) {
 ; CHECK-LABEL: @PR40940(
 ; CHECK-NEXT:    [[SHUF:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 3>
 ; CHECK-NEXT:    [[T2:%.*]] = bitcast <4 x i8> [[SHUF]] to i32
+; CHECK-NEXT:    [[T3:%.*]] = icmp ult i32 [[T2]], 65536
+; CHECK-NEXT:    call void @llvm.assume(i1 [[T3]])
 ; CHECK-NEXT:    ret i32 [[T2]]
 ;
   %shuf = shufflevector <4 x i8> %x, <4 x i8> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 3>