Skip to content

Commit 307d8be

Browse files
satiscugcatsatiscugcat
committed
Upgrading to earliest nightly that includes our fix
1 parent be022bd commit 307d8be

File tree

4 files changed

+53
-135
lines changed

4 files changed

+53
-135
lines changed

‎rust-toolchain.toml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,5 +2,5 @@
22
# standard library we currently track.
33

44
[toolchain]
5-
channel = "nightly-2024-11-03"
5+
channel = "nightly-2025-06-30"
66
components = ["llvm-tools-preview", "rustc-dev", "rust-src", "rustfmt"]

‎testable-simd-models/src/abstractions/bit.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
//! # Examples
1818
//!
1919
//! ```rust
20-
//! use core_models::abstractions::bit::{Bit, MachineInteger};
20+
//! use testable_simd_models::abstractions::bit::{Bit, MachineInteger};
2121
//!
2222
//! // Extract the 3rd bit (0-indexed) from an integer.
2323
//! let bit = Bit::of_int(42, 2);

‎testable-simd-models/src/abstractions/mod.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
//! Converting an integer to a bit vector and back:
88
//!
99
//! ```rust
10-
//! use core_models::abstractions::{bit::{Bit, MachineInteger}, bitvec::BitVec};
10+
//! use testable_simd_models::abstractions::{bit::{Bit, MachineInteger}, bitvec::BitVec};
1111
//!
1212
//! // Create a BitVec from a machine integer (using the integer's bit-width)
1313
//! let bv = BitVec::<16>::from_int(42u16);

‎testable-simd-models/src/core_arch/x86/models/avx2.rs‎

Lines changed: 50 additions & 132 deletions
Original file line numberDiff line numberDiff line change
@@ -2137,139 +2137,57 @@ pub fn _mm256_srli_si256<const IMM8: i32>(a: __m256i) -> __m256i {
21372137
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_bsrli_epi128)
21382138
21392139
pub fn _mm256_bsrli_epi128<const IMM8: i32>(a: __m256i) -> __m256i {
2140+
2141+
2142+
const fn mask(shift: i32, i: u32) -> u64 {
2143+
let shift = shift as u32 & 0xff;
2144+
if shift > 15 || (15 - (i % 16)) < shift {
2145+
0 as u64
2146+
} else {
2147+
(32 + (i + shift)) as u64
2148+
}
2149+
}
2150+
21402151
let a = BitVec::to_i8x32(a);
2141-
let zero = i8x32::from_fn(|_| 0);
2142-
let r: i8x32 = match IMM8 % 16 {
2143-
0 => simd_shuffle(
2144-
a,
2145-
zero,
2146-
[
2147-
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
2148-
23, 24, 25, 26, 27, 28, 29, 30, 31,
2149-
],
2150-
),
2151-
1 => simd_shuffle(
2152-
a,
2153-
zero,
2154-
[
2155-
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 17, 18, 19, 20, 21, 22, 23,
2156-
24, 25, 26, 27, 28, 29, 30, 31, 32,
2157-
],
2158-
),
2159-
2 => simd_shuffle(
2160-
a,
2161-
zero,
2162-
[
2163-
2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 18, 19, 20, 21, 22, 23, 24,
2164-
25, 26, 27, 28, 29, 30, 31, 32, 32,
2165-
],
2166-
),
2167-
3 => simd_shuffle(
2168-
a,
2169-
zero,
2170-
[
2171-
3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 19, 20, 21, 22, 23, 24,
2172-
25, 26, 27, 28, 29, 30, 31, 32, 32, 32,
2173-
],
2174-
),
2175-
4 => simd_shuffle(
2176-
a,
2177-
zero,
2178-
[
2179-
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 20, 21, 22, 23, 24, 25,
2180-
26, 27, 28, 29, 30, 31, 32, 32, 32, 32,
2181-
],
2182-
),
2183-
5 => simd_shuffle(
2184-
a,
2185-
zero,
2186-
[
2187-
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 21, 22, 23, 24, 25, 26,
2188-
27, 28, 29, 30, 31, 32, 32, 32, 32, 32,
2189-
],
2190-
),
2191-
6 => simd_shuffle(
2192-
a,
2193-
zero,
2194-
[
2195-
6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 22, 23, 24, 25, 26, 27,
2196-
28, 29, 30, 31, 32, 32, 32, 32, 32, 32,
2197-
],
2198-
),
2199-
7 => simd_shuffle(
2200-
a,
2201-
zero,
2202-
[
2203-
7, 8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 23, 24, 25, 26, 27,
2204-
28, 29, 30, 31, 32, 32, 32, 32, 32, 32, 32,
2205-
],
2206-
),
2207-
8 => simd_shuffle(
2208-
a,
2209-
zero,
2210-
[
2211-
8, 9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 24, 25, 26, 27, 28,
2212-
29, 30, 31, 32, 32, 32, 32, 32, 32, 32, 32,
2213-
],
2214-
),
2215-
9 => simd_shuffle(
2216-
a,
2217-
zero,
2218-
[
2219-
9, 10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 25, 26, 27, 28, 29,
2220-
30, 31, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2221-
],
2222-
),
2223-
10 => simd_shuffle(
2224-
a,
2225-
zero,
2226-
[
2227-
10, 11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 26, 27, 28, 29, 30,
2228-
31, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2229-
],
2230-
),
2231-
11 => simd_shuffle(
2232-
a,
2233-
zero,
2234-
[
2235-
11, 12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 27, 28, 29, 30, 31,
2236-
32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2237-
],
2238-
),
2239-
12 => simd_shuffle(
2240-
a,
2241-
zero,
2242-
[
2243-
12, 13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 28, 29, 30, 31, 32,
2244-
32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2245-
],
2246-
),
2247-
13 => simd_shuffle(
2248-
a,
2249-
zero,
2250-
[
2251-
13, 14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 29, 30, 31, 32, 32,
2252-
32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2253-
],
2254-
),
2255-
14 => simd_shuffle(
2256-
a,
2257-
zero,
2258-
[
2259-
14, 15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 30, 31, 32, 32, 32,
2260-
32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2261-
],
2262-
),
2263-
15 => simd_shuffle(
2264-
a,
2265-
zero,
2266-
[
2267-
15, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 31, 32, 32, 32, 32,
2268-
32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
2269-
],
2270-
),
2271-
_ => zero,
2272-
};
2152+
let r: i8x32 = simd_shuffle(
2153+
i8x32::from_fn(|_| 0),
2154+
a,
2155+
[
2156+
mask(IMM8, 0),
2157+
mask(IMM8, 1),
2158+
mask(IMM8, 2),
2159+
mask(IMM8, 3),
2160+
mask(IMM8, 4),
2161+
mask(IMM8, 5),
2162+
mask(IMM8, 6),
2163+
mask(IMM8, 7),
2164+
mask(IMM8, 8),
2165+
mask(IMM8, 9),
2166+
mask(IMM8, 10),
2167+
mask(IMM8, 11),
2168+
mask(IMM8, 12),
2169+
mask(IMM8, 13),
2170+
mask(IMM8, 14),
2171+
mask(IMM8, 15),
2172+
mask(IMM8, 16),
2173+
mask(IMM8, 17),
2174+
mask(IMM8, 18),
2175+
mask(IMM8, 19),
2176+
mask(IMM8, 20),
2177+
mask(IMM8, 21),
2178+
mask(IMM8, 22),
2179+
mask(IMM8, 23),
2180+
mask(IMM8, 24),
2181+
mask(IMM8, 25),
2182+
mask(IMM8, 26),
2183+
mask(IMM8, 27),
2184+
mask(IMM8, 28),
2185+
mask(IMM8, 29),
2186+
mask(IMM8, 30),
2187+
mask(IMM8, 31),
2188+
],
2189+
);
2190+
22732191
r.into()
22742192
}
22752193

0 commit comments

Comments
 (0)