@@ -1309,25 +1309,35 @@ void arm_smmu_make_s1_cd(struct arm_smmu_cd *target,
13091309 struct arm_smmu_domain * smmu_domain )
13101310{
13111311 struct arm_smmu_ctx_desc * cd = & smmu_domain -> cd ;
1312+ const struct io_pgtable_cfg * pgtbl_cfg =
1313+ & io_pgtable_ops_to_pgtable (smmu_domain -> pgtbl_ops )-> cfg ;
1314+ typeof (& pgtbl_cfg -> arm_lpae_s1_cfg .tcr ) tcr =
1315+ & pgtbl_cfg -> arm_lpae_s1_cfg .tcr ;
13121316
13131317 memset (target , 0 , sizeof (* target ));
13141318
13151319 target -> data [0 ] = cpu_to_le64 (
1316- cd -> tcr |
1320+ FIELD_PREP (CTXDESC_CD_0_TCR_T0SZ , tcr -> tsz ) |
1321+ FIELD_PREP (CTXDESC_CD_0_TCR_TG0 , tcr -> tg ) |
1322+ FIELD_PREP (CTXDESC_CD_0_TCR_IRGN0 , tcr -> irgn ) |
1323+ FIELD_PREP (CTXDESC_CD_0_TCR_ORGN0 , tcr -> orgn ) |
1324+ FIELD_PREP (CTXDESC_CD_0_TCR_SH0 , tcr -> sh ) |
13171325#ifdef __BIG_ENDIAN
13181326 CTXDESC_CD_0_ENDI |
13191327#endif
1328+ CTXDESC_CD_0_TCR_EPD1 |
13201329 CTXDESC_CD_0_V |
1330+ FIELD_PREP (CTXDESC_CD_0_TCR_IPS , tcr -> ips ) |
13211331 CTXDESC_CD_0_AA64 |
13221332 (master -> stall_enabled ? CTXDESC_CD_0_S : 0 ) |
13231333 CTXDESC_CD_0_R |
13241334 CTXDESC_CD_0_A |
13251335 CTXDESC_CD_0_ASET |
13261336 FIELD_PREP (CTXDESC_CD_0_ASID , cd -> asid )
13271337 );
1328-
1329- target -> data [ 1 ] = cpu_to_le64 ( cd -> ttbr & CTXDESC_CD_1_TTB0_MASK );
1330- target -> data [3 ] = cpu_to_le64 (cd -> mair );
1338+ target -> data [ 1 ] = cpu_to_le64 ( pgtbl_cfg -> arm_lpae_s1_cfg . ttbr &
1339+ CTXDESC_CD_1_TTB0_MASK );
1340+ target -> data [3 ] = cpu_to_le64 (pgtbl_cfg -> arm_lpae_s1_cfg . mair );
13311341}
13321342
13331343void arm_smmu_clear_cd (struct arm_smmu_master * master , ioasid_t ssid )
@@ -2284,45 +2294,25 @@ static void arm_smmu_domain_free(struct iommu_domain *domain)
22842294}
22852295
22862296static int arm_smmu_domain_finalise_s1 (struct arm_smmu_device * smmu ,
2287- struct arm_smmu_domain * smmu_domain ,
2288- struct io_pgtable_cfg * pgtbl_cfg )
2297+ struct arm_smmu_domain * smmu_domain )
22892298{
22902299 int ret ;
22912300 u32 asid ;
22922301 struct arm_smmu_ctx_desc * cd = & smmu_domain -> cd ;
2293- typeof (& pgtbl_cfg -> arm_lpae_s1_cfg .tcr ) tcr = & pgtbl_cfg -> arm_lpae_s1_cfg .tcr ;
22942302
22952303 refcount_set (& cd -> refs , 1 );
22962304
22972305 /* Prevent SVA from modifying the ASID until it is written to the CD */
22982306 mutex_lock (& arm_smmu_asid_lock );
22992307 ret = xa_alloc (& arm_smmu_asid_xa , & asid , cd ,
23002308 XA_LIMIT (1 , (1 << smmu -> asid_bits ) - 1 ), GFP_KERNEL );
2301- if (ret )
2302- goto out_unlock ;
2303-
23042309 cd -> asid = (u16 )asid ;
2305- cd -> ttbr = pgtbl_cfg -> arm_lpae_s1_cfg .ttbr ;
2306- cd -> tcr = FIELD_PREP (CTXDESC_CD_0_TCR_T0SZ , tcr -> tsz ) |
2307- FIELD_PREP (CTXDESC_CD_0_TCR_TG0 , tcr -> tg ) |
2308- FIELD_PREP (CTXDESC_CD_0_TCR_IRGN0 , tcr -> irgn ) |
2309- FIELD_PREP (CTXDESC_CD_0_TCR_ORGN0 , tcr -> orgn ) |
2310- FIELD_PREP (CTXDESC_CD_0_TCR_SH0 , tcr -> sh ) |
2311- FIELD_PREP (CTXDESC_CD_0_TCR_IPS , tcr -> ips ) |
2312- CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64 ;
2313- cd -> mair = pgtbl_cfg -> arm_lpae_s1_cfg .mair ;
2314-
2315- mutex_unlock (& arm_smmu_asid_lock );
2316- return 0 ;
2317-
2318- out_unlock :
23192310 mutex_unlock (& arm_smmu_asid_lock );
23202311 return ret ;
23212312}
23222313
23232314static int arm_smmu_domain_finalise_s2 (struct arm_smmu_device * smmu ,
2324- struct arm_smmu_domain * smmu_domain ,
2325- struct io_pgtable_cfg * pgtbl_cfg )
2315+ struct arm_smmu_domain * smmu_domain )
23262316{
23272317 int vmid ;
23282318 struct arm_smmu_s2_cfg * cfg = & smmu_domain -> s2_cfg ;
@@ -2346,8 +2336,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_domain *smmu_domain,
23462336 struct io_pgtable_cfg pgtbl_cfg ;
23472337 struct io_pgtable_ops * pgtbl_ops ;
23482338 int (* finalise_stage_fn )(struct arm_smmu_device * smmu ,
2349- struct arm_smmu_domain * smmu_domain ,
2350- struct io_pgtable_cfg * pgtbl_cfg );
2339+ struct arm_smmu_domain * smmu_domain );
23512340
23522341 /* Restrict the stage to what we can actually support */
23532342 if (!(smmu -> features & ARM_SMMU_FEAT_TRANS_S1 ))
@@ -2390,7 +2379,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_domain *smmu_domain,
23902379 smmu_domain -> domain .geometry .aperture_end = (1UL << pgtbl_cfg .ias ) - 1 ;
23912380 smmu_domain -> domain .geometry .force_aperture = true;
23922381
2393- ret = finalise_stage_fn (smmu , smmu_domain , & pgtbl_cfg );
2382+ ret = finalise_stage_fn (smmu , smmu_domain );
23942383 if (ret < 0 ) {
23952384 free_io_pgtable_ops (pgtbl_ops );
23962385 return ret ;
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