1313#define QM_DFX_COMMON_LEN 0xC3
1414#define QM_DFX_REGS_LEN 4UL
1515#define QM_DBG_TMP_BUF_LEN 22
16+ #define QM_XQC_ADDR_MASK GENMASK(31, 0)
1617#define CURRENT_FUN_MASK GENMASK(5, 0)
1718#define CURRENT_Q_MASK GENMASK(31, 16)
1819#define QM_SQE_ADDR_MASK GENMASK(7, 0)
@@ -167,7 +168,6 @@ static void dump_show(struct hisi_qm *qm, void *info,
167168static int qm_sqc_dump (struct hisi_qm * qm , char * s , char * name )
168169{
169170 struct device * dev = & qm -> pdev -> dev ;
170- struct qm_sqc * sqc_curr ;
171171 struct qm_sqc sqc ;
172172 u32 qp_id ;
173173 int ret ;
@@ -183,16 +183,19 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
183183
184184 ret = qm_set_and_get_xqc (qm , QM_MB_CMD_SQC , & sqc , qp_id , 1 );
185185 if (!ret ) {
186+ sqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
187+ sqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
186188 dump_show (qm , & sqc , sizeof (struct qm_sqc ), name );
187189
188190 return 0 ;
189191 }
190192
191193 down_read (& qm -> qps_lock );
192194 if (qm -> sqc ) {
193- sqc_curr = qm -> sqc + qp_id ;
194-
195- dump_show (qm , sqc_curr , sizeof (* sqc_curr ), "SOFT SQC" );
195+ memcpy (& sqc , qm -> sqc + qp_id * sizeof (struct qm_sqc ), sizeof (struct qm_sqc ));
196+ sqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
197+ sqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
198+ dump_show (qm , & sqc , sizeof (struct qm_sqc ), "SOFT SQC" );
196199 }
197200 up_read (& qm -> qps_lock );
198201
@@ -202,7 +205,6 @@ static int qm_sqc_dump(struct hisi_qm *qm, char *s, char *name)
202205static int qm_cqc_dump (struct hisi_qm * qm , char * s , char * name )
203206{
204207 struct device * dev = & qm -> pdev -> dev ;
205- struct qm_cqc * cqc_curr ;
206208 struct qm_cqc cqc ;
207209 u32 qp_id ;
208210 int ret ;
@@ -218,16 +220,19 @@ static int qm_cqc_dump(struct hisi_qm *qm, char *s, char *name)
218220
219221 ret = qm_set_and_get_xqc (qm , QM_MB_CMD_CQC , & cqc , qp_id , 1 );
220222 if (!ret ) {
223+ cqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
224+ cqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
221225 dump_show (qm , & cqc , sizeof (struct qm_cqc ), name );
222226
223227 return 0 ;
224228 }
225229
226230 down_read (& qm -> qps_lock );
227231 if (qm -> cqc ) {
228- cqc_curr = qm -> cqc + qp_id ;
229-
230- dump_show (qm , cqc_curr , sizeof (* cqc_curr ), "SOFT CQC" );
232+ memcpy (& cqc , qm -> cqc + qp_id * sizeof (struct qm_cqc ), sizeof (struct qm_cqc ));
233+ cqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
234+ cqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
235+ dump_show (qm , & cqc , sizeof (struct qm_cqc ), "SOFT CQC" );
231236 }
232237 up_read (& qm -> qps_lock );
233238
@@ -263,6 +268,10 @@ static int qm_eqc_aeqc_dump(struct hisi_qm *qm, char *s, char *name)
263268 if (ret )
264269 return ret ;
265270
271+ aeqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
272+ aeqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
273+ eqc .base_h = cpu_to_le32 (QM_XQC_ADDR_MASK );
274+ eqc .base_l = cpu_to_le32 (QM_XQC_ADDR_MASK );
266275 dump_show (qm , xeqc , size , name );
267276
268277 return ret ;
@@ -310,10 +319,10 @@ static int q_dump_param_parse(struct hisi_qm *qm, char *s,
310319
311320static int qm_sq_dump (struct hisi_qm * qm , char * s , char * name )
312321{
313- u16 sq_depth = qm -> qp_array -> cq_depth ;
314- void * sqe ;
322+ u16 sq_depth = qm -> qp_array -> sq_depth ;
315323 struct hisi_qp * qp ;
316324 u32 qp_id , sqe_id ;
325+ void * sqe ;
317326 int ret ;
318327
319328 ret = q_dump_param_parse (qm , s , & sqe_id , & qp_id , sq_depth );
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