@@ -212,7 +212,7 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
212212
213213 hdmi -> regmap = syscon_regmap_lookup_by_phandle (np , "rockchip,grf" );
214214 if (IS_ERR (hdmi -> regmap )) {
215- DRM_DEV_ERROR (hdmi -> dev , "Unable to get rockchip,grf\n" );
215+ drm_err (hdmi , "Unable to get rockchip,grf\n" );
216216 return PTR_ERR (hdmi -> regmap );
217217 }
218218
@@ -223,7 +223,7 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
223223 if (PTR_ERR (hdmi -> ref_clk ) == - EPROBE_DEFER ) {
224224 return - EPROBE_DEFER ;
225225 } else if (IS_ERR (hdmi -> ref_clk )) {
226- DRM_DEV_ERROR (hdmi -> dev , "failed to get reference clock\n" );
226+ drm_err (hdmi , "failed to get reference clock\n" );
227227 return PTR_ERR (hdmi -> ref_clk );
228228 }
229229
@@ -233,7 +233,7 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
233233 } else if (PTR_ERR (hdmi -> grf_clk ) == - EPROBE_DEFER ) {
234234 return - EPROBE_DEFER ;
235235 } else if (IS_ERR (hdmi -> grf_clk )) {
236- DRM_DEV_ERROR (hdmi -> dev , "failed to get grf clock\n" );
236+ drm_err (hdmi , "failed to get grf clock\n" );
237237 return PTR_ERR (hdmi -> grf_clk );
238238 }
239239
@@ -322,17 +322,16 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
322322
323323 ret = clk_prepare_enable (hdmi -> grf_clk );
324324 if (ret < 0 ) {
325- DRM_DEV_ERROR (hdmi -> dev , "failed to enable grfclk %d\n" , ret );
325+ drm_err (hdmi , "failed to enable grfclk %d\n" , ret );
326326 return ;
327327 }
328328
329329 ret = regmap_write (hdmi -> regmap , hdmi -> chip_data -> lcdsel_grf_reg , val );
330330 if (ret != 0 )
331- DRM_DEV_ERROR (hdmi -> dev , "Could not write to GRF: %d\n" , ret );
331+ drm_err (hdmi , "Could not write to GRF: %d\n" , ret );
332332
333333 clk_disable_unprepare (hdmi -> grf_clk );
334- DRM_DEV_DEBUG (hdmi -> dev , "vop %s output to hdmi\n" ,
335- ret ? "LIT" : "BIG" );
334+ drm_dbg (hdmi , "vop %s output to hdmi\n" , ret ? "LIT" : "BIG" );
336335}
337336
338337static int
@@ -592,34 +591,33 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
592591 ret = rockchip_hdmi_parse_dt (hdmi );
593592 if (ret ) {
594593 if (ret != - EPROBE_DEFER )
595- DRM_DEV_ERROR (hdmi -> dev , "Unable to parse OF data\n" );
594+ drm_err (hdmi , "Unable to parse OF data\n" );
596595 return ret ;
597596 }
598597
599598 hdmi -> phy = devm_phy_optional_get (dev , "hdmi" );
600599 if (IS_ERR (hdmi -> phy )) {
601600 ret = PTR_ERR (hdmi -> phy );
602601 if (ret != - EPROBE_DEFER )
603- DRM_DEV_ERROR (hdmi -> dev , "failed to get phy\n" );
602+ drm_err (hdmi , "failed to get phy\n" );
604603 return ret ;
605604 }
606605
607606 ret = regulator_enable (hdmi -> avdd_0v9 );
608607 if (ret ) {
609- DRM_DEV_ERROR (hdmi -> dev , "failed to enable avdd0v9: %d\n" , ret );
608+ drm_err (hdmi , "failed to enable avdd0v9: %d\n" , ret );
610609 goto err_avdd_0v9 ;
611610 }
612611
613612 ret = regulator_enable (hdmi -> avdd_1v8 );
614613 if (ret ) {
615- DRM_DEV_ERROR (hdmi -> dev , "failed to enable avdd1v8: %d\n" , ret );
614+ drm_err (hdmi , "failed to enable avdd1v8: %d\n" , ret );
616615 goto err_avdd_1v8 ;
617616 }
618617
619618 ret = clk_prepare_enable (hdmi -> ref_clk );
620619 if (ret ) {
621- DRM_DEV_ERROR (hdmi -> dev , "Failed to enable HDMI reference clock: %d\n" ,
622- ret );
620+ drm_err (hdmi , "Failed to enable HDMI reference clock: %d\n" , ret );
623621 goto err_clk ;
624622 }
625623
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