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Alexandre Ghitipalmer-dabbelt
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riscv: Fix fully ordered LR/SC xchg[8|16]() implementations
The fully ordered versions of xchg[8|16]() using LR/SC lack the necessary memory barriers to guarantee the order. Fix this by matching what is already implemented in the fully ordered versions of cmpxchg() using LR/SC. Suggested-by: Andrea Parri <[email protected]> Reported-by: Andrea Parri <[email protected]> Closes: https://lore.kernel.org/linux-riscv/ZlYbupL5XgzgA0MX@andrea/T/#u Fixes: a8ed2b7 ("riscv/cmpxchg: Implement xchg for variables of size 1 and 2") Signed-off-by: Alexandre Ghiti <[email protected]> Reviewed-by: Andrea Parri <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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arch/riscv/include/asm/cmpxchg.h

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010

1111
#include <asm/fence.h>
1212

13-
#define __arch_xchg_masked(prepend, append, r, p, n) \
13+
#define __arch_xchg_masked(sc_sfx, prepend, append, r, p, n) \
1414
({ \
1515
u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \
1616
ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \
@@ -25,7 +25,7 @@
2525
"0: lr.w %0, %2\n" \
2626
" and %1, %0, %z4\n" \
2727
" or %1, %1, %z3\n" \
28-
" sc.w %1, %1, %2\n" \
28+
" sc.w" sc_sfx " %1, %1, %2\n" \
2929
" bnez %1, 0b\n" \
3030
append \
3131
: "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \
@@ -46,7 +46,8 @@
4646
: "memory"); \
4747
})
4848

49-
#define _arch_xchg(ptr, new, sfx, prepend, append) \
49+
#define _arch_xchg(ptr, new, sc_sfx, swap_sfx, prepend, \
50+
sc_append, swap_append) \
5051
({ \
5152
__typeof__(ptr) __ptr = (ptr); \
5253
__typeof__(*(__ptr)) __new = (new); \
@@ -55,15 +56,15 @@
5556
switch (sizeof(*__ptr)) { \
5657
case 1: \
5758
case 2: \
58-
__arch_xchg_masked(prepend, append, \
59+
__arch_xchg_masked(sc_sfx, prepend, sc_append, \
5960
__ret, __ptr, __new); \
6061
break; \
6162
case 4: \
62-
__arch_xchg(".w" sfx, prepend, append, \
63+
__arch_xchg(".w" swap_sfx, prepend, swap_append, \
6364
__ret, __ptr, __new); \
6465
break; \
6566
case 8: \
66-
__arch_xchg(".d" sfx, prepend, append, \
67+
__arch_xchg(".d" swap_sfx, prepend, swap_append, \
6768
__ret, __ptr, __new); \
6869
break; \
6970
default: \
@@ -73,16 +74,17 @@
7374
})
7475

7576
#define arch_xchg_relaxed(ptr, x) \
76-
_arch_xchg(ptr, x, "", "", "")
77+
_arch_xchg(ptr, x, "", "", "", "", "")
7778

7879
#define arch_xchg_acquire(ptr, x) \
79-
_arch_xchg(ptr, x, "", "", RISCV_ACQUIRE_BARRIER)
80+
_arch_xchg(ptr, x, "", "", "", \
81+
RISCV_ACQUIRE_BARRIER, RISCV_ACQUIRE_BARRIER)
8082

8183
#define arch_xchg_release(ptr, x) \
82-
_arch_xchg(ptr, x, "", RISCV_RELEASE_BARRIER, "")
84+
_arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "", "")
8385

8486
#define arch_xchg(ptr, x) \
85-
_arch_xchg(ptr, x, ".aqrl", "", "")
87+
_arch_xchg(ptr, x, ".rl", ".aqrl", "", RISCV_FULL_BARRIER, "")
8688

8789
#define xchg32(ptr, x) \
8890
({ \

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