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Merge tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "New hardware support: - Allwinner H616 dma support - Renesas r8a779h0 dma controller support - TI CSI2RX dma support Updates: - Freescale edma driver updates for TCD64csupport for i.MX95 - constify of pointers and args - Yaml conversion for MediaTek High-Speed controller binding - TI k3 udma support for TX/RX DMA channels for thread IDs: * tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (25 commits) dmaengine: of: constify of_phandle_args in of_dma_find_controller() dmaengine: pl08x: constify pointer to char in filter function MAINTAINERS: change in AMD ptdma maintainer MAINTAINERS: adjust file entry in MEDIATEK DMA DRIVER dmaengine: idxd: constify the struct device_type usage dt-bindings: renesas,rcar-dmac: Add r8a779h0 support dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema dmaengine: idxd: make dsa_bus_type const dmaengine: fsl-edma: integrate TCD64 support for i.MX95 dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan dmaengine: fsl-edma: fix spare build warning dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() dt-bindings: mmp-dma: convert to YAML dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX dmaengine: ti: k3-udma-glue: Add function to request RX chan for thread ID dmaengine: ti: k3-udma-glue: Add function to request TX chan for thread ID dmaengine: ti: k3-udma-glue: Update name for remote RX channel device dmaengine: ti: k3-udma-glue: Add function to parse channel by ID ...
2 parents b898db9 + 716141d commit 2b3a419

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-294
lines changed

‎Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml‎

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@@ -28,6 +28,9 @@ properties:
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- items:
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- const: allwinner,sun8i-r40-dma
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- const: allwinner,sun50i-a64-dma
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- items:
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- const: allwinner,sun50i-h616-dma
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- const: allwinner,sun50i-a100-dma
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reg:
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maxItems: 1
@@ -59,10 +62,11 @@ required:
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if:
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properties:
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compatible:
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enum:
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- allwinner,sun20i-d1-dma
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- allwinner,sun50i-a100-dma
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- allwinner,sun50i-h6-dma
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contains:
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enum:
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- allwinner,sun20i-d1-dma
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- allwinner,sun50i-a100-dma
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- allwinner,sun50i-h6-dma
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then:
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properties:

‎Documentation/devicetree/bindings/dma/fsl,edma.yaml‎

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@@ -25,6 +25,7 @@ properties:
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- fsl,imx8qm-edma
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- fsl,imx93-edma3
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- fsl,imx93-edma4
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- fsl,imx95-edma5
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- items:
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- const: fsl,ls1028a-edma
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- const: fsl,vf610-edma
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- fsl,imx8qm-edma
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- fsl,imx93-edma3
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- fsl,imx93-edma4
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- fsl,imx95-edma5
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then:
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properties:
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"#dma-cells":

‎Documentation/devicetree/bindings/dma/marvell,mmp-dma.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell MMP DMA controller
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maintainers:
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- Duje Mihanović <[email protected]>
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description:
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Marvell MMP SoCs may have two types of DMA controllers, peripheral and audio.
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properties:
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compatible:
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enum:
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- marvell,pdma-1.0
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- marvell,adma-1.0
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- marvell,pxa910-squ
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reg:
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maxItems: 1
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interrupts:
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description:
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Interrupt lines for the controller, may be shared or one per DMA channel
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minItems: 1
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asram:
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description:
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A phandle to the SRAM pool
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$ref: /schemas/types.yaml#/definitions/phandle
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'#dma-channels':
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deprecated: true
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'#dma-requests':
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deprecated: true
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required:
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- compatible
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- reg
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- interrupts
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- '#dma-cells'
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allOf:
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- $ref: dma-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- marvell,pdma-1.0
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then:
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properties:
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asram: false
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else:
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required:
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- asram
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unevaluatedProperties: false
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examples:
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- |
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dma-controller@d4000000 {
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compatible = "marvell,pdma-1.0";
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reg = <0xd4000000 0x10000>;
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interrupts = <47>;
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#dma-cells = <2>;
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dma-channels = <16>;
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};

‎Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek High-Speed DMA Controller
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maintainers:
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- Sean Wang <[email protected]>
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allOf:
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- $ref: dma-controller.yaml#
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properties:
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compatible:
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enum:
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- mediatek,mt7622-hsdma
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- mediatek,mt7623-hsdma
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: hsdma
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power-domains:
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maxItems: 1
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"#dma-cells":
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description: Channel number
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const: 1
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required:
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt2701-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/mt2701-power.h>
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dma-controller@1b007000 {
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compatible = "mediatek,mt7623-hsdma";
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reg = <0x1b007000 0x1000>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&ethsys CLK_ETHSYS_HSDMA>;
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clock-names = "hsdma";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
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#dma-cells = <1>;
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};

‎Documentation/devicetree/bindings/dma/mmp-dma.txt‎

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This file was deleted.

‎Documentation/devicetree/bindings/dma/mtk-hsdma.txt‎

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‎Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml‎

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- renesas,dmac-r8a779a0 # R-Car V3U
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- renesas,dmac-r8a779f0 # R-Car S4-8
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- renesas,dmac-r8a779g0 # R-Car V4H
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- renesas,dmac-r8a779h0 # R-Car V4M
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- const: renesas,rcar-gen4-dmac # R-Car Gen4
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reg: true

‎MAINTAINERS‎

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F: tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py
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AMD PTDMA DRIVER
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M: Sanjay R Mehta <sanju.mehta@amd.com>
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M: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
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L: [email protected]
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S: Maintained
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F: drivers/dma/ptdma/
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L: [email protected] (moderated for non-subscribers)
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L: [email protected] (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/dma/mtk-*
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F: Documentation/devicetree/bindings/dma/mediatek,*
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F: drivers/dma/mediatek/
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MEDIATEK ETHERNET DRIVER

‎drivers/dma/Kconfig‎

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config TEGRA210_ADMA
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tristate "NVIDIA Tegra210 ADMA support"
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depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
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depends on (ARCH_TEGRA || COMPILE_TEST)
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the NVIDIA Tegra210 ADMA controller driver. The
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DMA controller has multiple DMA channels and is used to service
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various audio clients in the Tegra210 audio processing engine
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(APE). This DMA controller transfers data from memory to
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peripheral and vice versa. It does not support memory to
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memory data transfer.
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Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA
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controller driver. The DMA controller has multiple DMA channels
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and is used to service various audio clients in the Tegra210
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audio processing engine (APE). This DMA controller transfers
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data from memory to peripheral and vice versa. It does not
655+
support memory to memory data transfer.
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config TIMB_DMA
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tristate "Timberdale FPGA DMA support"

‎drivers/dma/amba-pl08x.c‎

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bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
22402240
{
22412241
struct pl08x_dma_chan *plchan;
2242-
char *name = chan_id;
2242+
const char *name = chan_id;
22432243

22442244
/* Reject channels for devices not bound to this driver */
22452245
if (chan->device->dev->driver != &pl08x_amba_driver.drv)

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