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drm/i915: Replace to_bpp_x16() with fxp_q4_from_int()
Replace the to_bpp_x16() helper defined by the driver with the equivalent fxp_q4_from_int() helper defined by DRM core. v2: Rebase on the s/drm_x16/fxp_q4 change. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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6 files changed

+25
-24
lines changed

6 files changed

+25
-24
lines changed

drivers/gpu/drm/i915/display/intel_bios.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
#include <drm/display/drm_dp_helper.h>
3131
#include <drm/display/drm_dsc_helper.h>
3232
#include <drm/drm_edid.h>
33+
#include <drm/drm_fixed.h>
3334

3435
#include "i915_drv.h"
3536
#include "i915_reg.h"
@@ -3521,8 +3522,8 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
35213522

35223523
crtc_state->pipe_bpp = bpc * 3;
35233524

3524-
crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(min(crtc_state->pipe_bpp,
3525-
VBT_DSC_MAX_BPP(dsc->max_bpp)));
3525+
crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp,
3526+
VBT_DSC_MAX_BPP(dsc->max_bpp)));
35263527

35273528
/*
35283529
* FIXME: This is ugly, and slice count should take DSC engine

drivers/gpu/drm/i915/display/intel_display_types.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2218,11 +2218,6 @@ static inline int to_bpp_int_roundup(int bpp_x16)
22182218
return (bpp_x16 + 0xf) >> 4;
22192219
}
22202220

2221-
static inline int to_bpp_x16(int bpp)
2222-
{
2223-
return bpp << 4;
2224-
}
2225-
22262221
/*
22272222
* Conversion functions/macros from various pointer types to struct
22282223
* intel_display pointer.

drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@
4343
#include <drm/drm_atomic_helper.h>
4444
#include <drm/drm_crtc.h>
4545
#include <drm/drm_edid.h>
46+
#include <drm/drm_fixed.h>
4647
#include <drm/drm_probe_helper.h>
4748

4849
#include "g4x_dp.h"
@@ -2022,7 +2023,7 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
20222023
timeslots);
20232024
if (ret == 0) {
20242025
pipe_config->dsc.compressed_bpp_x16 =
2025-
to_bpp_x16(valid_dsc_bpp[i]);
2026+
fxp_q4_from_int(valid_dsc_bpp[i]);
20262027
return 0;
20272028
}
20282029
}
@@ -2275,7 +2276,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
22752276
dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
22762277

22772278
pipe_config->dsc.compressed_bpp_x16 =
2278-
to_bpp_x16(max(dsc_min_bpp, dsc_max_bpp));
2279+
fxp_q4_from_int(max(dsc_min_bpp, dsc_max_bpp));
22792280

22802281
pipe_config->pipe_bpp = pipe_bpp;
22812282

@@ -2407,15 +2408,15 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
24072408
int max_link_bpp_x16;
24082409

24092410
max_link_bpp_x16 = min(crtc_state->max_link_bpp_x16,
2410-
to_bpp_x16(limits->pipe.max_bpp));
2411+
fxp_q4_from_int(limits->pipe.max_bpp));
24112412

24122413
if (!dsc) {
2413-
max_link_bpp_x16 = rounddown(max_link_bpp_x16, to_bpp_x16(2 * 3));
2414+
max_link_bpp_x16 = rounddown(max_link_bpp_x16, fxp_q4_from_int(2 * 3));
24142415

2415-
if (max_link_bpp_x16 < to_bpp_x16(limits->pipe.min_bpp))
2416+
if (max_link_bpp_x16 < fxp_q4_from_int(limits->pipe.min_bpp))
24162417
return false;
24172418

2418-
limits->link.min_bpp_x16 = to_bpp_x16(limits->pipe.min_bpp);
2419+
limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp);
24192420
} else {
24202421
/*
24212422
* TODO: set the DSC link limits already here, atm these are
@@ -3061,8 +3062,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
30613062
if (pipe_config->dsc.compression_enable)
30623063
link_bpp_x16 = pipe_config->dsc.compressed_bpp_x16;
30633064
else
3064-
link_bpp_x16 = to_bpp_x16(intel_dp_output_bpp(pipe_config->output_format,
3065-
pipe_config->pipe_bpp));
3065+
link_bpp_x16 = fxp_q4_from_int(intel_dp_output_bpp(pipe_config->output_format,
3066+
pipe_config->pipe_bpp));
30663067

30673068
if (intel_dp->mso_link_count) {
30683069
int n = intel_dp->mso_link_count;

drivers/gpu/drm/i915/display/intel_dp_mst.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -212,8 +212,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
212212

213213
drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
214214

215-
link_bpp_x16 = to_bpp_x16(dsc ? bpp :
216-
intel_dp_output_bpp(crtc_state->output_format, bpp));
215+
link_bpp_x16 = fxp_q4_from_int(dsc ? bpp :
216+
intel_dp_output_bpp(crtc_state->output_format, bpp));
217217

218218
local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, connector,
219219
false, dsc, link_bpp_x16);
@@ -290,7 +290,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
290290
if (!dsc)
291291
crtc_state->pipe_bpp = bpp;
292292
else
293-
crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(bpp);
293+
crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(bpp);
294294
drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp %d dsc %d\n", slots, bpp, dsc);
295295
}
296296

@@ -479,20 +479,20 @@ adjust_limits_for_dsc_hblank_expansion_quirk(const struct intel_connector *conne
479479
crtc->base.base.id, crtc->base.name,
480480
connector->base.base.id, connector->base.name);
481481

482-
if (limits->link.max_bpp_x16 < to_bpp_x16(24))
482+
if (limits->link.max_bpp_x16 < fxp_q4_from_int(24))
483483
return false;
484484

485-
limits->link.min_bpp_x16 = to_bpp_x16(24);
485+
limits->link.min_bpp_x16 = fxp_q4_from_int(24);
486486

487487
return true;
488488
}
489489

490490
drm_WARN_ON(&i915->drm, limits->min_rate != limits->max_rate);
491491

492492
if (limits->max_rate < 540000)
493-
min_bpp_x16 = to_bpp_x16(13);
493+
min_bpp_x16 = fxp_q4_from_int(13);
494494
else if (limits->max_rate < 810000)
495-
min_bpp_x16 = to_bpp_x16(10);
495+
min_bpp_x16 = fxp_q4_from_int(10);
496496

497497
if (limits->link.min_bpp_x16 >= min_bpp_x16)
498498
return true;

drivers/gpu/drm/i915/display/intel_fdi.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,8 @@
55

66
#include <linux/string_helpers.h>
77

8+
#include <drm/drm_fixed.h>
9+
810
#include "i915_reg.h"
911
#include "intel_atomic.h"
1012
#include "intel_crtc.h"
@@ -340,7 +342,7 @@ int ilk_fdi_compute_config(struct intel_crtc *crtc,
340342

341343
pipe_config->fdi_lanes = lane;
342344

343-
intel_link_compute_m_n(to_bpp_x16(pipe_config->pipe_bpp),
345+
intel_link_compute_m_n(fxp_q4_from_int(pipe_config->pipe_bpp),
344346
lane, fdi_dotclock,
345347
link_bw,
346348
intel_dp_bw_fec_overhead(false),

drivers/gpu/drm/i915/display/intel_link_bw.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33
* Copyright © 2023 Intel Corporation
44
*/
55

6+
#include <drm/drm_fixed.h>
7+
68
#include "i915_drv.h"
79

810
#include "intel_atomic.h"
@@ -93,7 +95,7 @@ int intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
9395
* is based on the pipe bpp value, set the actual link bpp
9496
* limit here once the MST BW allocation is fixed.
9597
*/
96-
link_bpp_x16 = to_bpp_x16(crtc_state->pipe_bpp);
98+
link_bpp_x16 = fxp_q4_from_int(crtc_state->pipe_bpp);
9799

98100
if (link_bpp_x16 > max_bpp_x16) {
99101
max_bpp_x16 = link_bpp_x16;

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