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petegriffinkrzk
petegriffin
authored and
krzk
committed
pinctrl: samsung: refactor drvdata suspend & resume callbacks
This enables the clk_enable() and clk_disable() logic to be removed from each callback, but otherwise should have no functional impact. It is a prepatory patch so that the callbacks can become SoC specific. Signed-off-by: Peter Griffin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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4 files changed

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‎drivers/pinctrl/samsung/pinctrl-exynos.c‎

Lines changed: 21 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -762,19 +762,11 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
762762
return 0;
763763
}
764764

765-
static void exynos_pinctrl_suspend_bank(
766-
struct samsung_pinctrl_drv_data *drvdata,
767-
struct samsung_pin_bank *bank)
765+
static void exynos_pinctrl_suspend_bank(struct samsung_pin_bank *bank)
768766
{
769767
struct exynos_eint_gpio_save *save = bank->soc_priv;
770768
const void __iomem *regs = bank->eint_base;
771769

772-
if (clk_enable(bank->drvdata->pclk)) {
773-
dev_err(bank->gpio_chip.parent,
774-
"unable to enable clock for saving state\n");
775-
return;
776-
}
777-
778770
save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
779771
+ bank->eint_offset);
780772
save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
@@ -784,71 +776,46 @@ static void exynos_pinctrl_suspend_bank(
784776
save->eint_mask = readl(regs + bank->irq_chip->eint_mask
785777
+ bank->eint_offset);
786778

787-
clk_disable(bank->drvdata->pclk);
788-
789779
pr_debug("%s: save con %#010x\n", bank->name, save->eint_con);
790780
pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0);
791781
pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1);
792782
pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask);
793783
}
794784

795-
static void exynosauto_pinctrl_suspend_bank(struct samsung_pinctrl_drv_data *drvdata,
796-
struct samsung_pin_bank *bank)
785+
static void exynosauto_pinctrl_suspend_bank(struct samsung_pin_bank *bank)
797786
{
798787
struct exynos_eint_gpio_save *save = bank->soc_priv;
799788
const void __iomem *regs = bank->eint_base;
800789

801-
if (clk_enable(bank->drvdata->pclk)) {
802-
dev_err(bank->gpio_chip.parent,
803-
"unable to enable clock for saving state\n");
804-
return;
805-
}
806-
807790
save->eint_con = readl(regs + bank->pctl_offset + bank->eint_con_offset);
808791
save->eint_mask = readl(regs + bank->pctl_offset + bank->eint_mask_offset);
809792

810-
clk_disable(bank->drvdata->pclk);
811-
812793
pr_debug("%s: save con %#010x\n", bank->name, save->eint_con);
813794
pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask);
814795
}
815796

816-
void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
797+
void exynos_pinctrl_suspend(struct samsung_pin_bank *bank)
817798
{
818-
struct samsung_pin_bank *bank = drvdata->pin_banks;
819799
struct exynos_irq_chip *irq_chip = NULL;
820-
int i;
821800

822-
for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
823-
if (bank->eint_type == EINT_TYPE_GPIO) {
824-
if (bank->eint_con_offset)
825-
exynosauto_pinctrl_suspend_bank(drvdata, bank);
826-
else
827-
exynos_pinctrl_suspend_bank(drvdata, bank);
828-
}
829-
else if (bank->eint_type == EINT_TYPE_WKUP) {
830-
if (!irq_chip) {
831-
irq_chip = bank->irq_chip;
832-
irq_chip->set_eint_wakeup_mask(drvdata,
833-
irq_chip);
834-
}
801+
if (bank->eint_type == EINT_TYPE_GPIO) {
802+
if (bank->eint_con_offset)
803+
exynosauto_pinctrl_suspend_bank(bank);
804+
else
805+
exynos_pinctrl_suspend_bank(bank);
806+
} else if (bank->eint_type == EINT_TYPE_WKUP) {
807+
if (!irq_chip) {
808+
irq_chip = bank->irq_chip;
809+
irq_chip->set_eint_wakeup_mask(bank->drvdata, irq_chip);
835810
}
836811
}
837812
}
838813

839-
static void exynos_pinctrl_resume_bank(
840-
struct samsung_pinctrl_drv_data *drvdata,
841-
struct samsung_pin_bank *bank)
814+
static void exynos_pinctrl_resume_bank(struct samsung_pin_bank *bank)
842815
{
843816
struct exynos_eint_gpio_save *save = bank->soc_priv;
844817
void __iomem *regs = bank->eint_base;
845818

846-
if (clk_enable(bank->drvdata->pclk)) {
847-
dev_err(bank->gpio_chip.parent,
848-
"unable to enable clock for restoring state\n");
849-
return;
850-
}
851-
852819
pr_debug("%s: con %#010x => %#010x\n", bank->name,
853820
readl(regs + EXYNOS_GPIO_ECON_OFFSET
854821
+ bank->eint_offset), save->eint_con);
@@ -870,22 +837,13 @@ static void exynos_pinctrl_resume_bank(
870837
+ 2 * bank->eint_offset + 4);
871838
writel(save->eint_mask, regs + bank->irq_chip->eint_mask
872839
+ bank->eint_offset);
873-
874-
clk_disable(bank->drvdata->pclk);
875840
}
876841

877-
static void exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvdata,
878-
struct samsung_pin_bank *bank)
842+
static void exynosauto_pinctrl_resume_bank(struct samsung_pin_bank *bank)
879843
{
880844
struct exynos_eint_gpio_save *save = bank->soc_priv;
881845
void __iomem *regs = bank->eint_base;
882846

883-
if (clk_enable(bank->drvdata->pclk)) {
884-
dev_err(bank->gpio_chip.parent,
885-
"unable to enable clock for restoring state\n");
886-
return;
887-
}
888-
889847
pr_debug("%s: con %#010x => %#010x\n", bank->name,
890848
readl(regs + bank->pctl_offset + bank->eint_con_offset), save->eint_con);
891849
pr_debug("%s: mask %#010x => %#010x\n", bank->name,
@@ -894,21 +852,16 @@ static void exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvd
894852
writel(save->eint_con, regs + bank->pctl_offset + bank->eint_con_offset);
895853
writel(save->eint_mask, regs + bank->pctl_offset + bank->eint_mask_offset);
896854

897-
clk_disable(bank->drvdata->pclk);
898855
}
899856

900-
void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
857+
void exynos_pinctrl_resume(struct samsung_pin_bank *bank)
901858
{
902-
struct samsung_pin_bank *bank = drvdata->pin_banks;
903-
int i;
904-
905-
for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
906-
if (bank->eint_type == EINT_TYPE_GPIO) {
907-
if (bank->eint_con_offset)
908-
exynosauto_pinctrl_resume_bank(drvdata, bank);
909-
else
910-
exynos_pinctrl_resume_bank(drvdata, bank);
911-
}
859+
if (bank->eint_type == EINT_TYPE_GPIO) {
860+
if (bank->eint_con_offset)
861+
exynosauto_pinctrl_resume_bank(bank);
862+
else
863+
exynos_pinctrl_resume_bank(bank);
864+
}
912865
}
913866

914867
static void exynos_retention_enable(struct samsung_pinctrl_drv_data *drvdata)

‎drivers/pinctrl/samsung/pinctrl-exynos.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -240,8 +240,8 @@ struct exynos_muxed_weint_data {
240240

241241
int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d);
242242
int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d);
243-
void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata);
244-
void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata);
243+
void exynos_pinctrl_suspend(struct samsung_pin_bank *bank);
244+
void exynos_pinctrl_resume(struct samsung_pin_bank *bank);
245245
struct samsung_retention_ctrl *
246246
exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
247247
const struct samsung_retention_data *data);

‎drivers/pinctrl/samsung/pinctrl-samsung.c‎

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1333,6 +1333,7 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
13331333
static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
13341334
{
13351335
struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1336+
struct samsung_pin_bank *bank;
13361337
int i;
13371338

13381339
i = clk_enable(drvdata->pclk);
@@ -1343,7 +1344,7 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
13431344
}
13441345

13451346
for (i = 0; i < drvdata->nr_banks; i++) {
1346-
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1347+
bank = &drvdata->pin_banks[i];
13471348
const void __iomem *reg = bank->pctl_base + bank->pctl_offset;
13481349
const u8 *offs = bank->type->reg_offset;
13491350
const u8 *widths = bank->type->fld_width;
@@ -1371,10 +1372,14 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
13711372
}
13721373
}
13731374

1375+
for (i = 0; i < drvdata->nr_banks; i++) {
1376+
bank = &drvdata->pin_banks[i];
1377+
if (drvdata->suspend)
1378+
drvdata->suspend(bank);
1379+
}
1380+
13741381
clk_disable(drvdata->pclk);
13751382

1376-
if (drvdata->suspend)
1377-
drvdata->suspend(drvdata);
13781383
if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
13791384
drvdata->retention_ctrl->enable(drvdata);
13801385

@@ -1392,6 +1397,7 @@ static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
13921397
static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
13931398
{
13941399
struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1400+
struct samsung_pin_bank *bank;
13951401
int ret;
13961402
int i;
13971403

@@ -1406,11 +1412,14 @@ static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
14061412
return ret;
14071413
}
14081414

1409-
if (drvdata->resume)
1410-
drvdata->resume(drvdata);
1415+
for (i = 0; i < drvdata->nr_banks; i++) {
1416+
bank = &drvdata->pin_banks[i];
1417+
if (drvdata->resume)
1418+
drvdata->resume(bank);
1419+
}
14111420

14121421
for (i = 0; i < drvdata->nr_banks; i++) {
1413-
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1422+
bank = &drvdata->pin_banks[i];
14141423
void __iomem *reg = bank->pctl_base + bank->pctl_offset;
14151424
const u8 *offs = bank->type->reg_offset;
14161425
const u8 *widths = bank->type->fld_width;

‎drivers/pinctrl/samsung/pinctrl-samsung.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -285,8 +285,8 @@ struct samsung_pin_ctrl {
285285
int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
286286
int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
287287
void (*pud_value_init)(struct samsung_pinctrl_drv_data *drvdata);
288-
void (*suspend)(struct samsung_pinctrl_drv_data *);
289-
void (*resume)(struct samsung_pinctrl_drv_data *);
288+
void (*suspend)(struct samsung_pin_bank *bank);
289+
void (*resume)(struct samsung_pin_bank *bank);
290290
};
291291

292292
/**
@@ -335,8 +335,8 @@ struct samsung_pinctrl_drv_data {
335335

336336
struct samsung_retention_ctrl *retention_ctrl;
337337

338-
void (*suspend)(struct samsung_pinctrl_drv_data *);
339-
void (*resume)(struct samsung_pinctrl_drv_data *);
338+
void (*suspend)(struct samsung_pin_bank *bank);
339+
void (*resume)(struct samsung_pin_bank *bank);
340340
};
341341

342342
/**

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