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LuBaolujoergroedel
LuBaolu
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joergroedel
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iommu/vt-d: Add trace events for cache tag interface
Add trace events for cache tag assign/unassign/flush operations and trace the events in the interfaces. These trace events will improve debugging capabilities by providing detailed information about cache tag activity. A sample of the traced messages looks like below [messages have been stripped and wrapped to make the line short]. cache_tag_assign: dmar9/0000:00:01.0 type iotlb did 1 pasid 9 ref 1 cache_tag_assign: dmar9/0000:00:01.0 type devtlb did 1 pasid 9 ref 1 cache_tag_flush_all: dmar6/0000:8a:00.0 type iotlb did 7 pasid 0 ref 1 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeab00000-0xeab1afff] addr 0xeab00000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeab20000-0xeab31fff] addr 0xeab20000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeaa40000-0xeaa51fff] addr 0xeaa40000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0x98de0000-0x98de4fff] addr 0x98de0000 pages 0x8 mask 0x3 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xe9828000-0xe9828fff] addr 0xe9828000 pages 0x1 mask 0x0 cache_tag_unassign: dmar9/0000:00:01.0 type iotlb did 1 pasid 9 ref 1 cache_tag_unassign: dmar9/0000:00:01.0 type devtlb did 1 pasid 9 ref 1 Signed-off-by: Lu Baolu <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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‎drivers/iommu/intel/cache.c‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717

1818
#include "iommu.h"
1919
#include "pasid.h"
20+
#include "trace.h"
2021

2122
/* Check if an existing cache tag can be reused for a new association. */
2223
static bool cache_tage_match(struct cache_tag *tag, u16 domain_id,
@@ -69,11 +70,13 @@ static int cache_tag_assign(struct dmar_domain *domain, u16 did,
6970
temp->users++;
7071
spin_unlock_irqrestore(&domain->cache_lock, flags);
7172
kfree(tag);
73+
trace_cache_tag_assign(temp);
7274
return 0;
7375
}
7476
}
7577
list_add_tail(&tag->node, &domain->cache_tags);
7678
spin_unlock_irqrestore(&domain->cache_lock, flags);
79+
trace_cache_tag_assign(tag);
7780

7881
return 0;
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}
@@ -91,6 +94,7 @@ static void cache_tag_unassign(struct dmar_domain *domain, u16 did,
9194
spin_lock_irqsave(&domain->cache_lock, flags);
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list_for_each_entry(tag, &domain->cache_tags, node) {
9396
if (cache_tage_match(tag, did, iommu, dev, pasid, type)) {
97+
trace_cache_tag_unassign(tag);
9498
if (--tag->users == 0) {
9599
list_del(&tag->node);
96100
kfree(tag);
@@ -316,6 +320,8 @@ void cache_tag_flush_range(struct dmar_domain *domain, unsigned long start,
316320
quirk_extra_dev_tlb_flush(info, addr, mask, tag->pasid, info->ats_qdep);
317321
break;
318322
}
323+
324+
trace_cache_tag_flush_range(tag, start, end, addr, pages, mask);
319325
}
320326
spin_unlock_irqrestore(&domain->cache_lock, flags);
321327
}
@@ -356,6 +362,8 @@ void cache_tag_flush_all(struct dmar_domain *domain)
356362
IOMMU_NO_PASID, info->ats_qdep);
357363
break;
358364
}
365+
366+
trace_cache_tag_flush_all(tag);
359367
}
360368
spin_unlock_irqrestore(&domain->cache_lock, flags);
361369
}
@@ -404,6 +412,8 @@ void cache_tag_flush_range_np(struct dmar_domain *domain, unsigned long start,
404412
addr, mask,
405413
DMA_TLB_PSI_FLUSH);
406414
}
415+
416+
trace_cache_tag_flush_range_np(tag, start, end, addr, pages, mask);
407417
}
408418
spin_unlock_irqrestore(&domain->cache_lock, flags);
409419
}

‎drivers/iommu/intel/trace.h‎

Lines changed: 97 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,103 @@ TRACE_EVENT(prq_report,
8989
__entry->dw1, __entry->dw2, __entry->dw3)
9090
)
9191
);
92+
93+
DECLARE_EVENT_CLASS(cache_tag_log,
94+
TP_PROTO(struct cache_tag *tag),
95+
TP_ARGS(tag),
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TP_STRUCT__entry(
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__string(iommu, tag->iommu->name)
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__string(dev, dev_name(tag->dev))
99+
__field(u16, type)
100+
__field(u16, domain_id)
101+
__field(u32, pasid)
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__field(u32, users)
103+
),
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TP_fast_assign(
105+
__assign_str(iommu, tag->iommu->name);
106+
__assign_str(dev, dev_name(tag->dev));
107+
__entry->type = tag->type;
108+
__entry->domain_id = tag->domain_id;
109+
__entry->pasid = tag->pasid;
110+
__entry->users = tag->users;
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),
112+
TP_printk("%s/%s type %s did %d pasid %d ref %d",
113+
__get_str(iommu), __get_str(dev),
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__print_symbolic(__entry->type,
115+
{ CACHE_TAG_IOTLB, "iotlb" },
116+
{ CACHE_TAG_DEVTLB, "devtlb" },
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{ CACHE_TAG_NESTING_IOTLB, "nesting_iotlb" },
118+
{ CACHE_TAG_NESTING_DEVTLB, "nesting_devtlb" }),
119+
__entry->domain_id, __entry->pasid, __entry->users
120+
)
121+
);
122+
123+
DEFINE_EVENT(cache_tag_log, cache_tag_assign,
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TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
126+
);
127+
128+
DEFINE_EVENT(cache_tag_log, cache_tag_unassign,
129+
TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
131+
);
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133+
DEFINE_EVENT(cache_tag_log, cache_tag_flush_all,
134+
TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
136+
);
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138+
DECLARE_EVENT_CLASS(cache_tag_flush,
139+
TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
140+
unsigned long addr, unsigned long pages, unsigned long mask),
141+
TP_ARGS(tag, start, end, addr, pages, mask),
142+
TP_STRUCT__entry(
143+
__string(iommu, tag->iommu->name)
144+
__string(dev, dev_name(tag->dev))
145+
__field(u16, type)
146+
__field(u16, domain_id)
147+
__field(u32, pasid)
148+
__field(unsigned long, start)
149+
__field(unsigned long, end)
150+
__field(unsigned long, addr)
151+
__field(unsigned long, pages)
152+
__field(unsigned long, mask)
153+
),
154+
TP_fast_assign(
155+
__assign_str(iommu, tag->iommu->name);
156+
__assign_str(dev, dev_name(tag->dev));
157+
__entry->type = tag->type;
158+
__entry->domain_id = tag->domain_id;
159+
__entry->pasid = tag->pasid;
160+
__entry->start = start;
161+
__entry->end = end;
162+
__entry->addr = addr;
163+
__entry->pages = pages;
164+
__entry->mask = mask;
165+
),
166+
TP_printk("%s %s[%d] type %s did %d [0x%lx-0x%lx] addr 0x%lx pages 0x%lx mask 0x%lx",
167+
__get_str(iommu), __get_str(dev), __entry->pasid,
168+
__print_symbolic(__entry->type,
169+
{ CACHE_TAG_IOTLB, "iotlb" },
170+
{ CACHE_TAG_DEVTLB, "devtlb" },
171+
{ CACHE_TAG_NESTING_IOTLB, "nesting_iotlb" },
172+
{ CACHE_TAG_NESTING_DEVTLB, "nesting_devtlb" }),
173+
__entry->domain_id, __entry->start, __entry->end,
174+
__entry->addr, __entry->pages, __entry->mask
175+
)
176+
);
177+
178+
DEFINE_EVENT(cache_tag_flush, cache_tag_flush_range,
179+
TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
180+
unsigned long addr, unsigned long pages, unsigned long mask),
181+
TP_ARGS(tag, start, end, addr, pages, mask)
182+
);
183+
184+
DEFINE_EVENT(cache_tag_flush, cache_tag_flush_range_np,
185+
TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
186+
unsigned long addr, unsigned long pages, unsigned long mask),
187+
TP_ARGS(tag, start, end, addr, pages, mask)
188+
);
92189
#endif /* _TRACE_INTEL_IOMMU_H */
93190

94191
/* This part must be outside protection */

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