drm/nouveau/gsp: add support for 570.144

Add r570-specific HAL routines, and support loading of GSP-RM version
570.144 if firmware is available.

There should be no impact on r535, or non-GSP paths.

Signed-off-by: Ben Skeggs <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Timur Tabi <[email protected]>
Tested-by: Timur Tabi <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

Author: Ben Skeggs

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c

@@ -41,6 +41,7 @@ ad102_gsp = {
 
 static struct nvkm_gsp_fwif
 ad102_gsps[] = {
+	{ 1, tu102_gsp_load, &ad102_gsp, &r570_rm_ga102, "570.144", true },
 	{ 0, tu102_gsp_load, &ad102_gsp, &r535_rm_ga102, "535.113.01", true },
 	{}
 };
@@ -57,3 +58,9 @@ NVKM_GSP_FIRMWARE_BOOTER(ad103, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ad104, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ad106, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ad107, 535.113.01);
+
+NVKM_GSP_FIRMWARE_BOOTER(ad102, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ad103, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ad104, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ad106, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ad107, 570.144);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c

@@ -142,6 +142,8 @@ nvkm_gsp_new_(const struct nvkm_gsp_fwif *fwif, struct nvkm_device *device,
 	gsp->func = fwif->func;
 
 	if (fwif->rm) {
+		nvkm_info(&gsp->subdev, "RM version: %s\n", fwif->ver);
+
 		gsp->rm = kzalloc(sizeof(*gsp->rm), GFP_KERNEL);
 		if (!gsp->rm)
 			return -ENOMEM;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c

@@ -58,6 +58,7 @@ ga100_gsp = {
 
 static struct nvkm_gsp_fwif
 ga100_gsps[] = {
+	{  1, tu102_gsp_load, &ga100_gsp, &r570_rm_tu102, "570.144" },
 	{  0, tu102_gsp_load, &ga100_gsp, &r535_rm_tu102, "535.113.01" },
 	{ -1, gv100_gsp_nofw, &gv100_gsp },
 	{}
@@ -71,3 +72,4 @@ ga100_gsp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
 }
 
 NVKM_GSP_FIRMWARE_BOOTER(ga100, 535.113.01);
+NVKM_GSP_FIRMWARE_BOOTER(ga100, 570.144);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

@@ -174,6 +174,7 @@ ga102_gsp = {
 
 static struct nvkm_gsp_fwif
 ga102_gsps[] = {
+	{  1, tu102_gsp_load, &ga102_gsp_r535, &r570_rm_ga102, "570.144" },
 	{  0, tu102_gsp_load, &ga102_gsp_r535, &r535_rm_ga102, "535.113.01" },
 	{ -1, gv100_gsp_nofw, &ga102_gsp },
 	{}
@@ -191,3 +192,9 @@ NVKM_GSP_FIRMWARE_BOOTER(ga103, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ga104, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ga106, 535.113.01);
 NVKM_GSP_FIRMWARE_BOOTER(ga107, 535.113.01);
+
+NVKM_GSP_FIRMWARE_BOOTER(ga102, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ga103, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ga104, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ga106, 570.144);
+NVKM_GSP_FIRMWARE_BOOTER(ga107, 570.144);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild

@@ -13,3 +13,4 @@ nvkm-y += nvkm/subdev/gsp/rm/ga1xx.o
 nvkm-y += nvkm/subdev/gsp/rm/ad10x.o
 
 include $(src)/nvkm/subdev/gsp/rm/r535/Kbuild
+include $(src)/nvkm/subdev/gsp/rm/r570/Kbuild

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.c

@@ -16,6 +16,34 @@ nvkm_rm_gr_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc,
 	return nvkm_rm_engine_obj_new(&chan->chan->rm.object, chan->chan->id, oclass, pobject);
 }
 
+static int
+nvkm_rm_gr_fini(struct nvkm_gr *base, bool suspend)
+{
+	struct nvkm_rm *rm = base->engine.subdev.device->gsp->rm;
+	struct r535_gr *gr = container_of(base, typeof(*gr), base);
+
+	if (rm->api->gr->scrubber.fini)
+		rm->api->gr->scrubber.fini(gr);
+
+	return 0;
+}
+
+static int
+nvkm_rm_gr_init(struct nvkm_gr *base)
+{
+	struct nvkm_rm *rm = base->engine.subdev.device->gsp->rm;
+	struct r535_gr *gr = container_of(base, typeof(*gr), base);
+	int ret;
+
+	if (rm->api->gr->scrubber.init) {
+		ret = rm->api->gr->scrubber.init(gr);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 int
 nvkm_rm_gr_new(struct nvkm_rm *rm)
 {
@@ -34,6 +62,8 @@ nvkm_rm_gr_new(struct nvkm_rm *rm)
 
 	func->dtor = r535_gr_dtor;
 	func->oneinit = r535_gr_oneinit;
+	func->init = nvkm_rm_gr_init;
+	func->fini = nvkm_rm_gr_fini;
 	func->units = r535_gr_units;
 	func->chan_new = r535_gr_chan_new;
 
@@ -51,6 +81,7 @@ nvkm_rm_gr_new(struct nvkm_rm *rm)
 	}
 
 	nvkm_gr_ctor(func, rm->device, NVKM_ENGINE_GR, 0, true, &gr->base);
+	gr->scrubber.chid = -1;
 	rm->device->gr = &gr->base;
 	return 0;
 }

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.h

@@ -34,5 +34,22 @@ struct r535_gr {
 	int ctxbuf_nr;
 
 	struct nvkm_memory *ctxbuf_mem[R515_GR_MAX_CTXBUFS];
+
+	struct {
+		int chid;
+		struct nvkm_memory *inst;
+		struct nvkm_vmm *vmm;
+		struct nvkm_gsp_object chan;
+		struct nvkm_gsp_object threed;
+		struct {
+			struct nvkm_memory *mem[R515_GR_MAX_CTXBUFS];
+			struct nvkm_vma    *vma[R515_GR_MAX_CTXBUFS];
+		} ctxbuf;
+		bool enabled;
+	} scrubber;
 };
+
+struct NV2080_CTRL_INTERNAL_ENGINE_CONTEXT_BUFFER_INFO;
+void r535_gr_get_ctxbuf_info(struct r535_gr *, int i,
+			     struct NV2080_CTRL_INTERNAL_ENGINE_CONTEXT_BUFFER_INFO *);
 #endif

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c

@@ -33,6 +33,14 @@
 static void
 r535_bar_flush(struct nvkm_bar *bar)
 {
+	/* Use NV_PFLUSH in resume path - needed on R570 to flush writes before
+	 * BAR2 page tables have been restored.
+	 */
+	if (unlikely(!bar->bar2)) {
+		g84_bar_flush(bar);
+		return;
+	}
+
 	ioread32_native(bar->flushBAR2);
 }
 

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fbsr.c

@@ -48,9 +48,9 @@ struct fbsr {
 	u64 sys_offset;
 };
 
-static int
-fbsr_memlist(struct nvkm_gsp_device *device, u32 handle, enum nvkm_memory_target aper,
-	     u64 phys, u64 size, struct sg_table *sgt, struct nvkm_gsp_object *object)
+int
+r535_fbsr_memlist(struct nvkm_gsp_device *device, u32 handle, enum nvkm_memory_target aper,
+		  u64 phys, u64 size, struct sg_table *sgt, struct nvkm_gsp_object *object)
 {
 	struct nvkm_gsp_client *client = device->object.client;
 	struct nvkm_gsp *gsp = client->gsp;
@@ -117,8 +117,8 @@ fbsr_send(struct fbsr *fbsr, struct fbsr_item *item)
 	struct nvkm_gsp_object memlist;
 	int ret;
 
-	ret = fbsr_memlist(&fbsr->device, fbsr->hmemory, NVKM_MEM_TARGET_VRAM,
-			   item->addr, item->size, NULL, &memlist);
+	ret = r535_fbsr_memlist(&fbsr->device, fbsr->hmemory, NVKM_MEM_TARGET_VRAM,
+				item->addr, item->size, NULL, &memlist);
 	if (ret)
 		return ret;
 
@@ -155,8 +155,8 @@ fbsr_init(struct fbsr *fbsr, struct sg_table *sgt, u64 items_size)
 	struct nvkm_gsp_object memlist;
 	int ret;
 
-	ret = fbsr_memlist(&fbsr->device, fbsr->hmemory, NVKM_MEM_TARGET_HOST,
-			   0, fbsr->size, sgt, &memlist);
+	ret = r535_fbsr_memlist(&fbsr->device, fbsr->hmemory, NVKM_MEM_TARGET_HOST,
+				0, fbsr->size, sgt, &memlist);
 	if (ret)
 		return ret;
 
@@ -200,7 +200,7 @@ fbsr_inst(struct fbsr *fbsr, const char *type, struct nvkm_memory *memory)
 	return fbsr_vram(fbsr, type, nvkm_memory_addr(memory), nvkm_memory_size(memory));
 }
 
-static void
+void
 r535_fbsr_resume(struct nvkm_gsp *gsp)
 {
 	/* RM has restored VRAM contents already, so just need to free the sysmem buffer. */

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c

@@ -339,7 +339,7 @@ r535_runl = {
 	.allow = r535_runl_allow,
 };
 
-static void
+void
 r535_fifo_rc_chid(struct nvkm_fifo *fifo, int chid)
 {
 	struct nvkm_chan *chan;