Commit 58b61fc
dmaengine: xilinx: xdma: Clarify the logic between cyclic/sg modes
We support both modes, but they perform totally different taks in the
interrupt handler. Clarify what shall be done in each case.
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>1 parent 26ee018 commit 58b61fc
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