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airliedairlied
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Merge tag 'drm-intel-fixes-2024-11-14' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes
- Don't load GSC on ARL-H and ARL-U if too old FW - Avoid potential OOPS in enabling/disabling TV output Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 2d5404c + 67e023b commit 6b76bf8

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6 files changed

+77
-32
lines changed

6 files changed

+77
-32
lines changed

‎drivers/gpu/drm/i915/display/intel_tv.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -928,7 +928,7 @@ intel_enable_tv(struct intel_atomic_state *state,
928928
const struct intel_crtc_state *pipe_config,
929929
const struct drm_connector_state *conn_state)
930930
{
931-
struct intel_display *display = to_intel_display(state);
931+
struct intel_display *display = to_intel_display(encoder);
932932

933933
/* Prevents vblank waits from timing out in intel_tv_detect_type() */
934934
intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc));
@@ -942,7 +942,7 @@ intel_disable_tv(struct intel_atomic_state *state,
942942
const struct intel_crtc_state *old_crtc_state,
943943
const struct drm_connector_state *old_conn_state)
944944
{
945-
struct intel_display *display = to_intel_display(state);
945+
struct intel_display *display = to_intel_display(encoder);
946946

947947
intel_de_rmw(display, TV_CTL, TV_ENC_ENABLE, 0);
948948
}

‎drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c‎

Lines changed: 32 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ int intel_gsc_fw_get_binary_info(struct intel_uc_fw *gsc_fw, const void *data, s
8080
const struct intel_gsc_cpd_header_v2 *cpd_header = NULL;
8181
const struct intel_gsc_cpd_entry *cpd_entry = NULL;
8282
const struct intel_gsc_manifest_header *manifest;
83+
struct intel_uc_fw_ver min_ver = { 0 };
8384
size_t min_size = sizeof(*layout);
8485
int i;
8586

@@ -212,33 +213,46 @@ int intel_gsc_fw_get_binary_info(struct intel_uc_fw *gsc_fw, const void *data, s
212213
}
213214
}
214215

215-
if (IS_ARROWLAKE(gt->i915)) {
216+
/*
217+
* ARL SKUs require newer firmwares, but the blob is actually common
218+
* across all MTL and ARL SKUs, so we need to do an explicit version check
219+
* here rather than using a separate table entry. If a too old version
220+
* is found, then just don't use GSC rather than aborting the driver load.
221+
* Note that the major number in the GSC FW version is used to indicate
222+
* the platform, so we expect it to always be 102 for MTL/ARL binaries.
223+
*/
224+
if (IS_ARROWLAKE_S(gt->i915))
225+
min_ver = (struct intel_uc_fw_ver){ 102, 0, 10, 1878 };
226+
else if (IS_ARROWLAKE_H(gt->i915) || IS_ARROWLAKE_U(gt->i915))
227+
min_ver = (struct intel_uc_fw_ver){ 102, 1, 15, 1926 };
228+
229+
if (IS_METEORLAKE(gt->i915) && gsc->release.major != 102) {
230+
gt_info(gt, "Invalid GSC firmware for MTL/ARL, got %d.%d.%d.%d but need 102.x.x.x",
231+
gsc->release.major, gsc->release.minor,
232+
gsc->release.patch, gsc->release.build);
233+
return -EINVAL;
234+
}
235+
236+
if (min_ver.major) {
216237
bool too_old = false;
217238

218-
/*
219-
* ARL requires a newer firmware than MTL did (102.0.10.1878) but the
220-
* firmware is actually common. So, need to do an explicit version check
221-
* here rather than using a separate table entry. And if the older
222-
* MTL-only version is found, then just don't use GSC rather than aborting
223-
* the driver load.
224-
*/
225-
if (gsc->release.major < 102) {
239+
if (gsc->release.minor < min_ver.minor) {
226240
too_old = true;
227-
} else if (gsc->release.major == 102) {
228-
if (gsc->release.minor == 0) {
229-
if (gsc->release.patch < 10) {
241+
} else if (gsc->release.minor == min_ver.minor) {
242+
if (gsc->release.patch < min_ver.patch) {
243+
too_old = true;
244+
} else if (gsc->release.patch == min_ver.patch) {
245+
if (gsc->release.build < min_ver.build)
230246
too_old = true;
231-
} else if (gsc->release.patch == 10) {
232-
if (gsc->release.build < 1878)
233-
too_old = true;
234-
}
235247
}
236248
}
237249

238250
if (too_old) {
239-
gt_info(gt, "GSC firmware too old for ARL, got %d.%d.%d.%d but need at least 102.0.10.1878",
251+
gt_info(gt, "GSC firmware too old for ARL, got %d.%d.%d.%d but need at least %d.%d.%d.%d",
240252
gsc->release.major, gsc->release.minor,
241-
gsc->release.patch, gsc->release.build);
253+
gsc->release.patch, gsc->release.build,
254+
min_ver.major, min_ver.minor,
255+
min_ver.patch, min_ver.build);
242256
return -EINVAL;
243257
}
244258
}

‎drivers/gpu/drm/i915/i915_drv.h‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -540,8 +540,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
540540
#define IS_LUNARLAKE(i915) (0 && i915)
541541
#define IS_BATTLEMAGE(i915) (0 && i915)
542542

543-
#define IS_ARROWLAKE(i915) \
544-
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL)
543+
#define IS_ARROWLAKE_H(i915) \
544+
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL_H)
545+
#define IS_ARROWLAKE_U(i915) \
546+
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL_U)
547+
#define IS_ARROWLAKE_S(i915) \
548+
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL_S)
545549
#define IS_DG2_G10(i915) \
546550
IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
547551
#define IS_DG2_G11(i915) \

‎drivers/gpu/drm/i915/intel_device_info.c‎

Lines changed: 19 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -200,8 +200,16 @@ static const u16 subplatform_g12_ids[] = {
200200
INTEL_DG2_G12_IDS(ID),
201201
};
202202

203-
static const u16 subplatform_arl_ids[] = {
204-
INTEL_ARL_IDS(ID),
203+
static const u16 subplatform_arl_h_ids[] = {
204+
INTEL_ARL_H_IDS(ID),
205+
};
206+
207+
static const u16 subplatform_arl_u_ids[] = {
208+
INTEL_ARL_U_IDS(ID),
209+
};
210+
211+
static const u16 subplatform_arl_s_ids[] = {
212+
INTEL_ARL_S_IDS(ID),
205213
};
206214

207215
static bool find_devid(u16 id, const u16 *p, unsigned int num)
@@ -261,9 +269,15 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
261269
} else if (find_devid(devid, subplatform_g12_ids,
262270
ARRAY_SIZE(subplatform_g12_ids))) {
263271
mask = BIT(INTEL_SUBPLATFORM_G12);
264-
} else if (find_devid(devid, subplatform_arl_ids,
265-
ARRAY_SIZE(subplatform_arl_ids))) {
266-
mask = BIT(INTEL_SUBPLATFORM_ARL);
272+
} else if (find_devid(devid, subplatform_arl_h_ids,
273+
ARRAY_SIZE(subplatform_arl_h_ids))) {
274+
mask = BIT(INTEL_SUBPLATFORM_ARL_H);
275+
} else if (find_devid(devid, subplatform_arl_u_ids,
276+
ARRAY_SIZE(subplatform_arl_u_ids))) {
277+
mask = BIT(INTEL_SUBPLATFORM_ARL_U);
278+
} else if (find_devid(devid, subplatform_arl_s_ids,
279+
ARRAY_SIZE(subplatform_arl_s_ids))) {
280+
mask = BIT(INTEL_SUBPLATFORM_ARL_S);
267281
}
268282

269283
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);

‎drivers/gpu/drm/i915/intel_device_info.h‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,9 @@ enum intel_platform {
128128
#define INTEL_SUBPLATFORM_RPLU 2
129129

130130
/* MTL */
131-
#define INTEL_SUBPLATFORM_ARL 0
131+
#define INTEL_SUBPLATFORM_ARL_H 0
132+
#define INTEL_SUBPLATFORM_ARL_U 1
133+
#define INTEL_SUBPLATFORM_ARL_S 2
132134

133135
enum intel_ppgtt_type {
134136
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,

‎include/drm/intel/i915_pciids.h‎

Lines changed: 15 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -771,13 +771,24 @@
771771
INTEL_ATS_M150_IDS(MACRO__, ## __VA_ARGS__), \
772772
INTEL_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
773773

774-
/* MTL */
775-
#define INTEL_ARL_IDS(MACRO__, ...) \
776-
MACRO__(0x7D41, ## __VA_ARGS__), \
774+
/* ARL */
775+
#define INTEL_ARL_H_IDS(MACRO__, ...) \
777776
MACRO__(0x7D51, ## __VA_ARGS__), \
778-
MACRO__(0x7D67, ## __VA_ARGS__), \
779777
MACRO__(0x7DD1, ## __VA_ARGS__)
780778

779+
#define INTEL_ARL_U_IDS(MACRO__, ...) \
780+
MACRO__(0x7D41, ## __VA_ARGS__) \
781+
782+
#define INTEL_ARL_S_IDS(MACRO__, ...) \
783+
MACRO__(0x7D67, ## __VA_ARGS__), \
784+
MACRO__(0xB640, ## __VA_ARGS__)
785+
786+
#define INTEL_ARL_IDS(MACRO__, ...) \
787+
INTEL_ARL_H_IDS(MACRO__, ## __VA_ARGS__), \
788+
INTEL_ARL_U_IDS(MACRO__, ## __VA_ARGS__), \
789+
INTEL_ARL_S_IDS(MACRO__, ## __VA_ARGS__)
790+
791+
/* MTL */
781792
#define INTEL_MTL_IDS(MACRO__, ...) \
782793
INTEL_ARL_IDS(MACRO__, ## __VA_ARGS__), \
783794
MACRO__(0x7D40, ## __VA_ARGS__), \

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