riscv: dts: thead: set dma-noncoherent to soc bus

riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.

Signed-off-by: Jisheng Zhang <[email protected]>
Tested-by: Drew Fustini <[email protected]>
Reviewed-by: Guo Ren <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>

Author: xhackerustc

arch/riscv/boot/dts/thead/th1520.dtsi

@@ -139,6 +139,7 @@
 		interrupt-parent = <&plic>;
 		#address-cells = <2>;
 		#size-cells = <2>;
+		dma-noncoherent;
 		ranges;
 
 		plic: interrupt-controller@ffd8000000 {