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Merge tag 'mmc-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Add documentation for the mmc-test driver - Register the eMMC RPMB partition with the RPMB subsystem - Some various cleanups MMC host: - dw_mmc-rockchip: Add support for the RK3576 variant - renesas_sdhi: Add support for the RZ/V2H(P) variant - sdhci_am654: Add a retry mechanism for tuning - sdhci-atmel: Convert DT bindings to json schema - sdhci-of-dwcmshc: - Add eMMC HW reset support for BlueField-3 SoC - Add support for the RK3576 variant - Add support for the Sophgo SG2042 variant - sdhci-of-ma35d1: Add new driver for the Nuvoton MA35D1 SDHCI Misc/Tee: - Add Replay Protected Memory Block (RPMB) subsystem - Let optee probe RPMB device using RPMB subsystem" * tag 'mmc-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (41 commits) mmc: core: Use dev_err_probe for deferred regulators optee: Fix a NULL vs IS_ERR() check mmc: sdhci_am654: Add prints to tuning algorithm mmc: sdhci_am654: Add retry tuning dt-bindings: mmc: Add support for rk3576 eMMC Documentation: mmc: Add mmc-test doc rpmb: fix error path in rpmb_dev_register() optee: add RPMB dependency mmc: block: add RPMB dependency mmc: core Convert UNSTUFF_BITS macro to inline function dt-bindings: mmc: sdhci-atmel: Convert to json schema mmc: core: Convert simple_stroul to kstroul mmc: core: Calculate size from pointer mmc: cqhci: Make use of cqhci_halted() routine mmc: core: Replace the argument of mmc_sd_switch() with defines mmc: dw_mmc-rockchip: Add support for rk3576 SoCs mmc: dw_mmc-rockchip: Add internal phase support dt-bindings: mmc: Add support for rk3576 dw-mshc mmc: sdhci-of-dwcmshc: Add hw_reset() support for BlueField-3 SoC mmc: core: remove left-over data structure declarations ...
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‎Documentation/ABI/testing/sysfs-class-tee‎

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What: /sys/class/tee/tee{,priv}X/rpmb_routing_model
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Date: May 2024
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KernelVersion: 6.10
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Contact: [email protected]
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Description:
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RPMB frames can be routed to the RPMB device via the
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user-space daemon tee-supplicant or the RPMB subsystem
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in the kernel. The value "user" means that the driver
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will route the RPMB frames via user space. Conversely,
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"kernel" means that the frames are routed via the RPMB
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subsystem without assistance from tee-supplicant. It
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should be assumed that RPMB frames are routed via user
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space if the variable is absent. The primary purpose
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of this variable is to let systemd know whether
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tee-supplicant is needed in the early boot with initramfs.

‎Documentation/devicetree/bindings/mmc/atmel,sama5d2-sdhci.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/atmel,sama5d2-sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel SDHCI controller
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maintainers:
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- Aubin Constans <[email protected]>
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- Nicolas Ferre <[email protected]>
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description:
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Bindings for the SDHCI controller found in Atmel/Microchip SoCs.
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properties:
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compatible:
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oneOf:
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- enum:
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- atmel,sama5d2-sdhci
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- microchip,sam9x60-sdhci
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- items:
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- enum:
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- microchip,sam9x7-sdhci
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- microchip,sama7g5-sdhci
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- const: microchip,sam9x60-sdhci
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: hclock
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- description: multclk
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- description: baseclk
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minItems: 2
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clock-names:
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items:
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- const: hclock
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- const: multclk
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- const: baseclk
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minItems: 2
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microchip,sdcal-inverted:
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type: boolean
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description:
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When present, polarity on the SDCAL SoC pin is inverted. The default
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polarity for this signal is described in the datasheet. For instance on
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SAMA5D2, the pin is usually tied to the GND with a resistor and a
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capacitor (see "SDMMC I/O Calibration" chapter).
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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allOf:
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- $ref: sdhci-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- atmel,sama5d2-sdhci
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then:
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properties:
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clocks:
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minItems: 3
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clock-names:
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minItems: 3
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/at91.h>
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mmc@a0000000 {
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compatible = "atmel,sama5d2-sdhci";
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reg = <0xa0000000 0x300>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
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clock-names = "hclock", "multclk", "baseclk";
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assigned-clocks = <&sdmmc0_gclk>;
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assigned-clock-rates = <480000000>;
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};

‎Documentation/devicetree/bindings/mmc/nuvoton,ma35d1-sdhci.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/nuvoton,ma35d1-sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 SD/SDIO/MMC Controller
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maintainers:
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- Shan-Chun Hung <[email protected]>
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allOf:
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- $ref: sdhci-common.yaml#
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properties:
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compatible:
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enum:
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- nuvoton,ma35d1-sdhci
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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pinctrl-names:
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minItems: 1
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items:
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- const: default
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- const: state_uhs
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pinctrl-0:
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description:
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Should contain default/high speed pin ctrl.
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maxItems: 1
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pinctrl-1:
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description:
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Should contain uhs mode pin ctrl.
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maxItems: 1
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resets:
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maxItems: 1
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nuvoton,sys:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to access GCR (Global Control Register) registers.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- pinctrl-names
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- pinctrl-0
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- resets
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- nuvoton,sys
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
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#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mmc@40190000 {
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compatible = "nuvoton,ma35d1-sdhci";
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reg = <0x0 0x40190000 0x0 0x2000>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk SDH1_GATE>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&pinctrl_sdhci1>;
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pinctrl-1 = <&pinctrl_sdhci1_uhs>;
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resets = <&sys MA35D1_RESET_SDH1>;
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nuvoton,sys = <&sys>;
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vqmmc-supply = <&sdhci1_vqmmc_regulator>;
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bus-width = <8>;
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max-frequency = <200000000>;
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};
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};

‎Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml‎

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- renesas,sdhi-r7s9210 # SH-Mobile AG5
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- renesas,sdhi-r8a73a4 # R-Mobile APE6
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- renesas,sdhi-r8a7740 # R-Mobile A1
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- renesas,sdhi-r9a09g057 # RZ/V2H(P)
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- renesas,sdhi-sh73a0 # R-Mobile APE6
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- items:
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- enum:
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minItems: 1
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maxItems: 3
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clocks: true
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clocks:
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minItems: 1
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maxItems: 4
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clock-names: true
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clock-names:
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minItems: 1
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maxItems: 4
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dmas:
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minItems: 4
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properties:
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compatible:
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contains:
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const: renesas,rzg2l-sdhi
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enum:
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- renesas,sdhi-r9a09g057
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- renesas,rzg2l-sdhi
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then:
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properties:
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clocks:

‎Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml‎

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- rockchip,rv1108-dw-mshc
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- rockchip,rv1126-dw-mshc
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- const: rockchip,rk3288-dw-mshc
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# for Rockchip RK3576 with phase tuning inside the controller
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- const: rockchip,rk3576-dw-mshc
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reg:
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maxItems: 1

‎Documentation/devicetree/bindings/mmc/sdhci-atmel.txt‎

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