@@ -89,6 +89,27 @@ struct loongson2_clk_board_info {
8989 .div_width = _dwidth, \
9090 }
9191
92+ static const struct loongson2_clk_board_info ls2k0500_clks [] = {
93+ CLK_PLL (LOONGSON2_NODE_PLL , "pll_node" , 0 , 16 , 8 , 8 , 6 ),
94+ CLK_PLL (LOONGSON2_DDR_PLL , "pll_ddr" , 0x8 , 16 , 8 , 8 , 6 ),
95+ CLK_PLL (LOONGSON2_DC_PLL , "pll_soc" , 0x10 , 16 , 8 , 8 , 6 ),
96+ CLK_PLL (LOONGSON2_PIX0_PLL , "pll_pix0" , 0x18 , 16 , 8 , 8 , 6 ),
97+ CLK_PLL (LOONGSON2_PIX1_PLL , "pll_pix1" , 0x20 , 16 , 8 , 8 , 6 ),
98+ CLK_DIV (LOONGSON2_NODE_CLK , "clk_node" , "pll_node" , 0 , 24 , 6 ),
99+ CLK_DIV (LOONGSON2_DDR_CLK , "clk_ddr" , "pll_ddr" , 0x8 , 24 , 6 ),
100+ CLK_DIV (LOONGSON2_HDA_CLK , "clk_hda" , "pll_ddr" , 0xc , 8 , 6 ),
101+ CLK_DIV (LOONGSON2_GPU_CLK , "clk_gpu" , "pll_soc" , 0x10 , 24 , 6 ),
102+ CLK_DIV (LOONGSON2_DC_CLK , "clk_sb" , "pll_soc" , 0x14 , 0 , 6 ),
103+ CLK_DIV (LOONGSON2_GMAC_CLK , "clk_gmac" , "pll_soc" , 0x14 , 8 , 6 ),
104+ CLK_DIV (LOONGSON2_PIX0_CLK , "clk_pix0" , "pll_pix0" , 0x18 , 24 , 6 ),
105+ CLK_DIV (LOONGSON2_PIX1_CLK , "clk_pix1" , "pll_pix1" , 0x20 , 24 , 6 ),
106+ CLK_SCALE (LOONGSON2_BOOT_CLK , "clk_boot" , "clk_sb" , 0x28 , 8 , 3 ),
107+ CLK_SCALE (LOONGSON2_SATA_CLK , "clk_sata" , "clk_sb" , 0x28 , 12 , 3 ),
108+ CLK_SCALE (LOONGSON2_USB_CLK , "clk_usb" , "clk_sb" , 0x28 , 16 , 3 ),
109+ CLK_SCALE (LOONGSON2_APB_CLK , "clk_apb" , "clk_sb" , 0x28 , 20 , 3 ),
110+ { /* Sentinel */ },
111+ };
112+
92113static const struct loongson2_clk_board_info ls2k1000_clks [] = {
93114 CLK_PLL (LOONGSON2_NODE_PLL , "pll_node" , 0 , 32 , 10 , 26 , 6 ),
94115 CLK_PLL (LOONGSON2_DDR_PLL , "pll_ddr" , 0x10 , 32 , 10 , 26 , 6 ),
@@ -260,6 +281,7 @@ static int loongson2_clk_probe(struct platform_device *pdev)
260281}
261282
262283static const struct of_device_id loongson2_clk_match_table [] = {
284+ { .compatible = "loongson,ls2k0500-clk" , .data = & ls2k0500_clks },
263285 { .compatible = "loongson,ls2k-clk" , .data = & ls2k1000_clks },
264286 { }
265287};
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