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Linus Walleij
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Merge tag 'samsung-pinctrl-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.16 Refactor the driver suspend and resume to handle Google GS101 EINT GPIO pin banks and add the alive pin bank for that SoC. Signed-off-by: Linus Walleij <[email protected]>
2 parents a5fd6b6 + a30692b commit 86ea0b8

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5 files changed

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‎drivers/pinctrl/samsung/pinctrl-exynos-arm64.c‎

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -1419,8 +1419,8 @@ static const struct samsung_pin_ctrl exynosautov920_pin_ctrl[] = {
14191419
.pin_banks = exynosautov920_pin_banks0,
14201420
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks0),
14211421
.eint_wkup_init = exynos_eint_wkup_init,
1422-
.suspend = exynos_pinctrl_suspend,
1423-
.resume = exynos_pinctrl_resume,
1422+
.suspend = exynosautov920_pinctrl_suspend,
1423+
.resume = exynosautov920_pinctrl_resume,
14241424
.retention_data = &exynosautov920_retention_data,
14251425
}, {
14261426
/* pin-controller instance 1 AUD data */
@@ -1431,43 +1431,43 @@ static const struct samsung_pin_ctrl exynosautov920_pin_ctrl[] = {
14311431
.pin_banks = exynosautov920_pin_banks2,
14321432
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks2),
14331433
.eint_gpio_init = exynos_eint_gpio_init,
1434-
.suspend = exynos_pinctrl_suspend,
1435-
.resume = exynos_pinctrl_resume,
1434+
.suspend = exynosautov920_pinctrl_suspend,
1435+
.resume = exynosautov920_pinctrl_resume,
14361436
}, {
14371437
/* pin-controller instance 3 HSI1 data */
14381438
.pin_banks = exynosautov920_pin_banks3,
14391439
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks3),
14401440
.eint_gpio_init = exynos_eint_gpio_init,
1441-
.suspend = exynos_pinctrl_suspend,
1442-
.resume = exynos_pinctrl_resume,
1441+
.suspend = exynosautov920_pinctrl_suspend,
1442+
.resume = exynosautov920_pinctrl_resume,
14431443
}, {
14441444
/* pin-controller instance 4 HSI2 data */
14451445
.pin_banks = exynosautov920_pin_banks4,
14461446
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks4),
14471447
.eint_gpio_init = exynos_eint_gpio_init,
1448-
.suspend = exynos_pinctrl_suspend,
1449-
.resume = exynos_pinctrl_resume,
1448+
.suspend = exynosautov920_pinctrl_suspend,
1449+
.resume = exynosautov920_pinctrl_resume,
14501450
}, {
14511451
/* pin-controller instance 5 HSI2UFS data */
14521452
.pin_banks = exynosautov920_pin_banks5,
14531453
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks5),
14541454
.eint_gpio_init = exynos_eint_gpio_init,
1455-
.suspend = exynos_pinctrl_suspend,
1456-
.resume = exynos_pinctrl_resume,
1455+
.suspend = exynosautov920_pinctrl_suspend,
1456+
.resume = exynosautov920_pinctrl_resume,
14571457
}, {
14581458
/* pin-controller instance 6 PERIC0 data */
14591459
.pin_banks = exynosautov920_pin_banks6,
14601460
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks6),
14611461
.eint_gpio_init = exynos_eint_gpio_init,
1462-
.suspend = exynos_pinctrl_suspend,
1463-
.resume = exynos_pinctrl_resume,
1462+
.suspend = exynosautov920_pinctrl_suspend,
1463+
.resume = exynosautov920_pinctrl_resume,
14641464
}, {
14651465
/* pin-controller instance 7 PERIC1 data */
14661466
.pin_banks = exynosautov920_pin_banks7,
14671467
.nr_banks = ARRAY_SIZE(exynosautov920_pin_banks7),
14681468
.eint_gpio_init = exynos_eint_gpio_init,
1469-
.suspend = exynos_pinctrl_suspend,
1470-
.resume = exynos_pinctrl_resume,
1469+
.suspend = exynosautov920_pinctrl_suspend,
1470+
.resume = exynosautov920_pinctrl_resume,
14711471
},
14721472
};
14731473

@@ -1762,15 +1762,15 @@ static const struct samsung_pin_ctrl gs101_pin_ctrl[] __initconst = {
17621762
.pin_banks = gs101_pin_alive,
17631763
.nr_banks = ARRAY_SIZE(gs101_pin_alive),
17641764
.eint_wkup_init = exynos_eint_wkup_init,
1765-
.suspend = exynos_pinctrl_suspend,
1766-
.resume = exynos_pinctrl_resume,
1765+
.suspend = gs101_pinctrl_suspend,
1766+
.resume = gs101_pinctrl_resume,
17671767
}, {
17681768
/* pin banks of gs101 pin-controller (FAR_ALIVE) */
17691769
.pin_banks = gs101_pin_far_alive,
17701770
.nr_banks = ARRAY_SIZE(gs101_pin_far_alive),
17711771
.eint_wkup_init = exynos_eint_wkup_init,
1772-
.suspend = exynos_pinctrl_suspend,
1773-
.resume = exynos_pinctrl_resume,
1772+
.suspend = gs101_pinctrl_suspend,
1773+
.resume = gs101_pinctrl_resume,
17741774
}, {
17751775
/* pin banks of gs101 pin-controller (GSACORE) */
17761776
.pin_banks = gs101_pin_gsacore,
@@ -1784,29 +1784,29 @@ static const struct samsung_pin_ctrl gs101_pin_ctrl[] __initconst = {
17841784
.pin_banks = gs101_pin_peric0,
17851785
.nr_banks = ARRAY_SIZE(gs101_pin_peric0),
17861786
.eint_gpio_init = exynos_eint_gpio_init,
1787-
.suspend = exynos_pinctrl_suspend,
1788-
.resume = exynos_pinctrl_resume,
1787+
.suspend = gs101_pinctrl_suspend,
1788+
.resume = gs101_pinctrl_resume,
17891789
}, {
17901790
/* pin banks of gs101 pin-controller (PERIC1) */
17911791
.pin_banks = gs101_pin_peric1,
17921792
.nr_banks = ARRAY_SIZE(gs101_pin_peric1),
17931793
.eint_gpio_init = exynos_eint_gpio_init,
1794-
.suspend = exynos_pinctrl_suspend,
1795-
.resume = exynos_pinctrl_resume,
1794+
.suspend = gs101_pinctrl_suspend,
1795+
.resume = gs101_pinctrl_resume,
17961796
}, {
17971797
/* pin banks of gs101 pin-controller (HSI1) */
17981798
.pin_banks = gs101_pin_hsi1,
17991799
.nr_banks = ARRAY_SIZE(gs101_pin_hsi1),
18001800
.eint_gpio_init = exynos_eint_gpio_init,
1801-
.suspend = exynos_pinctrl_suspend,
1802-
.resume = exynos_pinctrl_resume,
1801+
.suspend = gs101_pinctrl_suspend,
1802+
.resume = gs101_pinctrl_resume,
18031803
}, {
18041804
/* pin banks of gs101 pin-controller (HSI2) */
18051805
.pin_banks = gs101_pin_hsi2,
18061806
.nr_banks = ARRAY_SIZE(gs101_pin_hsi2),
18071807
.eint_gpio_init = exynos_eint_gpio_init,
1808-
.suspend = exynos_pinctrl_suspend,
1809-
.resume = exynos_pinctrl_resume,
1808+
.suspend = gs101_pinctrl_suspend,
1809+
.resume = gs101_pinctrl_resume,
18101810
},
18111811
};
18121812

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