@@ -3627,7 +3627,6 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu)
36273627
36283628static int arm_smmu_init_strtab_2lvl (struct arm_smmu_device * smmu )
36293629{
3630- u64 reg ;
36313630 u32 l1size ;
36323631 struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
36333632 unsigned int last_sid_idx =
@@ -3651,13 +3650,6 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
36513650 return - ENOMEM ;
36523651 }
36533652
3654- /* Configure strtab_base_cfg for 2 levels */
3655- reg = FIELD_PREP (STRTAB_BASE_CFG_FMT , STRTAB_BASE_CFG_FMT_2LVL );
3656- reg |= FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE ,
3657- ilog2 (cfg -> l2 .num_l1_ents ) + STRTAB_SPLIT );
3658- reg |= FIELD_PREP (STRTAB_BASE_CFG_SPLIT , STRTAB_SPLIT );
3659- cfg -> strtab_base_cfg = reg ;
3660-
36613653 cfg -> l2 .l2ptrs = devm_kcalloc (smmu -> dev , cfg -> l2 .num_l1_ents ,
36623654 sizeof (* cfg -> l2 .l2ptrs ), GFP_KERNEL );
36633655 if (!cfg -> l2 .l2ptrs )
@@ -3668,7 +3660,6 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
36683660
36693661static int arm_smmu_init_strtab_linear (struct arm_smmu_device * smmu )
36703662{
3671- u64 reg ;
36723663 u32 size ;
36733664 struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
36743665
@@ -3684,34 +3675,21 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu)
36843675 }
36853676 cfg -> linear .num_ents = 1 << smmu -> sid_bits ;
36863677
3687- /* Configure strtab_base_cfg for a linear table covering all SIDs */
3688- reg = FIELD_PREP (STRTAB_BASE_CFG_FMT , STRTAB_BASE_CFG_FMT_LINEAR );
3689- reg |= FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE , smmu -> sid_bits );
3690- cfg -> strtab_base_cfg = reg ;
3691-
36923678 arm_smmu_init_initial_stes (cfg -> linear .table , cfg -> linear .num_ents );
36933679 return 0 ;
36943680}
36953681
36963682static int arm_smmu_init_strtab (struct arm_smmu_device * smmu )
36973683{
3698- u64 reg ;
36993684 int ret ;
37003685
3701- if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB ) {
3686+ if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB )
37023687 ret = arm_smmu_init_strtab_2lvl (smmu );
3703- reg = smmu -> strtab_cfg .l2 .l1_dma & STRTAB_BASE_ADDR_MASK ;
3704- } else {
3688+ else
37053689 ret = arm_smmu_init_strtab_linear (smmu );
3706- reg = smmu -> strtab_cfg .linear .ste_dma & STRTAB_BASE_ADDR_MASK ;
3707- }
37083690 if (ret )
37093691 return ret ;
37103692
3711- /* Set the strtab base address */
3712- reg |= STRTAB_BASE_RA ;
3713- smmu -> strtab_cfg .strtab_base = reg ;
3714-
37153693 ida_init (& smmu -> vmid_map );
37163694
37173695 return 0 ;
@@ -3927,6 +3905,30 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu)
39273905 return ret ;
39283906}
39293907
3908+ static void arm_smmu_write_strtab (struct arm_smmu_device * smmu )
3909+ {
3910+ struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
3911+ dma_addr_t dma ;
3912+ u32 reg ;
3913+
3914+ if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB ) {
3915+ reg = FIELD_PREP (STRTAB_BASE_CFG_FMT ,
3916+ STRTAB_BASE_CFG_FMT_2LVL ) |
3917+ FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE ,
3918+ ilog2 (cfg -> l2 .num_l1_ents ) + STRTAB_SPLIT ) |
3919+ FIELD_PREP (STRTAB_BASE_CFG_SPLIT , STRTAB_SPLIT );
3920+ dma = cfg -> l2 .l1_dma ;
3921+ } else {
3922+ reg = FIELD_PREP (STRTAB_BASE_CFG_FMT ,
3923+ STRTAB_BASE_CFG_FMT_LINEAR ) |
3924+ FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE , smmu -> sid_bits );
3925+ dma = cfg -> linear .ste_dma ;
3926+ }
3927+ writeq_relaxed ((dma & STRTAB_BASE_ADDR_MASK ) | STRTAB_BASE_RA ,
3928+ smmu -> base + ARM_SMMU_STRTAB_BASE );
3929+ writel_relaxed (reg , smmu -> base + ARM_SMMU_STRTAB_BASE_CFG );
3930+ }
3931+
39303932static int arm_smmu_device_reset (struct arm_smmu_device * smmu )
39313933{
39323934 int ret ;
@@ -3962,10 +3964,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu)
39623964 writel_relaxed (reg , smmu -> base + ARM_SMMU_CR2 );
39633965
39643966 /* Stream table */
3965- writeq_relaxed (smmu -> strtab_cfg .strtab_base ,
3966- smmu -> base + ARM_SMMU_STRTAB_BASE );
3967- writel_relaxed (smmu -> strtab_cfg .strtab_base_cfg ,
3968- smmu -> base + ARM_SMMU_STRTAB_BASE_CFG );
3967+ arm_smmu_write_strtab (smmu );
39693968
39703969 /* Command queue */
39713970 writeq_relaxed (smmu -> cmdq .q .q_base , smmu -> base + ARM_SMMU_CMDQ_BASE );
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