Commit 8d187a7
committed
genirq: Make handle_enforce_irqctx() unconditionally available
Commit 1b57d91 ("irqchip/gic-v2, v3: Prevent SW resends entirely")
sett the flag which enforces interrupt handling in interrupt context and
prevents software base resends for ARM GIC v2/v3.
But it missed that the helper function which checks the flag was hidden
behind CONFIG_GENERIC_PENDING_IRQ, which is not set by ARM[64].
Make the helper unconditionally available so that the enforcement actually
works.
Fixes: 1b57d91 ("irqchip/gic-v2, v3: Prevent SW resends entirely")
Signed-off-by: Thomas Gleixner <[email protected]>
Link: https://lore.kernel.org/all/[email protected]1 parent 2af2573 commit 8d187a7
1 file changed
+3
-6
lines changed| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
441 | 441 | | |
442 | 442 | | |
443 | 443 | | |
444 | | - | |
445 | | - | |
446 | | - | |
447 | | - | |
448 | 444 | | |
449 | 445 | | |
450 | 446 | | |
| |||
471 | 467 | | |
472 | 468 | | |
473 | 469 | | |
| 470 | + | |
| 471 | + | |
474 | 472 | | |
475 | 473 | | |
476 | | - | |
| 474 | + | |
477 | 475 | | |
478 | | - | |
479 | 476 | | |
480 | 477 | | |
481 | 478 | | |
| |||
0 commit comments