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arm64: add 'runtime constant' support
This implements the runtime constant infrastructure for arm64, allowing the dcache d_hash() function to be generated using as a constant for hash table address followed by shift by a constant of the hash index. [ Fixed up to deal with the big-endian case as per Mark Rutland ] Signed-off-by: Linus Torvalds <[email protected]>
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_RUNTIME_CONST_H
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#define _ASM_RUNTIME_CONST_H
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#include <asm/cacheflush.h>
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/* Sigh. You can still run arm64 in BE mode */
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#include <asm/byteorder.h>
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#define runtime_const_ptr(sym) ({ \
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typeof(sym) __ret; \
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asm_inline("1:\t" \
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"movz %0, #0xcdef\n\t" \
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"movk %0, #0x89ab, lsl #16\n\t" \
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"movk %0, #0x4567, lsl #32\n\t" \
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"movk %0, #0x0123, lsl #48\n\t" \
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".pushsection runtime_ptr_" #sym ",\"a\"\n\t" \
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".long 1b - .\n\t" \
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".popsection" \
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:"=r" (__ret)); \
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__ret; })
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#define runtime_const_shift_right_32(val, sym) ({ \
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unsigned long __ret; \
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asm_inline("1:\t" \
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"lsr %w0,%w1,#12\n\t" \
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".pushsection runtime_shift_" #sym ",\"a\"\n\t" \
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".long 1b - .\n\t" \
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".popsection" \
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:"=r" (__ret) \
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:"r" (0u+(val))); \
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__ret; })
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#define runtime_const_init(type, sym) do { \
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extern s32 __start_runtime_##type##_##sym[]; \
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extern s32 __stop_runtime_##type##_##sym[]; \
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runtime_const_fixup(__runtime_fixup_##type, \
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(unsigned long)(sym), \
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__start_runtime_##type##_##sym, \
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__stop_runtime_##type##_##sym); \
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} while (0)
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/* 16-bit immediate for wide move (movz and movk) in bits 5..20 */
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static inline void __runtime_fixup_16(__le32 *p, unsigned int val)
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{
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u32 insn = le32_to_cpu(*p);
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insn &= 0xffe0001f;
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insn |= (val & 0xffff) << 5;
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*p = cpu_to_le32(insn);
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}
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static inline void __runtime_fixup_caches(void *where, unsigned int insns)
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{
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unsigned long va = (unsigned long)where;
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caches_clean_inval_pou(va, va + 4*insns);
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}
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static inline void __runtime_fixup_ptr(void *where, unsigned long val)
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{
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__le32 *p = lm_alias(where);
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__runtime_fixup_16(p, val);
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__runtime_fixup_16(p+1, val >> 16);
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__runtime_fixup_16(p+2, val >> 32);
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__runtime_fixup_16(p+3, val >> 48);
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__runtime_fixup_caches(where, 4);
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}
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/* Immediate value is 6 bits starting at bit #16 */
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static inline void __runtime_fixup_shift(void *where, unsigned long val)
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{
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__le32 *p = lm_alias(where);
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u32 insn = le32_to_cpu(*p);
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insn &= 0xffc0ffff;
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insn |= (val & 63) << 16;
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*p = cpu_to_le32(insn);
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__runtime_fixup_caches(where, 1);
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}
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static inline void runtime_const_fixup(void (*fn)(void *, unsigned long),
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unsigned long val, s32 *start, s32 *end)
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{
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while (start < end) {
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fn(*start + (void *)start, val);
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start++;
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}
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}
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#endif

arch/arm64/kernel/vmlinux.lds.S

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EXIT_DATA
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}
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RUNTIME_CONST(shift, d_hash_shift)
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RUNTIME_CONST(ptr, dentry_hashtable)
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PERCPU_SECTION(L1_CACHE_BYTES)
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HYPERVISOR_PERCPU_SECTION
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