Merge tag 'pinctrl-v6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time

  New drivers:

   - New subdriver for the Qualcomm MSM8917 SoC TLMM

   - New subdriver for the Mediatek MT7988 SoC

   - New subdriver for the Rockchip RK3562 SoC

   - New subdriver for the Renesas RZ/G3E SoC

  Improvements:

   - Fix some missing pins in the Qualcomm IPQ5424 TLMM

   - Fix some missing LVDS pins in the Sunxi A100/A133

   - Support Sunxi V853 (simple compatible string)

   - Cleanups in the Samsung driver

   - Fix some AMD suspend behaviour

   - Cleanups"

* tag 'pinctrl-v6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (29 commits)
  dt-bindings: pinctrl: sunxi: add compatible for V853
  pinctrl: Use str_enable_disable-like helpers
  dt-bindings: pinctrl: Correct indentation and style in DTS example
  pinctrl: amd: Take suspend type into consideration which pins are non-wake
  pinctrl: stm32: Add check for clk_enable()
  pinctrl: renesas: rzg2l: Fix PFC_MASK for RZ/V2H and RZ/G3E
  pinctrl: sunxi: add missed lvds pins for a100/a133
  pinctrl: mediatek: Drop mtk_pinconf_bias_set_pd()
  pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC
  pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table
  dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
  dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H
  pinctrl: rockchip: add rk3562 support
  dt-bindings: pinctrl: Add rk3562 pinctrl support
  pinctrl: Fix the clean up on pinconf_apply_setting failure
  dt-bindings: pinctrl: add binding for MT7988 SoC
  pinctrl: mediatek: add MT7988 pinctrl driver
  pinctrl: mediatek: add support for MTK_PULL_PD_TYPE
  pinctrl: ocelot: Constify some structures
  pinctrl: renesas: rzg2l: Add audio clock pins on RZ/G3S
  ...

Author: torvalds

Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml

@@ -44,6 +44,7 @@ properties:
       - allwinner,sun8i-r40-pinctrl
       - allwinner,sun8i-v3-pinctrl
       - allwinner,sun8i-v3s-pinctrl
+      - allwinner,sun8i-v853-pinctrl
       - allwinner,sun9i-a80-pinctrl
       - allwinner,sun9i-a80-r-pinctrl
       - allwinner,sun20i-d1-pinctrl
@@ -179,6 +180,18 @@ allOf:
           minItems: 7
           maxItems: 7
 
+  - if:
+      properties:
+        compatible:
+          enum:
+            - allwinner,sun8i-v853-pinctrl
+
+    then:
+      properties:
+        interrupts:
+          minItems: 8
+          maxItems: 8
+
   - if:
       properties:
         compatible:

Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml

@@ -145,40 +145,40 @@ additionalProperties:
 
 examples:
   - |
-     #include <dt-bindings/clock/at91.h>
-     #include <dt-bindings/interrupt-controller/irq.h>
-     #include <dt-bindings/pinctrl/at91.h>
-
-     pinctrl@fffff400 {
-       #address-cells = <1>;
-       #size-cells = <1>;
-       compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
-       ranges = <0xfffff400 0xfffff400 0x600>;
-
-       atmel,mux-mask = <
-         /*    A         B     */
-         0xffffffff 0xffc00c3b  /* pioA */
-         0xffffffff 0x7fff3ccf  /* pioB */
-         0xffffffff 0x007fffff  /* pioC */
-         >;
-
-       dbgu {
-         pinctrl_dbgu: dbgu-0 {
-           atmel,pins =
-             <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
-              AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
-         };
-       };
-
-       pioA: gpio@fffff400 {
-         compatible = "atmel,at91rm9200-gpio";
-         reg = <0xfffff400 0x200>;
-         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
-         #gpio-cells = <2>;
-         gpio-controller;
-         interrupt-controller;
-         #interrupt-cells = <2>;
-         clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
-       };
-     };
+    #include <dt-bindings/clock/at91.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/pinctrl/at91.h>
+
+    pinctrl@fffff400 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
+        ranges = <0xfffff400 0xfffff400 0x600>;
+
+        atmel,mux-mask = <
+          /*    A         B     */
+          0xffffffff 0xffc00c3b  /* pioA */
+          0xffffffff 0x7fff3ccf  /* pioB */
+          0xffffffff 0x007fffff  /* pioC */
+          >;
+
+        dbgu {
+            dbgu-0 {
+                atmel,pins =
+                  <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+                   AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+            };
+        };
+
+        gpio@fffff400 {
+            compatible = "atmel,at91rm9200-gpio";
+            reg = <0xfffff400 0x200>;
+            interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+            #gpio-cells = <2>;
+            gpio-controller;
+            interrupt-controller;
+            #interrupt-cells = <2>;
+            clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+        };
+    };
 ...